# Selection of an IGCT for multilevel converters dedicated to high-voltage direct current grid connection of offshore wind-farms

Davin Guedon, Philippe Ladoux, Sébastien Sanchez, Sébastien Cornet, Thomas Stiasny, Christian Winter

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Davin Guedon, Philippe Ladoux, Sébastien Sanchez, Sébastien Cornet, Thomas Stiasny, et al.. Selection of an IGCT for multilevel converters dedicated to high-voltage direct current grid connection of offshore wind-farms. IET Power Electronics, 2021, 14 (10), pp.Pages 1779-1791. 10.1049/pel2.12145. hal-03292007

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Distributed under a Creative Commons Attribution 4.0 International License
DOI: 10.1049/pel2.12145

ORIGINAL RESEARCH PAPER

IET

The Institution of
Engineering and Technology

WILEY

# Selection of an IGCT for multilevel converters dedicated to high-voltage direct current grid connection of offshore wind-farms

Davin Guedon<sup>1,2 ID</sup>

Philippe Ladoux<sup>1 ID</sup>

Sébastien Sanchez<sup>3</sup>

Sébastien Cornet<sup>2</sup>

Thomas Stiasny<sup>4 ID</sup>

Christian Winter<sup>4</sup>

**Correspondence**

Davin Guedon, 2 rue Charles Camichel, 31000 Toulouse, France.

Email: davin.guedon@edf.fr

**Abstract**

Grid connection of remote offshore wind-parks uses high-voltage direct current technology and in order to reduce costs and losses and maximise profitability, semiconductor power losses must be minimised. To properly choose the semiconductors, it is necessary to estimate their losses for a large number of operating conditions. This article deals with a modelling approach to calculate power losses for many such operating conditions, based on measured semiconductor characteristics and the chosen multilevel modulation strategy. The case of the integrated gate-commutated thyristor is considered because, for a given device rating, it is possible to select an integrated gate-commutated thyristor benefiting from the best trade-off between on-state losses and turn-off losses, thus minimising the power losses of the two end-stations.

# 1 | INTRODUCTION

Following the growing adoption of renewable energies, off-shore wind farms, at distances of 50 to 80 km from the coast allow for steady energy recovery from strong winds. Because of the important length of submarine cables, connection with the onshore AC grid is effected via HVDC links [1, 2]. Modular multilevel converters (MMCs) have been widely employed for some years for this kind of application [3]; nowadays these converters can transmit powers of up to 1 GW with pole-to-pole voltages of a few hundred kilovolts [4]. This topology is based on a large quantity of semiconductors: their characteristics are of paramount importance to ensure continuous operation of the HVDC link, with high efficiency and low capital expenditure (CAPEX).

For such applications and because of the low switching frequency of the individual semiconductor power switches provided by the large number of levels, the replacement of the insulated-gate bipolar transistor (IGBT) by the integrated gate-commutated thyristor (IGCT) appears to be advantageous [5] because the IGCT has low on-state losses, inherent short-circuit failure-mode (SCFM) and higher reliability [6–8] with improved thermal cycling capabilities [9, 10]. The use of this device for

MMC-HVDC applications is being intensively investigated in China [11–13], where many multi-terminal HVDC links have been installed over the last ten years with a growing interest in coupling LCC technology with VSC-MMC solutions [14].

In order to properly choose the semiconductors, an accurate estimation of power losses in the MMC is necessary which, however, is complicated with many cells. To resolve this issue, most models do not calculate power losses for every single cell [15, 16] which leads to an approximate result: since the ratio between switching frequency and grid frequency is low, the distribution of on-state and switching losses over the cells of the same arm can become non-negligible [17]. Consequently, a few cells will experience more thermal stresses than expected with these models, which is unacceptable when it comes to estimating maximum junction temperatures for instance.

Furthermore, most models presented in the literature do not take into account this electro-thermal coupling and simply assume a constant junction temperature [18, 19]. However, consideration of the junction temperature is crucial, as specified in IEC 62751-2, since semiconductor power losses are highly dependent on temperature: turn-on and turn-off losses can vary from 10% to 40% between 25 and 125 °C for IGBTs, depending on their technology and their packages. It is common to

This is an open access article under the terms of the Creative Commons Attribution License, which permits use, distribution and reproduction in any medium, provided the original work is properly cited.

© 2021 The Authors. *IET Power Electronics* published by John Wiley & Sons Ltd on behalf of The Institution of Engineering and Technology

<footnote n="1">¹ LAPLACE Laboratory, Université de Toulouse, Toulouse, France</footnote>

<footnote n="2">² EDF Lab Les Renardières, EDF Recherche et Développement, Moret-sur-Loing, France</footnote>

<footnote n="3">³ Site de Toulouse, ICAM, Toulouse, France</footnote>

<footnote n="4">⁴ Semiconductors, Hitachi ABB Power Grids, Lenzburg, Switzerland</footnote>
<figure><img src="image_2.png" /><figcaption>FIGURE 1 Overview of the modular multilevel converter</figcaption></figure>

consider the highest junction temperature to estimate power losses but to ensure their safe operation, the devices operate at a lower junction temperature, whereby the losses are no longer the same [20]. Considering that IGBTs/IGCTs and diodes are thermally independent of each other is not strictly correct for the arrangement of these two parts: both belong to the same packaging for devices such as the injection-enhanced gate transistor (IEGT) and more generally IGBT modules, while the same physical area of silicon is used for reverse-conducting IGCTs [21] and Bi-mode IGBTs (BIGTs) [22]. It implies that calculations must consider at some point a relation between diode losses and IGBT/IGCT losses.

On the other hand MMCs for such powers typically contain more than a thousand devices [23], it leads to slow simulations due to the size of the state-space matrix and the small time steps with traditional simulation software. Averaged or equivalent models are preferred, for HVDC applications because faster, where the number of levels is large [24]. This paper proposes the fast computation of an electro-thermal model for the MMC's semiconductors and clamp-resistor, opening the way to the calculation by automated sweeping-through of many operating conditions and hence the optimisation of the entire HVDC link, where transmitted power varies because of the intermittent nature of wind. This study is the result of collaboration between the LAPLACE Laboratory, Electricité de France (EDF) and Hitachi ABB Power Grids, Semiconductors, on the applications of IGCTs in the field of high-voltage power transmission.

# 2 | HVDC LINK AND CONVERTERS

## 2.1 | Presentation

Figure 1 presents the topology: a “cluster” is a stack of cells [25] consisting of a capacitor and a switching arm with bidirectional current and unidirectional voltage capabilities [26], decoupled from the capacitor by a “clamp-circuit”, as shown in Figure 2. This topology benefits from many advantages: there is no central capacitor on the DC link which avoids fast and dangerous

<table><caption>TABLE 1 Selection of N and $V_{cell}$ with $V_{DC}$ = ±320 kV</caption><tr><td>Voltage rating</td><td>4.5 kV</td><td>6.5 kV</td><td>9 kV</td></tr><tr><td>V<sub>cell</sub></td><td>2.5 kV</td><td>3.6 kV</td><td>5 kV</td></tr><tr><td>Number of cells N</td><td>256</td><td>178</td><td>128</td></tr></table>

discharge of energy in case of short-circuits [27]; arm inductors limit $di/dt$ and reduce short-circuit currents [28]; the topology's modularity makes the mechanical assembly easier, even for a large number of levels and it also allows the use of identical components, thus reducing production and maintenance costs [29]. In an IGCT cell, a $di/dt$ choke and a clamp circuit are necessary to limit diode reverse-recovery current during IGCT turn-on [30] and fault current in the case of semiconductor failure [31].

## 2.2 | Parameters of the study

In this topology and for a given system voltage, there is a free choice of voltage ratings for the semiconductors, as this only determines the number of (identical) cells. For a given pole-to-pole DC link voltage, $V_{DC}$, and a number of cells, N, per cluster, the nominal cell voltage $V_{cell}$ is given by the following relation:

$$NV_{cell} \geq V_{DC} \quad (1)$$

Therefore, two approaches have been retained to compare devices with different voltage ratings:

1. A comparative study where $V_{DC}$ is constant and the number of cells N depends on the semiconductors' voltage rating;

2. A comparative study where the number of cells N is constant and the semiconductors' voltage rating defines the system voltage $V_{DC}$.

These approaches have distinct purposes: the first one aims to compare devices based on industrially available XLPE cables and current designs, i.e. ±320 kV systems; whereas the study case of the second approach is a forecast, where it is assumed that DC link voltages will increase thanks to recent advances in XLPE cables. In the meantime, 6.5 and 10 kV devices with sufficient turn-off capability, allows the design of high-voltage cells. In the second comparative study, the DC current is reduced but the power is kept constant: this assumption has been made to keep the total energy stored in the capacitors constant for both studies, besides both studies apply to the same offshore wind parks.

### 2.2.1 | First comparative study, constant $V_{DC}$ and variable N

Table 1 illustrates the different configurations involved in the study. An increase in semiconductor voltage rating allows a
<figure><img src="image_3.png" /><figcaption>**FIGURE 2** Cluster-series arrangement of half-bridge cells</figcaption></figure>

<table><caption>**TABLE 2** Selection of $V_{DC}$ and $V_{cell}$ with $N = 256$</caption><tr><td>Voltage rating</td><td>4.5 kV</td><td>6.5 kV</td><td>9 kV</td></tr><tr><td>V<sub>cell</sub></td><td>2.5 kV</td><td>3.6 kV</td><td>5 kV</td></tr><tr><td>V<sub>DC</sub></td><td>±320 kV</td><td>±461 kV</td><td>±640 kV</td></tr></table>

reduction of the number of cells $N$ which might lead to a reduction of the overall power losses. Nevertheless, the increase in semiconductor voltage rating necessarily increases both on-state and switching losses, so a trade-off must be found. This kind of study focuses on the currently available technologies of XLPE cables for such projects, allowing a nominal DC link voltage of 320 kV per pole [32]. However, other factors are ignored in this study, namely:

* Total harmonic distortion varies with the number of cells which implies that the configuration based on $N = 256$ cells per cluster has lower total harmonic distortion (THD) than the one with $N = 128$ cells per cluster, however, this can be mitigated by the fact that as long as standards are respected, a further reduction of total harmonic distortion has no real interest.

* Mechanical, electrical and hydraulic assembly is more complex with $N = 256$ cells per cluster, so here, the reduction of $N$ is desirable.

* Converter material and assembly costs are intrinsically related to the number of cells.

### 2.2.2 | Second comparative study, constant $N$ and variable $V_{DC}$

In this comparison the number of cells is set to 256 and $V_{DC}$ is allowed to vary but with the following considerations (see Table 2):

* DC voltage can reach 640 kV between pole and ground, i.e. 1280 kV between poles, which would require cable technologies that are developed but not yet commercialised.

* For a given power, the increase in $V_{DC}$, reduces load current and consequently cell power-losses are reduced

* The study does not directly compare semiconductors with different voltage ratings but rather different technological

<table><caption>**TABLE 3** Main characteristics of the converters for a symmetric monopole HVDC link</caption><thead><tr><td>Parameter</td><td>Notation</td><td>Value</td></tr></thead><tbody><tr><td>Pole-to-pole voltage</td><td>V<sub>DC</sub></td><td>±320– ± 640 kV</td></tr><tr><td>Max. power</td><td>P<sub>max</sub></td><td>1000 MW</td></tr><tr><td>Max. reactive power</td><td>Q<sub>max</sub></td><td>±500 MV AR</td></tr><tr><td>Grid voltage</td><td>U<sub>s</sub></td><td>Variable</td></tr><tr><td>Grid frequency</td><td>f<sub>0</sub></td><td>50 Hz</td></tr><tr><td>Arm capacitance</td><td>C<sub>e</sub></td><td>Variable</td></tr></tbody></table>

solutions where the number of components and the physical volume remain almost identical.

This study aims to forecast the future developments of HVDC systems, operating at higher DC link voltages. It can be seen that the current trend is to increase cell voltage: there is no incentive to increase the number of cells per arm (which is already considerable), since THD is low enough to eliminate filter requirements [33]. In recent years, power semiconductors with voltage ratings exceeding 4.5 kV have become available: the 6.5 kV BIGT [22], the 6.5 kV RC-IGCT [21] and the 10 kV IGCT [34] for instance, while manufacturers now offer 6.5 kV IGBT modules with current ratings of around 1000 A.

## 2.3 | Characteristics of the HVDC link

### 2.3.1 | Electrical characteristics and volume of the converters

Table 3 shows the main characteristics of the two end-stations of the HVDC link, as shown in Figure 3. A maximum power of 1 GW has been retained, in order to analyse solutions close to existing projects where an HVDC link typically allows the connection of two or three offshore wind parks [35].

The choice of the arm capacitance is important: as it virtually determines the volume of the converter, since within a cell, the capacitor can represent more than half of the total physical volume [36]. In order to keep the total energy of a cluster, $C_e$, constant, the arm capacitance follows the relation given by
<figure><img src="image_4.png" /><figcaption>FIGURE 3 Overview of whole system: offshore wind parks are connected to the onshore AC grid through the HVDC link</figcaption></figure>

Equation (2):

$$C_e \propto \frac{\sqrt{P_{\max}^2 + Q_{\max}^2}}{V_{\text{DC}}^2 2\pi f_0} \quad (2)$$

So the total stored energy stored by cluster $E_{C_e}$ follows the relation of Equation (3):

$$E_{C_e} \propto \frac{\sqrt{P_{\max}^2 + Q_{\max}^2}}{2\pi f_0} \quad (3)$$

## 2.3.2 | Control strategy of the converters

Converter control-strategy significantly affects the overall efficiency of the converter-stations [37]: switching losses depend on switching frequency and current value at semiconductor turn-on and turn-off. In this study, the reference voltages imposed by the inner control loops are rounded to obtain an integral number of cells to insert; this concept named “nearest-level control” (NLC) embodies an appropriate multilevel modulation strategy when the number of cells is large [38, 39]. As opposed to pulse-width modulation (PWM), here, switching frequency is variable: it depends on the sorting algorithm which assigns a state to all the semiconductors of a given cluster as a function of the number of cells to insert and other constraints. Consequently, switching frequency is different for each semiconductor within a cluster and besides, it varies with the operating conditions. The term “switching frequency”, for a given operating condition, is thus the average switching frequency of all the converter’s semiconductors. The selected sorting algorithm leads to switching frequencies between 75 and 110 Hz: this range of frequencies allows a reasonable trade-off between switching losses and capacitor-voltage ripple [40].

It can be noted that other multilevel modulation strategies, based on the staircase principle, allow an operation at grid frequency [41], however they increase capacitor-voltage ripple: the stored energy must then be higher to counterbalance this effect, potentially leading to higher costs. PWM-based methods are limited, the reduction of the switching frequency can lead to the

divergence of the capacitor-voltages [42] due to interactions of sideband harmonics with the balancing process. On the other hand, they can present interesting features such as decentralised capacitor-voltage balancing [43], thus reducing the computation time of the sorting process. More generally, PWM-based methods lead to smaller THD than NLC-based methods [40]; however as explained in Section 2.2.1 an increase in THD is not problematic considering the large number of cells that is involved. Selective harmonic elimination is similar to staircase modulation but with different purposes, switching frequencies of about 150 Hz can be obtained [44].

## 2.4 | Characteristics of the offshore wind parks

### 2.4.1 | Statistical distribution of wind-speeds

The assessment of power losses in the converter can only be made for a given operating condition, which depends on the power produced by the offshore wind park. However, electricity production depends itself on the wind-speed. In this study, reachable wind-speeds are considered thanks to a statistical approach [45]; power losses are calculated for each operating condition. A statistical representation leads to an average operating condition, i.e. to the power losses averaged over a sufficiently long period of operation: they are the key element of the study since they are directly related to the average efficiency of the converter. A two-parameter Weibull distribution is selected: though limited compared to four and five parameter distributions, the two-parameter Weibull distribution is a simple way to model the distribution of wind-speeds [46]. The corresponding probability density function is given by Equation (4):

$$f(v) = \frac{K}{A} \left(\frac{v}{A}\right)^{K-1} e^{-\left(\frac{v}{A}\right)^K} \quad (4)$$

where [47]:

$$K = 2.2 \text{ and } A = 10.57 \text{ ms}^{-1} \quad (5)$$
<figure><img src="image_5.png" /><figcaption>**FIGURE 4** Considered probability-density function to assess power losses in the two terminal-converters of the HVDC link</figcaption></figure>

$K$ is the shape factor and $A$ the scale factor. The corresponding function is shown in Figure 4, the dots represent the sampling of the function, necessary to approximate it.

### 2.4.2 | Relation between the produced power and the wind-speed

The second step is to link the wind-speed, given by the statistical distribution, with the power produced by the offshore wind park. The corresponding characteristic depends on many parameters such as the windmills' aerodynamic properties, the electromechanical energy conversion system, the cut-in and cut-off wind-speeds. Cut-in and cut-off wind-speeds are typically $3 \text{ m s}^{-1}$ and $25 \text{ m s}^{-1}$, respectively [48]. Many mathematical models exist, based on the characteristics provided by windmill manufacturers [49]. A cubic approximation with a saturation at maximum power has been retained [50], normalised by the maximum power of the HVDC link, as shown in Figure 5. A spacing of 5% of maximum power is chosen between two successive dots.

This characteristic, coupled with the wind-speed distribution of Figure 4, can determine the average generated power and the average power losses, over a long period of operation. Average power production is 468 MW for a rated power of 1 GW, which is comparable to similar existing systems [47, 50].

## 3 | ELECTRO-THERMAL MODELLING

### 3.1 | Measurement of the semiconductor characteristics

The test system is shown in Figure 6. Inside the test system, the devices under test (DUTs) are preheated in order to measure electrical characteristics at a specific junction temperature, up to 200 °C. The DUTs are inserted in the test system and

<figure><img src="image_6.png" /><figcaption>**FIGURE 5** Relation between the produced power and the wind-speed, defining the electrical behaviour of the offshore wind park</figcaption></figure>

<figure><img src="image_7.png" /><figcaption>**FIGURE 6** Picture of the test system for IGCTs and diodes at Hitachi ABB Power Grids, Semiconductors</figcaption></figure>

clamped to their nominal mounting force, leading to the electrical schematic of Figure 7. Reconfiguration switches, protections and auxiliary systems (for charging the DC bus for instance) have not been represented. The clamp circuit is inserted at the back of the test system, many clamp circuits are pre-assembled as plug-in units for easy insertion and removal. The DC bus is charged to the nominal voltage, $V_{test}$, it corresponds to the voltage at which the DUTs will be turned on and turned off.

<figure><img src="image_8.png" /><figcaption>**FIGURE 7** Test circuit for the two DUTs (IGCT and diode)</figcaption></figure>
The double-pulse method must be repeated for each operating point. For the diode, di/dt, reverse-recovery current and reverse-recovery charge are automatically obtained through signal processing of diode current during turn-off.

Asymmetric IGCTs of different voltage classes (4.5, 6.5 and 9 kV) and their respective free-wheeling diodes as well as reverse conducting IGCTs (4.5 and 6.5 kV) have been electrically characterised for static and dynamic losses. To achieve a precise loss-model, the measurements have been conducted at junction temperatures of 25, 75 °C, 125 and 140 °C. The dynamic characterisation has been carried out for different voltages, currents and clamp-circuits. Several devices with different charge-carrier lifetime-treatments have been measured to select the optimal device per application regarding the compromise between static and dynamic losses. The use of measured characteristics stored in look-up tables greatly enhances the accuracy of the calculations, compared to the traditional second-order approximations used for on-state and switching losses. Thus, power losses are available in the following form:

$$ \begin{cases} P_{\text{on}} = f(i, T_j) \\ P_{\text{sw}} = f(i, V, T_j) \\ P_{\text{Rcl}} = f(i, V, T_j) \end{cases} \qquad (6) $$

where “V” designates the turn-on/turn-off voltage, “i” designates either the on-state current or the turn-on/turn-off current, “Tj” the junction temperature, Pon the on-state losses, Psw the switching losses and PRcl the power losses due to the clamp circuit, i.e. the clamp resistor Rcl as defined in Figure 7. f is a function obtained by interpolation of the data from the look-up tables: power losses can be calculated for each operating condition. At each integration step, the program calculates the instantaneous junction temperature for the calculated current and voltage. With these three instantaneous values the corresponding semiconductor losses (static and dynamic) are read from the look-up tables which are derived from Equation (6).

## 3.2 | Thermal model of the power semiconductors

### 3.2.1 | Asymmetric devices

Semiconductor characteristics relating electrical waveforms with the power losses depend on the device’s junction temperature. Yet junction temperature depends on power losses which implies that an electro-thermal relation exists between the semiconductors and the cooling system. The cooling system, at the cell level, is composed of semiconductors inserted between cold plates and pressed under a few kilo-newtons [51]. A classic assembly is composed of three cold plates and two semiconductors, such a configuration has been retained to model the electro-thermal coupling as seen in Figure 8; in this schematic the device is either an IGCT or a discrete diode. From the junction, dissipated power is evacuated through anode and cathode then through the two adjacent cold plates. This model is

<figure><img src="image_9.png" /><figcaption>FIGURE 8 Thermal model for a stack of two asymmetric devices in a MMC cell</figcaption></figure>

especially adapted to multi-physical calculations because it significantly reduces computation time compared to 3D finite-element method (FEM) models. Nevertheless it is limited from a thermal point of view since it is unidimensional [52]: the junction refers to a single point, which means that hot spots and temperature space drifts are not considered. In the same way anode, cathode, case and heatsinks, are modelled as homogeneous areas, at constant temperatures. A water temperature Twater equal to 58 °C has been selected; it is considered to be the maximum reachable temperature. The single-face thermal resistance between cold plate and water is equal to 11 K/kW: this resistance depends on the water flow rate; it must be noted that it may also vary from one manufacturer to another. The proposed model brings a lot of information from an electrical point of view: the electro-thermal dependency is represented which means the junction temperatures are automatically obtained when the circuit’s operation is simulated. It allows easily comparison of different designs, and the elimination of inconsistent solutions.

### 3.2.2 | Reverse-conducting (RC) devices

Reverse-conducting IGCTs (RC-IGCTs) also exist: these devices can conduct current in both directions, a single reverse-conducting device being electrically equivalent to an asymmetric device with an anti-parallel diode. Physically, it is realised by the introduction of a diode on the central part of the wafer [53], this process allows a reduction of the overall volume since the device remains identical from the outside and three cold-plates can be removed per MMC cell. However, current density in the semiconductor is necessarily higher because only one part of the wafer conducts current at a given instant [21]. It leads to a reduction of the performances compared to an association of two discrete devices, for a given wafer area. The thermal model of such a device contains two junctions, one for the diode part and one for the GCT part. The existence of internal thermal cross-coupling is evident: if only one part of the wafer is used, the thermal cooling path of the other part is used. However, the modelling of these cross couplings is complex because the thermal resistances have to be accurately calculated to clearly distinguish internal couplings. Here, internal couplings have been
<figure><img src="image_10.png" /><figcaption>**FIGURE 9** Thermal model for a stack of two reverse-conducting devices in a MMC cell</figcaption></figure>

<figure><img src="image_11.png" /><figcaption>**FIGURE 10** “RCD” clamp circuit and di/dt snubber</figcaption></figure>

neglected, as implied in Figure 9 where it has been assumed that thermal flux from diode and GCT parts are independent. Such a hypothesis is pessimistic for the estimation of the maximum junction temperature, because the parallel thermal conductances are ignored.

### 3.3 | Clamp circuit and di/dt snubber

The aforementioned clamp circuit is presented in Figure 10. The IGCT is turned on thanks to a current pulse in the gate, as in the case of a thyristor: as opposed to a transistor, there is no controllable transition from on to off-state [7]. This physical principle, inherent to thyristors, eliminates di/dt control during turn-on and hence during the diode's reverse recovery: thus, this circuit is mandatory when a free-wheeling diode is commutated by an IGCT [54] (e.g. D₂ with T₁ and D₁ with T₂). The clamp-circuit power-losses, are included in the calculations. The clamp circuit fulfills two basic functions:

At IGCT turn-on it limits di/dt to the diode's rated value;

<figure><img src="image_12.png" /><figcaption>**FIGURE 11** Averaged model for waveforms generation</figcaption></figure>

At IGCT turn off, it allows the inductor current to instantly divert to the clamp capacitor.

Dissipated energy in the resistor $R_{cl}$, at each commutation, depends on the cell voltage $V_{DC,cell}$, the arm current $i_a$ and the free-wheeling diode's properties ($D_2$ with IGCT $T_1$ and $D_1$ with IGCT $T_2$). It must be noted that these properties depend on the diode's junction temperature, $T_{Dj}$. These properties are known for different junction temperatures thanks to the aforementioned measurements, so it is possible to retain only three variables for the calculation of the dissipated energy:

1. The cell voltage $V_{cell}$;

2. The arm current $i_a$;

3. The free-wheeling diode's junction temperature $T_{Dj}$ ($D_2$ with IGCT $T_1$ and $D_1$ with IGCT $T_2$).

This approach is employed to realise a three-dimensional look-up table for these three variables and the dissipated energy. A model of an MMC cell is simulated using PLECS software for many points ($V_{cell}$, $i_a$, $T_{Dj}$), in order to build an accurate and easy-to-use look-up table.

### 3.4 | Averaged model of MMC, limits of use with PLECS

Many approaches have been successively applied to assess power losses in a converter. The first one, based on the full model of the converter, has shown its limits for many levels. Computation time of the state-space at each time-step quickly increases with the number of levels; for a hundred levels, the model simulation time for a few seconds of operation, is more than 24 h with a desktop computer! To resolve this issue, the averaged model of the converter is used: the series connection of cells is equivalent to a single commutation cell with an input capacitor of capacitance $C_e$ and an output voltage proportional to the duty-cycle [23, 55, 56]. This concept is illustrated in Figure 11, $\alpha_x$ is the duty-cycle from the control of cluster x. In this model (Figure 11), the semiconductors no longer appear but an electro-thermal model must nevertheless be provided. Consequently, an external cluster is introduced to estimate power losses. With these modifications, about 20 min are necessary to simulate the same operating condition with a
<figure><img src="image_13.png" /><figcaption>FIGURE 12 External cluster for power losses estimation</figcaption></figure>

desktop computer. This drastic reduction of the computation time is still not sufficient: for instance, it is not possible yet to simulate hundreds of operating conditions within a reasonable time. A sweep-through of various operating conditions cannot be considered at this stage.

## 3.5 | Implementation of the model under MATLAB

The main factor responsible for slowing down the calculations is the external cluster, because it sets small time-steps. The schematic of Figure 12 shows that the cluster can be expressed as a system of *N* independent equations since the arm current does not depend any more on the semiconductors' states thanks to the simplifications brought by the converter's averaged model. PLECS simulation software already exploits this concept and other features can be added:

Thermal and electrical variables can be grouped into matrices, in order to accelerate calculations.

PLECS simulation software generates additional time-steps between the regularly spaced sampling instants, defined by the sampling frequency *f*<sub>s</sub>. A fixed-step simulation avoids this but it has been observed that sorting operations are then not correctly handled.

A direct implementation under MATLAB, with equations and a fixed time-step, has been chosen to enhance the model's performance. Many functions have been rewritten and adapted to the characteristics of the system:

<figure><img src="image_14.png" /><figcaption>FIGURE 13 Flowchart describing the simulation of the converter at each time-step</figcaption></figure>

1. The calculation of cell voltages, which depends on the switching states provided by the sorting algorithm.

2. The calculation of the power losses, electrical variables from the state-space are used to realise bilinear and trilinear interpolations of the semiconductor's characteristics.

3. The update of the junction temperatures, thermal models can be expressed as first-order differential equations.

The new implementation of the model is outlined in Figure 13. At each iteration, calculations are made for a single time-step; the running order of blocks is predefined and does not vary during the simulation. With a desktop computer, 30 s are necessary to simulate the operation of one converter, for a given set of parameters: this is much faster than the averaged model with an external cluster presented in Figures 11 and 12, where 20 min were necessary to simulate the operation of one converter. Consequently this implementation under MATLAB allows a division of the computation time by a factor of 40 compared to the averaged model with an external cluster, due to the generalised use of matrix calculations for thermal and electrical domains, especially adapted to multilevel converters. In the meantime, the accuracy remains excellent: the relative error of power losses, junction temperatures and switching frequencies remains below 0.5%. These performances are appreciable because they allow the sweep-through of many operating conditions, the model provides the power losses and the junction temperatures of the 4*N* devices, and the *N* capacitor-voltages. Many studies can be performed, such as checking if a device or a pair of devices suits the operating conditions in terms of maximum junction temperature, depending on the maximum active and reactive
<table><caption>**TABLE 4** List of 4.5 kV asymmetric IGCTs and diodes sorted into their best-suited switching frequency; *f*<sub>sw</sub> is the switching frequency of the devices</caption><thead><tr><td>Part number</td><td>Designation</td><td>Best-suited f<sub>sw</sub></td></tr></thead><tbody><tr><td>5SHY 40L4511</td><td>IGCT 1</td><td>High</td></tr><tr><td>5SHY 35L4510</td><td>IGCT 2</td><td>Medium</td></tr><tr><td>5SHY 55L4500</td><td>IGCT 3</td><td>Low</td></tr><tr><td>5SHY 55L45xx</td><td>IGCT 4</td><td>Very low</td></tr><tr><td>5SDF 20L4520</td><td>Diode 1</td><td>Medium</td></tr><tr><td>5SDF 28L4520</td><td>Diode 2</td><td>Low</td></tr></tbody></table>

powers and the minimum AC grid voltage. For system optimisation, various parameters such as the water flow-rate of the cooling system, or the cooling-water temperature, can be modified. In the next section, this model will be used to compare different semiconductor devices, for the case study defined in 2.

## 4 | RESULTS AT CONSTANT VOLTAGE V<sub>DC</sub>, INFLUENCE OF THE NUMBER OF CELLS

In the following presentation of results, IGCT part numbers are replaced by the designations of Table 4. Since devices with low on-states have high switching losses, devices of Table 4 are sorted according to their frequency capabilities: the device with the highest number is best suited for low frequency operation, i.e. it has the lowest on-state losses of the available devices and the device with the lowest number is better suited for high switching frequency. This allows the comparison of similar semiconductors with identical voltage ratings, to study the consequences of different trade-offs between on-state losses and switching losses. This concept is developed in [57]: it is directly linked with the technology curve of the devices; IGCTs with different properties are obtained depending on the irradiation level used for carrier life-time control. Consequently “high” designates devices with a high irradiation, “medium” corresponds to a moderate irradiation level and “very low” is equivalent to an un-irradiated device. This compromise is particularly interesting to study, since it leads to an optimisation of the converter’s efficiency without modifying either the topology or the control of the converter itself.

### 4.1 | 4.5 kV asymmetric devices

Figure 14 shows the total power losses of the two converter-stations for the 4.5 kV asymmetric devices of Table 4, with $N = 256$ cells according to the approach described in Table 1. For each device, power losses have been divided into two parts to visualise the difference between rectifier operation and inverter operation. Power losses due to the clamp-circuit, more precisely in resistor $R_{cl}$, have been added to the diode’s power losses since they depend on the diodes’ safe operating area. For each device, one simulation is performed to obtain the behaviour of one

<figure><img src="image_15.png" /><figcaption>**FIGURE 14** Total power losses of the two converter-stations for the given wind-speed distribution of Figure 4, for 4.5 kV asymmetric devices with $V_{DC} = \pm 320$ kV</figcaption></figure>

<table><caption>**TABLE 5** List of 9 kV asymmetric IGCTs and diodes sorted into their best-suited switching frequency; $f_{sw}$ designates the switching frequency of the devices</caption><thead><tr><td>Part number</td><td>Designation</td><td>Best-suited f<sub>sw</sub></td></tr></thead><tbody><tr><td>5SHY 17L9000</td><td>IGCT 1</td><td>Medium</td></tr><tr><td>5SHY 17L90xx</td><td>IGCT 2</td><td>Very low</td></tr><tr><td>5SDF xL9000</td><td>Diode 1</td><td>Medium</td></tr><tr><td>5SDF xL90xx</td><td>Diode 2</td><td>Very low</td></tr></tbody></table>

converter of the HVDC link, for a given wind-speed: a second simulation is mandatory to calculate the power losses of the other converter of the HVDC link. Simulations have to be run for each wind-speed given by the distribution of Figure 4: in terms of transmitted power it corresponds to 20 operating conditions as shown in Figure 5. For the two converters, 40 operating conditions have been simulated for each pair of devices. Firstly, it can be seen that Diode 2 reduces power losses, i.e. a diode optimised for low frequency operation is more suitable. This result is mainly due to the rectifier operation, where the duty-cycle associated with the lower diodes $D_2$ is close to 1. Moreover, it is observed that power losses drop for IGCTs from 1 to 3, whereas this trend reverses for IGCT 4 where they increase. It implies that IGCT 3 offers the best trade-off between on-state losses and switching losses for grid connection of offshore wind-farms, with the aforementioned specifications. The best pair of 4.5 kV asymmetric devices leads to a 3.02 MW power loss for the two converter-stations of the HVDC link, i.e. 0.645% of the average generated power.

### 4.2 | 9 kV asymmetric devices

Figure 15 shows the power losses of the two converter-stations for the 9 kV asymmetric devices of Table 5, with $N = 128$ cells. An increase in power losses is observed, compared to the previous case: the best pair of asymmetric devices, IGCT 2 and Diode 2, leads to a 3.12 MW power loss (0.667% of the generated power). Further points must be considered before drawing conclusions about 9 kV asymmetric devices, especially the converter’s total cost, due to the reduced number of cells.
<figure><img src="image_16.png" /><figcaption>**FIGURE 15** Total power losses of the two converter-stations for the given wind-speed distribution of Figure 4 with 9 kV asymmetric devices for $V_{DC} = \pm 320$ kV</figcaption></figure>

<table><caption>**TABLE 6** List of 4.5 kV reverse-conducting IGCTs sorted into their best-suited switching frequency; $f_{sw}$ designates the switching frequency of the devices</caption><thead><tr><th>Part number</th><th>Designation</th><th>Best-suited f<sub>sw</sub></th></tr></thead><tbody><tr><td>5SHX 36L4520</td><td>RC-IGCT 1</td><td>Medium</td></tr><tr><td>5SHX 35L4521</td><td>RC-IGCT 2</td><td>Low</td></tr></tbody></table>

## 4.3 | 4.5 kV reverse-conducting devices

The power losses of the two 4.5 kV RC-IGCTs of Table 6 are higher than those of the two asymmetric 4.5 and 9 kV devices. Total power loss is 3.60 MW for RC-IGCT 1 and 3.22 MW for RC-IGCT 2. Once again, additional criteria must be considered such as the reduction of the number of cold plates per cell and the reduction of the cooling system's water flow, leading to a reduction of volume and lower converter production costs.

## 4.4 | 6.5 kV reverse-conducting device - influence of the di/dt snubber

Figure 16 shows the power losses of 6.5 kV RC-IGCT type 5SHX 22L6521, where the di/dt snubber $L_{cl}$ takes three different values. It is observed that the rise in $L_{cl}$ reduces the diode power losses, because the reduced diode commutation di/dt reduces the reverse-recovery losses. Nevertheless, this reduction is mitigated by the rise in the power losses due to the clamp circuit itself because of the increase in stored energy in $L_{cl}$. This trade-off leads to a rise in total power losses, when $L_{cl}$ is multiplied by two, power losses are increased by 137 kW for the two converter-stations. Such an evolution is observed for all the aforementioned devices: the lowest value of $L_{cl}$ systematically leads to the highest efficiency. Other considerations related to $L_{cl}$ include:

<figure><img src="image_17.png" /><figcaption>**FIGURE 16** Total power losses of the two converter-stations for the given wind-speed distribution of Figure 4, 6.5 kV reverse-conducting device 5SHX 22L6521 with different values of $L_{cl}$ for $V_{DC} = \pm 320$ kV</figcaption></figure>

<table><caption>**TABLE 7** Power losses and maximum junction temperatures of semiconductors for asymmetric and reverse-conducting models, and different voltage ratings, $V_{DC} = \pm 320$ kV</caption><thead><tr><th rowspan="2">Type</th><th rowspan="2">N</th><th colspan="2">Losses</th><th rowspan="2">η(%)<br>rectifier</th><th rowspan="2">η(%)<br>inverter</th><th rowspan="2">T<sub>Tj</sub><br>max.</th><th rowspan="2">T<sub>Dj</sub><br>max.</th></tr><tr><th>MW</th><th>μ</th></tr></thead><tbody><tr><td>A 4.5 kV</td><td>256</td><td>3.02</td><td>99.66</td><td>99.68</td><td>79 °C</td><td>79 °C</td></tr><tr><td>A 9 kV</td><td>128</td><td>3.12</td><td>99.64</td><td>99.68</td><td>104 °C</td><td>112 °C</td></tr><tr><td>RC 4.5 kV</td><td>256</td><td>3.22</td><td>99.63</td><td>99.67</td><td>86 °C</td><td>93 °C</td></tr><tr><td>RC 6.5 kV</td><td>178</td><td>3.10</td><td>99.65</td><td>99.68</td><td>99 °C</td><td>103 °C</td></tr></tbody></table>

$L_{cl}$ aims at keeping commutation di/dt within the diodes rating. The increase in cell voltage requires a higher inductance, for the same di/dt rating. Therefore, the use of semiconductors with higher voltage ratings increases the physical volume of the cell, as do the higher insulation requirements.

An increase in the di/dt at diode turn-off would allow a reduction of the inductor's size and improve the converter's efficiency but this would require diodes with higher SOA.

In terms of power losses, the 6.5 kV RC-IGCT with $L_{cl} = 6 \mu H$ leads to a 3.10 MW power loss for the two converters (0.662% of the average generated power); this result is especially promising because this device provides a higher efficiency than the 9 kV asymmetric and 4.5 kV RC-IGCTs.

## 4.5 | Summary for constant voltage $V_{DC} = \pm 320$ kV

Table 7 summarises the previous results and the maximum junction temperatures in the two converter-stations for IGCTs ($T_{Tj}$)
and diodes ($T_{Dj}$). For each case, only data related to the best pair of semiconductors is reported. Maximum junction temperatures $T_{Tj}$ max. and $T_{Dj}$ max. are taken at maximum power during rectifier operation for diodes and during inverter operation for IGCTs. The maximum junction temperature corresponds to the maximum temperature among the 2N junction temperatures in a cluster (two IGCTs and two diodes per cell): it is not an average junction temperature, which cannot be used to define the thermal limit of the converters. The efficiency, given for MMC 1 operating as a rectifier and for MMC 2, operating as an inverter, is presented in Figure 3: it is calculated with the semiconductor power losses, averaged over a long period of operation, and the average power production calculated in Section 2.4.2. It can be observed that junction temperatures per device increase with the voltage rating: maximum junction temperatures for 9 kV asymmetric devices exceed 100°C, whereas maximum junction temperatures for 4.5 kV asymmetric devices remain below 80 °C. It points out that 4.5 kV asymmetric devices are oversized in terms of current rating, the difference between the ambient temperature and the junction temperature does not exceed 22 °C at full power. This over-sizing can be counterbalanced by a reduction of the cooling system's water flow rate. It can be concluded that because of its higher power density, the reduction of levels it offers and its performances, the 6.5 kV RC-IGCT seems to be the best trade-off for this application.

## 5 | RESULTS AT CONSTANT NUMBER OF CELLS N, INFLUENCE OF THE VOLTAGE $V_{DC}$

In this study, we keep the number of levels constant at 256 but with higher voltage devices while keeping system power constant and allowing system voltage to increase. It should be noted that the results of the first study, using 4.5 kV devices, remain unchanged. As mentioned in Section 2.2, the number of cells is set to $N = 256$ whereas the voltage $V_{DC}$ increases with the semiconductors' voltage rating.

### 5.1 | 9 kV asymmetric devices

Figure 17 illustrates the reduction in losses due to the higher system voltage $V_{DC}$: compared to Figure 15, power losses have dropped by 14.6% for the pair IGCT 2/Diode 2 despite the doubling of the number of devices in the converters. The reduction of the current amplitudes has a consequence: from now on Diode 1 has better performance than Diode 2, contrary to the results of the first study. This is logical since it can be seen in Figure 15 that both diodes had similar performances in the first study and the reduction of currents favours the diode optimised for high frequency operation (i.e. Diode 2). Secondly, it is shown that the use of semiconductors with higher voltage ratings is an attractive solution for increasing the total voltage $V_{DC}$: efficiency is enhanced for the same number of cells in the converters, which means that material and assembly costs are only slightly affected.

<figure><img src="image_18.png" /><figcaption>FIGURE 17 Power losses of the two converter-stations for the given wind-speed distribution of Figure 4, using 9 kV asymmetric devices with $N = 256$</figcaption></figure>

<table><caption>TABLE 8 Power losses and maximum junction temperatures of semiconductors for asymmetric and reverse-conducting models and different voltage ratings, $N = 256$</caption><thead><tr><th>Type</th><th>V<sub>DC</sub><br>kV</th><th>Losses<br>MW</th><th>η(%)<br>rectifier</th><th>η(%)<br>inverter</th><th>T<sub>Tj</sub><br>max.</th><th>T<sub>Dj</sub><br>max.</th></tr></thead><tbody><tr><td>A 4.5 kV</td><td>±320</td><td>3.02</td><td>99.66</td><td>99.68</td><td>79 °C</td><td>79 °C</td></tr><tr><td>A 9 kαV</td><td>±640</td><td>2.56</td><td>99.64</td><td>99.80</td><td>76 °C</td><td>83 °C</td></tr><tr><td>RC 6.5 kV</td><td>±461</td><td>2.86</td><td>99.67</td><td>99.70</td><td>84 °C</td><td>87 °C</td></tr></tbody></table>

### 5.2 | 6.5 kV reverse-conducting device

In Table 8, below, the 6.5 kV RC-IGCT has power losses equal to 2.86 MW for the two converter-stations, i.e. 0.612% of the generated power; thus, compared to Table 7, the efficiency improves due to the lower current and the resulting lower junction temperature.

### 5.3 | Summary for constant number of cells ($N = 256$)

Table 8 summarises the results of the second comparative study: the increased voltage $V_{DC}$ for a constant number of levels, clearly favours the 9 kV device.

## 6 | CONCLUSION

This work has considered HVDC links from two aspects:

* The design of the converter whereby the electrical and thermal variables of every cell are accessible; these variables being paramount to properly sizing the converter;
* A more holistic approach whereby the intermittent nature of offshore wind is taken into account to define the distribution of operating conditions and their importance in the calculation of power losses.

This comparative study has relied on an accurate electro-thermal model, based on measurements on the semiconductor. Starting from a model running under a standard simulation software, PLECS, a model 40 times faster has been elaborated with MATLAB. Its relative error remains inferior to 0.5 %, which makes it perfectly valid to calculate power losses and junction temperatures. The proposed method considers the influence of the modulation strategy, it especially applies to the case of nearest-level control. The first comparative study has shown that devices have similar power losses for a given voltage $V_{DC}$, the overall efficiency obtained with the asymmetric 4.5 kV devices, the asymmetric 9 kV devices and the reverse-conducting 6.5 kV devices evolves in a range of 0.02%. It makes the 6.5 kV RC-IGCT particularly interesting because of the reduced manufacturing costs it potentially offers. Besides the very same device operates at a junction temperature below 103 °C for a maximum admissible junction temperature of 140 °C, which shows a significant potential for future applications, with higher power ratings. The second comparative study, proposing designs with DC link voltages of up to $V_{DC} = \pm 640$ kV, shows that the high voltage ratings of IGCTs lead to a significant increase in the system efficiency, up to 0.1% with the asymmetric 9 kV devices compared to the asymmetric 4.5 kV devices. This approach and these results allow easier cost analysis from which CAPEX and operating expenditure (OPEX) can be derived. With a switching frequency below 110 Hz it has been demonstrated that optimal devices presently exist within the current range of IGCTs, the modular multilevel converter allows a reduction in switching frequency which is sufficiently important to favour the use of thyristor-like devices.

The development considering IGCT markets and applications goes towards higher power, optimised design, higher voltage rating and higher current through large size devices. Power transmission and quality application trend goes toward lower losses and more power. Losses reduction will be reached by improving IGCT design applying new technologies, i.e. technology trade-off improvements thanks to new diode feature applying a structured cathode design along with modified anode profile. The booming off-shore wind turbine market requires significantly increased power ratings. High-power wind turbines are an important trend in the wind industry, as they help to improve profitability. IGCT technology improves the efficiency and reliability of the wind converter significantly, enabling operators of medium voltage converters to reach the lowest levelised cost of energy and highest return on capital. Further converter optimisation and modularisation is possible with a 10 kV high-voltage device platform. One of the first application driving IGCT technology since more than two decades is medium voltage drives (MVD). The trend in MVD goes towards cost optimisation, standardisation and modularisation. Improved IGCT performance and turn-off current allow to increase power rat-

ing by keeping actual converter footprint, or reduce cost significantly for the same power rating.

## ORCID

Davin Guedon https://orcid.org/0000-0002-4421-4970

Philippe Ladoux https://orcid.org/0000-0002-2697-8707

Thomas Stiasny https://orcid.org/0000-0002-6770-0525

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**How to cite this article:** Guedon, D., et al.: Selection of an IGCT for multilevel converters dedicated to high-voltage direct current grid connection of offshore wind-farms. IET Power Electron. 14, 1779–1791 (2021).
https://doi.org/10.1049/pe12.12145