Power efficiency in switched common source class-E amplifiers is usually obtained at the expense of device stress. Device stacking is a viable way to reduce voltage drops across a single device, improving long-term reliability. In this paper, we focus on cascode-based topologies, analyzing the loss mechanisms and giving direction to optimize the design. In particular, a new dissipative mechanism, peculiar of the cascode implementation, is identified and a circuit solution to minimize its effect is proposed. Prototypes, realized in a 0.13-mu m CMOS technology demonstrate 67% PAE while delivering 23 dBm peak power at 1.7 GHz. Good bandwidth was also realized with greater than 60% PAE over the frequency range of 1.4-2 GHz.

Analysis of Reliability and Power Efficiency in Cascode Class-E PAs / Mazzanti, Andrea; Larcher, Luca; R., Brama; F., Svelto. - In: IEEE JOURNAL OF SOLID-STATE CIRCUITS. - ISSN 0018-9200. - STAMPA. - 41:5(2006), pp. 1222-1229. [10.1109/JSSC.2006.872734]

### Analysis of Reliability and Power Efficiency in Cascode Class-E PAs

### MAZZANTI, Andrea;LARCHER, Luca;R. BRAMA;F. SVELTO

### 2006

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