# Enhanced Current-Limiting Strategy of Grid-Forming Converter Considering Grid-forming Capability

Junyeol Maeng, Shenghui Cui

► To cite this version:

Junyeol Maeng, Shenghui Cui. Enhanced Current-Limiting Strategy of Grid-Forming Converter Considering Grid-forming Capability. The 26th European Conference on Power Electronics and Applications, GDR SEEDS France & EPE Association, Mar 2025, Paris, France. 10.34746/epe2025-0167. hal-05108344

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# Enhanced Current-Limiting Strategy of Grid-Forming Converter
Considering Grid-forming Capability

Junyeol Maeng and Shenghui Cui

Department of Electrical and Computer Engineering, Seoul National University

1 Gwanak-ro, Gwanak-gu, Seoul 08826

Seoul, Korea

E-Mail: junyul7@snu.ac.kr, cuish@snu.ac.kr

## ACKNOWLEDGMENT

This work was supported by the Korea Institute of Energy Technology Evaluation and Planning (KETEP) through grants funded by the Korean government (MOTIE) under Grant 20224000000160 (DC Grid Energy Innovation Research Center) and Grant RS-2023-00233148 (Development of Grid-Forming Topology and Inverter Core Technology for Grid Access to Distributed Energy Resources).

*Index Terms*—Grid-forming converter, Fault ride-through, Overcurrent protection, Ancillary services, Virtual impedance.

*Abstract*—Recently, Grid-forming (GFM) converters have gained significant attention for their ability to enhance power system stability during disturbances. However, conventional current-limiting strategies lack sufficient consideration for preserving GFM capability under current-limited conditions. To address this issue, this paper proposes a novel current-limiting strategy that simultaneously ensures accurate current limitation and preserves GFM capability. The proposed method minimizes deviations in the converter terminal voltage by incorporating a PCC voltage-based current-limiting condition in real time. This approach allows the GFM converter to preserve its natural response-driven GFM capability to the greatest extent possible within a given current limit. Experimental results validate the superior performance of the proposed method compared to existing methods.

## I. INTRODUCTION

With the development of renewable energy technologies, the number of inverter-based resources (IBRs) integrated into power systems has increased, gradually replacing conventional synchronous generators [1]. Unfortunately, this shift weakens the stability of the power systems, which has traditionally relied on the substantial

inertial energy provided by synchronous generators [2]. To address this challenge, grid-forming (GFM) converters, designed to emulate the external characteristics of synchronous generators, have garnered significant attention from industry and transmission system operators (TSOs) [3]–[5]. According to the latest draft of the grid code, GFM converters are required to deliver additional active power, termed ‘active inertia power’ in [4] to provide synthetic inertia during grid frequency drops. Additionally, further requirements have been widely discussed, such as active power output to counter phase-angle jump disturbances (referred to as ‘active phase-jump power’ in [4]) and fault reactive current injection in response to grid voltage magnitude variations [5]. In [6], the ability of an IBR to provide grid services for the stabilization of a power system is defined as GFM capability, which is also adopted in this paper.

Since the GFM converter operates as a voltage source, similar to synchronous generators, it inherently faces the risk of overcurrent during grid disturbances [7]. However, it is crucial to limit overcurrent because the power semiconductor devices within converters have a much lower tolerance for overcurrent compared to synchronous generators [8]. Therefore, when operating a GFM converter, both maintaining GFM capability and limiting overcurrent need to be carefully considered simultaneously. Further research is required to determine how to maintain the maximum GFM capability while ensuring the output current remains within defined limits.

The GFM converter can be modeled as an internal voltage source (IVS) behind a series impedance [9]. Under normal operating conditions, the IVS determined by the GFM control is directly applied at the converter output terminal. During grid disturbances, however, the IVS must be adjusted to limit output current. For clarity, this paper refers to the difference between the IVS and the actual output terminal voltage as the terminal voltage
variation. Research presented in [10] highlights that preserving the natural response of the GFM control under current-limiting conditions is crucial for maintaining GFM capability. From this perspective, minimizing the terminal voltage variation is essential to ensure the GFM capability.

Numerous current-limiting strategies have been developed to manage the output current of GFM converters during grid disturbances. Among these, the circular current limiter method, which employs a current controller to directly limit the current reference, and the virtual impedance method, which introduces additional impedance between the IVS and the output terminal voltage, are widely employed [11]–[14]. Both methods can effectively restrict the output current under grid disturbances. However, they have limitations in providing GFM capability, as they do not account for the magnitude of terminal voltage variation. In [10], a method to determine the X/R ratio of the virtual impedance to reduce terminal voltage variation is proposed. However, this approach assumes that the grid impedance is predominantly inductive, which limits its applicability and leaves room for further improvement. The following section explores the limitations of existing methods, focusing on their impact on GFM capability.

This paper presents a novel current-limiting strategy designed to maximize GFM capability while strictly adhering to current limits. Firstly, the conditions required for the terminal voltage to satisfy the current limit are derived based on the point-of-common-coupling (PCC) voltage and the output filter impedance. These current-limiting conditions rely solely on measured variables, thereby eliminating the need for assumptions about grid-side information. Next, the optimal terminal voltage reference and virtual impedance value, which minimize terminal voltage variation while satisfying the derived current-limiting conditions, are computed. Notably, the proposed method is implemented numerically and in real time, without introducing complex optimization problems or significant computational burdens. As a result, the proposed method preserves as much of the natural response of the GFM control as possible, effectively maximizing GFM capability while maintaining precise current limits.

## II. GFM CAPABILITY AND CURRENT LIMITATION

### A. System Description

Fig.1 illustrates the generalized control block diagram of the GFM converter. The GFM converter is connected to the grid through an LC filter, where $Z_g$ denotes the grid impedance. $V_{PCC}$ and $I_{PCC}$ represent

<figure><img src="image_2.png" /><figcaption>Fig. 1: Control block diagram of GFM converter with current-limiting control.</figcaption></figure>

<figure><img src="image_3.png" /><figcaption>Fig. 2: Equivalent circuit modeling of GFM converter.</figcaption></figure>

the PCC voltage and current, respectively, while $P$ and $Q$ stand for the output active- and reactive-power. The GFM control regulates the grid-connected converter as the IVS behind a series impedance.

In the outer loop, the active power control (APC) synchronizes the converter to the grid by adjusting the IVS phase angle, mimicking the swing equation of a synchronous generator. Additionally, the reactive power control (RPC) determines the magnitude of the IVS, $|E|$, based on a simple droop structure. In the inner loop, an active damping resistor $R_{ad}$, combined with a high-pass filter $G_{HPF}$, is employed to mitigate synchronous resonance induced by the power control [15]. The IVS, as determined by the GFM control, is denoted as $E_{ref,dq}$. Finally, $E_{ref,dq}$ is adjusted by the current-limiting control (CLC) to determine the terminal voltage, $V_{t,ref}$.

### B. GFM Capability under Current Limitation

If the current limitation is not triggered, $V_{t,ref}$ is equal to $E_{ref,dq}$. However, when the current limitation is triggered, $E_{ref,dq}$ is modified to limit the magnitude of the output current, resulting in a voltage drop from the original IVS. This means that the CLC can be modeled as a virtual impedance in series with the IVS, as shown in Fig.2. Here, $Z_v$ represents the variable virtual impedance, and $Z_f$ is the impedance of the output filter.

Fig.3 is a phasor diagram that illustrates the behavior of the GFM converter under current limitation. The dotted circles indicate the maximum operating range of the terminal voltage, within which the output current
<figure><img src="image_4.png" /><figcaption>Fig. 3: Phasor diagram illustrating GFM converter behavior under grid disturbances.</figcaption></figure>

does not exceed the limit $I_{max}$. During normal operation, the IVS phasor is located within the dotted circles, allowing it to be directly synthesized ($E = V_t$). The IVS phasor of the converter exhibits a slow dynamic characteristic due to the inertia emulation of the power control [16]. Therefore, if a disturbance occurs that changes the phasor of the grid voltage from $V_{grid}$ to $V'_{grid}$, the IVS of the converter $E$ immediately exceeds the limit. Thus, the CLC introduces a virtual impedance to generate an additional voltage drop, thereby modifying the terminal voltage from $V_t$ to $V'_t$. This adjustment ensures compliance with the revised current limiting condition, which is depicted as the black dotted circle.

In practice, synchronous generators naturally counteract grid disturbances through their substantial rotational inertia. Similarly, GFM control emulates inertia through the APC, enabling the IVS to exhibit slow dynamics. This characteristic allows the GFM converters to provide adequate grid services under grid disturbances. However, from the perspective of current limitation, the IVS must respond rapidly to adjust the terminal voltage, ensuring it remains within the maximum allowable operating range, as depicted in Fig.3. This requirement introduces a trade-off between current limitation and the GFM capability in terms of the IVS dynamics. To address this trade-off, a careful adjustment of the terminal voltage is necessary. Specifically, the terminal voltage must satisfy the current limiting conditions while preserving the natural response characteristics of the GFM converter to the greatest extent possible.

In this context, minimizing the terminal voltage variation, defined as the difference between the actual synthesized terminal voltage $V'_t$ and the original IVS $E$, is critical. Also, analytical proofs and experimental results presented in [10] demonstrate that reducing terminal voltage variation enhances the GFM capability of converters. For example, in Fig.3, $V'_t$ is selected to minimize terminal voltage variation while adhering to the

<figure><img src="image_5.png" /><figcaption>Fig. 4: Existing current-limiting control (a) circular current limiter (b) virtual impedance.</figcaption></figure>

current limit. To achieve this, $V'_t$ must lie on a straight line connecting $E$ and $V_t$. In other words, the voltage drop caused by the virtual impedance must be aligned with the voltage drop resulting from the combined filter and grid impedance. Consequently, aligning the phase angle of the virtual impedance $Z_v$ with the phase angle of the combined filter and grid impedance ($Z_f + Z_g$) constitutes a sufficient condition for minimizing terminal voltage variation.

### C. Existing Current-limiting Control Methods

As discussed earlier, in terms of GFM capability, it is preferable to design the virtual impedance to match the phase angle of the filter and grid impedance. Therefore, two commonly used current limiting methods are reviewed in this subsection in terms of the phase angle of the virtual impedance. Firstly, the circular current limiter in Fig.4a introduces a current controller into the inner loop and directly limits the current reference, as shown in (1). Here, $K$ is the coefficient for restricting the magnitude of current reference, while its phase angle is kept unchanged.

$$I_{\text{ref,dq}} = K i_{\text{ref,org}}, \quad K = \min\{1, I_{\text{max}}/|i_{\text{ref,org}}|\} \quad (1)$$

However, the circular current limiter is equivalent to introducing an adaptive virtual resistor [17]. This makes it difficult to match the phase angle of the virtual impedance to typical inductive filter and grid. Consequently, circular current limiters are unlikely to provide adequate GFM capability during disturbances.

Instead, a direct approach is employed to introduce a virtual impedance for current limiting, as shown in Fig.4b. Here, $\sigma$ represents the X/R ratio, $K_{VI}$ is a proportional constant and $I_{th}$ denotes the threshold value.

$$X_v = \sigma R_v, \quad R_v = \begin{cases} 0 & |I_{\text{PCC}}| < I_{\text{th}} \\ K_{\text{VI}}(|I_{\text{PCC}}| - I_{\text{th}}) & |I_{\text{PCC}}| \geq I_{\text{th}} \end{cases} \quad (2)$$
<figure><img src="image_6.png" /><figcaption>Fig. 5: Comparison of terminal voltage reference depending on virtual impedance magnitude.</figcaption></figure>

### III. PROPOSED CURRENT-LIMITING STRATEGY

#### A. Drawbacks of Existing Methods

When operating a GFM converter, only the PCC voltage is measured, implying that the magnitude and phase angle of the actual grid voltage remain unknown. Therefore, the maximum operating range shown in Fig.3 is a conceptual boundary that cannot be directly calculated. As a result, existing methods do not explicitly determine the optimal virtual impedance to minimize terminal voltage variation. Instead, they employ an indirect approach by matching the phase angle of the virtual impedance. However, accurately estimating the phase angle of the actual grid impedance presents significant challenges. To address this, existing methods typically assume an inductive grid and adopt an X/R ratio within the range of 5 to 10 [18].

In addition, existing methods do not account for the effect of the magnitude of the virtual impedance. In (2), the magnitude of the virtual impedance is determined to be proportional to the output current magnitude, and the voltage drop across the virtual impedance, which determines the actual current magnitude is not considered. Fig.5 compares the difference in actual terminal voltage as a function of the virtual impedance magnitude, where the phase angle of the virtual impedance matches the phase angle of the filter and grid impedance. Firstly, if the magnitude of the virtual impedance is smaller than the optimal value, sufficient GFM capability is provided, but the output current exceed the limit. Conversely, if the virtual impedance magnitude is larger than the optimal value, it overly restricts the current and interferes with the provision of GFM capability. Consequently, the magnitude of the virtual impedance must also be carefully designed for CLC.

#### B. Operation Principle of Proposed Method

As discussed earlier, existing methods face challenges in maximizing GFM capability while simultaneously ensuring accurate current limitation. To address this issue, this paper proposes a novel current-limiting

<figure><img src="image_7.png" /><figcaption>Fig. 6: Phasor diagram of GFM converter with PCC voltage-based current limiting conditions.</figcaption></figure>

strategy. Fig.6 provides a detailed phasor diagram of Fig.3, with a focus on the PCC voltage. The voltage difference between the grid and the converter terminal can be divided into two components: the voltage difference between the grid and the PCC, and the voltage difference between the PCC and the terminal. From this decomposition, it becomes evident that the conventional current-limiting condition (red dotted circle) is the superposition of the limiting condition for the PCC voltage (green dotted circle) and the limiting condition for the terminal voltage (blue dotted circle). Among these, calculating the limiting conditions from the grid voltage requires both the magnitude of the grid impedance and its phase angle information. However, the voltage difference between the PCC and the terminal can be accurately calculated if the output filter impedance is known, as it can be designed manually. Based on this insight, the proposed method utilizes the PCC voltage as the reference to determine the maximum operating range of the terminal voltage and redefines the current-limiting condition as follows:

$$|V'_{t} - V_{\text{PCC}}| = |Z_{f}|I_{\text{max}}. \quad (3)$$

Secondly, the optimal terminal voltage reference, which minimizes terminal voltage variation, is calculated. Specifically, the newly defined current-limiting condition is compared with the position of the IVS phasor E to determine the terminal voltage reference $V'_{t,prop}$, as described follows:

$$V'_{t,prop} = V_{\text{PCC}} + \min(1, \frac{|Z_{f}|I_{\text{max}}}{|E - V_{\text{PCC}}|})(E - V_{\text{PCC}}). \quad (4)$$

Since the current-limiting condition, IVS phasor E, PCC voltage $V_{\text{pcc}}$, and filter impedance $Z_{f}$ are all specified, (4) can be computed numerically in real time. Finally, the optimal virtual impedance value $Z_{v,prop}$ required to synthesize the calculated terminal voltage reference can be determined as follows:
<figure><img src="image_8.png" /><figcaption>Fig. 7: Operational sequence diagram of the proposed method.</figcaption></figure>

$$Z_{v,prop} = R_{v,prop} + jX_{v,prop} = (E - V'_{t,prop})/I_{PCC}. \quad (5)$$

The operational sequence of the proposed CLC is summarized in the flow diagram shown in Fig.7.

### C. Contributions

In contrast to existing methods, the proposed method can simultaneously determine the optimal magnitude and phase angle of the virtual impedance in real-time, based on the PCC voltage-based current-limiting condition. Notably, accurate current limitation is consistently maintained while preserving the concept of variable virtual impedance, which ensures the voltage source characteristics of the GFM converter are retained.

Furthermore, the proposed method minimizes terminal voltage variation under current-limiting conditions, thereby preserving the natural response of the GFM control to the greatest extent possible. As a result, the converter can provide maximum GFM capability while adhering to current limits.

Although the accurate measurement of filter impedance is required, the proposed method does not necessitate additional sensing variables or assumptions regarding grid-side impedance. Moreover, the CLC can be executed numerically without involving complex optimization problems or computational burdens.

Finally, the proposed method can be effectively applied to a variety of GFM control schemes and easily integrated with various fault ride-through strategies, including outer loop modifications.

<figure><img src="image_9.png" /><figcaption>Fig. 8: Photograph of the 3 kW GFM converter experimental system.</figcaption></figure>

<table><caption>TABLE I: Parameters of Experiment</caption><thead><tr><th>Symbol</th><th>Parameter</th><th>Nominal value</th></tr></thead><tbody><tr><td>P<sub>rated</sub></td><td>Rated Power</td><td>3 kW</td></tr><tr><td>V<sub>DC</sub></td><td>DC-link Voltage</td><td>400 V</td></tr><tr><td>V<sub>grid</sub></td><td>Grid Voltage</td><td>220 V<sub>ll,rms</sub></td></tr><tr><td>L<sub>f</sub></td><td>Filter Inductance</td><td>3.4 mH (7.8 %)</td></tr><tr><td>C<sub>f</sub></td><td>Filter Capacitance</td><td>10 μF (6.1 %)</td></tr><tr><td>SCR</td><td>Short Circuit Ratio</td><td>20 p.u.</td></tr><tr><td>f<sub>sw</sub></td><td>Switching Frequency</td><td>9 kHz</td></tr><tr><td>I<sub>max</sub></td><td>Current Limit</td><td>1.25 p.u.</td></tr></tbody></table>

## IV. EXPERIMENTAL RESULTS

### A. Experimental Setup

Experiments are performed to demonstrate the validity of the proposed CLC in comparison to existing methods. The experimental setup is depicted in Fig.8, and the system parameters are listed in Table I. Additionally, a grid emulator California Instruments MX30-3PI is used to realize various grid disturbances.

### B. Voltage Sag Disturbance

Fig.9 presents experimental results under a 0.5 p.u. voltage sag disturbance, demonstrating the post-fault performance improvement achieved by the proposed CLC. In Fig.9a, the output current is accurately limited by the circular current limiter. Still, this approach yields a diminished fault current, as arbitrary saturation of the current reference is performed without consideration of the GFM capability. In contrast, Fig.9b demonstrates that
<figure><img src="image_10.png" /><figcaption>(a)</figcaption></figure>

<figure><img src="image_11.png" /><figcaption>(b)</figcaption></figure>

<figure><img src="image_12.png" /><figcaption>(c)</figcaption></figure>

<figure><img src="image_13.png" /><figcaption>(d)</figcaption></figure>

Fig. 9: Performance comparison between (a) circular current limiter (b) virtual impedance and (c) proposed method under symmetrical voltage sag (0.5 p.u. for 500 ms), $P_{\text{ref}} = 1.0$ p.u..

a significant fault reactive current is injected when an inductive virtual impedance is applied, which provides a similar phase angle to the sum of the filter and grid impedance. However, the current response during the voltage sag exceeds the limit as a result of the application of a smaller virtual impedance than the optimal value.

The experimental results with the proposed method is depicted in Fig.9c, where the virtual impedance cal-

culation simultaneously considers both current limitation and GFM capability. This calculation allows the maintenance of the natural response of GFM control while accurately adhering to a given current limit. The differences between the existing method and the proposed method are further illustrated in Fig.9d, which provides a comparison of the reactive power response. The virtual impedance method enables the injection of greater reactive power than the proposed method, but only because the current limit is not respected. Nevertheless, it is evident that the proposed method delivers a higher reactive power response than the circular current limiter, thereby maintaining the maximum GFM capability while staying within the predefined current limit.

### C. Phase Angle Jump Disturbance

Fig.10 illustrates the experimental results under phase angle jump disturbance of -30°, with the objective of verifying the effectiveness of the proposed method regardless of the disturbance type. Firstly, similar to the previous results, the circular current limiter method in Fig.10a provides superior current limiting performance but does not provide additional active phase jump power to counteract the disturbance. Furthermore, the virtual impedance method poses challenges in accurately determining the magnitude of the virtual impedance, which impedes the ability to achieve precise current limitation as shown in Fig.10b. However, the proposed method in Fig.10c can inject the maximum active phase jump power it can deliver while performing accurate current limitation, except for the transient dc-bias overcurrent immediately after the disturbance occurs. Additionally, a detailed comparison of the active power response for each current-limiting method is depicted in Fig.10d.

## V. CONCLUSION

This paper proposes a novel current-limiting method to maximize grid-forming (GFM) capability under current-limiting conditions. The proposed method employs a real-time PCC voltage-based current-limiting condition to numerically calculate the optimal virtual impedance, preserving the natural response of GFM control as much as possible. Unlike traditional approaches, the proposed method simultaneously considers both the magnitude and phase angle of the variable virtual impedance to ensure accurate compliance with current limits. Additionally, it minimizes terminal voltage variation, enabling the provision of maximum GFM capability within a given current limit. Experimental validation demonstrates the effectiveness of the proposed method compared to existing strategies.
<figure><img src="image_14.png" /><figcaption>Fig. 10: Performance comparison between (a) circular current limiter (b) virtual impedance and (c) proposed method under -30° symmetrical phase angle jump, $P_{\text{ref}} = 0.5$ p.u..</figcaption></figure>

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