# Influence of Controller Parameters on Open-Circuit Fault Localization Time in Full-Bridge Modular Multilevel Converter

Miad Ahmadi, Aditya Shekhar, Pavol Bauer

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Miad Ahmadi, Aditya Shekhar, Pavol Bauer. Influence of Controller Parameters on Open-Circuit Fault Localization Time in Full-Bridge Modular Multilevel Converter. The 26th European Conference on Power Electronics and Applications, GDR SEEDS France & EPE Association, Mar 2025, Paris, France. 10.34746/epe2025-0113 . hal-05095954

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<figure><img src="image_1.png" /></figure>

Distributed under a Creative Commons Attribution 4.0 International License
Influence of Controller Parameters on Open-Circuit
Fault Localization Time in Full-Bridge Modular
Multilevel Converter

Miad Ahmadi, Aditya Shekhar, Pavol Bauer

Delft University of Technology

Mekelweg 5, 2628 CD

Delft, The Netherlands

M.Ahmadi-3@tudelft.nl, A.Shekhar@tudelft.nl, P.Bauer@tudelft.nl

*Abstract*—Modular Multilevel Converters (MMCs) have gained significant attention in academia and industry due to their versatility in various applications. MMCs are known for their high efficiency, superior harmonic performance, scalability, and modularity. However, their complexity in control, reliability issues, and many components present challenges. Numerous sub-module (SM) configurations have been proposed in the literature, each with advantages and disadvantages. The full-bridge (FB) configuration stands out for its robustness against DC link faults. Nevertheless, the FB SM containing four switches is susceptible to open-circuit failures (OCF). Few studies have explored such failures in FB MMCs. This paper investigates the impact of controller parameters on fault localization time in the event of an OCF in any of the four switches. The study uses two different modulation strategies, and the results are validated through simulation.

*Index Terms*—«Modular Multilevel Converter» «Faults» «Open Switch Fault» «Phase-Shift Mode» «Nearest Level Modulation».

# I. INTRODUCTION

The Modular Multilevel Converter (MMC) was first introduced in 2001 [1], offering notable advantages such as modularity, efficiency, superior harmonic performance, and scalability. MMCs have already been successfully applied in high-voltage (HV) systems, and this trend is extending to other applications, ranging from medium voltage (MV) to HV [2]–[4]. However, the extensive use of switches, capacitors, and other components in MMCs poses significant challenges [5]–[9].

Typically, MMCs can adopt either a full-bridge (FB) or half-bridge (HB) configuration. While the FB MMC has been less investigated in previous studies due to its higher cost than the HB MMC, its fault tolerance capability to DC link faults makes it an interesting topology. This is particularly relevant because DC breakers are not yet widely commercialized [10].

<figure><img src="image_2.png" /><figcaption>Fig. 1: MMC configuration with FBSM.</figcaption></figure>

A FB sub-module (SM) mainly comprises four power switches with their body diodes, a capacitor bank, and control and electronic circuitry, as shown in Fig. 1 [11]. As illustrated in Fig. 1, when these SM are connected in series, different voltage levels and power can be easily achieved, which forms the basis for the modularity and scalability concept. Some redundant SMs are used in these systems to enhance reliability [2]. Power switches and capacitor banks are the most vulnerable elements within the structure of an MMC, and they are the main focus of studies on reliability and fault-tolerant operation. Power switches, mostly based on IGBT technology,
can experience open-circuit and short-circuit faults. Short-circuit failures are particularly destructive because they cause the capacitor to be shorted, and therefore, SMs are built in explosion-proof housing [12]. Additionally, gate drivers are equipped with short-circuit detection algorithms and protection circuitry to ensure a fast response [7], [10]. On the other hand, open-circuit failures (OCFs) in power switches are not as destructive as short-circuit failures. They can be tolerated if detection and localization are performed quickly enough [1], [3]–[5], [8], [10], [13]–[18].

Detection and localization of faults in MMCs can be implemented through hardware modifications and software models. As referenced in [19]–[22], hardware-based fault detection methods are often not cost-efficient due to the need for additional components and increased control complexity. On the other hand, software-based models have been extensively studied in the literature. These models are primarily based on sliding mode observers and Kalman filters, offering a more cost-effective fault detection and localization solution [23]–[25].

There is extensive literature focusing on fault detection and localization in HB MMCs. For instance, in [1], a state observer detects and localizes faults. In [3], a comprehensive algorithm for fault diagnosis, fault detection, fault tolerance, and fault localization using redundancy is presented, where a state observer is applied for fault detection. In [4], a rotating sliding mode observer is proposed to tolerate faults by implementing hot reserve redundancy. The authors in [15] also propose a method to detect and tolerate OCF in MMCs under light load conditions, which involves hardware modifications.

In [22], a hardware-based system is proposed to detect and rectify OCFs in MMCs operating with nearest-level mode (NLM) modulation. The authors in [7] propose fault detection and localization for MMCs operating in both inverter and rectifier modes. In [8], a method for detecting and localizing OCFs is based on the differences in SMs capacitor voltages. Additionally, the authors in [26] propose a ring theorem strategy to detect and localize faults, which offers the advantage of fast performance.

<table><caption>TABLE I: COMMERCially AVAILABLE MMC TECHNOLOGIES</caption><thead><tr><td>Manufacturer</td><td>Product Name</td><td>SM topology</td></tr></thead><tbody><tr><td>Siemens</td><td>HVDC Plus</td><td>HB/FB</td></tr><tr><td>GE/Alstom</td><td>HVDC MaxSine</td><td>HB/FB</td></tr><tr><td>ABB</td><td>HVDC Light</td><td>HB</td></tr><tr><td>CEPRI</td><td>HVDC Flexible</td><td>HB</td></tr></tbody></table>

All the aforementioned fault detection and localization methods pertain to HB MMCs. However, when writing this study, only two references address OCFs in FB MMCs [10], [14]. Despite this, FB MMCs are commercially available, as given in Table I, and are investigated in this paper. This study uses phase-shift modulation (PSC) and NLM strategies to evaluate the behavior of FB MMCs in the event of OCFs in all four operating switches. Additionally, the impact of the

controller's parameters on the localization time of faults is examined in greater detail.

The rest of the paper is organized as follows: Section II discusses the system description and the operational behavior of the MMC under normal and OCF conditions. Section III presents the simulation results for two modulation strategies. Section IV evaluates the impact of the controller parameters on the localization time of faulty SM. Finally, the paper is concluded in Section V.

## II. SYSTEM DESCRIPTION AND OPERATION PRINCIPLE

The configuration of the MMC with FB SMs is presented in Fig. 1, where each SM contains four power switches with body diodes. The operation of the SM under normal and OCF conditions is detailed as follows, assuming that short-circuit faults are not considered and the converter is operating in inverter mode.

### A. Normal Operation

Based on the current direction, the SM can be inserted or bypassed during normal operation. The SM can generate $+V_{cap}$, $-V_{cap}$, or 0 depending on the system condition, where $-V_{cap}$ is only used for clearing DC link faults. To bypass the SM, $+V_{sm}$ is set to 0. Two switching patterns can be adapted for reliability reasons and to distribute failures equally among the switches. Each switching pattern alternates to ensure even wear on the components. Table II and its corresponding figure summarize the operating conditions of the SM during normal operation.

<table><caption>TABLE II: CURRENT PATH, SM'S OUTPUT VOLTAGE UNDER NORMAL OPERATION.</caption><thead><tr><th></th><th>Inserted, (a)</th><th>Bypassed 1, (b)</th><th>Bypassed 2, (c)</th></tr></thead><tbody><tr><th>Switch</th><td>{T1,T2,T3,T4}</td><td>{T1,T2,T3,T4}</td><td>{T1,T2,T3,T4}</td></tr><tr><th>State</th><td>{on,off,off,on}</td><td>{on,off,on,off}</td><td>{off,on,off,on}</td></tr><tr><th><i>i</i><sub>sm</sub> ≥ 0</th><td><i>V</i><sub>sm</sub> = <i>V</i><sub>cap</sub>, Charge</td><td><i>V</i><sub>sm</sub> = 0, -</td><td><i>V</i><sub>sm</sub> = 0, -</td></tr><tr><th><i>i</i><sub>sm</sub> < 0</th><td><i>V</i><sub>sm</sub> = <i>V</i><sub>cap</sub>, Discharge</td><td><i>V</i><sub>sm</sub> = 0, -</td><td><i>V</i><sub>sm</sub> = 0, -</td></tr></tbody></table>

<figure><img src="image_3.png" /></figure>

### B. OCFs Behaviour

1) OCF in T1: Regarding the OCF in T1, as detailed in Table III, when $i_{SM} \ge 0$, the switch cannot be turned on. Therefore, the current will still pass through D1, resulting in a $+V_{cap}$ voltage and capacitor charging (not affected), and bypassed 1 and 2 will not be affected. However, under the inserted condition with $i_{SM} < 0$, the SM cannot be inserted and is bypassed, preventing the capacitor from discharging. Concerning bypassed 1 and $i_{SM} < 0$, the SM cannot remain in bypass and will be inserted, as the current will charge the capacitor. Bypassed 2 under $i_{SM} < 0$ is not affected as well.
<table><caption>TABLE III: SM'S OUTPUT VOLTAGE UNDER T1 OCF CONDITION</caption><thead><tr><th></th><th>Inserted, (a)</th><th>Bypassed 1, (b)</th><th>Bypassed 2, (c)</th></tr></thead><tbody><tr><th>Switch State</th><td>{T1,T2,T3,T4}<br>{OCF,off,off,on}</td><td>{T1,T2,T3,T4}<br>{OCF,off,on,off}</td><td>{T1,T2,T3,T4}<br>{off(OCF),on,off,on}</td></tr><tr><th>i<sub>sm</sub> ≥ 0</th><td>V<sub>sm</sub> = V<sub>Cap</sub>, Charge</td><td>V<sub>sm</sub> = 0, -</td><td>V<sub>sm</sub> = 0, -</td></tr><tr><th>i<sub>sm</sub> < 0</th><td>V<sub>sm</sub> = 0, -</td><td>V<sub>sm</sub> = V<sub>Cap</sub>, Charge</td><td>V<sub>sm</sub> = 0, -</td></tr></tbody></table>

2) OCF in T2: If an OCF occurs in T2, as detailed in Table IV, the capacitor will be inserted and charged under the bypassed 2 with $i_{SM} \ge 0$. In this situation, the SM will charge more than during normal operation, causing the $V_{SM}$ to increase. Concerning other conditions, the SM can still operate normally.

<table><caption>TABLE IV: SM'S OUTPUT VOLTAGE UNDER T2 OCF CONDITION</caption><thead><tr><th></th><th>Inserted, (a)</th><th>Bypassed 1, (b)</th><th>Bypassed 2, (c)</th></tr></thead><tbody><tr><th>Switch State</th><td>{T1,T2,T3,T4}<br>{on,off(OCF),off,on}</td><td>{T1,T2,T3,T4}<br>{on,off(OCF),on,off}</td><td>{T1,T2,T3,T4}<br>{off,OCF,off,on}</td></tr><tr><th>i<sub>sm</sub> ≥ 0</th><td>V<sub>sm</sub> = V<sub>Cap</sub>, Charge</td><td>V<sub>sm</sub> = 0, -</td><td>V<sub>sm</sub> = V<sub>Cap</sub>, Charge</td></tr><tr><th>i<sub>sm</sub> < 0</th><td>V<sub>sm</sub> = V<sub>Cap</sub>, Discharge</td><td>V<sub>sm</sub> = 0, -</td><td>V<sub>sm</sub> = 0, -</td></tr></tbody></table>

3) OCF in T3: The characteristics of an OCF in T3 are similar to those in T2 specified in Table V. Specifically, the SM will be inserted and charged under the bypassed 1 with $i_{SM} \ge 0$. This will result in the SM charging more than during normal operation.

<table><caption>TABLE V: SM'S OUTPUT VOLTAGE UNDER T3 OCF CONDITION</caption><thead><tr><th></th><th>Inserted, (a)</th><th>Bypassed 1, (b)</th><th>Bypassed 2, (c)</th></tr></thead><tbody><tr><th>Switch State</th><td>{T1,T2,T3,T4}<br>{on,off,off(OCF),on}</td><td>{T1,T2,T3,T4}<br>{on,off,OCF,off}</td><td>{T1,T2,T3,T4}<br>{off,on,off(OCF),on}</td></tr><tr><th>i<sub>sm</sub> ≥ 0</th><td>V<sub>sm</sub> = V<sub>Cap</sub>, Charge</td><td>V<sub>sm</sub> = V<sub>Cap</sub>, Charge</td><td>V<sub>sm</sub> = 0, -</td></tr><tr><th>i<sub>sm</sub> < 0</th><td>V<sub>sm</sub> = V<sub>Cap</sub>, Discharge</td><td>V<sub>sm</sub> = 0, -</td><td>V<sub>sm</sub> = 0, -</td></tr></tbody></table>

4) OCF in T4: If an OCF occurs in T4 (Table VI), the behavior of the SM outputs will be similar to that of T1. Under the inserted condition with $i_{SM} < 0$, the SM is bypassed and cannot discharge. Under the bypassed 2 with $i_{SM} < 0$, the SM is inserted and charged, causing it to charge more than during normal operation.

<table><caption>TABLE VI: SM'S OUTPUT VOLTAGE UNDER T4 OCF CONDITION</caption><thead><tr><th></th><th>Inserted, (a)</th><th>Bypassed 1, (b)</th><th>Bypassed 2, (c)</th></tr></thead><tbody><tr><th>Switch State</th><td>{T1,T2,T3,T4}<br>{on,off,off,OCF}</td><td>{T1,T2,T3,T4}<br>{on,off,on,off(OCF)}</td><td>{T1,T2,T3,T4}<br>{off,on,off,OCF}</td></tr><tr><th>i<sub>sm</sub> ≥ 0</th><td>V<sub>sm</sub> = V<sub>Cap</sub>, Charge</td><td>V<sub>sm</sub> = 0, -</td><td>V<sub>sm</sub> = 0, -</td></tr><tr><th>i<sub>sm</sub> < 0</th><td>V<sub>sm</sub> = 0, -</td><td>V<sub>sm</sub> = 0, -</td><td>V<sub>sm</sub> = V<sub>Cap</sub>, Charge</td></tr></tbody></table>

### III. FAULT CHARACTERISTICS WITH DIFFERENT MODULATION

This section presents the behavior of the MMC in the case of OCF with two different modulation strategies. The characteristics of the MMC are given in Table VII; also, the controller diagram used in this study is shown in Fig. 2.

<table><caption>TABLE VII: MMC CHARACTERISTICS</caption><thead><tr><th>Symbols</th><th>Item</th><th>Value</th></tr></thead><tbody><tr><td>N</td><td>Number of SMs</td><td>4</td></tr><tr><td>V<sub>dc</sub></td><td>Pole-to-pole DC voltage</td><td>100 V</td></tr><tr><td>V<sub>SM</sub></td><td>Applied IGBT Voltage</td><td>25 V</td></tr><tr><td>C<sub>SM</sub></td><td>SM capacitance</td><td>4 mF</td></tr><tr><td>L<sub>arm</sub></td><td>Arm Inductance</td><td>4.3 mH</td></tr><tr><td>R<sub>arm</sub></td><td>Arm resistance</td><td>0.178 Ω</td></tr><tr><td>f<sub>sw</sub> (PSC)</td><td>Switching frequency</td><td>1000 Hz</td></tr><tr><td>f<sub>Control</sub> (NLM)</td><td>Transition rate of controller</td><td>1500 Hz</td></tr></tbody></table>

<figure><img src="image_4.png" /><figcaption>Fig. 2: Block diagram of the MMC controller.</figcaption></figure>

#### A. PSC

In the case of the PSC modulation strategy, the behavior of the MMC is presented in Fig. 3 (a) and (b) for the OCFs in T1 and T2 switches to understand the MMC behavior better. The results are not repeated for OCFs in T3 and T4 as they show identical behavior (T3 similar to T2 and T4 similar to T1). The localization of the faulty SM in the case of T2 and T3 OCFs can be easily done. In the case of T1 and T4, it could be more challenging since, for several 10 milliseconds, all the SM's voltage increases. This will be evaluated in section IV.

#### B. NLM

The NLM modulation strategy is preferred for HV MMCs with many SMs. The behavior of the MMC with NLM modulation is shown in Fig. 4. Similar to PSC, the outputs are not repeated in the case of OCFs in T3 and T4, as the results are identical to T2 and T1, respectively. As seen in this modulation and due to the sorting algorithm, in the case of OCFs in T1 (T4), the voltage of the faulty SM will remain constant after several fundamental frequency cycles (unlike PSC, where the faulty SM's voltage keeps increasing). However, in the case of OCFs in T2 (T3), the same behaviors as PSC modulation can be seen where the faulty SM's voltage increases nonstop.

In the PSC modulation strategy, the localization threshold must be carefully set. If $R_a$ is set too low, all SMs, including healthy ones, can reach the threshold, causing confusion in post-fault operations. On the other hand, a higher $R_a$ value increases the localization time but ensures only the faulty SM is identified, which is crucial for accurate fault management.
<figure><img src="image_5.png" /><figcaption>Fig. 3: The MMC behavior with PSC modulation, waveforms including upper arm SM's capacitor voltages, lower arm SM's capacitor voltages, DC current, and AC side current when an OCF occurs in (a) T1, (b) T2.</figcaption></figure>

<figure><img src="image_6.png" /><figcaption>Fig. 4: The MMC behavior with NLM modulating, wave-forms including upper arm SM's capacitor voltages, lower arm SM's capacitor voltages, DC current, and AC side current when an OCF occurs in (a) T1, (b) T2.</figcaption></figure>

For the NLM modulation strategy, the results indicated that the average arm capacitor voltage comparison method is effective for fault localization. However, similar to PSC, the choice of $R_a$ impacts the speed of localization. A lower $R_a$ value results in a faster rise in the faulty SM's voltage, making it easier to identify the fault quickly. Conversely, a higher $R_a$ value delays the fault localization but prevents false positives. These findings highlight the need for a balanced approach in setting controller parameters to achieve quick and accurate fault detection while maintaining the reliable operation of MMCs.

## IV. FAULT LOCALIZATION TIME COMPARISON

In [27], a table of previous literature shows that the capacitor voltage of the SMs is one of the most commonly used indicators for localizing the faulty. However, to achieve this, an inertia value is usually set. In the case of PSC, SM is considered faulty if its capacitor voltage reaches this threshold. Another method involves comparing the individual SM's capacitor voltage with the average voltage of the arm (for NLM). This study demonstrates that the MMC's controller parameters can significantly affect localization time after OCF occurrence. These control parameters have a negligible impact on normal operation performance but greatly influence the fault localization time of the module.
In the case of PSC modulation, as shown in Fig. 5, the results of both scenarios are presented. In Case 1, the $R_a$ parameter of the circulating current controller (in Fig. 2) is set to 12, while in Case 2, it is set to 8. We observe that in Case 1, the threshold should be set to 27 where at $t_1 = 2.068s$ the faulty $SM_1$ is localized. Nevertheless, in case 2, the threshold should be higher, increasing the localization time by almost 20 ms to $t_1 = 2.089s$. Using the threshold from Case 1 causes all SMs (healthy and faulty) to reach the threshold, creating a problem for the post-fault operation.

<figure><img src="image_7.png" /><figcaption>Fig. 5: The impact of parameter tuning on the localization time with PSC modulation strategy if (a) $R_a = 12$ and, (b) $R_a = 8$.</figcaption></figure>

Considering the NLM modulation strategy, where the average arm's capacitor voltage is compared with the individual SM's voltage, similar conclusions can be drawn as shown in Fig. 6. As illustrated, if the localization voltage threshold is set to 0.7 V, the localization time in Case 1 is approximately 2.057 seconds. In Case 2, this time increases by 20 milliseconds to 2.078 seconds.

<figure><img src="image_8.png" /><figcaption>Fig. 6: The impact of parameter tuning on the localization time with NLM modulation strategy if (a) $R_a = 12$ and, (b) $R_a = 8$.</figcaption></figure>

## V. CONCLUSION

In conclusion, this study investigated the impact of controller parameters on the fault localization time in FB MMCs during OCF. We observed how different controller settings affected the fault localization process using PSC and NLM modulation strategies. The results showed that tuning parameters like $R_a$ of the circulating current controller can significantly influence the time required to identify faulty SMs. Specifically, a lower $R_a$ value increased the localization time, demonstrating the importance of precise controller tuning in maintaining efficient fault management in MMC systems.

Furthermore, the investigation into OCF in FB MMCs revealed critical insights. The FB configuration, while robust against DC link faults, is vulnerable to OCF, which can disrupt normal operation if not quickly detected and localized. Our findings indicated that certain modulation strategies and controller settings could either mitigate or worsen the effects of OCF. This highlights the need for careful selection and optimization of both hardware and software aspects of MMCs to ensure their reliability and fault tolerance.
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