# Using Variable Width RF Integrated Inductors for Quality Factor Optimization

Pedro Almeida, Pedro Pereira, Helena Fino

► To cite this version:

Pedro Almeida, Pedro Pereira, Helena Fino. Using Variable Width RF Integrated Inductors for Quality Factor Optimization. 4th Doctoral Conference on Computing, Electrical and Industrial Systems (DoCEIS), Apr 2013, Costa de Caparica, Portugal. pp.619-627, 10.1007/978-3-642-37291-9_67. hal-01348809

HAL Id: hal-01348809

https://hal.science/hal-01348809

Submitted on 25 Jul 2016

HAL is a multi-disciplinary open access
archive for the deposit and dissemination of sci-
entific research documents, whether they are pub-
lished or not. The documents may come from
teaching and research institutions in France or
abroad, or from public or private research centers.

L'archive ouverte pluridisciplinaire HAL, est
destinée au dépôt et à la diffusion de documents
scientifiques de niveau recherche, publiés ou non,
émanant des établissements d'enseignement et de
recherche français ou étrangers, des laboratoires
publics ou privés.

<figure><img src="image_1.png" /></figure>

Distributed under a Creative Commons Attribution 4.0 International License
# Using Variable Width RF Integrated Inductors for Quality Factor Optimization

Pedro Almeida¹, Pedro Pereira¹, Helena Fino¹

¹ Departamento de Engenharia Electrotécnica, Faculdade de Ciências e Tecnologia, FCT, Universidade Nova de Lisboa, 2829-516 Caparica, Portugal.

pedrodalmeida77@gmail.com, {pmrp, hfino} @ieee.org

**Abstract.** The advancement of CMOS technology led to the integration of more complex functions. In the particular of wireless transceivers, integrated LC tanks are becoming popular both for VCOs and integrated filters [1]. For RF applications the main challenge is still the design of integrated inductors with the maximum quality factor. For that purpose, tapered, i.e., variable width inductors have been proposed in the literature. In this paper, analytical expressions for the determination of the pi-model parameters, for the characterization of variable width integrated inductors are proposed. The expressions rely exclusively on geometrical and technological parameters, thus granting the rapid adaptation of the model to different technologies. The results obtained with the model are compared against simulation with ASITIC, showing errors below 10%. The model is then integrated into an optimization procedure where inductors with a quality factor improvement in the order of 20-30% are obtained, when compared with fixed width inductors.

**Keywords:** Inductor layout optimization, variable metal width, integrated RF inductor.

## 1 Introduction

During the last years the worldwide market on communications has experienced an ever-growing demand for integrated systems with scaling down dimensions and increased functionality. In the particular case for RF communication circuits, integrated spiral inductors are widely used, notwithstanding their poor performance and their subsequent negative impact on the circuit efficiency at high frequencies. This poor performance is due to the large effect the technology parasitics have on the small value of inductance usually required. As a result, significant effort has been employed in investigating silicon planar inductors, their associated models and methods of improving their performance [1-3].

Regarding layout optimization, non-uniform metal width is proposed, as a way of increasing the inductor quality factor [4, 5]. The main objective of this methodology is to reduce the influence of magnetically induced losses in the inner turns of the spiral where the magnetic field reaches its maximum. By reducing the line width toward the center of the spiral a minimization of the series resistance of the inductor
coil, taking into account both Ohmic losses due to conduction currents, and magnetically induced losses due to Eddy currents, is obtained. Although several promising results have been reported, a fully analytical characterisation of the inductor, leading to perfect understanding of the device performance limitations, is needed so that optimized designs may be obtained.

In this paper analytical expressions for the evaluation of the inductor model parameters are proposed. These expressions rely exclusively on technological parameters and on the geometrical characterization of each inductor segment. The proposed model is used for the optimization-based design of several inductors, where the advantage of using tapered topologies is well pointed out.

The remaining of the paper is organized as follows. The novelty introduced by this paper, is highlighted in Section 2. In this section the basic inductor model is introduced and then, the adaptation of the model for variable width inductors is carefully described. Section 3 is dedicated to the description of several working examples. Finally, conclusions are offered in Section 4.

## 2 Relationship to Internet of Things

Internet of things relies on the interconnections of a large number of heterogeneous cooperating devices. The development of these devices has been made possible due to the rapid evolution of electronic technologies, enabling the implementation complex functions, in smaller and more rapid circuits. To cope with the necessity of minimizing the power consumption of such systems, new design methodologies must be adopted. In the particular case of communications services, RF integrated inductors are becoming popular elements. Yet, designing integrated inductors for RF applications is a challenging process where a set of correlated geometrical parameters must be obtained, leading to the need of using optimization-based design methodologies.

The main objective of the work described is the optimization of the spiral inductors quality factor, by using variable width inductors.

The novel contributions of this paper are as follows:

* It proposes a set of analytical expressions for the evaluation of the pi-model parameters, for variable width integrated inductors. The proposed expressions depend exclusively on the technological parameters and on the geometric characterization of each segment of the inductor.

* It proposes an efficient optimization-based design for nano-CMOS planar spiral inductor, based in analytical models, instead of using an electromagnetic simulation based approach;

Since the proposed equations are an extension of the model used for fixed width inductors, next sub-section gives a brief description of this model. In subsection 2.2 the adequacy of the model to variable width inductors is carefully described.
## 2.1 Planar Spiral Inductor Pi-Model

Several integrated inductor models have been introduced in the last years, as illustrated in Fig. 1 [6]

<figure><img src="image_2.png" /><figcaption>Fig. 1. Planar inductor lumped element models complexity versus accuracy trade-off.</figcaption></figure>

The simplest one is the pi-model, which is widely used for inductors operating in a frequency range up to a few GHz. For the sake of simplicity, the pi-model, illustrated in Fig. 2.a., is adopted, where $L_s$, and $R_s$, account for the inductance and resistance of the spiral. The overlap between the spiral and the underpass allows direct capacitive coupling between the two terminals of the inductor. The feed-through part is modelled by $C_s$. Capacitor $C_{ox}$ represents the capacitance between the spiral and the substrate. Finally, $C_{si}$ and $R_{si}$ account for the silicon substrate capacitance and resistance, respectively.

<figure><img src="image_3.png" /><figcaption>Fig. 2. a) Planar inductor pi-model; b) Geometric parameters for a square inductor.</figcaption></figure>

For the evaluation of the inductance, $L_s$, several approaches have been proposed, based either on fitting processes to experimental values [7] or through physics-based equations [8], where

$$L_s = k_1 \mu_0 n^2 d_{avg} / (1 + k_2 \rho). \qquad (1)$$

Given that,
$$ \rho = (d_{out} - d_{in})/(d_{out} + d_{in}). \qquad (2.a) $$

$$ d_{avg} = 0.5(d_{out} + d_{int}). \qquad (2.a) $$

$$ d_{out} = d_{in} + 2nw + 2(n-1)s. \qquad (2.b) $$

Where n is the number of turns, s is the track-to-track distance, and w is the track width. Finally, $k_1$ and $k_2$, are coefficients allowing the model to be adapted to several inductor shapes.

The evaluation of the spiral resistance, $R_s$, is obtained by [9]

$$ R_s = \sqrt{R_{dc}^2 + R_{ac}^2}. \qquad (3) $$

Where,

$$ R_{dc} = l / (\sigma wt). \qquad (4.a) $$

$$ R_{ac} = kl/[2\sigma\delta(w + t)]. \qquad (4.b) $$

And $\sigma$ and $t$ are the metal conductivity and thickness, respectively. The metal length, $l$, is obtained with [10]

$$ l = N_{sides} d_{avg} n \tan(\pi/N_{sides}). \qquad (5) $$

And the skin depth, $\delta$, may be determined by [11]

$$ \delta = 1/\sqrt{\sigma\mu\pi f}. \qquad (6) $$

For the evaluation of the capacitance, $C_s$, all overlap capacitances are considered and given by [12].

$$ C_s = n_c w^2 \varepsilon_{ox} / t_{oxM1-M2}. \qquad (7) $$

Where $\varepsilon_{ox}$ is the oxide permittivity, $n_c$ is the number of overlaps and $t_{oxM1-M2}$ is the oxide thickness between the spiral upper and lower metal. The parasitic capacitance, $C_{ox}$, between the spiral metal and the silicon substrate, is estimated with [12]

$$ C_{ox} = 0.5lw \varepsilon_{ox} / t_{ox}. \qquad (8) $$

Where $t_{ox}$ is the thickness of the $SiO_2$ between the inductor and the substrate and $lw$ defines the area of the spiral. Finally the Substrate resistance, $R_{si}$, and capacitance $C_{si}$, are obtained with 11

$$ R_{si} = 2h_{si}/(lw \sigma_{si}). \qquad (9) $$
$$C_{si} = 0.5lw \varepsilon_o \varepsilon_r / h_{si}. \qquad (10)$$

Where $\sigma_{si}$ and $h_{si}$ are the substrate conductivity and height, respectively.

This model has been extensively used in an optimization-based tool for inductor design [13] yielding solutions with very good accuracy when compared with results obtained with ASITIC.

## 2.2- Variable Width Inductor Model

Variable width inductor layout has been proposed as a way of maximizing the quality factor of integrated inductors. In this work, square inductors, where each segment shows a width increment of $\Delta w$, as illustrated in Fig.3., are considered.

<figure><img src="image_4.png" /><figcaption>Fig. 3. Variable width square inductor.</figcaption></figure>

Since each segment will show an increment on both width and length new equations will be proposed, relying on the dimensions of each segment of the inductor. The width of a segment may be evaluated with

$$w_i = w + n_i \Delta w. \qquad (11)$$

Where $n_i$ is the number of the segment, and $w$ is the initial metal width.

In this work, the basic structure for supporting all the inductor segments characterization is a matrix of five columns (one for each segment per turn) and n lines (one per inductor turn). Initially, a matrix containing every segment length, $l_{ij}$ as

$$l_{ij} = \begin{bmatrix} l_{11} & l_{12} & l_{13} & l_{14} & l_{15} \\ l_{21} & l_{22} & l_{23} & l_{24} & l_{24} \\ \vdots & \vdots & \vdots & \vdots & \vdots \\ l_{n1} & l_{n2} & l_{n3} & l_{n4} & l_{n5} \end{bmatrix}. \qquad (12)$$
is generated. Then a matrix containing every segment width, $w_{ij}$

$$w_{ij} = \begin{bmatrix} w_{11} & w_{12} & w_{13} & w_{14} & w_{15} \\ w_{21} & w_{22} & w_{23} & w_{24} & w_{24} \\ \vdots & \vdots & \vdots & \vdots & \vdots \\ w_{n1} & w_{n2} & w_{n3} & w_{n4} & w_{n5} \end{bmatrix}. \qquad (13)$$

is generated.

Regarding the pi-model inductance, $L_s$, a new way for evaluating $d_{out}$ must be adopted. Considering the basic matrixes in (12), (13), $d_{out}$ may be obtained by

$$d_{out} = l_{n4} + w_{n5}. \qquad (14)$$

For the evaluation of $R_s$, (4.a) and (4.b) are replaced by

$$R_{dc} = \frac{1}{\sigma t} \sum_{i=1}^{n} \sum_{j=1}^{5} \frac{l_{ij}}{w_{ij}}. \qquad (15.a)$$

$$R_{ac} = \frac{k}{2\sigma\delta} \sum_{i=1}^{n} \sum_{j=1}^{5} \frac{l_{ij}}{w_{ij} + t}. \qquad (15.b)$$

For this purpose the two new matrix (15.a) and (15.b) are generated containing each segment geometrical information for $R_{dc}$ and $R_{ac}$

$$\frac{l_{ij}}{w_{ij}} = \begin{bmatrix} \frac{l_{11}}{w_{11}} & \frac{l_{12}}{w_{12}} & \frac{l_{13}}{w_{13}} & \frac{l_{14}}{w_{14}} & \frac{l_{15}}{w_{15}} \\ \frac{l_{21}}{w_{21}} & \frac{l_{22}}{w_{22}} & \frac{l_{23}}{w_{23}} & \frac{l_{24}}{w_{24}} & \frac{l_{25}}{w_{25}} \\ \vdots & \vdots & \vdots & \vdots & \vdots \\ \frac{l_{n1}}{w_{n1}} & \frac{l_{n2}}{w_{n2}} & \frac{l_{n3}}{w_{n3}} & \frac{l_{n4}}{w_{n4}} & \frac{l_{n5}}{w_{n5}} \end{bmatrix}. \qquad (16)$$
$$ \frac{l_{ij}}{w_{ij} + t} = \begin{bmatrix} \frac{l_{11}}{w_{11} + t} & \frac{l_{12}}{w_{12} + t} & \frac{l_{13}}{w_{13} + t} & \frac{l_{14}}{w_{14} + t} & \frac{l_{15}}{w_{15} + t} \\ \frac{l_{21}}{w_{21} + t} & \frac{l_{22}}{w_{22} + t} & \frac{l_{23}}{w_{23} + t} & \frac{l_{24}}{w_{24} + t} & \frac{l_{25}}{w_{25} + t} \\ \vdots & \vdots & \vdots & \vdots & \vdots \\ \frac{l_{n1}}{w_{n1} + t} & \frac{l_{n2}}{w_{n2} + t} & \frac{l_{n3}}{w_{n3} + t} & \frac{l_{n4}}{w_{n4} + t} & \frac{l_{n5}}{w_{n5} + t} \end{bmatrix} \quad (17) $$

Finally (8), (9) and (10) are replaced by

$$ C_{ox} = \frac{1}{2} \cdot \frac{\varepsilon_{ox}}{t_{ox}} \sum_{i=1}^{n} \sum_{j=1}^{5} l_{ij} w_{ij}. \quad (18) $$

$$ R_{si} = \frac{2}{G_{sub}} \sum_{i=1}^{n} \sum_{j=1}^{5} \frac{1}{l_{ij} w_{ij}}. \quad (19) $$

$$ C_{si} = \frac{1}{2} \cdot C_{sub} \sum_{i=1}^{n} \sum_{j=1}^{5} l_{ij} w_{ij}. \quad (20) $$

For which an auxiliary matrix containing the area of each segment is considered.

## 4 Variable Inductor Working Example

In order to confirm the validity of the proposed layout optimization method, a set of square spiral inductors has been designed. Three examples, considering the design of 1nH, 1.5nH and 2nH inductors at a working frequency of 1GHz will be presented. In all examples the technological parameters shown in Table I were used

<table><caption>TABLE I
UMC130 – TECHNOLOGICAL PARAMETERS</caption><thead><tr><th>Parameter</th><th>Value</th><th>Parameter</th><th>Value</th></tr></thead><tbody><tr><td>ε<sub>o</sub></td><td>8.85e-12</td><td>t<sub>ox</sub>(μm)</td><td>600</td></tr><tr><td>ε<sub>r</sub></td><td>1.0</td><td>C<sub>sub</sub> (F/m<sup>2</sup>)</td><td>4.0e-6</td></tr><tr><td>σ (Ωm)</td><td>1/2.65e-8</td><td>G<sub>sub</sub> (S/m<sup>2</sup>)</td><td>2.43e5</td></tr></tbody></table>

For the model validation a comparison between results obtained with variable width design, against fixed width designs, for an approximately equal area, is
presented. The layout parameters were evaluated according to the constraints in Table II

<table><caption>TABLE III
SPIRAL INDUCTOR DESIGN CONSTRAINTS</caption><thead><tr><th>Parameter</th><th>Min</th><th>Step</th><th>Max</th></tr></thead><tbody><tr><td>w (μm)</td><td>5.0</td><td>0.5</td><td>100.0</td></tr><tr><td>Δw (μm)</td><td>1</td><td>0.25</td><td>-</td></tr><tr><td>s(μm)</td><td>1.5</td><td>-</td><td>-</td></tr><tr><td>d<sub>in</sub> (μm)</td><td>20.0</td><td>0.5</td><td>200.0</td></tr><tr><td>N</td><td>1.5</td><td>1.0</td><td>15.5</td></tr><tr><td>d<sub>out</sub></td><td>-</td><td>-</td><td>500</td></tr></tbody></table>

A. Example 1 – Inductor with 1 nH

In this example a spiral inductor of 1nH was considered. The results obtained for a fixed width layout as well as for Δw of 1.25μm, 1.5μm and 1.75μm are represented in Table II. Also in the same table, the simulation results obtained with ASITIC for each case are represented.

<table><caption>TABLE IIII
OPTIMIZATION RESULTS FOR 1nH INDUCTOR WITH SEVERAL ΔW</caption><thead><tr><th rowspan="2">Ind</th><th rowspan="2">Δw<br>(μm)</th><th rowspan="2">w<br>(μm)</th><th rowspan="2">d<sub>in</sub><br>(μm)</th><th rowspan="2">n</th><th rowspan="2">d<sub>out</sub><br>(μm)</th><th colspan="3">L (nH)</th><th colspan="3">Q</th><th rowspan="2">Q</th></tr><tr><th>Model</th><th>Asitic</th><th>ε<sub>L</sub></th><th>Model</th><th>Asitic</th><th>ε<sub>O</sub></th><th>Impr.</th></tr></thead><tbody><tr><td>1</td><td>0</td><td>13.8</td><td>68.8</td><td>2.5</td><td>157</td><td>1</td><td>1.07</td><td>6.3%</td><td><b>6.94</b></td><td>6.28</td><td>10.5%</td><td></td></tr><tr><td>2</td><td>1.25</td><td>7.5</td><td>41.3</td><td>3</td><td>154</td><td>0.998</td><td>1.06</td><td>5.4%</td><td>8.07</td><td>8.24</td><td>1.7%</td><td>16%</td></tr><tr><td>3</td><td>1.5</td><td>7.25</td><td>39.8</td><td>3</td><td>161</td><td>0.999</td><td>1.04</td><td>4.3%</td><td>8.57</td><td>8.53</td><td>0.5%</td><td>23%</td></tr><tr><td>4</td><td>1.75</td><td>5.75</td><td>40.3</td><td>3</td><td>162</td><td>1.01</td><td>1.04</td><td>2.5%</td><td><b>8.52</b></td><td>8.16</td><td>4.4%</td><td><b>23%</b></td></tr></tbody></table>

In the last column the relative improvement in the quality factor from using incremental width is given.

B. Example 2 – Inductor with 1.5nH

In this example a spiral inductor of 1.5nH was considered. The results obtained for a fixed width layout as well as for Δw of 2μm, 2.5μm and 3.0 μm are represented in Table II. Also in the same table, the simulation results obtained with ASITIC for each case are represented.

<table><caption>TABLE IVI
OPTIMIZATION RESULTS FOR 1.5 nH INDUCTOR WITH SEVERAL ΔW</caption><thead><tr><th rowspan="2">Ind</th><th rowspan="2">Δw<br>(μm)</th><th rowspan="2">w<br>(μm)</th><th rowspan="2">d<sub>in</sub><br>(μm)</th><th rowspan="2">n</th><th rowspan="2">d<sub>out</sub><br>(μm)</th><th colspan="3">L (nH)</th><th colspan="3">Q</th><th rowspan="2">Q</th></tr><tr><th>Model</th><th>Asitic</th><th>ε<sub>L</sub></th><th>Model</th><th>Asitic</th><th>ε<sub>O</sub></th><th>Impr</th></tr></thead><tbody><tr><td>1</td><td>0</td><td>20.3</td><td>10.3</td><td>2.5</td><td>231</td><td>1.5</td><td>1.62</td><td>7.6%</td><td><b>10.1</b></td><td>9.27</td><td>9.0%</td><td></td></tr><tr><td>2</td><td>2</td><td>11.5</td><td>61.3</td><td>3</td><td>233</td><td>1.5</td><td>1.58</td><td>5.2%</td><td>12.29</td><td>12.61</td><td>2.6%</td><td>22%</td></tr><tr><td>3</td><td>2.5</td><td>6.25</td><td>64.3</td><td>3</td><td>221</td><td>1.5</td><td>1.52</td><td>1.6%</td><td>11.07</td><td>10.59</td><td>4.6%</td><td>9%</td></tr><tr><td>4</td><td>3</td><td>8.75</td><td>58</td><td>3</td><td>253</td><td>1.51</td><td>1.54</td><td>1.8%</td><td><b>13.44</b></td><td>12.74</td><td>5.5%</td><td><b>33%</b></td></tr></tbody></table>
### C. Example 3 – Inductor with 2nH

In the last example a spiral inductor of 2.0nH was considered. The results obtained for a fixed width layout as well as for $\Delta w$ of 2µm, 2.5µm and 3.0µm are represented in Table II. Also in the same table, the simulation results obtained with ASITIC for each case are represented.

<table><caption>TABLE V
OPTIMIZATION RESULTS FOR 1.5 nH INDUCTOR WITH SEVERAL $\Delta W$</caption><thead><tr><th rowspan="2">Ind</th><th rowspan="2">Δw<br>(μm)</th><th rowspan="2">w<br>(μm)</th><th rowspan="2">d<sub>in</sub><br>(μm)</th><th rowspan="2">n</th><th rowspan="2">d<sub>out</sub><br>(μm)</th><th colspan="3">L (nH)</th><th colspan="3">Q</th><th rowspan="2">Q<br>impr</th></tr><tr><th>Model</th><th>Asitic</th><th>ε<sub>L</sub></th><th>Model</th><th>Asitic</th><th>ε<sub>Q</sub></th></tr></thead><tbody><tr><td>1</td><td>0</td><td>25.8</td><td>137</td><td>2.5</td><td>297</td><td>2</td><td>2.16</td><td>7.6%</td><td><strong>12.72</strong></td><td>11.62</td><td>9.4%</td><td></td></tr><tr><td>2</td><td>2.75</td><td>12.5</td><td>85</td><td>3</td><td>296</td><td>2</td><td>2.1</td><td>4.8%</td><td>15.03</td><td>15.21</td><td>1.2%</td><td>18%</td></tr><tr><td>3</td><td>3</td><td>9.75</td><td>86.3</td><td>3</td><td>288</td><td>2</td><td>2.05</td><td>2.6%</td><td>14.39</td><td>14.19</td><td>1.4%</td><td>13%</td></tr><tr><td>4</td><td>3.75</td><td>10.3</td><td>80.5</td><td>3</td><td>317</td><td>2</td><td>2.05</td><td>2.6%</td><td><strong>16.14</strong></td><td>15.34</td><td>5.2%</td><td><strong>27%</strong></td></tr></tbody></table>

## 5 Conclusions

In this paper the analytical expressions for the evaluation of integrated inductor pi-model parameters was proposed. This expressions consider variable width square inductors, were each segment shows a constant increment of width. The validity of the model was shown through three working examples considering the design of 1.0nH, 1.5nH and 2.0nH inductors at a working frequency of 1GHz. From the examples presented a quality factor improvement in the order of 20% to 30% may be obtained, by using variable width.

Should higher frequency of operation be envisaged, a more accurate inductor, such as 2-pi-model should be used. The adaptation of the proposed equations to the 2-pi-model is under test.

## References

1. I Krout, H. Mnif, M. Fakhfakh, and M. Loulou, "Optimizing LC VCO Performances Through a Heuristic", Wseas Transactions on Electronics, vol. 5, pp.274-281, 2008.

2. P-W. Lai, L. Dobos, S. Long, "A 2.4GHz SiGe low phase noise VCO using on chip Tapped inductor", Solid-State Circuits Conference - ESSCIRC, pp. 505-508, 2003.

3. L. L. K. Leung, and H. C. Luong, "A 1V9.7mW CMOS frequency synthesizer for IEEE 802.11a transceivers", IEEE Trans. Microw. Theory Tech., vol. 56, pp. 39-48, Jan. 2008.

4. Wesley A. Gee, "CMOS Integrated LC Q-enhanced RF Filters for wireless Receivers", PhD. Thesis, Georgia Institute of Technology, 2005.

5. C. Patrick Yue and S. Simon Wong, "Physical modeling of spiral inductors on silicon", IEEE Transactions on Electron Devices, Vol. 47 560-568, 2000.

6. Lai, I., Fujishima, M., "Design and Modeling of Millimeter-Wave CMOS Circuits for Wireless Transceivers - Era of Sub-100nm Technology", Springer, 2008.

7. Sunderarajan S. Mohan, Maria del Mar Hershenson, Stephen P. Boyd, and Thomas H. Lee, "Simple Accurate Expressions for Planar Spiral Inductances", IEEE Journal of Solid-State Circuits, Vol. 34, N° 10, October 1999.

8. S. Jenei, B. K. J. C. Nauwelaers, and S. Decoutere, "Physics-Based Closed-Form Inductance Expression for Compact Modelling of Integrated Spiral Inductors," IEEE J. Solid-State Circuits, vol. 37, no. 1, pp. 77-80, January 2002.
9. Y. S. Choi and J. B. Yoon, "Experimental Analysis of the Effect of Metal Thickness on the Quality Factor in Integrated Spiral Inductors for RF ICs," IEEE Electron Device Lett., vol. 25, no. 2, pp. 76-79, February 2004.

10.D. J. Allstot, K. Choi, J. Park, "Parasitic-Aware Optimization of CMOS RF Circuits", *Kluwer Academic Publishers*, ISBN 1-4020-7399-2, 2003.

11.M. Park, C. H. Kim, C. S. Kim, et. al, "Frequency-Dependent Series Resistance of Monolithic Spiral Inductors," IEEEMicrowave Guided Lett., vol. 9, no. 12, pp. 514-516, December 1999.

12.Olive H. Murphy, "Advanced Physical Modelling of Multilayer Inductors for CMOS RF Front-End Applications", PhD Thesis, University College Cork - National University of Ireland, October, 2005.

13. Pereira, P., Fino, M. H., Coito, F. & Ventim-Neves, M. "ADISI- An efficient tool for the automatic design of integrated spiral inductors" The 16th IEEE International Conference on Electronics, Circuits, and Systems (ICECS'09), 799-802, 2009.