# Development of a Functionally Graded Capacitor by SPS

Romain Raisson, Sophie Guillemet-Fritsch, Paul-Etienne Vidal, Pascal Dufour

► To cite this version:

Romain Raisson, Sophie Guillemet-Fritsch, Paul-Etienne Vidal, Pascal Dufour. Development of a Functionally Graded Capacitor by SPS. Ceramics in Europe 2022, Jul 2022, Cracovie, Poland. .
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Submitted on 22 Mar 2023

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Distributed under a Creative Commons Attribution 4.0 International License
# Development of a Functionally Graded Capacitor by SPS

Romain RAISSON<sup>(a, b, c)</sup>, Sophie GUILLEMET-FRITSCH<sup>(b)</sup>, Pascal DUFOUR<sup>(b)</sup> et Paul-Etienne VIDAL<sup>(a,c)</sup>

(a)E2S-UPPA, Avenue de l'Université 64012 Pau

(b)CIRIMAT, 118 route de Narbonne, 31062 Toulouse cedex 9

(c)LGP, 47 avenue d'Azereix, 65016 Tarbes

❖ Mail: romain.raisson@univ-pau.fr – Tel: 05.61.55.61.15

## Abstract

The need of miniaturization for electronic devices pushes manufacturers to move towards an increasing of the multifunctionallity of components. Obtaining new materials with heterogeneous electrical properties is a challenge for some applications in power electronics. The aim of the work is to co-sintered a metal and a ceramic in one step by SPS to obtain a device with heterogeneous properties.

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## Characterizations

### Dielectric measurement

<table><thead><tr><td>Measurement (at 1KHz)</td><td>FGM</td></tr></thead><tbody><tr><td>Capacity (nF)</td><td>119</td></tr><tr><td>Permittivity</td><td>&lt; 10<sup>5</sup></td></tr><tr><td>Dielectric loss</td><td>&gt; 4%</td></tr></tbody></table>

* Colossal permittivity

* Low dielectric loss

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Good capacitor

### TEM-EDS of the interface

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* No diffusion

## Prospects

Co sintering with an
insulator material

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Complex shape

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Characterizations inside
electronic devices

## Acknowledgments:

This work is supported by the funding PIA-ANR-16-IDEX-0002, projet Energy And Solution for Environment - E2S UPPA

within the framework of the EFFICIENCE Chaire

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CIRIMAT
Toulouse

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LGP
LABORATOIRE
GÉNIE DE PRODUCTION

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SAFRAN

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