# Robust cascade control for variable dimension systems
-Application to processors' power capping

Kouds Halitim, Sophie Cerf, Bogdan Robu

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Kouds Halitim, Sophie Cerf, Bogdan Robu. Robust cascade control for variable dimension systems -Application to processors' power capping. ECC 2025 - 23rd European Control Conference, Jun 2025, Thessalonique, Greece. pp.1-8. hal-05117585

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# Robust cascade control for variable dimension systems - Application to processors' power capping

Kouds Halitim

Univ. Grenoble Alpes, Inria
CNRS, Grenoble INP, LIG

F-38000 Grenoble, France

Kouds.Halitim@inria.fr

Sophie Cerf

Univ. Lille, Inria, CNRS,

Centrale Lille, UMR 9189 CRISTAL

F-59000 Lille, France

Sophie.Cerf@inria.fr

Bogdan Robu

Univ. Grenoble Alpes

CNRS, Grenoble INP, Gipsa-lab

F-38000 Grenoble, France

Bogdan.Robu@univ-grenoble-alpes.fr

**Abstract**—Power savings is a key research topic in High Performance Computing (HPC). We present a control-based approach to regulate the power usage of an HPC application while maintaining its performance. Power capping is performed using the RAPL (Running Average Power Limit) actuation and sensing mechanism, which is known to have noise and inaccuracies. The Actuation is performed at the processor level, and since the number of processors in an HPC setup can vary, this results in a variable number of power signals for the same input. To Address these challenges of noise, actuator inaccuracies, and variable signal dimensions, our approach incorporates a cascade control design with robust controllers. One controller monitors real-time progress of the application and dynamically applies power caps via the RAPL actuator; the other controller adjusts the actuator's power cap value, which we found to be inaccurate in meeting the commanded power limit. Additionally, we use a robust control approach to tune the controllers, where the PI parameters are selected to meet $H_\infty$ performance criteria. This balances robustness and disturbance rejection, ensuring stability and performance under varying conditions. This approach provides a robust solution to power control in the presence of system uncertainties. The experiments run the Embarrassingly Parallel (EP) compute-intensive HPC benchmark on various clusters of the Grid'5000 platform. Using this approach, we improved RAPL accuracy and reduced the power consumption by 25%, with a trade-off of a 10% reduction in performance.

***Index Terms***—Energy consumption, System Identification, PI, Cascade control, Robust Control, $H_\infty$ design, HPC, RAPL.

## I. INTRODUCTION

High-performance computing (HPC) systems combine large-scale applications (e.g., AI, scientific simulations) with powerful machines (e.g., the Jean Zay supercomputer), and are designed for fast and scalable computation, featuring parallel architectures often organized into clusters of identical nodes with multiple processing cores [1].

Modern HPC systems struggle to efficiently allocate power across components like processors, memory, and networking devices due to the dynamic and unpredictable nature of applications they are running [2] and the hardware architecture [3]. Applications vary in computational demands, and transition between intensive computational operations, to memory access for data retrieval or storage, and I/O

exchanges, leading to fluctuations and inefficiencies with static power usage [4].

To effectively allocate power across different components, HPC systems utilize various power management techniques, including dynamic voltage and frequency scaling (DVFS), dynamic duty cycle modulation (DDCM), and Intel's RAPL (Running Average Power Limit) for regulating and measuring system power consumption.

Recent works have applied control theory to solve power regulation challenges in Cloud Computing [5], [6] and HPC systems [7], [8], especially by dynamically managing computing resources (CPU, Memory, Disk...). Control theory offers robustness, stability, and performance guarantees, which have been successful in industrial applications and are now being applied to computing systems [9]. The approaches used include classical control (PID like, state feedback), and advanced control (MPC, Stochastic Control), and other knowledge based control methods [10].

Recent research on power allocation for HPC applications have focused on memory-intensive benchmarks, exploring different control designs such as proportional-integral (PI) controllers [11] and adaptive controllers [12], to manage runs on different computing nodes. Regulation of the application performance, using a progress sensor, is achieved by applying power caps with RAPL as an actuator. While this approach can save up to 25% in energy usage during memory-intensive workloads, it has several limitations: (i) Real applications are not purely memory-intensive but also compute-intensive. The system's non-linear behavior is expected to be different, particularly regarding the saturation at high power values. (ii) Although RAPL's simplicity makes it widely used, it is known to be an inaccurate power actuator [13]. Its accuracy is influenced by hardware variability, system complexity, sampling rates, and external factors [14]. RAPL does provide online processor power measurements, making it useful as both an *actuator* and a *sensor*. (iii) RAPL operates at the CPU level, and in HPC architecture, there can be a variable number of CPUs per node. A Single-Input Single-Output (SISO) approach does not accurately represent this system.

These challenges lead to the following research questions:
**RQ1:** Can processors' power control be extended to different applications, such as compute-intensive benchmarks ?

**RQ2:** Can the use of power sensors improve the control ?

**RQ3:** How to handle the variable dimensions, i.e, the change in the number of processors for each system, as this changes the dimension of input/output signals ?

To address these research questions, this paper adopts a robust cascade control approach. The system can be divided into two subsystems: the RAPL actuator and the HPC plant. The first subsystem is a Single-Input Multiple-Output (SIMO) system due to the different power values collected from power sensors, while the second subsystem is a Multiple-Input Single-Output (MISO) system between the power measures and the application's progress, as presented in Fig. 1. These two subsystems are controlled in cascaded loops [15]–[17], with the inner loop ensuring the accuracy of the actuator, and the outer loop the main progress regulation task. To handle the property of variable dimension, identified SIMO and MISO plants are aggregated into uncertain SISO models. The design of the cascaded controllers are performed using robust methods to handle noise, uncertainties, and variations in the system [18]. Models identification and simulations use real data from a compute-intensive benchmark.

The contributions of this work are:

* Proposing a general method that can deal with all systems with variable number of signals.

* Modeling of a SIMO powercap to power measure for the actuator, and MISO power measure to application progress for an HPC compute-intensive application.

* Development of a robust control formulation to aggregate the SIMO (and MISO) system as an uncertain SISO model.

* Design of a cascaded controller to address inaccuracies in RAPL actuator and local disturbances.

* Validation of models accuracy and control performance on 3 HPC machines with diverse hardware properties.

The remainder of this paper is structured as follows: in Section II we provide a high-level description of the target system hardware components and the benchmark used, formulate the control problem and highlight the challenges with real experimental data. Section III on system identification presents two models: one for the process itself and another for the RAPL actuator. In Section IV, we introduce a cascaded control approach employing two robust controllers, and present the computation of aggregated uncertain models. Section V evaluates the overall approach by assessing the models accuracy and the robustness of the controller. Section VI discusses the limitations of our work and suggests potential extensions. Finally, Section VII concludes the paper.

## II. PROBLEM FORMULATION

### A. HPC System: Architecture and Benchmark

A typical HPC system architecture is organized as clusters of computing resources with identical hardware specifications. Each cluster consists of multiple nodes, where each

node contains one or more processors—usually 1, 2, or 4 per node [12], and each processor implements the RAPL mechanism. RAPL works as a *power actuator* that allows users to specify a powercap, the maximum power consumption and a time window, then ensures that the average power remains within the predefined limits during the specified time interval. It also functions as a *power sensor* to monitor the power consumption of the system. In our work, the system under study is a single node selected from three different clusters (gros, dahu, yeti) each with 1, 2 and 4 processors respectively of the Grid5000 platform<fnref n="1" />. Our HPC system runs the *Embarrassingly Parallel (EP) Benchmark* [19]. This benchmark was chosen because it is representative of compute-bound phases in HPC applications, exhibits stable behavior, and is the default benchmark in most HPC related works.

<figure><img src="image_2.png" /><figcaption>Fig. 1. Open loop block diagram of the computing system: The process is the node running the EP benchmark, we apply a power cap input signal $u(k)$ using RAPL actuator, and observe its effects on the application progress output $y(k)$. Power measures $u_{s_i}(k)$ are available on each processor. Additive noise is observed in all measures signals.</figcaption></figure>

### B. Control Formulation

The objective of this work is to achieve a balance between the application's performance and power consumption. Therefore, we apply a power cap $u(k)$ on the application power consumption using RAPL and collect the real *measure* of the power $u_{s_i}(k)$ in each processor $i$ of the computing node. We collect the measure of the application's online performance relative to the applied power caps using a *progress metric* $y(k)$ designed in [12], and tracks the advancement of the HPC application by instrumenting the code to log completed iterations. The open-loop block diagram is depicted in Fig. 1.

The reference signal $r_e$ is computed based on the best progress value (open loop without powercap) with a user-defined degradation factor $\epsilon$, ranging in [0, 1] as defined in [11]. The value of this factor depends on the amount of performance degradation the user is willing to accept in order to save energy, and the corresponding energy savings. In some cases, this degradation makes sense where jobs are launched overnight, and obtaining results at 5 a.m. versus 6 a.m. makes no practical difference to the user.

<footnote n="1">¹Full hardware specifications can be found here: https://www.grid5000.fr/w/Hardware</footnote>
### C. Challenges

The challenges of our system can be illustrated with open loop experiments. The experimental setup is explained in detail in [11]. Figure 2 shows the commanded power cap signal and the measured power cap collected by RAPL for three clusters in the upper signals, and monitor the application's progress on the bottom plots. The powercap command $u$ of RAPL is gradually adjusted in steps of 20 W within the clusters' reasonable power range (i.e., from 40 W to 120 W for our processors). RAPL actuator works on maintaining the power command over the time window, and RAPL sensor provides a measure of the real power applied $u_{s_i}$. Note the variable dimension of this signal: gros has one processor with one RAPL actuator, giving one power measurement $u_s$, dahu has two processors, so we collect two power measurements $u_{s1}$, $u_{s2}$, yeti has four processors, resulting in four power measurements $u_{s1}$, $u_{s2}$, $u_{s3}$, $u_{s4}$.

For power signals, we have a single input to the RAPL actuator and multiple power measurement outputs (SIMO). We observe that the applied power cap never matches the measured one for all sensor measurements, and the discrepancy increases as the applied power cap value increases, with the presence of noise. Based on these observations, we conclude that the accuracy of the RAPL actuator is inadequate, necessitating regulation. For progress signals, we have multiple power inputs with a single progress output (MISO). Part of the noise and fluctuations in power levels influence the application progress. We also observe that increasing the power cap corresponds to increased application progress, indicating a direct correlation between power and progress, and suggesting a linear pattern in the compute-intensive application behavior. However, variations in application progress are observed across different clusters, with more fluctuations, noise, and outlier values evident for yeti compared to the relatively stable responses of gros and dahu. The inaccuracies in the actuator measurements, as well as the variability in the dimensions of the processes (RAPL actuator and the HPC application), are tackled with the robust cascade control formulation.

## III. SYSTEM IDENTIFICATION

Prior to control formulation, we identify both a SIMO model for RAPL actuator and a MISO model for the application progress.

### A. Inner System: Power Actuator

For the inner model of RAPL actuators, as represented in Fig. 1, the input signal $u(k)$ represents the power cap settings for the RAPL subsystems, while the output signals $u_{s_i}(k)$ correspond to the measured power consumption of each subsystem, where $i$ ranges from 1 to $n$ depending on the number of processors in the node. The identification process aims to model the relationship between the power cap settings and the power consumption response for each subsystem, assuming a linear relationship in the z-domain. We select a first-order discrete, time-invariant linear, SIMO model with

a sampling time $T = 0.1s$ for dynamic identification. The output signal can be represented as:

$$ \begin{bmatrix} u_{s1}(k) \\ \vdots \\ u_{s_i}(k) \\ \vdots \\ u_{s_n}(k) \end{bmatrix} = \begin{bmatrix} G_1^{\text{in}}(z) \\ \vdots \\ G_i^{\text{in}}(z) \\ \vdots \\ G_n^{\text{in}}(z) \end{bmatrix} u(k) + \begin{bmatrix} e_{s1}(k) \\ \vdots \\ e_{s_i}(k) \\ \vdots \\ e_{s_n}(k) \end{bmatrix}, \quad (1) $$

where $e_{s_i}(k)$ represents the noise affecting the subsystem. We check if the noises follow a Gaussian distribution and then fit a model with a mean of 0.09, 0.11 and variance of 0.49, 0.81 for dahu, 0.10 mean and 0.47 variance for gros, and of 0.15, 0.08, 0.07, 0.04 mean and 2.87, 2.85, 2.90, 2.75 variance for yeti Fig. 2.

The transfer functions of the RAPL process in the z-domain $G_i^{\text{in}}(z)$ are expressed as:

$$ G_i^{\text{in}}(z) = \frac{b_{0i}^{\text{in}} + b_{1i}^{\text{in}} z^{-1}}{a_0^{\text{in}} + a_{1i}^{\text{in}} z^{-1}}, \quad (2) $$

where the parameters, are estimated using the least-squares fitting approach using the identification data represented in Fig. 2. Table I shows the nominal values of the averaged power signals plant, while the variations reflect the deviation toward the furthest observed power signal plant.

### B. Outer System: HPC Application

The outer loop part of our modeling focuses on the relationship between the measured power and the overall outer loop system progress, as depicted in the block diagram of Fig. 1. The static signal of the progress-to-power changes of dahu cluster in Fig. 3 suggest a linear pattern between the power and the progress. We present static experiments on dahu cluster only due to its stability with minimal fluctuations and noise.

In the dynamic modeling, the system output, represented by $y(k)$, is derived from the aggregation of the outputs of multiple subsystems, each driven by their respective transfer functions. Before averaging, the output signals of the subsystems can be represented in the following form:

$$ \begin{bmatrix} y_1(k) \\ y_2(k) \\ \vdots \\ y_n(k) \end{bmatrix} = \begin{bmatrix} G_1^{\text{out}}(z) & 0 & \cdots & 0 \\ 0 & G_2^{\text{out}}(z) & \cdots & 0 \\ \vdots & \vdots & \ddots & \vdots \\ 0 & 0 & \cdots & G_n^{\text{out}}(z) \end{bmatrix} \begin{bmatrix} u_{s1}(k) \\ u_{s2}(k) \\ \vdots \\ u_{s_n}(k) \end{bmatrix} + \begin{bmatrix} e_{y1}(k) \\ e_{y2}(k) \\ \vdots \\ e_{yn}(k) \end{bmatrix} \quad (3) $$

The final system output $y(k)$ is obtained by averaging these intermediate outputs:

$$ y(k) = \frac{1}{n} \sum_{i=1}^{n} y_i(k) \quad (4) $$
<figure><img src="image_3.png" /><figcaption>Fig. 2. Power and progress signals of the EP Benchmark. The upper signals depict the powercap command signal $u(t)$ and the measured power from the RAPL sensors $u_{s_i}(t)$. The lower signals illustrate the real-time impact of power changes on the progress of the HPC application $y(t)$</figcaption></figure>

$e_{y_i}(k)$ represents the noise affecting the output of each subsystem $y_i(k)$, fit to a Gaussian model of 0.03, 0, 0.39 mean and 0.09, 0.16, 7.33 variance for gros, dahu and yeti, respectively.

For the sake of simplicity, we select linear time-invariant discrete-time MISO dynamic model with a sampling time $T = 0.1s$, chosen for its simplicity and adequacy in capturing the system's essential dynamics especially for higher power values. The transfer function of the open loop system in the z-domain is represented as follows:

$$G_{i}^{\text{out}}(z) = \frac{b_{0i}^{\text{out}} + b_{1i}^{\text{out}} z^{-1}}{a_{0i}^{\text{out}} + a_{1i}^{\text{out}} z^{-1}} \quad (5)$$

To estimate the parameters for each $G_{i}^{\text{out}}(z)$, we use input-output data collected from the computing system in Fig. 2. Like the inner loop, we use least-squares fitting method to identify the model parameters for each transfer function, the parameters, given in Table II, are related to the application configuration and the clusters hardware specifications. The nominal values in the table represent parameters of the averaged power signals plant, while the variations reflect the deviation toward the furthest observed power signal plant.

## IV. CONTROL DESIGN

Our controller design uses cascade control to mitigate actuator inaccuracies using RAPL power measurements, as illustrated in Fig. 1. The block diagram representation of our control architecture with inner (actuator) and outer (HPC system) loops is given in Fig. 4. We adopt Single-Input Single-Output (SISO) controllers to maintain a general, scalable approach that can be easily applied to systems of varying dimensions. To achieve this, we derive SISO models by aggregating Single-Input Multiple-Output (SIMO) and

<figure><img src="image_4.png" /><figcaption>Fig. 3. Static signal of EP benchmark progress changes to the change of powercap values on dahu cluster.</figcaption></figure>

Multiple-Input Single-Output (MISO) models, and express the variability through uncertainty bounds. For both inner and outer controllers, we solve the $H_\infty$ problem to tune the parameters of the state feedback controller, and augment the states with integral actions, ensuring adaptability and enhanced performance.

### A. Aggregated Uncertain Models

For the robust control design, we aggregate the representation of our system from a SIMO (resp. MISO) of variable dimensions to a SISO model with parameters having uncertainty ranges. Aggregating the system to a SISO model reduces computational complexity, simplifies analysis, and makes the controller synthesis more feasible for practical implementation.
<figure><img src="image_5.png" /><figcaption>Fig. 4. Robust Cascade Block Diagram of the System: The Outer loop regulates the progress of the application $y(k)$, where the inner loop regulates the RAPL power measure $u_s(k)$, and both controllers are robust ones.</figcaption></figure>

The resulting transfer functions used for the control tuning are:

$$G^{\text{in}}(z) = \bar{G}^{\text{in}}(z) \pm \Delta G^{\text{in}}(z) = \frac{b_0^{\text{in}} + b_1^{\text{in}} z^{-1}}{a_0^{\text{in}} + a_1^{\text{in}} z^{-1}}, \quad (6)$$

$$G^{\text{out}}(z) = \bar{G}^{\text{out}}(z) \pm \Delta G^{\text{out}}(z) = \frac{b_0^{\text{out}} + b_1^{\text{out}} z^{-1}}{a_0^{\text{out}} + a_1^{\text{out}} z^{-1}}, \quad (7)$$

where the parameters are uncertain:

$$\begin{aligned} b_0^{\text{in}} &= \bar{b}_0^{\text{in}} \pm \Delta b_0^{\text{in}}, & b_0^{\text{out}} &= \bar{b}_0^{\text{out}} \pm \Delta b_0^{\text{out}}, \\ b_1^{\text{in}} &= \bar{b}_1^{\text{in}} \pm \Delta b_1^{\text{in}}, & b_1^{\text{out}} &= \bar{b}_1^{\text{out}} \pm \Delta b_1^{\text{out}}, \\ a_0^{\text{in}} &= \bar{a}_0^{\text{in}} \pm \Delta a_0^{\text{in}}, & a_0^{\text{out}} &= \bar{a}_0^{\text{out}} \pm \Delta a_0^{\text{out}}, \\ a_1^{\text{in}} &= \bar{a}_1^{\text{in}} \pm \Delta a_1^{\text{in}}, & a_1^{\text{out}} &= \bar{a}_1^{\text{out}} \pm \Delta a_1^{\text{out}}. \end{aligned} \quad (8)$$

These parameters represent the average values of all identified models, plus uncertainty that need to be taken into account when tuning the controller gains. The uncertainties are bounded and represent the worst case of all power measures, as we take the maximum value that is far from the nominal model as the value of the uncertainty bound. Their impact on system robustness and stability must be addressed to ensure reliable control performance.

Note that while we compute aggregated uncertain models for control design, the validation of our approach will be done in simulation on the SIMO/MISO models of Section III.

## B. Robust Control

Given the uncertainties and parameter variations in our system, a robust control approach is essential to ensure stability and maintain desired performance across a wide range of operating conditions.

Our system has uncertain parameters in both the inner and outer loops, representing variations in power measurements as explained earlier in Section IV-A. The objective is to drive the response of the system to a given reference while maintaining stability in closed-loop. At the same time, the goal is to minimize the effects of disturbances, measurement noises, and avoid actuator saturation. This should be achieved despite modeling uncertainties, parameter changes, or shifts in the operating point for all perturbed plants around the nominal model, up to the worst-case model uncertainty.

We transform from the system's discrete model to a continuous representation and use the $\mathcal{H}_\infty$ approach introduced by Doyle [20]. The use of continuous theory for control design followed by discretization of the controller is justified here because our sampling time is significantly lower than

the response time of our system. The control objective is to minimize the $\mathcal{H}_\infty$ norm of the closed-loop system from external variables (references, disturbances, noises) $w$ to the performance output $z$, as illustrated schematically in Fig. 5. Here, $P$ is the generalized plant (which contains the plant and the uncertainties), and $K(s)$ is the controller to be designed. Note that we augment the state-space representation with integral action, thus the state feedback controller $K(s)$ corresponds to a PI controller (since we consider SISO systems). The closed-loop transfer matrix from $w$ to $z$ is given by:

$$T_{z\omega}(s) = P_{11} + P_{12}K(s)(I - P_{22}K(s))^{-1}P_{21} \quad (9)$$

where the matrices $P_{11}$, $P_{12}$, $P_{21}$, $P_{22}$, of appropriate dimensions, are the elements of the generalized plant $P$ from Fig. 5.

<figure><img src="image_6.png" /><figcaption>Fig. 5. General Robust control Configuration</figcaption></figure>

We solve the $\mathcal{H}_\infty$ sub-optimal problem to find a controller $K(s)$ which, based on the information in the measured output, $r_\epsilon - y$ here, generates a control signal $u$ that counteracts the influence of $w$ on $z$, thereby minimizing the closed-loop norm from $w$ to $z$, such that:

$$\min \gamma \text{ s.t.} \quad \|T_{zw}(s)\|_{\infty} = \left\| \frac{W_e S}{W_u K(s) S} \right\|_{\infty} \le \gamma \quad (10)$$

where $W_e$ and $W_u$, the weights on the controlled output $z = (z_1, z_2)^T$, are taken as identity matrices of the appropriate dimensions, to specify performance requirements on the tracking error and the actuator, respectively. The sensitivity functions are defined as usually: $S = \frac{r_\epsilon - y}{r_\epsilon}$, which measures how well the reference input $r_\epsilon$ is tracked by the output $y$, and $K(s)S = \frac{u}{r_\epsilon}$, which indicates how the control signal $u$ relates to the reference $r_\epsilon$ [21], [22].

The idea is to define two new virtual controlled outputs as $z = (z_1, z_2)^T = (S r_\epsilon, K(s) S r_\epsilon)^T$

where the first one is related to the tracking error while the second one to the actuator force. In our case they are given the same importance on the controlled output. Using the mixed sensitivity, the corresponding $\mathcal{H}_\infty$ suboptimal control problem is therefore to find a controller $K(s)$ such that Eq. (10) holds.

## C. Robust Cascade Control

Cascade control improves closed-loop performance over single-loop structures [23], [24]. Control dynamics are divided into fast and slow components, with fast dynamics linked to actuators and slow dynamics to the overall process [25]. The key advantage of cascaded control is its ability to isolate and manage different types of noise or disturbances more effectively. In our system, with the cascade structure,
the RAPL controller, being part of the inner loop (secondary) with faster dynamics handles rapid local disturbances and power management uncertainties, while the outer loop (main) manages slower, system-wide changes affecting application progress

Figure 4 shows the cascade block diagram of the target system. The cascade control scheme consists of an inner loop and an outer loop. The inner loop system is the RAPL actuator $G^{\text{in}}$ with a controller $K^{\text{in}}(z, \rho_1)$ that takes the powercap command signal $u_{\text{out}}(k)$ generated by the outer loop controller as its set-point to adjust the power signal $u_s(k)$. The outer loop has a controller $K^{\text{out}}(z, \rho_2)$ that takes the reference value $r_\epsilon$ to adjust the progress output $y(k)$ of the system $G^{\text{out}}$. The controllers $K^{\text{in}}(z, \rho_1)$ and $K^{\text{out}}(z, \rho_2)$ are both robust PIs (Proportional-Integral), as presented in Section IV-B. This kind of cascade PI controllers are widely used in practical situations involving cascade control [26]. $K^{\text{in}}$ and $K^{\text{out}}$ are PI controllers parameterized as :

$$K^j(z, \rho^j) = \rho^j \bar{K}(z) \quad (11)$$

where $j \in \{\text{in, out}\}$, and $\rho^j$ and $\bar{K}(z)$ are defined as :

$$\rho^j = \begin{bmatrix} k_p^j \\ k_i^j \end{bmatrix}, \quad \bar{K}(z) = \begin{bmatrix} \frac{1}{1-z^{-1}} \\ \frac{1}{1-z^{-1}} \end{bmatrix}. \quad (12)$$

Their respective control actions are given as :

$$\begin{aligned} u^{\text{in}}(k) &= K^{\text{in}}(z, \rho^{\text{in}}) (u_{\text{out}}(k) - u_s(k)) \\ u^{\text{out}}(k) &= K^{\text{out}}(z, \rho^{\text{out}}) (r_\epsilon - y(k)) \end{aligned} \quad (13)$$

To find the controller parameters, we first tune the inner loop controller gains $k_p^{\text{in}}$ and $k_i^{\text{in}}$ by solving the suboptimal $H_\infty$ control problem described in the previous subsection that is robust to all perturbed plants (with uncertainty ranges). Then, after getting the inner loop controller gains, we use the resulting closed-loop system to tune the outer loop controller gains $k_p^{\text{out}}$ and $k_i^{\text{out}}$ using the same $H_\infty$ approach. Finally, a step of discretization of the controller is needed.

## V. EVALUATION

First we validate the aggregated uncertain models on real experimental data, then we evaluate the presented robust cascade control in comparison with the state of the art.

### A. Models accuracy

To evaluate the model we apply a random powercap command signal $u(k)$, and evaluate both models: RAPL actuator and HPC EP-benchmark, both first order discrete time dynamic models. The values of the parameters in Eq. (8) are given in Table I and Table II. Due to lack of space, only the results on dahu are illustrated in Fig. 6, with uncertainty ranges for both models, while only mean errors are given for the other clusters. The top plot is the random command applied; the middle plot presents the two measures of the actuator action $u_1$ and $u_2$, as well as the uncertain model; the bottom plot depicts the output $y$ and its uncertain model.

For the RAPL actuator, as can be seen in the middle plot of Fig. 6, the nominal model closely fits the experimental data, achieving a mean squared error (MSE) of 7.503 W to

<figure><img src="image_7.png" /><figcaption>Fig. 6. Validation random plan data of the powercap signal and the power measure signal with the linear model on dahu cluster</figcaption></figure>

the averaged signal of $u_{s_1}$ and $u_{s_2}$. The uncertainty ranges successfully capture the extreme values of the two signals $u_{s_1}$ and $u_{s_2}$, as well as the poorly modeled data points. For the other RAPL actuator of gros and yeti clusters, the nominal models also fit well, with MSE values of 5.218 W and 17.266 W, respectively, to the averaged signals.

For the application progress, as can be seen in the bottom plot, the nominal model takes as input the average of the measured power $u_s$ and fits the progress measure with MSE of 4.0097 Hz, where the uncertainty range covers the regions where the model's performance deviates from the actual signal, with the exception of significant spikes or drops, which are attributed to disturbances. For the other clusters gros, and yeti we get an MSE of 0.6661 Hz, and 13.6219 Hz, respectively.

<table><caption>TABLE I
MODEL VALUES FOR INNER LOOP</caption><thead><tr><th>Cluster</th><th><i>b</i><sub>0</sub><sup>in</sup></th><th><i>b</i><sub>1</sub><sup>in</sup></th><th><i>a</i><sub>0</sub><sup>in</sup></th><th><i>a</i><sub>1</sub><sup>in</sup></th></tr></thead><tbody><tr><td><i>gros</i></td><td>0.8934 ± 0.002</td><td>0</td><td>1</td><td>0.07 ± 0</td></tr><tr><td><i>dahu</i></td><td>0.5 ± 0.008</td><td>0</td><td>1</td><td>-0.4 ± 0.06</td></tr><tr><td><i>yeti</i></td><td>0.49 ± 0.02</td><td>0</td><td>1</td><td>-0.44 ± 0.04</td></tr></tbody></table>

<table><caption>TABLE II
MODEL VALUES FOR OUTER LOOP</caption><thead><tr><th>Cluster</th><th><i>b</i><sub>0</sub><sup>out</sup></th><th><i>b</i><sub>1</sub><sup>out</sup></th><th><i>a</i><sub>0</sub><sup>out</sup></th><th><i>a</i><sub>1</sub><sup>out</sup></th></tr></thead><tbody><tr><td><i>gros</i></td><td>0.16 ± 0.06</td><td>0</td><td>1</td><td>0.09</td></tr><tr><td><i>dahu</i></td><td>-0.01 ± 0</td><td>0.2 ± 0.07</td><td>-0.16 ± 0.14</td><td>1</td></tr><tr><td><i>yeti</i></td><td>0.37 ± 0.33</td><td>0</td><td>1</td><td>-0.17 ± 0.16</td></tr></tbody></table>

### B. Control Results

For the control evaluation, we compare the simulation results of the Robust cascade controller described in Section IV with the PI controller used in the state-of-the-art [11] to control a memory-bound benchmark. In [11], the PI is used
on a single loop on the HPC system, i.e, the RAPL actuator
is not modelled.

For the Robust Controller we use LMI approach to solve the $H_\infty$ problem using sedumi solver on the uncertain plant and we obtain $k_p^{\text{in}} = 18.5$, $k_i^{\text{in}} = 77.8$ for the inner loop controller with a $\gamma = 0.5e-04$ and a $k_p^{\text{out}} = 3.7$, $k_i^{\text{out}} = 77.8$ for the outer loop controller with a $\gamma = 0.3394$. The tuning of the single loop PI to which we compare is done using pole placement [11]. To adapt the control to our compute-intensive benchmark, we use our nominal SISO model of the HPC system $\bar{G}^{\text{out}}(z)$ for the tuning. The resulting parameters of the single loop PI controller are $k_p = 3$, $k_i = 6$.

The control simulation scenario is the following: first we
set the degradation factor to zero (full performance, around
26Hz for dahu), then require a degradation of $\epsilon = 0.10$ then
0.20 in the reference value, before going back to normal full
performance behavior, see top plot of Fig. 7. We compare
the two control approaches in the presence of the inner loop
noise only to to evaluate the effectiveness of cascade control
in minimizing its impact on the outer loop.

For both loops, we choose the control requirements to
meet stability, a settling time (5% of the final value) $Ts \le 3s$
and an overshoot $M_p \le 15\%$. We set the initial conditions
to zero for both controllers.

<figure><img src="image_8.png" /><figcaption>Fig. 7. System Response and Control action in simulation for a robust cascade control design with two PI's for all perturbed plants and the nominal system compared to a single loop PI [11] on dahu cluster.</figcaption></figure>

In the upper plot of Fig. 7, we see that all plants with
maximum uncertainty (i.e. the perturbed plants, computed
with the maximum uncertainty for the static gain and time
constant), the nominal plant, as well as the single loop plant
meet the control requirements and converge to the desired
value. All the plants tuned with the robust cascade controller
are faster. They also are not sensitive to the inner loop noise,

unlike the single loop controller in [11]. In the lower plot, we
present the control action of the outer loop controller $u_{\text{out}}$, for
the robust cascade design applied to the nominal plant, with
the control action of the single-loop PI controller, along with
the power measurement response of the inner loop, $u_s$, which
converges to the input of the outer loop system, $u_{\text{out}}$. Finally,
the plot also illustrates the control action of the robust inner
loop controller, $u_{\text{in}}$. We observe that the inner control is
efficient: the power measure $u_s$ closely fits its reference value
$u_{\text{out}}$. Note also that the control action reacts faster with the
cascade control than with the single loop PI.

These results confirm the ability to save energy without
loosing too much performance for the HPC application using
control: between 5 to 10s, a reduction of 10% of performance
allows a reduction of the power used ($u_s$) of about 25%,
compared to a run at full speed (125W for dahu cluster).

In conclusion, we observe that the cascade control schema
allows to efficiently compensate for the actuator inaccuracies,
and the robust design allows handling noise and provides
general approach for all clusters, despite the variability in
the dimension of the signals. Due to length constraints, we
only provide the plot for dahu but the results are similar for
the other clusters.

VI. LIMITATIONS AND FUTURE WORK

In this section, we discuss the limitations of our current
work and outline directions for future research. As next
step, we plan to evaluate the performance of the control
design in the presence of disturbances, outer loop noises
and a wider range of uncertainties. Additionally, we aim
to explore different approaches to solve the $H_\infty$ control
problem, including a fully discrete approach, and compare
the results to identify the most effective solution. The current
model does not fully capture the impact of complex non-
linearities that are typical in real-world scenarios, see Fig. 3
for low powercap values. Addressing this limitation in future
work could involve using advanced uncertainty quantification
techniques to enhance the robustness and accuracy of the
model. The EP application considered in this work represents
the computing phases of complex applications. In future
work, we extend our control design to more complex appli-
cations that switch between multiple phases, such as memory
access, and I/O, and their behavior is significantly different.
These applications behave also differently when they run
on different clusters with different hardware specifications.
This would involve employing hybrid control approaches
for switching systems, to design a global controller that
effectively manages such mixed-phase systems.

VII. CONCLUSION

This paper presents a general approach for power control
of High-Performance Computing (HPC) processors, able to
handle the variable dimension of the signals across comput-
ing clusters. The presented approach uses a robust cascade
design with two state-feedback controllers with integral
action. The first controller addresses the inefficiencies in
the RAPL actuator, and reduces the effects of the inner
loop noise on the outer loop system response. The outer control allows meeting the desired performance level for the HPC application. Using robust design for both the inner and outer loops, the control architecture meets the performance requirements for all perturbed plants, and ensures a good reference tracking. This design provides a good balance between saving power and maintaining acceptable performance for HPC applications.

## ACKNOWLEDGEMENTS

This work was supported by PULSE project, in collaboration with Inria, Qarnot computing and Ademe. Experiments presented in this paper were carried out using the Grid'5000 testbed (see https://www.grid5000.fr) by Jonathan Bleuzen.

The authors would like to thank Professors Olivier Sename (GIPSA-lab, Grenoble), Daniel Coutinho (Pontifícia Universidade, Brazil), Raphaël Bleuse (CTRL-A, Grenoble), Eric Rutten (CTRL-A, Grenoble), and Lionel Seinturier (Spirals, Lille) for their valuable comments and discussions.

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