# PCBnCO: A Carbon Intensity Model of FR-4 Printed Circuit Boards Based on Company Data

Pierre Le Gargasson, Maxime Pelcat, Nicolas Beuve, Muriel Pressigout, Luce

Morin, Daniel Menard

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Pierre Le Gargasson, Maxime Pelcat, Nicolas Beuve, Muriel Pressigout, Luce Morin, et al.. PCBnCO: A Carbon Intensity Model of FR-4 Printed Circuit Boards Based on Company Data. 2025 IEEE Conference on Technologies for Sustainability (SusTech), IEEE, Apr 2025, Los Angeles, CA, United States. 10.1109/SusTech63138.2025.11025732. [hal-05054490](https://hal.science/hal-05054490v1)

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Distributed under a Creative Commons Attribution 4.0 International License
PCBnCO: A Carbon Intensity Model of FR-4
Printed Circuit Boards Based on Company Data

Pierre Le Gargasson, Maxime Pelcat, Nicolas Beuve, Muriel Pressigout, Luce Morin, Daniel Menard

Univ. Rennes, INSA Rennes

CNRS, IETR - UMR 6164

F-35000 Rennes, France

pierre.le-gargasson@insa-rennes.fr

***Abstract***—This paper examines available data to model the carbon intensity of Printed Circuit Boards (PCBs). Our aim is to provide insight into PCB design decisions and highlights the need for more robust data to enhance the accuracy of Life Cycle Assessment (LCA) of PCBs. A study of the literature reveals significant variations in reported results. To achieve a more accurate estimate of carbon intensity, we propose two approaches. First, we analyze the annual reports of the world's leading PCB manufacturers to determine an overall gate-to-gate carbon intensity. Second, independently of the first, we develop a cradle-to-gate carbon intensity model based on the number of layers. Additionally, we localize the PCB production by standardizing the electricity mix.

***Index Terms***—electronics industry, printed circuit board, carbon footprint, global warming potential, life cycle assessment.

## I. INTRODUCTION

Climate change is now a phenomenon whose effects, such as rising average temperatures and more frequent extreme weather events, are observed in our everyday life. According to the Intergovernmental Panel on Climate Change (IPCC) [1], climate change is caused by global warming, which is induced by greenhouse gas (GHG) emissions caused by human activities. Reducing current GHG emissions is the main driver to limit the threat related to climate change. Concluded in 2015, the Paris Agreement<fnref n="1" /> stipulates to pursue efforts to maintain global warming under 1.5°C. As a consequence, the GHG emissions of human activities have to be reduced by an estimated factor of seven times before 2050 [2].

Electronics is a highly dynamic and technological industrial sector. In 2024, the electronics sector is expected to produce over 8 billions of consumer devices, including TV, smartphones, computing devices and drones<fnref n="2" />. The environmental impact of these devices is most of the time dominated by their manufacturing phase [3]. Electronic hardwares are centered around one or a small set of PCBs, thin plates supporting components and electrical connections. As mentioned by [4],

PCB environmental studies are few and the subject of their environmental impact requires more research attention. This article focuses on the carbon intensity of manufacturing unmounted PCBs, i.e. electronic boards not yet soldered with components. Indeed, a PCB can account for 25% of the manufacturing carbon impacts of a mounted PCB [5].

Carbon intensity is used as a generic term for GHG emissions related to a reference amount, here a square meter. Emission of any GHG is converted into a standard emission metric per square meter, $kg CO_2e/m^2$, corresponding to a global warming impact equivalent to an amount of $CO_2 per square meter$ over a period of 100 years. The carbon footprint covering the whole life cycle except the use phase is denoted as *embodied GHG emissions* by contrast with the indirect use phase emissions that are caused by powering the device.

Most PCB LCAs in the literature rely on inventories modeled using databases. Carbon assessments converted into the reference unit of $kg CO_2e/m^2$ shows considerable variation, highlighting data limitations and inventory challenges. Improving carbon intensity assessment of PCBs is essential to facilitate the eco-design of electronic devices.

In this paper, we propose new models of the GHG emitted by fabricating a Plated Through-Hole (PTH) Flame Retardant 4 (FR-4) PCB. The first model is based on manufacturers annual reports and the second is an affine function of the number of layers based on two LCAs of PCBs. To the extent of our knowledge, this paper is the first study to propose and assess an adaptable PCB carbon intensity model on a cradle-to-gate scope, i.e. from ore extraction to loading dock of the factory. The proposed model, representing the most common fabricated PCB, is intended to be used in LCAs of devices and by PCB designers to evaluate the design under conception.

This paper is organized as follows. First, Section II examines the existing models in the state of the art and the limitations of the current approaches. Afterwards, Section III details the manufacturing process of PCBs. In Section IV, a carbon intensity model based on manufacturer annual reports is proposed. Finally, Section V details the second carbon intensity model exploiting two LCA of PCBs.

This study has been partially funded by the France2030 ESOS Project (Electronics: Sustainable, Open and Sovereign), operated by French ANR (Agence Nationale de la Recherche).

<footnote n="1">¹The Paris Agreement, 2016, https://unfccc.int/sites/default/files/resource/parisagreement_publication.pdf?download, accessed 2024-10-28</footnote>

<footnote n="2">²Statista electronic pieces volume, Jun 2024, https://fr.statista.com/outlook/cmo/consumer-electronics/worldwide#volume, accessed 2024-09-11</footnote>
## II. STATE OF THE ART

In this section, after a brief overview of LCAs related to electronic boards, the carbon intensity of single PCBs reported in the literature are reported.

### A. Electronic boards

An electronic board refers to the assembly of a PCB and its cabled components, commonly known as Printed Circuit Board Assembled (PCBA).

The table I lists 3 examples of electronic devices LCAs. A Dell personal computer [5], the Fairphone 5 smartphone<fnref n="3" /> and the PCBAs of a domestic induction hob [6]. The *Global Warming Potential (GWP)* column compares the use phase to the production phase. Outstanding amount goes to transport, end-of-life and other categories. The *production attribution* column shows the distribution between components and PCB, mounting included, of GWP during the production phase.

<table><caption>TABLE I
EXAMPLES OF PUBLISHED GWP ATTRIBUTIONS FOR ELECTRONIC BOARDS.</caption><thead><tr><th rowspan="2">Device type</th><th colspan="2">GWP(%)</th><th colspan="2">Production attribution(%)</th></tr><tr><th>Use</th><th>Production</th><th>Components</th><th>PCB<sup>a</sup></th></tr></thead><tbody><tr><td>Computer [5]</td><td>9.2<sup>b</sup></td><td>76.5</td><td>76<sup>c</sup></td><td>24<sup>c</sup></td></tr><tr><td>Smartphone<sup>3</sup></td><td>15.6<sup>d</sup></td><td>77.6</td><td>91.4</td><td>8.6</td></tr><tr><td>Induction hobs [6]</td><td>95.7<sup>e</sup></td><td>4.3</td><td>70.6</td><td>29.4</td></tr></tbody></table>

a including mounting, b 5-years, c motherboard only, d 3-years, e 15-years

Depending on the device type and the use phase scenario, the GWP associated with the PCB of an electronic product can vary significantly, to 25% as seen in the Section I. Nonetheless, according to the Prismark PCB report for 2021⁴, the 464.1 million m² annual production volume of PCBs justifies further research in this area.

### B. Single PCB

Moving forward to single PCB analysis, studies specifically examine the impacts of PCBs. These papers focus on the most common type of PCB for which the plate is mainly composed of fiberglass and epoxy resin, so-called FR-4, and drills are PTH, i.e. all drill holes systematically go through all the layers and connect to the relevant electrical potential. This type of PCB is called PTH FR-4. According to the Prismark report<fnref n="4" />, the PTH FR-4 PCB represents roughly 68% of the world production. This paper focuses on this type of PCB for a sound comparison. All previous studies on PCB of type PTH FR-4 have been collected and the provided GHG emissions values have been converted into a single reference unit, kg CO₂e/m². Articles not providing PCB surface data were thus not reported.

The table II lists the different PCB LCAs extracted from literature, scaled to a kg CO₂e/m² reference unit, and classified by number of layers and source database.

1) *Ecoinvent*: The studies [7] [8] [9] [10] are based on different old versions of ecoinvent database, whose scope is cradle-to-gate. Ecoinvent-based samples are completed with a six-layer PCB activity<fnref n="5" />, valid for the period of time 2003 to 2023, assessed with the more recent ecoinvent v3.10 (2023) Environmental Footprint v3.1 (EF v3.1) method.

When comparing previous values, substantial variations in published ecoinvent-based data can be observed. These variations can be explained by the fact that each author reproduces PCB manufacturing detailed inventory by one's own interpretation. Unfortunately, due to the highly technological process of PCB manufacturing and to the focus of the papers that are not centered on FR-4 precise assessment, authors only assign partial materials and energy amounts such as fiberglass, epoxy and copper. Final numbers correspond to a partial amount of the ecoinvent six-layers PCB activity. However, studies tend to forget inputs such as chemicals, and production scraps for which manufacturers are the only ones to know the correct amount. Other key parameters for assessing carbon impact are the PCBs number of layers and the considered scope.

2) *GaBi*: In [11], authors sample several PCB stackups of the GaBi database to analyse their carbon intensity. They find an affine function between GWP and number of layers, from 1 to 16 layers. The affine relationship extracted from the article has the following form:

$$y_{GWP} = 0.6158n + 1.2472 \quad (1)$$

where $y_{GWP}$ is expressed in kg CO₂e/25cm² and n is the number of PCB layers. In this paper, after scaling, carbon intensity starts at 745.20 kg CO₂e/m² for a single-layer PCB and reaches 2,469.44 kg CO₂e/m² for a 8-layers PCB, as reported in table II. These amounts are thus considerably larger than in other published studies. The large difference between ecoinvent and GaBi database evaluations can be explained by two different LCA scopes. Ecoinvent studies refer to a cradle-to-gate scope while the GaBi study refers to a cradle-to-gate plus end-of-life scope. Nevertheless, the large gap between the two database results cannot be attributed solely to this difference. The waste management usually represents less than 2% of PCB carbon intensity [12].

The State of the art synthesized in the Table II reveals significant variance in the assessed carbon intensity. These differing values can be attributed to a lack of data and the challenges in understanding the PCB manufacturing process, which leads to an incomplete inventory that omits factors such as chemicals and energy consumption.

This observation motivates the strategy of the current paper to evaluate the carbon intensity of PTH FR-4 PCB fabrication. First, a global model based on information disclosed by manufacturers is provided. Second, a model that considers the number of layers is developed. Before that, the manufacturing process of a PTH FR-4 PCB is introduced.

<footnote n="3">³https://www.fairphone.com/wp-content/uploads/2024/09/Fairphone5_LCA_Report_2024.pdf, accessed 2024-10-22</footnote>

<footnote n="4">⁴https://www.prismark.com/pcb-sample-report, p21, accessed 2024-10-31</footnote>

<footnote n="5">⁵https://ecoquery.ecoinvent.org/3.10/cutoff/dataset/9764/documentation, accessed 2024-10-01</footnote>
<table><caption>TABLE II
PUBLISHED EMBODIED CARBON INTENSITIES OF FR-4 PRINTED CIRCUIT BOARD MANUFACTURING.</caption><thead><tr><th rowspan="2">Layers number</th><th colspan="2">Carbon intensity<sup>a</sup> (kg CO<sub>2</sub>e/m<sup>2</sup>)</th></tr><tr><th>ecoinvent<sup>b</sup></th><th>GaBi<sup>c</sup> eq. (1) [11]</th></tr></thead><tbody><tr><td>1</td><td>18.60 [7]</td><td>745.20</td></tr><tr><td>2</td><td></td><td>991.52</td></tr><tr><td>4</td><td>34.31 [8]<br>39.20 [9]</td><td>1,484.16</td></tr><tr><td>6</td><td>31.90 [10]<br>104.80<sup>5</sup></td><td>1,976.80</td></tr><tr><td>8</td><td></td><td>2,469.44</td></tr></tbody></table>

a normalized values, b cradle-to-gate, c cradle-to-gate + end-of-life

### III. PCB TECHNOLOGY AND LCA METHOD

This section describes the PCB manufacturing process and LCA method to highlight key environmental and methodological hot spots. The PCB manufacturing process guides our choices for the proposed carbon intensity model of a PCB.

#### A. PCB

This description of the PCB manufacturing processes is a synthesis of data collected from literature [13], professional interviews and factory visits. Formerly, electronic device components were cabled by electrical wires. Increasing complexity and density have led to the PCB technological solution. A PCB mechanically supports and electrically connects electronic components with each other. The number of layers of a PCB is defined by its number of conductive layers. Conductive jump from one layer to another is ensured by a metalized hole called Vertical Interconnect Access (via).

1) PCB stackup: The PCB stackup, i.e. the layering organisation of its different materials and their thicknesses, depends on the requirements of the mounted components and on Electromagnetic Compatibility (EMC) constraints. Layers alternate conductive and dielectric sheets. A conductive sheet is exclusively made of copper to conduct electricity, while a dielectric sheet is made of a so-called pre-impregnated (prepreg), which is a semi-finished composite product consisting of a thermosetting resin or a thermoplastic polymer impregnating a reinforcement material. Pre-impregnated is most of the time made of epoxy resin, fiberglass, and a flame retardant material [14]. Fiberglass and epoxy resin concentration vary to adjust the dielectric characterization. This parameter influences the electromagnetic response of the PCB wires for high frequency applications, over gigahertz, for applications such as radio-frequency or satellite communications. Simple-sided stackup refers to a PCB composed of one copper layer over a prepreg. Double-sided stackup include two copper layers, disposed on top and bottom of a prepreg. Over two layers, i.e. four, six, eight, ten and more layers, stackup is called multilayer PCB. A Core designates a structure similar to a thin double-sided PCB. Core is made of a prepreg sheet laminated with two copper sheets on top and bottom. The core is the base material to build

PCB inner layers. Multilayer PCB is an alternate assembly of cores and prepreg surrounded by copper sheets for outer layers.

The sectional view of materials used, revealing the order of assembly and the thickness of sheets after lamination process, is called a stackup. A stackup is illustrated in Fig 1.

<figure><img src="image_2.png" /><figcaption>Fig. 1. Sectional PCB stackup example, 6 layers FR-4 at lamination step, before pressing. Inner layers are etched, revealing tracks and plans. Holes are drilled in the next step.</figcaption></figure>

2) PCB manufacturing: The manufacturing process is based on panel-format materials, which embeds the single PCBs, as illustrated in Fig 2. Fig. 3 summarizes the manufacturing process of a conventional multilayer PCB based on FR-4 materials and PTH via. The term of FR-4 regroups all PCB based on fiberglass and epoxy resin materials, at the opposite of PCB based on paper materials. The manufacturing process is made by panel from steps 1 to 7.

A multilayer PCB fabrication starts by engraving cores at step 1. Copper tracks are created by a photo-engraving technique which uses protection films and chemical processes to etch copper. Once each core has been engraved, the lamination, step 2, consists to stack cores with prepreg sheets in between and add two outer copper layers, as shown in Fig 1. Then, the obtained stackup goes through a high temperature and high pressure cycle to melt the epoxy resin of prepreg. Lamination is particularly energy-intensive, requiring heating to nearly 200°C and sustained pressure for several hours. After cooling, PCB layers remain glued to each other and the PCB base plate is formed, embedding the etched inner layers. The next step, 3, is the fabrication of vias. First, holes are drilled. Then, step 4, the PCB is immersed in a metallization solution to electrolytically depose copper on all PCB surface, including via cavities, interconnecting layers. Step 5, outer layers are then photo-engraved employing the same process as for the inner layers. PCB is electrically complete. Step 6, soldermask is applied on outer layers to protect and insulate copper. Silkscreen legend is also printed and hardened. Components pads are left open and a surface finish, step 7, is added on pads to protect copper against oxidation and to facilitate component cabling. Step 8, single PCBs are then cut out to separate them from the panel. The remaining panel material, such as panel edges or the separation
between PCBs, becomes waste. Reducing panel waste improves
the production yield.

Cleaning is processed between each steps, that can use
physical tools such as brushes and self-adhesive roller, or pu-
rified water. During the fabrication process, manufacturers run
quality inspections to check properties such as layer alignment,
engraving precision or layer thickness.

<figure><img src="image_3.png" /><figcaption>Fig. 2. Illustration of a manufacturing panel embedding single PCBs. Dark green area becomes waste at the end of the production.</figcaption></figure>

<figure><img src="image_4.png" /><figcaption>Fig. 3. Simplified manufacturing flow for a multi-layered plated through-hole PCB with *N* layers.</figcaption></figure>

The use of more complex vias such as blind, buried or micro vias adds manufacturing steps. The use of these complex vias categorizes the PCB in the High Density Interconnect (HDI) domain which is outside the scope of this article.

Every step, from applying photoresist and etching copper to
laminating prepreg and cleaning the PCB, consumes significant
amounts of chemicals and energy to achieve the desired PCB
design. These processes have environmental impacts. Measur-
ing these impacts is essential to identify environmental hot
spots and advance toward sustainability.

B. LCA

Evaluation of GHG emissions is performed through LCA.
LCA is a standardized method that evaluates the environmental
impacts of a product or a service [15]. It relies on databases
containing elementary inputs, such as ore, right through to
advanced models, such as manufacturing of a product. Two
of them are cited in this paper, ecoinvent [16] and Sphera,
formerly GaBi<fnref n="6" /> acquired in 2019⁷. The LCA practitioner in-
ventories materials and energy inputs of the product at hand in
order to derive its impacts. LCA tools and databases are then
employed to compute impacts in standard units defined by so-
called mid-point impact categories (global warming potential,
groundwater use, land use, eco-toxicity, etc.) [17]. LCA results
give to the practitioner an overview of the product environmen-
tal footprint [18]. While LCA has been used in electronics for
several decades, it is limited to a small community of LCA
practitioners specialized in electronics.

Evaluating the GHG emissions of PCBs manufacturing pro-
cess is challenging because:

1) many materials and many steps are involved in the fabrication of a PCB [19],

2) industrial disclosure on the subject is limited, due to manufacturing secret [20].

Research related to environmental impacts of electronics is
however getting traction. The next section introduces an initial
approach.

IV. AVERAGE RECOMMENDATION OF CARBON INTENSITY
OF PTH FR-4 PCBS FROM COMPANY REPORTS

As a first contribution, this section proposes to exploit
the available industrial data to average a PCB manufacturing
carbon intensity according to an average stackup and different
locations.

A. Average gate-to-gate PTH FR-4 PCB carbon intensity per $m^2$ extracted from manufacturers reports

In the standardized LCA procedure, after goal and scope
definition of the study, the practitioner inventories input mate-
rials and energy [21] [22]. The best method to assess carbon
intensity would be to inventory each materials input and to
measure the energy consumed by each step to produce one
square meter of PCB. PCB manufacturing requires many highly
technological steps, using several materials and energy from
ore extraction. Unfortunately, there is a lack of available data
on detailed measurement of materials and energy consumed by
manufacturers.

To tackle this lack of data, PCB manufacturers annual reports
have been analyzed. These reports inform about scope 1 (direct
GHG emissions from production) and scope 2 (indirect GHG
emissions from purchased energy) of companies, or so-called

<footnote n="6">⁶http://gabi-6-lci-documentation.gabi-software.com/xml-data/external_docs/GaBiModellingPrinciples.pdf, accessed 2024-10-22</footnote>

<footnote n="7">⁷https://sphera.com/company/news/sphera-completes-acquisition-of-thinkstep/, accessed 2024-10-22</footnote>
gate-to-gate GHG emissions. Each year, world top manufacturers declare their GHG emissions, energy consumption, water consumption, as well as emitted wastes. The most transparent companies, like KCE Electronics<fnref n="8" />, reports data including PCB production quantities, and sometimes, although rarely, by stackup. Reviewing the annual reports of the 25 largest PCB manufacturers from 2020 to 2023, the eleven manufacturers declaring both PCB area production and GHG emissions and/or carbon intensity have been retained. From the annual extracted reports values, the GHG emitted by companies before applying sustainable actions are considered. This approach excludes in particular renewable energy use or carbon credits purchase. Considered factories are all located in three Asian countries: China, Taiwan and Thailand. A total of 35 samples have been collected over 4 years. Carbon intensity is scaled into the same reference unit in kg CO₂e/m² and summarized in Fig. 4. The 4 whiskers on the left synthesis annual reports per year while the whisker on the right synthesises the 4 years in one whisker. The three blue 'x' markers are inconsistent values and are excluded from analysis. The absolute range of values starts at 27 kg CO₂e/m² and ends at 383.41 kg CO₂e/m². The highest value difference between 2022 and 2023 is explained by a boundary adjustment of one company, Unimicron. Unimicron has modified the list of its own assessed factories. The average carbon intensity of the 35 samples have been computed. It accumulates 11.785 million t CO₂e and 84.69 million m², illustrated by the red line at 139.15 kg CO₂e/m².

<figure><img src="image_5.png" /><figcaption>Fig. 4. Gate-to-gate carbon intensity declared by 11 of world top 25 PTH FR-4 PCB manufacturers in their annual reports. Red line is the average when merging all years.</figcaption></figure>

On Fig. 4, box-and-whisker plots give information on values range and median per year. One has to take into account that the period under review includes COVID-19 lockdown. While medians and average tend to coincide, the range of values is wide, by a factor of 14, for the selected manufacturers.

Nevertheless, this big difference can be partly explained by the efficiency of manufacturing processes, but also by the method used to collect data and the way in which they are published. As external reviewers depending on accessible data, we face difficulty to analyze which element has the greatest influence. However, this underlines the need for companies to harmonize practices in publishing annual reports in order to have consistent data, enabling the possibility to compare them accurately. By now, we have an overview of the carbon intensity declared by the PCB industry. Then, we go deeper in details to link these data with a PCB stackup and to localize emissions.

## B. Average PCB stackup

Most of manufacturers annual reports do not link their produced PCB area with its related stackup. To improve the PCB overview, Table III details the average stackup estimation issued from the Prismark PCB report⁴ which localizes PCB production per stackup for the year 2021. This estimation focuses on PTH FR-4 PCB localized in Thailand, Taiwan and China, and consider the stackups ranging from one-sided composite to 18+ multilayer. The report organizes production data for stackups with 8-16 and 18+ layers into two categories. For these two categories, we attribute the related average production into single category from 8 to 20 layers, preserving the total production amount. The weighted average stackup of produced PCBs is 3.9 layers.

## C. Normalizing PCB carbon intensity to global localization

At this stage, PCB production relates to Asian countries. In this Section, the average carbon intensity of Fig. 4 is normalized to Global based on electricity mix. Indeed from annual reports, PCB manufacturers attribute 93% of their GHG emissions to scope 2, which relates to energy consumption. Energy consumption mix, according to manufacturer reports, accounts for an average of 92% of electricity. These two values indicate that 86% of GHG emissions for PCB production are due to electricity consumption.

As mentioned in Section IV-A, annual reports are mixed between Thailand, Taiwan and China. The location of each annual report average value is converted to a Global location. Using ecoinvent v3.10 EF v3.1 electricity mixes <fnref n="9" /> <fnref n="10" /> <fnref n="11" /> <fnref n="12" />, a weighted average is applied to the three countries based on the manufacturers respective locations. An average Global carbon intensity of 109.03 kg CO₂e/m² is obtained as shown in table IV.

<footnote n="8">⁸https://investor.kce.co.th/en/download/one-reports, accessed 2024-10-23</footnote>

<footnote n="9">⁹Global, https://ecoquery.ecoinvent.org/3.10/cutoff/dataset/13042/impact_assessment, accessed 2024-10-30</footnote>

<footnote n="10">¹⁰Thailand, https://ecoquery.ecoinvent.org/3.10/cutoff/dataset/2136/impact_assessment, accessed 2024-10-30</footnote>

<footnote n="11">¹¹Taiwan, https://ecoquery.ecoinvent.org/3.10/cutoff/dataset/9255/impact_assessment, accessed 2024-10-30</footnote>

<footnote n="12">¹²China, https://ecoquery.ecoinvent.org/3.10/cutoff/dataset/13295/impact_assessment, accessed 2024-10-30</footnote>
<table><caption>TABLE III
ESTIMATION OF PTH FR-4 PCB PRODUCTION PER STACKUP. COURTESY OF PRISMARK PCB REPORT⁴, 2021.</caption><thead><tr><th>Number of layers</th><th>1</th><th>2</th><th>4</th><th>6</th><th>8</th><th>10</th><th>12</th><th>14</th><th>16</th><th>18</th><th>20</th><th>Total</th><th>Unit</th></tr></thead><tbody><tr><td>PCB production<sup>a</sup></td><td>54.2</td><td>76.1</td><td>98.9</td><td>49.1</td><td></td><td></td><td>22.2</td><td></td><td></td><td></td><td>1</td><td>301.5</td><td>Mm<sup>2</sup></td></tr><tr><td>PCB production<sup>b</sup></td><td>54.2</td><td>76.1</td><td>98.9</td><td>49.1</td><td>4.44</td><td>4.44</td><td>4.44</td><td>4.44</td><td>4.44</td><td>0.5</td><td>0.5</td><td>301.5</td><td>Mm<sup>2</sup></td></tr><tr><td>Weight</td><td>0.18</td><td>0.25</td><td>0.33</td><td>0.16</td><td>0.01</td><td>0.01</td><td>0.01</td><td>0.01</td><td>0.01</td><td>&gt;0.01</td><td>&gt;0.01</td><td>1</td><td></td></tr><tr><td>Weighted average</td><td>0.18</td><td>0.50</td><td>1.31</td><td>0.98</td><td>0.12</td><td>0.15</td><td>0.18</td><td>0.21</td><td>0.24</td><td>0.03</td><td>0.03</td><td><strong>3.9</strong></td><td>Average stackup</td></tr></tbody></table>

## D. Gate-to-gate carbon intensity assessment from annual reports analysis

The analysis presented in this section allows us to draw a conclusion and first contribution on gate-to-gate CI assessment. Considering Global average and quantiles (25%, 75%) of Fig. 4, we recommend to use the following gate-to-gate carbon intensities for a PCB with unknown characteristics: 109.03 kg CO₂e/m² as an average, and when assessing a range, 153.51 kg CO₂e/m² for pessimistic evaluation, and 60.73 kg CO₂e/m² for optimistic evaluation. When manufacturing location is known, this number can be renormalized by local electricity mix. Table V samples some locations as reference.

<table><caption>TABLE IV
AVERAGE CARBON INTENSITY OF PTH FR-4 PCB BASED ON MANUFACTURERS ANNUAL REPORTS RENORMALIZED TO GLOBAL ELECTRICITY MIX.</caption><thead><tr><th>Country</th><th>Weight<sup>b</sup><br>%</th><th>Country mix<br>kg CO<sub>2</sub>e/m<sup>2</sup></th><th>Global mix<br>kg CO<sub>2</sub>e/m<sup>2</sup></th></tr></thead><tbody><tr><td>Thailand</td><td>8.71</td><td>12.12</td><td>11.23</td></tr><tr><td>Taiwan</td><td>5.36</td><td>7.46</td><td>6.97</td></tr><tr><td>China</td><td>21.44</td><td>29.83</td><td>22.66</td></tr><tr><td>Taiwan + China<sup>a</sup></td><td>64.49</td><td>89.74</td><td>68.17</td></tr><tr><td>Total</td><td>100</td><td>139.15</td><td>109.03</td></tr></tbody></table>

<table><caption>TABLE V
NORMALIZED LOCATIONS OF CARBON INTENSITY OF PTH FR-4 PCB BASED ON MANUFACTURERS ANNUAL REPORTS.</caption><thead><tr><th rowspan="2">Region</th><th>25% quantile</th><th>Average</th><th>75% quantile</th></tr><tr><th colspan="3">kg CO<sub>2</sub>e/m<sup>2</sup></th></tr></thead><tbody><tr><td>Global</td><td>60.73</td><td>109.03</td><td>153.51</td></tr><tr><td>Asia</td><td>77.54</td><td>139.23</td><td>196.03</td></tr><tr><td>China</td><td>79.93</td><td>143.52</td><td>202.08</td></tr><tr><td>Japan</td><td>58.27</td><td>104.63</td><td>147.32</td></tr><tr><td>Thailand</td><td>65.54</td><td>117.67</td><td>165.68</td></tr><tr><td>Taiwan</td><td>65.03</td><td>116.76</td><td>164.40</td></tr><tr><td>Europe</td><td>26.91</td><td>48.31</td><td>68.02</td></tr><tr><td>France</td><td>6.27</td><td>11.26</td><td>15.85</td></tr><tr><td>Germany</td><td>36.20</td><td>65.00</td><td>91.52</td></tr><tr><td>USA/Canada</td><td>36.78</td><td>66.04</td><td>92.99</td></tr></tbody></table>

## V. CARBON INTENSITY MODEL OF PTH FR-4 PCBS DEPENDING ON THE NUMBER OF LAYERS

As a second contribution justified in Section V-A3, two LCAs of PTH FR-4 PCBs and the affine function of (1) are

exploited to propose a carbon intensity model depending on the stackup. Then, we normalize the localization as done in Section IV-C.

### A. PCB carbon intensity model

1) *Ecoinvent 6 layers:* Ecoinvent v3.10 EF v3.1 database contains a 6-layer PTH FR-4 PCBs entry⁵, valid for the period 2003-2023 and localized for Global. The carbon intensity is 104.80 kg CO₂e/m². This result provides a first coordinate for our model.

2) *Dynamic Electronics 10 layers:* The manufacturing company Dynamic Electronics has published a 10-layer FR-4 PCB carbon footprint assessment<fnref n="13" />. Given the lack of specific information and the prevalence of PTH in commonly produced PCBs, we assume that the vias assessed by Dynamic Electronics are PTH.

Its system boundary is cradle-to-gate, for the year 2022 and manufacturing localized in China. The carbon intensity result is 179.05 kg CO₂e/m² for China.

We apply the normalization method see in Section IV-C to obtain a 10-layer PCB carbon intensity of 136.02 kg CO₂e/m² for Global location. This result provides a second coordinate for our model.

3) *PCB carbon intensity model:* PCB manufacturing carbon intensity varies with stackup. More layers add more manufacturing steps, resulting in an increasing carbon intensity. Equation (1) shows an affine function between PCB stackup and carbon intensity. To our point of view, an affine function is consistent with the PCB manufacturing process presented in III-A2, where a number of identical steps are repeated per layer while a common set of manufacturing steps do not depend on the number of layers. From the previous ecoinvent 6-layer and the Dynamic Electronics 10-layer coordinates, we construct an affine function model with two entry points at $a \times 6 + b = 104, 80 \text{ kg CO}_2\text{e/m}^2$ and $a \times 10 + b = 136.02 \text{ kg CO}_2\text{e/m}^2$. We obtain $a = 7.81$ and $b = 57.97$. The resulting affine function for Global is:

$$y_{\text{global}} = 7.81n + 57.97 \quad (2)$$

expressed in kg CO₂e/m², with n number of layers.

<footnote>ᵃOriginal amounts from Prismark report. One side composite to 18+ multilayer for China and Asia (excluding Japan).</footnote>

<footnote>ᵇAveraged amounts for 8 to 16 layers and 18+.</footnote>

<footnote>ᵃChina mix applied</footnote>

<footnote>ᵇPart of the PCB area declared by manufacturers produced in the country.</footnote>

<footnote n="13">¹³https://www.dynaholding.com/en/csr/environment.html, PCB(10L) Report for product carbon footprint assessment, accessed 2024-10-19</footnote>
## B. Exploiting the PCB carbon intensity model

On Fig 5, the affine function (2) of carbon intensity per stackup is plotted, for Global and some normalized locations, based on ecoinvent v3.10 EF v3.1 electricity mixes. Ecoinvent and Dynamic Electronics carbon assessment markers has been added. They are based on the affine model for Global location.

The manufacturers reports weighted average carbon intensity marker, normalized for Global in Section IV-C, is located at coordinate (3.9; 109.03). This gate-to-gate value is of the same order of magnitude of the cradle-to-gate value of 88.41 kg CO₂e/m² issued from the proposed model (2). Nevertheless, as the model addresses a wider scope than manufacturers annual reports, a higher value can be expected for model rather than annual reports. This difference can be attributed to the fact that manufacturers reports use a top-down inventory analysis while the model use a bottom-up LCA inventory. For example, manufacturers reports account for indirect manufacturing services, such as IT support, as well as production defects. This illustrates the lack of data, the lack of harmonized practice, and the complexity to entirely inventory complex manufacturing processes.

<figure><img src="image_6.png" /><figcaption>Fig. 5. Cradle-to-gate PTH FR-4 PCB carbon intensity model per stackup. Trace for different locations. Global model based on ecoinvent and Dynamic Electronics entries. Red cross is the global weight average of carbon intensity extracted from manufacturers annual reports, which is gate-to-gate.</figcaption></figure>

Fig 6 presents a sensitivity analysis of the model for Global. A ±5% variation is applied to the ecoinvent and Dynamic Electronics entries to outline the minimum and maximum values, represented by the dashed lines.

Fig 7 illustrates how the proposed model enables the calculation of GHG emissions per PCB area for each stackup. The provided example supports PCB designers in making environmentally informed decisions by adjusting surface area according to the number of layers.

**As a conclusion of this section, we recommend to use the proposed cradle-to-gate carbon intensity model (2) for PTH FR-4 PCBs with a known stackup.** When the manufacturing

<figure><img src="image_7.png" /><figcaption>Fig. 6. Sensitivity analysis of the model for ±5% applied to Global.</figcaption></figure>

<figure><img src="image_8.png" /><figcaption>Fig. 7. Global Warming Potential₁₀₀ per layers related to an area, for Global, sampled with (2). Blue color is a visual indicator of value over 3 kgCO₂e.</figcaption></figure>

location is specified, the result can be normalized to reflect the local electricity mix.

## VI. CONCLUSION

This paper evaluates the carbon impact of the production of a PTH FR-4 PCB. The summary of the State of the art of PCB LCAs enlightens that the literature provides varied figures of carbon intensity. Then, PCB manufacturing process is detailed to identify environmental hot spots and LCA limits are discussed. As a first contribution, we propose a method to evaluate gate-to-gate carbon intensity of unknown PTH FR-4 PCBs stackup, based on data published by manufacturers in their annual reports. This study shows a large variance of carbon intensities declared by companies. As a second contribution, we exploit the ecoinvent 6-layer and the Dynamic Electronics 10-layer entries to propose a novel cradle-to-gate
carbon intensity model of PTH FR-4 PCBs, as a function of stackup. As a result of this work, the model enables PCB designers to make environmental informed decision between PCB area versus number of layers. Both contributions share a common approach of localizing PCB manufacturing by normalizing carbon intensity based on the local electricity mix.

This paper also highlights the encountered difficulties to find detailed open data related to PCB production. In annual reports, manufacturers communicate on financial and environmental data, but few manufacturers communicate on production data, particularly on energy, area produced and stackup.

As climate change has become a worldwide concern, it is necessary to make environmental impacts measurement easier. We encourage manufacturers to publish harmonized data as PCB production per stackup and the related materials, chemicals and energy amounts consumed. These data are important for the scientific community to improve knowledge and for LCA practitioners to build more accurate inventories.

## ACKNOWLEDGMENT

The authors wish to thank Amélie Fournier and elvia PCB Group for their insights into PCB manufacturing.

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