# Losses Evaluation on Parallel Diodes Using a Double Pulse Test Circuit

Gustavo Alves de Lima Henn, Frédéric Reymond-Laruina, Herminio Miguel de Oliveira Filho, Tanguy Phulpin

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Gustavo Alves de Lima Henn, Frédéric Reymond-Laruina, Herminio Miguel de Oliveira Filho, Tanguy Phulpin. Losses Evaluation on Parallel Diodes Using a Double Pulse Test Circuit. The 26th European Conference on Power Electronics and Applications, GDR SEEDS France & EPE Association, Mar 2025, Paris, France. 10.34746/epe2025-0122. hal-05097349

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# Losses Evaluation on Parallel Diodes Using a Double Pulse Test Circuit

Gustavo Alves de Lima Henn, Frédéric Reymond-Laruina, Herminio Miguel de Oliveira
Filho, Tanguy Phulpin

UNIVERSITÉ PARIS-SACLAY / CENTRALESUPÉLEC

11 Rue Joliot Curie, 91192

Gif-sur-Yvette, France

+33 1 69 85 16 33

gustavo@unilab.edu.br, frederic.reymond-laruina@edf.fr, herminio@unilab.edu.br,

tanguy.phulpin@centralesupelec.fr

www.geeps.centralesupelec.fr

## Keywords

Double-pulse test, Losses evaluation, Parallel diodes, PN diodes, SiC Schottky diodes.

## Abstract

This paper aims to optimize efficiency by combining diodes, such as SiC Schottky or PiN Si in parallel. For each combination, conduction and switching losses are estimated using datasheet in addition to double pulse test circuit validation. The parallelization of each diode is studied to propose the best configuration.

## Introduction

In modern power electronics, the optimization of semiconductor devices is critical for enhancing the efficiency of power converters. One such area of interest for grid electrical or embedded systems is the losses evaluation of parallel diodes addition, a common practice to share current and improve thermal management [1,2].

This study employs three types of diodes: a SiC Schottky diode and two Si diodes, an ultra-fast and a hyper-fast, each with distinct electrical characteristics. The SiC Schottky diode is known for its low switching losses due to its negligible reverse recovery time, making it an attractive option for high-frequency applications [3,4]. Conversely, Si diodes typically exhibit higher conduction and switching losses but are widely used due to their robustness, lower cost, and conduction resistance [5,6].

This paper focuses on the losses evaluation of parallel diode configurations using a double pulse test (DPT) circuit, a well-established method for assessing the dynamic performance of semiconductor devices [7,8]. Indeed, the double pulse test setup provides a controlled and reproducible environment to measure the losses in both single and parallel diode configurations, and previous research has demonstrated the effectiveness of the DPT method in evaluating

diode performance [9,10]. The objective is presently to identify the optimal configurations that minimize losses and enhance the overall performance of power electronic systems. The results are expected to provide valuable insights into the design and optimization of diode-based circuits, contributing to the development of more efficient power converters.

This paper is organized as follows: Section 2 details the equations for estimating losses in diodes; Section 3 explains the functioning of the DPT circuit; Section 4 describes the test bench setup, the parameters of the studied diodes, and the experimental conditions; Section 5 presents the results for single-diode and parallel-diode configurations; and Section 6 provides the conclusion.

## Losses Estimation on Diodes

Total losses in diode ($P_{tot}$) devices are estimated considering conduction ($P_{cond}$) and switching ($P_{sw}$) losses through the theoretical expressions given in (1), (2), and (3).

$$P_{tot} = P_{cond} + P_{sw} \quad (1)$$

$$P_{cond} = V_f \cdot I_{AVG} + R_d \cdot I_{RMS}^2 \quad (2)$$

$$P_{sw} = E_{rr} \cdot f = Q_{rr} \cdot V_r \cdot f \quad (3)$$

Where $V_f$ is the forward voltage drop (V), $R_d$ is the internal resistance (Ω), $I_{AVG}$ and $I_{RMS}$ are, respectively, the average and RMS currents (A), $E_{rr}$ is the recovery energy (J) during the recovery time ($t_{rr}$), $Q_{rr}$ is the total charge (C), $V_r$ is the voltage drop during the switching (V), and $f$ is the operating frequency (Hz). In order to simplify calculation, one can approximate $E_{rr}$ using equation (4):

$$E_{rr} = \frac{V_d \cdot I_d \cdot t_{rr}}{2} \quad (4)$$

This expression calculates the recovery energy as the equivalent triangular area representing the instantaneous power variation during recovery
time. The triangular area has a height defined by the product of DC voltage applied to the diode in blocking state ($V_d$), and the current flowing through the diode ($i_d$), and a base equals to $t_{rr}$ (s). It is important to note that the analysis of switching losses herein is simplified and exclusively considers recovery losses, which are the primary component of switching losses. The energy dissipation associated with the diode transitioning into conduction is not accounted for, as it normally can be neglected [2].

Double Pulse Test

In order to experimentally evaluate losses on semiconductor devices, the double pulse test setup is presented with two diodes in parallel in Figure 1.

<figure><img src="image_2.png" /><figcaption>Fig. 1: Double pulse test schematic</figcaption></figure>

The Double Pulse Test (DPT) is an experimental procedure widely used in the evaluation of the dynamic performance of semiconductors devices. As shown in Figure 2, the test involves the application of two voltage pulses.

Under an input voltage $V_{DC}$, the first pulse, with duration of $\tau_1$, turns-on switch $S_1$: the current through the inductance L raises until $i_{DC}$ reaches the test value $i_{L, test}$. Equation (5) defines $\tau_1$.

$$ \tau_1 = \frac{L}{R_L} \ln \left( \frac{V_{DC}}{V_{DC} - R_L \cdot I_{test}} \right) \quad (5) $$

<figure><img src="image_3.png" /><figcaption>Fig. 2: Main waveforms of DPT</figcaption></figure>

The first pulse is followed by a period $\tau_{break}$, expressed by (6), during which $S_1$ is turned-off. During this time interval, the current circulates in a closed loop between the inductance and the diodes. The duration $\tau_{break}$ must limit the decrease in current to $\Delta i_{L, test}$ (%), allowing for a study of conduction losses. In our case, the duration of $\tau_{break}$ was set to 2 µs, in order to meet $\Delta i_{test}$ requirements for all tested conditions.

$$ T_{break} = -\frac{L}{R_{eq}} \ln \left( 1 + \frac{\Delta i_{L, test}}{100 \left( i_{L, test} + \frac{V_{th}}{R_{eq}} \right)} \right) \quad (6) $$

Where $R_{eq} = R_L + R_d$ refers to the equivalent resistance of the discharge loop of the inductance. Finally, a second pulse with duration $\tau_2$ is applied to achieve diode recovery. The duration of this pulse is chosen to limit the current to an acceptable level for the components, while also allowing for diode recovery.

The conduction losses are then obtained in expression (2). In our study, we are interested in comparing dissipated conduction and recovery energies. In this way, $E_{cond}$ can be calculated as:

$$ E_{cond} = P_{cond} \cdot \tau_{break} \quad (7) $$

On the other hand, the recovery losses are calculated by multiplying the current and the voltage across the studied diode between two instants $t_1$ and $t_2$. Referring to the literature [11, 12], $t_1$ corresponds to the moment when the voltage across the diode reaches 10% of $V_{DC}$, while $t_2$ is the instant where the current in the diode reaches 25% of the reverse peak current $I_{rr}$. The energy dissipated in a diode due to recovery, $E_{rr}$ is given by:
$$E_{rr} = \int_{t_1(v_F=0.1V_{DC})}^{t_2(v_F=0.25I_{rr})} v_d(t) \cdot i_d(t) \, dt \quad (8)$$

Where $v_d(t)$ and $i_d(t)$ are the voltage and the current function over time across the diode, respectively.

## Experimental Methodology

In this section, the methodology employed for the experimental evaluation of losses in parallel diodes are presented. This includes a description of the components of the DPT test bench, including the measurement equipment, a presentation of the voltage and current levels considered, and the diodes selected, along with their main characteristics used on DPT.

### Test Bench Setup

The experimental test bench is presented in Figure 3. It is composed of a DC voltage supply SM1500-CP-30, an AFG31000 signal generator for the double pulses, and a 15 V<sub>DC</sub> voltage source to feed the driver. The measurements are acquired using a scope Lecroy HDO6034A, with CP030A current probe and HVD3106A voltage probe. The 2SC0108T2F1 driver is used to command a STW69N65M5 IGBT. An air core coil of L = 313 µH, at 1 kHz, with an inherent resistance of R<sub>L</sub> = 120 mΩ is used. The decoupling ceramic capacitor values C = 220 µF.

<figure><img src="image_4.png" /><figcaption>Fig. 3: Experimental test bench used in the DPT</figcaption></figure>

### Test Conditions

During the Double Pulse Tests (DPT), the selected diodes, specified in next section, are subjected to different voltage and current levels. Specifically, three distinct voltages – 100 V, 200 V, and 300 V – are used. For each voltage level, four different current levels – 5 A, 10 A, 15 A,

and 20 A – are applied. This experimental setup is designed to provide a comprehensive evaluation of diode performance under a wide range of operating scenarios and across different stress levels.

By examining the responses of the diodes to the specified voltage and current combinations, this study seeks to elucidate their performance characteristics and operational boundaries in practical applications.

### Selected Diodes and Key Parameters

In order to run the experiments and compare distinct scenarios, three different types of diodes were selected. Their features are the following:

* “RFS”: Ultra-fast Si, 650 V, 30 A;

* “VS”: Hyper-fast Si, 600 V, 30 A;

* “Schottky”: SiC Schottky, 1200 V, 30 A.

Key features, extracted from the datasheets, are described in Table I.

<table><caption>Table I: Key features of studied diodes</caption><thead><tr><th>Reference</th><th>Type</th><th>R<sub>s</sub><br>[mΩ]</th><th>t<sub>rr</sub><br>[ns]</th><th>V<sub>f</sub> [V]</th></tr></thead><tbody><tr><td>RFL30TZ6S</td><td>Ultra-<br>fast Si</td><td>23</td><td>70</td><td>1.10*<br>0.85**</td></tr><tr><td>VSE5PH3006</td><td>Hyper-<br>fast Si</td><td>20</td><td>65</td><td>1.15*<br>0.90**</td></tr><tr><td>C4D30120H</td><td>Schottky<br>Sic</td><td>30</td><td>01</td><td>2.00*<br>1.10**</td></tr></tbody></table>

*V<sub>f</sub> for 20A

**V<sub>f</sub> for 10A

The series resistance (R<sub>s</sub>) parameter for each diode is determined by linearizing the V<sub>f</sub> x I<sub>f</sub> curve within the specified current range (5 A – 20 A), extracted at a temperature of 125°C.

For the forward voltage (V<sub>f</sub>) parameter, the value corresponding to a current of 20 A is adopted for single-diode configurations. In the case of two diodes connected in parallel, the value corresponding to 10 A is used, as the current is divided between the diodes.

Finally, concerning the recovery time (t<sub>rr</sub>), the SiC Schottky diode datasheet specifies that the recovery current is zero, implying t<sub>rr</sub> = 0. Thus, a small value of 1 ns is adopted to account for non-zero switching losses.
## Results

In this section, the results in terms of energy are presented through analytical estimation, using equations presented before, and experimental measurements, for single-diode and all possible combinations of two diodes in parallel.

The primary objective is not to compare the absolute values of analytical versus measured conduction and recovery energy. However, to illustrate the trends associated with each configuration and assessing whether, and under which conditions, two diodes in parallel are representing the optimal configuration.

### Single-Diode Setup

Figures 4 and 5 present, respectively, the estimated and experimental conduction energy ($E_{cond}$) for each diode. An analysis of these figures indicates that the calculated and measured values are in close agreement. The main discrepancies arise primarily at higher voltage and current levels. Taking the 300 V/20 A condition, for example, the average voltage is reduced to 270 V, while the current decreases to 17 A, attributed to circuit parasitic elements. This reduction in voltage and current consequently impacts the measured $E_{cond}$.

Nonetheless, the trends observed in Figures 4 and 5 are consistent, indicating that the SiC Schottky diode exhibits approximately 1.7 times higher conduction energy compared to the other diodes. This increased $E_{cond}$ might be due to the higher internal resistance ($R_s$) and forward voltage ($V_f$) of the SiC Schottky diode relative to the others, as previously observed in Table II.

<figure><img src="image_5.png" /><figcaption>Fig. 4: Estimated conduction energy on each diode, using equation (7)</figcaption></figure>

<figure><img src="image_6.png" /><figcaption>Fig. 5: Measured conduction energy on each diode, using DPT circuit</figcaption></figure>

Figure 6 illustrates a typical waveform of voltage and current during the diode recovery time, using measured data of RFS diode in 100 V/5 A level. Notably, there is a bouncing effect on the current due to the exchange of reactive power with the inductance. This complicates the determination of the exact moment when switching ends for the $t_{rr}$ determination, specifically at $i_d = 0.25I_{rr}$, as stated in equation (8).

Although existing methods to recover the exact $t_{rr}$ from measured data are proposed in the literature [13-15], they either lack sufficient explicitness to be reproducible or require substantial computational effort to be effectively utilized.

For this reason and aiming to simplify the analysis, the measured recovery energy will be approximated, for all cases, as follows:

$$E_{rr} = \int_{t_1(v_F=0.1V_{DC})}^{t_1+v_{rr}} v_d(t) \cdot i_d(t) dt \quad (9)$$

<figure><img src="image_7.png" /><figcaption>Fig. 6: Current bouncing effect during recovering period for RFS diode, 100 V/5 A level.</figcaption></figure>

Figures 7 and 8 present, respectively, the estimated and experimental recovery energy ($E_{rr}$) for each diode.
<figure><img src="image_8.png" /><figcaption>Fig. 7: Estimated recovery energy on each diode, using equation 9</figcaption></figure>

<figure><img src="image_9.png" /><figcaption>Fig. 8: Measured recovery energy on each diode, using DPT circuit</figcaption></figure>

As expected, Schottky diode exhibits negligible recovery energy. For the Si diodes, due to measured voltage overshoot during turn-off, VS diode presents higher measured recovery energy compared to the RFS diode.

## Setup with Two Diodes in Parallel

In this section, it is presented the measured conduction and recovery energies for each combination of two diodes in parallel. For clarification, the term “first diode” refers to the diode closest to the inductor (L), while the term “second diode” refers to the diode positioned furthest from the inductor. At last, as it will be observed, the energy behaviors are consistent over the applied voltage and current levels. Thus, to summarize results, tables will only show measurements for 300 V/20 A level.

Figure 9 shows the total measured conduction energy. As expected, the worst scenario occurs when two Schottky diodes are used. The best configuration is the VS-VS association, presenting around 27% less conduction energy than Schottky-Schottky setup.

Other three configurations also present good results: VS-RFS, RFS-VS, and RFS-RFS, around 7-10% more losses than VS-VS setup. This was expected, as the best configurations in terms of E<sub>cond</sub> are the ones without Schottky diodes. Among these last, the ones with less energy are the Schottky-VS and Schottky-RFS, 25% worse than the best one.

Table II summarizes the comparison, in terms of E<sub>cond</sub>, for each combination, normalized in reference to VS-VS setup, for 300 V/20 A level. It is important to notice that the position of the diode affects E<sub>cond</sub>. Although the setup X-Y exhibits behavior close to Y-X configuration, they are not identical. This discrepancy arises due to the parasitics in the conductor between the two diodes. Depending on R<sub>par</sub>, L<sub>par</sub>, and the internal resistances of diodes X and Y, the current will preferentially flow through one diode more than the other, ultimately influencing in overall E<sub>cond</sub>.

<figure><img src="image_10.png" /><figcaption>Fig. 9: Measured conduction energy for all combinations of two diodes in parallel, using DPT circuit</figcaption></figure>

<table><caption>Table II: Total conduction energy normalized to the VS-VS association, for 300 V/20 A.</caption><thead><tr><th>1<sup>st</sup> Diode</th><th>2<sup>nd</sup> Diode</th><th>RFS</th><th>VS</th><th>Schottky</th></tr></thead><tbody><tr><td>RFS</td><td></td><td>1.077</td><td>1.097</td><td>1.338</td></tr><tr><td>VS</td><td></td><td>1.072</td><td>1.000</td><td>1.302</td></tr><tr><td>Schottky</td><td></td><td>1.253</td><td>1.261</td><td>1.380</td></tr></tbody></table>

Table III presents the total conduction energy of two diodes in parallel, normalized to the respective single-diode setup, for 300 V/20 A. The main idea is to verify the influence of the insertion of a second diode on the first diode alone. Thus, E<sub>cond</sub> of setup RFS-X, with X as
second diode, is normalized to single-diode RFS, and so on.

It can be observed that the total $E_{cond}$ is reduced when diodes are connected in parallel. This reduction occurs because the current is distributed among the diodes, leading to a decrease in the forward voltage drop. An exception to this observation arises when a silicon diode is paralleled with a Schottky diode, as the latter exhibits higher conduction energy. It is important to note that the conduction energy due to parasitic elements are not considered in this analysis, as the parasitic energy loss is dependent on the quality of connections between the parallelized diodes.

<table><caption>**Table III: Total conduction energy normalized to their respective first diode, for 300 V/20 A.**</caption><thead><tr><th>1<sup>st</sup><br>Diode</th><th>2<sup>nd</sup><br>Diode</th><th>RFS</th><th>VS</th><th>Schottky</th></tr></thead><tbody><tr><td>RFS</td><td></td><td>0.889</td><td>0.906</td><td>1.105</td></tr><tr><td>VS</td><td></td><td>0.889</td><td>0.829</td><td>1.079</td></tr><tr><td>Schottky</td><td></td><td>0.615</td><td>0.619</td><td>0.677</td></tr></tbody></table>

Figure 10 illustrates overall recovery energy. It is evident that $E_{rr}$ in the Schottky-Schottky combination are very low compared to others.

As it can be observed, configurations with a Schottky diode in the first position also exhibit notably low recovery energy. This is primarily due to $L_{par}$ and, to a lesser extent, $R_{par}$. It happens because the first diode absorbs more recovery energy loss as it begins and finishes conduction earlier than the second diode. As $E_{rr}$ is lower in Schottky diodes than the others, overall recovery energy is also lower.

Also, as expected, other setups with a Schottky diode present relatively low $E_{rr}$, notably RFS-Schottky combination.

Among the other configurations, the RFS-RFS combination shows recovery energy comparable to the VS-Schottky configuration. Conversely, setups incorporating a VS diode demonstrate the highest recovery energy, as expected, especially the VS-RFS setup.

Table IV resumes the comparison of each combination, normalized in reference to Schottky-RFS setup, for the 300 V/20 A level.

<figure><img src="image_11.png" /><figcaption>**Fig. 10: Measured switching losses for all combinations of two diodes in parallel, using DPT circuit**</figcaption></figure>

<table><caption>**Table IV: Total recovery energy normalized to Schottky-RFS association, for 300 V/20 A.**</caption><thead><tr><th>1<sup>st</sup><br>Diode</th><th>2<sup>nd</sup><br>Diode</th><th>RFS</th><th>VS</th><th>Schottky</th></tr></thead><tbody><tr><td>RFS</td><td></td><td>3.092</td><td>3.874</td><td>1.470</td></tr><tr><td>VS</td><td></td><td>7.071</td><td>4.461</td><td>2.473</td></tr><tr><td>Schottky</td><td></td><td>1.000</td><td>1.104</td><td>0.005</td></tr></tbody></table>

Table V presents overall recovery energy of two diodes in parallel normalized to their respective diodes, for 300 V/20 A. The idea remains the same as previously: to verify the influence of the insertion of a second diode on the first diode alone. Thus, $E_{rr}$ of setup RFS-X is normalized to single diode RFS setup.

It can be noticed that, for silicon (Si) diodes, the X-X configuration tends to reduce $E_{rr}$ compared to the single X diode setup. For the Schottky diode, although the ratios are significantly higher compared to the single Schottky setup, the recovery energy remains negligible in comparison to the conduction energy.

<table><caption>**Table V: Total recovery energy normalized to their respective first diode, for 300 V/20 A.**</caption><thead><tr><th>1<sup>st</sup><br>Diode</th><th>2<sup>nd</sup><br>Diode</th><th>RFS</th><th>VS</th><th>Schottky</th></tr></thead><tbody><tr><td>RFS</td><td></td><td>0.983</td><td>1.232</td><td>0.468</td></tr><tr><td>VS</td><td></td><td>1.442</td><td>0.910</td><td>0.504</td></tr><tr><td>Schottky</td><td></td><td>1.39e+3</td><td>1.54e+3</td><td>6.965</td></tr></tbody></table>

## Application Case
To illustrate an application of these results, the authors propose to consider the diode losses in a buck converter operating at 300 V DC, 20 kHz, and a duty cycle of 0.5.

Table VI presents the total losses of two diodes in parallel normalized to their respective single diode configuration, for 300 V/20 A.

As observed, all diodes perform better when parallelized, except for the Silicon diodes in parallel with Schottky diode. This is primarily due to the significant impact of conduction losses. Conversely, the Schottky diode benefits the most from parallelization, reducing more than 30% of losses.

It is important to emphasize that this study considers a switching frequency of 20 kHz. At this frequency, conduction losses are significantly higher than switching losses and thus play a dominant role. Also, as expressed before, conduction losses from parasitics are not being considered, and should also play a role, depending on the quality of connections.

<table><caption>**Table VI: Total losses normalized to respective diode setup, for 300V/20A.**</caption><thead><tr><th>1<sup>st</sup><br>Diode</th><th>2<sup>nd</sup><br>Diode</th><th>RFS</th><th>VS</th><th>Schottky</th></tr></thead><tbody><tr><td>RFS</td><td></td><td>0.895</td><td>0.924</td><td>1.069</td></tr><tr><td>VS</td><td></td><td>0.937</td><td>0.836</td><td>1.030</td></tr><tr><td>Schottky</td><td></td><td>0.626</td><td>0.631</td><td>0.677</td></tr></tbody></table>

## Conclusion

In this paper, the conduction and switching losses in single-diode and parallel-diode configurations were evaluated using a double pulse test circuit. Three different diodes were utilized: an ultra-fast and a hyper-fast silicon diodes, and one SiC Schottky diode. The tests were conducted for voltage levels from 100 V to 300 V and currents from 5 A to 20 A.

In terms of conduction losses, the results indicated that the use of parallel diodes tends to reduce these losses due to the lower equivalent conduction resistance. Nonetheless, the connection between diodes must be optimized to minimize parasitic elements, as these contribute to increase losses.

Another benefit is the possibility of using diodes with lower current requirements, as the total current is divided among the parallel diodes, thereby reducing material-related costs. This

solution decreases losses, as lower-rated diodes tend to exhibit lower internal resistance, shorter recovery time, and lower threshold voltage.

With increasing frequency due to higher power density, for example in embedded systems, recovery losses become more significant. In these cases, diode parallelization can become an effective solution, particularly if a Schottky diode is positioned close to the inductor. This approach, however, presents a trade-off that must be carefully evaluated by the designer, as the inclusion of this diode would increase the overall conduction losses.

In the studied case, since switching losses remain very low compared to conduction losses, the setups without Schottky diodes tend to present lower overall losses. However, at higher frequencies, this scenario would likely be quite different. Considering results, the VS-VS setup is the best, reducing losses in more than 15% compared to VS single-diode configuration.

As future work, the authors suggest the calculation of a factor of merit to assist designers in determining the optimal configuration for adding diodes in parallel for any given diode.

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