# Experimental evidence of a unique ReRAM mechanism based on operando nanometric depleted zone in V\_2O\_3 thin films

Killian Veyret, Nicolas Bernier, Romain Bon, Gabriele Navarro, Rachid Hida, Catherine Carabasse, Patrice Gonon, Eric Jalaguier

► To cite this version:

Killian Veyret, Nicolas Bernier, Romain Bon, Gabriele Navarro, Rachid Hida, et al.. Experimental evidence of a unique ReRAM mechanism based on operando nanometric depleted zone in V\_2O\_3 thin films. Journal of Applied Physics, 2025, 138 (1), pp.015301. 10.1063/5.0272554 . cea-05316835

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# Experimental evidence of a unique ReRAM mechanism based on operando nanometric depleted zone in V₂O₃ thin films

K. Veyret,¹,² N. Bernier,¹ R. Bon,¹ G. Navarro,¹ R. Hida,¹ C. Carabasse,¹ P. Gonon,² and E. Jalaguier¹

¹) *Univ. Grenoble Alpes, CEA, Leti, F-38000 Grenoble, France*

²) *Univ. Grenoble Alpes, CNRS; CEA-Leti Minatec, LTM, 38054 Grenoble, France*

(*Electronic mail: killian.veyret@cea.fr)

(Dated: 20 March 2025)

Emerging Non-Volatile Memories (NVM) are foreseen to be ideal candidates for new non-Von Neumann computing paradigms and yield performances superior to the eFlash memories, which will contest eFlash supremacy for embedded memories and automotive applications. In this work, a novel Resistive Switching (RS) mechanism is unveiled for one resistor (1R) V₂O₃ single device. In conventional Resistive Random Access Memories (ReRAMs), the first step relies on the commutation from a pristine High Resistive State (HRS) to a Low Resistive State (LRS), namely the "forming" step. Here, unlike any other known ReRAMs or Phase-Change Memories (PCMs), the non-volatile RS implies the creation of a depleted vanadium nanometric zone, during a unique first initialization step which goes from the LRS pristine state to the HRS. This new mechanism is corroborated by simulation, electrical, and chemico-physical characterizations. This new V₂O₃ based ReRAM features promising single device performances, with a large memory window, low operation voltages, excellent scalability, and is forming-free.

## I. INTRODUCTION

ReRAMs are considered promising candidates for future non-volatile memory, due to their scalability potential, fast read/write speed, and low write energy, which is key for emerging applications such as neuromorphic, or in-memory computing.¹,²,³ This technology usually relies on binary metallic oxides, like HfO₂, for Oxide Random Access Memory (OxRAM), or active electrode materials, including Cu and Ag, for Conductive Bridge Random Access Memory (CBRAM). These memories usually use a "forming" step, where a conductive filament is created - with oxygen vacancies and metallic ions, respectively - in an insulating matrix.⁴ In this context, vanadium oxides are of interest because of their metal-insulator transitions. Amongst the wide vanadium oxides family, vanadium dioxide (VO₂) is known for its volatile resistive switching and vanadium pentoxide (V₂O₅) is considered a potential material for non-volatile Phase Change Memory (PCM) and OxRAM.⁵,⁶,⁷,⁸,⁹ Vanadium sesquioxide (V₂O₃:Cr), when substituted with a small percentage of chromium, is a well-known prototypal Mott insulator, which has recently been introduced as a possible material for emerg-

ing non-volatile memory with the advent of Mottronics.¹⁰,¹¹ Here, we introduce a novel vanadium-depleted ReRAM, based on a TiN/V₂O₃/TiN stack, integrated with a "wall" architecture, with a unique initialization mechanism. Unlike conventional ReRAM, this memory consists in the creation and commutation of a highly resistive nanometric depletion zone within the a-V₂O₃ thin film. Subsequent RS are surmised to follow conventional metal oxides memory mechanisms.¹²,¹³ V₂O₃ based vanadium-depletion memory features large memory window, excellent scalability, and is forming-less.

## II. MATERIALS AND METHODS

### A. Device fabrication

Thin films 50 nm thick a-V₂O₃ are deposited with the Ion Beam Deposition technique (IBD) at room temperature in a controlled O₂ environment. A 10 nm SiN capping layer is deposited by chemical vapour deposition at 300 °C on top of V₂O₃ to prevent further oxidation¹⁴. After deposition and capping, a-V₂O₃ is annealed at 450 °C for one hour under a N₂ atmosphere. This annealing ensures the crystallization of V₂O₃ in its metallic corundum crystallographic phase (R$\bar{3}$c space group).¹⁵ The structural analysis of thin films is performed on full sheet wafers to confirm that the material is indeed V₂O₃ in its R$\bar{3}$c phase (see supplementary material section A). After the V₂O₃ phase verification process, a 10 nm thick V₂O₃ thin film is integrated on electrical 200 mm wafers with a "wall" integration with a TiN/V₂O₃/TiN stack, as described in figure.1. The wall-shaped Bottom Electrode (BE) defines the cell area, with a fixed 10 nm on the x axis and a range of 40 nm to 300 nm on the y axis (figure.1). All of the results presented in this work are conducted on a V₂O₃ thin film that has not been annealed. However, Laborie reports that the V₂O₃ thin films deposited via IBD in CEA-LETI start to crystallize

<figure><img src="image_2.png" /><figcaption>FIG. 1. Scheme of the integrated stack with "wall" integration.</figcaption></figure>
in the corundum phase at 300 °C, since the SiN encapsulation
layer is deposited at 300 °C, the V₂O₃ is partially crystal-
lized. V₂O₃ thin film pristine resistivity therefore extends to
10⁻² – 10⁻¹ Ω.cm on integrated devices.¹⁵

B. Experimental methods

For electrical characterizations, the DUT top electrode is polarized with positive or negative bias, and the bottom electrode is grounded. Quasistatic (QS) sweeps were gathered for I-V characteristics with an Agilent 4156C parameter analyzer. The resistance of the device is read at 50mV. A heating chuck is used for temperature QS measurements, and a soaking time of 15 minutes is used.

For chemico-physical characterizations, Transmission Elec-	ron Microscopy (TEM), Energy Dispersive X-ray Spec-
troscopy (EDX) and nano-diffraction samples were prepared
with Focused Ion Beam (FIB) FEI FIB Helios and results were
obtained with FEI TiTan Themis. Every analyzed zone for
nano-diffraction measurements is around 2x2 nm².

III. EXPERIMENTAL RESULTS

A. Non-volatile resistive switching

Non-volatile reversible RS is achieved with bipolar oper-
ations and features a unique *initialization* step. Unlike any
typical ReRAM or PCM, here the pristine state of the device
is a conducting state, and the first RS relies on an *initialization*
step, where the devices switch from a pristine conducting state
to High Resistive State (HRS). The operation of the device is
illustrated in figure.2.(a) and consists of :

1. *Initialization* (conducting pristine state →HRS) with positive bias and high currents (black curve on figure.2.(a))

2. Set operation (HRS →Low Resistive State (LRS)) via negative bias and current limitation (red and grey curves with negative biases on figure.2.(a))

3. Reset operation (LRS →HRS) with positive bias - sim-
ilar to initialization with lower programming currents
(grey curves with positive biases on figure.2.(a))

In figure.2.(a), the sharp increase in current during *initializa-
tion* is due to the partially crystallized pristine V₂O₃ crystal-
lization, this crystallization is irreversible and occurs at lower
biases and currents than the programming current. *Initializa-
tion* programming current is higher than the hundred consecu-
tive resets. The red curve and gray curves (negative biases) in
figure.2.(a) represent, respectively, the 1st set and the consec-
utive hundred sets. No forming is observed when switching
from HRS to LRS.

The cumulative distribution of HRS and LRS resistances over
the 100 QS cycles of figure.2.(a) are reported in figure.2.(b).
The memory window is well above 10 over 100 QS cycles

<figure><img src="image_3.png" /><figcaption>FIG. 2. (a) IV characteristics of 50x10 nm² device, 100 cycles with *initialization* in black dots, 1st SET operation in red dots, and consecutive sets in grey. (b) Cumulative Distribution Function (CDF) of HRS and LRS states of the aforementioned QS cycling.</figcaption></figure>

<figure><img src="image_4.png" /><figcaption>FIG. 3. CDF of 10 cycles QS cycling (set : -1.6V ; reset : 1.5V / Ramp rate= 8 V.s⁻¹) for various device sizes.</figcaption></figure>

(figure.2.(b)). Moreover, the memory window can be in-
creased, up to more than 1000, and the HRS cycle-to-cycle
distribution can be narrowed, when cycling with IV sweeps of
higher voltages, as shown in figure.3.

In figure.3, the distribution of HRS for 300x10 nm² device is
much larger than that for smaller devices due to scaling ef-
fects. Indeed, initialization currents have a linear correlation
with device area (figure.4), and this operation becomes diffi-
cult for devices with sizes superior to 200x10 nm² due to the
high current values required. On figure.4, initialization cur-
<figure><img src="image_5.png" /><figcaption>FIG. 4. Top figure: maximum current during iterative QS initialization (dark red circles) and 5th reset operations, versus device area (linear fitting for both operations in dotted black lines). Bottom figure: Respective device resistance after programming in HRS (green dark circles for initialization and light green triangles for 5th reset), versus device area.</figcaption></figure>

rents are always larger than reset currents and have a linear relation with device area, suggesting a current-driven mechanism with almost constant current density. Reset currents also have a linear relationship with the device area up to 100x10 nm², devices larger than this value are difficult to cycle and tend to fail prematurely. Above 100x10 nm² the current values required for initialization exceed 2 mA, reaching such current values implies using stronger biases (i.e. stronger electric fields) that will eventually create more defects and even damage the active layer. As mentioned, cycling larger devices becomes difficult, resulting in less reproducibility and greater variability (both device-to-device and cycle-to-cycle), as seen in figure.3. The resistance of HRS is expected to correlate with the size of the devices, yet this is not the case in figure.4, any area dependence of HRS may be masked by its variability and might not be observed with the few devices tested.

## B. TEM/EDX and nano-diffraction investigations on pristine and cycled devices

To understand the RS mechanism(s), EDX measurements are performed on memory devices programmed in different states, as shown in the figures.5. On figures.5, EDX mappings of vanadium (V), oxygen (O), and titanium (Ti) are represented for seven different states. On figure.5.(a), pristine device shows no alteration, the content of vanadium and oxygen is uniform throughout the analyzed section of the $V_2O_3$ active layer, no Ti is observed in the active layer. A slight bump over the bottom electrode is discerned on all of the programmed states, this happens during the pre-clean step - etching of the surface of the wafer before the $a-V_2O_3$ layer deposition to remove residual oxidized layer on the bottom electrode - where the etching rate of SiN is faster than the one of TiN, leaving a bump of TiN. Figure.5.(b) and figure.5.(c) show initialized states with positive and negative bias, respectively. As aforementioned,

the *initialization* step is achieved with a positive bias, yet *initialization* with negative bias can be achieved. It is important to note that negative bias *initialization* yields very poor device-to-device success rate, especially compared to the positive bias *initialization*, and that no further cycling is possible when initialized with negative polarity. Both figure.5.(b) and figure.5.(c) show a V depletion zone in the $V_2O_3$ active layer (more visible on the TEM pictures of 6), the main difference lies in the creation of a V reservoir at the top of the BE in the positive case. Consequently, the V depleted zone has a much smaller density than the one of the unchanged $V_2O_3$ active layer. Figure.5.(d) and figure.5.(e) show devices in the HRS 5th cycle and the LRS 10th cycle states (resp.). Almost no difference is observed between these two states, although the V reservoir appears to extend further in the $V_2O_3$ active layer than in the initialized positive state. This last observation is confirmed by figure.5.(f) and figure.5.(g), respectively exhibiting EDX mappings of devices in HRS 100th cycle and LRS 100th cycle, where the V reservoir is significantly less contrasted and V species appear to be more diluted throughout the depleted zone. As the number of cycles increases, the V from the reservoir migrates back towards the low-density V depletion region.

In summary, EDX mappings of programmed devices reveal that:

* Initialization induces a migration of V species, creating a depleted zone and a reservoir of V in the case of positive bias initialization.

* The V reservoir is necessary for further cycling and tend to extend in the active layer as the cycling number increases

* A depleted zone, forming a shell around the V reservoir is present on all the programmed devices (negative initialized excepted)

After initialization the device is in HRS, one can hypothesize that HRS is caused by the highly resistive depleted zone, this is consistent with a transformation of $V_2O_3$ to a material with higher O:V ratio¹⁶.

Figs.6 show dark-field TEM pictures of devices programmed in HRS (5th cycle) and in LRS (1st cycle), with nano-diffraction pattern of nanometric zones marked in the TEM pictures. For both devices, the zones in the depleted regions, in the V reservoir and in the unaltered part of the active layer were analyzed with nano-diffraction. On figure.6.(a) (device programmed in HRS) all the zones within the unaltered active layer and in the V reservoir appeared to be crystallized, while the zones in the shell-shaped depleted region (zones 1, 2 and 3) show no diffraction patterns, suggesting that the depleted region is amorphous. In figure.6, the diffraction patterns showing a single bright-centered spot (source spot) with some diffuse background enlargement of the spot (green areas surrounding the source spot) are proof of an amorphous region. However, crystallized regions will feature other diffraction spots in addition to the source. On the device programmed in LRS (figure.6.(b)), all of the zones analyzed display diffrac-
<figure><img src="image_6.png" /><figcaption>FIG. 5. EDX mappings of (a) pristine device, (b) initialized device with positive bias, (c) initialized device with negative bias, (d) device in 5th reset, (e) device in 10th set, (f) device in 101th reset and (g) device in 100th set. Devices sizes are either 80x10 nm² or 100x10 nm²</figcaption></figure>

tion patterns, which means that the entire active layer is crystallized, even the depleted zone.

## IV. MODELING OF RESISTIVE SWITCHING

### A. Electrothermal study

Electrothermal 3D simulations are performed to estimate the temperature reached during initialization. The stack simulated is shown in the supplementary material (fig.S2), and is composed of layers going from the bulk Si-p to the upper metal layers. The simulation parameters are extracted from experimental QS electrical characterizations, and the device

temperature profile is given by solving the heat equation with the Joule heating source term coupled to the Laplace equation, with the assumption of an ohmic conducting mechanism for the $a-V_2O_3$ layer including fixed and uniform resistivity (more details are provided in supplementary material section B). Figure.7 shows the temperature profile in a cut plane $xz$ in the vicinity of the $BE/V_2O_3$ interface during initialization. The temperature profile of figure.7 matches the shape of the altered zone observed in TEM pictures (figure.6.(a)), and reaches 1770 K. Note that this temperature is approximated and likely overestimated, since no material modifications or any species migration is integrated in the model. Nonetheless, $V_2O_3$ is locally subjected to high temperatures that would promote species migration under an electric field
<figure><img src="image_7.png" /><figcaption>FIG. 6. (a) Bottom: TEM picture of device in 5th reset state, with 6 different zones marked 1 to 6; Top: Nano-diffraction pattern of the respective 6 marked zones. (b) Same analysis as (a) for a device in 1st set state.</figcaption></figure>

and structural changes. Since the melting temperature of $V_2O_3$ is 2240 K, a pure phase-change mechanism based on a melting →amorphization →crystallization is not relevant¹⁷. However, high temperatures will weaken the $V_2O_3$ bonds and create distortions in the crystalline phase, Kolobov et al. report that such distortions can lead to an amorphous phase without going through the melting phase in Ge-Sb-Te.¹⁸

As highlighted by electrothermal simulations, temperature plays an important role in the initialization. Figure.8.(a) presents the initialization and reset power for QS electrical measurements at different temperatures. RS power is expressed by $I_{max} \cdot V(I_{max})$ during QS cycling. As expected for a thermally driven mechanism, the power of the initialization decreases with temperature (figure.8.(a)). The same can be observed with the reset power, with a slight deviation at 200°C, probably due to the decreasing number of devices that survived the test to 200 °C. As mentioned before in the section III.A, figure.8.(a) clearly shows that the initialization step requires more power than the reset, underlining the unique nature of initialization. This phenomenon is largely enhanced by the geometry of the BE, which creates a bottleneck and facilitates both current confinement and, hence, thermal confinement.

The set operation appears to be temperature independent - besides a small increased variability on $V_{set}$ (figure.8.(b)) - which would suggest a fully electric-field driven mechanism. However, such a hypothesis does not account for the crystallization during set operation observed in nano-diffraction analysis (figure.6.(b)). This contradiction will be discussed in the next Section III.B.

## B. Resistive switching mechanism(s) interpretation

For the initialization step, a nanometric depleted zone is created in the active layer through electrically driven ionic migration. Since positively charged cations ($V^{3+}$) migrate in the direction of the electric field (figure.5.(a)), electromigration can be ruled out. The $V^{3+}$ migration under electric field is probably facilitated by the large density of grain boundaries, since polycrystalline IBD $V_2O_3$ typically has a small grain size.¹⁹ Furthermore, this ionic migration is arguably enhanced by the high temperatures reached by high-current Joule heating and the electrode geometry, which encourages thermal and

<figure><img src="image_8.png" /><figcaption>FIG. 7. 2D temperature mapping electrothermal simulation at the vicinity of the BE/a-$V_2O_3$ interface during a positive initialization (taken from 3D simulation).</figcaption></figure>
<figure><img src="image_9.png" /></figure>

FIG. 8. Average of maximum power ($I_{max} \cdot V(I_{max})$) during both initialization (red) and 5th reset (light red) versus temperature, over 10 and 6 various sizes devices respectively (top figure); Average of QS set bias versus temperature, over 8 various sizes devices (bottom figure).

current confinement at the interface $BE/V_2O_3$. The low density $V$ depleted area, consisting of an amorphous, assumed high $O:V$ ratio $VO_x$ and rich in $V$ vacancies, is highly resistive ($\sim 10^2 - 10^3 \Omega \cdot cm$).²⁰ Identifying the exact compound(s) and the stoichiometry of the depleted zone is impossible, as there are numerous stable vanadium oxides with higher oxidation states and lower density of $V_2O_3$ (4.9), and implementing quantitative characterisations - such as X-ray photoelectron spectroscopy - would prove difficult on such small scales. Yet, a probable candidate would be $V_2O_5$ since: (i) it is the most stable vanadium oxide of higher oxidation state than $V_2O_3$, (ii) its low density, (iii) its amorphous resistivity is reported to be $\sim 10^1 - 10^4 \Omega \cdot cm$, (iv) many redox phase conversion have been reported between $V_2O_3$ and $V_2O_5$, and (v) $V_2O_5$ is used as an active material in CBRAM.²¹,²²,²³,²⁴ In the case of positive initialization, $V$ migrates towards the $BE$ and creates a $V$ reservoir, which is the key to subsequent RS. Concerning the migration of $V$, three types of migration must be considered: electric field-induced ionic migration, thermoporosis (or the Ludwig-Soret effect) and concentration gradient ionic migration.²⁵,²⁶ The latter can be eliminated since no concentration gradient of $V$ or $O$ is observed in the EDX mappings of the pristine device (figure.5.a) - no evidence of density or concentration gradient within the pristine active layer is detected in the EELS mapping (see supplementary material section C). Thermoporosis can also be excluded as in the case of initialization with negative bias, $V$ migrates towards the cooler $TE$ (figure.5.b), while with thermoporosis $V$ should migrate towards the hot $BE$ regions (figure.7). Hence, migration induced by the electric field is the only phenomenon that explicates $V$ migration during initialization.

The nano-diffraction analysis (figure.6) of programmed device is reminiscent of a PCM mechanism, where the RS lies in the consecutive crystallization and amorphization of the active layer. In contrast to PCM, here only a small nanometric zone (a few nanometers wide) becomes amorphous, and the RS requires bipolar operations.²⁷ For all of these reasons, a

purely phase-change mechanism cannot be supported. It is postulated that the set operation arises from a filament-like scenario (partially supported by the abrupt nature of the set operation in Figure.2.(a)) or an area-dependent mechanism such as bulk ReRAM or bipolar PCM.²⁸,²⁹,³⁰ After initialization (or reset), it is assumed that upon the application of a negative bias, part of the $V$ from the $V$ reservoir will migrate back to the depleted region (hypothesis supported by EDX, figure.5), creating a filament-like conductive path through the yet amorphous shell-shaped $V$ depleted region. Like all filamentary ReRAMs, this operation is abrupt and inevitably induces a current overshoot (proportional to the ratio $R_{HRS}/R_{LRS}$).³¹,³² Re-crystallization of the depleted area during set is then surmised to be caused by $V$ migration, defect healing, and high temperatures generated by the current overshoot Joule heating. The filamentary mechanism is preferred to an area-dependent mechanism, since no correlation of $R_{LRS}$ versus device area is observed (figure.3), which is characteristic of filamentary mechanisms.

Reset mechanisms are suspected to be similar to those of initialization, where Joule heating and ionic migration recreate the highly resistive, low density, amorphous depleted zone. Reset currents/power are smaller than initialization currents as (i) the active area is now the depleted area, significantly less than the active area involved during initialization, and (ii) defects and depletion are already present post-initialization. In that sense, initialization is the equivalent of the forming process in ReRAMs, but with the current density as a key metric rather than the electric field in the case of ReRAMs. The functioning of $V_2O_3$ vanadium depletion memory is summarised in figure.9, illustrating all of the above assumptions.

Both reset and set operations can be optimized through miniaturization, since reset (and initialization) could be reduced by decreasing the area of the $BE$ and the required electric field for both set and reset would decrease while reducing the thickness of the active layer. The $V_2O_3$ memory yields excellent scalability, a large memory window ($>100$) with great multi-level potential and operates at sub $2V$.

<figure><img src="image_10.png" /></figure>

FIG. 9. Illustrated view of the devices elemental profile in 4 different states (pristine, initialized with positive bias, LRS and HRS).
# V. CONCLUSION

In conclusion, a novel memory based on a vanadium de-
pletion mechanism, within 10 nm thick V<sub>2</sub>O<sub>3</sub> active layer
with “wall” integration, has been discovered with a singu-
lar operando initialization process. This initialization process
consists in the creation of a nanometric highly resistive V de-
pletion zone. Subsequent RS were achieved up to 100 cy-
cles and are understood to follow widespread ReRAM mech-
anisms, relying on the creation/dissolution of a conductive
path. Unlike any other ReRAM, the pristine state is a con-
ductive state and instead of a common forming step, an ini-
tialization step is required. This unique mechanism is corrob-
orated with both electrical and chemico-physical characteri-
zations, along with 3D electrothermal simulations. This new
mechanism features redox, phase-change and ionic migration
phenomena in one memory cell, making this memory unpar-
alleled in the present literature. This new technique allows
excellent scalability, features a considerable memory window
(>1000), operates under 2V and is forming-free.

# SUPPLEMENTARY MATERIAL

In addition, a supplementary material document is provided
with this work. The readers will find information concerning
the V<sub>2</sub>O<sub>3</sub> phase characterizations (including XRD and EELS
spectra of the V<sub>2</sub>O<sub>3</sub> thin film). More information on the meth-
ods and parameters of the 3D electrothermal simulations is
also provided.

# ACKNOWLEDGMENTS

This work was supported by the French Public Authorities
in the frame of the Important Project of Common European
Interest (IPCEI) on microelectronics. Part of this work, car-
ried out on the Platform for Nanocharacterisation (PFNC),
was supported by the “Recherche Technologique de Base”
program of the French National Research Agency (ANR).

# AUTHOR DECLARATIONS

## Conflict of interest

The authors have no conflicts to disclose.

## Author contributions

**Killian Veyret:** Conceptualization (equal); Data cura-
tion (equal); Formal analysis (equal); Writing/Original draft
preparation (equal). **Nicolas Bernier:** Conceptualization
(equal); Formal analysis (equal); Data curation (equal);
Writing/Review & editing (equal). **Romain Bon:** Concep-
tualization (equal); Formal analysis (equal); Data curation

(equal). **Gabriele Navarro:** Conceptualization. **Rachid Hida:** Resources. **Catherine Carabasse:** Resources. **Patrice Gonon:** Conceptualization (equal); Formal analysis (equal); Writing/Review & editing (equal); Supervision. **Eric Jalaguier:** Conceptualization (equal); Formal analysis (equal); Writing/Review & editing (equal); Supervision.

# DATA AVAILABILITY STATEMENT

The data that supports the findings of this study are avail-
able from the corresponding author upon reasonable request.

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