# NEMS Devices for Accelerometers compatible with thin SOI technology

E. Oiller, L. Duraffourg, M.T. Delaye, H. Grange, S. Deneuville, J. Bernos, R. Dianoux, F. Marchi, D. Renaud, T. Baron, et al.

► To cite this version:

E. Oiller, L. Duraffourg, M.T. Delaye, H. Grange, S. Deneuville, et al., NEMS Devices for Accelerometers compatible with thin SOI technology. IEEE International Conference of Nano/Micro Engineered and Molecular Systems, Jan 2007, Bangkok, Thailand. pp.1078-1083, 10.1109/NEMS.2007.352257. hal-00534005

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# NEMS Devices for Accelerometers
## Compatible with Thin SOI Technology

E. Ollier<fnref n="1" />*, L. Duraffourg<fnref n="1" />, MT. Delaye<fnref n="1" />, H. Grange<fnref n="1" />, S. Deneuville<fnref n="1" />, J. Bernos<fnref n="1" />, R. Dianoux<fnref n="2" />, F. Marchi<fnref n="3" />, D. Renaud<fnref n="1" />, T. Baron<fnref n="1" />,<fnref n="4" />, P. Andreucci<fnref n="1" />, P. Robert<fnref n="1" />

***Abstract***— The paper presents Thin SOI NEMS structures for accelerometers based on Thin SOI technology and compatible with “In-IC” integration. Modeling of Casimir force, design of accelerometers, improvement of hybrid e-beam/DUV lithography and FH-vapor release, development of specific AFM characterizations have allowed to fabricate NEMS devices and to provide AFM characterizations.

***Index Terms***— integration, NEMS, SOI, accelerometer

## I. INTRODUCTION : INTEGRATION AND NEMS

A lot of MEMS are fabricated with stand-alone approaches even if an ASIC is generally provided in order to ensure driving and signal processing. Nevertheless, integration has been considered for several years. In addition to other integration strategies, SoC (System on Chip) approach is extensively investigated and leads to vertical or horizontal architectures enabling integration of MEMS and IC. Vertical integration tends to realize the integration at the substrate level, the interconnection level, the above-IC level or the module level. Horizontal integration allows to integrate the MEMS and the IC on the same surface. Monolithic integration of MEMS and microelectronics on thick SOI wafers has already been reported, the MEMS being manufactured before or after the CMOS.

Thin SOI technology is capable to push forward the possibilities by offering the ability to provide horizontal integration directly at the front-end level. Thin SOI technology means thin silicon top layer, for example 160nm thickness if we consider the 0.13µm CMOS SOI technological node. The idea is to use this thin silicon layer, traditionally dedicated to the CMOS process, for the MEMS fabrication (Fig.1). The first consequence is that at least one dimension of the MEMS structure is shrunk to the nanoscale. As a consequence the mechanical device must be considered as a NEMS (Nano-Electro-Mechanical Systems).

<figure><img src="image_2.png" /><figcaption>Figure 1. From MEMS devices to NEMS devices on Thin SOI substrate</figcaption></figure>

Despite the technological difficulties arising, this constrain can also be considered as an opportunity to benefit from the attributes of NEMS. Indeed, NEMS (Nano-Electro-Mechanical-Systems) devices are emerging as a new field with a great deal of interest because they offer in the same time compatibility with “In-IC” integration and also very interesting specific advantages such as potential ultra miniature size elements, low power consumption, potential high resonant frequencies and quality factors, fast response time, high sensitivity to applied force, external damping or additional mass. As a consequence, NEMS are very promising for ultimate sensing, autonomous sensors, battery-operated systems and can allow new architectures. Nowadays, NEMS are investigated in order to face the challenges of nano-world and have a better understanding of the fundamental issues of mechanics in the nano-scale [1]. But thanks to the combination of powerful attributes such as unprecedented mass sensitivity and high operational resonance, NEMS opens up the possibility to prospect ultimate inertial mass sensing [2]. Resonant NEMS can also be combined with nanoelectronic [3] to fabricate displacement detectors based on RF-SET (Radio-Frequency Single-Electron Transistor). NEMS-IC integration is highly suitable since it can enable to decrease the cost of MEMS. In addition, good performances can be expected because the proximity between NEMS and IC enables to suppress a lot of parasitic effects. In particular, thin SOI technology is a very good candidate since the same thin layer of single-crystal silicon can be used for both mechanical structures and advanced ICs.

In particular, this approach can be attractive for low cost accelerometers for applications such as: hard-drive protection, motion interface for cell phones, handheld PDAs, game controllers and also gesture recognition or motion capture for medical, wellness or sports activities [4].

<footnote n="1">¹ CEA/LETI - 17 rue des Martyrs 38054 Grenoble Cedex 9 - France</footnote>

<footnote n="2">² ESRF - B.P. 220, 38043 Grenoble cedex 9 - France</footnote>

<footnote n="3">³ CNRS/LEPES, 25 avenue des Martyrs, 38042 Grenoble Cedex 9 - France
Université Joseph Fourier, B.P. 53, 38041 Grenoble Cedex 9 - France</footnote>

<footnote n="4">⁴ STMicroelectronics - 850 rue Jean Monnet, 38926 Crolles - France</footnote>

<footnote>*Corresponding author: Eric Ollier, Tel : 33 4 38 78 57 35, Fax : 33 4 38 78 51 69, e-mail : Eric.Ollier@cea.fr</footnote>
50G and 10G accelerometers have been designed in two configurations: In-Plane (IP) accelerometers with sensitive axis included in the plane of the wafer, and Out-of-Plane (OOP) accelerometers with sensitive axis perpendicular to the wafer (Fig.2). An acceleration causes the motion of a proof-mass and the corresponding displacement is measured by means of a variation of capacitance between two sets of electrodes. The electrodes are either interdigitated combs (IP) or two parallel plates (OOP).

<figure><img src="image_3.png" /><figcaption>Figure 2. Principle of IP (In-Plane) and OOP (Out Of Plane) accelerometers</figcaption></figure>

If we consider 0.13µm CMOS SOI technology, the first constrain to take into account is the 160nm thickness of the silicon top layer that will be used for the NEMS and MEMS structures. In order to avoid parasitic deformations and undesirable vibration modes, the mass size has been limited to typical dimensions of 75x150µm and 100x100µm, respectively for IP and OOP accelerometers. As a consequence the mass is about 4ng. In addition, for IP accelerometers, low cross-sensitivity implies to increase the ratio thickness/width of the mechanical springs, leading to 50nm wide mechanical springs. In the same time, increase electrical sensitivity means decrease electrostatic gap down to 100-400nm. Finally, depending on the acceleration range and the resolution expected, the length of mechanical springs and the number of teeth of the electrostatic comb have been adapted. Typically, the length of springs and electrostatic teeth range from 1 to 10µm. For OOP accelerometers, the electrostatic gap is fixed by the 400nm BOX thickness. The mechanical springs are typically a few micrometer wide and 10µm to 100µm long depending on the acceleration range. The mechanical stiffnesses investigated in this study range from 10⁻² to 0.3N/m.The resonance frequencies are respectively about 10 to 20KHz for IP and OOP accelerometers. Because of thin SOI technology, some dimensions have been reduced drastically compared to traditional thick SOI technology and are now situated in the nano-scale, in particular the mechanical spring width (50nm) and the electrostatic gaps (100-400nm). As a consequence, the role of specific phenomenon occurring in the nano-scale has been studied, in particular the role

of quantum non-gravitational attraction named Casimir force. This force occurs at intermediate distances, between Van der Waals forces and electrostatic forces and can be attractive or repulsive depending on the conditions. A novel model has been developed for silicon devices in order to take into account doping level and dimensional effects. A corrective factor η=Fc/Fi is applied in the commonly used formulas established assuming parallel metal plates [5]. Fc is the corrected Casimir force, Fi is the ideal Casimir force assuming two uncharged infinite parallel plates with perfect conductivity. Fig.3 illustrates the effect of doping level and slab thickness on the corrective factor. These simulations show that silicon structures, even highly doped, allow to reduce the impact of Casimir force on the device behaviour compared to the ideal case with electrodes constituted of metal.

<figure><img src="image_4.png" /><figcaption>Figure 3. Effect of doping level and slab thickness on Casimir corrective factor</figcaption></figure>

Based on this model, 50G accelerometers have been designed in both IP and OOP configurations. IP50G accelerometers are constituted of a 75µmx150µm proof mass, electrostatic combs with teeth 80nm wide and gaps 130nm to 400nm wide. With 130nm gap, the mechanical spring is 50nm wide and 4µm long. With 400nm gap, the mechanical springs are 50nm wide and 11µm long. OOP accelerometers are constituted of a 100µmx100µm proof mass with an electrostatic gap 400nm wide. The mechanical springs are 10µm wide and 80µm long.
It has been demonstrated that the architecture has a strong influence on the impact of Casimir force. In particular, relative large gap and small tooth width minimize Casimir effect. As a consequence, a trade-off must be found between high sensitivity and low Casimir effect. Indeed, to reach better sensitivity, the flexure stiffness and/or the gap between two adjacent teeth must be decreased, but, in that case, Casimir impact tends to reduce the pull-in voltage, increase the capacitance variation and induce larger non-linearity. Fig.4 shows displacement/acceleration curves including the effect of Casimir force for IP-50G accelerometers, respectively for 130nm and 400nm gaps. This figure illustrates that for IP accelerometers, large gap (400nm) ensures negligible influence of Casimir force, but for smaller gaps (130nm), the impacts have quickly to be considered.
<figure><img src="image_5.png" /><figcaption>Figure 4. Displacement/acceleration curves for IP 50G accelerometer with respectively 130nm and 400nm gap (Influence of Casimir Force)</figcaption></figure>

Fig.5 and 6 give expected mechanical and electrical performances respectively for IP-50G and OOP-50G accelerometers.

<table><caption>Figure 5. Expected performances of IP 50G accelerometers (130nm-400nm gap)</caption><tbody><tr><th colspan="2">Mechanical results</th><th colspan="2">Mechanical results</th></tr><tr><td>Weigth (Kg)</td><td>4,10E-12</td><td>Weigth (Kg)</td><td>4,10E-12</td></tr><tr><td>Stiffness (µN/µm)</td><td>0,07</td><td>Stiffness (µN/µm)</td><td>0,017</td></tr><tr><td>Mechanical sensitivity (nm/g)</td><td>1</td><td>Mechanical sensitivity (nm/g)</td><td>2,4</td></tr><tr><th colspan="2">Electrical results</th><th colspan="2">Electrical results</th></tr><tr><td>Pull-in voltage (mV)</td><td>220</td><td>Pull-in voltage (V)</td><td>1,45</td></tr><tr><td>Pull-in displacement (nm)</td><td>52</td><td>Pull-in displacement (nm)</td><td>133</td></tr><tr><td>Co (fF)</td><td>7,3</td><td>Co (fF)</td><td>0,89</td></tr><tr><td>C full range (50G) (fF)</td><td>3,25</td><td>C full range (50G) (fF)</td><td>0,4</td></tr><tr><td>Electrical sensitivity (aF/g)</td><td>60</td><td>Electrical sensitivity (aF/g)</td><td>8</td></tr></tbody></table>

<table><caption>Figure 6. Expected performances of OOP 50G accelerometers (400nm gap)</caption><tbody><tr><th colspan="2">Mechanical results</th></tr><tr><td>Weigth (Kg)</td><td>3,64E-12</td></tr><tr><td>Stiffness (µN/µm)</td><td>0,017</td></tr><tr><td>Mechanical sensitivity (nm/g)</td><td>2,6</td></tr><tr><th colspan="2">Electrical results</th></tr><tr><td>Pull-in voltage (mV)</td><td>110</td></tr><tr><td>Pull-in displacement (nm)</td><td>110</td></tr><tr><td>Co (fF)</td><td>55,3</td></tr><tr><td>° C full range (50G) (fF)</td><td>28</td></tr><tr><td>Electrical sensitivity (aF/g)</td><td>540</td></tr></tbody></table>

IP accelerometers exhibit pull-in voltage from a few 100mV to 1.5V respectively for 130nm and 400nm gap width. FS

capacitance change is 3.5fF down to 0.4fF respectively for 130nm and 400nm gap width. OOP accelerometers exhibit driving voltage about a few 10mV to 100mv and FS capacitance change around a few 10fF. The sensitivities are respectively in the ranges of 10-100aF/g and 500-1000aF/g for IP and OOP accelerometers. These figures are far from conventional MEMS but can be considered as acceptable considering the fact that ultra low noise CMOS ICs are capable to resolve better than 1aF/sqrt(Hz) of capacitance variation. Moreover NEMS structures developed with “In-IC” integration approach will benefit of reduced parasitic capacitances allowing to expect to resolve 10⁻³aF/sqrt(Hz).

### III. THIN SOI FABRICATION

The fabrication of NEMS devices and accelerometers (Fig.7) is based on Thin SOI 130nm technology and 200nm facilities. The Si top layer is 160nm thick and the BOX oxide is 400nm thick.

<figure><img src="image_6.png" /><figcaption>Figure 7. Simplified flow-chart for fabrication of thin SOI NEMS</figcaption></figure>

Scaling considerations have been addressed in order to realize on the same wafer the nano-structures (springs, electrostatic combs) and the large structures (proof mass, electrical pads...). To reach this goal, hybrid lithography combining advanced UHR e-beam and 248nm DUV lithographies has been used. In addition, FH-vapor technique has been improved to enable the release and protection against sticking despite the 500nm diameter of the release holes and the 400nm thickness of the sacrificial oxide. Finally, AlSi metal was used for electrical pads.

These technologies have allowed to manufacture different NEMS structures such as thin mechanical beams, large mechanical structures like membranes of rigid masses and also narrow gaps
for electrical purposes. Fig. 8 illustrates how these technologies are used and highlights a few results obtained. In particular, mechanical beams 50nm wide and electrostatic gaps 100-400nm wide have been manufactured (Fig. 9).

<figure><img src="image_7.png" /><figcaption>Figure 8. Technology developments for fabrication of NEMS & accelerometers</figcaption></figure>

<figure><img src="image_8.png" /><figcaption>Figure 9. Elementary NEMS structures: thin mechanical beams and narrow gaps</figcaption></figure>

After release, the static behaviour of these N-MEMS structures depends strongly on the design. The potential defaults, illustrated on Fig. 10, are substrate or lateral sticking and residual deflections due to stresses. Nevertheless, appropriate design is capable to limit this kind of problems. Lateral and vertical stiffnesses must be sufficient to avoid sticking problems. Limitation of large structures dimensions and flexible beams length allows to limit residual deflections.

<figure><img src="image_9.png" /><figcaption>Figure 10. Examples of potential defaults encountered with NEMS structures</figcaption></figure>

These technologies have been used to manufacture thin SOI 50G IP and 50G OOP accelerometers (Fig. 11 & 12). Fig. 13 presents SEM photograph of a thin SOI IP NEMS accelerometer.

<figure><img src="image_10.png" /><figcaption>Figure 11. Photograph of thin SOI NEMS IP50G accelerometer</figcaption></figure>

<figure><img src="image_11.png" /><figcaption>Figure 12. Photograph of thin SOI NEMS OOP50G accelerometer</figcaption></figure>

<figure><img src="image_12.png" /><figcaption>Figure 13. SEM photograph of thin SOI NEMS IP accelerometer</figcaption></figure>

## IV. CHARACTERIZATION

Characterization of devices including NEMS structures is really challenging because some dimensions are in the nano-scale. In
addition, the structures are free standing and sometimes exhibit low stiffness. AFM technique has been investigated in order to provide measurement related to released NEMS structures. Specific procedures have been developed to solve the problems encountered, in particular to avoid breaking or instability occurring in case of low stiffness structures. AFM is used in tapping mode. This mode allows to limit mechanical interaction between the AFM tip and the NEMS measured. The oscillations are damped due to interaction between AFM tip and the surface in particular by Van der Waals forces. The cantilever is excited at resonance frequency (50-300kHz) with an amplitude of a few 10nm and a control of the oscillation amplitude. The AFM tip must be chosen carefully by considering mechanical stiffness, resonance frequency, curvature radius. In addition imaging conditions must be optimized for NEMS measurement. In particular, the amplitude set point is fixed to ensure soft tapping, the scan rate is reduced to ensure low scanning speed and the Z limit is fixed to ensure maximum vertical resolution. Vertical resolution is excellent (about A). Lateral resolution is limited by tip radius of curvature (a few nm). This AFM technique is now capable to provide information such as substrate/lateral sticking (Fig. 14). measurement of critical dimensions like cantilever beam vertical deflection and width (Fig. 15), with atomic resolution for vertical axis and a few nm for lateral resolution. These techniques have been used to investigate and characterize the behaviour of fabricated thin SOI IP and OOP accelerometers. In particular vertical position of the mechanical structure after release process has been investigated in details. Fig. 16 and 17 show characterization results related to vertical residual deflections of free-standing IP50G and OOP50G accelerometers after the end of the process.

<figure><img src="image_13.png" /><figcaption>Figure 14. AFM images and measurement of relative vertical position of fixed and released structures, for sticking problem evaluation</figcaption></figure>

<figure><img src="image_14.png" /><figcaption>Figure 15. AFM characterization of first NEMS structures
Cantilever beams: Thickness160nm - Width 200 nm - Length 1-few10µm</figcaption></figure>

<figure><img src="image_15.png" /><figcaption>Figure 16. AFM characterization of IP 50G accelerometer
Δz: vertical misalignment of movable structure</figcaption></figure>

<figure><img src="image_16.png" /><figcaption>Figure 17. AFM characterization of OOP 50G accelerometer
Δz: vertical misalignment of movable structure</figcaption></figure>
Figure 18 presents results of AFM measurements concerning vertical position of NEMS structures after release process for 50G IP and OOP accelerometers.

<table><caption>Figure 18. "Static characterization" of thin SOI IP50G and OOP50G accelerometers: vertical residual deflection after release process</caption><thead><tr><th>Type of accelerometer</th><th>Characteristics</th><th>Residual vertical deflection (nm)</th></tr></thead><tbody><tr><td rowspan="3">In-Plane<br>50G</td><td>Electrostatic Gap 150nm</td><td>&lt; +/- 6 nm</td></tr><tr><td>Mass 75x75µm</td><td></td></tr><tr><td>Electrostatic Gap 130nm</td><td>&lt; +/- 11 nm</td></tr><tr><td rowspan="3">Out-of-Plane<br>50G</td><td>Mass 75x150µm</td><td></td></tr><tr><td>Electrostatic Gap 400nm</td><td>&lt; +/- 6nm</td></tr><tr><td>Mass 100x100µm</td><td></td></tr></tbody></table>

These results show that appropriate design and technology allow to fabricate IP-50G and OOP-50G thin SOI accelerometers exhibiting negligible vertical residual deflection after process compared to the 160nm thickness.

In addition, "electro-mechanical" behaviour of NEMS submitted to driving voltage has been investigated. A line including a fixed part and a movable part is selected. Then images are realized for different actuation voltages. The main difficulty comes from the fact that AFM measurement is influenced by the electrical field created near the beam tip when a voltage is applied between different parts of the NEMS device.

Fig. 19 shows the first AFM characterization of displacement versus applied voltage obtained on a OOP 50G accelerometer submitted to an electrostatic force.

<figure><img src="image_17.png" /><figcaption>Figure 19. First result of "electro-mechanical characterization" of Thin SOI OOP 50G accelerometer</figcaption></figure>

The deflection obtained under applied voltage is 90nm (400nm gap). This first result demonstrates the capability of AFM technique to provide characterizations of electro-mechanical behaviour of NEMS devices and shows the feasibility of electrostatic driving of our NEMS structures. This work is still on progress in order to improve the AFM measurement and have a better understanding of NEMS electro-mechanical behaviour.

## V. CONCLUSION

First Thin SOI NEMS structures for accelerometers compatible with "In-IC" integration have been designed and fabricated in a thin 160nm SOI layer in order to be compatible with 0.13µm CMOS SOI technology. IP and OOP configurations have been designed and fabricated. The modeling and design take into account specific phenomenon occurring in the nano-scale, in particular Casimir force. NEMS accelerometers with mechanical springs 50nm wide, electrostatic gaps 130-400nm wide have been fabricated thanks to the use of hybrid lithography combining e-beam and DUV lithography and also FH-vapor release to limit sticking problems. AFM techniques have been investigated and optimized to characterize NEMS structures and accelerometers. It has been shown that appropriate design and technology enable to fabricate devices exhibiting negligible residual deflections and good mechanical behaviour after process. In addition, AFM has been investigated for electromechanical characterizations of NEMS and accelerometers submitted to an actuation voltage. The deflection obtained with OOP accelerometers demonstrates the capability of AFM technique to provide this kind of characterizations and also the feasibility of electrostatic driving of our NEMS structures. Complementary characterizations are currently on progress in order to characterize electro-mechanical static and dynamic behaviour and also to investigate more in details limitations in performances.

## ACKNOWLEDGMENT

Author acknowledges the support of European Commission for the funding of the integrated Project MIMOSA IST-2002-507045

## REFERENCES

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[4] http://www.mimosa-fp6.com

[5] P. Andreucci, L. Duraffourg, E. Ollier, V. Nguyen, M. T. Delaye, P. Robert, "Impact of Casimir force on nano accelerometers modeling", IEEE Sensors Conference 06, Daegu - Korea, 22-25 October, 2006