Apparatus and method for monitoring pixel data and display system adopting the same

An apparatus for monitoring pixel data includes a multiplexer configured to select pixel data applied to at least one of function blocks which is configured to convert the pixel data provided from an external device and adjust characteristics of a display device, a monitoring module configured to store the pixel data selected by the multiplexer, and an analyzing module configured to output a location selection signal to the multiplexer which provides the monitoring module with the pixel data based on the location selection signal, to read out the pixel data stored in the monitoring module by applying a pixel position signal to the monitoring module, and to analyze a variation of the read out pixel data.

This application claims priority to Korean Patent Application No. 10-2014-0066935, filed on Jun. 2, 2014, and all the benefits accruing therefrom under 35 U.S.C. §119, the contents of which are herein incorporated by reference in their entirety.

BACKGROUND

Exemplary embodiments of the invention relate to apparatus and method for monitoring pixel data and a display system adopting the monitoring apparatus. More particularly, exemplary embodiments of the invention relate to apparatus and method for monitoring a variation of pixel data applied to a display device and a display system adopting the monitoring apparatus.

2. Description of the Related Art

Generally, when an image is not displayed on a display panel or defects such as noise are generated, a data enable signal or a fail signal is analyzed by using a debug test point signal.

SUMMARY

Since a test point signal is omitted due to a downsizing of a printed circuit board (“PCB”), it is difficult to analyze a data enable signal or a fail signal when the test point signal does not exist or a measurement of the test point signal is difficult.

Moreover, it is difficult to check a variation of pixel data only by using a measuring a wave. That is, in a case of a compressed dynamic capacitance compensation (“DCC”) noise which is capable of checking a variation of pixel data by comparing with a variation between a previous frame data and a current frame data or a dithering noise which is capable of temporally/spatially checking a progress of data variation, it is difficult to check the variation of pixel data.

Exemplary embodiments of the invention provide an apparatus for monitoring a variation of pixel data applied to a display device in order to diagnose a cause of display defects of the display device.

Exemplary embodiments of the invention also provide a method for performing the above-mentioned apparatus.

Exemplary embodiments of the invention also provide a display system adopting the above-mentioned apparatus.

According to one exemplary embodiment of the invention, an apparatus for monitoring pixel data includes a multiplexer (“MUX”), a monitoring module and an analyzing module. The MUX is configured to select pixel data applied to at least one of function blocks configured to convert the pixel data provided from an external device and to adjust characteristics of a display device. The monitoring module is configured to store the pixel data selected by the MUX. The analyzing module is configured to output a location selection signal to the MUX which provides the monitoring module with the pixel data based on the selection signal, to read out pixel data stored in the monitoring module by applying a pixel position signal to the monitoring module, and to analyze a variation of the read out pixel data.

In an exemplary embodiment of the invention, the analyzing module and the monitoring module may be connected to each other in an I2C bus.

In an exemplary embodiment of the invention, the analyzing module may be configured to perform a master function, and the monitoring module may be configured to perform a slave function.

In an exemplary embodiment of the invention, the display device may include a timing controller which provides a driving part configured to control an operation of a display panel which is configured to display an image with compensated pixel data and a driving signal. The function block may be disposed in the timing controller.

In an exemplary embodiment of the invention, the MUX and the monitoring module may be disposed in the timing controller.

In an exemplary embodiment of the invention, the analyzing module may be disposed in the external device.

In an exemplary embodiment of the invention, the MUX may further select pixel data outputted from the at least one of the function blocks when the pixel data applied to the at least one of the function blocks is selected.

According to another exemplary embodiment of the invention, there is provided a method for monitoring pixel data. In the method, pixel data are selected, which is applied to at least one of function blocks converting the pixel data provided from an external device so as to adjust characteristics of a display device. The selected pixel data are stored. The stored pixel data are read out. A variation of the read out pixel data is analyzed.

In an exemplary embodiment of the invention, a number of the function blocks may be plural and the plural function blocks may be connected in serial. The stored pixel data may be pixel data applied to at least one of the function blocks from among the plural function blocks.

In an exemplary embodiment of the invention, a number of the function blocks may be plural and the plural function blocks may be connected in serial. The stored pixel data may include pixel data applied to the function block and pixel data outputted from the function blocks from among the plural function blocks.

According to another exemplary embodiment of the invention, a display system includes a display apparatus and a pixel data monitoring apparatus. The display apparatus includes a display panel configured to display an image, a driving part configured to control an operation of the display panel, and a timing controller configured to provide the driving part with pixel data and a driving signal. The pixel data monitoring apparatus is configured to read out resister values within the timing controller by accessing the timing controller, and to monitor a variation of the pixel data.

In an exemplary embodiment of the invention, the timing controller may include at least one of function blocks configured to convert the pixel data and enhance characteristics of the image displayed on the display panel. The pixel data monitoring apparatus may monitor the variation of the pixel data by reading out pixel data applied to the at least one of the function blocks in every frame.

In an exemplary embodiment of the invention, the pixel data monitoring apparatus may include a MUX, a monitoring module and an analyzing module. The MUX may be configured to select pixel data applied to the function block. The monitoring module may be configured to store pixel data selected by the MUX. The analyzing module may be configured to output a location selection signal to the MUX which provides the monitoring module with the pixel data based on the location selection signal, to read out pixel data stored in the monitoring module by applying a pixel position signal to the monitoring module, and to analyze a variation of the read out pixel data.

In an exemplary embodiment of the invention, the analyzing module may vary the location selection signal to check pixel data outputted from each of the at least one of the function blocks of the timing controller.

In an exemplary embodiment of the invention, the analyzing module may vary the pixel position signal to monitor pixel data of a desired area within the display panel.

In an exemplary embodiment of the invention, the analyzing module and the monitoring module may be connected to each other in an I2C bus.

In an exemplary embodiment of the invention, the analyzing module may perform a master function, and the monitoring module may perform a slave function.

In an exemplary embodiment of the invention, the timing controller may include at least one of function blocks configured to convert the pixel data and enhance characteristics of the image displayed on the display panel. The pixel data monitoring apparatus may be configured to monitor the variation of before conversion pixel data applied to the at least one of the function blocks and after-conversion pixel data outputted from the at least one of the function blocks.

In an exemplary embodiment of the invention, the pixel data monitoring apparatus may include a MUX, a monitoring module and an analyzing module. The MUX may be configured to simultaneously select the before-conversion pixel data and the after-conversion pixel data. The monitoring module may be configured to store the before-conversion pixel data and the after-conversion pixel data which are selected by the MUX. The analyzing module may be configured to output a location selection signal to the MUX which provides the monitoring module with the before-conversion pixel data and the after-conversion pixel data. The analyzing module may be configured to read out the before-conversion pixel data and the after-conversion pixel data by applying a pixel position signal to the monitoring module. The analyzing module may analyze a variation of the read out pixel data.

In an exemplary embodiment of the invention, an operation of the pixel data monitoring apparatus may be performed during an operation interval during which an update of the pixel data is not generated.

According to some exemplary embodiments of the invention, a variation of pixel data is monitored, which is stored in a register map by using an I2C slave mode, so that a cause of display defects may be accurately diagnosed. Moreover, since an I2C slave mode block of a timing controller disposed in a display device is utilized, it may monitor pixel data without an additional logic design.

DETAILED DESCRIPTION OF THE INVENTION

FIG. 1is a block diagram for illustrating a pixel data monitoring apparatus10according to an exemplary embodiment of the invention.

Referring toFIG. 1, the pixel data monitoring apparatus10according to an exemplary embodiment of the invention includes a multiplexer (“MUX”)12, a monitoring module14and an analyzing module16to monitor and analyze a variation of pixel data applied to at least one of a plurality of function blocks which converts pixel data so as to adjust characteristics of a display device. InFIG. 1, the function blocks includes a first function block BL1, a second function block BL2, a third function block BL3, a firth function block BL4and a fifth function block BL5. The first to fifth function blocks BL1, BL2, BL3, BL4and BL5are connected in serial. The first function block BL1receives pixel data from an external host (not shown) through a receiving interface I/F(Rx), and the fifth function block BL5outputs pixel data having enhanced display characteristics through a transmitting interface VF(tx).

The MUX12selects pixel data applied to the function blocks connected in serial in response to a location selection signal applied to the analyzing module16. That is, the MUX12may select pixel data applied to one of the first to fifth function blocks BL1, BL2, BL3, BL4and BL5in accordance with the location selection signal.

The monitoring module14stores pixel data selected by the MUX12. The monitoring module14may include a memory which stores pixel data per frames. In the illustrated exemplary embodiment, the monitoring module14may be a memory capable of storing pixel data during the maximum 32-frames, for example. In this case, a size of the memory may be increased in accordance with the number of frames and bit number of red, green and blue (“RGB”) pixel data.

The analyzing module16outputs the location selection signal to the MUX12, so that the pixel data is provided to the monitoring module14. Moreover, the analyzing module16applies a pixel position signal to the monitoring module14to read out pixel data stored in the monitoring module14, and analyzes a variation of the read pixel data. In the illustrated exemplary embodiment, since the pixel position signal is applied to the monitoring module14, pixel data corresponding to pixel of desired position within a display panel may be selected. The analyzing module16may read out plural pixel data every frame in correspondence with a particular pixel, so that a variation of pixel data may be analyzed.

In an exemplary embodiment, the analyzing module16and the monitoring module14may be connected to each other in an inter-integrated circuit bus (“I2C bus”), for example. The I2C bus includes a serial clock line SCL for sending clock pulses and a serial data line SDA for serially sending data, and sends and receives data according to clock pulses. Further, devices connected to the I2C bus communicate as a master and a slave. The I2C protocol is a serial bus protocol capable of supporting communications with a plurality of slaves which are connected through the two lines SCL and SDA and power lines to send and receive data.

In the illustrated exemplary embodiment, the analyzing module16performs a master function, and the monitoring module14performs a slave function, for example. That is, the analyzing module16is connected to the monitoring module14through two lines SCL and SDA. The analyzing module16performs a read operation or a write operation for input/output (“I/O”) devices on an I2C bus by using an I2C bus controller (not shown) so as to control I/O devices supporting I2C protocol.

Moreover, the analyzing module16generates a clock signal pulse as a device which initiates transmitting, and plays a role of ending the transmitting. The monitoring module14is a device which is addressed by the analyzing module16. When the analyzing module16makes a start condition, the monitoring module14that is a slave device connected to a bus waits for following data.

When the analyzing module16transmits a slave address, the monitoring module14compares with the slave address and its own unique address. When the slave address and the unique address are equal to each other, the monitoring module14transmits a response to the analyzing module16during an acknowledgement signal interval. Thus, the analyzing module16may transmit data to the monitoring module14or may receive data from the monitoring module14. In an alternative exemplary embodiment, the monitoring module14may transmit data to the analyzing module16or may receive data from the analyzing module16. When data transmitting and receiving are finished, a master makes a stop status and disconnects a bus interface.

The display device may include a timing controller which provides a driving part controlling a display panel displaying images with pixel data and a driving signal. In an exemplary embodiment, the function block is disposed in the timing controller. In the illustrated exemplary embodiment, the MUX12and the monitoring module14may be disposed in the timing controller.

In an exemplary embodiment, the analyzing module16is disposed in an external device (not shown). In an exemplary embodiment, the external device may be a main frame of computer on which a graphic controller is disposed so as to realize a display system, for example. In another exemplary embodiment, the external device may be a test device which tests whether an operation of a display device is performed or not.

In the illustrated exemplary embodiment, an operation of the pixel data monitoring apparatus10is performed during an operation interval during which an update of the pixel data is not generated, for example, an operation interval that an initialization operation is performed or a display operation is performed. When an update of pixel data is generated during the analyzing module16is accessing to the monitoring module14, the pixel data are continuously varied so that it is difficult to analyze a variation of the pixel data.

In the illustrated exemplary embodiment, it is described that the MUX12selects pixel data applied to the function block. In an alternative exemplary embodiment, the MUX12may further select pixel data output from the function block when the pixel data applied to the function block are selected. Here, the pixel data applied to the function block are before-conversion pixel data, and the pixel data outputted from the function are after-conversion pixel data.

When the MUX12simultaneously selects the before-conversion pixel data and the after-conversion pixel data, the before-conversion pixel data and the after-conversion pixel data are stored in the monitoring module14. The analyzing module16applies a pixel position signal to the monitoring module14to analyze a variation of pixel data by reading out the before-conversion pixel data and the after-conversion pixel data stored in the monitoring module14. In an exemplary embodiment, the pixel position signal may include a position of a pixel in X-axis and Y-axis.

FIG. 2is a block diagram explaining a display system having a monitoring apparatus of pixel data adopted thereto.

Referring toFIG. 2, a display system according to an exemplary embodiment of the invention includes a liquid crystal display panel100, a gate driver200, a data driver300, a timing controller400, a driving voltage generating part500and a host600.

The liquid crystal display panel100includes a thin-film transistor SW and a liquid crystal capacitor Clc that are connected to plural gate lines G1to Gn and plural data lines D1to Dm and storage capacitor Cst to display images.

In an exemplary embodiment, the liquid crystal display panel100includes the plurality of gate lines G1-Gn extending in a first direction, the plurality of data lines D1-Dm extending in a second direction crossing to the gate lines G1to Gn, and a pixel region defined at the respective intersections of the gate lines G1to Gn and the data lines D1-Dm, for example. However, the invention is not limited thereto, and the pixel region may not be defined by the gate lines G1to Gn and the data lines D1-Dm. Pixels each having the thin-film transistor SW, the storage capacitor Cst, and the liquid crystal capacitor Clc are provided in the pixel region. In an exemplary embodiment, the pixels may include a red (R) pixel, a green (G) pixel, and a blue (B) pixel, for example. In an exemplary embodiment, the R pixel, the G pixel, and the B pixel are sequentially arranged in odd-numbered rows, and the B pixel, the R pixel, and the G pixel are sequentially arranged in even-numbered rows. However, the invention is not limited thereto, and other pixel arrangements are also possible.

In an exemplary embodiment, the thin-film transistor SW includes a gate electrode, a source electrode and a drain electrode. Each of the gate electrodes is connected to the gate lines G1-Gn, each of the sources is connected to the data lines D1-Dm, and each of the drains is connected to the storage capacitor Cst and the liquid crystal capacitor Clc. When the thin-film transistor SW operates in response to the gate driving signals applied to the gate lines G1-Gn and the data signals are applied through the data lines D1-Dm to the pixel electrodes, electric fields across the liquid crystal capacitors Clc are changed. Due to the changed electric fields, the arrangement of the liquid crystals is changed and thus the transmittance of light supplied from a backlight (not shown) is controlled.

The gate driver200, the data driver300, the timing controller400and the driving voltage generating part500are provided outside the liquid crystal display panel100and supply a plurality of signals for the operation of the liquid crystal display panel100. In an exemplary embodiment, the gate driver200may be disposed on the liquid crystal display panel100. In an exemplary embodiment, the data driver300may be mounted on the liquid crystal display panel100, or may be mounted on a separate printed circuit board (“PCB”) and electrically connected to the PCB panel100through a flexible PCB (“FPC”). In an exemplary embodiment, the timing controller400and the driving voltage generating part500may be mounted on a PCB and electrically connected to the liquid crystal display panel100through a FPC.

The timing controller400controls the gate driver200and the data driver300by using control signals R, G, B, DE, Hsync, Vsync and CLK provided from the host600.

In another exemplary embodiment, the timing controller400receives image data and display control signals from an external graphic controller (not shown), for example. In an exemplary embodiment, the image data include pixel data R, G and B, and the display control signals include a horizontal sync signal Hsync, a vertical sync signal Vsync, a main clock CLK, and a data enable signal DE. In an exemplary embodiment, the timing controller400performs an initialization operation, a display operation, and an update operation in this order.

The initialization operation includes reading initialization data from an internal or external memory and setting the data to allow the timing controller400to operate. Examples of the initialization data include a resolution, a timing, a color correction, a response time compensation, and a driving voltage setting.

The display operation is to process the pixel data according to the operation conditions of the liquid crystal display panel100and generate a gate control signal CON1and a data control signal CON2respectively to the gate driver200and the data driver300. In an exemplary embodiment, the gate control signal CON1includes a vertical sync start signal indicating the output start of a gate turn-on voltage Von, a gate clock signal for controlling an output timing of the gate turn-on voltage Von, and an output enable signal for controlling a duration of the gate turn-on voltage Von. In an exemplary embodiment, the data control signal CON2includes a horizontal sync start signal indicating the transfer start of the pixel data, a load signal instructing the loading of a data voltage on the corresponding data line, an inversion signal for inverting a polarity of a gray scale voltage with respect to a common voltage, and a data clock signal.

When a setting is changed during the display operation, the update operation is performed simultaneously with the display operation. In the update operation, update data stored in the memory are received and applied to the image display in a blank period between frames. In the update operation, the timing controller400receives update data stored in an inner memory and applies to the image display in a blank period between frames.

The driving voltage generating part500generates the driving voltages Von, Voff and AVDD to the gate driver200and the data driver300according to the output signals of the timing controller400.

In an exemplary embodiment, the driving voltage generating part500generates a variety of driving voltages necessary for the operation of the display system by using external voltages supplied from an external power supply according to a control signal CON3output from the timing controller400, for example. The driving voltage generating part500generates the reference voltage AVDD, the gate turn-on voltage Von, the gate turn-off voltage Voff, and the common voltage. The driving voltage generating part500applies the gate turn-on voltage Von and the gate turn-off voltage Voff to the gate driver200and the reference voltage AVDD to the data driver300according to the control signals output from the timing controller400. The reference voltage AVDD is used as a reference voltage to generate gray scale voltages for driving the liquid crystals.

The gate driver200is connected to the gate lines GL1-Gn and controls an operation of the thin-film transistor SW.

In an exemplary embodiment, the gate driver200applies the gate turn-on voltage and the gate turn-off voltage Voff to the gate lines G1-Gn according to the gate control signal CON1output from the timing controller500, for example. In this way, the thin-film transistor SW may be controlled to apply the gray scale voltages to the corresponding pixels.

The data driver300controls a data signal applied to the liquid crystal capacitor Clc and the storage capacitor Cst through the thin-film transistor SW.

In an exemplary embodiment, the data driver300generates the gray scale voltages by using the data control signal CON2output from the timing controller400and the reference voltage AVDD output from the driving voltage generating part500, and applies the generated gray scale voltages to the data lines D1-Dm, for example. That is, the data driver300converts digital pixel data, based on the reference voltage AVDD, to generate analog data signals, that is, the gray scale voltages.

The host600accesses to the timing controller400to read out register values within the timing controller400to perform a function of monitoring a variation of the pixel data. In an exemplary embodiment, the host600and the timing controller400are connected to each other in an I2C bus, for example. In the exemplary embodiment, the host600performs a master function, and the timing controller400performs a slave function, for example.

In order to monitor a variation of the pixel data, an interval that the host600accesses to the timing controller400is an operation interval during which an update of the pixel data is not generated, for example, an initialization operation or a display operation.

FIG. 3is a block diagram explaining the timing controller and peripheral thereof shown inFIG. 2in order to explain a pixel data monitoring apparatus.

Referring toFIGS. 2 and 3, the timing controller400includes a receiving part410, a color correcting part412, a response time compensating part414, a smear correcting part416, transmitting part418, a controlling part420, a data converting part430, a MUX440and a monitoring module450. A signal generator which generates a variety of clock signals, a buffer which synchronizes with pixel data and clock signals, a setting part which sets a resolution and a timing, a control signal which generating part which generates a control signal, etc., are not shown inFIG. 3.

Moreover, a first memory460and a second memory470storing a variety of information for driving the timing controller400are disposed at an exterior of the timing controller400. In an alternative exemplary embodiment, the first memory460and the second memory470may be disposed at an interior of the timing controller400.

In an exemplary embodiment, the first memory460is implemented with a nonvolatile memory such as EEPROM, and stores the resolution and timing data, the option data, the color data, the response time compensation data, and the voltage data, for example.

In an exemplary embodiment, the second memory470is implemented with a volatile memory such as DRAM, and stores the color data corrected by the color correcting part412, for example. The second memory470may also store the data synchronized with the internal clock signals by the receiving part410according to the structure of the timing controller400.

The receiving part410receives an image signal, that is, pixel data R, G, B from a graphic controller610disposed at a host600, and provides the color correcting part412with the pixel data.

The color correcting part412color-corrects the pixel data provided from the receiving part410, and provides the response time compensating part414with the color-corrected pixel data. In an exemplary embodiment, the color correcting part412receives the pixel data R, G and B stored in the first memory460through the controlling part420and corrects the received pixel data R, G and B by using the stored color correction data, for example. That is, after storing the color correction data, the color correction part412corrects at least one of the R data, the G data, and the B data by using the color correction data. Here, the color correction data may be previously determined and stored according to the characteristics of the liquid crystal display panel100in its manufacturing process.

The response time compensating part414compensates the response time of the pixel data provided from the color correcting part412, and provides the smear correcting part416with the compensated pixel data. In an exemplary embodiment, the response time compensating part414compares data of a previous frame with data of a current frame and reduces time necessary to convert the data of the current frame. Since the response time of the liquid crystal display panel100is slower than the variation of the applied voltage, the operation of the liquid crystal display panel100is not completely changed even though the data has been changed. Therefore, an overdriving is performed to further change the data so as to approach the response time of the liquid crystal display panel100. To this end, the response time compensating part414receives the pixel data of the previous frame stored in the second memory470through the data converting part430, compares it with the pixel data of the current frame corrected by the color correcting part412, and then compensates the response time. At this point, the degree of the overdriving is previously set. The response time compensation data are stored in the first memory460. Therefore, the response time compensating part414receives the response time compensation data from the first memory460through the controlling part420, stores the received response time compensation data, and then compensates the response time.

The smear correcting part416compensates a smear of the compensated pixel data provided from the response time compensating part414, and provides the transmitting part418with the smear compensated pixel data.

The transmitting part418provides the data driver300(shown inFIG. 2) with the smear compensated pixel data R′, G′ and B′.

The controlling part420transfers operation information of the timing controller400. In an exemplary embodiment, the controlling part420transfers various data stored in a first memory460to each elements of the timing controller400. That is, the controlling part420transfers the color correcting data stored in the first memory460to the color correcting part412, the transmits response time compensation data and the update data to the response time compensating part414, and transmits the smear correction data to the smear correcting part416.

The data converting part430converts data formats of the inside or outside of the timing controller400. In an exemplary embodiment, the data converting part430may convert color data, which are corrected by the color correcting part412, into data suitable for the data formats of the second memory470to store the converted color data in the second memory470, and may convert the color data stored in the second memory470into data suitable for the internal formats of the timing controller400to deliver the color data in the response time compensating part414. Moreover, in accordance with a configuration of the timing controller400, the data converting part430may convert data synchronized with an internal clock signal of the timing controller400into data suitable for the data formats of the second memory470to store the converted data in the second memory470, and may convert the synchronized data stored in the second memory470into data suitable for the internal formats of the timing controller400to deliver the data in the color correcting part412.

The MUX440selects pixel data applied to a function block, for example, the color correcting part412, the response time compensating part414and the smear correcting part416, which converts pixel data provided from an analyzing module620of the host600to be suitable for characteristics of a display device.

In an exemplary embodiment, the MUX440may select one of the color correcting part412, the response time compensating part414and the smear correcting part416, and may provide the monitoring module450with pixel data applied to the selected part, for example.

In another exemplary embodiment, the MUX440may select one of the color correcting part412, the response time compensating part414and the smear correcting part416, and may provide the monitoring module450with pixel data applied to the selected part and pixel data outputted from the selected part.

The monitoring module450stores pixel data selected by the MUX440.

In an exemplary embodiment, the analyzing module620and the monitoring module450are connected to each other in an I2C bus. In the illustrated exemplary embodiment, the analyzing module620performs a master function, and the monitoring module450performs a slave function. The analyzing module620outputs a location selection signal to the MUX440so as to provide the monitoring module450with the pixel data, read out pixel data stored in the monitoring module450by applying a pixel position signal to the monitoring module450, and analyzes a variation of the read out pixel data. In an exemplary embodiment, the monitoring module450may output 10 bit pixel data, for example.

The analyzing module620varies the location selection signal to check pixel data outputted from every function block of the timing controller. In an exemplary embodiment, the analyzing module620checks pixel data outputted from the color correcting part412, pixel data outputted from the response time compensating part414, or pixel data outputted from the smear correcting part416.

The analyzing module620may vary the pixel position signal to monitor pixel data of a desired area within the display panel.

In an exemplary embodiment, the analyzing module620may check a variation of pixel data during the maximum 32-frames by using an internal memory, for example. In exemplary embodiments, the internal memory may be disposed in the host600or the timing controller400.

In the illustrated exemplary embodiment, an operation of the monitoring module450and an operation of the analyzing module620may be performed during an operation interval during which an update of the pixel data is not generated. When an update of pixel data is generated during the analyzing module620is accessing, the pixel data are continuously varied so that it is difficult to analyze a variation of the pixel data.