Light emitting device with high efficiency

A light emitting device includes a substrate including gallium nitride, and a semiconductor layer disposed on the substrate, the semiconductor layer including an n-type nitride semiconductor layer, an active layer disposed on the n-type nitride semiconductor layer, and a p-type nitride semiconductor layer disposed on the active layer, in which an angle defined between a crystal growth plane of the substrate and an m-plane thereof is in a range of 3.5° to 6.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims priority from and the benefit of Korean Patent Application No. 10-2015-0126400, filed on Sep. 7, 2015, Korean Patent Application No. 10-2015-0126407, filed on Sep. 7, 2015, and Korean Patent Application No. 10-2016-0102331, filed on Aug. 11, 2016, which are hereby incorporated by reference for all purposes as if fully set forth herein.

BACKGROUND

Field

Exemplary embodiments relate to a light emitting device and, more particularly, to a light emitting device with improved internal quantum efficiency.

Discussion of the Background

Nitride semiconductors broadly used as base materials for light emitting devices, such as light emitting diodes, in recent years are produced through growth on a homogeneous substrate such as a gallium nitride substrate or a heterogeneous substrate such as a sapphire substrate. Some factors influencing crystallinity and luminous efficacy of such nitride semiconductors are associated with the characteristics of a growth substrate.

In a light emitting device including nitride semiconductors, a plane in which electrons and holes are recombined with each other is generally horizontal to a growth plane, and thus, a light emitting device may exhibit different characteristics depending upon the growth plane of the nitride semiconductors. For example, a nitride semiconductor grown on a growth substrate having a polar plane (for example, c-plane) as the growth plane may be grown in a normal direction with respect to the polar plane, which may entail spontaneous polarization and piezoelectric polarization due to a difference in lattice parameter. Such polarization effects through spontaneous polarization and piezoelectric polarization may cause an energy band of the nitride semiconductor to be bent, thereby separating distributions of holes and electrons in an active layer from each other. In this manner, the light emitting device may have low luminous efficacy from the deterioration of recombination efficiency of electrons and holes, suffer from red shift of light emission and increase in forward voltage Vf. Furthermore, upon growth of the c-plane, Mg in a p-type semiconductor layer may diffuse into the active layer, which may cause deterioration in internal quantum efficiency.

SUMMARY

Exemplary embodiments provide a light emitting device that has increased depth of well layers in order to improve luminous recombination while preventing a droop phenomenon.

Exemplary embodiments further provide a light emitting device that may improve luminous recombination while preventing a droop phenomenon upon application of forward bias.

Exemplary embodiments still provide a light emitting device that may prevent Mg from diffusing into an active layer while improving hole injection into the active layer.

According to an exemplary embodiment, a light emitting device includes a substrate including gallium nitride, and a semiconductor layer disposed on the substrate, the semiconductor layer including an n-type nitride semiconductor layer, an active layer disposed on the n-type nitride semiconductor layer, and a p-type nitride semiconductor layer disposed on the active layer, in which an angle defined between a crystal growth plane of the substrate and an m-plane thereof is in a range of 3.5° to 6°.

The crystal growth plane of the substrate may be at least one of (6 0 −6 1), (7 0 −7 1), and (8 0 −8 1) planes.

An angle defined between a crystal growth plane of the semiconductor layer and the m-plane of the substrate may be in a range of 3.5° to 6°.

The active layer may include (Al, Ga, In)N, a barrier layer having a thickness in a range of 12 nm to 32 nm, and a well layer having a thickness in a range of 3 nm to 10 nm.

The semiconductor layer may further include a super lattice layer disposed interposed between the n-type nitride semiconductor layer and the active layer, and the super lattice layer may include indium (In).

The semiconductor layer may further include an electron blocking layer disposed between the p-type nitride semiconductor layer and the active layer, and the electron blocking layer may include at least one of AlxGa(1-x)N (0<x<1) and AlxInyGa(1-x-y)N (0<x<1, 0<y<1, 0<x+y<1).

The electron blocking layer may have a energy band-gap greater than that of the barrier layer.

The light emitting device may further include a first hole injection layer disposed between the active layer and the p-type nitride semiconductor layer.

The first hole injection layer may include (Al, Ga, In)N and may have a dopant concentration of 1E20/cm3to 5E20/cm3.

The semiconductor layer may further include a first undoped layer disposed between the first hole injection layer and the p-type nitride semiconductor layer.

The first undoped layer may have a dopant concentration of less than 1E18/cm3.

The semiconductor layer may further include an electron blocking layer disposed between the p-type nitride semiconductor layer and the first hole injection layer, and the electron blocking layer may include at least one of AlxGa(1-x)N (0<x<1) and AlxInyGa(1-x-y)N (0<x<1, 0<y<1, 0<x+y<1).

The p-type nitride semiconductor layer may include a second hole injection layer, a p-type contact layer, and a hole transfer layer disposed between the second hole injection layer and the p-type contact layer, the hole transfer layer may include a plurality of second undoped layers and at least one intermediate doped layer disposed between the second undoped layers, each of the second undoped layers may include a region having a concentration of holes gradually decreasing with increasing distance from the second hole injection layer or the p-type contact layer, and the intermediate doped layer may at least partially overlap each of the second undoped layers in a region where the concentration of holes reaches 62% to 87% of the concentration of holes of the p-type contact layer.

The first and second hole injection layers may each have a dopant concentration of 1E20/cm3to 5E20/cm3, the p-type contact layer may have a dopant concentration of 4E20/cm3to 1E21/cm3, the intermediate doped layer may have a dopant concentration of 1E18/cm3to 1E20/cm3, and the second undoped layers may have a dopant concentration of less than 1E18/cm3.

A thickness of the hole transfer layer may be greater than a total thickness of the second hole injection layer and the p-type contact layer.

The intermediate doped layer may have a thickness in a range of 5 nm to 10 nm and each of the second undoped layers may have a thickness in a range of 3 nm to 25 nm.

The second hole injection layer may adjoin the electron blocking layer.

The intermediate doped layer may have an electrical resistance greater than an electrical resistance of the second undoped layers.

The substrate may include opposite side surfaces in a c-axis direction and opposite side surfaces in an a-axis direction, and the opposite side surfaces in the c-axis direction may include surface textures.

According to an exemplary embodiment, a light emitting device includes an n-type nitride semiconductor layer, an active layer disposed on the n-type nitride semiconductor layer, and a p-type nitride semiconductor layer disposed on the active layer, in which the active layer includes a first plane facing the p-type nitride semiconductor layer, and an angle defined between the first plane and an m-plane of the active layer may be in a range of 3.5° to 6°.

The active layer may include (Al, Ga, In)N, a barrier layer and a well layer having a thickness in a range of 3 nm to 10 nm.

The barrier layer may have a thickness in a range of 12 nm to 32 nm.

The light emitting device may further include a first hole injection layer disposed between the active layer and the p-type nitride semiconductor layer.

The first hole injection layer may include (Al, Ga, In)N and have a dopant concentration in a range of 1E20/cm3to 5E20/cm3.

The light emitting device may further include a first undoped layer disposed between the first hole injection layer and the p-type nitride semiconductor layer.

The first undoped layer may have a dopant concentration of less than 1E18/cm3.

According to exemplary embodiments, since distributions of holes and electrons present in a conduction band (EC) and in a valence band (EV), respectively, approach each other upon application of forward bias to the light emitting device, luminous recombination of holes and electrons increases, thereby suppressing a droop phenomenon. In addition, the light emitting device has an increased thickness of a well layer, such that Auger recombination is reduced, thereby further suppressing the droop phenomenon.

Furthermore, the light emitting device according to exemplary embodiments includes a first hole injection layer, which may prevent diffusion of Mg even without a separate semiconductor layer between the active layer and the first hole injection layer, thereby improving hole injection into the active layer and reliability of the light emitting device while simplifying a manufacturing process.

DETAILED DESCRIPTION OF THE ILLUSTRATED EMBODIMENTS

Hereinafter, exemplary embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. The following embodiments are provided by way of example so as to fully convey the spirit of the present disclosure to those skilled in the art to which the present disclosure pertains. Accordingly, the present disclosure is not limited to the embodiments disclosed herein and can also be implemented in different forms. In the drawings, widths, lengths, thicknesses, and the like of elements can be exaggerated for clarity and descriptive purposes. When an element or layer is referred to as being “disposed above” or “disposed on” another element or layer, it can be directly “disposed above” or “disposed on” the other element or layer or intervening elements or layers can be present. Throughout the specification, like reference numerals denote like elements having the same or similar functions.

FIG. 1is a sectional view of a light emitting device according to an exemplary embodiment.

Referring toFIG. 1, the light emitting device according to the exemplary embodiment may include a substrate100and a semiconductor layer110.

The substrate100may support the semiconductor layer110and allow the semiconductor layer110to be grown thereon. The substrate100may include gallium nitride (GaN). Thus, during the growth of the semiconductor layer110including gallium nitride on the substrate100, a difference in lattice parameter between the substrate100and the semiconductor layer110may be reduced to improve crystallinity of the light emitting device, which may improve internal quantum efficiency of the light emitting device.

FIG. 2AandFIG. 2Bshow a perspective view and a conceptual view of a substrate of the light emitting device, respectively, according to an exemplary embodiment.

The substrate100has a crystal growth plane101. Referring toFIG. 2B, an angle (θ) defined between the crystal growth plane101of the substrate100and the (1 0 −1 1) plane of the substrate100may be in the range of 3.5° to 6°. Generally, the substrate100formed of gallium nitride may be a single crystal substrate having a crystal structure of a hexagonal system. The crystal growth plane of the substrate100may be at least one of a polar plane, a non-polar plane, and a semi-polar plane. The c-plane103corresponding to the (0 0 0 1) plane is the polar plane, the m-plane102corresponding to the (1 0 −1 −1) plane is the non-polar plane, and some planes of the substrate100may be semi-polar planes. Accordingly, the crystal growth plane101satisfying the angle (θ) in the range of 3.5° to 6° is the semi-polar plane. Specifically, the crystal growth plane101of the substrate100may be at least one plane of the (6 0 −6 1), (7 0 −7 1), and (8 0 −8 1) planes. An upper surface of the substrate100may be the crystal growth plane101of the substrate100.

The semiconductor layer110may be grown along the crystal growth plane101of the substrate100. That is, the semiconductor layer110has the same crystal plane as the crystal growth plane101of the substrate100. Accordingly, if the angle (θ) defined between the crystal growth plane101of the substrate100and the (1 0 −1 1) plane of the substrate100is in the range of 3.5° to 6°, an angle defined between each crystal growth plane of layers constituting the semiconductor layer110and the m-plane of each of the layers constituting the semiconductor layer110may also be in the range of 3.5° to 6°. The substrate100may be removed from the light emitting device by laser lift-off and the like.

The semiconductor layer110may include an n-type nitride semiconductor layer111, an active layer113, and a p-type nitride semiconductor layer115. The semiconductor layer110may further include a super lattice layer112and/or an electron blocking layer114.

The n-type nitride semiconductor layer111includes a nitride semiconductor such as (Al, Ga, In)N and may be grown by a method such as MOCVD, MBE, and HVPE. The n-type nitride semiconductor layer111may have the same crystal growth plane as the crystal growth plane101of the substrate100. Specifically, if the angle (θ) defined between the crystal growth plane101of the substrate100and the (1 0 −1 1) plane of the substrate100is in the range of 3.5° to 6°, an angle defined between the crystal growth plane of the n-type nitride semiconductor layer111and the m-plane of the substrate100may be in the range of 3.5° to 6°. In addition, the n-type nitride semiconductor layer111may be doped with at least one dopant, such as Si, C, Ge, Sn, Te, and Pb, to exhibit n-type conductivity.

The super lattice layer112may be disposed on the n-type nitride semiconductor layer111. The super lattice layer112may be formed by repeatedly stacking layers having different compositions one above another while supplying Group III element sources, such as Al, Ga, and In, and Group V element sources, such as N, into a growth chamber. For example, the super lattice layer112may have a stack structure in which InGaN layers and GaN layers are stacked one above another. The super lattice layer112may improve crystal quality of the active layer113by preventing transfer of stress and strain caused by lattice mismatch to the active layer113and propagation of defects such as dislocations. Specifically, when the crystal growth plane101of the substrate100is tilted at an angle of 3.5° to 6° with respect to the (1 0 −1 1) plane of the substrate100, that is, the m-plane102thereof, the n-type nitride semiconductor layer111grown on the substrate100includes more dislocations and stacking faults than the n-type nitride semiconductor layer111grown on the (0 0 0 1) plane. The super lattice layer112may prevent stress and strain caused by dislocations and stacking faults from being transferred to the active layer113. The super lattice layer112may include the same crystal growth plane as the crystal growth plane101of the substrate100.

The active layer113may be disposed on the n-type nitride semiconductor layer111. Furthermore, when the light emitting device according to an exemplary embodiment includes the super lattice layer112, the active layer113may be disposed on the super lattice layer112. The active layer113may include a nitride semiconductor such as (Al, Ga, In)N.

FIG. 3is an enlarged sectional view of the active layer113of the light emitting device according to an exemplary embodiment. Referring toFIG. 3, the active layer113may include a multi-quantum well (MQW) structure, in which well layers113wand barrier layers113bare alternately stacked one above another in at least 2 cycles. Since the barrier layers113bmay include a nitride semiconductor having a greater energy band-gap than the well layers113w, a number of carriers (electrons and holes) are concentrated in the well layers113w, which may increase a recombination possibility of electrons and holes. Specifically, the well layers113wmay include InxGa(1-x)N (0<x<1), without being limited thereto, and may further include Al.

The active layer113may have the same crystal growth plane as the crystal growth plane101of the substrate100. Specifically, if the angle (θ) defined between the crystal growth plane101of the substrate100and the (1 0 −1 1) plane of the substrate100, that is, the m-plane102, is in the range of 3.5° to 6°, an angle defined between the crystal growth plane of the active layer113and the m-plane of the substrate100is also in the range of 3.5° to 6°.

The active layer113may include a first plane facing the p-type nitride semiconductor layer115. As described above, since the active layer113is grown along the crystal growth plane101of the substrate100, an angle defined between the first plane of the active layer113and the m-plane of the substrate100may be in the range of 3.5° to 6°. Specifically, the first plane of the active layer113may be at least one of (6 0 −6 1), (7 0 −7 1), and (8 0 −8 1) planes.

FIG. 4AandFIG. 4Bshow conceptual views of an active layer of a typical light emitting device, respectively, andFIG. 4CandFIG. 4Dshow the active layer of the light emitting device, which has the same crystal growth plane as the crystal growth plane101of the substrate100, according to an exemplary embodiment. In each of the drawings, the barrier layer113badjacent the n-type nitride semiconductor layer111is disposed at the left side, the barrier layer113badjacent the p-type nitride semiconductor layer115is disposed at the right side, and the well layer113wis disposed between the barrier layers113b. The active layer having the c-plane as the crystal growth plane has a band-diagram as shown inFIGS. 4A and 4Bdue to effects of spontaneous polarization and piezoelectric polarization. More particularly, upon application of forward bias, the slope of the band-diagram of the well layer113wbecomes steeper, and thus, distributions of holes and electrons present in a conduction band (EC) and in a valence band (EV), respectively, are further separated from each other. As a result, the light emitting device has low luminous efficacy caused by deterioration in recombination efficiency of electrons and holes, and may suffer from red shift of light emission and increase in forward voltage Vf. Thus, although the well layers113wof the active layer are formed to a predetermined thickness or less in order to improve recombination efficiency, decrease in thickness of the well layers113wmay cause a severe droop phenomenon due to increase in Auger recombination.

Referring toFIGS. 4C and 4D, since the active layer113according to an exemplary embodiment has the crystal growth plane tilted at an angle of 3.5° to 6° with respect to the (1 0 −1 1) plane of the substrate100, that is, the first plane tilted at an angle of 3.5° to 6° with respect to the m-plane of the active layer113, the active layer113has a different band-diagram than the active layer illustrated with reference toFIGS. 4A and 4B, which have the c-plane as the crystal growth plane.

Referring toFIG. 4C, since the active layer113according to an exemplary embodiment is affected by piezoelectric polarization in an opposite direction to the active layer grown on the c-plane, the well layer113wof the active layer113has a band-diagram having a slope that is in an opposite direction to the slope of the band-diagram shown inFIG. 4A. Upon application of forward bias, the slope of the band-diagram of the well layer113wbecomes gentle and the distributions of holes and electrons present in the conduction band (EC) and in the valence band (EV), respectively, approach each other. In this manner, the light emitting device has increased recombination efficiency of holes and electrons, thereby suppressing the droop phenomenon.

Furthermore, since the distributions of holes and electrons in the conduction band (EC) and the valence band (EV) approach each other upon application of forward bias, the thickness of the well layer113wmay be increased. The well layer113wmay have a thickness of 3 nm to 10 nm, specifically 5 nm to 10 nm, more specifically 7 nm to 10 nm. Within this thickness range, the well layer113wallows electrons to be present in a broad distribution therein, thereby further suppressing the droop phenomenon through reduction in Auger recombination.

The barrier layer113bmay include GaN, without being limited thereto, and may further include Al. The barrier layer113bmay have a thickness of 12 nm to 32 nm, specifically 12 nm to 28 nm, more specifically, 12 nm to 24 nm. If the crystal growth plane101of the substrate100is tilted at an angle of 3.5° to 6° with respect to the (1 0 −1 1) plane of the substrate100, the n-type nitride semiconductor layer111grown on the substrate100includes more dislocations and stacking faults than the n-type nitride semiconductor layer111grown on the (0 0 0 1) plane. Within this thickness range, the barrier layer113bmay prevent stress and strain caused by dislocations and stacking faults from being transferred to the interior of the active layer113and to other layers on the active layer113.

The electron blocking layer114may be disposed on the active layer113. The electron blocking layer114may include a nitride semiconductor such as (Al, Ga, In)N. For example, the electron blocking layer114may include at least one of AlxGa(1-x)N (0<x<1) and AlxInyGa(1-x-y)N (0<x<1, 0<y<1, 0<x+y<1). The electron blocking layer114may prevent deterioration of recombination efficiency by preventing electrons supplied from the n-type nitride semiconductor layer111to the active layer113from moving towards the p-type nitride semiconductor layer115. Specifically, referring toFIG. 4D, unlike the active layer grown on the c-plane, since the barrier layer113bof the active layer113according to an exemplary embodiment has a conduction band (EC), which gradually decreases towards the p-type nitride semiconductor layer115, excited electrons having an energy equal to or greater than an energy band gap between the barrier layer113band the well layer113wmay be easily moved towards the p-type nitride semiconductor layer115. The electron blocking layer114may improve recombination efficiency by preventing movement of such electrons. To this end, the electron blocking layer114may have a greater energy band-gap than the barrier layer113bof the active layer113.

Further, the electron blocking layer114may be doped to exhibit the same conductivity type as the p-type nitride semiconductor layer115. For example, the electron blocking layer114may be doped with Mg dopants to exhibit p-type conductivity. In an exemplary embodiment, the electron blocking layer114may have a higher dopant concentration than the p-type nitride semiconductor layer115. Since the electron blocking layer114is doped to exhibit p-type conductivity, hole injection efficiency into the active layer113may be improved. The electron blocking layer114may have a thickness of, for example, about 80 nm, but is not limited thereto. The electron blocking layer114may have the same crystal growth plane as the crystal growth plane101of the substrate100.

The p-type nitride semiconductor layer115may be disposed on the active layer113. Furthermore, when the light emitting device includes the electron blocking layer114, the p-type nitride semiconductor layer115may be disposed on the electron blocking layer114. The p-type nitride semiconductor layer115may include a nitride semiconductor such as (Al, Ga, In)N. The p-type nitride semiconductor layer115may be doped to exhibit an opposite conductivity type to the n-type nitride semiconductor layer111. For example, the p-type nitride semiconductor layer115may be doped with Mg dopants to exhibit p-type conductivity. The p-type nitride semiconductor layer115may include a delta doped layer (not shown) for decreasing ohmic contact resistance. The p-type nitride semiconductor layer115may have the same crystal growth plane as the crystal growth plane101of the substrate100. Specifically, if the crystal growth plane101of the substrate100is tilted at an angle of 3.5° to 6° with respect to the (1 0 −1 1) plane of the substrate100, that is, the m-plane thereof, an angle defined between the crystal growth plane of the p-type nitride semiconductor layer115and the m-plane of the substrate100may be in the range of 3.5° to 6°.

FIG. 5is a sectional view of a light emitting device according to an exemplary embodiment.

Referring toFIG. 5, the light emitting device according to an exemplary embodiment includes a substrate100and a semiconductor layer200.

The substrate100may support the semiconductor layer200and allow the semiconductor layer200to be grown thereon. The substrate100of the light emitting device according to an exemplary embodiment is the same as the substrate described with reference toFIG. 1, and thus, repeated descriptions thereof will be omitted.

The semiconductor layer200may be grown along the crystal growth plane101of the substrate100. More particularly, the semiconductor layer200has the same crystal plane as the crystal growth plane101of the substrate100. Accordingly, if the angle (θ) defined between the crystal growth plane101of the substrate100and the (1 0 −1 1) plane of the substrate100is in the range of 3.5° to 6°, an angle defined between each crystal growth plane of layers constituting the semiconductor layer200and the m-plane of each of the layers constituting the semiconductor layer200may also be in the range of 3.5° to 6°. The substrate100may be removed from the light emitting device by laser lift-off and the like.

The semiconductor layer200may include an n-type nitride semiconductor layer210, an active layer230, a first hole injection layer240, and a p-type nitride semiconductor layer270. The semiconductor layer200may further include a super lattice layer220and/or an electron blocking layer260.

The n-type nitride semiconductor layer210, the active layer230, the super lattice layer220, and the electron blocking layer260are the same as the n-type nitride semiconductor layer111, the active layer113, the super lattice layer112, and the electron blocking layer114of the light emitting device described above with reference toFIG. 1, and thus, repeated descriptions thereof will be omitted.

Unlike the exemplary embodiment shown inFIG. 1, the first hole injection layer240may be disposed on the active layer230. The first hole injection layer240may improve internal quantum efficiency by increasing the density of holes to be injected into the active layer230. Specifically, the first hole injection layer240may adjoin (or contact) the active layer230. More specifically, a separate undoped layer may not be disposed between the first hole injection layer240and the active layer230. If an angle defined between a crystal growth plane of the p-type nitride semiconductor layer270and the m-plane of the substrate100is in the range of 3.5° to 6°, since Mg in the p-type nitride semiconductor layer270may not diffuse into the active layer230, a separate undoped layer for diffusion of Mg, which is typically disposed between the active layer230and the first hole injection layer240, may be omitted. As a result, a process of manufacturing the light emitting device may be simplified. The first hole injection layer240may include a nitride semiconductor, specifically (Al, Ga, In)N. In addition, the first hole injection layer240may include dopants at a concentration of 1E20/cm3to 5E20/cm3.

A first undoped layer250has a much lower concentration of dopants than the first hole injection layer240. For example, the first undoped layer250includes Mg or substantially no dopants. Specifically, the first undoped layer250may have a dopant concentration of less than 1E18/cm3. Due to a low dopant concentration of the first undoped layer250, the first undoped layer250may be formed to have a lower defect density than semiconductor layers formed under the first undoped layer250, thereby improving crystal quality of semiconductor layers formed on the first undoped layer250. Further, in the p-type nitride semiconductor layer270, holes moving towards the active layer230may be effectively dispersed in the horizontal direction, thereby providing uniform distribution of light in the light emitting device.

In an exemplary embodiment, the electron blocking layer260may be disposed on the first hole injection layer240. When the light emitting device further includes the first undoped layer250, the electron blocking layer260may be disposed on the first undoped layer250. The electron blocking layer260is similar to the electron blocking layer114described with reference toFIG. 1, except for the structural location of the electron blocking layer260. As such, detailed descriptions of the material, functions, energy band-gap, conductivity type, doping concentration, thickness, and crystal growth plane of the electron blocking layer260will be omitted.

The p-type nitride semiconductor layer270may be disposed on the first hole injection layer240. When the light emitting device includes the electron blocking layer260, the p-type nitride semiconductor layer270may be disposed on the electron blocking layer260. The p-type nitride semiconductor layer270is similar to the p-type nitride semiconductor layer115described with reference toFIG. 1, and thus, repeated descriptions thereof will be omitted.

The p-type nitride semiconductor layer270may also have the same crystal growth plane as the crystal growth plane101of the substrate100. Specifically, if the angle (θ) defined between the crystal growth plane101of the substrate100and the (1 0 −1 1) plane of the substrate100, that is, the m-plane of the substrate100, is in the range of 3.5° to 6°, an angle defined between the crystal growth plane of the p-type nitride semiconductor layer270and the m-plane of the substrate100may be in the range of 3.5° to 6°.

The p-type nitride semiconductor layer270may include a first plane placed in an opposite direction to the active layer230. As described above, since the p-type nitride semiconductor layer270is grown along the crystal growth plane101of the substrate100, an angle defined between the first plane of the p-type nitride semiconductor layer270and the m-plane of the p-type nitride semiconductor layer270may be in the range of 3.5° to 6°. Specifically, the first plane of the p-type nitride semiconductor layer270may be at least one of (6 0 −6 1), (7 0 −7 1), and (8 0 −8 1) planes.

In this structure of the p-type nitride semiconductor layer270, Mg in the p-type nitride semiconductor layer270may not be diffused into the active layer230.

FIG. 6is a sectional view of a light emitting device according to an exemplary embodiment.

Referring toFIG. 6, the light emitting device according to the exemplary embodiment is similar to the light emitting device described with reference toFIG. 5, except that a p-type nitride semiconductor layer270includes a second hole injection layer271, a hole transfer layer272, and a p-type contact layer273. The following description will be focused on different features in order to avoid repeated descriptions.

The second hole injection layer271, the hole transfer layer272, and the p-type contact layer273may be formed of a gallium nitride-based semiconductor, for example, GaN, and may have the same composition except for dopant concentrations. Accordingly, holes supplied from an electrode (not shown) may pass through the p-type nitride semiconductor layer270without being blocked by an energy barrier. The second hole injection layer271may adjoin the electron blocking layer260. Further, the p-type contact layer273may contact the electrode (not shown).

The thickness of the hole transfer layer272may be greater than the total thickness of the second hole injection layer271and the p-type contact layer273. For example, the second hole injection layer271may have a thickness of 5 nm to 20 nm, the hole transfer layer272may have a thickness of 16 nm to 100 nm, and the p-type contact layer273may have a thickness of 10 nm to 30 nm. Further, in the hole transfer layer272, each of second undoped layers272amay have a thickness of 3 nm to 25 nm and an intermediate doped layer272bmay have a thickness of 2 nm to 10 nm. For example, each of the second undoped layers272amay have a thickness of about 22 nm and the intermediate doped layer272bmay have a thickness of about 10 nm, and thus, the hole transfer layer272including the second undoped layers272aand the intermediate doped layer272bmay have a thickness of about 54 nm, without being limited thereto.

The second hole injection layer271may have a dopant concentration of 1E20/cm3to 5E20/cm3, and the p-type contact layer273may have a dopant concentration of 4E20/cm3to 1E21/cm3. Further, in the hole transfer layer272, the intermediate doped layer272bmay have a dopant concentration of 1E18/cm3to 1E20/cm3, and the second undoped layers272amay have a dopant concentration of less than 1E18/cm3. In an exemplary embodiment, the intermediate doped layer272bmay have a dopant concentration of less than 1E19/cm3, but is not limited thereto.

In an exemplary embodiment, the hole transfer layer272may have a relatively high thickness and includes the intermediate doped layer272btherein, in order to achieve significant increase in hole mobility, thereby improving hole injection into the active layer230. The following description will focus on this structure.

Holes injected into the p-type contact layer273may diffuse into the hole transfer layer272along a hole diffusion distance. The hole diffusion distance may be represented by Equation 1.
Lp=√{square root over (u×t)}Equation 1.

In Equation 1, Lp denotes the hole diffusion distance, u denotes mobility of the holes, and t denotes life time of the holes.

According to Equation 1, the holes in the p-type contact layer273may diffuse into the hole transfer layer272, and the hole diffusion distance may refer to a distance from the p-type contact layer273to a point at which the concentration of holes becomes 0. If the concentration of holes is sufficiently higher than the concentration of electrons, the concentration of holes diffusing into the hole transfer layer272may decrease with increasing distance from the p-type contact layer273or the second hole injection layer271. In an exemplary embodiment, the hole transfer layer272includes the second undoped layers272a, and each of the second undoped layers272amay include a region in which the concentration of holes gradually decreases in proportion to the distance from the p-type contact layer273or the second hole injection layer271. The region in which the concentration of holes gradually decreases may include a region in which the concentration of holes linearly decreases with increasing distance from the p-type contact layer273, but is not limited thereto. The concentration of holes may non-linearly decrease, and in the hole transfer layer272, the concentration gradient of holes may be changed in a direction away from the p-type contact layer273or the second hole injection layer271. Furthermore, the second undoped layers272amay include a region in which the concentration of holes gradually increases with decreasing distance to the intermediate doped layer272b. The region in which the concentration of holes gradually increases may include a region in which the concentration of holes linearly increases with decreasing distance to the intermediate doped layer272b, but is not limited thereto.

For example,FIG. 7is a graph depicting concentration profiles of holes and Mg illustrating the light emitting device according to an exemplary embodiment. A graph at a lower side ofFIG. 7depicts a concentration of p-type dopants, that is, Mg, in a direction away from the active layer, and a graph at an upper side ofFIG. 7depicts a concentration of holes in the direction away from the active layer.

Referring toFIG. 7, each of the second hole injection layer271, the p-type contact layer273, and the intermediate doped layer272bincludes a predetermined concentration of p-type dopants (Mg). The second hole injection layer271may have a higher concentration of Mg than the intermediate doped layer272b, and the p-type contact layer273may have a higher concentration of Mg than the second hole injection layer271. Conversely, the second undoped layers272amay include much lower concentration of Mg than the second hole injection layer271, the p-type contact layer273, and the intermediate doped layer272b, or may include substantially no Mg. The second undoped layers272amay be grown while stopping implantation of Mg sources, so as to have an Mg concentration of substantially 0. That is, the second undoped layers272aare not intended to include the p-type dopants. Nevertheless, the second undoped layers272amay include a trace of Mg, due to Mg sources remaining in the growth chamber, and after growth, the second undoped layers272amay include Mg diffused from at least one of the second hole injection layer271, the p-type contact layer273, and the intermediate doped layer272b. Thus, it is contemplated that the second undoped layers272aincluding a small amount of Mg also falls within the scope of exemplary embodiments.

As shown inFIG. 7, the second hole injection layer271has a predetermined concentration of holes, and the second undoped layer272anear the second hole injection layer271has a concentration of holes gradually decreasing in the direction away from the active layer230. Here, the concentration of holes may linearly decrease at least in some zones. In the second undoped layer272anear the second hole injection layer271, the concentration of holes may gradually decrease with increasing distance from the second hole injection layer271, and then, may gradually increase with decreasing distance to the intermediate doped layer272b. Likewise, in the second undoped layer272anear the p-type contact layer273, the concentration of holes may decrease with increasing distance from the intermediate doped layer272b, and then, may gradually increase with decreasing distance to the p-type contact layer273. Here, the concentration of holes may linearly decrease at least in some zones.

In an exemplary embodiment, the intermediate doped layer272bmay contact the second undoped layer272ain a region of the hole transfer layer272, in which the linearly decreasing concentration of holes reaches 62% to 87% of the concentration of holes in the p-type contact layer273. More particularly, the intermediate doped layer272bmay be disposed to at least partially overlap the second undoped layer272ain the region of the hole transfer layer, in which the concentration of holes reaches 62% to 87% of the concentration of holes in the p-type contact layer273. As such, the intermediate doped layer272bdoped with a predetermined concentration of dopants is disposed in the hole transfer layer272including the second undoped layers272a, thereby improving mobility of holes. That is, since the intermediate doped layer272bis disposed in a region of the hole transfer layer272, in which the concentration of holes supplied from the p-type contact layer273is reduced to a predetermined concentration, the intermediate doped layer272bmay improve mobility of holes in the hole transfer layer272, whereby a hole injection rate into the active layer230may be improved, thereby improving internal quantum efficiency. In an exemplary embodiment, the intermediate doped layer272bmay be disposed closer to the second hole injection layer271than to the p-type contact layer273, but is not limited thereto.

Further, in the light emitting devices according to exemplary embodiments, the intermediate doped layer272bmay have relatively high resistance. Thus, when static electricity flows through the light emitting device, electric current caused by static electricity may be blocked by the intermediate doped layer272bhaving high resistance, thereby improving anti-static discharge performance of the light emitting device.

The light emitting devices according to exemplary embodiments are manufactured to have an electrode structure. The following description will be given of flip-chip or vertical type light emitting devices. It is contemplated that, however, electrode structures of the light emitting devices may be variously modified.

FIG. 8AandFIG. 8Bare sectional views of flip-chip and vertical type light emitting devices according to exemplary embodiments, respectively.

Referring toFIG. 8A, the flip-chip type light emitting device includes a substrate100, a semiconductor layer110, a reflective electrode structure120, a lower insulation layer130, a first electrode141, an intermediate electrode143, an upper insulation layer150, a first bonding pad161, and a second bonding pad163.

The substrate100is the same as the substrate described with reference toFIG. 1, and thus, repeated descriptions thereof will be omitted. In addition, the semiconductor layer110is the same as the semiconductor layer110described with reference toFIG. 1, and the n-type nitride semiconductor layer111, the active layer113, and the p-type nitride semiconductor layer115are schematically shown inFIG. 8A. Alternatively, the semiconductor layer110may be the same as the semiconductor layer200described with reference toFIG. 5andFIG. 6.

The semiconductor layer110is partially removed by mesa etching so as to expose an n-type compound semiconductor layer111. The substrate100may have the same crystal structure as the n-type compound semiconductor layer111, and thus, a border between the substrate100and the n-type compound semiconductor layer111may not be clearly defined. In an exemplary embodiment, since the n-type compound semiconductor layer111has a higher concentration of n-type dopants than the substrate100, the presence of the substrate100and the n-type compound semiconductor layer111may be identified through composition analysis, such as secondary ion mass spectrometry (SIMS).

The reflective electrode structure120is disposed on a p-type compound semiconductor layer115. The reflective electrode structure120may form ohmic contact with the p-type compound semiconductor layer115. The reflective electrode structure120may include, for example, an ohmic reflection metal layer121and a barrier metal layer123. The ohmic reflection metal layer121may include Ag and may be formed of Ni/Ag. The barrier metal layer123may include Ni and cover the ohmic reflection metal layer121to prevent diffusion of metal atoms such as Ag.

The lower insulation layer130is formed on the reflective electrode structure120and covers a side surface of the semiconductor layer110. The lower insulation layer130may be formed of SiO2or Si3N4, or may be formed as a distributed Bragg reflector including insulation materials. The lower insulation layer130is formed to expose an upper surface of the n-type compound semiconductor layer111and a part of the reflective electrode structure120.

The first electrode141and the intermediate electrode143may be formed on the lower insulation layer130. The first electrode141is electrically connected to the n-type compound semiconductor layer111exposed through the lower insulation layer130. At least part of the first electrode141may be disposed on an upper surface of the reflective electrode structure120and is insulated from the reflective electrode structure120by the lower insulation layer130.

The intermediate electrode143is separated from the first electrode141and is electrically connected to the reflective electrode structure120exposed through the lower insulation layer130. The lower insulation layer130may include a plurality of openings through which the reflective electrode structure is exposed, and the intermediate electrode143may be connected to the reflective electrode structure120through these openings. Accordingly, an upper surface of the first electrode141may be flush with an upper surface of the intermediate electrode143.

The first electrode141and the intermediate electrode143may be formed of the same metal layer by the same process. For example, the first electrode141and the intermediate electrode143may be formed by depositing a metal layer, followed by patterning through photolithography and etching, or may be formed at the same time through a lift-off process.

The upper insulation layer150is formed on the first electrode141and the intermediate electrode143. The upper insulation layer150covers the first electrode141to protect the first electrode141, and may also cover part of the intermediate electrode143. For example, the upper insulation layer150may cover an edge of the intermediate electrode143. As shown inFIG. 8A, the upper insulation layer150exposes the first electrode141and the intermediate electrode143. The upper insulation layer150may be formed of SiO2or Si3N4, or may be formed as a distributed Bragg reflector including insulation materials.

The first bonding pad161and the second bonding pad163are disposed on the first electrode141and the intermediate electrode143exposed through the upper insulation layer150, respectively. The first bonding pad161and the second bonding pad163may be formed of, for example, AuSn. Since the first electrode141and the intermediate electrode143are placed at the same height, an upper surface of the first bonding pad161may be flush with an upper surface of the second bonding pad163. Accordingly, the light emitting device according to an exemplary embodiment may be easily bonded to a submount having electrode pads flush with each other through flip bonding.

A surface texture R may be formed on a light exit plane of the substrate100through surface machining, in order to improve light extraction efficiency. As shown inFIG. 8A, the surface texture R may include rounded protrusions. Shapes of the surface texture R may be varied.

Referring toFIG. 8B, the vertical type light emitting device includes a substrate100a, a semiconductor layer110, a first electrode180a, a second electrode180b, and a bonding metal layer190.

The substrate100ais distinguished from a growth substrate for growth of the semiconductor layer110. The substrate100ais a support substrate bonded to the semiconductor layer110. The substrate100amay be selected from any substrate without limitation, and may be, for example, a metal substrate.

The semiconductor layer110may be the same as the semiconductor layer110or the semiconductor layer200of the aforementioned exemplary embodiments, and a repeated description thereof will be omitted.

A rough surface R may be formed on a surface of the n-type compound semiconductor layer111by surface texturing. The rough surface R improves light extraction efficiency.

The semiconductor layer110may be grown on the substrate100described with reference toFIG. 1. Then, the semiconductor layer110is bonded to the substrate100a, and the substrate100used as the growth substrate is removed from the semiconductor layer110.

The first electrode180amay be disposed on an upper surface of the semiconductor layer110. The light emitting device according to an exemplary embodiment may include at least one first electrode180a, which may be electrically connected to the n-type compound semiconductor layer111. The first electrode180amay include Ni, Al, Au, Cr, or a combination thereof, and have a single layer or multiple layers structure. The first electrode180amay be formed by depositing a metallic material on the semiconductor layer110, followed by patterning.

A lower surface of the first electrode180aadjoins the upper surface of the n-type compound semiconductor layer111. When the n-type compound semiconductor layer111includes the rough surface (R), the first electrode180amay be formed on the rough surface (R), or may be formed on a flat surface, as shown inFIG. 8B. Although only the first electrode180ahaving a pad shape is shown inFIG. 8B, the first electrode180amay include an extension extending from the pad.

A current blocking layer170may be disposed on a lower surface of the semiconductor layer110, that is, between the semiconductor layer110and the substrate100a. The current blocking layer170at least partially overlaps the first electrode180ain the vertical direction, so as to prevent electric current from crowding in a region directly under the first electrode180a. The current blocking layer170may include an insulation material. For example, the current blocking layer170may include SiOxor SiNx, or may include a distributed Bragg reflector (DBR), in which insulation material layers having different refractive indices are stacked one above another. The current blocking layer170may have a single layer or multiple layers structure through chemical vapor deposition (CVD) and the like. The current blocking layer170is formed to expose the p-type compound semiconductor layer115.

The second electrode180bmay be disposed on a lower surface of the semiconductor layer110. The second electrode180bis electrically connected to the p-type compound semiconductor layer115. The second electrode180bmay include a first reflective metal layer181, a second reflective metal layer183, and a barrier metal layer185.

The first reflective metal layer181may contact the p-type compound semiconductor layer115exposed through the current blocking layer170. Further, the first reflective metal layer181may form ohmic contact with the p-type compound semiconductor layer115. The first reflective metal layer181may include a metal or an alloy capable of reflecting light generated from the semiconductor layer110. For example, the first reflective metal layer181may include an Ag layer, an Ag alloy layer, Ni/Ag layers, NiZn/Ag layers, TiO/Ag layers, or Ni/Ag/Ni/Ti layers, and may be formed by deposition and patterning. Particularly, Ni is used for the first reflective metal layer181to form ohmic contact with the p-type compound semiconductor layer115. Since Ni has low reflectivity with respect to light generated from the semiconductor layer110and reduces reflectivity of Ag, the first reflective metal layer181formed of Ni may have a small thickness. The first reflective metal layer181may be formed by e-beam evaporation, vacuum deposition, sputtering, metal organic chemical vapor deposition (MOCVD), and the like.

The second reflective metal layer183may cover the current blocking layer170and the first reflective metal layer181. Specifically, the second reflective metal layer183may cover lower and side surfaces of the current blocking layer170and lower and side surfaces of the first reflective metal layer181. The second reflective metal layer183may adjoin the current blocking layer170and the first reflective metal layer181. Furthermore, the second reflective metal layer183may adjoin the p-type compound semiconductor layer115in a region between the current blocking layer170and the first reflective metal layer181.

The second reflective metal layer183may be disposed between the current blocking layer170and the barrier metal layer185described below, and between the first reflective metal layer181and the barrier metal layer185.

The second reflective metal layer183may include a metal having a different reflectance than that of the first reflective metal layer181. Specifically, when the first reflective metal layer181includes Ag, the second reflective metal layer183may include Al. Further, the second reflective metal layer183may be formed of a metal having a higher work function than the first reflective metal layer181. Specifically, the second reflective metal layer183may form a Schottky junction with the p-type compound semiconductor layer115. When a contact area between the current blocking layer170and the p-type compound semiconductor layer115is wide, a reflection area of the second electrode180bis decreased, thereby reducing light extraction efficiency. Conversely, a narrow contact area therebetween may deteriorate current spreading efficiency of the light emitting device. Thus, in an exemplary embodiment, the second reflective metal layer183forming the Schottky junction is formed to adjoin the p-type compound semiconductor layer115, thereby improving current spreading efficiency and light extraction efficiency, while minimizing the area of the current blocking layer170.

When the current blocking layer170includes the distributed Bragg reflector (DBR), the current blocking layer170may reflect light in a wide wavelength band. Particularly, when the active layer113is configured to emit near UV light, the near UV light may be reflected by the distributed Bragg reflector (DBR), thereby improving light extraction efficiency. On the other hand, the second reflective metal layer183disposed under the current blocking layer170reflects light having passed through the current blocking layer170, to improve light extraction efficiency. Particularly, when the current blocking layer170includes the distributed Bragg reflector (DBR), the light emitting device may maintain high reflectance using the current blocking layer170and the second reflective metal layer183. Particularly, a combination of the second reflective metal layer183and the current blocking layer170may maintain high reflectance with respect to light incident on the current blocking layer170at various incident angles.

The second reflective metal layer183may be formed by e-beam evaporation, vacuum deposition, sputtering, metal organic chemical vapor deposition (MOCVD), and the like.

The barrier metal layer185may be disposed on a lower surface of the second reflective metal layer183. The barrier metal layer185may be separated from the first reflective metal layer181and the current blocking layer170by the second reflective metal layer183. When the barrier metal layer185adjoins the current blocking layer170, light having passed through the current blocking layer170may be absorbed by the barrier metal layer185. However, the second reflective metal layer183having higher reflectance than the barrier metal layer185is interposed between the current blocking layer170and the barrier metal layer185, and thus, light loss due to absorption by the barrier metal layer185may be prevented.

The barrier metal layer185prevents Ag in the first reflective metal layer181from being diffused outside the first reflective metal layer181. The barrier metal layer185may be formed of Ni, Cr, Ti, Pt, Au, or a combination thereof. For example, the barrier metal layer185may have a stack structure having Ni layers and Ti layers repeatedly stacked one above another. Since the barrier metal layer185, particularly, the Ni layer, has high absorptivity with respect to light emitted from the active layer113, it may be necessary to prevent light emitted from the active layer113from entering the Ni layer. Thus, according to an exemplary embodiment, the second reflective metal layer183is disposed between the current blocking layer170and the barrier metal layer185, and is disposed to adjoin the p-type compound semiconductor layer115, so as to prevent the Ni layer from directly contacting the p-type compound semiconductor layer115. The barrier metal layer185may be formed by e-beam evaporation, vacuum deposition, sputtering, metal organic chemical vapor deposition (MOCVD), and the like.

FIG. 9shows a perspective view, andFIGS. 9B and 9Cshow graphs depicting light beam distributions of the light emitting device according to an exemplary embodiment.

Referring toFIG. 9A, since an upper surface of the light emitting device according to the exemplary embodiment is close to the m-plane, the upper surface will be represented by the m-plane. Side surfaces of the light emitting device are perpendicular to the m-plane, and correspond to the a-plane and the c-plane. Since the side surfaces of the light emitting device include the a-plane and the c-plane, and include a polar side surface and a non-polar side surface, there is a difference in light beam distribution depending upon direction.

InFIG. 9A, light beam distribution according to the beam angle was measured under conditions that an axis direction perpendicular to the m-plane is represented by an m-axis, an axis direction perpendicular to the a-plane is represented by an a-axis, an axis direction perpendicular to the c-plane is represented by a c-axis, a beam angle in the a-axis direction from the m-axis is represented by Ox, and a beam angle in the c-axis direction from the m-axis is represented by θy.FIG. 9BandFIG. 9Care graphs depicting light beam distributions at θx and θy, respectively.

Referring toFIG. 9B, the light beam distribution in the a-axis direction gradually decreases with increasing beam angle with reference to the m-axis, and generally corresponds to the Lambertian distribution. On the other hand, referring toFIG. 9C, it can be seen that the light beam distribution is not substantially reduced until the beam angle θy exceeds 50° and increases at a beam angle of slightly greater than 50°.

Such a light beam distribution may have been obtained since the luminous flux of light emitted through the c-plane is higher than the luminous flux of light emitted through the a-plane.

Herein, although the m-plane is defined as a light exit plane, it is contemplated that the light emitting device exhibits the same light beam distribution on the (−) m-plane, which is an opposite plane to the m-plane.

Such a difference in light beam distribution between θx and θy may utilized in particular applications. For example, the light emitting device according to an exemplary embodiment may be advantageously used in applications that require light emission in one axis direction. Alternatively, the light emitting device according to an exemplary embodiment may be advantageously used in applications that require uniform light emission in a radial direction from the light emitting device. To this end, there is a need for improvement in light beam distribution of the light emitting device.

FIGS. 10A and 10Bshow graphs depicting light beam distributions of the light emitting device according to an exemplary embodiment after surface machining of the c-plane.

The light emitting device may be divided into individual chips by using a stealth laser with respect to the c-plane, to form a surface texture on the side surface of the light emitting device corresponding to the c-plane. Surface machining on the c-plane using the stealth laser may reduce the luminous flux of light emitted through the c-plane.FIG. 10Ashows a light beam distribution of the light emitting device, in which both side surfaces of the light emitting device corresponding to the a-plane and the c-plane are subjected to laser scribing and cracking, and is the same as the graph shown inFIG. 9C.FIG. 10Bshows a light beam distribution of the light emitting device in the c-axis direction, in which the side surface of the light emitting device corresponding to the a-plane is subjected to laser scribing and cracking, and the side surface of the light emitting device corresponding to the c-plane is subjected to scribing using a stealth laser.

Referring toFIG. 10AandFIG. 10B, it can be seen that the light beam distribution is changed to a light beam distribution similar to the light beam distribution in the a-axis direction through surface machining with respect to the c-plane. Accordingly, the light emitting device having the m-plane as a light exit plane may have a uniform light beam distribution in the radial direction through surface machining of the c-plane.

FIG. 11is an optical image of the c-plane of the light emitting device subjected to surface machining. Five stealth laser irradiation lines S1, S2, S3, S4, and S5are observed on the side surface of the light emitting device corresponding to the c-plane thereof. The number of stealth laser irradiation lines and the distance therebetween may be adjusted in various ways. Various surface morphologies may be formed on the c-plane through stealth laser irradiation and may be used in control of the light beam distribution in the c-axis direction.

A GaN substrate100may be irradiated with stealth laser beams, such that a surface texture may be formed on a side surface of the GaN substrate100by the stealth laser beams. It is contemplated that, however, other implementations may be formed thereon, for example, the surface texture may be formed on side surfaces of the semiconductor layers110and200.

FIG. 12is an exploded perspective view of a lighting apparatus according to an exemplary embodiment.

Referring toFIG. 12, the lighting apparatus according to an exemplary embodiment includes a diffusive cover1010, a light emitting device module1020, and a body1030. The body1030may receive the light emitting device module1020, and the diffusive cover1010may be disposed on the body1030to cover an upper side of the light emitting device module1020.

The body1030may have any shape, so long as the body1030may supply electric power to the light emitting device module1020, while receiving and supporting the light emitting device module1020. For example, as shown inFIG. 12, the body1030may include a body case1031, a power supply1033, a power supply case1035, and a power source connection portion1037.

The power supply1033is received in the power supply case1035to be electrically connected to the light emitting device module1020, and may include at least one IC chip. The IC chip may regulate, change, or control electric power supplied to the light emitting device module1020. The power supply case1035may receive and support the power supply1033. The power supply case1035having the power supply1033secured therein may be disposed within the body case1031. The power source connection portion1037is disposed at a lower end of the power supply case1035and coupled thereto. Accordingly, the power source connection portion1037is electrically connected to the power supply1033within the power supply case1035, and may serve as a passage through which power may be supplied from an external power source to the power supply1033.

The light emitting device module1020includes a substrate1023and a light emitting device1021disposed on the substrate1023. The light emitting device module1020may be disposed at an upper portion of the body case1031and electrically connected to the power supply1033.

As the substrate1023, any substrate capable of supporting the light emitting device1021may be used without limitation. For example, the substrate1023may include a printed circuit board having interconnects formed thereon. The substrate1023may have a shape corresponding to a securing portion formed at the upper portion of the body case1031, so as to be stably secured to the body case1031. The light emitting device1021may include at least one of the light emitting devices according to exemplary embodiments described above.

The diffusive cover1010is disposed on the light emitting device1021and may be secured to the body case1031to cover the light emitting device1021. The diffusive cover1010may be formed of a light-transmitting material. Light orientation of the lighting apparatus may be adjusted through regulation of the shape and optical transmissivity of the diffusive cover1010. As such, the diffusive cover1010may be modified in various shapes depending on usage and applications of the lighting apparatus.

FIG. 13is a sectional view of an exemplary embodiment of a display to which a light emitting device according to an exemplary embodiments is applied.

The display according to the exemplary embodiment includes a display panel2110, a backlight unit supplying light to the display panel2110, and a panel guide (not shown) supporting the display panel2110along a lower edge of the display panel.

The display panel2110is not particularly limited and may be, for example, a liquid crystal panel including a liquid crystal layer. Gate drive PCBs (not shown) may be further disposed at the edge of the display panel2110and supply driving signals to a gate line. Here, the gate drive PCBs (not shown) may be formed on a thin film transistor substrate instead of being formed on separate PCBs.

The backlight unit includes a light source module, which includes at least one substrate and a plurality of light emitting devices2160. The backlight unit may further include a bottom cover2180, a reflective sheet2170, a diffusion plate2131, and optical sheets2130.

The bottom cover2180may be open at an upper side thereof to receive the substrate, the light emitting devices2160, the reflective sheet2170, the diffusion plate2131, and the optical sheets2130. The bottom cover2180may be coupled to the panel guide2100. The substrate may be disposed under the reflective sheet2170to be surrounded by the reflective sheet2170. Alternatively, when a reflective material is coated onto a surface thereof, the substrate may be disposed on the reflective sheet2170. Further, a plurality of substrates may be arranged parallel to each other. However, it should be understood that other implementations are also possible and the light source module may include a single substrate.

The light emitting devices2160includes at least one of the light emitting devices according to exemplary embodiments described above. The light emitting devices2160may be regularly arranged in a predetermined pattern on the substrate. In addition, a lens2210may be disposed on each of the light emitting devices2160to improve uniformity of light emitted from the plurality of light emitting devices2160.

The diffusion plate2131and the optical sheets2130are disposed on the light emitting devices2160. Light emitted from the light emitting devices2160may be supplied in the form of sheet light to the display panel2110through the diffusion plate2131and the optical sheets2130.

In this way, the light emitting devices according to exemplary embodiments may be applied to direct type displays like the display according to an exemplary embodiment.

FIG. 14is a sectional view of an exemplary embodiment of a display to which a light emitting device according to exemplary embodiments is applied.

The display according to exemplary embodiment includes a display panel3210on which an image is displayed, and a backlight unit disposed at a rear side of the display panel3210and emitting light thereto. Further, the display includes a frame supporting the display panel3210and receiving the backlight unit, and covers3240and3280surrounding the display panel3210.

The display panel3210is not particularly limited and may be, for example, a liquid crystal panel including a liquid crystal layer. A gate drive PCB may be further disposed at an edge of the display panel3210and supply driving signals to a gate line. Here, the gate drive PCB may be formed on a thin film transistor substrate instead of being formed on a separate PCB. The display panel3210is secured by the covers3240and3280disposed at upper and lower sides thereof, and the cover3280disposed at the lower side of the display panel3210may be coupled to the backlight unit.

The backlight unit supplying light to the display panel3210includes a lower cover3270partially open at an upper side thereof, a light source module disposed at one side inside the lower cover3270, and a light guide plate3250disposed parallel to the light source module and converting spot light into sheet light. The backlight unit according to an exemplary embodiment may further include optical sheets3230disposed on the light guide plate3250to spread and collect light, and a reflective sheet3260disposed at a lower side of the light guide plate3250and reflecting light traveling in a downward direction of the light guide plate3250towards the display panel3210.

The light source module includes a substrate3220and a plurality of light emitting devices3110arranged at constant intervals on one surface of the substrate3220. As the substrate3220, any substrate capable of supporting the light emitting devices3110and being electrically connected thereto may be used without limitation. For example, the substrate3220may include a printed circuit board. The light emitting devices3110may include at least one of the light emitting devices according to exemplary embodiments described above. Light emitted from the light source module enters the light guide plate3250and is supplied to the display panel3210through the optical sheets3230. The light guide plate3250and the optical sheets3230convert spot light emitted from the light emitting device3110into sheet light.

In this way, the light emitting devices according to exemplary embodiments may be applied to edge type displays like the display according to an exemplary embodiment.

FIG. 15is a sectional view of an exemplary embodiment of a headlight to which a light emitting device according to exemplary embodiments is applied.

Referring toFIG. 15, the headlight according to the embodiment includes a lamp body4070, a substrate4020, a light emitting device4010, and a cover lens4050. The headlight may further include a heat dissipation unit4030, a support rack4060, and a connection member4040.

The substrate4020is secured by the support rack4060, and is disposed above the lamp body4070. As the substrate4020, any substrate capable of supporting the light emitting device4010may be used without limitation. For example, the substrate4020may include a substrate having a conductive pattern, such as a printed circuit board. The light emitting device4010is disposed on the substrate4020and may be supported and secured by the substrate4020. In addition, the light emitting device4010may be electrically connected to an external power source through the conductive pattern of the substrate4020. Further, the light emitting device4010may include at least one of the light emitting devices according to exemplary embodiments described above.

The cover lens4050is disposed on a path of light emitted from the light emitting device4010. For example, as shown inFIG. 15, the cover lens4050may be spaced apart from the light emitting device4010by the connection member4040, and may be disposed in a direction of supplying light emitted from the light emitting device4010. By the cover lens4050, a beam angle and/or a color of light emitted from the headlight may be adjusted. On the other hand, the connection member4040is disposed to secure the cover lens4050to the substrate4020while surrounding the light emitting device4010, so as to act as a light guide that provides a luminous path4045. The connection member4040may be formed of a light reflective material or coated therewith. On the other hand, the heat dissipation unit4030may include heat dissipation fins4031and/or a heat dissipation fan4033, and dissipates heat generated upon operation of the light emitting device4010.

In this way, the light emitting devices according to exemplary embodiments may be applied to headlights, particularly, headlights for vehicles, like the headlight according to an exemplary embodiment.

Although certain exemplary embodiments have been described herein, it should be understood by those skilled in the art that these embodiments are given by way of illustration only, and that various modifications, variations, and alterations can be made without departing from the spirit and scope of the invention. Therefore, the scope of the invention should be limited only by the accompanying claims and equivalents thereof.