Photonic interface for electronic circuit

A photonic interface for an electronic circuit is disclosed. The photonic interface includes a photonic integrated circuit having a modulator and a photodetector, and an optical fiber or fibers for optical communication with another optical circuit. A modulator driver chip may be mounted directly on the photonic integrated circuit. The optical fibers may be placed in v-grooves of a fiber support, which may include at least one lithographically defined alignment feature for optical alignment to the silicon photonic circuit.

TECHNICAL FIELD

The present disclosure relates to photonics, and in particular to photonic interfaces for electronic circuits.

BACKGROUND

Computer systems increasingly rely on faster data transfer between individual microelectronic circuits. Recently, silicon microelectronic circuits have become available with tens to hundreds of input and output channels operating at speeds exceeding 10 gigabits per second each. These may include FPGAs, CPUs, and digital switching fabric chips, in particular. Considerable electrical power may be required to drive individual input/output channels, in particular in situations where the channels include long printed circuit board traces and/or long cables.

Recent advances in silicon photonics enable the use of optical interconnects between electronic circuits. Optical interconnects can support very high data transfer rates. Individual optical channels are currently be modulated at rates reaching 40 gigabits per second and higher. Wavelength division multiplexing (WDM) may be used to provide multiple wavelength channels in a single optical fiber, and a plurality of optical fibers may be used to provide even more bandwidth.

Optical interconnects must provide, for each wavelength channel, modulation and electro-optical conversion at the transmitter end and demodulation and optoelectronic data conversion at the receiver end of a communication link. To provide this functionality prior to this invention, an optical interconnect may require multiple separate devices such as modulators, detectors, drivers, lasers, etc. The resulting optical interconnects are often bulky, complex, costly, and may draw considerable amounts of electrical energy to operate, negating many advantages of optical interconnects. Furthermore, as with many fiber-based optical devices, active alignment of optical fibers may be required. Active optical alignment is time-consuming, and therefore expensive in mass production.

SUMMARY

In accordance with an aspect of the disclosure, there is provided a photonic interface assembly for an electronic circuit, the photonic interface assembly comprising:

a first electrical port for receiving a first electrical signal from the electronic circuit, and a second electrical port for coupling a second electrical signal to the electronic circuit;

at least one optical fiber for outputting a first optical signal, receiving a second optical signal, or both outputting the first optical and receiving the second optical signal;

a photonic integrated circuit comprising:

an optical modulator for modulating an optical carrier wave with the first electrical signal to provide the first optical signal, and a photodetector for providing the second electric signal in response to the second optical signal; and

a fiber support attached to the photonic integrated circuit and supporting the at least one optical fiber.

In one exemplary embodiment, the fiber support includes at least one groove structure supporting the at least one optical fiber. Two or more optical fibers may be provided for separately propagating the first and second optical signals. At least one of the fiber support and the photonic integrated circuit may include a lithographically defined registration feature extending between the fiber support and the photonic integrated circuit for vertical alignment of the fiber support relative to the photonic integrated circuit. In one embodiment, a modulator driver chip is mounted on the photonic integrated circuit and electrically coupled to the photonic integrated circuit for driving the optical modulator. An optical gain chip, such as a semiconductor optical amplifier (SOA) chip, may be attached to the silicon photonic chip and optically coupled to the optical modulator for providing the optical carrier wave, or for amplifying an optical carrier wave. At least one of the optical gain chip and the photonic integrated circuit may include a lithographically defined registration feature extending between the optical gain and the photonic integrated circuit for vertical and, optionally, horizontal alignment of the optical gain chip relative to the photonic integrated circuit.

A substrate may be provided. The photonic integrated circuit may be attached to the substrate e.g. with a plurality of microball or microbump contacts for contacting the first and second electrical ports. Alternatively, the photonic integrated circuit may be attached mechanically to the substrate with solder or epoxy and attached electrically with wire bonds to the first and second electrical ports.

In accordance with the disclosure, there is further provided a method for providing a photonic interface for an electronic circuit, the method comprising:

providing a photonic integrated circuit comprising an optical modulator and a photodetector;

supporting at least one optical fiber in a fiber support attached to the photonic integrated circuit, wherein the at least one optical fiber is configured for outputting a first optical signal, receiving a second optical signal, or both outputting the first optical and receiving the second optical signal;

receiving a first electrical signal from the electronic circuit, and providing the first electrical signal to the modulator;

modulating an optical carrier wave with the first electrical signal to provide the first optical signal; and

detecting the second optical signal with the photodetector, to provide a second electric signal, and coupling the second electrical signal to the electronic circuit.

The fiber support and/or the optical gain chip may be aligned relative to the silicon photonic chip using at least one lithographically defined hard stop.

DETAILED DESCRIPTION

While the present teachings are described in conjunction with various embodiments and examples, it is not intended that the present teachings be limited to such embodiments. On the contrary, the present teachings encompass various alternatives and equivalents, as will be appreciated by those of skill in the art.

Referring toFIGS. 1A and 1B, a photonic interface assembly100for an electronic circuit102may provide optical communication with an external device (not shown) such as another photonic interface assembly, a transceiver, etc. For the purposes of communication with the electronic circuit102, the photonic interface assembly100may include a first electrical port111for receiving a first electrical signal121from the electronic circuit102, and a second electrical port112for coupling a second electrical signal122to the electronic circuit102. The first111and second112electrical ports may include, for example, microball or microbump electrical contacts or wirebonds. For optical communication with the external device, a first131and a second132optical fibers may be provided. The first optical fiber131may output a first optical signal141(FIG. 1B) to the external device, and the second optical fiber132may receive a second optical signal142from the external device. A single optical fiber might be used for propagating both the first141and second142optical signal in opposite directions. More generally, at least one optical fiber may be provided for outputting the first optical signal141, receiving the second optical signal142, or for both outputting the first optical signal141and receiving the second optical signal142. When two optical fibers131and132are provided, the first optical fiber131may be used for outputting the first optical signal141, and the second optical fiber132may be used for receiving the second optical signal142, as shown inFIGS. 1A and 1B. In one embodiment, each one of the first131and second132optical fibers may be used for bidirectional propagation of optical signals therein. More than two, e.g. four, eight, or more optical fibers may be provided, as required, each of which may be used for bidirectional or unidirectional propagation of optical signals.

The photonic interface assembly100further includes a photonic integrated circuit, e.g. a silicon photonic chip104having an optical modulator106for modulating an optical carrier wave107with the first electrical signal121to provide the first optical signal141, and a photodetector110for receiving the second optical signal142. The photodetector110may be optically coupled to the second optical fiber132. In operation, the photodetector110provides the second electric signal122in response to the second optical signal142. In the case of bidirectional communication over the first optical fiber131, both the optical modulator106and the photodetector110are optically coupled to the optical fiber131. A preamplifier e.g. a transimpedance amplifier, not shown, may be used to amplify the second electrical signal122.

The silicon photonic chip104may be supported by an optional substrate160, such as a printed circuit board (PCB), a multi-layer ceramic carrier, etc. The silicon photonic chip104may be electrically coupled to the substrate160via a plurality of microball or microbump contacts162, which are electrically coupled to the electronic circuit102by traces164on or within the substrate160. Wirebonds, not shown, may also be used for this purpose. The silicon photonic chip104may further include other waveguide-based optical devices for processing of the first141and/or second142optical signals, such as an optical filter e.g. a ring waveguide filter, an optical switch including a wavelength-selective switch, a wavelength division multiplexor such as arrayed waveguide grating (AWG) or others, a polarization multiplexor, etc. The silicon photonic chip104may include a plurality of optical modulators106and a plurality of photodetectors110for multi-channel operation. The plurality of communication channels may include one or more of multiple communication wavelengths and multiple optical fibers. The substrate160may support a plurality of one photonic chips104, each of which may contain the elements for communication over one or more of multiple communication wavelengths and multiple optical fibers.

The optical carrier wave107may be provided by an optional optical gain chip, e.g. a SOA chip109attached to the silicon photonic chip104and optically coupled to the optical modulator106. The optical gain/SOA chip109may be used as an optical gain medium in a laser for generating the optical carrier wave107. The optical carrier wave107may also be externally generated, with or without amplification by the SOA chip109. A modulator driver chip108(FIG. 1A, omitted inFIG. 1Bto show the underlying structure) may be provided. The modulator driver chip108may be attached to the silicon photonic chip104and electrically coupled to the silicon photonic chip104, e.g. with microball or microbump contacts or wirebonds, for driving the optical modulator106for providing modulation of the optical carrier wave107in dependence on the first electrical signal121. The optical modulator106may be optically coupled to the first optical fiber131for outputting the first optical signal141. The silicon photonic chip104may support a plurality of gain chips/SOAs109. Each gain chip/SOA109may include a plurality of waveguides each of which would be used to produce a different optical carrier wave107. In another embodiment, the first electrical signal121may directly modulate the source of the optical carrier wave107by modulating the current injected into the gain chip/SOA109, creating the first optical signal141without the use of an optical modulator106. In yet another embodiment, the optical modulator106may be integrated in the gain chip/SOA109.

For ease of assembly, a fiber support120may be provided. The fiber support120supports the first131and the second132optical fiber and may include first151and second152v-grooves for supporting the first131and second132optical fibers, respectively. The fiber support120may be attached to the silicon photonic chip104. In a preferred embodiment, the fiber support120may include at least one lithographically defined registration feature170(six are shown inFIG. 1B) extending towards the silicon photonic chip104for precise vertical alignment of the fiber support120relative to the silicon photonic chip104. Herein, the term “vertical” means perpendicular to a plane of the silicon photonic chip104, that is, to a plane parallel to thin film layers of the silicon photonic chip104. In one embodiment, the registration feature170includes a dielectric or semiconductor hard stop. The fiber support120may be attached to the silicon photonic chip104by a solder joint, not shown, disposed adjacent the registration feature170. The first151and second152v-grooves may be replaced with a single v-groove, and the first131and second132optical fibers may be replaced with a single optical fiber for bidirectional propagation of the first141and second142optical signals in the single optical fiber. The photonic interface assembly100may include a plurality of fiber supports120, each of which may support a plurality of optical fibers131.

The attachment of optical fibers to the photonic interface assembly100is further illustrated inFIG. 2, which is shown inverted as compared toFIG. 1. Only the first optical fiber131is shown for brevity. The first optical fiber131may include a fiber jacket202surrounding a layer of polymer coatings204, which protects a glass fiber206. V-grooves250of the fiber support120may include wide sections254for accommodating the coatings204, and narrow sections256for supporting the fiber206. Other groove shapes, e.g. a U-shape, rectangular, etc., may be used.

The mounting of the fiber support120on the silicon photonic chip104is further illustrated inFIG. 3. The narrow v-groove sections256may be precision micromachined, or otherwise formed for example using a KOH etch of crystal facets, by wet etching, by dry etching, and the like. The narrow v-groove sections256may be v-shaped, u-shaped, or have another shape in cross-section, as long as the narrow groove sections256hold the first optical fiber131in place at a well-defined location on the fiber support120. The registration feature170may be obtained e.g. by growth of a dielectric or semiconductor to a precisely defined thickness and then formed lithographically by etching recesses123in the fiber support120, to match optional registration features, not shown, lithographically etched in the silicon photonic chip104. Height h1of the registration feature170is determined by deposited layer thickness and, as such, may be very precise, e.g. to a thickness of 0.01 micrometer or better. The optional registration features in the silicon photonic chip104are preferably shorter than the height h1. The position of the registration feature170in the horizontal x-direction may be very accurately determined by lithographically etched recesses in the silicon photonic chip104.

Therefore, the position of the optical fiber206(and, therefore, the core306) may be defined with high precision, potentially enabling passive placement of the fiber support120in the x-direction and/or the vertical z-direction perpendicular to the silicon photonic chip104, that is, perpendicular to the plane of the deposited layers on the silicon photonic chip104. The required accuracy in the y-direction is typically less than in the x- and z-directions, and may be provided without requiring active optical alignment, for example using a pick-and-place machine, not shown.

The positioning of the first optical fiber131in the narrow section256enables a passive optical alignment with waveguide308of the silicon photonic chip104. The silicon photonic chip104may also include a similar registration feature or features extending in the z-direction towards the fiber support120. More generally, at least one of the fiber support120and the silicon photonic chip104may include at least one lithographically defined registration feature extending between the fiber support120and the silicon photonic chip104for vertical, that is, z-direction, alignment of the fiber support120relative to the silicon photonic chip104and optionally for alignment in the x-direction which is in the plane of the deposited layers on the silicon photonic chip104. To that end, the registration feature170may be implemented as a dielectric or semiconductor hard stop having an edge parallel to YZ-plane, that is, the plane ofFIG. 3, for horizontal alignment of the fiber support120in the x-direction relative to the silicon photonic chip104.

The mounting of the optional SOA chip109on the silicon photonic chip104is illustrated inFIG. 4. In the embodiment shown inFIG. 4, the SOA chip109includes a lower cladding layer402, a core layer404, an upper cladding layer406, and at least one lithographically defined registration feature, such as semiconductor or dielectric hard stop470. The hard stops470extend towards the silicon photonic chip104for vertical alignment of the SOA chip109relative to the silicon photonic chip104. Height h2of the registration features470is determined by deposited layer thickness, and may be very precise. The silicon photonic chip104may include optional registration features for positioning against a horizontal edge of the hard stops470extending in the x-direction. Accordingly, the position of the core layer404of the SOA chip109may be defined with a high precision in at least one of, and preferably both z- and x-directions, enabling passive placement of the SOA chip109in a critical vertical z-direction perpendicular to the silicon photonic chip104, as well as in x-direction as shown inFIG. 4. The required accuracy in the y-direction is typically less than in the z- and x-directions, and may be provided without requiring active optical alignment, for example using a pick-and-place machine, not shown. More generally, at least one of the SOA chip109and the silicon photonic chip104may include a lithographically defined registration feature extending between the SOA chip109and the silicon photonic chip104for at least one of z- or x-direction alignment of the SOA chip109relative to the silicon photonic chip104. In the embodiment shown inFIG. 4, the silicon photonic chip104includes electrical contacts411and412electrically attached to the lower402and upper406cladding layers of the SOA chip109by respective solder joints431and432optionally disposed adjacent to the hard stops470. In other words, the hard stops470function as alignment features allowing a passive sub-micron alignment of the SOA chip109in at least one of the horizontal and vertical directions, while the solder joints431and432function both as electrical coupling and mechanical attachment means for connecting the SOA chip109to the silicon photonic chip104.

Various exemplary embodiments of the photonic interface assembly100ofFIGS. 1A and 1Bwill now be considered. Referring toFIG. 5, a photonic interface assembly500includes a substrate560, the silicon photonic chip104, and the SOA chip109connected to the substrate560with a plurality of microball or microbump contacts562. For providing the optical carrier wave107, the SOA chip109is optically coupled to the waveguide571that in turn is optically coupled to the optical modulator106. In another embodiment, a hybrid laser may be assembled from the SOA chip109and partially reflective optical elements (not shown) on the silicon photonic chip104. The optical carrier wave107output from the partially reflective optical elements is optically coupled to a waveguide571that in turn is optically coupled to the optical modulator106. An electrical preamplifier chip566, for example a bipolar transimpedance amplifier (TIA), may be connected to the silicon photonic chip104with microball or microbump contacts562and electrically coupled to the photodetector110for amplifying the second electrical signal122(FIG. 1B) provided by the photodetector110. The modulator driver108may be connected to the silicon photonic chip104with microball or microbump contacts562and electrically coupled to the modulator106for modulating an optical carrier wave107with the first electrical signal121(FIG. 1B). The electrical preamplifier chip566and the modulator driver108may be combined in a single electronic chip. The necessary electrical connections between various components may be provided by traces564(FIG. 5) and metal pillars568. Alternatively, the necessary electrical connections between various components may be provided by wirebonds. External contacts570may be provided for mounting an electrical connector, not shown.

Turning toFIG. 6, a photonic interface assembly600is a variant of the photonic interface assembly500ofFIG. 5. The photonic interface assembly600ofFIG. 6has the electrical preamplifier chip566attached to the substrate560with a plurality of microball or microbump contacts562. Another distinction of the photonic interface assembly600is that the SOA chip109is sunk into the silicon photonic chip104. Alternatively, the electrical preamplifier chip566could be attached to the substrate560with one of eutectic bonding, soldering, epoxy or other attachment mechanisms. The electrical connections from electrical preamplifier chip566to photodetector110on the silicon photonic chip104could be via wirebonds.

Referring toFIG. 7, a photonic interface assembly700is a variant of the photonic interface assembly600ofFIG. 6. The photonic interface assembly700ofFIG. 7has the SOA chip109disposed for evanescent optical coupling to the waveguide308of the optical modulator106for providing the optical carrier wave107to the optical modulator106.

Turning toFIG. 8, a photonic interface assembly800is a variant of the photonic interface assembly100ofFIGS. 1A and 1B. The photonic interface assembly800ofFIG. 8includes an electronic interposer chip804disposed between the silicon photonic chip104and the substrate560. The electronic interposer chip804may include circuitry required for operation of various components of the silicon photonic chip104, such as a driver of the optical modulator106, demodulator circuitry, etc. There may be a plurality of electronic interposer chips804mounted on the substrate560.

Referring now toFIG. 9, a photonic interface assembly900is a variant of the photonic interface assembly100ofFIGS. 1A and 1B. The photonic interface assembly900ofFIG. 9may include an angle-polished first optical fiber931optically coupled to the silicon photonic chip104by a grating coupler941for outputting the first optical signal141, and the second optical fiber932optically coupled to the silicon photonic chip104by an edge coupler942for receiving the second optical signal142. In another embodiment a photonic interface assembly900may include the first optical fiber931optically coupled to the silicon photonic chip104by the grating coupler941for receiving the second optical signal142, and the second optical fiber932optically coupled to the silicon photonic chip104by the edge coupler942for outputting the first optical signal141. Other embodiments may use only grating couplers, while still other embodiments may use only edge couplers.

The photonic interface assembly900may further include a third electrical port113on the substrate560for receiving a third electrical signal123from the electronic circuit102, and a fourth electrical port114on the substrate560for sending a fourth electrical signal124to the electronic circuit102. An arrayed electrical connector902may be attached to the substrate560and electrically coupled to the third113and fourth114electrical ports by electrical traces964for connection to an external electronic unit, not shown. Thus, the communication with the external unit, e.g. another PCB and/or another remote host, may be performed by means of both the first141and second142optical signals, and/or third123and fourth124electrical signals, which may provide a greater flexibility of communication.

Turning toFIG. 10, a photonic interface assembly1000is a free-space coupled variant of the photonic interface assembly600ofFIG. 6. The photonic interface assembly1000ofFIG. 10includes a hermetic package1002for hermetically enclosing the silicon photonic chip104, the optical modulator106, the modulator driver108, the SOA chip109, and the electrical preamplifier566. The photonic interface assembly1000may further include lenses1030and a window1040for transmission of the first141and second142optical signals across the hermetic package1002. External contacts570may be provided on a bottom side of the substrate560. The window1040may be constructed from one of the lenses1030. The free-space coupling optics comprising one or more lenses1030and an optional window1040may be used to convey a single optical signal141or multiple optical signals141,142, etc.

Referring toFIG. 11, a photonic interface assembly1100is another variant of the photonic interface assembly100ofFIG. 1. The SOA chip109of the photonic interface assembly1100ofFIG. 11is disposed between the substrate560and the silicon photonic chip104and is evanescently coupled to the waveguide308of the silicon photonic chip104. Alternatively, the SOA chip109may be disposed between the fiber support120(not shown inFIG. 11) and the silicon photonic chip104.

Turning toFIG. 12, a method1200for providing a photonic interface for an electronic circuit, such as the electronic circuit102ofFIGS. 1A and 1B, may include a step1202of providing the silicon photonic chip104having the optical modulator106and the photodetector110. In an optional next step1204, the modulator driver chip108is attached to the silicon photonic chip104, and electrically coupled e.g. by microball or microbump contacts, and/or copper pillars, to the optical modulator106for driving the optical modulator108. In a next step1206, the first optical fiber131supported in the first v-groove151of the fiber support120is attached to the silicon photonic chip104, so that the first optical fiber131is optically coupled to the optical modulator106; and the second optical fiber132is supported in the second v-groove152of the fiber support120, so that the second optical fiber132is optically coupled to the photodetector110. As explained above, a single optical fiber may be used for bidirectional propagation of the first141and second142optical signals. In a step1208, the first electrical signal121is received from the electronic circuit102and is provided to the modulator driver108.

In a next step1210, the optical carrier wave107is modulated with the first electrical signal121to provide the first optical signal141, which is coupled to the first optical fiber131for propagating the first optical signal141in the first optical fiber131. Finally in a last step1212, the second optical signal142propagating in the second optical fiber132is detected with the photodetector110to provide the second electric signal122, which is then coupled to the electronic circuit102.

In one embodiment of the method1200, the step1206of supporting the first131and second132optical fibers includes vertically aligning the fiber support120relative to the silicon photonic chip104using the registration features170extending between the fiber support120and the silicon photonic chip104. The registration features170may be lithographically defined the fiber support120, the silicon photonic chip104, or both as explained above, to optically couple the optical modulator106to the first optical fiber131, and to optically couple the photodetector110to the second optical fiber132. More generally, the alignment, which may include both vertical and horizontal alignment, may be performed by bringing a dielectric or semiconductor hard stop lithographically defined in one of the fiber support120and the silicon photonic chip104, in physical contact with the other of the fiber support120and the silicon photonic chip104. The SOA chip109may be aligned relative to the silicon photonic chip104by bringing a a dielectric or semiconductor hard stop lithographically defined in one of the SOA chip109and the silicon photonic chip104in physical contact with the other of the SOA chip109and the silicon photonic chip104.

Referring again toFIG. 12, now with reference toFIG. 1A,FIG. 5, andFIG. 9, the preamplifier chip566may be mounted and electrically coupled a to the silicon photonic chip104with microball or microbump contacts562(FIG. 5), and/or with wirebonds, not shown, and the second electrical signal121provided by the photodetector110may be amplified by the preamplifier chip566. The silicon photonic chip104may be attached to the substrate560with the plurality of microball or microbump contacts562for contacting the first111and second112electrical ports (FIG. 1A). In one embodiment, the third electrical port113(FIG. 9) may be provided for receiving the third electrical signal123from the electronic circuit102, and the fourth electrical port114may be provided for sending the fourth electrical signal124to the electronic circuit102. To provide a suitable electrical interface, the arrayed electrical connector902may be attached to the substrate560and electrically coupled to the third113and fourth114electrical ports for connection to an external electronic unit, not shown.

It is to be understood that the silicon photonic chip104is only one possible example of an integrated photonic circuit. Accordingly, the silicon photonic chip104may be replaced in any embodiment described above with an integrated photonic circuit of another type, including without limitation, indium-phosphide (InP), gallium-arsenide (GaAs), silica (SiO2), and others. All of the exemplary embodiment disclosed herein can be used in any of these integrated photonic circuits as well. Furthermore, it is to be understood that the SOA chip109is only one possible example of an optical gain chip.