Organic light emitting display and driving method thereof

An organic light emitting display includes: a first pixel; and a second pixel adjacent to the first pixel, the second pixel being configured to emit light at a different time from the first pixel, wherein the first pixel and the second pixel share a storage capacitor configured to store a voltage of a data signal.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims priority to and the benefit of Korean Patent Application No. 10-2014-0091097, filed on Jul. 18, 2014, in the Korean Intellectual Property Office, the entire contents of which are incorporated herein by reference in their entirety.

BACKGROUND

Aspects of embodiments of the present invention relate to an organic light emitting display and a driving method thereof.

2. Description of the Related Art

With development of information technology, the importance of display devices, acting as a medium connecting information and users, has been emphasized. Use of flat panel displays (FPDs), such as liquid crystal displays, organic light emitting diode displays, plasma display panels, etc., is also on the rise.

Organic light emitting displays, among FPDs, display images using organic light emitting diodes (OLEDs) which generate light by electron-hole recombination. Organic light emitting displays exhibit fast response times and low power consumption.

SUMMARY

Aspects of embodiments of the present invention provide an organic light emitting display and a driving method thereof capable of enhancing lifespan.

According to an embodiment, an organic light emitting display includes: a first pixel; and a second pixel adjacent to the first pixel, the second pixel being configured to emit light at a different time from the first pixel. The first pixel and the second pixel share a storage capacitor configured to store a voltage of a data signal.

The first pixel and the second pixel may be configured to emit light alternatively with respect to a frame.

The organic light emitting display may further include: a scan driver configured to supply a first scan signal to a first scan line coupled to the first pixel and the second pixel, and to supply a second scan signal to a second scan line coupled to the first pixel and the second pixel; an emission driver configured to supply a first light emitting control signal to a first light emitting control line coupled to the first pixel and the second pixel, and to supply a second light emitting control signal to a second light emitting control line coupled to the first pixel and the second pixel; and a data driver configured to supply the data signal to a data line coupled to the first pixel and the second pixel.

The scan driver may be configured to supply the first scan signal to the first scan line during an i-th frame period, where i is an odd or even number, and to supply the second scan signal to the second scan line during an (i+1)-th frame period.

The emission driver may be configured to supply the first light emitting control signal to the first light emitting control line after the first scan signal is supplied, and to supply the second light emitting control signal to the second light emitting control line after the second scan signal is supplied.

The data driver may be configured to supply the data signal corresponding to the first pixel to the data line when the first scan signal is supplied, and to supply a data signal corresponding to the second pixel to the data line when the second scan signal is supplied.

The first pixel may include: a first organic light emitting diode; and a first driving transistor configured to control an amount of current flowing from a first power source to a second power source via the first organic light emitting diode corresponding to a voltage applied to a first node, and the second pixel may include: a second organic light emitting diode; and a second driving transistor configured to control an amount of current flowing from the first power source to the second power source via the second organic light emitting diode corresponding to a voltage applied to a second node.

The storage capacitor may be coupled between the first node and the second node.

The first pixel may further include: a first transistor coupled between an anode electrode of the first organic light emitting diode and an initialization power source set to a voltage lower than that of the second power source, the first transistor being configured to be turned on when the second light emitting control signal is supplied; a second transistor coupled between the data line and the first node, and configured to be turned on when the first scan signal is supplied; a third transistor coupled between the first power source and the first node, and configured to be turned on when the second light emitting control signal is supplied; a fourth transistor coupled between the first driving transistor and the anode electrode of the first light emitting diode, and configured to be turned on when the first light emitting control signal is supplied; and a fifth transistor coupled between a reference power source set to a voltage higher than that of the first power source and the first node, the fifth transistor being configured to be turned on when the second scan signal is supplied.

The second pixel may further include: a first transistor coupled between an anode electrode of the second organic light emitting diode and an initialization power source set to a voltage lower than that of the second power source, the first transistor being configured to be turned on when the first light emitting control signal is supplied; a second transistor coupled between the data line and the second node, and configured to be turned on when the second scan signal is supplied; a third transistor coupled between the first power source and the second node, and configured to be turned on when the first light emitting control signal is supplied; a fourth transistor coupled between the second driving transistor and the anode electrode of the second organic light emitting diode, and configured to be turned on when the second light emitting control signal is supplied; and a fifth transistor coupled between a reference power source set to a voltage equal to or higher than that of the first power source and the second node, the fifth transistor being configured to be turned on when the first scan signal is supplied.

The organic light emitting display may further include: a scan driver configured to supply a first scan signal to a first scan line coupled to the first pixel and the second pixel, and to supply a second scan signal to a second scan line coupled to the first pixel and the second pixel; an emission driver configured to supply a first emitting control signal to a first light emitting control line coupled to the first pixel and the second pixel, and to supply a second light emitting control signal to a second light emitting control line coupled to the first pixel and the second pixel; and a data driver configured to supply a first data signal to a first data line coupled to the first pixel, and to supply a second data signal to a second data line coupled to the second pixel.

The scan driver may be configured to supply the first scan signal to the first scan line during an i-th frame and an (i+1)-th frame period, where i is an odd or even number, and to supply the second scan signal to the second scan line so that the second scan signal is synchronized with the first scan signal.

The emission driver may be configured to supply the first light emitting control signal to the first light emitting control line after the first scan signal is supplied during the i-th frame period, and to supply the second light emitting control signal to the second light emitting control line after the second scan signal is supplied during the (i+1)-th frame period.

The data driver may be configured to supply, during the i-th frame period, the first data signal, corresponding to a desired brightness, to the first data line, and the second data signal, corresponding to a black gray level, to the second data line; and the data driver may be configured to supply, during the (i+1)-th frame period, the first data signal, corresponding to the black gray level, to the first data line, and the second data signal, corresponding to the desired brightness, to the second data line.

The first pixel may include: a first organic light emitting diode; and a first driving transistor configured to control an amount of current flowing from a first power source to a second power source via the first organic light emitting diode corresponding to a voltage applied to a first node, and the second pixel may include: a second organic light emitting diode; and a second driving transistor configured to control an amount of current flowing from the first power source to the second power source via the second organic light emitting diode corresponding to a voltage applied to a second node.

The storage capacitor may be coupled between the first node and the second node.

The first pixel may further include: a first transistor coupled between an anode electrode of the first organic light emitting diode and an initialization power source set to a voltage lower than that of the second power source, the first transistor being configured to be turned on when the second organic light emitting control signal is supplied; a second transistor coupled between the first data line and the first node, and configured to be turned on when the first scan signal is supplied; a third transistor coupled between the first power source and the first node, and configured to be turned on when the second light emitting control signal is supplied; and a fourth transistor coupled between the first driving transistor and the anode electrode of the first organic light emitting diode, and configured to be turned on when the first light emitting control signal is supplied.

The second pixel may further include: a first transistor coupled between an anode electrode of the second organic light emitting diode and an initialization power source set to a voltage lower than that of the second power source, the first transistor being configured to be turned on when the first organic light emitting control signal is supplied; a second transistor coupled between the second data line and the second node, and configured to be turned on when the second scan signal is supplied; a third transistor coupled between the first power source and the second node, and configured to be turned on when the first light emitting control signal is supplied; and a fourth transistor coupled between the second driving transistor and the anode electrode of the second organic light emitting diode, and configured to be turned on when the second light emitting control signal is supplied.

According to another embodiment, a method for driving an organic light emitting display includes: emitting light from a first pixel during an i-th frame period, where i is an odd or even number; and emitting light from a second pixel, sharing a storage capacitor with the first pixel, during an (i+1)-th frame period.

A light emitting time of the first pixel and a light emitting time of the second pixel may not overlap each other.

DETAILED DESCRIPTION

Hereinafter, reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings. As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items.

FIG. 1illustrates an organic light emitting display according to a first embodiment.

Referring toFIG. 1, the organic light emitting display according to the first embodiment may include a scan driver110, an emission driver120, a data driver130, a display unit140including first pixels142and second pixels144, and a timing controller150.

The scan driver110may drive first scan lines S11to S1nand second scan lines S21to S2nformed in (e.g., extending in) a first direction (e.g., a horizontal direction). The scan driver110may sequentially supply first scan signals to the first scan lines S11to S1nduring an i-th frame period (where i is an odd or even number), and may sequentially supply second scan signals to the second scan lines S21to S2nduring an (i+1)-th frame period.

The emission driver120may drive first light emitting control lines E11to E1nand second light emitting control lines E21to E2nformed in (e.g., extending in) the first direction. The emission driver120may sequentially supply first light emitting control signals to the first light emitting control lines E11to E1nduring the i-th frame period, and may sequentially supply second light emitting control signals to the second light emitting control lines E21to E2nduring the (i+1)-th frame period.

A first light emitting control signal supplied to a j-th first light emitting control line E1j(where j is a natural number) does not overlap a first scan signal supplied to a j-th first scan line S1j, and may be supplied after the first scan signal is supplied. A second light emitting control signal supplied to a j-th second light emitting control line E2jdoes not overlap a second scan signal supplied to a j-th second scan line S2j, and may be supplied after the second scan signal is supplied. The first scan signal, the second scan signal, the first light emitting control signal, and the second light emitting control signal may be set to voltages (e.g., low voltages) at which transistors included in the pixels142and144can be turned on.

The data driver130may supply data signals to data lines D1to Dm formed in (e.g., extending in) a second direction (e.g., vertical direction) crossing the first direction. For example, the data driver130may supply first data signals to the data lines D1to Dm during the i-th frame period, and may supply second data signals to the data lines D1to Dm during the (i+1)-th frame period. The first data signals may refer to data signals supplied to the first pixels142, and the second data signals may refer to data signals supplied to the second pixels144.

The display unit140may include the first pixels142and the second pixels144configured to emit light alternatively with respect to a frame (e.g., one frame period). The first pixels142may emit light corresponding to the first data signals input during the i-th frame period, and the second pixels144may emit light corresponding to the second data signals input during the (i+1)-th frame period. The first pixel142and the second pixel144that are adjacent to each other may share a storage capacitor configured to store data signals. The first pixel142and the second pixel144that are adjacent to each other may be coupled to a same data line (e.g., any one of data lines D1to Dm). More detailed description will be provided below with reference to a circuit configuration of the pixels142and144.

The timing controller150may control the scan driver110, the emission driver120, and the data driver130.

InFIG. 1, the scan driver110and the emission driver120are illustrated as separate drivers, but the present invention is not limited thereto. For example, the scan driver110and the emission driver120may be formed as one driver. Also, inFIG. 1, although the first pixel142and the second pixel144are illustrated as being adjacent to each other and provided on a same horizontal line, the present invention is not limited thereto. For example, the first pixel142and the second pixel144may be provided to be adjacent to each other on a same vertical line.

FIG. 2is a circuit diagram illustrating configurations of a first pixel and a second pixel according to the first embodiment. InFIG. 2, for convenience of illustration, a first pixel142and a second pixel144coupled to a first data line D1, a first first scan line S11, and a first second scan line S21are illustrated.

Referring toFIG. 2, the first pixel142according to the first embodiment may include a first pixel circuit146and a first organic light emitting diode OLED1. The second pixel144may include a second pixel circuit148and a second organic light emitting diode OLED2.

The first organic light emitting diode OLED1may generate light having a brightness (e.g., a predetermined brightness) corresponding to an amount of current supplied from the first pixel circuit146.

The second organic light emitting diode OLED2may generate light having a brightness (e.g., a predetermined brightness) corresponding to an amount of current supplied from the second pixel circuit148.

The first pixel circuit146may control the amount of the current supplied to the first organic light emitting diode OLED1corresponding to a first data signal supplied from the data line D1. The first pixel circuit146may include a first driving transistor MD1, and first through fifth transistors M1, M2, M3, M4, and M5.

The first driving transistor MD1may be coupled between a first power source ELVDD and an anode electrode of the first organic light emitting diode OLED1. A gate electrode of the first driving transistor MD1may be coupled to a first node N1. The first driving transistor MD1may control an amount of current flowing from the first power source ELVDD to a second power source ELVSS via the first organic light emitting diode OLED1corresponding to a voltage at the first node N1. The first power source ELVDD may be set to a voltage higher than that of the second power source ELVSS.

The first transistor M1may be coupled between the anode electrode of the first organic light emitting diode OLED1and an initialization power source Vint. A gate electrode of the first transistor M1may be coupled to a first second light emitting control line E21. The first transistor M1may be turned on when a second light emitting control signal is supplied to the first second light emitting control line E21, and may supply a voltage of the initialization power source Vint to the anode electrode of the first organic light emitting diode OLED1. The initialization power source Vint may be set to a voltage lower than that of the second power source ELVSS. When the voltage of the initialization power source Vint is supplied to the anode electrode of the first organic light emitting diode OLED1, the first organic light emitting diode OLED1may be initialized to a reverse bias state. When the first organic light emitting diode OLED1is initialized to the reverse bias state, degradation characteristics may be improved, thereby causing lifespan to be enhanced.

The second transistor M2may be coupled between the data line D1and the first node N1. A gate electrode of the second transistor M2may be coupled to the first first scan line S11. The second transistor M2may be turned on when a first scan signal is supplied to the first first scan line S11, and may electrically couple the data line D1to the first node N1.

The third transistor M3may be coupled between the first power source ELVDD and the first node N1. A gate electrode of the third transistor M3may be coupled to the first second light emitting control line E21. The third transistor M3may be turned on when a second light emitting control signal is supplied to the first second light emitting control line E21, and may supply the voltage of the first power source ELVDD to the first node N1.

The fourth transistor M4may be coupled between the first driving transistor MD1and the anode electrode of the first organic light emitting diode OLED1. A gate electrode of the fourth transistor M4may be coupled to a first first light emitting control line E11. The fourth transistor M4may be turned on when the first light emitting control signal is supplied to the first first light emitting control line E11, and may electrically couple the first driving transistor MD1to the first organic light emitting diode OLED1.

The fifth transistor M5may be coupled between a reference power source Vref and the first node N1. A gate electrode of the fifth transistor M5may be coupled to the first second scan line S21. The fifth transistor M5may be turned on when a second scan signal is supplied to the first second scan line S21, and may supply a voltage of the reference power source Vref to the first node N1. The reference power source Vref may be set to a voltage greater than or equal to that of the first power source ELVDD. For example, the voltage of the first power source ELVDD may be used as the reference power source Vref.

The second pixel circuit148may control an amount of current supplied to the second organic light emitting diode OLED2corresponding to a second data signal supplied from the data line D1. The second pixel circuit148may include a second driving transistor MD2, and first through fifth transistors M1′, M2′, M3′, M4′, and M5′.

The second driving transistor MD2may be coupled between the first power source ELVDD and an anode electrode of the second organic light emitting diode OLED2. A gate electrode of the second driving transistor MD2may be coupled to a second node N2. The second driving transistor MD2may control an amount of current supplied from the first power source ELVDD to the second power source ELVSS via the second organic light emitting diode OLED2corresponding to a voltage at the second node N2.

The first transistor M1′ may be coupled between the anode electrode of the second organic light emitting diode OLED2and the initialization power source Vint. A gate electrode of the first transistor M1′ may be coupled to the first first light emitting control line E11. The first transistor M1′ may be turned on when the first light emitting control signal is supplied to the first first light emitting control line E11, and may supply the voltage of the initialization power source Vint to the anode electrode of the second organic light emitting diode OLED2.

The second transistor M2′ may be coupled between the data line D1and the second node N2. A gate electrode of the second transistor M2′ may be coupled to the first second scan line S21. The second transistor M2′ may be turned on when the second scan signal is supplied to the first second scan line S21, and may electrically couple the data line D1to the second node N2.

The third transistor M3′ may be coupled between the first power source ELVDD and the second node N2. A gate electrode of the third transistor M3′ may be coupled to the first first light emitting control line E11. The third transistor M3′ may be turned on when the first light emitting control signal is supplied to the first first light emitting control line E11, and may supply the voltage of the first power source ELVDD to the second node N2.

The fourth transistor M4′ may be coupled between the second driving transistor MD2and the anode electrode of the second organic light emitting diode OLED2. A gate electrode of the fourth transistor M4′ may be coupled to the first second light emitting control line E21. The fourth transistor M4′ may be turned on when the second light emitting control signal is supplied to the first second light emitting control line E21, and may electrically couple the second driving transistor MD2to the second organic light emitting diode OLED2.

The fifth transistor M5′ may be coupled between the reference power source Vref and the second node N2. A gate electrode of the fifth transistor M5′ may be coupled to the first first scan line S11. The fifth transistor M5′ may be turned on when the first scan signal is supplied to the first first scan line S11, and may supply the voltage of the reference power source Vref to the second node N2.

A storage capacitor Cst may be coupled between the first node N1and the second node N2. The storage capacitor Cst may be shared by the first pixel circuit146and the second pixel circuit148, and may store a voltage of the first data signal or the second data signal.

FIGS. 3A and 3Bare timing diagrams illustrating a method for driving the first pixel and the second pixel shown inFIG. 2.FIG. 3Aillustrates the timing diagram supplied during an i-th frame iF period, andFIG. 3Billustrates the timing diagram supplied during an (i+1)-th frame i+1F period.

During a first period T1of the i-th frame iF period, the first scan signal may be supplied to the first first scan line S11. When the first scan signal is supplied to the first first scan line S11, the second transistor M2and the fifth transistor M5′ may be turned on. When the second transistor M2is turned on, the first data signal DS1may be supplied from the data line D1to the first node N1.

When the fifth transistor M5′ is turned on, the voltage of the reference power source Vref may be supplied to the second node N2. The storage capacitor Cst may is store a voltage corresponding to a difference between the reference power source Vref and the first data signal DS1. Thus, a desired voltage may be stored in the storage capacitor Cst in a stable manner, regardless of a voltage drop of the first power source ELVDD.

For example, when the first power source ELVDD supplies current to the pixels142and144, a voltage drop (e.g., a predetermined voltage drop) corresponding to a location of the pixels142and144may occur. Accordingly, if the storage capacitor Cst is charged corresponding to a difference between the first power source ELVDD and the first data signal DS1, a desired voltage may not be charged. On the other hand, the reference power source Vref may not supply current to the pixels142and144. Thus, a constant voltage may be set regardless of the locations of the pixels142and144. Therefore, when the storage capacitor Cst stores the voltage corresponding to the difference between the reference power source Vref and the first data signal DS1, a desired voltage may be stored in the storage capacitor Cst.

The first light emitting control signal may be supplied to the first first light emitting control line E11during a second period T2of the i-th frame iF period. When the first light emitting control signal is supplied to the first first light emitting control line E11, the fourth transistor M4, the first transistor M1′, and the third transistor M3′ may be turned on.

When the fourth transistor M4is turned on, the first driving transistor MD1and the first organic light emitting diode OLED1may be electrically coupled. The first driving transistor MD1may supply a current (e.g., a predetermined current) corresponding to the voltage stored in the storage capacitor Cst to the first organic light emitting diode OLED1. The first organic light emitting diode OLED1may generate light having a brightness (e.g., predetermined brightness) during the second period T2.

When the third transistor M3′ is turned on, the voltage of the first power source ELVDD may be supplied to the second node N2. As a result, the voltage of the second node N2may be changed from the voltage of the reference power source Vref to the voltage of the first power source ELVDD. When the voltage of the second node N2is changed, the voltage of the first node N1, which is set to a floating state by coupling of the storage capacitor Cst, may also be changed.

When the first transistor M1′ is turned on, the voltage of the initialization power source Vint may be supplied to the anode electrode of the second organic light emitting diode OLED2. The second organic light emitting diode OLED2may be initialized as a reverse bias state during the second period T2.

The first scan signal may be sequentially supplied to the first scan lines S11to S1nduring the i-th frame iF period. Accordingly, the above-described process may be repeated. The first pixels142may be driven corresponding to the first data signal DS1during the i-th frame iF period.

The second scan signal is supplied to the first second scan line S21during the first period T1′ of the (i+1)-th frame (i+1F) period. When the second scan signal is supplied to the first second scan line S21, the second transistor M2′ and the fifth transistor M5may be turned on. When the second transistor M2′ is turned on, the second data signal DS2may be supplied to the second node N2from the data line D1.

When the fifth transistor M5is turned on, the voltage of the reference power Vref may be supplied to the first node N1. The storage capacitor Cst may store a voltage corresponding to the difference between the reference power source Vref and the second data signal DS2. A desired voltage may be stored in the storage capacitor Cst in a stable manner, regardless of the voltage drop of the first power source ELVDD.

The second light emitting control signal may be supplied to the first second light emitting control line E21during the second period T2′ of the (i+1)-th frame i+1F period. When the second light emitting control signal is supplied to the first second light emitting control line E21, the fourth transistor M4′, the first transistor M1, and the third transistor M3may be turned on.

When the fourth transistor M4′ is turned on, the second driving transistor MD2and the second organic light emitting diode OLED2may be electrically coupled. The second driving transistor MD2may supply a current (e.g., a predetermined current) to the second organic light emitting diode OLED2corresponding to the voltage stored in the storage capacitor Cst. The second organic light emitting diode OLED2may generate light having a brightness (e.g., a predetermined brightness) during the second period T2′.

When the third transistor M3is turned on, the voltage of the first power source ELVDD may be supplied to the first node N1. As a result, the voltage of the first node N1may be changed to the voltage of the first power source ELVDD from the voltage of the reference power source Vref. When the voltage of the first node N1is changed, the voltage of the second node N2, which is set to the floating state by the coupling of the storage capacitor Cst, may also change. The voltage stored in the storage capacitor Cst may not change and may maintain the voltage charged during the first period T1′.

When the first transistor M1is turned on, the voltage of the initialization power source Vint may be supplied to the anode electrode of the first organic light emitting diode OLED1. The first organic light emitting diode OLED1may be initialized to the reverse bias state during the second period T2′.

The second scan signal may be sequentially supplied to the second scan lines S21to S2nduring the (i+1)-th frame i+1F period. The above-described process may be repeated. The second pixels144may be driven corresponding to the second data signal DS2during the (i+1)-th frame i+1F period.

The first organic light emitting diode OLED1included in the first pixel142and the second organic light emitting diode OLED2included in the second pixel144may be alternatively driven with respect to a frame. When the first pixel142and the second pixel144are alternatively driven with respect to a frame, degradation of the organic light emitting diodes OLED1and OLED2and the transistors may be minimized or reduced, thereby improving lifespan. Additionally, the degradation characteristics may be improved by applying the reverse bias voltage of the first organic light emitting diode and the second organic light emitting diode. The first pixel142and the second pixel144that are adjacent to each other may share the storage capacitor Cst, and accordingly, an area occupied by the first pixel142and the second pixel144may be minimized or reduced.

FIG. 4illustrates an organic light emitting display according to a second embodiment. In describingFIG. 4, the same or substantially the same elements and configurations as that shown inFIG. 1are accorded the same reference numerals, and therefore, repeated description thereof may be omitted.

Referring toFIG. 4, the organic light emitting display according to the second embodiment may include a scan driver110′, an emission driver120, a data driver130′, a display unit140′ including first pixels142′ and second pixels144′, and a timing controller150.

The scan driver110′ may sequentially supply first scan signals to first scan lines S11to S1nand second scan signals to second scan lines S21to S2n. A first scan signal supplied to a j-th first scan line S1jmay be supplied so that it is synchronized with a second scan signal supplied to a j-th second scan line S2j.

The data driver130′ may drive first data lines D11to D1mand second data lines D21to D2m. The first data lines D11to D1mmay be formed in (e.g., extending in) a vertical direction, and may be coupled to the first pixels142′. The second data lines D21to D2mmay be formed in (e.g., extending in) a vertical direction, and may be coupled to the second pixels144′.

The data driver130′ may supply first data signals to the first data lines D11to D1mduring an i-th frame period, and may supply black data signals to the second data lines D21to D2m. The first data signals may refer to data signals corresponding to gray levels (e.g., grayscale values), and the black data signals may refer to a data signal corresponding to a black gray level (e.g., a black grayscale value).

The data driver130′ may supply second data signals to the second data lines D21to D2mduring an (i+1)-th frame period, and may supply the black data signals to the first data lines D11to D1m. The second data signals may refer to data signals corresponding to gray levels (e.g., grayscale values).

The display unit140′ may include the first pixels142′ and the second pixels144′ configured to emit light alternatively with respect to a frame (e.g., one frame period). The first pixels142′ may emit light corresponding to the first data signals supplied during the i-th frame period, and the second pixels144′ may emit light corresponding to the second data signals input during the (i+1)-th frame period. The first pixel142′ and the second pixel144′ that are adjacent to each other may share a storage capacitor configured to store data signals.

FIG. 5is a circuit diagram illustrating configurations of a first pixel and a second pixel according to the second embodiment. In describingFIG. 5, description relating to the same or substantially the same elements and configurations as that shown inFIG. 2may be omitted.

Referring toFIG. 5, the first pixel142′ according to the second embodiment may include a first pixel circuit146′ and a first organic light emitting diode OLED1, and the second pixel144′ may include a second pixel circuit148′ and a second organic light emitting diode OLED2.

The first pixel circuit146′ may control an amount of current supplied to the first organic light emitting diode OLED1corresponding to a first data signal supplied from a first data line D11. A second transistor M2included in the first pixel circuit146′ may be coupled between a first node N1and the first data line D11.

The second pixel circuit148′ may control an amount of current supplied to the second organic light emitting diode OLED2corresponding to a second data signal supplied from a second data line D21. The second transistor M2′ included in the second pixel circuit148′ may be coupled between a second node N2and the second data line D21.

The pixels142′ and144′ according to the second embodiment may charge a voltage in a storage capacitor Cst using a black data signal. From the pixels142′ and144′ according to the second embodiment, the reference power source Vref and the fifth transistors M5and M5′ coupled to the reference power source Vref may be omitted when compared to the pixels142and144shown inFIG. 2.

FIGS. 6A and 6Bare timing diagrams illustrating a method for driving the first pixel and the second pixel shown inFIG. 5.FIG. 6Ais a timing diagram supplied during an i-th frame iF period, andFIG. 6Bis a timing diagram supplied during an (i+1)-th frame i+1F period.

During the i-th frame iF period, a first scan signal may be supplied to a first first scan line S11, and a second scan signal may be supplied to a first second scan line S21. When the first scan signal is supplied to the first first scan line S11, the second transistor M2may be turned on. When the second transistor M2is turned on, a first data signal DS1from the first data line D11may be supplied to the first node N1. When the second scan signal is supplied to the first second scan line S21, the second transistor M2′ may be turned on. When the second transistor M2′ is turned on, a black data signal BDS from the second data line D21may be supplied to the second node N2. The black data signal BDS may be set to a voltage that is greater than or equal to that of a first power source ELVDD.

The storage capacitor Cst may store a voltage corresponding to a difference between the black data signal BDS and the first data signal DS1during a first period T1. The voltage stored in the storage capacitor Cst may be determined regardless of a voltage drop of the first power source ELVDD. Accordingly, a desired voltage may be stored in the storage capacitor Cst in a stable manner.

A first light emitting control signal may be supplied to a first first light emitting control line E11during a second period T2of the i-th frame iF period. When the first light emitting control signal is supplied to the first first light emitting control line E11, a fourth transistor M4, a first transistor M1′ and a third transistor M3′ may be turned on.

When the fourth transistor M4is turned on, a first driving transistor MD1and the first organic light emitting diode OLED1may be electrically coupled. The first driving transistor MD1may supply a current (e.g., a predetermined current) to the first organic light emitting diode OLED1corresponding to the voltage stored in the storage capacitor Cst. The first organic light emitting diode OLED1may generate light having a brightness (e.g., a predetermined brightness) during the second period T2.

When the third transistor M3′ is turned on, the voltage of the first power source ELVDD may be supplied to the second node N2. A voltage of the second node N2may change from a voltage of the black data signal BDS to the voltage of the first power source ELVDD. When the voltage of the second node N2changes, a voltage of the first node N1, which is set to a floating state by coupling of the storage capacitor Cst, may also change. Here, the voltage stored in the storage capacitor Cst may not change and may maintain the voltage charged during the first period T1.

When the first transistor M1′ is turned on, a voltage of an initialization power source Vint may be supplied to an anode electrode of the second organic light emitting diode OLED2. The second organic light emitting diode OLED2may be initialized to a reverse bias state during the second period T2.

The first scan signals may be sequentially supplied to first scan lines S11to S1nduring the i-th frame iF period. The second scan signals may be sequentially supplied to the second scan lines S21to S2n. The above-described process may be repeated. Accordingly, the first pixels142′ may be driven corresponding to the first data signals DS1during the i-th frame iF period.

The first scan signal may be supplied to the first first scan line S11, and the second scan signal may be supplied to the first second scan line S21during the first period T1′ of the (i+1)-th frame i+1F period. When the first scan signal is supplied to the first first scan line S11, the second transistor M2may be turned on. When the second transistor M2is turned on, the black data signal BDS from the first data line D11may be supplied to the first node N1. When the second scan signal is supplied to the first second scan line S21, the second transistor M2′ may be turned on. When the second transistor M2′ is turned on, a second data signal DS2from the second data line D21may be supplied to the second node N2. The storage capacitor Cst may store a voltage corresponding to a difference between the black data signal BDS and the second data signal DS2.

The second light emitting control signal may be supplied to a first second light emitting control line E21during the second period T2′ of the (i+1)-th frame i+1F period. When the second light emitting control signal is supplied to the first second light emitting control line E21, the fourth transistor M4′, the first transistor M1and the third transistor M3may be turned on.

When the fourth transistor M4′ is turned on, a second driving transistor MD2and the second organic light emitting diode OLED2may be electrically coupled. The second driving transistor MD2may supply a current (e.g., a predetermined current) to the second organic light emitting diode OLED2corresponding to the voltage stored in the storage capacitor Cst. The second organic light emitting diode OLED2may generate light having a brightness (e.g., a predetermined brightness) during the second period T2′.

When the third transistor M3is turned on, the voltage of the first power source ELVDD may be supplied to the first node N1. The voltage of the first node N1may change from the voltage of the black data signal BDS to the voltage of the first power source ELVDD. When the voltage of the first node N1changes, the voltage of the second node N2, which is set to the floating state by the coupling of the storage capacitor Cst, may also change. The voltage stored in the storage capacitor Cst may not change, and may maintain the voltage charged during the first period T1′.

When the first transistor M1is turned on, the voltage of the initialization power source Vint may be supplied to an anode electrode of the first organic light emitting diode OLED1. The first organic light emitting diode OLED1may be initialized to a reverse bias state during the second period T2′.

The above-described process may be repeated while the first scan signals are sequentially supplied to the first scan lines S11to S1nand the second scan signals are sequentially supplied to the second scan lines S21to S2n. The second pixels144′ may be driven corresponding to the second data signals DS2during the (i+1)-th frame i+1F period.

For convenience of illustration, the transistors are illustrated as p-channel metal oxide semiconductors (PMOS), but the present invention is not limited thereto. In other words, the transistors may be formed as n-channel metal oxide semiconductors (NMOS).

Furthermore, the OLEDs may generate red, green, blue or white light depending on a current. When the OLEDs generate the white light, it is possible to implement a color image by using an additional color filter.

By way of summation and review, the organic light emitting display may include a plurality of pixels that are arranged in a matrix form at intersections (or crossing regions) of data lines, scan lines, and power lines. The pixels generally include an OLED, two or more transistors including a driving transistor, and one or more capacitors.

The organic light emitting diode and the driving transistor included in the pixel may be gradually degraded corresponding to the time being used. When the organic light emitting diode and the driving transistor are degraded, the image with the desired brightness may no longer be displayed. Therefore, a method for improving lifespan of the organic light emitting display is desired.

The organic light emitting display and the driving method thereof according to an embodiment may drive the first pixels and the second pixels alternatively. The degradation of the first organic light emitting diode included in the first pixels, the second organic light emitting diode included in the second pixels, and the transistors included in the first pixels and the second pixels are minimized or reduced, thereby enhancing lifespan. Additionally, the first organic light emitting diode and the second organic light emitting diode may be applied with a reverse bias voltage, thereby improving degradation characteristics. Also, the first pixel and the second pixel that are adjacent to each other may share the storage capacitor and thereby securing a sufficient opening ratio (e.g., an aperture ratio) for the display device.