HEMT and fabricating method of the same

An HEMT includes a gallium nitride layer. An aluminum gallium nitride layer is disposed on the gallium nitride layer. A gate is disposed on the aluminum gallium nitride layer. The gate includes a P-type gallium nitride and a schottky contact layer. The P-type gallium nitride contacts the schottky contact layer, and a top surface of the P-type gallium nitride entirely overlaps a bottom surface of the schottky contact layer. A protective layer covers the aluminum gallium nitride layer and the gate. A source electrode is disposed at one side of the gate, penetrates the protective layer and contacts the aluminum gallium nitride layer. A drain electrode is disposed at another side of the gate, penetrates the protective layer and contacts the aluminum gallium nitride layer. A gate electrode is disposed directly on the gate, penetrates the protective layer and contacts the schottky contact layer.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a high electron mobility transistor (HEMT) having a schottky contact layer disposed on a P-type gallium nitride layer, and a fabricating method of same.

2. Description of the Prior Art

Due to their semiconductor characteristics, III-V semiconductor compounds may be applied in many kinds of integrated circuit devices, such as high power field effect transistors, high frequency transistors, or HEMTs. In the high electron mobility transistor, two semiconductor materials with different band-gaps are combined and a heterojunction is formed at the junction between the semiconductor materials as a channel for carriers. In recent years, gallium nitride (GaN) based materials have been applied in high power and high frequency products because of their properties of wider band-gap and high saturation velocity.

A two-dimensional electron gas (2DEG) may be generated by the piezoelectric property of the GaN-based materials, and the switching velocity may be enhanced because of the higher electron velocity and the higher electron density of the 2DEG

However, during the formation of a gate electrode, a protective layer on a P-type gallium nitride needs to be etched to form a gate electrode contact hole. Since the P-type gallium nitride serves as an etching stop layer, the activity of magnesium dopants within the P-type gallium nitride is reduced. Furthermore, because an alignment window is provided during the formation of the gate electrode contact hole, the schottky contact area between the gate electrode and the P-type gallium nitride become smaller. In this way, resistance between the gate electrode and the P-type gallium nitride is unable to be reduced to an expected value.

SUMMARY OF THE INVENTION

In view of this, the present invention provides an HEMT and a manufacturing method thereof to solve the above-mentioned problems.

According to a preferred embodiment of the present invention, An HEMT includes a gallium nitride layer. An aluminum gallium nitride layer is disposed on the gallium nitride layer. A gate is disposed on the aluminum gallium nitride layer, wherein the gate includes a P-type gallium nitride layer and a schottky contact layer, the P-type gallium nitride layer contacts the schottky contact layer, and a top surface of the P-type gallium nitride layer entirely overlaps a bottom surface of the schottky contact layer. A protective layer covers the aluminum gallium nitride layer and the gate. A source electrode is disposed at one side of the gate, penetrates the protective layer and contacts the aluminum gallium nitride layer. A drain electrode is disposed at another side of the gate, penetrates the protective layer and contacts the aluminum gallium nitride layer. A gate electrode disposed directly on the gate, penetrates the protective layer and contacts the schottky contact layer.

A fabricating method of an HEMT includes forming a gallium nitride layer, an aluminum gallium nitride layer, a P-type gallium nitride layer, and a schottky contact layer in sequence, wherein the schottky contact layer contacts P-type gallium nitride layer. Later, an etching process is performed to etch the schottky contact layer and the P-type gallium nitride layer to form a gate by taking the aluminum gallium nitride layer as a first etching stop layer, wherein the P-type gallium nitride layer contacts the schottky contact layer, and a top surface of the P-type gallium nitride layer entirely overlaps a bottom surface of the schottky contact layer. Next, a protectively layer is formed to cover the gate and the aluminum gallium nitride layer. Subsequently, the protective layer is etched to form two first contact holes in the protective layer at two sides of the gate. After that, a source electrode and a drain electrode are formed respectively in the two first contact holes. After forming the source electrode and the drain electrode, the protective layer is etched to form a second contact hole in the protective layer directly on the gate. Finally, a gate electrode is formed in the second contact hole and contacts the schottky contact layer.

DETAILED DESCRIPTION

FIG.1toFIG.7depict a fabricating process of an HEMT according to a preferred embodiment of the present invention.

As shown inFIG.1, a substrate10is provided. The substrate10includes a sapphire substrate, an SiC substrate or a silicon substrate. According to a preferred embodiment of the present invention, the substrate10is a silicon substrate having (1,1,1) facets. Later, a buffering stack layer12is formed on the substrate10. The buffering stack layer12includes aluminum nitride, gallium nitride, aluminum gallium nitride or other group III-V compound layer. The buffering stack layer12preferably includes numerous material layers. After that, a gallium nitride layer14, an aluminum gallium nitride layer16, a P-type gallium nitride layer18, and a schottky contact layer20are formed in sequence on the buffering stack layer12. The schottky contact layer20includes a metal, a metal compound or alloy. A work function of the metal, a work function of the metal compound and a work function of the alloy are smaller than a work function of the P-type gallium nitride layer18. A work function of the schottky contact layer20is preferably smaller than 6.1 electron volts. The schottky contact layer20may include TiN, TiW, TaN, Al, Ti, Mo, Au, W, Ni, Pd, Ta, Re, Ru, Pt or Co.

As show inFIG.2, a patterned mask22is formed to cover the schottky contact layer20to define a position of a gate24. Later, an etching process26is performed to etch the schottky contact layer20and the P-type gallium nitride layer18to form the gate24by taking the aluminum gallium nitride layer16as an etching stop layer. Because the schottky contact layer20and the P-type gallium nitride layer18are etched by using the same patterned mask22, the schottky contact layer20entirely overlaps the P-type gallium nitride layer18under a top view. That is, a top surface of the P-type gallium nitride layer18entirely overlaps a bottom surface of the schottky contact layer20.

Moreover, during the etching process26, a first etchant is used to etch the schottky contact layer20. Then, a second etchant is used to etch the P-type gallium nitride layer18. In other word, different etchants are respectively used to etch the P-type gallium nitride layer18and the schottky contact layer20. The etching process26can include a dry etching, a wet etching or a dry etching and a wet etching by turns. That is, the schottky contact layer20can be patterned by using a dry etching or a wet etching, and the P-type gallium nitride layer18can be patterned by using a dry etching or a wet etching as long as a suitable etchant is used. The first etchant includes fluorine-containing gas, chlorine-containing gas, BCl3/Cl2gas, CHF3gas, or HCl/H2O2/H2O solution. The second etchant includes KOH/ethylene glycol solution, HCl/H2O solution, fluorine-containing gas, chlorine-containing gas, BCl3/SF6gas, Cl2/Ar/O2gas, Cl2/N2gas, N2/Cl2/O2gas, or Cl2/Ar gas. For example, during the etching process26, the schottky contact layer20is etched by introducing BCl3/Cl2gas as an etchant followed by changing the etchant to Cl2/N2gas to etch the P-type gallium nitride layer18.

As shown inFIG.3, the patterned mask22is removed. Later, a protective layer28is formed to conformally cover the gate24and the aluminum gallium nitride layer16. In details, the protective layer28entirely covers and contacts the schottky contact layer20and the P-type gallium nitride layer18which form the gate24. The protective layer28directly contacts the topmost surface20aof the schottky contact layer20. As shown inFIG.4, a patterned mask30is formed to cover the protective layer28. Openings are set in the patterned mask30to define positions of a source electrode and a drain electrode. Later, the protective layer28, the aluminum gallium nitride layer16and the gallium nitride layer14are etched by taking the patterned mask30as a mask to form two first contact holes32in the protective layer28, the aluminum gallium nitride layer16and the gallium nitride layer14at two sides of the gate24.

As shown inFIG.5, after removing the patterned mask30, a metal layer is formed to fill in the first contact holes32and cover the protective layer28. Later, an etching process is performed to etch the metal layer to form a source electrode34and a drain electrode36respectively in the first contact holes32. Subsequently, a thermal process is performed to increase the efficiency of Ohmic contact between the source electrode34, the aluminum gallium nitride layer16and the gallium nitride layer14, and also to increase the efficiency of Ohmic contact between the drain electrode36, the aluminum gallium nitride layer16and the gallium nitride layer14. The metal layer can include multiple conductive layers, such as a conductive stacked layer formed by TiN, Cu, Al and Ti stacked from bottom to top. The metal layer can be etched by using fluorine-containing gas as an etchant.

As shown inFIG.6, a patterned mask38is formed to cover the protective layer28, the source electrode34and the drain electrode36. An opening which defines a position of a gate electrode is arranged in the patterned mask38. Next, the protective layer28is etched by taking the patterned mask38as a mask to form a second contact hole40directly on the gate24. The schottky contact layer20is exposed through the second contact hole40. The second contact hole40is formed by taking the topmost surface20aof the schottky contact layer20as an etching stop layer rather than taking the P-type gallium nitride layer18as an etching stop layer. In this way, Mg dopants in the P-type gallium nitride layer18are not damaged by the etchant. As shown inFIG.7, the patterned mask38is removed. After that, a metal layer is formed to fill in the second contact hole40and cover the protective layer28. Then, the metal layer is etched, and the metal layer in the second contact hole40is remained to serve as a gate electrode42. Now, an HEMT100of the present invention is completed.

As shown inFIG.7, an HEMT100includes a substrate10. A buffering stack layer12is disposed on the substrate10. A gallium nitride layer14is disposed on the buffering stack layer12. An aluminum gallium nitride layer16is disposed on the gallium nitride layer14. A gate24is disposed on the aluminum gallium nitride layer16. The gate includes a P-type gallium nitride layer18and a schottky contact layer20. The P-type gallium nitride layer18contacts the schottky contact layer20. A top surface of the P-type gallium nitride layer18entirely overlaps a bottom surface of the schottky contact layer20. A protective layer28covers the aluminum gallium nitride layer16and the gate24. Furthermore, the protective layer28contacts a topmost surface20aof the schottky contact layer20. A source electrode34is disposed at one side of the gate24, penetrates the protective layer28and contacts the aluminum gallium nitride layer16. A drain electrode36is disposed at another side of the gate24, penetrates the protective layer28and contacts the aluminum gallium nitride layer16. A gate electrode42is disposed directly on the gate24, penetrates the protective layer28and contacts the topmost surface20aof the schottky contact layer20. The substrate10includes a sapphire substrate, an SiC substrate or a silicon substrate. The HEMT100is preferably a normally-off HEMT. A two-dimensional electron gas (2DEG)44occurs within the aluminum gallium nitride layer16. According to a preferred embodiment of the present invention, the substrate10is a silicon substrate having (1,1,1) facets. The buffering stack layer12includes aluminum nitride, gallium nitride, aluminum gallium nitride or other group III-V compound layer. The schottky contact layer20includes a metal, a metal compound or alloy, a work function of the metal, a work function of the metal compound and a work function of the alloy are smaller than a work function of the P-type gallium nitride layer18. A work function of the schottky contact layer20is smaller than 6.1 electron volts. The schottky contact layer20includes TIN, TiW, TaN, Al, Ti, Mo, Au, W, Ni, Pd, Ta, Re, Ru, Pt or Co. According to a preferred embodiment of the present invention, the schottky contact layer20is TiN. A thickness of the schottky contact layer20is greater than 50 angstroms. In this embodiment, the thickness of the schottky contact layer20is 100 angstroms, and a thickness of the P-type gallium nitride layer18is 800 angstroms.

The protective layer28includes silicon nitride or silicon oxide. The drain electrode36and the source electrode34respectively include TiN, Cu, Al, Ti, Ta, W, WN, Co or Ni. Preferably, the drain electrode36and the source electrode34are respectively of multiple conductive layers, such as a conductive stacked layer formed by TiN, Cu, Al and Ti stacked from bottom to top. The gate electrode42includes Ti, Al or Cu.

An alignment window is provided while forming the second contact hole40. Therefore, the protective layer28formed afterward contacts part of the top surface of the gate24. Moreover, an interface is between the schottky contact layer20and the P-type gallium nitride layer18has a first width W1, an interface between the schottky contact layer20and the gate electrode42has a second width W2. Because the protective layer28covers part of the top surface of the gate24, the second width W2is smaller than the first width W1. Although the gate electrode42doesn't contact the entire top surface of the gate24, however, schottky contact is already formed between the schottky contact layer20and the P-type gallium nitride layer18. In this way, the resistance between the P-type gallium nitride layer18and the gate electrode42will not increase because of the alignment window. In this embodiment, the first width W1is 2 and the second width W2is 12 but not limited to them.

FIG.8depicts an HEMT according to an example of the present invention, wherein elements which are substantially the same as those in the embodiment ofFIG.7are denoted by the same reference numerals; an accompanying explanation is therefore omitted. The difference between the HEMT200and HEMT100is that the gate24of the HEMT200is formed only by the P-type gallium nitride layer18, and the protective layer28covers part of the top surface of the P-type gallium nitride layer18. Therefore, the gate electrode42doesn't contact the entire top surface of the P-type gallium nitride layer18. That is, part of the surface of the P-type gallium nitride layer18does not have schottky contact. In this way, comparing to the HEMT100, the resistance between the gate electrode42and the gate24of the HEMT200is larger.