Light emitting semiconductor device having an improved outward luminosity efficiency and fabrication method for the light emitting semiconductor device

A semiconductor light emitting device and a fabrication method for the semiconductor light emitting device whose outward luminous efficiency improved are provided and the semiconductor light emitting device includes a substrate; a protective film placed on the substrate; an n-type semiconductor layer which is placed on the substrate pinched by a protective film and on the protective film, and is doped with an n-type impurity; an active layer placed on the n-type semiconductor layer, and a p-type semiconductor layer placed on the active layer and is doped with a p-type impurity.

CROSS REFERENCE TO RELATED APPLICATION AND INCORPORATION BY REFERENCE

This application is based upon and claims the benefit of priority from prior Japanese Patent Applications No. P2007-340469 filed on Dec. 28, 2007, No. P2008-006943 filed on Jan. 16, 2008, and No. P2008-304190 filed on Nov. 28, 2008, the entire contents of which are incorporated herein by reference.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a semiconductor light emitting device and a fabrication method for the semiconductor light emitting device. In particular, the present invention relates a semiconductor light emitting device and a fabrication method for the semiconductor light emitting device for improving outward luminous efficiency.

2. Description of the Related Art

The semiconductor light emitting device which composes a III group nitride based semiconductor is used for an LED (Light Emitting Diode) etc. As an example of the III group nitride based semiconductor, there are aluminum nitride (AlN), gallium nitride (GaN), indium nitride (InN), etc. A typical III group nitride based semiconductor is expressed with AlxInyGa1-x-yN (where 0<=x<=1, 0<=y<=1, 0<=x+y<=1).

The semiconductor light emitting device using the III group nitride based semiconductor has a structure layered by n-type III group nitride based semiconductor layer (n-type semiconductor layer), active layer (luminous layer), and p-type III group nitride based semiconductor layer (p-type semiconductor layer) on the substrate at this order, for example. And the light which a hole supplied from the p-type semiconductor layer and an electron supplied from the n-type semiconductor layer recombine and generate in the active layer is outputted external (for example, refer to Patent Documents 1).

As the active layer, a MQW (Multiple Quantum Well) structure which sandwiched a plurality of layer by a well layer in the shape of sandwiches by the barrier layer with a greater band gap than the well layer is adoptable (for example, refer to Patent Documents 2).

In an MOVPE (Metal Organic Vapor Phase Epitaxy) method, the dislocation density of GaN obtained by using AlN or a GaN low temperature buffer layer on a sapphire substrate is about 108to 1010cm−2. On creating devices, such as a semiconductor laser, not more than about 106cm−2are needed. The dislocation, which is a problem, is penetration dislocation inherited with crystal growth from an interfacial region with the sapphire substrate.

Currently, a technology established as an effective method of reducing dislocation density to about 106to 107cm−2is an ELO (Epitaxial Lateral Overgrowth) technology which employed the characteristics of selective ELO efficiently.

There are the ELO technologies based on an HVPE (Hydride Vapor Phase Epitaxy) method and an MOVPE method for the ELO technology applied to GaN. It is the characteristic that the HVPE method can take a large growth rate in several 10 to several 100 micrometer/h.

The method of being based on the HVPE method is called FIELO (Facet-Initiated Epitaxial Lateral Overgrowth). In the FIELO, the thing formed the stripe shape mask pattern of SiO2with lithography is used as a substrate, for example on GaN with a thickness of 1 to 1.5 micrometers grown up with the MOVPE method on the sapphire (0001) surface (c surface). That is, in the semiconductor light emitting device, first of all, an about several micrometers n-type GaN layer is grown epitaxially on a sapphire substrate, then, an SiO2film or a SiNxfilm is formed partially on an n-type GaN layer, and then, the n-type semiconductor layer is formed for n-type GaN layers except the SiO2or the SiNxfilm with selective ELO as a seed crystal of the selective ELO (for example, refer to Non-Patent Document 1).

However, if the n-type GaN layer having a refractive index which is greatly different from the value of a refractive index of the sapphire substrate to the down side of the SiO2film or the SiNxfilm having a refractive index near the value of the refractive index of the sapphire substrate is located, a reflection of light occurs by the interface between the sapphire substrate and the n-type GaN layer, and light of the semiconductor light emitting device cannot be extracted external effectively, thereby the outward luminous efficiency reduces.

In the structure, when fabricating a nitride based semiconductor by an MOCVD (Metal Organic Chemical Vapor Deposition), for example, by using a sapphire substrate as a substrate for growth, metal organic compound gas was supplied as reactant gas, and the GaN epitaxial growth layer was formed on the sapphire substrate for crystal growth temperature at high temperature about 900 degrees C. to 1100 degrees C. The surface morphology of the GaN semiconductor layer by which direct growth is performed on the sapphire substrate by using the MOCVD method is very wrong. Then, before growing up the GaN semiconductor layer, a method of forming a buffer layer of AlN on the sapphire substrate is used. However, the growing condition of the buffer layer is limited severely, and also the described method needs to control film thickness strictly to 100 to 500 Å (angstrom) at the very thin range. Moreover, when performing crystal growth of the GaN layer on the AlN buffer layer, lattice constant mismatching is remarkable.

Moreover, when forming the p-type semiconductor layer in multilayer structure, in order to reduce the heat damage to an active layer, it is necessary to perform low-temperature growth, and it is necessary to reduce forward voltage (Vf) and to improve luminous efficiency simultaneously. Moreover, when applying the GaN layer as the p-type semiconductor layer, there is a problem in respect of a transparency over a luminous wavelength.

Moreover, as for the number of pairs of MQW, 4 to 5 pairs are used in the structure. In this case, an electron supplied from the n-type semiconductor layer jumps over the active layer, and flows to the p-type semiconductor layer. On this occasion, before a hole supplied from the p-type semiconductor layer reaches the active layer, the hole recombines with the electron, and the hole concentration which reaches the active layer decreases. Thereby, the luminance of LED will decrease. In order to prevent this phenomenon, a structure, which inserts the p-type AlGaN layer with a large band gap in front of the p-type semiconductor layer, is used. However, if aluminum (Al) is introduced, performing the p-type becomes difficult, and a value of resistance rises. On the other hand, when applying an InGaN layer to the well layer of the active layer, there is a problem that it is weak to the heat damage accompanying the high temperature process in formation of the p-type semiconductor layer.Patent Document 1: Japanese Patent Application Laying-Open Publication No. H10-284802Patent Document 2: Japanese Patent Application Laying-Open Publication No. 2004-55719Non-Patent Document 1: SAKAI Akira, and USUI Akira, “REDUCTION OF DISLOCATION DENSITY BY GaN SELECTION EPITAXIAL LATERAL OVERGROWTH”, Monthly Publication of the Japan Society of Applied Physics, Vol. 68, No. 7, pp. 774-779 (1999)

SUMMARY OF THE INVENTION

According to one aspect of the present invention, a semiconductor light emitting device comprises a substrate; a protective film placed on the substrate; an n-type semiconductor layer placed on the substrate pinched by the protective film and on the protective film, and doped with an n-type impurity; an active layer placed on the n-type semiconductor layer; and a p-type semiconductor layer placed on the active layer and doped with a p-type impurity.

According to another aspect of the present invention, a semiconductor light emitting device comprises a substrate; a protective film placed on the substrate; an AlN buffer layer placed on the substrate pinched by the protective film; an n-type semiconductor layer placed on the AlN buffer layer and the protective film, and doped with an n-type impurity; a block layer placed on the n-type semiconductor layer, and doped with an n-type impurity by concentration lower than the n-type semiconductor layer; an active layer placed on the block layer, the active layer being composed of a MQW having a layered structure by which an barrier layer and a well layer in which a band gap is smaller than the barrier layer is placed by turns, and including indium; a first nitride based semiconductor layer placed on the active layer and doped with a p-type impurity; a second nitride based semiconductor layer placed on the first nitride based semiconductor layer, and doped with a low-concentration p-type impurity rather than the p-type impurity of the first nitride based semiconductor layer; a third nitride based semiconductor layer that is placed on the second nitride based semiconductor layer, and doped with a high-concentration p-type impurity rather than the p-type impurity of the second nitride based semiconductor layer; and a fourth nitride based semiconductor layer placed on the third nitride based semiconductor layer, and doped with a low-concentration p-type impurity rather than the p-type impurity of the third nitride based semiconductor layer, wherein the film thickness of a final barrier layer of the top layer of the layered structure is thicker than a diffusion length of the p-type impurity of the first nitride based semiconductor layer.

According to another aspect of the present invention, a semiconductor light emitting device comprises a substrate; a protective film placed on the substrate; an AlN buffer layer placed on the substrate pinched by the protective film; an n-type semiconductor layer placed on the AlN buffer layer and the protective film, and doped with an n-type impurity; a block layer placed on the n-type semiconductor layer, and doped with the n-type impurity by concentration lower than the n-type semiconductor layer; an active layer placed on the block layer, the active layer being composed of a MQW having a layered structure by which an barrier layer and a well layer in which a band gap is smaller than the barrier layer is placed by turns, and including indium; a first nitride based semiconductor layer placed on the active layer and doped with a p-type impurity; a second nitride based semiconductor layer placed on the first nitride based semiconductor layer, and doped with a low-concentration p-type impurity rather than the p-type impurity of the first nitride based semiconductor layer; and a transparent electrode placed on the second nitride based semiconductor layer, and composed of a transparent electrode, wherein the film thickness of a final barrier layer of the top layer of a layered structure is thicker than a diffusion length of the p-type impurity of the first nitride based semiconductor layer.

According to another aspect of the present invention, a semiconductor light emitting device comprises a substrate; an AlN buffer layer placed on the substrate; an n-type semiconductor layer placed on the AlN buffer layer, and composed of an AlxGa1-xN layer (where 0<x<1) doped with an n-type impurity; an active layer placed on the n-type semiconductor layer, the active layer composed of a MQW having a layered structure by which the well layer composed of a barrier layer composed of an AlxGa1-xN layer (where 0<x<1) and an AlxInyGa1-x-yN layer (where 0<x<=y<1, 0<x+y<1) in which a band gap is smaller than the barrier layer are placed by turns; and a p-type semiconductor layer placed on the active layer, and composed of an AlxGa1-xN layer (where 0<=x<1) doped with a p-type impurity.

According to another aspect of the present invention, a fabrication method for a semiconductor light emitting device comprises forming a protective film on a substrate; patterning the protective film and exposing the substrate; forming an n-type semiconductor layer doped with an n-type impurity with an ELO on the substrate pinched by the protective film and on the protective film; forming an active layer on the n-type semiconductor layer; and forming a p-type semiconductor layer doped with a p-type impurity on the active layer.

According to another aspect of the present invention, a fabrication method for a semiconductor light emitting device comprises forming an AlN buffer layer on a substrate; forming an n-type semiconductor layer composed of an AlxGa1-xN layer (where 0<x<1) doped with of an n-type impurity on the AlN buffer layer; forming an active layer composed of a MQW having a layered structure by which the well layer composed of a barrier layer composed of an AlxGa1-xN layer (where 0<x<1) and an AlxInyGa1-x-yN layer (where 0<x<=y<1, 0<x+y<1) in which a band gap is smaller than the barrier layer are placed by turns; and forming a p-type semiconductor layer composed of an AlxGa1-xN layer (where 0<=x<1) doped with a p-type impurity on the active layer.

According to the present invention, a semiconductor light emitting device whose outward luminous efficiency improved, and a fabrication method for the same can be provided.

Moreover, according to the present invention, a semiconductor light emitting device and a fabrication method for the semiconductor light emitting device which is doped with Al to a n-type semiconductor layer, an active layer, and a p-type semiconductor layer, and a heat damage is decreased, and is improved of the transparency over a luminous wavelength and whose outward luminous efficiency improved can be provided.

DETAILED DESCRIPTION OF THE EMBODIMENTS

Various embodiments of the present invention will be described with reference to the accompanying drawings. It is to be noted that the same or similar reference numerals are applied to the same or similar parts and elements throughout the drawings, and the description of the same or similar parts and elements will be omitted or simplified. Generally, and as is in the representation of the cross-sectional diagram, it will be appreciated that the various drawings are not drawn to scale from one figure to another nor inside a given figure, and in particular that the circuit diagrams are arbitrarily drawn for facilitating the reading of the drawings. In the following descriptions, numerous specific details are set forth such as specific material layers, etc. to provide a thorough understanding of the present invention. However, it will be obvious to those skilled in the art that the present invention may be practiced without such specific details. In other instances, the material layers well-known have been shown in the cross-sectional diagrams form in order to not obscure the present invention with unnecessary detail. Drawings are schematic, not actual, and may be inconsistent in between in scale, ratio, etc.

The embodiments shown below exemplify a semiconductor device that are used to implement the technical ideas according to the present invention, and do not limit the technical ideas according to the present invention to those that appear below. These technical ideas, according to the present invention, may receive a variety of modifications that fall within the claims.

In a semiconductor emission device(s) according to the following embodiments of the invention, “transparent” is defined as that whose transmissivity is not less than about 50%. In the semiconductor emission device(s) according to the embodiments of the invention, the “transparent” is used for the purpose of being transparent and colorless toward visible light. The visible light is equivalent to the wavelength of about 360 nm to about 830 nm, and about 3.4 eV to about 1.5 eV of energies, and if the visible light does not cause absorption, reflection and dispersion in this region, it is transparent.

The transparency is determined by a band gap Egand a plasma frequency ωp. When the band gap Egis not less than about 3.1 eV, since an inter band transition of an electron does not occur with the visible light, it passes through without absorbing visible light. On the other hand, since the light of energy lower than plasma frequency ωpcannot advance into the inside of plasma, it is reflected by the carrier considered that is plasma. The plasma frequency ωpis expressed with ωp=(nq2/∈m*)1/2(where n denotes carrier density, q denotes an electric charge, ∈ denotes a dielectric constant, and m* denotes effective mass), and is a function of carrier density.

First Embodiment

A semiconductor light emitting device according to the first embodiment of the present invention includes a substrate10, a protective film18, an n-type semiconductor layer12, an active layer13, and a p-type semiconductor layer14, as shown inFIG. 1AandFIG. 1B. The protective film18is placed on the substrate10. The n-type semiconductor layer12is placed on the substrate10pinched by the protective film18and on the protective film18, and is doped with an n-type impurity. The active layer13is placed on the n-type semiconductor layer12. The p-type semiconductor layer14is placed on the active layer13, and is doped with a p-type impurity.

Moreover, a buffer layer16located on the substrate10pinched by the protective film18may be further provided.

Moreover, the semiconductor light emitting device according to the first embodiment includes a transparent electrode15, an n-side electrode200, and a p-side electrode100, as shown inFIG. 1AandFIG. 1B. The transparent electrode15is placed on the p-type semiconductor layer14. The n-side electrode200is placed on the surface of the n-type semiconductor layer12obtained by removing a part of the transparent electrode15, the p-type semiconductor layer14, the active layer13, and the n-type semiconductor layer12. The p-side electrode100is placed on the transparent electrode15.

Moreover, the semiconductor light emitting device according to the first embodiment may be further includes a reflective stacked film28located on the transparent electrode15, as shown inFIG. 10described later.

The protective film18is transparent toward a luminous wavelength, and the refractive index of the protective film18is almost equal to the refractive index of the substrate10. For example, it is effective to use one of the refractive index near the refractive index of the substrate10transparently enough toward a luminous wavelength as the protective film18.

When using a sapphire substrate (n=1.7 to 1.8) as the substrate10, if an SiO2film is used as the protective film18, the refractive index of SiO2film is about n=1.46, and becomes of the same grade as the refractive index n=1.7 to 1.8 of the sapphire substrate. Moreover, if a SiNxfilm is used as the protective film18, the refractive index of the SiNxfilm is about n=2.05, and becomes of the same grade as the refractive index of the sapphire substrate. If a TiOxfilm is used as the protective film18, the refractive index of the TiOxfilm is about n=1.8, and becomes of the same grade as the refractive index of the sapphire substrate. Furthermore, if an Al2O3film is used as the protective film18, the refractive index of the Al2O3film is about n=1.7 to 1.8, and becomes of the same grade as the refractive index of the sapphire substrate.

Therefore, as the protective film18, a silicon dioxide film, a silicon nitride film, a silicon oxynitride film, a titanium oxide film, or an alumina film is applicable.

The transparent electrode15may be either of ZnO, or ZnO containing ITO or indium.

Or again, as described later, the transparent electrode15may be either of ZnO, or ZnO containing ITO or indium, by which impurities of Ga or Al is doped with high impurity concentration of 1×1019to 5×1021cm−3.

Moreover, the active layer13has a barrier layer and the layered structure by which the well layer in which the band gap is smaller than a barrier layer placed by turns, and is composed of a MQW including indium.

Moreover, the barrier layer is composed of GaN, the well layer is composed of InxGa1-xN (where 0<x<1), and the number of pairs of the MQW is about 6 to 11, for example.

Moreover, the thickness of the well layer is 2 to 3 nm, for example, and the thickness of the barrier layer is 15 to 18 nm, for example.

Moreover, the substrates may be c-plane (0001) and the sapphire (α-Al2O3) substrate of 0.25 degree off.

The n-type semiconductor layer12, the active layer13, and the p-type semiconductor layer14make the nonpolar plane of hexagonal structure to the principal surface of crystal growth, and it is preferable that the lateral over growth surface of the n-type semiconductor layer12is a nonpolar plane vertical to the above-mentioned nonpolar plane.

Or again, the n-type semiconductor layer12, the active layer13, and the p-type semiconductor layer14make m-plane of hexagonal structure to the principal surface of crystal growth, and it is preferable that the lateral over growth surface of the n type semiconductor layer12is a-plane vertical to the above-mentioned m-plane.

Or again, the n-type semiconductor layer12, the active layer13, and the p-type semiconductor layer14make a-plane of hexagonal structure to the principal surface of crystal growth, and it is preferable that the lateral over growth surface of the n-type semiconductor layer12is m-plane vertical to the above-mentioned a-plane.

Or again, the n-type semiconductor layer12, the active layer13, and the p-type semiconductor layer14make the semi-polar plane of hexagonal structure to the principal surface of crystal growth, and it is preferable that the lateral over growth surface of the n-type semiconductor layer12is a-plane or m-plane vertical to the above-mentioned semi-polar plane.

Or again, the n-type semiconductor layer12, the active layer13, and the p-type semiconductor layer14make the polar face of hexagonal structure to the principal surface of crystal growth, and it is preferable that the lateral over growth surface of the n-type semiconductor layer12is m-plane or a-plane.

(Constructional Example Provided with Reflective Stacked Film)

In the structure ofFIG. 1, by placing a reflective stacked film28on the transparent electrode15, the light generated in the active layer13can be effectively reflected by the reflective stacked film28, as shown inFIG. 9.

Furthermore, In the structure ofFIG. 9, the light generated in the active layer13can be extracted effective in the substrate10side with the protective film18placed on the substrate10.

By creating the substrate in which the protective film18in which refractive indices differ partially is formed to up to the different species substrate, and also growing a nitride based semiconductor epitaxially to the direct above-mentioned substrate, and forming a light emitting device, unevenness can be formed on the epitaxial growth layer to the substrate interface, dispersion and diffraction of light occur, and optical extraction efficiency improves.

Moreover, since processing of the substrate is unnecessary, there are few burdens also in cost and process, and productivity enhancement is also excellent.

By growing epitaxially directly from a window section of the protective film18, the epitaxial growing process can be unified at once.

Since ELO is performed so that the protective film18may be covered, the penetration dislocation of a crystal can be bent and crystal quality also improves.

On the other hand, in the semiconductor light emitting device according to a comparative example of the present invention compared withFIG. 9, since the difference of the refractive index is large in the interface with the epitaxial growth layer composed of the sapphire substrate10, the buffer layer16, or the n-type semiconductor layer12, as shown inFIG. 10, the angle of total reflection is large. It is because the refractive index of the GaN layer is about n=2.5 in contrast with the refractive index of the sapphire substrate being about n=1.7 to 1.8.

Detailed Constructional Example

The semiconductor light emitting device according to the first embodiment includes a substrate10, a protective film18, a buffer layer16, an n-type semiconductor layer12, a block layer17, an active layer13, a p-type semiconductor layer14, and a transparent electrode15, as shown inFIG. 11. The protective film18is placed on the substrate10. The buffer layer16is placed on the substrate10pinched by the protective film18. The n-type semiconductor layer12is placed on the buffer layer16and the protective film18, and is doped with the n-type impurity. The block layer17is placed on the n-type semiconductor layer12, and is doped with the n-type impurity by concentration lower than the n-type semiconductor layer12. The active layer13is placed on the block layer17. The p-type semiconductor layer14is placed on the active layer13. The transparent electrode15is placed on the p-type semiconductor layer14.

As the active layer13is shown inFIG. 11, the barrier layers311to31nand310and the well layers321to32nin which the band gap is smaller than the barrier layers311to31nand310have the layered structure placed by turns. The 1stbarrier layer311to the nthbarrier layer31nincluded in the active layer13are hereinafter named generically, and are called “barrier layer31”. Moreover, all the well layers included in the active layer13are named generically, and are called “well layer32”.

The film thickness of the final barrier layer310of the top layer of the above-mentioned layered structure may be formed more thickly than the thickness of other barrier layers (the 1stbarrier layer311to the nthbarrier layer31n) included in the layered structure except the final barrier layer310.

In the semiconductor light emitting device shown inFIG. 11, the concentration of a p-type dopant of the final barrier layer310gradually decreases along to the thickness direction of the final barrier layer310from the first principal surface of the final barrier layer310which contacts the p-type semiconductor layer14, and a p-type dopant does not exist in the second principal surface that opposes the first principal surface.

The sapphire substrate of c-plane (0001) and 0.25 degree off, etc. are adoptable as the substrate10, for example. The n-type semiconductor layer12, the active layer13, and the p-type semiconductor layer14are composed of the III group nitride based semiconductor, respectively, and the buffer layer16, the n-type semiconductor layer12, the block layer17, the active layer13, and the p-type semiconductor layer14are layered one after another, after forming the protective film18on the substrate10.

The protective film18needs to be transparent toward a luminous wavelength, and the refractive index of the protective film18needs to be a material almost equal to the refractive index of the substrate10. For example, the protective film is formed with a silicon dioxide film, a silicon nitride film, a silicon oxynitride film, a titanium oxide film, an alumina film, etc.

In the case of a sapphire substrate (n=1.7 to 1.8), SiO2(n=1.46), SiNx(n=2.05), TiOx(n=1.8), Al2O3(n=1.7 to 1.8), etc. are applicable as the protective film18.

As the size of the protective film18, about 10 micrometers of the width maximum is preferable, and not less than about 100 nm, about 1 micrometer, of the thickness is preferable, for example. The shape of the protective film18has effective one of the pattern shape which does not obstruct ELO, such as a triangle, a rhombus, a hexagon, circular, and a stripe. In particular, in order to perform ELO, the direction of the pattern is selected in consideration of a-plane and m-plane which are lateral over growth surfaces.

When extracting light from the back side of the substrate10, or the upper surface of the epitaxial growth layer, since unevenness occurs on the interface of the protective film18and the epitaxial growth layer, the light is scattered or diffracted, and the light total reflection is performed by the interface between the refractive index difference of the epitaxial growth layer and the different species substrate is extracted efficiently outside.

The buffer layer16is formed by an AlN layer about 10 angstroms to 50 angstroms thick, for example. When performing crystal growth of the AlN buffer layer16, for example, it is made to grow up in the high temperature of a temperature span (about 900 degrees C. to 950 degrees C.).

By supplying trimethyl aluminum (TMA) and ammonia (NH3) to a reaction chamber by applying H2 gas as a carrier, it can form being able to grow up thin AlN buffer layer16about 10 to 50 angstrom thick at high speed, and crystal quality also is keeping satisfactory.

According to the semiconductor light emitting device according to the first embodiment, the crystal quality and surface morphology of the III group nitride based semiconductor which are formed on high temperature AlN buffer layer16and the protective film18are improvable.

The III group nitride based semiconductor doped with impurities, for example by less than 1×1017cm−3by using Si as an n-type impurity, whose film thickness is about 200 nm, for example, a GaN layer etc., can be used for the block layer17placed between the n-type semiconductor layer12and the active layer13.

In the semiconductor light emitting device shown inFIG. 11, for example, when the impurities doping of the Si is performed about 3×1018cm−3at the n-type semiconductor layer12, diffusion of Si from the n-type semiconductor layer12to the active layer13in the formation process of the active layer13and the fabricating process after the process can be prevented by placing the block layer17by which about 8×1016cm−3impurities of the Si is doped between the n-type semiconductor layer12and the active layer13.

That is, Si is not spread in the active layer13, thereby the reduction of the luminance of the light generated in the active layer13is prevented. Furthermore, when bias is applied between the n-type semiconductor layer12and the p-type semiconductor layer14in order to make light emit by the active layer13, the electron supplied to the active layer13from the n-type semiconductor layer12can prevent the overflow which passes the active layer13and reaches the p-type semiconductor layer14, and the reduction of the luminance of the light outputted from the semiconductor light emitting device can be prevented.

The Si concentration of the block layer17is less than 1×107cm−3. This is because the rate of the recombination in the inside of the active layer13decreases, and the luminance of the light is generated in the active layer13reduces, since the electron supplied from the n-type semiconductor layer12overflows to the p-type semiconductor layer14exceeding the active layer13, and recombines with a hole within the p-type semiconductor layer14, when the Si concentration of the block layer17is too high. On the other hand, when the Si concentration of the block layer17is too low, carrier density of the electron injected from the n-type semiconductor layer12to the active layer13cannot be risen. Therefore, it is preferred that the Si concentration of the block layer17is less than about 5×1016to 1×1017cm−3.

As explained above, according to the semiconductor light emitting device according to the first embodiment, the diffusion of Si from the n-type semiconductor layer12to the active layer13in the inside of the fabricating process and the overflow of the electron from the n-type semiconductor layer12to the p-type semiconductor layer14at the time of luminescence can be prevented, and the reduction of the luminance of the light outputted from the semiconductor light emitting device can be prevented, by placing the block layer17between the n-type semiconductor layer12and the active layer13. As a result, degradation of the quality of the semiconductor light emitting device shown inFIG. 11can be prevented.

The n-type semiconductor layer12supplies an electron to the active layer13, and the p-type semiconductor layer14supplies a hole to the active layer13. When the electron and the hole which are supplied recombine by the active layer13, the light is generated.

The III group nitride based semiconductor of about 1 to 6 micrometers of the film thickness which performed impurities doping of the n-type impurities, such as silicon (Si), for example, a GaN layer etc., can be used as the n-type semiconductor layer12.

The n-type semiconductor layer12composed of nitride semiconductors through the protective film18is directly grown epitaxially to up to the different species substrate10. In order to bury the protective film18, conditions are changed into the conditions, which accelerate ELO from the halfway. In order to accelerate ELO, it is effective to change the pressure of the gas series at the time of crystal growth for example. About 1.5 micrometers can be grown up, for example, at about 200 Torr in about 1050 degrees C. as the second step after growth about 1 micrometer, for example, at about 100 Torr in about 1050 degrees C. as the first step. Thus, by forming the n-type semiconductor layer12, the ELO can be accelerated with the reduction effect of the penetration dislocation density by ELO.

In order to perform the ELO so that the protective film18may be covered, the penetration dislocation of the crystal can be bent and crystal quality also improves.

Furthermore, the pressure and the growth temperature conditions which form the n-type semiconductor layer12are changed, dividing into the step of several times is also possible, for example, as shown inFIG. 6, the n-type semiconductor layer12(121,122,123,124) of 4 tiered structure can also be formed. By doing in this way, the surface morphology of the n-type semiconductor layer12is improved, and crystal quality can be improved.

The III group nitride based semiconductor of about 0.05 to 1 micrometer of the film thickness which performed impurities doping of the p-type impurity, for example, a GaN layer etc., can be used as the p-type semiconductor layer14. As the p-type impurity, it is usable in magnesium (Mg), zinc (Zn), cadmium (Cd), calcium (Ca), beryllium (Be), carbon (C), etc.

The configuration example of the p-type semiconductor layer14is as follows in detail. That is, the p-type semiconductor layer14includes a first nitride based semiconductor layer41, a second nitride based semiconductor layer42, a third nitride based semiconductor layer43, and a fourth nitride based semiconductor layer44, as shown inFIG. 11. The first nitride based semiconductor layer41is placed in the upper part of the active layer13, and doped with a p-type impurity. The second nitride based semiconductor layer42is placed on the first nitride based semiconductor layer41, and doped with a low-concentration p-type impurity rather than the p-type impurity of the first nitride based semiconductor layer41. The third nitride based semiconductor layer43is placed on the second nitride based semiconductor layer42, and doped with a high-concentration p-type impurity rather than the p-type impurity of the second nitride based semiconductor layer42. The fourth nitride based semiconductor layer44is placed on the third nitride based semiconductor layer43, and doped with a low-concentration p-type impurity rather than the p-type impurity of the third nitride based semiconductor layer43.

The thickness of the second nitride based semiconductor layer42is formed more thickly than the thickness of the first nitride based semiconductor layer41or the thickness of the third nitride based semiconductor layer43to the fourth nitride based semiconductor layer44.

At this point, the material and the thickness of each layer are specifically explained. The first nitride based semiconductor layer41which is placed in the upper part of the active layer13, and doped with the p-type impurity is formed, for example by a p-type GaN layer about 50 nm thick in Mg by about 2×1020cm−3by which impurities doping is performed.

The second nitride based semiconductor layer42which is placed on the first nitride based semiconductor layer41, and doped with the low-concentration p-type impurity rather than the p-type impurity of the first nitride based semiconductor layer41is formed, for example by a p-type GaN layer about 100 nm thick in Mg by about 4×1019cm−3by which impurities doping is performed.

The third nitride based semiconductor layer43which is placed on the second nitride based semiconductor layer42, and doped with the high-concentration p-type impurity rather than the p-type impurity of the second nitride based semiconductor layer42is formed, for example by a p-type GaN layer about 40 nm thick in Mg by about 1×1020cm−3by which impurities doping is performed.

The fourth nitride based semiconductor layer44which is placed on the third nitride based semiconductor layer43, and doped with the low-concentration p type impurity rather than the p-type impurity of the third nitride based semiconductor layer43is formed, for example by a p-type GaN layer about 10 nm thick in Mg by about 8×1019cm−3by which impurities doping is performed.

In the semiconductor light emitting device according to the first embodiment, the p-type semiconductor layer14formed on the active layer13composed of a MQW including indium is composed of a p-type GaN layer of 4 tiered structure from which Mg concentration differs as mentioned above, and is doped with the above-mentioned concentration. The p-type GaN layer grows at low temperature about 800 degrees C to 900 degrees C in order to reduce the heat damage to the active layer13.

Since light emitting power becomes high so that Mg concentration is high, the first nitride based semiconductor layer41nearest to the active layer13is so preferable that Mg concentration is high.

As for the second nitride based semiconductor layer42, since the crystal defect resulting from Mg increases and membranous resistance becomes high if it performs impurities doping of Mg too much, it is preferable that the Mg concentration is about the middle of the level of 1019cm−3.

Since the third nitride based semiconductor layer43is a layer which determines the amount of hole injections to the active layer13, its Mg concentration slightly higher than the second nitride based semiconductor layer42is preferable.

The fourth nitride based semiconductor layer44is a p-type GaN layer for reserving ohmic contact with the transparent electrode15, and is made depletion substantially. For example, when the ZnO electrode by which impurities doping is performed in Ga or Al about 1×1019to 5×1021cm−3is used as the transparent electrode15, the impurities doping of Mg is performed at the fourth nitride based semiconductor layer44so that it may become Mg concentration at the time when dropping most the forward voltage Vfof the semiconductor light emitting device.

When growing up four layers of the p-type GaN layers, since the third nitride based semiconductor layer43and the fourth nitride based semiconductor layer44near the p-side electrode100need to raise the hole concentration in the film, they increase H2gas volume in the carrier gas. Moreover, the first nitride based semiconductor layer41and the second nitride based semiconductor layer42near the active layer13do not have to increase the H2gas volume in the carrier gas, and are made to perform crystal growth by the extension into which the active layer13is grown up by the N2carrier gas. When growing up these p type GaN layers, the way which made the V/III ratio as high as possible can grow up the film which is lower resistance, and can drop the forward voltage (Vf) of the light emitting device.

According to the semiconductor light emitting device according to the first embodiment, the p-type semiconductor layer is formed at low temperature and the heat damage to the active layer can be reduced, and the forward voltage (Vf) can be reduced, thereby the luminous efficiency can be improved.

The active layer13is the MQW structure of having the 1stwell layer321to the nthwell layer32ninserted, respectively by the 1stbarrier layer311to the nthbarrier layer31nand the final barrier layer310, as shown inFIG. 11(where n is natural number). That is, the active layer13is made quantum well structure which sandwiched the well layer32in the shape of sandwiches by the barrier layer31with a greater band gap than the well layer32to a unit pair structure, and has n pair structure which layered this unit pair structure n times.

More specifically, the 1stwell layer321is placed between the 1stbarrier layer311and the 2ndbarrier layer312, and the 2ndwell layer322is placed between the 2ndbarrier layer312and the 3rdbarrier layer313. And the nthwell layer32nis placed between the nthbarrier layer31nand the final barrier layer310. The 1stbarrier layer311of the active layer13is placed through the block layer17on the n-type semiconductor layer12, and the p-type semiconductor layer14(41to44) is placed on the final barrier layer310of the active layer13.

The well layers321to32nare formed, for example of an InxGa1-xN (where 0<x<1) layer, and the barrier layers311to31nand310are formed, for example of a GaN layer. Moreover, the number of pairs of the MQW layer is characterized by being 6 to 11, for example. In addition, the ratio {x/(1-x)} of indium (In) of the well layers321to32nis suitably set up according to the wavelength of light to be generated.

Moreover, the thickness of the well layer321to32nis about 2 to 3 nm (preferable about 2.8 nm), for example, and the thickness of the barrier layers311to31nis about 7 to 18 nm (preferable about 16.5 nm).

In the semiconductor light emitting device according to the first embodiment, the number of MQW pairs in the active layer13for the electron supplied from the n-type semiconductor layer12and the hole supplied from the p-type semiconductor layer14to recombine efficiently in the active layer13can be optimized.

The film thickness of the final barrier layer310is formed more thickly than the diffusion length of Mg from the p-type semiconductor layer14to the active layer13.

In the example of the semiconductor light emitting device shown inFIG. 11, the concentration of the p-type impurity of the final barrier layer310gradually decreases along the thickness direction of the final barrier layer310from the first principal surface of the final barrier layer310which contacts the p-type semiconductor layer14, and the p-type impurity does not exist substantially in the second principal surface that opposes the first principal surface.

The film thickness d0of the final barrier layer310of the semiconductor light emitting device shown inFIG. 11is set up as that the p-type impurity diffused in the active layer13from the p-type semiconductor layer14may not reach the well layer32of the active layer13after the formation process of the p-type semiconductor layer14and its process. That is, the film thickness d0is set as the thickness which the p-type impurity diffused in the final barrier layer310from the p-type semiconductor layer14does not reach to the second principal surface (surface where the final barrier layer310contacts well layer32n) that opposes the first principal surface of the final barrier layer310which contacts the p-type semiconductor layer14.

The Mg concentration in the first principal surface of the final barrier layer310which contacts the p-type semiconductor layer14is, for example about 2×1020cm−3, the Mg concentration reduces gradually toward the second principal surface of the final barrier layer310which opposes the first principal surface, and the Mg concentration does not have influence of less than about 1016cm−3in a position with a distance of about 7 to 8 nm from the first principal surface, thereby becoming not more than the minimum limit of detection community in analysis.

That is, Mg does not diffuse to the second principal surface of the final barrier layer310by applying the film thickness d0of the final barrier layer310about 10 nm, and therefore, Mg does not exist in the second principal surface of the final barrier layer310which contacts the active layer13. That is, Mg is not spread in the nthwell layer32n, and the reduction of the luminance of the light generated in the active layer13is prevented.

In addition, the film thickness d1to dn of the 1stbarrier layer311to the nthbarrier layer31nmay be the same. However, the hole injected into the active layer13from the n-type semiconductor layer12needs to reach the nthwell layer32n, and it is necessary to set the film thickness d1to dn as the thickness which the electron and luminescence by the recombination of a hole may generate in the nthwell layer32n. It is because displacement of the hole in the inside of the active layer13is prevented and the luminous efficiency is reduced, if the film thickness d1to dn of the 1stbarrier layer311to the nthbarrier layer31nis too thick. For example, the film thickness d0of the final barrier layer310is about 10 nm, the film thickness d1to dn of the 1stbarrier layer311to the nthbarrier layer31nis about 7 to 18 nm, and the film thickness of the 1stwell layer321to the nthwell layer32nis about 2 to 3 nm.

As mentioned above, in the semiconductor light emitting device according to the first embodiment, the film thickness d0of the final barrier layer310which contacts the p-type semiconductor layer14is set as the thickness to which the p-type impurity diffused in the active layer13from the p-type semiconductor layer14does not reach the well layer32of the active layer13. That is, the diffusion of the p-type impurity from the p-type semiconductor layer14to the well layer32of the active layer13can be prevented, controlling increase of the film thickness of the whole of the active layer13by setting up more thickly than the diffusion length of Mg the film thickness d0of the final barrier layer310, according to the semiconductor light emitting device shown inFIG. 11. As a result, the reduction of the luminance of the light resulting from the diffusion of the p-type impurity to the well layer32does not occur, thereby the semiconductor light emitting device by which degradation of the quality of the semiconductor light emitting device is controlled can be fabricated.

Modified Example

FIG. 12is a schematic cross-sectional configuration chart of a semiconductor light emitting device according to a modified example of the first embodiment, and shows a schematic cross-sectional configuration chart to which the semiconductor light emitting device part and the active layer part are enlarged.

The semiconductor light emitting device according the modified example of to the first embodiment includes a substrate10, a protective film18, a buffer layer16, an n-type semiconductor layer12, a block layer17, an active layer13, a p-type semiconductor layer14, and a transparent electrode15, as shown inFIG. 11. The protective film18is placed on the substrate10. The buffer layer16is placed on the substrate10pinched by the protective film18. The n-type semiconductor layer12is placed on the buffer layer16and the protective film18, and is doped with the n-type impurity. The block layer17is placed on the n-type semiconductor layer12, and is doped with the n-type impurity by concentration lower than the n-type semiconductor layer12. The active layer13is placed on the block layer17. The p-type semiconductor layer14is placed on the active layer13. The transparent electrode15is placed on the p-type semiconductor layer14.

The semiconductor light emitting device according to the modified example of the first embodiment includes a third nitride based semiconductor layer43, a fourth nitride based semiconductor layer44, and a transparent electrode15. The third nitride based semiconductor layer43doped with a p-type impurity placed on the upper part of the active layer13. The fourth nitride based semiconductor layer44is placed on the third nitride based semiconductor layer, and doped with a lower concentration p-type impurity rather than the p-type impurity of the third nitride based semiconductor layer. The transparent electrode15is placed on the fourth nitride based semiconductor layer44.

Moreover, the transparent electrode15includes either of ZnO, ITO in which Ga or Al by which impurities doping is performed to about 1×1019to 5×1021cm−3, or ZnO containing indium.

The semiconductor light emitting device according to the modified example of the first embodiment is formed in the double layer structure which is composed of the third nitride based semiconductor layer43and the fourth nitride based semiconductor layer44, on the structure of the semiconductor light emitting device according to the first embodiment. As for the third nitride based semiconductor layer43, the p-type semiconductor layer14is placed directly on the upper part of the active layer13. The fourth nitride based semiconductor layer44is placed on the third nitride based semiconductor layer43, and doped with the lower concentration p-type impurity rather than the p-type impurity of the third nitride based semiconductor layer43.

The third nitride based semiconductor layer43placed directly on the upper part of the active layer13is formed, for example by a p-type GaN layer about 40 nm thick in Mg by about 1×1020cm−3by which impurities doping is performed.

The fourth nitride based semiconductor layer44which is placed on the third nitride based semiconductor layer43, and doped with the low-concentration p type impurity rather than the p-type impurity of the third nitride based semiconductor layer43is formed, for example by a p-type GaN layer about 10 nm thick in Mg by about 8×1019cm−3by which impurities doping is performed.

In the semiconductor light emitting device according to the modified example of the first embodiment, the p-type semiconductor layer14formed on the active layer13composed of a MQW including indium is composed of a p-type GaN layer of 2 tiered structure from which Mg concentration differs as mentioned above, and is doped with the above-mentioned concentration. The p-type GaN layer grows at low temperature about 800 degrees C. to 900 degrees C. in order to reduce the heat damage to the active layer13.

Since the third nitride based semiconductor layer43nearest to the active layer13is a layer which determines the amount of hole injections to the active layer13, light emitting power becomes high, so that the Mg concentration is high. For this reason, the Mg concentration is so preferable that it is high.

The fourth nitride based semiconductor layer44is a p-type GaN layer for reserving ohmic contact with the transparent electrode15, and is made depletion substantially. For example, when the ZnO electrode by which impurities doping of Ga or Al is performed about 1×1019to 5×1021cm−3is used as the transparent electrode15, the impurities doping of Mg is performed at the fourth nitride based semiconductor layer44so that it may become Mg concentration at the time when dropping most the forward voltage Vfof the semiconductor light emitting device.

When growing up two layers of the p-type GaN layers, since the third nitride based semiconductor layer43near the p-side electrode100, and the fourth nitride based semiconductor layer44need to raise the hole concentration in the film, they increase H2gas volume in the carrier gas. Or again, the third nitride based semiconductor layer43near the active layer13do not have to increase the H2gas volume in the carrier gas, and may be made to perform crystal growth by the extension into which the active layer13is grown up by the N2carrier gas.

Also in the semiconductor light emitting device according to the modified example of the first embodiment, since the protective film18placed on the substrate10, the buffer layer16placed on the substrate10pinched by the protective film18, the n-type semiconductor layer12placed on the buffer layer16and the protective film18, and impurities doping of the n-type impurity is performed, the block layer17, the active layer13, the p-type semiconductor layer14, the final barrier layer310, the reflective stacked film28, and the electrode structure are the same as that of the semiconductor light emitting device according to the first embodiment of the present invention, the description is omitted.

According to the semiconductor light emitting device according to the first embodiment and the modified example, the crystal quality and surface morphology of the III group nitride based semiconductor which are formed on high temperature AlN buffer layer16and the protective film18are improvable.

Moreover, the p-type semiconductor layer14is formed at low temperature and the heat damage to the active layer13can be reduced, and the forward voltage (Vf) can be reduced, thereby the luminous efficiency can be improved.

Moreover, the number of MQW pairs of the active layer13for the electron supplied from the n-type semiconductor layer12and the hole supplied from the p-type semiconductor layer14to recombine efficiently in the active layer13can be optimized, and the luminous efficiency can be improved.

Moreover, the diffusion of the p-type impurity from the p-type semiconductor layer14to the well layer can be controlled, the luminous efficiency can be improved, the overflow of the electron from the n-type semiconductor layer12to the p-type semiconductor layer14and the diffusion of the n-type impurity from the n-type semiconductor layer12to the active layer13can be controlled, and the luminous efficiency can be improved.

Moreover, the semiconductor light emitting device which does not need an annealing process which removes a hydrogen atom from the p-type semiconductor layer14can be provided, and the semiconductor light emitting device whose outward luminous efficiency improved by the reflective stacked film can also be provided.

The flip chip structure become the path which extracts the light from the GaN layer side to the external through the sapphire substrate10is effective at the point which may improve in particular outward luminous efficiency. From a simulation result, in the pattern of the circular, the diameter φ of which is about 5 micrometers, or lattice-shaped protective film18, if the cone angle of 40 degrees to 60 degrees is given, optical extraction efficiency improves 1.5 times.

By creating the substrate in which the protective film18in which refractive indices differ partially is formed to up to the different species substrate10, growing a nitride based semiconductor epitaxially to the direct above-mentioned substrate, and forming a light emitting device on this, not only it can form unevenness on the interface between the epitaxial growth layer and the substrate, dispersion and diffraction of light occur and optical extraction efficiency improves, but the quality of the epitaxial growth layer improves.

FIG. 13is a schematic diagram for explaining the crystal plane of the group III nitride semiconductor applied to the semiconductor light emitting device according to the first embodiment and its modified example,FIG. 13Ashows a schematic diagram showing c-plane, a-plane, and m-plane of the crystal structure of the group III nitride semiconductor,FIG. 13Bshows a schematic diagram for explaining a semi-polar plane {10-11},FIG. 13Cshows a schematic diagram for explaining a semi-polar plane {10-13}, andFIG. 13Dshows a schematic diagram showing combination of III group atoms and a nitrogen atom, respectively.

As shown inFIG. 13AtoFIG. 13D, the crystal structure of the III group nitride based semiconductor can be approximated with the hexagonal system, and four nitrogen atoms is combined toward one III group atoms. Four nitrogen atoms are located at the four peaks of the regular tetrahedron which is placed III group atoms in central. As for these four nitrogen atoms, one nitrogen atom is located in +c axial direction toward III group atoms, and other three nitrogen atoms are located in the −c axis side toward III group atoms. For such a structure, the polarization direction composes a group III nitride semiconductor in line with the c axis.

The c axis is taken along the axial direction of the hexagonal prism, and the surface (crystal plane of the hexagonal prism) which makes this c axis to normal line is a c-plane {0001}. If cleavage of the crystal of the group III nitride semiconductor is performed in respect of two in parallel to c-plane, the surface (+c plane) by the side of +c axis constitutes a crystal plane where III group atoms are located in a line, and the surface (−c plane) by the side of −c axis constitutes a crystal plane where the nitrogen atom is located in a line. Therefore, since the c-plane shows character, which is different by the +c axis and −c axis side, it is called a Polar Plane.

Since +c plane and −c plane are different crystal planes, different physical properties are shown according to it. More specifically, it proves that +c plane has the high endurance toward the chemical reaction that it is strong to alkali etc., and −c plane is chemically weak conversely, for example, it melts into alkali.

On the other hand, the side of the hexagonal prism is m-plane {10-10}, respectively, and the surface passing through the ridgeline of the pair which does not adjoin each other is a-plane {11-20}. Since these are right-angled crystal planes toward c-plane and lie at right angles toward the polarization direction, they are planes without polarity, i.e., a Nonpolar Plane. Furthermore, since a crystal plane {10-11} and {10-13} sloping (it is not in parallel, either and right-angled, either) toward c-plane cross aslant toward the polarization direction as shown inFIG. 13BandFIG. 13C, it is some polar plane, i.e., Semipolar Plane. The example of other semipolar planes is a surface of {10-1-1} plane, {10-1-3} plane, {11-22} plane, etc.

For example, the GaN single crystal substrate, which applies m-plane to the principal surface, can be cut and produced from the GaN single crystal which applied c-plane to the principal surface. The m-plane of the cut substrate is ground by chemical mechanical polishing treatment, for example, and the bearing error about both the [0001] directions and the [11-20] direction shall be within ±1 degree (preferably within ±0.3 degrees). In this way, the GaN single crystal substrate, which applied m-plane to the principal surface, is obtained.

Each surface of the above-mentioned hexagonal structure can be used for the semiconductor light emitting device according to the first embodiment as the crystal principal surface, and it can form the semiconductor light emitting device by the MOCVD method etc.

In the semiconductor light emitting device according to the first embodiment and its modified example, for example, the n-type semiconductor layer12, the active layer13, and the p-type semiconductor layer14are effective to apply the nonpolar plane of hexagonal structure to the principal surface of crystal growth, and the ELO surface of the n-type semiconductor layer12is effective to select the pattern shape of the protective film18so that it may become the nonpolar plane vertical to the above-mentioned nonpolar plane.

Or again, the n-type semiconductor layer12, the active layer13, and the p-type semiconductor layer14are effective to apply m-plane of hexagonal structure to the principal surface of crystal growth, and the ELO surface of the n-type semiconductor layer12is effective to select the pattern shape of the protective film18so that it may become a-plane vertical to the above-mentioned m-plane.

Or again, the n-type semiconductor layer12, the active layer13, and the p-type semiconductor layer14are effective to apply a-plane of hexagonal structure to the principal surface of crystal growth, and the ELO surface of the n-type semiconductor layer12is effective to select the pattern shape of the protective film18so that it may become m-plane vertical to the above-mentioned a-plane.

Or again, the n-type semiconductor layer12, the-active layer13, and the p-type semiconductor layer14are effective to apply the semipolar plane of hexagonal structure to the principal surface of crystal growth, and the ELO surface of the n-type semiconductor layer12is effective to select the pattern shape of the protective film18so that it may become a-plane vertical to the above-mentioned semipolar plane or m-plane.

Or again, the n-type semiconductor layer12, the active layer13, and the p-type semiconductor layer14are effective to apply the polar plane of hexagonal structure to the principal surface of crystal growth, and the ELO surface of the n-type semiconductor layer12is effective to select the pattern shape of the protective film18so that it may become m-plane or a-plane.

The semiconductor light emitting device according to the first embodiment is further includes n-side electrodes200and300for applying voltage to the n-type semiconductor layer12, and a p-side electrode100for applying voltage to the p-type semiconductor layer14, as shown inFIG. 14. As shown inFIG. 14, the n-side electrode200is placed on the surface of the p-type semiconductor layer14, the active layer13, the block layer17, and the n type semiconductor layer12that performed mesa etching and exposed of the partial region of the n-type semiconductor layer12.

The p-side electrode100is placed on the p-type semiconductor layer14through the transparent electrode15. Or again, the p-side electrode100may be directly placed on the p-type semiconductor layer14. The transparent electrode15placed on the fourth nitride based semiconductor layer44includes either of the ZnO, ITO, or ZnO containing indium, for example.

The n-side electrodes200and300are composed of an aluminum (Al) film, a multilayer film of Ti/Ni/Au or Al/Ti/Au, Al/Ni/Au, Al/Ti/Ni/Au, or a multilayer film of Au—Sn/Ti/Au/Nil/Al from the upper layer, for example, and the p-side electrode100is composed of an Al film, a palladium (Pd)-gold (Au) alloy film, a multilayer film of Ni/Ti/Au, or a multilayer film of Au—Sn/Ti/Au from the upper layer, for example. And, ohmic contact of the n-side electrodes200and300is performed to the n-type semiconductor layer12, and ohmic contact of the p-side electrode100is performed to the p-type semiconductor layer14through the transparent electrode15, respectively.

InFIG. 15, in order that the semiconductor light emitting device according to the first embodiment is mounted on flip chip structure, the surface of the p-side electrode100and the surface of the n-side electrode300are formed so that the height measured from the substrate10may constitute the substantially same height.

The structure ofFIG. 15forms the transparent conducting film ZnO as the transparent electrode15, and is provided with a structure, which wraps this ZnO by the reflective stacked film28. The reflective stacked film28reflects toward the wavelength λ of the light, which emits.

The reflective stacked film28has the layered structure of λ/4n1and λ/4n2(where n1and n2are refractive indices of a layer to laminate). As a material used for layered structure, the layered structure composed of ZrO2(n=2.12) and SiO2(n=1.46) can be used, for example toward λ=450 nm blue light. The thickness of each layer in this case sets ZrO2to about 53 nm, and sets SiO2to about 77 nm, for example. TiO2, Al2O3, etc. can also be used as other materials for forming the layered structure.

According to the semiconductor light emitting device according to the first embodiment, since the light which emitted light within the active layer13by the reflective stacked film28can be extracted from the substrate10side external, without being absorbed by the p-side electrode100, outward luminous efficiency can be improved.

As above-mentioned, the flip chip structure forms the path, which extracts light from the GaN layer side to the external through the sapphire substrate10, is effective at the point which may improve in particular outward luminous efficiency. By creating the substrate in which the protective film18in which refractive indices differ partially is formed to up to the different species substrate10, growing the nitride based semiconductor epitaxially to the direct above-mentioned substrate on this, and forming the light emitting device, unevenness can be formed on the interface between the epitaxial growth layer and the substrate, dispersion and diffraction of light occur, and optical extraction efficiency improves.

As shown inFIG. 2toFIG. 8, a fabrication method of the semiconductor light emitting device according to the first embodiment includes: a process for preparing the substrate10; a process for forming the protective film18on the substrate10; a process for patterning the protective film18and exposing the substrate10; a process for forming the n-type semiconductor layer12doped with the n-type impurity with ELO on the substrate10and the protective film18pinched to the protective film18and exposed; the process for forming the active layer13on the n-type semiconductor layer12; and a process for forming the p-type semiconductor layer14doped with the p-type impurity on the active layer13.

Moreover, the fabrication method of the semiconductor light emitting device according to the first embodiment further includes a process for forming the buffer layer16on the substrate10pinched to the protective film18and exposed, after the process for exposing the substrate10.

Moreover, the process of forming the n-type semiconductor layer12with ELO includes a process for forming by the first pressure at the time of ELO, and a process for forming by the second pressure higher than the first pressure.

Hereinafter, with reference toFIG. 2toFIG. 8, the fabrication method of the semiconductor light emitting device according to the first embodiment will be explained. The fabrication method of the semiconductor light emitting device described in the following is an example, and, of course, it can achieve with various fabrication methods except this method, including this modified example. Here, an example which applies the sapphire substrate to the substrate10will be explained.

(a) First of all, as shown inFIG. 2, prepare the sapphire substrate10, form the protective film18on the sapphire substrate10and then perform patterning, and expose the surface of the substrate10.

The protective film18is transparent toward a luminous wavelength, and the refractive index of the protective film18forms a silicon dioxide film, a silicon nitride film, a silicon oxynitride film, a titanium oxide film, an alumina film etc. which are a material almost equal to the refractive index of the substrate10by CVD (Chemical Vapor Deposition), or PVD (Physical Vapor Deposition), such as sputtering.

As the pattern size of the protective film18, about 10 micrometers of the width maximum is preferable, and not less than about 100 nm, about 1 micrometer, of the thickness is preferable, for example. The shape of the protective film18has effective one of the pattern shape which does not obstruct an epitaxially lateral over growth (ELOG), such as a triangle, a rhombus, a hexagon, circular, and a stripe. In particular, in order to perform ELOG, the direction of the pattern is selected in consideration of a-plane and m-plane which are lateral over growth surfaces. When extracting light from the back side of the substrate10, or the upper surface of the epitaxial growth layer, since unevenness occurs on the interface of the protective film18and the epitaxial growth layer, the light is scattered or diffracted, and the light total reflection is performed by the interface between the refractive index difference of the epitaxial growth layer and the different species substrate is extracted efficiently outside.

(b) Next, as shown inFIG. 3, grow up the AlN buffer layer16on the sapphire substrate10exposed by the MOCVD (Metal Organic Chemical Vapor Deposition) method etc., which are well known. For example, by supplying trimethyl aluminum (TMA) and ammonia (NH3) to a reaction chamber by applying H2 gas as a carrier in high temperature (about 900 degrees C.-degree 950 degrees C.), thin AlN buffer layer16about 10 to 50 angstrom thick is grown up for a short time.
(c) Next, as shown inFIG. 4, grow up the GaN layer, which becomes the n-type semiconductor layer12by the MOCVD method etc. on AlN buffer layer16. For example, after performing thermal cleaning of the substrate10in which AlN buffer layer16is formed, the substrate temperature is set as about 1000 degree C., and about 1 to 5 micrometers of n-type semiconductor layers12which performs impurities doping of the n-type impurity on the AlN buffer layer16are grown up. The GaN film, which performs impurities doping of the Si by about 3×1018cm−3concentration, for example as the n-type impurity is adoptable as the n-type semiconductor layer12. When performing impurities doping of the Si, trimethylgallium (TMG), ammonia (NH3), and silane (SiH4) are supplied as material gas, and the n-type semiconductor layer12is formed. As shown inFIG. 4, the penetration dislocation20is occurred in the GaN layer which becomes the n-type semiconductor layer12.
(d) Next, as shown inFIG. 5, form the n-type semiconductor layer12by ELO. An epitaxially lateral over growth layer is formed on the m-plane or a-plane which is an epitaxially lateral over growth plane, and selective epitaxial growth of the n-type semiconductor layer12is performed in vector LA and LB direction inFIG. 5, in a horizontal direction. As a result, the penetration dislocation20is also bent, the selective epitaxial growth plane from right and left combines near central part LO of the protective film18, and the penetration dislocation20is also linked simultaneously.

In order to bury the protective film18, the epitaxial growth condition may be changed into the conditions which accelerate the ELO from a halfway.

In order to accelerate ELO, it is effective to, change the pressure of the gas series at the time of crystal growth for example. About 1.5 micrometers can be grown up, for example, at about 200 Torrs in about 1050 degrees C. as the second step, after growth about 1 micrometer, for example, at about 100 Torrs in about 1050 degrees C. as the first step. Thus, by forming the n-type semiconductor layer12, the ELO can be accelerated with the reduction effect of the penetration dislocation density by ELO.

In order to perform the ELO so that the protective film18may be covered, the penetration dislocation of the crystal can be bent and crystal quality also improves.

Furthermore, the pressure and the growth temperature conditions which form the n-type semiconductor layer12are changed, dividing into the step of several times is also possible, for example, as shown inFIG. 6, the n-type semiconductor layer12(121,122,123,124) of 4 tiered structure can also be formed. By doing in this way, the surface morphology of the n-type semiconductor layer12is improved, and crystal quality can be improved.

For example, when forming the pattern of the protective film18in stripe shape, the stripe is applied into <11-20> or the <1-100> direction, sets the width of the protective film18to about 1 to 4 micrometers, and sets a repeated period to about 7 micrometers. On this, GaN which acts as the n-type semiconductor layer12at 1000 degrees C. is grown up by the HVPE method. In the HVPE method, NH3is made to react to GaCl, and GaN is grown up. When the stripe direction is <11-20>, first of all in the opening of the protective film18, as for the growth of GaN, the shape of the triangle cross section which applies a facet the {1-101} plane sloping toward the substrates face occurs by the growth of a direction at first (0001). Next, with the facet held, on the protective film18, lateral growth progresses until the adjoining growing region combines. After combination, the growth progresses so that the surface may further planarize, and the completely flat growth layer which has a surface (0001) is obtained. Although {11-22} plane acts as the facet in the pattern of the <1-100> direction in the stripe, the same growth layer is obtained.

The above-mentioned example is an example, and it can also apply other patterns and directions of the pattern. Moreover, although the principal surface of crystal growth explained the example of the polar plane in the above-mentioned example, it can also apply the nonpolar plane and the semipolar plane.

(e) Next, the GaN film which performed impurities doping of the Si as the block layer17on the n-type semiconductor layer12by less than 1×1017cm−3(for example, about 8×1016cm−3) concentration, for example, grow up about 200 nm. At this time, the same material gas as the case where the n-type semiconductor layer12is formed is applicable.
(f) Next, as shown inFIG. 7, form the active layer13on the n-type semiconductor layer12. For example, the well layer32composed of the barrier layer31and the InGaN film which are composed of the GaN film is laminated by turns, and the active layer13is formed. More specifically, adjusting the substrate temperature and the flow rate of material gas at the time of forming the active layer13, the barrier layer31and the well layer32are grown up continuously by turns, and the active layer13which the barrier layer31and the well layer32laminate is formed. That is, the process of laminating the well layer32and the barrier layer31with a larger band gap than the well layer32is applied a unit process by adjusting substrate temperature and the flow rate of material gas, and this unit process is repeated n times (for example, about 8 times), and the layered structure which the barrier layer31and the well layer32laminate by turns is obtained.

When forming the barrier layer31, TMG gas and NH3gas are supplied to a processing unit for film formation as material gas, respectively, for example. On the other hand, when forming the well layer32, TMG gas, trimethylindium (TMI) gas, and NH3gas are supplied to the processing unit as material gas, respectively, for example. In addition, the TMG gas is supplied as material gas of a Ga atom, the TMI gas is supplied as material gas of an In atom, and the NH3gas is supplied as material gas of a nitrogen atom.

On the formed layered structure, about 10 nm of the GaN films non-doped as the final barrier layer310are formed, and the active layer13shown inFIG. 1orFIG. 11is formed. As already explained above, the film thickness d0of the final barrier layer310is set as the thickness to which the p-type dopant diffused in the active layer13from the p-type semiconductor layer14does not reach the well layer32of the active layer13.

(g) Next, as shown inFIG. 8, the substrate temperature is set to 800 degrees C. to degree 900 degrees C., and form about 0.05 to 1 micrometer of p-type semiconductor layers14which perform impurities doping of the p-type impurity on the final barrier layer310.

The p-type semiconductor layer14is formed in 4 tiered structures which perform impurities doping of Mg, for example as the p-type impurity. The first nitride based semiconductor layer41placed on the upper part of the active layer13is formed by the p-type GaN layer about 50 nm thick by about 2×1020cm−3, the second nitride based semiconductor layer42is formed by the p-type GaN layer about 100 nm thick by about 4×1019cm−3, the third nitride based semiconductor layer43is, for example formed by the p-type GaN layer about 40 nm thick by about 1×1020cm−3, and the fourth nitride based semiconductor layer44is formed by the p-type GaN layer about 10 nm thick by about 8×1019cm−3.

When performing impurities doping of Mg, TMG gas, NH3gas, and bis(cyclopentadienyl) magnesium (Cp2Mg) gas are supplied as material gas, and the p-type semiconductor layer14(41-44) is formed. Mg is prevented from being spread in the well layer32of the active layer13by the final barrier layer310although Mg is spread in the active layer13from the p-type semiconductor layer14(41-44) at the time of formation of the p-type semiconductor layer14(41-44).

(h) Next, form the transparent electrode15on the upper part of the p-type semiconductor layer14by vacuum evaporation, sputtering technology, etc. As the transparent electrode15, either of the ZnO, ITO, or ZnO containing indium can be used, for example. Furthermore, it may perform impurities doping of the n-type impurities, such as Ga or Al, at high concentration to about 1×1019to 5×1021cm−3.
(i) Next, as shown inFIG. 9, form the reflective stacked film28reflected toward the wavelength λ of the light, which emits so that the transparent electrode15may be covered by vacuum evaporation, sputtering technology, etc. after patterning the transparent electrode15.
(j) Next, perform and remove mesa etching even of the halfway of the reflective stacked film28and the p-type semiconductor layer14to the n-type semiconductor layer12by using etching technology, such as RIE (Reactive Ion Etching), and expose the surface of the n-type semiconductor layer12.
(k) Next, form the n-side electrodes200and300on the surface of the exposed n-type semiconductor layer12by vacuum evaporation, sputtering technology, etc. Also toward the transparent electrode15on the p-type semiconductor layer14, the p-side electrode100is formed by vacuum evaporation, sputtering technology, etc. after the pattern formation, and the semiconductor light emitting device shown inFIG. 9,FIG. 14, orFIG. 15is completed.

According to the first embodiment, the semiconductor light emitting device and the fabrication method for the semiconductor light emitting device whose outward luminous efficiency improved can be provided.

Second Embodiment

A semiconductor light emitting device according to a second embodiment of the present invention includes a substrate10, an AlN buffer layer16, an n-type semiconductor layer25, an active layer60, and a p-type semiconductor layer80, as shown inFIG. 16. The AlN buffer layer16is placed on the substrate10. The n-type semiconductor layer25is placed on the AlN buffer layer16, and is composed of an AlxGa1-xN layer (where 0<x<1) by which impurities doping of an n-type impurity is performed. The active layer60is placed on the n type semiconductor layer25, and is composed of a MQW having a layered structure by which the well layer composed of a barrier layer composed of an AlxGa1-xN layer (where 0<x<1) and an AlxInyGa1-x-yN layer (where 0<x<=y<1, 0<x+y<1) in which a band gap is smaller than the barrier layer is placed by turns. The p-type semiconductor layer80is placed on the active layer60, and is composed of an AlxGa1-xN layer (where 0<=x<1) by which impurities doping of a p-type impurity is performed.

The active layer60has a layered structure by which well layers621to62nis placed by turns, as shown inFIG. 16. The well layers621to62nare composed of barrier layers611to61nand610composed of an AlxGa1-xN layer (where 0<x<1) and an AlxInyGa1-x-yN layer (where 0<x<=y<1, 0<x+y<1) in which a band gap is smaller than the barrier layers611to61nand610. The 1stbarrier layer611to the nthbarrier layer61nincluded in the active layer60are hereinafter named generically, and are called “barrier layer61”. Moreover, all the well layers included in the active layer60are named generically, and are called “well layer62”.

The film thickness of the final barrier layer610of the top layer of the above-mentioned layered structure may be formed more thickly than the thickness of other barrier layers (the 1stbarrier layer611to the nthbarrier layer61n) included in the layered structure except the final barrier layer610.

In the semiconductor light emitting device shown inFIG. 16, the concentration of a p-type dopant of the final barrier layer610gradually decreases along to the thickness direction of the final barrier layer610from the first principal surface of the final barrier layer610which contacts the p-type semiconductor layer80, and a p-type dopant does not exist in the second principal surface that opposes the first principal surface.

The sapphire substrate of c-plane (0001) and 0.25 degree off, etc. are adoptable as the substrate10, for example. The n-type semiconductor layer25, the active layer60, and the p-type semiconductor layer80are composed of an AlGaN layer, respectively, and the buffer layer16, the n-type nitride based semiconductor layer2, the n-type contact layer19, the active layer60, and the p-type semiconductor layer80are laminated one after another on the substrate10.

The buffer layer16is formed by an AlN layer about 10 angstrom to 50 angstrom thick, for example. When performing crystal growth of the AlN buffer layer16, for example, it is made to grow up in the high temperature of a temperature span (about 900 degrees C. to 950 degrees C.).

By supplying trimethyl aluminum (TMA) and ammonia (NH3) to a reaction chamber by applying H2 gas as a carrier, it can form being able to grow up thin AlN buffer layer16about 10 to 50 angstrom thick at high speed, and crystal quality also is keeping satisfactory.

The n-type semiconductor layer25includes the n-type nitride based semiconductor layer2and the n-type contact layer19, as shown inFIG. 16. The n-type nitride based semiconductor layer2is placed on the AlN buffer layer16, and is composed of an AlxGa1-xN layer (where 0<x<1) by which impurities doping of the n-type impurity is performed. The n-type contact layer19is placed on the n-type nitride based semiconductor layer2, and is composed of an AlxGa1-xN layer (where 0<x<1) by which impurities doping of the n-type impurity is performed.

The impurities doping of the n-type impurities, such as silicon (Si), is performed at the n-type nitride based semiconductor layer2, and the film thickness is about 1 to 6 micrometers, for example.

The n-type nitride based semiconductor layer2supplies an electron to the active layer60, and the p-type semiconductor layer80supplies a hole to the active layer60. When the electron and the hole which are supplied recombine by the active layer60, the light is generated.

According to the semiconductor light emitting device according to the second embodiment, since the AlxGa1-xN layer (where 0<x<1) which has a lattice constant comparatively near the AlN layer is formed on high temperature AlN buffer layer16, the crystal quality of the n-type semiconductor layer25and surface morphology can be improved, and the transparency over the luminous wavelength can be improved.

The active layer60is the MQW structure of having the 1stwell layer621to the nthwell layer62n, as shown inFIG. 16(where n is natural number). The 1stwell layer621to the nthwell layer62nare composed of an AlxInyGa1-x-yN layer (where 0<x<=y<1, 0<x+y<1) inserted, respectively by the 1stbarrier layer611to the nthbarrier layer61nand the final barrier layer610composed of an AlxGa1-xN layer (where 0<x<1). That is, the active layer60applies quantum well structure to unit pair structure, and has n pair structure which laminated this unit pair structure n times. The quantum well structure is inserted in the shape of sandwiches by the barrier layer61composed of an AlxGa1-xN layer with a greater band gap (where 0<x<1) than the well layer62with the well layer62composed of an AlxInyGa1-x-yN layer (where 0<x<=y<1, 0<x+y<1).

More specifically, the 1stwell layer621is placed between the 1stbarrier layer611and the 2ndbarrier layer612, and the 2ndwell layer622is placed between the 2ndbarrier layer612and the 3rdbarrier layer613. And the nthwell layer62nis placed between the nthbarrier layer61nand the final barrier layer610. The 1stbarrier layer611of the active layer60is placed through the n-type contact layer19on the n-type nitride based semiconductor layer2, and the p-type semiconductor layer80(21,22, and41to44) is placed on the final barrier layer610of the active layer60.

Moreover, the impurities doping of the n-type impurity may be performed through all at the 1stwell layer621to the nthwell layer62n. The 1stwell layer621to the nthwell layer62nare composed of the 1stbarrier layer611to the nthbarrier layer61ncomposed of an AlxGa1-xN layer (where 0<x<1), and an AlxInyGa1-x-yN layer (where 0<x<=y<1, 0<x+y<1) inserted respectively by the 1stbarrier layer611to the nthbarrier layer61n, and the final barrier layer610. For example, the impurities doping of the Si atom may be performed about 5×1016as an n-type impurity, for example.

The number of pairs of the MQW layer is characterized by being 2 to 8, for example. In addition, the ratio {y/(1-x-y)} of indium (In) of the well layers621to62nis suitably set up according to the wavelength of light to be generated.

For example, the composition ratio y of In is about 0.15, and the composition ratio of Al is about 0.01 to about 0.1, for example.

The thickness of the well layer621to62nis about 2 to 3 nm (preferable about 2.8 nm), for example, and the thickness of the barrier layers611to61nis about 7 to 18 nm (preferable about 16.5 nm).

In the semiconductor light emitting device according to the second embodiment, the number of MQW pairs in the active layer60for the electron supplied from the n-type semiconductor layer25and the hole supplied from the p-type semiconductor layer80to recombine efficiently in the active layer60can be optimized.

In the semiconductor light emitting device according to the second embodiment, since it has the well layer62composed of the AlxInyGa1-x-yN layer (where 0<x<=y<1, 0<x+y<1), and the barrier layer61composed of the AlxGa1-xN layer (where 0<x<1) with a greater band gap than the AlxInyGa1-x-yN layer (where 0<x<=y<1, 0<x+y<1) as the active layer60, the transparency over the luminous wavelength can be improved and the tolerance over the heat damage toward a subsequent high temperature process can be improved.

The film thickness of the final barrier layer610is formed more thickly than the diffusion length of Mg from the p-type semiconductor layer80to the active layer60.

In the semiconductor light emitting device shown inFIG. 16, the concentration of the p-type impurity of the final barrier layer610gradually decreases along to the thickness direction of the final barrier layer610from the first principal surface of the final barrier layer610which contacts the p-type semiconductor layer80, and the p-type impurity does not exist in the second principal surface that opposes the first principal surface substantively.

The film thickness d0of the final barrier layer610of the semiconductor light emitting device shown inFIG. 11is set up as that the p-type impurity diffused in the active layer60from the p-type semiconductor layer80may not reach the well layer62of the active layer60after the formation process of the p-type semiconductor layer80and its process. That is, the film thickness d0is set as the thickness which the p-type impurity diffused in the final barrier layer610from the p-type semiconductor layer80does not reach to the second principal surface (surface where the final barrier layer610contacts well layer62n) that opposes the first principal surface of the final barrier layer610which contacts the p-type semiconductor layer80.

The Mg concentration in the first principal surface of the final barrier layer610which contacts the p-type semiconductor layer80is, for example about 2×1020cm−3, the Mg concentration reduces gradually toward the second principal surface of the final barrier layer610which opposes the first principal surface, and the Mg concentration does not have influence of less than about 1016cm−3in a position with a distance of about 7 to 8 nm from the first principal surface, thereby becoming not more than the minimum limit of detection community in analysis.

That is, Mg does not diffuse to the second principal surface of the final barrier layer610by applying the film thickness d0of the final barrier layer610about 10 nm, and therefore, Mg does not exist in the second principal surface of the final barrier layer610which contacts the active layer60. That is, Mg is not spread in the nthwell layer62n, thereby the reduction of the luminance of the light generated in the active layer60is prevented.

In addition, the film thickness d1to dn of the 1stbarrier layer611to the nthbarrier layer61nmay be the same. However, the hole injected into the active layer60from the n-type semiconductor layer25needs to reach the nthwell layer62n, and it is necessary to set the film thickness d1to dn as the thickness which the electron and luminescence by the recombination of a hole may generate in the nthwell layer62n. It is because displacement of the hole in the inside of the active layer60is prevented and the luminous efficiency is reduced, if the film thickness d1to dn of the 1stbarrier layer611to the nthbarrier layer61nis too thick. For example, the film thickness d0of the final barrier layer610is about 10 nm, the film thickness d1to dn of the 1stbarrier layer611to the nthbarrier layer61nis about 7 to 18 nm, and the film thickness of the 1stwell layer621to the nthwell layer62nis about 2 to 3 nm.

As mentioned above, in the semiconductor light emitting device according to the second embodiment, the film thickness d0of the final barrier layer610which contacts the p-type semiconductor layer80is set as the thickness to which the p-type impurity diffused in the active layer60from the p-type semiconductor layer80does not reach the well layer62of the active layer60. That is, the diffusion of the p-type impurity from the p-type semiconductor layer80to the well layer62of the active layer60can be prevented, controlling increase of the film thickness of the whole of the active layer60by setting up more thickly than the diffusion length of Mg the film thickness d0of the final barrier layer610, according to the semiconductor light emitting device shown inFIG. 16. As a result, the reduction of the luminance of the light resulting from the diffusion of the p-type impurity to the well layer62does not occur, thereby the semiconductor light emitting device by which degradation of the quality of the semiconductor light emitting device is controlled can be fabricated.

The p-type semiconductor layer80is formed of the AlxGa1-xN layer (where 0<=x<1) of about 0.05 micrometer to 1 micrometer of film thickness, which performed impurities doping of the p-type impurity. As the p-type impurity, it is usable in magnesium (Mg), zinc (Zn), cadmium (Cd), calcium (Ca), beryllium (Be), carbon (C), etc.

The configuration example of the p-type semiconductor layer80is as follows in detail. That is, the p-type semiconductor layer80includes the electron barrier layer21, the electron cap layer22, the first nitride based semiconductor layer81, the second nitride based semiconductor layer82, the third nitride based semiconductor layer83, and the fourth nitride based semiconductor layer84, as shown inFIG. 16. The electron barrier layer21is placed on the upper part of the active layer60, and is composed of an AlxGa1-xN layer (where 0<=x<1) doped with the p-type impurity. The electron cap layer22is placed on the electron barrier layer21, and is composed of an AlxGa1-xN layer (where 0<=x<1) doped with the p-type impurity. The first nitride based semiconductor layer81is placed on the electron cap layer22, and is composed of an AlxGa1-xN layer (where 0<=x<1) by which impurities doping of the p-type impurity is performed. The second nitride based semiconductor layer82is placed on the first nitride based semiconductor layer81, and is composed of an AlxGa1-xN layer (where 0<=x<1) doped with the low-concentration p-type impurity rather than the p-type impurity of the first nitride based semiconductor layer81. The third nitride based semiconductor layer83is placed on the second nitride based semiconductor layer82, and is composed of an AlxGa1-xN layer (where 0<=x<1) doped with the high-concentration p-type impurity rather than the p-type impurity of the second nitride based semiconductor layer82. The fourth nitride based semiconductor layer84is placed on the third nitride based semiconductor layer83, and is composed of an AlxGa1-xN layer (where 0<=x<1) doped with the low-concentration p-type impurity rather than the p-type impurity of the third nitride based semiconductor layer83.

The thickness of the second nitride based semiconductor layer82is formed more thickly than the thickness of the first nitride based semiconductor layer81or the thickness of the third nitride based semiconductor layer83to the fourth nitride based semiconductor layer84.

At this point, the material and the thickness of each layer are specifically explained. The first nitride based semiconductor layer81which is placed in the upper part of the active layer60, and doped with the p-type impurity is formed, for example by a p-type AlxGa1-xN layer (where 0<=x<1) about 40 nm thick in Mg by about 1.3×1020cm−3by which impurities doping is performed.

The second nitride based semiconductor layer82which is placed on the first nitride based semiconductor layer81, and doped with the low-concentration p-type impurity rather than the p-type impurity of the first nitride based semiconductor layer81is formed, for example by a p-type AlxGa1-xN layer (where 0<=x<1) about 90 nm thick in Mg by about 2.7×1019cm−3by which impurities doping is performed.

The third nitride based semiconductor layer83which is placed on the second nitride based semiconductor layer82, and doped with the high-concentration p-type impurity rather than the p-type impurity of the second nitride based semiconductor layer82is formed, for example by a p-type AlxGa1-xN layer (where 0<=x<1) about 20 nm thick in Mg by about 1.2×1020cm−3by which impurities doping is performed.

The fourth nitride based semiconductor layer84which is placed on the third nitride based semiconductor layer83, and doped with the low-concentration p-type impurity rather than the p-type impurity of the third nitride based semiconductor layer83is formed, for example by a p-type AlxGa1-xN layer (where 0<=x<1) about 5 nm thick in Mg by less than about 5×1019cm−3by which impurities doping is performed. The fourth nitride based semiconductor layer84functions as a p-type contact layer.

In the semiconductor light emitting device according to the second embodiment, the p-type semiconductor layer80formed on the active layer60is composed of the p-type AlxGa1-xN layers (where 0<=x<1) of 4 tiered structure from which Mg concentration differs, as mentioned above, and is doped with the above-mentioned concentration. The p-type AlxGa1-xN (where 0<=x<1) layer grows at low temperature about 800 degrees C. to 900 degrees C. in order to reduce the heat damage to the active layer60.

Since light emitting power becomes high so that Mg concentration is high, the first nitride based semiconductor layer81nearest to the active layer60is so preferable that Mg concentration is high.

As for the second nitride based semiconductor layer82, since the crystal defect resulting from Mg increases and membranous resistance becomes high if it performs impurities doping of Mg too much, it is preferable that the Mg concentration is about the middle of the level of 1019cm−3.

Since the third nitride based semiconductor layer83is a layer which determines the amount of hole injections to the active layer60, its Mg concentration slightly higher than the second nitride based semiconductor layer82is preferable.

As shown inFIG. 17, the fourth nitride based semiconductor layer84is the p-type AlGaN layer for reserving ohmic contact with the transparent electrode15, and is made depletion substantially. As the transparent electrode15, when the ZnO electrode by which impurities doping of Ga or Al is performed about 1×1019to 5×1021cm−3is used, the impurities doping of Mg is performed at the fourth nitride based semiconductor layer84, for example so that it may become the Mg concentration at the time when most reducing the forward voltage Vfof the semiconductor light emitting device.

When growing up two layers of the p-type AlxGa1-xN layers (where 0<=x<1), since the third nitride based semiconductor layer83and the fourth nitride based semiconductor layer84near the p-side electrode100need to raise the hole concentration in the film, they increase H2gas volume in the carrier gas. Moreover, the first nitride based semiconductor layer81and the second nitride based semiconductor layer82near the active layer60do not have to increase the H2gas volume in the carrier gas, and are made to perform crystal growth by the extension into which the active layer60is grown up by the N2carrier gas. When growing up these p-type AlxGa1-xN layers (where 0<=x<1), the way which made the V/III ratio as high as possible can grow up the film which is lower resistance, and can drop the forward voltage (Vf) of the light emitting device.

According to the semiconductor light emitting device according to the second embodiment, by forming the p-type semiconductor layer at low temperature, reducing the heat damage to the active layer and forming the p-type semiconductor layer rather than the GaN layer by the large AlxGa1-xN layer (where 0<=x<1) of the band gap, the transparency over the luminous wavelength is improved, and the forward voltage (Vf) can be reduced and the luminous efficiency can be improved.

The semiconductor light emitting device according to the second embodiment further includes an n-side electrode200which apply voltage to the n-type semiconductor layer25, and a p-side electrode100which applies voltage to the p-type semiconductor layer80, as shown inFIG. 17andFIG. 18. As shown inFIG. 17, the n-side electrode200is placed on the surface of the p-type semiconductor layer80, the active layer60, and the n-type contact layer19that performed the mesa etching of the partial region of the n-type contact layer19, and is exposed.

The p-side electrode100is placed through the transparent electrode15on the p-type semiconductor layer80. Or again, the p-side electrode100may be directly placed on the p-type semiconductor layer80. Or again, the p-side electrode100may be placed on an opening which opening a window toward the transparent electrode15.

The transparent electrode15placed on the fourth nitride based semiconductor layer84includes either of the ZnO, ITO, or ZnO containing indium, for example.

The p-side electrode100is composed, for example of a multilayer film of Al film, palladium (Pd)-gold (Au) alloy film, Ni/Ti/Au film, Ti/Au/Ti/Au film, Ti/Au/NI/Ti/Ni/Au film, Ti/Ni/Au/Ti/Ni/Au film, or Au—Sn/Ti/Au film, Au—Sn/Au film, Au—Sn/Au/Ti/Au/Ti film, Au—Sn/Au/Ni/Ti/Ni/Au/Ti film, and Au—Sn/Au/Ni/Ti/Au/Ni/Ti film from the upper layer. And ohmic contact of the n-side electrode200is performed to the n-type semiconductor layer25, and ohmic contact of the p-side electrode100is performed to the p-type semiconductor layer80through the transparent electrode15, respectively.

InFIG. 19, in order that the semiconductor light emitting device according to the second embodiment is mounted on flip chip structure, by forming an n-side electrode300further on the n-side electrode200, the surface of the p-side electrode100and the surface of the n-side electrode300are formed so that the height measured from the substrate10may constitute the substantially same height.

The structure ofFIG. 19forms the transparent conducting film ZnO as the transparent electrode15, and is provided with a structure, which wraps this ZnO by the reflective stacked film28. The reflective stacked film28reflects toward the wavelength of the light, which emits.

Moreover, it may provide a structure, which covers the transparent electrode15with an insulating film, and wraps the insulating film by the reflective stacked film28, which reflects toward the wavelength λ of the light, which emits.

The reflective stacked film28has the layered structure of λ/4n1and λ/4n2(where n1and n2are refractive indices of a layer to laminate). As a material used for layered structure, the layered structure composed of ZrO2(n=2.12) and SiO2(n=1.46) can be used, for example toward λ=450 nm blue light. The thickness of each layer in this case sets ZrO2to about 53 nm, and sets SiO2to about 77 nm, for example. TiO2, Al2O3, etc. can also be used as other materials for forming the layered structure.

According to the semiconductor light emitting device according to the second embodiment, since the light which emitted light within the active layer30by the reflective stacked film28can be extracted from the substrate10side external, without being absorbed by the p-side electrode100, outward luminous efficiency can be improved.

The flip chip structure become the path which extracts the light from the AlGaN layer side to the external through the sapphire substrate10is effective at the point which may improve in particular outward luminous efficiency. By creating the substrate in which the protective film18in which refractive indices differ partially is formed to up to the different species substrate10, growing the AlGaN layer epitaxially to the above-mentioned substrate10on this, and forming the light emitting device, unevenness can be formed on the interface between the epitaxial growth layer and the substrate, dispersion and diffraction of light occur, and optical extraction efficiency can be improved.

According to the semiconductor light emitting device according to the second embodiment, since dope Al to the n-type semiconductor layer25, the active layer60, and the p-type semiconductor layer80, and a heat damage is decreased and the transparency over the luminous wavelength is improved and the light which emits within the active layer60by the reflective stacked film28can be extracted external without being absorbed by the p-side electrode100, the outward luminous efficiency can be improved.

Hereinafter, an example of the fabrication method of the semiconductor light emitting device shown inFIG. 16according to the second embodiment will be explained. In addition, the fabrication method of the semiconductor light emitting device described in the following is an example, and, of course, it can achieve with various fabrication methods except this method, including this modified example. Here, an example, which applies the sapphire substrate to the substrate10, will be explained.

(a) First of all, grow up the AlN buffer layer16on the sapphire substrate10exposed by the MOCVD (Metal Organic Chemical Vapor Deposition) method etc., which are well known. For example, by supplying trimethyl aluminum (TMA) and ammonia (NH3) to a reaction chamber by applying H2gas as a carrier in high temperature (about 900 degrees C. to about 950 degrees C.), thin AlN buffer layer16about 10 to 50 angstrom thick is grown up for a short time.
(b) Next, grow up the n-type nitride based semiconductor layer2by which the impurities doping of the n-type impurity is performed on the AlN buffer layer16by the MOCVD method etc. For example, after performing thermal cleaning of the substrate10in which the AlN buffer layer16is formed, the substrate temperature is set as the about 1000 degrees C., and about 1 to 5 micrometers of the n-type nitride based semiconductor layers2composed of the AlxGa1-xN layer (where 0<x<1) which performs the impurities doping of the n-type impurity are grown up on the AlN buffer layer16. In the n-type nitride based semiconductor layer2, the impurities are doped with Si by about 3×1018cm−3concentration, for example as the n-type impurity. When performing the impurities doping of the Si, trimethylgallium (TMG), ammonia (NH3), and Silane (SiH4) are supplied as material gas, and then the n-type AlxGa1-xN layer (where 0<x<1) is formed.
(c) Next, form about 1550 nm of n-type contact layer19on the n-type nitride based semiconductor layer2, for example. In the n-type contact layer19, the impurities are doped with Si by about 3×1018cm−3concentration, for example as the n-type impurity.
(d) Next, form the active layer60on the n-type semiconductor layer25(2,19). For example, the barrier layer61composed of the AlxGa1-xN layer (where 0<x<1), and the well layer62composed of the AlxInyGa1-x-yN layer (where 0<x<=y<1, 0<x+y<1) are laminated by turns, and then the active layer60is formed. More specifically, adjusting the substrate temperature and the flow rate of material gas at the time of forming the active layer60, the barrier layer61and the well layer62are grown up continuously by turns, and the active layer60which the barrier layer61and the well layer62laminate is formed. That is, the process of laminating the well layer62and the barrier layer61with a larger band gap than the well layer62is applied a unit process by adjusting substrate temperature and the flow rate of material gas, and this unit process is repeated n times (for example, about 8 times), and the layered structure which the barrier layer61and the well layer62laminate by turns is obtained.

When forming the barrier layer61, TMG gas, TMA gas, and NH3gas are supplied to a processing unit for film formation as the material gas, respectively, for example. On the other hand, when forming the well layer62, TMG gas, TMA gas, trimethylindium (TMI) gas, and NH3gas are supplied to the processing unit as material gas, respectively, for example. In addition, TMG gas is supplied as the material gas of a Ga atom, TMI gas is supplied as the material gas of In atom, TMA gas is supplied as the material gas of Al atom, and NH3gas is supplied as the material gas of a nitrogen atom.

On the formed layered structure, about 10 nm of the AlxGa1-xN layer (where 0<x<1) non-doped as the final barrier layer610are formed, and the active layer60shown inFIG. 16orFIG. 17is formed. As already explained above, the film thickness d0of the final barrier layer610is set as the thickness to which the p-type dopant diffused in the active layer60from the p-type semiconductor layer80does not reach the well layer62of the active layer60.

(e) Next, the substrate temperature is set to 800 degrees C. to degree 900 degrees C., and form about 0.05 to 1 micrometer of p-type semiconductor layers80which performed impurities doping of the p-type impurity on the final barrier layer610.

When performing impurities doping of Mg as the p-type impurity, TMG gas, TMA gas, NH3gas, and bis(cyclopentadienyl) magnesium (Cp2Mg) gas are supplied as material gas, and the p-type semiconductor layer80(21,22and81-84) is formed. Mg is prevented from being spread in the well layer62of the active layer60by the final barrier layer610although Mg is spread in the active layer60from the p-type semiconductor layer80at the time of formation of the p-type semiconductor layer80.

(f) Next, form the transparent electrode15on the upper part of the p-type semiconductor layer80by vacuum evaporation, sputtering technology, etc. As the transparent electrode15, either of the ZnO, ITO, or ZnO containing indium can be used, for example. Furthermore, it may perform impurities doping of the n-type impurities, such as Ga or Al, at high concentration to about 1×1019to 5×1021cm−3.
(i) Next, form the reflective stacked film28reflected toward the wavelength λ of the light, which emits so that the transparent electrode15may be covered by vacuum evaporation, sputtering technology, etc. after patterning the transparent electrode15.
(h) Next, perform and remove mesa etching even of the halfway of the reflective stacked film28and the p-type semiconductor layer80to the n-type semiconductor layer25by using etching technology, such as RIE (Reactive Ion Etching), and expose the surface of the n-type contact layer19.
(i) Next, form the n-side electrodes200and300on the surface of the exposed n-type contact layer19by vacuum evaporation, sputtering technology, etc. Also toward the transparent electrode15on the p-type semiconductor layer80, the p-side electrode100is formed by vacuumed vaporation, sputtering technology, etc. after the pattern formation, and the semiconductor light emitting device shown inFIG. 17orFIG. 19is completed.

Modified Example

As a modified example of the second embodiment, the structure composed of the electron barrier layer21, the electron cap layer22, the third nitride based semiconductor layer83, and the fourth nitride based semiconductor layer84may be provided as the p-type semiconductor layer80placed on the upper part of the active layer60. The electron barrier layer21is placed on the upper part of the active layer60, and is composed of an AlxGa1-xN layer (where 0<=x<1) by which the impurities doping of the p-type impurity is performed. The electron cap layer22is placed on the electron barrier layer21, and is composed of an AlxGa1-xN layer (where 0<=x<1) by which the impurities doping of the p-type impurity is performed. The third nitride based semiconductor layer83is placed on the electron cap layer22, and doped with the p-type impurity. The fourth nitride based semiconductor layer84is placed on the third nitride based semiconductor layer83, and doped with a low-concentration p-type impurity rather than the p-type impurity of the third nitride based semiconductor layer83.

The third nitride based semiconductor layer83is formed, for example by the p-type AlxGa1-xN layer (where 0<=x<1) about 20 nm thick at about 1.2×1020cm−3by which the impurities doping of Mg is performed.

The fourth nitride based semiconductor layer84that is placed on the third nitride based semiconductor layer83, and doped with a low-concentration p-type impurity rather than the p-type impurity of the third nitride based semiconductor layer83is formed, for example by the p-type AlxGa1-xN layer (where 0<=x<1) about 5 nm thick at less than about 5×1019cm−3by which the impurities doping of Mg is performed.

In the semiconductor light emitting device according to the modified example of the second embodiment, the p-type semiconductor layer80formed on the active layer60is composed of the p-type AlxGa1-xN layer (where 0<=x<1) of the structure where Mg concentration differs, as mentioned above, and is doped with the above-mentioned concentration. The p-type AlxGa1-xN layer (where 0<=x<1) grows at low temperature about 800 degrees C. to 900 degrees C. in order to reduce the heat damage to the active layer60.

Since the third nitride based semiconductor layer83is a layer which determines the amount of hole injections to the active layer60, the light emitting power becomes high, so that the Mg concentration is high. For this reason, Mg concentration is so preferable that it is high.

The fourth nitride based semiconductor layer84is a p-type AlxGa1-xN layer (where 0<=x<1) for reserving ohmic contact with the transparent electrode15, and is made depletion substantially. For example, when the ZnO electrode by which impurities doping of Ga or Al is performed about 1×1019to 5×1021cm−3is used as the transparent electrode15, the impurities doping of Mg is performed at the fourth nitride based semiconductor layer84so that it may become Mg concentration at the time when dropping most the forward voltage Vfof the semiconductor light emitting device.

Also in the semiconductor light emitting device according to the modified example of the second embodiment, since the AlN buffer layer16, the n-type semiconductor layer25, the active layer60, the p-type semiconductor layer80(20,21,83,84), the final barrier layer610, the reflective stacked film28, and the electrode structure are the same as that of the semiconductor light emitting device according to the second embodiment, the description is omitted.

According to the semiconductor light emitting device according to the second embodiment and its modified example, the semiconductor light emitting device and a fabrication method for the semiconductor light emitting device which is doped with Al in all the layers of the n-type semiconductor layer, the active layer, and the p-type semiconductor layer, decreases the heat damage, and improves the transparency over the luminous wavelength, and whose the outward luminous efficiency is improved, can be provided.

Third Embodiment

A semiconductor light emitting device according to a third embodiment of the present invention includes a substrate10, a protective film18, an AlN buffer layer16, an n-type semiconductor layer25, an active layer60, and a p-type semiconductor layer80, as shown inFIG. 20. The protective film18is placed on the substrate10. The AlN buffer layer16is placed on the substrate10pinched by the protective film18. The n-type semiconductor layer25is placed on the AlN buffer layer16and the protective film18, and is composed of an AlxGa1-xN layer (where 0<x<1) by which the impurities doping of the n-type impurity is performed. The active layer60is placed on the n type semiconductor layer25, and is composed of a MQW having a layered structure by which the well layer composed of a barrier layer composed of an AlxGa1-xN layer (where 0<x<1) and an AlxInyGa1-x-yN layer (where 0<x<=y<1, 0<x+y<1) in which a band gap is smaller than the barrier layer is placed by turns. The p-type semiconductor layer80is placed on the active layer60, and is composed of an AlxGa1-xN layer (where 0<=x<1) by which impurities doping of the p-type impurity is performed.

The active layer60has a layered structure by which the barrier layer611to61n,610, and the well layer621to62nare placed by turns, as shown inFIG. 20. The barrier layer611to61n, and610are composed of an AlxGa1-xN layer (where 0<x<1). The well layer621to62nare composed of an AlxInyGa1-x-yN layer (where 0<x<=y<1, 0<x+y<1) in which a band gap is smaller than the barrier layer611to61nand610.

The semiconductor light emitting device according to the third embodiment further includes an n-side electrode200which apply voltage to the n-type semiconductor layer25, and a p-side electrode100which applies voltage to the p-type semiconductor layer80, as shown inFIG. 21. As shown inFIG. 21, the n-side electrode200is placed on the surface of the p-type semiconductor layer80, the active layer60, and the n-type contact layer19that performed the mesa etching of the partial region of the n-type contact layer19and is exposed.

InFIG. 22, in order that the semiconductor light emitting device according to the third embodiment is mounted on flip chip structure, by forming an n-side electrode300further on the n-side electrode200, the surface of the p-side electrode100and the surface of the n-side electrode300are formed so that the height measured from the substrate10may constitute the substantially same height.

The structure ofFIG. 22forms the transparent conducting film ZnO as the transparent electrode15, and is provided with a structure, which wraps this ZnO by the reflective stacked film28. The reflective stacked film28reflects toward the wavelength of the light, which emits.

Moreover, it may provide a structure, which covers the transparent electrode15with an insulating film, and wraps the insulating film by the reflective stacked film28, which reflects toward the wavelength λ of the light, which emits.

A fabrication method of the semiconductor light emitting device according to the third embodiment includes: a process of forming a protective film on a substrate; a process of forming an AlN buffer layer on the substrate pinched by the protective film; a process of forming an n-type semiconductor layer composed of an AlxGa1-xN layer (where 0<x<1) by which impurities doping of an n-type impurity is performed, on the AlN buffer layer and the protective film; a process of forming the active layer composed of a MQW having a layered structure formed of a barrier layer composed of an AlxGa1-xN layer (where 0<x<1) and a well layer composed of an AlxInyGa1-x-yN layer (where 0<x<=y<1, 0<x+y<1) in which a band gap is smaller than the barrier layer by turns, on the n-type semiconductor layer; and a process of forming the p type semiconductor layer composed of an AlxGa1-xN layer (where 0<=x<1) by which the impurities doping of a p-type impurity is performed, on the active layer.

According to the semiconductor light emitting device according to the third embodiment, the semiconductor light emitting device and a fabrication method for the semiconductor light emitting device which is doped with Al in all the layers of the n-type semiconductor layer, the active layer, and the p-type semiconductor layer, decreases the heat damage, and improves the transparency over the luminous wavelength, and whose the outward luminous efficiency is improved, can be provided.

Other Embodiments

While the present invention is described in accordance with the aforementioned first through third embodiments and those modified examples, it should not be understood that the description and drawings that configure part of this disclosure are to limit the present invention. This disclosure makes clear a variety of alternative embodiments, working examples, and operational techniques for those skilled in the art.

Accordingly, the technical scope of the present invention is defined by the claims that appear appropriate from the above explanation, as well as by the spirit of the invention. Various modifications will become possible for those skilled in the art after receiving the teachings of the present disclosure without departing from the scope thereof.

In description of the already described embodiments, although the example of the active layer30composed of the MQW which has the layered structure by which the barrier layer31composed of an AlxGa1-xN layer (where 0<x<1) and the well layer32composed of an AlxInyGa1-x-yN layer (where 0<x<=y<1, 0<x+y<1) in which the band gap is smaller than the barrier layer31is placed by turns is shown, it may be the structure which applied thicker than the diffusion length of Mg to the film thickness d0of the final barrier layer310placed between the well layer32and the p-type semiconductor layer40, including the one well layer32which the active layer30composed of the AlxInyGa1-x-yN layer (where 0<x<=y<1, 0<x+y<1).

Thus, the present invention includes various embodiments etc., which have not been described in this specification.

INDUSTRIAL APPLICABILITY

The semiconductor light emitting device of the present invention is available in whole nitride based semiconductor elements, such as an LED element, an LD element, etc. provided with the quantum well structure.