Semiconductor device including uneven contact in passivation layer and method of manufacturing the same

Provided is a semiconductor device including a substrate, a passivation layer, and a connector. The passivation layer is disposed on the substrate. The connector is embedded in the passivation. An interface of the connector in contact with the passivation layer is uneven, thereby improving the structural stability of the connector. A method of manufacturing the semiconductor is also provided.

BACKGROUND OF THE INVENTION

Field of the Invention

The present invention relates to a semiconductor device and a method of manufacturing the same.

Description of Related Art

Recently, the continuous increase in the integration of various electronic components (e.g., transistors, diodes, resistors, capacitors, and so on) leads to the rapid growth of the semiconductor industry. The increase in the integration mostly results from the continuous reduction of the minimum feature size, so that more components can be integrated into a given area.

In the conventional technology, the bonding pads under the conductive wires are often pulled out of the substrate due to the pulling force of the wire bonding process, thereby reducing the yield. Therefore, how to prevent the bonding pads from being pulled out of the substrate and improve the yield will become an important issue in the future.

SUMMARY OF THE INVENTION

The invention provides a semiconductor device and a method of manufacturing the same in which the connector is embedded in the passivation layer and the interface of the connector in contact with the passivation layer is uneven, thereby improve the structural stability of the connector.

The invention provides a semiconductor device including a substrate, a passivation layer, and a connector. The passivation layer is disposed on the substrate. The connector is embedded in the passivation. An interface of the connector in contact with the passivation layer is uneven.

The invention provides a method of manufacturing a semiconductor device including: providing a substrate; forming a passivation layer on the substrate by a first 3D printing technology, wherein the passivation layer has an opening with an uneven sidewall; and forming a connector in the opening by a second 3D printing technology.

Based on the above, in the embodiment of the present invention, the connector is embedded in the passivation layer and the interface of the connector in contact with the passivation layer is uneven, thereby improving the structural stability of the connector. In the case, the adhesion between the connector and the substrate is enhanced, which is able to prevent the connector from being pulled out of the substrate after the bonding process, thereby improving the yield.

DESCRIPTION OF THE EMBODIMENTS

The invention is more blanketly described with reference to the figures of the present embodiments. However, the invention can also be implemented in various different forms, and is not limited to the embodiments in the present specification. The thicknesses of the layers and regions in the figures are enlarged for clarity. The same or similar reference numerals represent the same or similar devices and are not repeated in the following paragraphs.

FIG. 1AtoFIG. 1Care schematic cross-sectional views illustrating a manufacturing process of a semiconductor device according to an embodiment of the disclosure.FIG. 2AtoFIG. 2Care perspective views of the connector illustrated inFIG. 1Caccording to various embodiments, respectively.

Referring toFIG. 1, the present embodiment provides a method of manufacturing a semiconductor device includes following steps. First, a substrate101is provided. In the present embodiment, the substrate101may be a silicon substrate. InFIG. 1A, no device is disposed in the substrate101; however, the substrate101provided in the present embodiment may be equipped with active devices (e.g., a transistor, a diode, and so on), passive devices (e.g., a capacitor, an inductor, a resistor, and so on), or a combination thereof. In other embodiments, the substrate101may be equipped with logic devices, memory devices, or a combination thereof.

Next, a passivation layer102is formed on the substrate101by a first 3D printing technology. In an embodiment, the first 3D printing technology includes an ink jet printing process, an aerosol jet printing process, or a combination thereof. The aerosol jet printing process is taken as an example, wherein an aerosol jet deposition head is applied to form an annularly propagating jet constituted by an outer sheath flow and an inner aerosol-laden carrier flow. During the annular aerosol jet printing process, an aerosol stream of the to-be-deposited materials is concentrated and deposited onto a surface to be formed. Said step may be referred to as maskless mesoscale material deposition (M3D), i.e., the deposition step can be performed without using any mask.

In the present embodiment, as shown inFIG. 1A, the first 3D printing technology includes ejecting an insulation ink204onto the substrate101through a nozzle202of a 3D printing device. After that, a curing step is performed to cure the insulation ink204into a passivation layer102. In some embodiments, the curing step includes a photo-curing step or a thermal curing step. For example, the photo-curing step may be irradiating light with a wavelength of about 395 nm to 405 nm to cure the insulation ink204into the passivation layer102. In one embodiment, the simulation ink204includes a photo-curable material, a hydrophobic material, a polymer material, or a combination thereof. For example, the insulation ink204may be polydimethylsiloxane (PDMS), polyimide, or the like.

After the curing step, as shown inFIG. 1A, the passivation layer102has openings10. The openings10have uneven sidewalls. Specifically, in an embodiment, one of the openings10have a body portion12and a protrusion portion14. The protrusion portion14protrudes from the body portion12into the passivation layer102. In the cross-sectional direction, the protrusion portion14has a curved surface protruding from the body portion12to the passivation layer102. The protrusion portions14a,14bon both sides of each body portion12are staggered with each other in the Z direction to form a spiral shape surrounding the body portion12. In some embodiments, a ratio of a height10hof the opening10to a width14wof the protrusion portion14is 10:4 to 10:1. That is to say, in the present embodiment, the sidewalls of the openings10are intentionally formed to be uneven, thereby improving the structural stability of the connectors106(shown inFIG. 1C) subsequently formed. In alternative embodiments, since the passivation layer102is formed by the first 3D printing technology, the passivation layer102is integrally formed and continuously formed along the Z direction. To some extent, the height of the passivation layer102may be increased and the shape of the sidewall of the passivation layer102may be changed according to actual needs.

Referring toFIG. 1B, an adhesive layer104is formed on the bottom surfaces of the openings10through another 3D printing technology. The said 3D printing technology includes ejecting a self-assembled monolayer (SAM) ink214into the openings10through a nozzle212of a 3D printing device. In an embodiment, the adhesive layer104may be, for example, a self-assembled monolayer. A material of the self-assembled monolayer may include an organosilane-based material, such as chlorosilane molecules. It should be noted that the adhesive layer104may be used as a buffer layer to increase the adhesion between the subsequently formed connectors106(as shown inFIG. 1C) and the substrate101and prevent the stress of the subsequent bonding process from damaging the substrate101or the devices in the substrate101. In alternative embodiments, the step of forming the adhesive layer104may also be omitted.

Referring toFIG. 1C. the connectors106are formed in the openings10through a second 3D printing technology, thereby accomplishing a chip100. Specifically, a conductive ink224is ejected onto the adhesive layer104through a nozzle222of the 3D printing device, and a curing step is performed to form the connectors106. In the case, as shown inFIG. 1C, the connectors106are embedded in the passivation layer102and formed along the openings10, so that an interface of the connectors106in contact with the passivation layer102is uneven. In one embodiment, the conductive ink224includes a plurality of conductive particles. The conductive particles include a plurality of metal nanoparticles, such as silver nanoparticles, copper-silver nanoparticles, copper nanoparticles, or a combination thereof. In some embodiments, the connectors106are formed by the conductive particles which are tightly connected, so as to achieve the effect of uniform electrical conductivity. Unlike the electroplating process, the conductive particles in the connectors106of the embodiment directly contact the passivation layer102. That is, there is no seed layer or barrier layer between the connectors106and the passivation layer102. In addition, although a top surface of the connectors106shown inFIG. 1Cis lower than a top surface of the passivation layer102, the present invention is not limited thereto. In other embodiments, the top surface of the connectors106may be flush with the top surface of the passivation layer102.

It should be noted that, as shown inFIG. 1C, one of the connectors106includes a body portion M1and a protrusion portion P1. The body portion M1has a sidewall perpendicular to the substrate101. The protrusion portion P1protrudes outward from the side wall of the body portion M1. In some embodiments, a ratio of a height H of the body portion M1to a width W of the protrusion portion P1is 10:4 to 10:1. In other words, in the present embodiment, the interface of the connector106in contact with the passivation layer102is intentionally formed to be uneven, thereby improving the structural stability of the connector106. Specifically, the protrusion portion P1surrounds the sidewall of the body portion M1to form a spiral structure, as shown inFIG. 2A. However, the present invention is not limited to this. In another embodiment, the protruding portion P2may include a plurality of annular structures to surround the sidewall of the body portion M1respectively, thereby forming another connector206, as shown inFIG. 2B. In other embodiments, the protruding portion P3includes a plurality of protrusion structures to be individually distributed on the sidewall of the body portion M1, thereby forming the other connector306, as shown inFIG. 2C. The plurality of protrusion structures may be tapered (seeFIG. 2C) or arc-shaped (not shown) in the cross-sectional direction. The protrusion portions P1, P2, and P3shown in the aboveFIG. 2AtoFIG. 2Cmay form uneven surfaces in the cross-sectional direction to improve the structural stability of the connectors106,206, and306, and further improve the yield of the connectors106,206, and306in subsequent bonding processes.

FIG. 3is a schematic cross-sectional view of a semiconductor device according to a first embodiment of the disclosure.

In the present embodiment, a semiconductor device ofFIG. 3may be a package structure. Referring toFIG. 3, the chip100(or the substrate101) ofFIG. 1Cmay be electrically connected to a circuit substrate300through a flip-chip bonding. The said flip-chip bonding means that the chip100is connected to the circuit substrate300through a plurality of bumps302between the circuit substrate300and the chip100. In addition, an underfill304is used to fill in a space between the circuit substrate300and the chip100to encapsulate the bumps302. In the case, the connectors106and the bumps302being in contact with each other may be electrically connected to the circuit substrate300and the chip100(or the substrate101). That is, the connectors106in the present embodiment may be used as bonding pads in the flip-chip bonding process to withstand the pressure of the flip-chip bonding process. Further, although only one chip100is illustrated inFIG. 3, the present invention is not limited thereto. In other embodiments, the number and type of the chip100may be adjusted as needs.

FIG. 4is a schematic cross-sectional view of a semiconductor device according to a second embodiment of the disclosure.

In the present embodiment, a semiconductor device ofFIG. 4may be a package structure. Referring toFIG. 4, the chip100(or the substrate101) ofFIG. 1Cmay be electrically connected to the circuit substrate300by a wire bonding. The said wire bonding means connecting the circuit substrate300and the chip100through a plurality of conductive wires312. In addition, an encapsulant314may be formed to cover a portion of the upper surface of the circuit substrate300and the chip100and encapsulate the conductive wires312. In the case, the connectors106and conductive wires312in contact with each other may be electrically connect to the circuit substrate300and the chip100(or the substrate101). It should be noted that since the interface of the connectors106in contact with the passivation layer102is uneven, the structural stability of the connectors106may be improved to avoid the connectors106being pulled out of the substrate101due to the pulling force of the wire bonding process, thereby improving the yield. That is, the connectors106in the present embodiment may be used as wire bonding pads in the wire bonding process to withstand the pulling force in the wire bonding process.

The said connectors106are not only used as the bonding pads in the said bonding process, in alternative embodiments, the connectors106may also be used as conductive vias in a circuit structure. Please refer to the following paragraphs for details.

FIG. 5is a schematic cross-sectional view of a semiconductor device according to a third embodiment of the disclosure. Herein, the circuit layer shown in the embodiment may be a redistribution layer (RDL), but the present invention is not limited thereto. In other embodiments, the circuit layer may also be an interconnect in a back-end-of-line (BEOL) process, a circuit structure in a circuit board, or the like.

Referring toFIG. 5, a semiconductor device500of the third embodiment includes a substrate101, a pad112, a dielectric layer114, a first circuit layer116, a passivation layer102, an adhesive layer104, a connector106, and a second circuit layer118.

In detail, the pad112is disposed on the substrate101. In an embodiment, a material of the pad112includes a metal material, such as copper, aluminum, gold, silver, nickel, palladium, or a combination thereof. The dielectric layer114covers a sidewall and a portion of a top surface of the pad112, and exposes another portion of the top surface112tof the pad112. In an embodiment, a material of the dielectric layer114includes a dielectric material, such as silicon oxide, silicon nitride, silicon oxynitride, polyimide, or a combination thereof. In another embodiment, the dielectric layer114may be a single-layered structure, a two-layered structure, or a multi-layered structure. The first circuit layer116covers the portion of the top surface112tof the pad112, and extends from the pad112to cover a portion of the top surface of the dielectric layer114. In an embodiment, the first circuit layer116includes a plurality of conductive particles in contact with each other, and may be formed by a 3D printing technology. The conductive particles include a plurality of metal nano particles, such as silver nanoparticles, copper-silver nanoparticles, copper nanoparticles, or a combination thereof.

As shown inFIG. 5, the passivation layer102is disposed on the first circuit layer116and covers a portion of the top surface of the dielectric layer114and a portion of the top surface of the first circuit layer116. The connector106is embedded in the passivation layer102and have an uneven sidewall. The adhesive layer104may be optionally disposed between the connector106and the first circuit layer116to increase the adhesion between the connector106and the first circuit layer116. In addition, the first circuit layer116is disposed between the connector106and the substrate101, and the connector106is offset from the pad112. In the case, the electrical signal generated by the devices under the pad112may be transmitted to the connector106through the pad112and the first circuit layer116. The materials and formation methods of the passivation layer102, the adhesive layer104, and the connector106have been described in detail in the above paragraphs, and will not be repeated here.

As shown inFIG. 5, the second circuit layer118is disposed on the passivation layer102and the connector106. In one embodiment, the second circuit layer118includes a plurality of conductive particles in contact with each other, and may be formed by a 3D printing technology. The conductive particles include a plurality of metal nanoparticles, such as silver nanoparticles, copper-silver nanoparticles, copper nanoparticles, or a combination thereof. In the case, the connector106may be used as a conductive via to electrically connect the first circuit layer116and the second circuit layer118. In some embodiments, since the connector106and the second circuit layer118are both formed by the 3D printing technology, the connector106and the second circuit layer118are electrically connected by a plurality of conductive particles in contact with each other. In other words, the connector106and the second circuit layer118are in direct contact, and there is no obvious interface between the connector106and the second circuit layer118. Further, in the present embodiment, the interface of the connector106in contact with the passivation layer102is uneven, which can improve the structural stability of the connector106and increase the mechanical strength of the semiconductor device500.

In summary, in the present invention, the connector is embedded in the passivation layer and the interface of the connector in contact with the passivation layer is uneven, thereby improving the structural stability of the connector and the yield of the connector in the subsequent bonding process. In addition, the adhesive layer may be optionally disposed between the connector and the substrate to improve the adhesion there-between, thereby preventing the stress of the bonding process from damaging the devices in the substrate and preventing the connector from being pulled out of the substrate. Further, in the present invention, the connector may be formed by the 3D printing technology, so that the connector is integrally formed, thereby increasing the mechanical strength of the connector.