PROCESS FOR MANUFACTURING AN ELECTROLUMINESCENT DEVICE

A process for manufacturing an electroluminescent device, comprising: (a) using a stack comprising, successively: a substrate having a surface; matrix arrays of pixels formed on the surface of the substrate, of columnar shape; an encapsulating layer arranged to cover the matrix arrays of pixels; a dielectric layer formed on the encapsulating layer; (b) performing a directional etch along the normal to the surface of the substrate, of a portion of the dielectric layer extending between the pixels of the matrix arrays of pixels; the dielectric layer having a portion remaining at the end of step (b); and (c) performing a selective chemical etch of the remaining portion of the dielectric layer with a chemical etchant that permits selective etching of the remaining portion of the dielectric layer with respect to the encapsulating layer.

TECHNICAL FIELD

The invention relates to the technical field of the manufacture of electroluminescent devices.

The invention is in particular applicable to the manufacture of light-emitting diodes based on nanowires, in particular gallium nitride (GaN) nanowires.

PRIOR ART

A known prior-art process for manufacturing an electroluminescent device comprises the following steps:A) using a stack comprising, successively:a substrate, having a surface;matrix arrays of pixels formed on the surface of the substrate, the pixels having a columnar shape and extending along the normal to the surface of the substrate;an encapsulating layer arranged to cover the matrix arrays of pixels;a dielectric layer formed on the encapsulating layer;B) performing a plasma etch of the dielectric layer;C) forming a coloured resin on the encapsulating layer at the end of step B), the coloured resin being customized for filtration of an emission spectrum of an underlying pixel.

The encapsulating layer may be made of silicon nitride (Si3N4). The dielectric layer is generally made of silicon dioxide (SiO2).

Such a process of the prior art is not wholly satisfactory in that the strong bombardment with ionized gas in step B) is liable to cause significant degradation of the pixels. This degradation is all the more pronounced, the greater the aspect ratio (ratio between the height and width of the pixels) of the pixels. It has been found experimentally that the upper portion of the pixels can develop a slant at the end of step B).

Moreover, when the dielectric layer is made of silicon dioxide (SiO2), step B) is conventionally carried out using a fluorine-containing plasma, such as a carbon tetrafluoride (CF4) plasma. However, the etch depth is strongly dependent on the carbon/fluorine ratio of the plasma. Variation in the relative surface of the carbon mask can result in an “etch stop”, this undesirable phenomenon being all the more pronounced the greater the thickness of the dielectric layer to be etched.

SUMMARY OF THE INVENTION

The invention aims to fully or partially address the aforementioned drawbacks. To this end, the invention provides a process for manufacturing an electroluminescent device, comprising the following steps:a) using a stack comprising, successively:a substrate, having a surface;matrix arrays of pixels formed on the surface of the substrate, the pixels having a columnar shape and extending along the normal to the surface of the substrate;an encapsulating layer arranged to cover the matrix arrays of pixels;a dielectric layer formed on the encapsulating layer;b) performing a directional etch along the normal to the surface of the substrate, of a portion of the dielectric layer extending between the pixels of the matrix arrays of pixels; the dielectric layer having a portion remaining at the end of step b);c) performing a selective chemical etch of the remaining portion of the dielectric layer, step c) being carried out with a chemical etchant that permits selective etching of the remaining portion of the dielectric layer with respect to the encapsulating layer.

Such a process according to the invention accordingly makes it possible, by virtue of steps b) and c), to afford better protection to columnar pixels compared to the prior art. Specifically, the directional etch (e.g. plasma etch) carried out during step b) affects only inter-pixel areas. The upper portion of the pixels is protected from a possible strong ion bombardment, because the portion of the dielectric layer lying above the upper portion of the pixels is not etched during step b). Unlike bombardment with ionized gas, the selective chemical etch carried out during step c) makes it possible to etch the remaining portion of the dielectric layer without significantly affecting the upper portion of the pixels.

Moreover, the selective chemical etch carried out during step c) makes it possible to overcome the etch stop problems of the prior art associated with plasma etching when the dielectric layer has a high thickness (e.g. 8 μm to 10 μm).

The process according to the invention may comprise one or more of the following features.

According to one feature of the invention, the process includes a step d) of forming at least one coloured resin on the encapsulating layer at the end of step c), said at least one coloured resin being customized for filtration of an emission spectrum of an underlying pixel.

According to one feature of the invention:step b) is carried out with a photolithography mask having patterns arranged to face the pixels of the matrix arrays of pixels;step c) is preceded by a step c0) of removing the photolithography mask.

Thus, an advantage obtained is the protection of the upper portion of the pixels during step b). By virtue of the photolithography mask having patterns arranged to face the pixels of the matrix arrays of pixels, the portion of the dielectric layer lying above the upper portion of the pixels is not etched during step b).

According to one feature of the invention, step b) is preceded by the following steps:b01) forming a trench between adjacent matrix arrays of pixels that has a bottom wall and side walls;b02) depositing a barrier layer on the bottom wall and on the side walls, the barrier layer being made of a material selected according to the chemical etchant with which step c) is carried out, so as to obtain an etch stop layer during performance of step c).

Thus, an advantage obtained by a trench formed between two adjacent matrix arrays of pixels is to limit crosstalk effects. In addition, the barrier layer makes it possible to better control the extent of the selective (isotropic) chemical etch carried out during step c).

According to one feature of the invention, the chemical etchant with which step c) is carried out is vapour-phase hydrofluoric acid (HF).

Thus, an advantage obtained by vapour-phase hydrofluoric acid (HF) is that it is compatible, in terms of etch selectivity, with a plurality of materials, in particular aluminium (Al), alumina (Al2O3) and aluminium nitride (AlN), this affording a greater choice than wet etching for the materials of the barrier layer and the encapsulating layer.

According to one feature of the invention, the barrier layer deposited during step b02) is made of at least one material selected from aluminium (Al), alumina (Al2O3) and aluminium nitride (AlN).

According to one feature of the invention, step b) is preceded by a step b03) of filling the trench with tungsten (W) at the end of step b02).

Thus, an advantage obtained is to reinforce the mechanical strength of the trenches.

According to a feature of the invention, step b) is preceded by an initial directional etch along the normal to the surface of the substrate, of a surface portion of the dielectric layer so as to reach a position in the stack situated above the pixels of the matrix arrays of pixels at a distance from the encapsulating layer.

Thus, an advantage obtained is to limit the processing time for the selective chemical etch performed during step c), the surface portion of the dielectric layer already having been etched beforehand. Of course, the position reached at the end of the initial directional etch (e.g. plasma etch) must be a sufficient distance from the encapsulating layer so as not to damage the upper portion of the pixels by the strong bombardment with ionized gas.

According to one feature of the invention, the encapsulating layer of the stack used in step a) is made of at least one material selected from aluminium (Al), alumina (Al2O3) and aluminium nitride (AlN).

According to one feature of the invention, the dielectric layer of the stack used in step a) is made of silicon dioxide (SiO2).

Definitions

“Substrate” is understood to mean a self-supporting physical carrier made of a base material from which an electroluminescent device may be formed. A substrate may be a “wafer”, generally taking the form of a disc obtained by cutting an ingot of a crystalline material.

“Columnar shape” is understood to mean that the pixels all have an aspect ratio strictly greater than 1, preferably strictly greater than 2, more preferably strictly greater than 3. The aspect ratio is the ratio between the height (i.e. thickness) of the pixel and its width. The height (thickness) of the pixel is its dimension along the normal to the surface of the substrate. An example of structures having such a columnar shape may be a nanowire.

“Successively” is understood to mean that the elements of the stack are arranged one on top of the other in a defined order from bottom to top under the normal conditions of use, that is to say along the normal to the surface of the substrate in general.

“Layer” is understood to mean a single layer or two or more sublayers of the same nature.

“Directional etch” is understood to mean an anisotropic etch taking place in a favoured direction, in this case along the normal to the surface of the substrate.

“Selective etch” is understood to mean that the remaining portion of the dielectric layer can be etched without attacking the encapsulating layer. In practice, the etchant is generally selected such that the etch rate of the remaining portion of the dielectric layer is at least 3 times greater (preferably at least 5 times greater, more preferably at least 10 times greater) than the etch rate of the encapsulating layer.

It should be noted that, for the sake of legibility and ease of understanding, the drawings described above are schematic and not necessarily to scale. The cross sections are made normal to the surface of the substrate.

DETAILED DESCRIPTION OF EMBODIMENTS

For the sake of simplicity, elements that are identical or that perform the same function in the various embodiments have been designated with the same references.

The invention provides a process for manufacturing an electroluminescent device, comprising the following steps:a) using a stack comprising, successively:a substrate1, having a surface10;matrix arrays of pixels2formed on the surface10of the substrate1, the pixels2having a columnar shape and extending along the normal to the surface10of the substrate1;an encapsulating layer3arranged to cover the matrix arrays of pixels2;a dielectric layer4formed on the encapsulating layer3;b) performing a directional etch along the normal to the surface10of the substrate1, of a portion of the dielectric layer4extending between the pixels2of the matrix arrays of pixels2; the dielectric layer4having a portion40remaining at the end of step b);c) performing a selective chemical etch of the remaining portion40of the dielectric layer4, step c) being carried out with a chemical etchant that permits selective etching of the remaining portion40of the dielectric layer4with respect to the encapsulating layer3.

As shown inFIG.1, the stack used in step a) comprises successively:a substrate1, having a surface10;matrix arrays of pixels2formed on the surface10of the substrate1, the pixels2having a columnar shape and extending along the normal to the surface10of the substrate1;an encapsulating layer3arranged to cover the matrix arrays of pixels2;a dielectric layer4formed on the encapsulating layer3.

The substrate1is advantageously made of a semiconductor material. By way of non-limiting example, the substrate1may be made of silicon (Si).

By way of non-limiting example, the pixels2may be nanowires, in particular gallium nitride (GaN) nanowires. The pixels2advantageously form periodic patterns.

The encapsulating layer3of the stack used in step a) is advantageously made of at least one material selected from aluminium (Al), alumina (Al2O3) and aluminium nitride (AlN). “At least one material” is understood to mean that the encapsulating layer3may be made of a multilayer material comprising at least one material selected from aluminium (Al), alumina (Al2O3) and aluminium nitride (AlN). The encapsulating layer3of the stack used in step a) may have a thickness of the order of 1 μm.

The dielectric layer4of the stack used in step a) is advantageously made of silicon dioxide (SiO2). The dielectric layer4of the stack used in step a) may have a thickness of between 8 μm and 10 μm.

As illustrated inFIG.8, the directional etch performed during step b) is a directional etch along the normal to the surface10of the substrate1, of a portion of the dielectric layer4extending between the pixels2of the matrix arrays of pixels2.

By way of non-limiting example, the directional etch carried out during step b) is a dry plasma etch. When the dielectric layer4is made of silicon dioxide, step b) may be carried out using a fluorine-containing plasma, such as a carbon tetrafluoride (CF4) plasma.

As illustrated inFIGS.7and8, step b) is advantageously carried out with a photolithography mask M1having patterns arranged to face the pixels2of the matrix arrays of pixels2. In other words, the patterns of the photolithography mask M1lie above the pixels2of the matrix arrays of pixels2.

The dielectric layer4has a portion40remaining at the end of step b). The remaining portion40of the dielectric layer4extends beneath the patterns of the photolithography mask M1.

Step b) is advantageously preceded by the following steps:b01) forming a trench5(as illustrated inFIG.2) between adjacent matrix arrays of pixels2that has a bottom wall50and side walls51;b02) depositing a barrier layer6(as illustrated inFIG.3) on the bottom wall50and on the side walls51, the barrier layer6being made of a material selected according to the chemical etchant with which step c) is carried out, so as to obtain an etch stop layer during performance of step c).

The side walls51of the trench5are formed by the dielectric layer4. The bottom wall50of the trench5is formed by the surface10of the substrate1. By way of non-limiting example, step b01) may be carried out by a dry plasma etch. When the dielectric layer4is made of silicon dioxide (SiO2), step b01) may comprise an etch by a C4F8plasma. Step b01) may comprise an etch of the encapsulating layer3, for example by a chlorine-containing plasma (e.g. Cl2or BCl3) when the encapsulating layer3is made of aluminium (Al) or alumina (Al2O3). Step b01) is advantageously carried out by a directional etch along the normal to the surface10of the substrate1.

Step b02) is carried out by a deposition technique that permits the barrier layer6to follow the surface topology of the stack. It is not strictly necessary for the deposition technique to produce conformal deposition (degree of conformity equal to 100%). In other words, the deposition technique is selected so as to have a degree of conformity (ratio between the width of the flanks of the deposited barrier layer6and the thickness at the surface of the deposited barrier layer6) that makes it possible to follow the surface topology of the stack. By way of non-limiting examples, the barrier layer6may be formed during step b02) by chemical vapour deposition or by atomic layer deposition (ALD), these deposition techniques having a good degree of conformity.

The barrier layer6deposited during step b02) is advantageously made of at least one material selected from aluminium (Al), alumina (Al2O3) and aluminium nitride (AlN). “At least one material” is understood to mean that the barrier layer6may be made of a multilayer material comprising at least one material selected from aluminium (Al), alumina (Al2O3) and aluminium nitride (AlN).

In preparation for the directional etch in step b), a portion of the barrier layer6(extending between the trenches5) is etched using a photolithography mask M0(as illustrated inFIGS.4and5), the patterns of which cover the trenches5. The photolithography mask M0may be a photosensitive resin that is then removed from the stack by a stripping technique, as illustrated inFIG.6.

As illustrated inFIG.13, step b) is advantageously preceded by a step b03) of filling the trench5with a tungsten (W) type material52at the end of step b02). Step b03) is advantageously followed by a step of chemical-mechanical polishing such that the tungsten (W) type material52is flush with the stack.

Step b) is advantageously preceded by an initial directional etch along the normal to the surface10of the substrate1, of a surface portion of the dielectric layer4so as to reach a position P in the stack situated above the pixels2of the matrix arrays of pixels2, at a distance D from the encapsulating layer3. As illustrated inFIG.11, the position P reached at the end of the initial directional etch (e.g. dry plasma etch) must be a distance D sufficiently far from the encapsulating layer3so as not to damage the upper portion of the pixels2by the strong bombardment with ionized gas. By way of non-limiting example, the distance D may be of the order of a hundred nanometres. More precisely, it is possible to consider a distance D greater than or equal to 100 nm having an etch uniformity of the order of 3%.

The selective chemical etch performed during step c) is a selective chemical etch of the remaining portion40of the dielectric layer4. As illustrated inFIG.10, the selective chemical etch performed during step c) is an isotropic etch, but may not be total in the sense that some portions400of the remaining portion40of the dielectric layer4(particularly at the ends of the matrix arrays of pixels2) may remain at the end of step c). However, in practice, the selective chemical etch carried out during step c) may be total or almost total in the sense that all or almost all of the remaining portion40of the dielectric layer4has been eliminated at the end of step c).

Step c) is carried out with a chemical etchant that permits selective etching of the remaining portion40of the dielectric layer4with respect to the encapsulating layer3. The chemical etchant with which step c) is carried out is advantageously vapour-phase hydrofluoric acid (HF).

As illustrated inFIG.9, step c) is advantageously preceded by a step c0) of removing the photolithography mask M1with which step b) can be carried out. The photolithography mask M1may be a photosensitive resin that is removed from the stack during step c0) by a stripping technique.

As illustrated inFIG.12, the process advantageously includes a step d) of forming at least one coloured resin7on the encapsulating layer3at the end of step c). Said at least one coloured resin7is customized for filtration of an emission spectrum of an underlying pixel2.

Said at least one coloured resin7may be a resin of the polymer matrix type having a quantum dot. Said at least one coloured resin7may be a resin having pigments that can act as a colour filter.

The invention is not limited to the disclosed embodiments. Those skilled in the art will be capable of considering technically workable combinations thereof and of substituting equivalents therefor.