Motor drive device

A motor drive device has an inverter circuit, in which at least three sets of a pair of upper and lower arms including a semiconductor switching element on an upper arm and a lower arm is arranged, for supplying voltage to a motor based on ON/OFF operation of each semiconductor switching element by a PWM (Pulse Width Modulation) signal, an inverter drive unit for outputting the PWM signal to each semiconductor switching element of the inverter circuit, a fail safe circuit, arranged between the inverter circuit and the motor, including a semiconductor switching element for shielding the voltage supply from the inverter circuit to the motor for each phase, and a fail safe drive unit for outputting a signal for turning ON/OFF the semiconductor switching element of the fail safe circuit.

BACKGROUND OF THE INVENTION

1. Technical Field

The present invention relates to a motor drive device including an inverter circuit driven by a PWM (Pulse Width Modulation) signal, and in particular, to a technique for protecting a fail safe semiconductor switching element arranged between an inverter circuit and a motor from a back electromotive force generated by the motor.

2. Related Art

In an electrical power steering device of a vehicle, an electrical motor such as a three-phase brushless motor is arranged to apply a steering assisting force corresponding to the steering torque of a handle to a steering mechanism. A motor drive device according to the PWM control method is known for the device for driving the motor.

The motor drive device of the PWM control method generally includes an inverter circuit driven by the PWM signal having a predetermined duty. The inverter circuit is configured by a so-called three-phase bridge in which three sets of a pair of upper and lower arms each having a semiconductor switching element on the upper arm and the lower arm are arranged. The voltage of each phase is supplied from the inverter circuit to the motor when each switching element is ON/OFF operated based on the PWM signal thereby driving the motor.

A motor drive device in which a fail safe mechanical relay is arranged between the inverter circuit and the motor to prevent a current from flowing from the inverter circuit to the motor (or from the motor to the inverter circuit) when failure of the circuit is detected is also known (e.g., Japanese Patent Publication No. 3686471 and Japanese Unexamined Patent Publication No. 2005-199746).

Such failure of the circuit includes various failures that occur in the motor drive device. For instance, the failure may be an ON failure in which each switching element of the inverter circuit does not change from the ON state to the OFF state and remains in the ON state, or a short circuit failure that occurs at the wiring portion other than in the switching element. In addition, there may be a failure in which an abnormality occurs inside the CPU that controls the inverter circuit and the CPU carries out a control different from the original control.

When the above-mentioned failure of the circuit is detected, a control in which the switching elements of the inverter circuit are all set to the OFF state or a control in which a power supply relay arranged between the inverter circuit and the vehicle battery is set to the OFF state is carried out. The power supply to the inverter circuit and the motor is thereby stopped, so that breakage of the inverter circuit, false operation such as assistance being carried out in the direction not predicable by the driver, or the like can be prevented.

When the failure of the circuit is detected, the driver steers the handle by human power since the steering assisting force by the motor is not applied. In this case, the motor also turns in accordance with the steering of the handle, and the motor functions as a power generator. Therefore, a large resistance is applied on the handle operation by the power generating operation of the motor when the motor and the inverter circuit remain electrically connected. That is, a great amount of force will be required to turn the handle. The fail safe mechanical relay for electrically disconnecting the inverter circuit and the motor is thus installed as in Japanese Patent Publication No. 3686471 and Japanese Unexamined Patent Publication No. 2005-199746 to prevent such drawback.

However, in the electrical power steering device, there is a demand to further miniaturize the control circuit although the supply power to the motor is large since the control circuit is to be mounted in the vehicle. Therefore, if the mechanical relay is used as in Japanese Patent Publication No. 3686471 and Japanese Unexamined Patent Publication No. 2005-199746, the relay itself becomes large and the above-mentioned demand cannot be met. A motor drive device in which a fail safe semiconductor switching element is arranged between the inverter circuit and the motor in place of the mechanical relay as described in Japanese Unexamined Patent Publication No. 2009-274686 is thus known (e.g., Japanese Unexamined Patent Publication No. 2009-274686).

In the motor drive device of Japanese Unexamined Patent Publication No. 2009-274686, an FET (Field Effect Transistor) is arranged on a power supply line between the motor and the inverter circuit, where an FET group of each power supply line and an FET group configuring the inverter circuit are both turned OFF when an abnormality such as a short-circuit occurs in the inverter circuit.

With this configuration, however, if the FET of the power supply line is turned OFF while current is flowing to the motor when the abnormality occurs, back electromotive force originating from the inductance of the motor is generated and applied on the FET as a spike voltage (instantaneous large voltage). The FET thus may break.

In Japanese Unexamined Patent Publication No. 2009-220705, a technique of protecting the semiconductor switching element from the spike voltage in the motor drive device in which a fail safe FET is arranged on the power supply line between the motor and the inverter circuit is proposed. In Japanese Unexamined Patent Publication No. 2009-220705, when the abnormality occurs, all the FETs of the inverter circuit are turned OFF, and then the current value of each phase is detected and the FET is sequentially turned OFF from the phase in which the current value becomes smaller than or equal to a predetermined reference value rather than turning OFF the fail safe FETs on the power supply line all at the same time. The spike voltage thus can be suppressed and the breakage of the FET can be prevented.

In the motor drive device of Japanese Unexamined Patent Publication No. 2009-220705, the fail safe FET of the phase in which the current value is smaller than or equal to a predetermined value is sequentially turned OFF to disconnect the inverter circuit and the motor when an abnormality occurs, and hence the current value flowing to each phase needs to be detected on a constant basis. Thus, a current detection element such as a shunt resistor is to be arranged for each phase, which enlarges the circuit. The control content is also complex as the current value of each phase is to be compared with the reference value and the OFF control is to be carried out for every fail safe FET, which leads to false operation of the circuit and makes the circuit more complex.

SUMMARY

One or more embodiments of the present invention provides a motor drive device capable of preventing the fail safe semiconductor switching element from being broken by the spike voltage with a simple circuit configuration and control operation.

A motor drive device according to one or more embodiments of the present invention includes an inverter circuit, in which at least three sets of a pair of upper and lower arms including a semiconductor switching element on an upper arm and a lower arm is arranged, for supplying voltage to a motor based on ON/OFF operation of each semiconductor switching element by a PWM signal; an inverter drive unit for outputting the PWM signal to each semiconductor switching element of the inverter circuit; a fail safe circuit, arranged between the inverter circuit and the motor, including a semiconductor switching element for shielding the voltage supply from the inverter circuit to the motor for each phase; a fail safe drive unit for outputting a signal for turning ON/OFF the semiconductor switching element of the fail safe circuit; a control unit for outputting a command signal for commanding the drive of each semiconductor switching element of the inverter circuit to the inverter drive unit, and outputting a command signal for commanding the drive of each semiconductor switching element of the fail safe circuit to the fail safe drive unit; and an abnormality detecting section for detecting an abnormality. When the abnormality detecting section detects an abnormality, the inverter drive unit carries out a control to turn OFF all the semiconductor switching elements of the inverter circuit based on the command signal from the control unit, and thereafter, the fail safe drive unit carries out a control to turn OFF all the semiconductor switching elements of the fail safe circuit based on the command signal from the control unit at a time point a predetermined time has elapsed.

According to such configuration, the semiconductor switching elements of the inverter circuit are first all turned OFF, and thereafter, the semiconductor switching elements of the fail safe circuit are all turned OFF after elapse of a predetermined time when an abnormality occurs. Thus, the back electromotive force generated by the motor is absorbed to the inverter circuit side through the semiconductor switching element in the ON state of the fail safe circuit until elapse of a predetermined time even after all the semiconductor switching elements of the inverter circuit are turned OFF. Therefore, the breakage of the element can be prevented since the spike voltage is not applied to the semiconductor switching element of the fail safe circuit. Furthermore, since the timing to turn OFF the semiconductor switching element of the fail safe circuit is to be controlled, the current value of each phase does not need to be detected on a constant basis by arranging the current detection element as in patent document 4, and the complex control is also not required.

In one or more embodiments of the present invention, the fail safe drive unit simultaneously turns OFF all the semiconductor switching elements of the fail safe circuit. The fail safe drive unit thus can easily carry out the control on the element since the semiconductor switching element does not need to be controlled individually.

In one or more embodiments of the present invention, the fail safe drive unit may maintain each semiconductor switching element of the fail safe circuit in an ON state until elapse of the predetermined time. Alternatively, the fail safe drive unit may PWM drive each semiconductor switching element of the fail safe circuit until elapse of the predetermined time.

In one or more embodiments of the present invention, a switch open/close controlled by the control unit may be arranged between the inverter circuit and a power supply for supplying power to the inverter circuit. In such a motor drive device, when the abnormality detecting section detects an abnormality, the control unit outputs a command signal for turning OFF all the semiconductor elements of the inverter circuit to the inverter drive unit, and at the same time, turns the switch to an opened state to electrically separate the inverter circuit and the power supply. Accordingly, the inverter circuit is shielded from the power supply by the switch rather than turning OFF the semiconductor switching elements of the inverter circuit with only the command from the inverter drive unit, so that the inverter circuit reliably achieves the operation stop state and the safety is enhanced.

In one or more embodiments of the present invention, each semiconductor switching element of the inverter circuit and the fail safe circuit is an N channel MOS-FET. The back electromotive force generated in the motor thus can be easily absorbed to the inverter circuit side using the parasitic diode between the source and the drain of the MOS-FET. The N channel MOS-FET has an advantage in that the circuit design is easy compared to the P channel MOS-FET.

According to one or more embodiments of the present invention, the semiconductor switching element for fail safe can be prevented from breaking by the spike voltage with the simple circuit configuration and the control operation.

DETAILED DESCRIPTION

Hereinafter, embodiments of the present invention will be described with reference to the drawings. In embodiments of the invention, numerous specific details are set forth in order to provide a more thorough understanding of the invention. However, it will be apparent to one of ordinary skill in the art that the invention may be practiced without these specific details. In other instances, well-known features have not been described in detail to avoid obscuring the invention. A motor drive device used in an electrical power steering device of a vehicle will be described by way of example. In the figures, the same reference numerals are denoted for the same portions or corresponding portions.

First, the configuration of a motor drive device according to a first embodiment of the present invention will be described with reference toFIG. 1. InFIG. 1, a motor drive device100includes a control unit1, an inverter drive unit2, an inverter circuit3, a fail safe circuit4, a fail safe drive unit5, a capacitor C, a power supply relay RY, and a power supply B. The power supply relay RY is an example of a switch in one or more embodiments of the present invention. A motor6driven by the motor drive device100is a three-phase brushless motor.

The inverter circuit3is configured by a three-phase bridge in which three sets of a pair of upper and lower arms including a semiconductor switching element (hereinafter simply referred to as “switching element”) on an upper arm and a lower arm are arranged in correspondence with a U phase, a V phase, and a W phase. An upper arm a1and a lower arm a2of the U-phase respectively include a switching element Q1and Q2, an upper arm a3and a lower arm a4of the V phase respectively include a switching element Q3and Q4, and an upper arm a5and a lower arm a6of the W phase respectively include a switching element Q5and Q6. A U-phase voltage is retrieved from a connection point p of the switching elements Q1and Q2, a V-phase voltage is retrieved from a connection point q of the switching elements Q3and Q4, and a U-phase voltage is retrieved from a connection point r of the switching elements Q5and Q6.

In the first embodiment, the switching elements Q1to Q6are configured by an N-channel MOS-FET. In each switching element, S represents source, D represents drain, G represents gate, and d represents parasitic diode existing between the source S and the drain D. A conducting direction of the parasitic diode d is the direction opposite to the conducting direction (drain D→source S) of each switching element Q1to Q6. Each drain D of the switching elements Q1, Q3, and Q5are commonly connected, and a connection point m thereof is connected to a power supply B through the power supply RY. The capacitor C is connected between the connection point m thereof and ground. Each source S of the switching element Q2, Q4, and Q6are commonly connected, and a connection point n thereof is connected to the ground through a current detection resistor R. The power is supplied from the power supply B to the inverter circuit3through the power supply relay RY.

Six types of PWM signals output from the inverter drive unit2are individually provided to each gate G of the switching element Q1to Q6of the inverter circuit3. The switching elements Q1to Q6perform the ON/OFF operation based on the PWM signal, and as a result, three phase voltage of the U phase voltage, the V phase voltage, and the W phase voltage described above are output from the inverter circuit3. The three phase voltage is supplied to the motor6through the fail safe circuit4.

The fail safe circuit4is arranged between the inverter circuit3and the motor6, and includes a switching element Zu on a power supply line of the U phase voltage, a switching element Zv on a power supply line of the V phase voltage, and a switching element Zw on a power supply line of the W phase voltage. In the first embodiment, each switching element Zu, Zv, and Zw is configured by an N-channel MOS-FET, similar to the switching elements Q1to Q6of the inverter circuit3. In each switching element, S represents source, D represents drain, G represents gate, and d represents parasitic diode existing between the source S and the drain D. A conducting direction of the parasitic diode d is the direction opposite to the conducting direction (drain D→source S) of each switching element Zu, Zv, and Zw.

The source S of the switching element Zu is connected to a connection point p of the switching elements Q1and Q2, the source S of the switching element Zv is connected to a connection point q of the switching element Q3and Q4, and the source S of the switching element Zw is connected to a connection point r of the switching elements Q5and Q6. The drain D of the switching element Zu is connected to a U phase winding6uof the motor6, the drain D of the switching element Zv is connected to a V phase winding6vof the motor6, and the drain D of the switching element Zw is connected to a W phase winding6wof the motor6.

A control signal is input from the fail safe drive unit5to each gate G of the switching elements Zu, Zv, and Zw of the fail safe circuit4. The fail safe drive unit5outputs the control signal of “H” (High) level when turning ON the switching elements Zu, Zv, and Zw, and outputs the control signal of “L” (Low) level when turning OFF the switching elements Zu, Zv, and Zw. The switching elements Zu, Zv, and Zw carry out the ON/OFF operation based on the control signal. The power supply from the inverter circuit3to the motor6is carried out when the switching elements Zu, Zv, and Zw are in the ON state, and the power supply from the inverter circuit3to the motor6is shielded when the switching elements Zu, Zv, and Zw are in the OFF state.

The control unit1is configured by a CPU, a memory, or the like, and includes an abnormality detector10. The abnormality detector10is an example of an abnormality detecting section in one or more embodiments of the present invention. The control unit1calculates a detection current value of a motor current based on the voltage generated at the current detection resistor R, and calculates a target current value of the motor current based on a steering torque input from a torque sensor (not shown). The duty of the PWM signal of each phase is set from the detection current value and the target current value, and a command signal for generating the PWM signal of the relevant duty is output to the inverter drive unit2. When the abnormality detector10detects an abnormality such as short-circuit failure, the control unit1carries out a control, to be described later, on the power supply relay RY, the inverter drive unit2, and the fail safe drive unit5.

The inverter drive unit2generates six types of PWM signal having a predetermined duty based on the command signal provided from the control unit1, and outputs the PWM signal to the gate G of each switching element Q1to Q6of the inverter circuit3.

The operation of the motor drive device100described above will now be described with reference toFIGS. 2A to 2EtoFIG. 5. In timing chart ofFIGS. 2A to 2E, an abnormality does not occur in the circuit before time1, where both the power supply relay RY and the inverter circuit3are in the ON state as shown inFIG. 2A, and the fail safe circuit4is also in the ON state as shown inFIG. 2B.

In other words, if the abnormality detector10does not detect an abnormality, the control unit1controls the power supply relay RY to the closed state (ON). The control unit1outputs a command signal to the inverter drive unit2, and turns ON a predetermined element of the switching elements Q1to Q6to have the inverter circuit3in the operation state. Furthermore, the control unit1outputs a command signal to the fail safe drive unit5and turns ON all the switching elements Zu, Zv, and Zw to have the fail safe circuit4in the conducted state.

In this state (normal time), a current path (thick line) as shown inFIG. 3is formed. The current path in a case where the switching elements Q1and Q6of the inverter circuit3are turned ON is shown. InFIG. 3, the U phase current flows in the path of power supply B→power supply relay RY→switching element Q1(drain D to source S)→parasitic diode d of switching element Zu→U phase winding6uof motor6. The W phase current flows in the path of W phase winding6wof motor6→switching element Zw (drain D to source S)→switching element Q6(drain D to source S) current detection resistor R→ground.FIG. 2Cshows the U phase current and the W phase current.FIG. 2Dshows the U phase voltage applied to the terminal of the U phase winding6uof the motor6, andFIG. 2Eshows the W phase voltage applied to the terminal of the W phase winding6wof the motor6. The U phase voltage and the W phase voltage are actually PWM controlled pulse voltages but are expressed as DC voltage for the sake of convenience in the figure.

The operation in a case where an abnormality occurs will now be described. When the abnormality detector10detects an abnormality such as a short circuit failure, the control unit1switches the power supply relay RY from the closed state (ON) to the opened state (OFF), and outputs a command signal for stopping the operation of the inverter circuit3to the inverter drive unit2. The inverter circuit3and the power supply B are electrically separated when the power supply relay RY is switched to the opened state. The inverter drive unit2stops the output of the PWM signal to the inverter circuit3based on the command signal from the control unit1. The switching elements Q1to Q6of the inverter circuit3are then all turned OFF.

However, the current may flow from the inverter circuit3to the motor6even if a control to have the power supply relay RY and the switching elements Q1to Q6in the OFF state is carried out if the relay and the circuit break down. To inhibit this, all the switching elements Zu, Zv, and Zw of the fail safe circuit4are turned OFF to shield the inverter circuit3and the motor6so that the fail safe function can be ensured.

As shown inFIGS. 10A and 10bdescribing the comparative example, if the fail safe circuit4is turned OFF at the timing t1same as the timing t1to turn OFF the inverter circuit3, the switching element of the fail safe circuit4may break down from the back electromotive force generated in the motor6. This will be specifically described below.

FIG. 11shows a path of the current flowing based on the back electromotive force when the switching elements Zu, Zv, and Zw of the fail safe circuit4are turned OFF at the same time as when the switching elements Q1to Q6of the inverter circuit3are turned OFF when an abnormality occurs from the normal state shown inFIG. 3. The polarity of the terminal of the U phase winding6uin the motor6inverts from + to − inFIG. 3and the polarity of the terminal of the W phase winding6winverts from − to + inFIG. 3due to the back electromotive force.

As a result, the current path of ground→current detection resistor R→parasitic diode d of switching element Q2→parasitic diode d of switching element Zu→U phase winding6uof motor6is formed, as shown with a thick solid line for the U phase, so that the back electromotive force generated in the motor6is absorbed by the current path. Therefore, a large spike voltage will not be applied to the switching element Zu of the U phase.

For the W phase, the path of the thick dotted line is not formed since the conducting direction of the parasitic diode d of the switching element Zw is the opposite of the current direction even if the current attempts to flow as shown with a thick dotted line from the W phase winding6wof the motor6to the inverter circuit3. Therefore, the back electromotive force of + polarity in the W phase winding6wis not absorbed, a large spike voltage is applied to the switching element Zw, and the switching element Zw is broken.

Describing the above phenomenon withFIGS. 10A to 10E, the U phase current and the Q phase current of the motor6rapidly decrease as shown inFIG. 10Cwhen the switching elements Zu, Zv, and Zw of the fail safe circuit4are turned OFF at the same time as when the switching elements Q1to Q6of the inverter circuit3are turned OFF. The back electromotive force generated in the motor6increases as the change rate (di/dt) of the current becomes greater, and hence a large back electromotive force is generated by the rapid current change as shown inFIG. 10C. However, the absorption path of the back electromotive force is formed for the U phase, so that the spike voltage X6is not generated as shown inFIG. 10Din the U phase voltage. The absorption path of the back electromotive force is not formed for the W phase, as described above, and thus the spike voltage X7is generated as shown inFIG. 10Ein the W phase voltage.

In the first embodiment, the fail safe circuit4is turned OFF at time t2, at which a predetermined time T has elapsed from the time t1the abnormality occurs and the power supply relay RY and the inverter circuit3are turned OFF, as shown inFIGS. 2A and 2B, to prevent element breakage by the spike voltage. This control operation will be specifically described below.

When the abnormality detector10detects an abnormality at time t1, the control unit1causes the power supply relay RY to be in the opened state (OFF) and outputs a command signal for turning OFF the switching elements Q1to Q6to the inverter drive unit2. The inverter drive unit2stops the output of the PWM signal to the inverter circuit3when receiving the command signal. In other words, the inverter drive unit2performs a control to turn OFF all the switching elements Q1to Q6. The switching elements Q1to Q6of the inverter circuit3are then all turned OFF.

Here, the abnormality assumes an abnormality in the CPU or the like of the control unit1. The switching elements Q1to Q6of the inverter circuit3are all assumed to be able to carry out the ON/OFF operation normally. Other abnormalities include the ON failure in which one of the switching elements Q1to Q6of the inverter circuit3remains in the ON state, the illustration of which is omitted.

Furthermore, the control unit1outputs a command signal for turning OFF the switching elements Zu, Zv, and Zw to the fail safe drive unit5at a time point of time t2, at which a predetermined time T has elapsed from the time t1. When receiving the command signal, the fail safe drive unit5outputs the control signal of “L” level to each gate G of the switching elements Zu, Zv, and Zw of the fail safe circuit4. In other words, the fail safe drive unit5performs a control to turn OFF all the switching elements Zu, Zv, and Zw. The switching elements Zu, Zv, and Zw of the fail safe circuit4are then all turned OFF.

Therefore, the switching elements Q1to Q6of the inverter circuit3are all turned OFF and all the switching elements Zu, Zv, and Zw of the fail safe circuit4are all turned ON between time t1and time t2. Thus, the current path shown with a thick line inFIG. 4is formed when an abnormality occurs from the normal state shown inFIG. 3.

In other words, similar to the case ofFIG. 11, the current path of ground→current detection resistor R→parasitic diode d of switching element Q2→parasitic diode d of switching element Zu→U phase winding6uof motor6is formed for the U phase, and the back electromotive force generated in the motor6is absorbed to the inverter circuit3side by the current path. For the W phase, the current path of W phase winding6w→switching element Zw (drain D to source S)→parasitic diode d of switching element Q5→capacitor C→ground is formed since the switching element Zw is turned ON, and the back electromotive force generated in the motor6is absorbed to the inverter circuit3side by the current path.

As the switching elements Zu, Zv, and Zw of the fail safe circuit4are maintained in the ON state until the elapse of the predetermined time T from when the switching elements Q1to Q6of the inverter circuit3are turned OFF, the back electromotive force generated in the motor6at the time of abnormality can be absorbed to the inverter circuit3side through the fail safe circuit4. As a result, the U phase current and the W phase current of the motor6gradually is reduced as shown inFIG. 2C. Therefore, the spike voltage X1is not generated in the U phase voltage as shown inFIG. 2D, and the spike voltage X2is also not generated in the W phase voltage as shown inFIG. 2E. Therefore, a large spike voltage is not applied to the switching elements Zu, Zw, and the breakage of the element can be prevented.

When the predetermined time T has elapsed and becomes time t2, the switching elements Zu, Zv, and Zw of the fail safe circuit4are all turned OFF simultaneously. As a result, the power supply relay RY, the switching elements Q1to Q6of the inverter circuit3and the switching elements Zu, Zv, and Zw of the fail safe circuit4are all in the OFF state, as shown inFIG. 5, so that the motor6can be reliably cut off from the motor drive device100.

The current path in a case where the U phase voltage and the W phase voltage appear has been described above using an example in which Q1and Q6of the switching elements of the inverter circuit3are turned ON, but similar principle can be applied to the current path in a case where the U phase voltage and the V phase voltage appear, and the current path in a case where the V phase voltage and the W phase voltage appear.

The predetermined time T can be determined as below. Generally, the avalanche energy EAVgenerated when disconnecting the motor load is
EAV=½·L·I2·[VDSS/(VDSS−VBAT)]
Where I is the motor current, L is the inductance of the motor, VDSSis the drain-source withstanding pressure rated value, and VBATis the battery voltage, and the discharge time tAVof the avalanche energy EAVis
tAV=(L·I)/(VDSS−VBAT)

Therefore, the predetermined time T is determined to satisfy tAV≦T. For the upper limit of T, disconnecting the motor from the inverter circuit within a defined time when an abnormality occurs is decided in the specification of the vehicle, and hence the defined time becomes the upper limit.

The regenerative operation is carried out while the back electromotive force of the motor6is absorbed to the inverter circuit3side at the time of abnormality, so that an electrical brake is applied on the motor6thus causing the steering to be heavy in theory, but actually, the steering is barely affected since the time T is a small value of smaller than or equal to a 1 ms (millisecond).

FIG. 6is a flowchart showing the procedure of the control according to the first embodiment described above. Each step of the flowchart is executed by the CPU configuring the control unit1.

InFIG. 6, in step S1, the abnormality detector10monitors whether or not an abnormality is detected. Step S1is repeatedly executed if the abnormality detector10does not detect an abnormality (step S1: NO), and the process proceeds to steps S2, S3if the abnormality detector10detects an abnormality (step S1: YES). In step S2, all the switching elements Q1to Q6of the inverter circuit3are turned OFF, and at the same time, the power supply relay RY is set to the opened state (OFF) in step S3. The time is measured from this time point with a timer (not shown) arranged in the control unit1to determine whether or not a predetermined time T has elapsed in step S4. Step S4is repeatedly executed if the predetermined time T has not elapsed (step S4: NO), and the process proceeds to step S5if the predetermined time T has elapsed (step S4: YES) to turn OFF all the switching elements Zu, Zv, and Zw of the fail safe circuit4.

According to the first embodiment described above, the back electromotive force generated in the motor6is absorbed to the inverter circuit3side through the fail safe circuit4, so that the switching elements Zu, Zv, and Zw of the fail safe circuit4are prevented from being broken by a large spike voltage. Furthermore, since the timing to turn OFF the switching elements Zu, Zv, and Zw of the fail safe circuit4is to be controlled, the processes such as arranging a current detection element to detect the current value of each phase on a constant basis, and comparing the detection current value with a reference value, and the like become unnecessary and a simple control merely needs to be carried out as shown inFIG. 6.

According to the first embodiment, the fail safe drive unit5does not need to individually control the switching elements Zu, Zv, and Zw by turning OFF all the switching elements Zu, Zv, and Zw of the fail safe circuit4simultaneously, and hence the control with respect to the element can be easily carried out.

According to the first embodiment, the control unit1not only outputs the command signal for turning OFF the inverter circuit3but also controls the power supply relay RY to the opened state at the same time when the abnormality occurs, and hence the inverter circuit3is electrically separated from the power supply B. Therefore, the inverter circuit3reliably becomes the operation stop state and the safety is enhanced.

Moreover, according to the first embodiment, the switching elements of the inverter circuit3and the fail safe circuit4are configured by an N-channel MOS-FET. Therefore, the back electromotive force generated in the motor6can be easily absorbed to the inverter circuit3side using the parasitic diode d existing between the drain and the source of each FET. The N-channel MOS-FET has an advantage in that the circuit design is easier than the P-channel MOSFET.

A second embodiment of the present invention will now be described with reference toFIGS. 7A to 7EtoFIG. 9. The configuration of the motor drive device according to the second embodiment is the same asFIG. 1, and the current path at normal time is also the same as shown inFIG. 3, and thusFIG. 1andFIG. 3will be cited as second embodiment.

As shown inFIG. 7B, in the second embodiment, the switching elements Zu, Zv, and Zw of the fail safe circuit4are PWM driven until the elapse of the predetermined time T from time t1at which the abnormality occurred. In other words, at the time point of time t1, the control unit1outputs a command signal for PWM driving the switching elements Zu, Zv, and Zw to the fail safe drive unit5. When receiving the command signal, the fail safe drive unit5generates a PWM signal and outputs the command signal to the fail safe circuit4. In the second embodiment, the PWM signal having a constant (does not change with time) duty is generated by the fail safe drive unit5, and provided to each gate G of the switching elements Zu, Zv, and Zw. The switching elements Zu, Zv, and Zw carry out the ON/OFF operation according to such PWM signal.

Therefore, the switching elements Q1to Q6of the inverter circuit3are all turned OFF, but the switching elements Zu, Zv, and Zw of the fail safe circuit4repeat the ON/OFF operation from time t1to time t2. Thus, the back electromotive force generated by the motor6is absorbed to the inverter circuit3side through the fail safe circuit4in the zone in which the switching element is turned ON, similar to the first embodiment.

As a result, the U phase current and the W phase current of the motor6shown inFIG. 7Cdecrease in a step-wise manner according to the PWM operation of the switching elements Zu, Zv, and Zw. Therefore, the spike voltage X3is not generated in the U phase voltage as shown inFIG. 7D, and the spike voltage X4is not generated in the W phase voltage as shown inFIG. 7E. However, the PWM driven switching element has a zone that is turned OFF, and hence a situation where the back electromotive force cannot be absorbed occurs similar toFIG. 11in the OFF period of the switching element Zw. Thus, the spike voltage shown as X5inFIG. 7Eis instantaneously applied to the switching element Zw.FIG. 8is an enlarged view of the waveform of the spike voltage X5.

The spike voltage X5in this case has a small peak value compared to the original spike voltage X4. Therefore, the element breakage by the spike voltage X5can be prevented by setting the duty of the PWM signal so that the peak value becomes a value of an extent that the breakage of the switching element Zw does not occur.

FIG. 9is a flowchart showing the procedure of the control according to the second embodiment described above. Each step of the flowchart is executed by the CPU configuring the control unit1.

InFIG. 9, whether or not the abnormality detector10detects abnormalities is monitored in step S11. Step S11is repeatedly executed if the abnormality detector10does not detect an abnormality (step S11: NO), and the process proceeds to steps S12to S14if the abnormality detector10detects an abnormality (step S11: YES). In step S12, all the switching elements Q1to Q6of the inverter circuit3are turned OFF, and at the same time, the power supply relay RY is opened (OFF) in step S13. From such time point, all the switching elements Zu, Zv, and Zw of the fail safe circuit4are PWM driven in step S14, and the time is measured with a timer (not shown) arranged in the control unit1. Whether or not the predetermined time T has elapsed is then determined in step S15, where the process returns to step S14and continues the PWM drive if the predetermined time T has not elapsed (step S15: NO). If the predetermined time T has elapsed (step S15: YES), the process proceeds to step S16to stop the PWM drive and turn OFF all the switching elements Zu, Zv, and Zw of the fail safe circuit4.

Similar to the first embodiment, according to the second embodiment, the switching elements Zu, Zv, and Zw of the fail safe circuit4can be prevented from being broken by the large spike voltage when an abnormality occurs. In the second embodiment as well, the process of constantly detecting the current value of each phase by arranging the current detection element and comparing the detection current value with the reference value is not necessary since the timing of turning OFF the switching elements Zu, Zv, and Zw merely needs to be controlled, and thus a simple control as shown inFIG. 9is merely carried out. Other effects of the second embodiment are the same as the first embodiment, and thus the description thereof will be omitted.

The present invention may adopt various embodiments other than those described above. Examples will be given below.

In one or more embodiments described above, the abnormality detector10is arranged in the control unit1(FIG. 1), but the abnormality detector10may be independently arranged separate from the control unit1. The abnormality detected by the abnormality detector10includes not only a short circuit failure but also various abnormalities.

In one or more embodiments described above, the timer (not shown) for measuring the predetermined time T is arranged in the control unit1, but the timer may be arranged in the fail safe drive unit5so that the fail safe drive unit5manages the predetermined time T. A delay circuit may be arranged in place of the timer between the control unit1and the fail safe drive unit5, or between the fail safe drive unit5and the fail safe circuit4.

In one or more embodiments described above, the switching elements Zu, Zv, and Zw of the fail safe circuit4are simultaneously turned OFF at the time point the predetermined time T has elapsed, but these switching elements may be sequentially turned OFF.

In one or more embodiments described above, the PWM signal having a constant duty is output from the fail safe drive unit5(FIG. 7B), but the PWM signal in which the duty becomes smaller with time may be output.

In one or more embodiments described above, the power supply relay RY has been described by way of example for the switch, but a semiconductor switching element for large current switching may be used instead of the power supply relay RY.

In one or more embodiments described above, the N channel MOS-FET is used for the switching element, but a P channel MOS-FET may be used. Other switching elements such as an IGBT (Insulated Gate Bipolar Transistor) may be used instead of the MOS-FET.

In one or more embodiments described above, the three phase motor has been described by way of example for the motor, but one or more embodiments of the present invention may be applied when driving a multiphase motor of four or more phases.

In one or more embodiments described above, the brushless motor has been described by way of example for the motor, but one or more embodiments of the present invention may be applied to a device for driving an inductive motor, a synchronous motor, or the like.

In one or more embodiments described above, an example in which one or more embodiments of the present invention is applied to the motor drive device used for the electric power steering device of the vehicle has been described, but the one or more embodiments of present invention can be applied to the overall motor drive device that includes the fail safe circuit between the inverter circuit and the motor.