The present invention is a quadrature multi-mode RF receiver that uses a single quadrature mixer for tuning to desired frequency bands. In a direct conversion mode of operation, the RF receiver down converts a received RF signal directly into a baseband signal. In a VLIF mode of operation, the RF receiver down converts a received RF signal into a VLIF signal. When receiving a wanted RF signal, the frequency of the resulting VLIF signal is called the wanted VLIF frequency, and is based on the signal strength of the received RF signal. In one embodiment of the present invention, the wanted VLIF frequency is selected to be one of two VLIF frequencies. The wanted VLIF frequency is inversely related to the signal strength of the received RF signal.

FIELD OF THE INVENTION

The present invention relates to radio frequency (RF) receivers used in RF communications systems.

BACKGROUND OF THE INVENTION

With the growth of the wireless communications industry, wireless communications protocols have become more sophisticated. Communications systems may have to provide support for multiple communications protocols. One such system is the Universal Mobile Telecommunications System (UMTS), which may require support for both Wide Band Code Division Multiple Access (WBCDMA) and Enhanced General Packet Radio Service (EGPRS) communications protocols. These two protocols have many differences such that two different RF receiver architectures may be needed. RF receivers are often battery powered and must function with minimal power consumption, cost, and space. As a result, there is a need for a single radio receiver that can efficiently operate in at least two different operating modes, using two different receiver architectures.

A traditional RF receiver architecture is the super-heterodyne architecture in which a received RF signal is mixed with a local oscillator signal to obtain a lower intermediate frequency (IF) signal. The IF signal is then filtered to the desired channel bandwidth to remove interfering signals and signals from adjacent channels. As channel bandwidths become narrower, the inclination is to reduce the frequency of the IF signal. As a result, receivers using a very low intermediate frequency (VLIF) for their IF sections are becoming increasingly common for certain communications protocols; however, some image frequencies may not be removed with upstream RF bandpass filtering. Another example is a direct-conversion receiver, which has a direct current (DC) IF signal; however, problems with 1/f noise, DC offsets, and second-order inter-modulation (IIP2) effects may eliminate the direct-conversion receiver from some applications. The WBCDMA protocol lends itself to direct-conversion, but the EGPRS protocol lends itself to VLIF. A receiver with a different receive path for each protocol could be used in a UMTS system; however, since the WBCDMA protocol and the EGPRS protocol do not operate simultaneously, a receiver with a single receive path for both protocols could reduce cost, complexity, and current consumption.

One design challenge in a VLIF receiver is rejection of image frequencies. In any heterodyne receiver, when a received RF input signal FR, mixes with a local oscillator signal FLO, the mixer produces an output signal with sums and differences of FRand FLO. Specifically, the frequencies of FR−FLO, FLO−FR, and FR+FLOare the dominant mixer output frequency combinations. If FLOis chosen with a lower frequency than a desired RF input signal FDRF, then the FR−FLOportion of the mixer output signal produces a wanted VLIF signal FDVLIF; however, the mixer output signal will also include an FR+FLOimage signal, which is close to double the frequency of FDRFand easily removed by IF bandpass filtering. If a blocking image signal FBISwith a frequency located at a frequency of FLOminus the frequency of FDVLIFis received, the FLO−FRportion of the mixer output will produce an image that is identical in frequency with FDVLIF, and cannot be removed with normal IF filtering techniques; therefore, if upstream RF bandpass filtering cannot remove the blocking image signal, then other techniques must be used to remove the signal. However, since the blocking signal is phase-shifted by 180 degrees from FDVLIF, a quadrature receiver architecture can be used to filter out the blocking image signal. A quadrature receiver architecture uses two mixers receiving the same RF input signal, which is mixed with two different local oscillator signals that are equal in frequency and phase-shifted from each other by 90 degrees. Complex filtering methods can then be used to filter out the blocking image signal. Any mismatch between the processing of in-phase signals and quadrature-phase signals will result in degradation of the rejection of image signals.

There is a special situation in which a frequency of the wanted VLIF signal FDVLIF, called the wanted VLIF frequency, is less than the frequencies of blocking image signals. In this special situation, there is a benefit to reducing the wanted VLIF frequency, namely improved image rejection; however, a lower frequency increases 1/f noise, DC offsets, and IIP2 problems, which reduces the effective sensitivity of the receiver. In some networks, there is a loose correlation between the signal strength of a desired signal and the signal strength of interfering image signals; therefore, when the signal strength of a desired signal is small, a higher VLIF frequency is desirable to increase receiver sensitivity. The resulting reduced image rejection is acceptable, since the signal strengths of interfering image signals are also small. Likewise, when signal strengths of interfering image signals are large, a larger VLIF frequency is desirable to increase image rejection. The resulting reduced receiver sensitivity is acceptable, since the signal strength of the desired signal is also large; therefore, in some networks, it would be beneficial to have an inverse correlation of the VLIF frequency with signal strength.

Given the above factors, a need exists for a quadrature single-path receiver that can support both direct conversion and VLIF modes of operation, can adjust the VLIF frequency based on received signal strength, and can effectively reject image interfering signals with filtering, matching between the circuitry processing the in-phase signals and the quadrature-phase signals, or both.

SUMMARY OF THE INVENTION

The present invention is a quadrature multi-mode RF receiver that uses a single quadrature mixer for tuning to desired frequency bands. In a direct conversion mode of operation, the RF receiver down converts a received RF signal directly into a baseband signal. In a VLIF mode of operation, the RF receiver down converts a received RF signal into a VLIF signal. When receiving a wanted RF signal, the frequency of the resulting VLIF signal is called the wanted VLIF frequency, and is based on the signal strength of the received RF signal. In one embodiment of the present invention, the wanted VLIF frequency is selected to be one of two VLIF frequencies. The wanted VLIF frequency is inversely related to the signal strength of the received RF signal. For example, a higher wanted VLIF frequency is selected when receiving smaller RF signals to increase effective receiver sensitivity. The higher VLIF frequency reduces de-sensitization due to 1/f noise, DC offsets, inter-modulation effects, or any combination thereof. A lower wanted VLIF frequency is selected when receiving large RF signals to improve image rejection. The lower VLIF frequency improves rejection of blocking image signals by moving the VLIF frequency of the blocking image signal away from the wanted VLIF frequency, which allows IF filtering of some of the blocking image signal using real filtering in addition to complex filtering. A quadrature multi-mode RF receiver using a single quadrature mixer can be of lower cost and complexity than receivers using multiple quadrature mixers.

Certain embodiments of the present invention may use programmable real filters, polyphase filters, or both to reject image interfering signals. In the direct conversion mode of operation, bypass circuitry may be used to bypass all or part of the filters. Certain embodiments of the present invention may use quadrature gain correction circuitry, quadrature phase correction circuitry, or both to match the circuitry processing the in-phase signals and the quadrature-phase signals to improve image rejection. Certain embodiments of the present invention may convert the quadrature receiver signals into digital signals using analog-to-digital (A-to-D) conversion. Digital circuitry may provide real filtering, polyphase filtering, down conversion, gain correction, phase correction, processing, or any combination thereof.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

The present invention is a quadrature multi-mode RF receiver that uses a single quadrature mixer for tuning to desired frequency bands. In a direct conversion mode of operation, the RF receiver down converts a received RF signal directly into a baseband signal. In a VLIF mode of operation, the RF receiver down converts a received RF signal into a VLIF signal. When receiving a wanted RF signal, the frequency of the resulting VLIF signal is called the wanted VLIF frequency, and is based on the signal strength of the received RF signal. In one embodiment of the present invention, the wanted VLIF frequency is selected to be one of two VLIF frequencies. The wanted VLIF frequency is inversely related to the signal strength of the received RF signal. For example, a higher wanted VLIF frequency is selected when receiving smaller RF signals to increase effective receiver sensitivity. The higher VLIF frequency reduces de-sensitization due to 1/f noise, DC offsets, inter-modulation effects, or any combination thereof. A lower wanted VLIF frequency is selected when receiving large RF signals to improve image rejection. The lower VLIF frequency improves rejection of blocking image signals by moving the VLIF frequency of the blocking image signal away from the wanted VLIF frequency, which allows IF filtering of some of the blocking image signal using real filtering in addition to complex filtering. A quadrature multi-mode RF receiver using a single quadrature mixer can be of lower cost and complexity than receivers using multiple quadrature mixers.

Certain embodiments of the present invention may use programmable real filters, polyphase filters, or both to reject image interfering signals. In the direct conversion mode of operation, bypass circuitry may be used to bypass all or part of the filters. Certain embodiments of the present invention may use quadrature gain correction circuitry, quadrature phase correction circuitry, or both to match the circuitry processing the in-phase signals and the quadrature-phase signals to improve image rejection. Certain embodiments of the present invention may convert the quadrature receiver signals into digital signals using analog-to-digital (A-to-D) conversion. Digital circuitry may provide real filtering, polyphase filtering, down conversion, gain correction, phase correction, processing, or any combination thereof.

FIG. 1shows one embodiment of the present invention used in a quadrature multi-mode RF receiver10. An RF input signal RFINis received by an RF amplifier12, which buffers the RF input signal RFINto create a buffered RF input signal RFINB. RF mixer circuitry14receives and splits the buffered RF input signal RFINBinto two signals, which are mixed with quadrature local oscillator signals to create a first in-phase down converted output signal DC1Iand a first quadrature-phase down converted output signal DC1Q. The RF mixer circuitry14includes a frequency synthesizer to create the quadrature local oscillator signals using a reference frequency signal REFFREQ. The RF mixer circuitry14receives a frequency select signal FREQSEL to select the frequency of the quadrature local oscillator signals.

In the direct conversion mode of operation, the frequency of the quadrature local oscillator signals are approximately equal to the frequency of a wanted RF input signal RFINsuch that the first down converted output signals DC1I, DC1Qare baseband signals. In the VLIF mode of operation, the frequency of the quadrature local oscillator signals is selected to be either higher or lower than the frequency of the wanted RF input signal RFINsuch that the first down converted output signals DC1I, DC1Qare VLIF signals with a wanted VLIF frequency. The wanted VLIF frequency is inversely related to the signal strength of the RF input signal RFIN, and may be one of two VLIF frequencies; therefore, the frequency of the quadrature local oscillator signals is selected to provide the wanted VLIF frequency. In an exemplary embodiment of the present invention, when the signal strength of the RF input signal RFINis strong, the wanted VLIF frequency is approximately 120 kilohertz, and when the signal strength of the RF input signal RFINis weak, the wanted VLIF frequency is approximately 175 kilohertz.

The RF mixer circuitry14feeds the first down converted output signals DC1I, DC1Qinto quadrature filtering and gain correction circuitry16, which filters out unwanted signals and matches the in-phase signals and the quadrature-phase signals to create a filtered in-phase down converted output signal DCFIand a filtered quadrature-phase down converted output signal DCFQ. The quadrature filtering and gain correction circuitry16receives a mode select signal MODESEL to configure quadrature filters appropriately when operating in either the direct conversion mode of operation or the VLIF mode of operation. The quadrature filtering and gain correction circuitry16feeds the filtered down converted output signals DCFI, DCFQinto A-to-D conversion, digital filtering, down conversion, and processing circuitry, which converts the filtered down converted output signals DCFI, DCFQfrom analog signals into digital signals. The digital signals are digitally filtered to remove adjacent channels, images, and any other interfering signals. Any needed down conversion, de-modulation, or signal processing is performed on the digital signals. Signal strengths of wanted and interfering signals may be measured and provided in a RF signal strength signal RSSI. Any required mode, or control information is received from a digital control signal DIGCONT. Control circuitry20chooses the mode of operation, receives the RF signal strength signal RSSI, and then chooses the appropriate frequency of the quadrature local oscillator signals. The control circuitry20provides the frequency select signal FREQSEL, the mode select signal MODESEL, and the digital control signal DIGCONT with the proper information.

FIG. 2shows details of the RF mixer circuitry14ofFIG. 1. An in-phase mixer22and a quadrature-phase mixer24receive the buffered RF input signal RFINB. A synthesizer and local oscillator26receives the reference frequency signal REFFREQ to support synthesis of any needed local oscillator frequency, and the frequency select signal FREQSEL to select the frequency of the quadrature local oscillator signals. The synthesizer and local oscillator26provides an in-phase local oscillator signal to the in-phase mixer22, and a quadrature-phase local oscillator signal to the quadrature-phase mixer24. The mixers22,24mix the local oscillator signals with the buffered RF input signal RFINBto create the first down converted output signals DC1I, DC1Q.

FIG. 3shows details of the quadrature filtering and gain correction circuitry16ofFIG. 1. The first down converted output signals DC1I, DC1Qfeed a quadrature programmable 2-pole real filter28, which provides filtering of some image and interfering signals. Quadrature real filters process each quadrature leg independently, whereas quadrature polyphase filters process each quadrature leg using signals from both quadrature legs. The quadrature programmable 2-pole real filter28receives the mode select signal MODESEL to configure quadrature filters appropriately when operating in either the direct conversion mode of operation or the VLIF mode of operation. For example, in a WBCDMA and EGPRS system, WBCDMA signals are received when operating in the direct conversion mode of operation; therefore, the quadrature programmable 2-pole real filter28is configured to receive the large bandwidth associated with WBCDMA signals. EGPRS signals are received when operating in the VLIF mode of operation; therefore, the quadrature programmable 2-pole real filter28is configured to receive the narrow bandwidth associated with EGPRS VLIF signals. The quadrature programmable 2-pole real filter28provides a second in-phase down converted output signal DC2Iand a second quadrature-phase down converted output signal DC2Qto quadrature gain and phase correction circuitry30, which applies gain and phase correction factors to the second down converted output signals DC2I, DC2Qto create a third in-phase down converted output signal DC3Iand a third quadrature-phase down converted output signal DC3Q. The third down converted output signals DC3I, DC3Qare approximately equal in amplitude and phase-shifted 90 degrees from each other, which provides optimal downstream complex filtering.

The third down converted output signals DC3I, DC3Qfeed a quadrature polyphase VLIF filter32having a bypass mode, which provides additional filtering of VLIF image signals when operating in the VLIF mode of operation to create the filtered down converted output signals DCFI, DCFQ. When operating in the direct conversion mode of operation, bypass circuitry bypasses internal filter circuitry by routing the third down converted output signals DC3I, DC3Qto directly provide the filtered down converted output signals DCFI, DCFQ. In one embodiment of the present invention, the quadrature polyphase VLIF filter32may be configured as a real filter to provide additional filtering when operating in the direct conversion mode of operation, such as when receiving WBCDMA signals.

FIG. 4shows details of the A-to-D conversion, digital filtering, down conversion, and processing circuitry18ofFIG. 1. The filtered down converted output signals DCFI, DCFQfeed an in-phase A-to-D converter34and a quadrature-phase A-to-D converter36, which convert the analog signals DCFI, DCFQinto a digital in-phase down converted output signal DIGIand a digital quadrature-phase down converted output signal DIGQ. The A-to-D converters34,36feed the digital down converted output signals DIGI, DIGQinto digital filtering, down conversion, and processing circuitry38. The digital signals DIGI, DIGQare digitally filtered to remove adjacent channels, images, and any other interfering signals. Any needed down conversion, de-modulation, or signal processing is performed on the digital signals. Signal strengths of wanted and interfering signals may be measured and provided in the RF signal strength signal RSSI. Any required mode or control information is received from the digital control signal DIGCONT. Other embodiments of the present invention may eliminate all or part of the quadrature filtering and gain correction circuitry16; however, since all filtering and image rejection would need to be handled by the digital filtering, down conversion, and processing circuitry38, A-to-D converters34,36with larger dynamic ranges may be required.

In an exemplary embodiment of the present invention, a UMTS system supports both WBCDMA and EGPRS communications protocols. The direct conversion mode of operation is used when receiving WBCDMA signals, and the VLIF mode of operation is used when receiving EGPRS signals. The VLIF mode of operation uses one of two wanted VLIF frequencies, which are approximately 120 kilohertz and 175 kilohertz. Alternate systems may have an interfering RF signal at approximately 400 kilohertz from a wanted RF signal. Other interfering systems may have an interfering RF signal at approximately 600 kilohertz from the wanted RF signal. The A-to-D converters34,36have a dynamic range of approximately 85 db to handle the dynamic range of wanted signals and a synthesizer with phase noise of about 36 db. Without a quadrature polyphase VLIF filter32, the dynamic range of the A-to-D converters34,36would have to handle the dynamic ranges of interfering image signals, which would be approximately 95 db for the 400 kilohertz interfering signal and 104 db for the 600 kilohertz interfering signal. Such wide dynamic ranges would increase the cost, complexity, and current consumption of the A-to-D converters34,36; therefore, the quadrature polyphase VLIF filter32must filter interfering image signals sufficiently to be handled by the A-to-D converters34,36with a dynamic range of approximately 85 db. Thus, the quadrature polyphase VLIF filter32must reduce 400 kilohertz image signals by at least 10 db and 600 kilohertz image signals by at least 19 db.

FIG. 5shows a graph of the frequency response of a 2-pole passive polyphase VLIF notch filter with one notch at 400 kilohertz and a second notch at 600 kilohertz. If the wanted VLIF frequency is −120 kilohertz, then the received RF input signal FRminus the local oscillator signal FLOis equal to −120 kilohertz; therefore, the 400 kilohertz (khz) interfering image signal produces a VLIF signal at 400 khz-120 khz, or 280 khz. From the graph, if the 400 khz interfering image signal is spread between 180 khz and 380 khz, then the signal is reduced by at least 12 db. Likewise, the 600 khz interfering image signal produces a VLIF signal at 600 khz-120 khz, or 480 khz. From the graph, if the 600 khz interfering image signal is spread between 380 khz and 580 khz, then the signal is reduced by at least 33 db. Additionally, by moving the VLIF frequency of the interfering image signal away from the wanted VLIF frequency, some of the interfering image signal can be filtered using the quadrature programmable 2-pole real filter28. For example, if the wanted RF signal has a signal strength of −82 dbm, a 400 khz interfering image signal has a signal strength of −41 dbm, and the receiver requires the down converted ratio of the wanted signal to interfering image signal to be at least 9 db, then the signal strength of the interfering image signal must be reduced by at least 51 db. By using a wanted VLIF frequency of −120 khz, the quadrature programmable 2-pole real filter28helps reject the interfering image signal. If the quadrature programmable 2-pole real filter28attenuates the interfering image signal by 8 db, then the quadrature polyphase VLIF filter32and the downstream digital filtering need to attenuate the interfering image signal by 43 db. If the wanted VLIF frequency was −175 khz, then most of the filtering of the interfering image signal would have to be handled by the downstream digital filtering, which would require A-to-D converters34,36with large dynamic ranges.

If the received signal strengths, both wanted and interfering, were low enough, the wanted VLIF frequency could be increased to −175 kilohertz, such that the 400 khz interfering image signal would produce a VLIF signal of 225 khz, and the 600 khz interfering image signal would produce a VLIF signal of 425 khz. From the graph, the 400 khz interfering image signal is reduced by at least 5 db, and the 600 khz interfering image signal is reduced by at least 22 db. By increasing the wanted VLIF frequency, image rejection decreases, but receiver sensitivity increases, which is desired behavior when signal strengths are smaller.

When receiving EGPRS signals, large amplitude modulated (AM) interfering signals may be received with a signal strength up to −23 dbm and a carrier frequency offset by approximately 3 megahertz from the carrier frequency of a wanted EGPRS signal. Such interfering signals will be removed primarily by the quadrature programmable 2-pole real filter28.

Certain embodiments of the present invention may select the frequency of the quadrature local oscillator signals to be either higher or lower than the frequency of the wanted RF input signal RFINduring the VLIF mode of operation. The selection may be based upon which frequency reduces the magnitude of interfering signals, as indicated by the signal strength of the RF input signal RFIN.

An application example of a quadrature RF power amplifier is its use in down conversion and digitization circuitry40in a mobile terminal42. The basic architecture of the mobile terminal42is represented inFIG. 6and may include a receiver front end44, a radio frequency transmitter section46, an antenna48, a duplexer or switch50, a baseband processor52, a control system54, a frequency synthesizer56, and an interface58. The receiver front end44receives information bearing radio frequency signals from one or more remote transmitters provided by a base station. A low noise amplifier (LNA)60amplifies the signal. A filter circuit62minimizes broadband interference in the received signal, while the down conversion and digitization circuitry40downconverts the filtered, received signal to an intermediate or baseband frequency signal, which is then digitized into one or more digital streams. The baseband processor52provides mode and channel information to the down conversion and digitization circuitry40. The receiver front end44typically uses one or more mixing frequencies generated by the frequency synthesizer56. The baseband processor52processes the digitized received signal to extract the information or data bits conveyed in the received signal. This processing typically comprises demodulation, decoding, and error correction operations. As such, the baseband processor52is generally implemented in one or more digital signal processors (DSPs).

On the transmit side, the baseband processor52receives digitized data, which may represent voice, data, or control information, from the control system54, which it encodes for transmission. The encoded data is output to the transmitter46, where it is used by a modulator64to modulate a carrier signal that is at a desired transmit frequency. A power amplifier system66amplifies the modulated carrier signal to a level appropriate for transmission, and delivers the amplified and modulated carrier signal to the antenna48through the duplexer or switch50.

A user may interact with the mobile terminal42via the interface58, which may include interface circuitry68associated with a microphone70, a speaker72, a keypad74, and a display76. The interface circuitry68typically includes analog-to-digital converters, digital-to-analog converters, amplifiers, and the like. Additionally, it may include a voice encoder/decoder, in which case it may communicate directly with the baseband processor52. The microphone70will typically convert audio input, such as the user's voice, into an electrical signal, which is then digitized and passed directly or indirectly to the baseband processor52. Audio information encoded in the received signal is recovered by the baseband processor52, and converted by the interface circuitry68into an analog signal suitable for driving the speaker72. The keypad74and display76enable the user to interact with the mobile terminal42, input numbers to be dialed, address book information, or the like, as well as monitor call progress information.