Terahertz module

A terahertz module includes: a terahertz chip which includes an active device which emits a terahertz wave; and a dielectric substrate coupled to the terahertz chip. The terahertz chip includes a semiconductor substrate. The active device is disposed on an upper surface of the semiconductor substrate. A cutout is formed in a portion of a first side surface, among a plurality of side surfaces of the dielectric substrate, the cutout extending from an upper side of the first side surface to a lower side of the first side surface. The terahertz chip is fit into the cutout in such a direction that the upper surface of the semiconductor substrate is parallel to the first side surface and the semiconductor substrate is arranged in a bottom side of the cutout.

TECHNICAL FIELD

The present disclosure relates to a terahertz module.

BACKGROUND ART

In recent years, application of information communications with use of electromagnetic wave, such as mobile phones, is expanding. The frequency and the wavelength are values that characterize the electromagnetic wave. In general, the higher the frequency is, a larger capacity of information the electromagnetic wave can carry. Therefore, adoption of electromagnetic waves (millimeter waves) in 28 Gigahertz (GHz) frequency band or 39 GHz frequency band is considered for 5G, which is the standard for the next-generation mobile phone. In contrast, research is progressing on the terahertz wave, which is an electromagnetic wave at a higher frequency, aiming at the realization of ultra high speed wireless communications beyond 5G. For commercialization of an application system adopting the terahertz wave, development of terahertz wave generator and detector by an electronic device capable of compact integration is expected.

For example, NPL 1 discloses connecting the waveguide of a photonic crystal, which is a dielectric substrate, to a terahertz chip via a metallic mode conversion mechanism. With this configuration, it is reported that up to 90% coupling efficiency is attained between the terahertz chip and the dielectric substrate in the 0.3 THz band.

CITATION LIST

Non Patent Literature

SUMMARY OF INVENTION

Technical Problem

NPL 1 requires the terahertz chip to have a thickness about half the thickness of the photonic crystal. However, it is not easy to thin the terahertz chip to such a thickness.

Therefore, an object of the present disclosure is to provide a terahertz module that has high coupling efficiency attained between a terahertz chip and a dielectric substrate, without having to thin the terahertz chip.

Solution to Problem

A terahertz module according to the present disclosure includes: a terahertz chip which includes an active device that emits a terahertz wave; and a dielectric substrate coupled to the terahertz chip. The terahertz chip includes a semiconductor substrate and the active device is disposed on an upper surface of the semiconductor substrate. A cutout is formed in a portion of a first side surface, among a plurality of side surfaces of the dielectric substrate, the cutout extending from an upper side of the first side surface to a lower side of the first side surface. The terahertz chip is fit into the cutout in such a direction that the upper surface of the semiconductor substrate is parallel to the first side surface and the semiconductor substrate is arranged in a bottom side of the cutout.

Preferably, the cutout has a surface parallel to the first side surface. The semiconductor substrate of the terahertz chip has a lower surface in contact with a surface of the cutout parallel to the first side surface.

Preferably, the terahertz chip has a thickness which is equal to a depth of the cutout.

Preferably, the terahertz chip has a thickness greater than a depth of the cutout.

Preferably, the dielectric substrate is a photonic crystal.

Preferably, a waveguide for the terahertz wave is formed on the photonic crystal in a direction perpendicular to the upper surface of the semiconductor substrate.

Preferably, a filter for passing or filtering out a predetermined frequency component of the terahertz wave is formed on the photonic crystal.

Preferably, a planar lens for collecting the terahertz wave emitted by the active device is formed on the photonic crystal.

Preferably, a plurality of the terahertz chips disposed in a row are coupled to the photonic crystal.

Preferably, the active device is a resonant tunneling diode.

Advantageous Effects of Invention

According to the terahertz module of the present disclosure, high coupling efficiency is attained between the terahertz chip and the dielectric substrate, without having to thin the terahertz chip.

DESCRIPTION OF EMBODIMENTS

Conventional Structure

A structure disclosed in NPL 1 is now described.

FIG.1is a perspective view of a terahertz chip192disclosed in NPL 1.FIG.2is a top view of the terahertz chip192disclosed in NPL 1.FIG.3is a diagram depicting a terahertz module disclosed in NPL 1.

A resonant tunneling diode (RTD) oscillates a high frequency electromagnetic wave (terahertz wave) at a terahertz band frequency. The RTD may also be caused to operate as a detector with ultrahigh sensitivity. A metal insulator metal (MIM) operates as a reflective mirror for reflecting the terahertz wave. The terahertz module is configured of the terahertz chip192and a photonic crystal being coupled together.

Conductive paths139a,139bhave tapered shapes whose dimension in y-direction increases toward x-direction. This solves problems due to the difference in scale between the terahertz chip and the waveguide of the photonic crystal, thereby attaining a high coupling rate between the terahertz chip and the photonic crystal.

In order to reduce symmetry and radiation loss, an InP substrate191is disposed on the top surface of the terahertz chip192.

In order to attain a high coupling rate between the terahertz chip192and the photonic crystal, the terahertz chip192needs to have a thickness d about half (100 μm) the thickness (200 μm) of the photonic crystal. This is because the photonic crystal has a largest coupling efficiency at the center portion in the direction of thickness of the photonic crystal. An increase of the frequency of the terahertz wave reduces the wavelength of the terahertz wave. Thus, the terahertz chip192needs to have a reduced thickness d, which is difficult to process.

Referring toFIGS.4through8, a configuration of the terahertz module is now described.

FIG.4is a diagram depicting an appearance of a terahertz chip10.

The terahertz chip10has a width w, a length L, and a thickness d. The direction of the width w of the terahertz chip10will be referred to as an x direction. The direction of the length L of the terahertz chip10will be referred to as a y direction. The direction of the thickness d of the terahertz chip10will be referred to as a z direction.

In the terahertz chip10, a RTD20and a slot30are disposed on the upper surface (the top surface) of the InP substrate1which is a semiconductor substrate. As shown inFIG.4, the terahertz wave propagates in the direction of thickness of (a negative z-direction) of the terahertz chip.

Suppose that the bottom surface of the terahertz chip10is the lower surface (the undersurface) of the InP substrate1.

FIG.5is a diagram showing the terahertz chip10as viewed from the top to the bottom (the negative z-direction).FIG.6is an enlarged view of the terahertz chip10ofFIG.5around the RTD20.

Shunt resistors SR1, SR2are formed in regions that are formed between an upper electrode4and a lower electrode2in the direction of thickness (the z direction) of the terahertz chip10and traverse across the upper electrode4and the lower electrode2in the y direction. The shunt resistors SR1, SR2have functionality of reducing parasitics.

The slot30and the RTD20are formed below the upper electrode4in the direction of thickness (the z direction) of the terahertz chip10.

MIM capacitors6a,6bare formed at a portion where the upper electrode4and the lower electrode2overlap in the y direction, the portion being between the upper electrode4and the lower electrode2in the direction of thickness (the z direction) of the terahertz chip10.

FIG.7is a cross-sectional view of the terahertz chip10, taken along I-I line ofFIG.6. A direction perpendicular to the surfaces (the upper surface and the lower surface) of the InP substrate1is the z direction.

The RTD20includes: a GaInAs layer91aheavily doped with an n type impurity, which is disposed on the upper surface of the InP substrate1; a GaInAs layer92adoped with an n type impurity, which is disposed on the upper surface of the GaInAs layer91a; an undoped GalnAs layer93adisposed on the upper surface of the GaInAs layer92a; an AlAs layer94adisposed on the upper surface of the GaInAs layer93a; a GaInAs layer95disposed on the upper surface of the AlAs layer94a; an AlAs layer94bdisposed on the upper surface of the GalnAs layer95; an undoped GaInAs layer93bdisposed on the upper surface of the AlAs layer94b; a GaInAs layer92bdoped with an n type impurity, which is disposed on the upper surface of the GaInAs layer93b; and a GalnAs layer91bheavily doped with an n type impurity, which is disposed on the upper surface of the GalnAs layer92b.

SiO2films98a,98bare deposit on the sides of the RTD20.

The upper electrode4is disposed on the upper surface of the GalnAs layer91b.

The lower electrode2is disposed on the upper surface of the GalnAs layer91aand the upper surface of the InP substrate1.

Here, the thicknesses of the respective layers are, for example, as follows. However, the present disclosure is not limited thereto.

The n+ type GaInAs layers91a,91beach have a thickness of, for example, approximately 400 nm and approximately 15 nm, respectively. The n type GaInAs layers92aand92bhave substantially the same thickness, for example, approximately 25 nm. The undoped GaInAs layers93aand93bhave thicknesses of approximately 2 nm and approximately 20 nm, respectively. The AlAs layers94aand94bhave the same thickness, for example, approximately 1.1 nm. The GaInAs layer95has a thickness of, for example, approximately 4.5 nm. The InP substrate1has a thickness of a few hundreds of micrometers.

The upper electrode4and the lower electrode2both include a metal layer stack structure of Au/Pd/Ti or Au/Ti, for example. The Ti layer is a buffer layer for good contact with the semi-insulating InP substrate1. The thicknesses of the upper electrode4and the lower electrode2are, for example, approximately a few hundreds of nanometers, resulting in a flattened stack structure as a whole. The upper electrode4and the lower electrode2can both be formed by vacuum deposition or sputtering, for example.

As noted above, the RTD20is disposed on the upper surface of the InP substrate1. The RTD20forms a resonator between the lower electrode2and the upper electrode4. The electromagnetic wave emitted by the RTD20has a surface emitting radiation pattern in a direction perpendicular to the upper surface of the InP substrate1.

FIG.8is a cross-sectional view of the terahertz chip10, taken along II-II line ofFIG.6.

The MIM capacitors6a,6bare formed of the SiO2film98that is disposed at the portion where the upper electrode4and the lower electrode2overlap in the y direction, the portion being between the upper electrode4and the lower electrode2in the direction of thickness (the z direction) of the terahertz chip10.

FIG.9is a diagram depicting the dielectric substrate50according to Embodiment 1.

The dielectric substrate50can implement a terahertz wave-polarizing function, a frequency-filtering function, and a function as a planar lens. The dielectric substrate50is configured of a dielectric such as a photonic crystal. A circuit device deployed onto the dielectric substrate50does not use metal interconnect, resulting in a low-loss system being implemented in a high-frequency terahertz band.

The dielectric substrate50has a thickness of Sd. A cutout CS is formed in a first side surface SP, among multiple side surfaces of the dielectric substrate50. The cutout CS is formed in a direction perpendicular to the first side surface SP, extending from an upper side US of the first side surface SP to a lower side LS of the first side surface SP.

The cutout CS has a cuboid shape. The cutout CS has a length of L, a width of w, and a depth of d2, where w=Sd and d2<d. The cutout CS has a surface71P, a surface72P, and a surface73P. The surface71P is parallel to the first side surface SP. The surface72P and the surface73P are perpendicular to the first side surface SP.

FIG.10is a diagram depicting the terahertz module according to Embodiment 1.

The terahertz module includes the terahertz chip10and the dielectric substrate50coupled to the terahertz chip10.

The terahertz chip10is fit into the cutout CS of the dielectric substrate50. The terahertz chip10is fit into the cutout CS of the dielectric substrate50in such a direction that the upper surface of the InP substrate1is parallel to the first side surface SP of the cutout CS and the InP substrate1is arranged in a bottom side of the cutout CS. The bottom surface of the terahertz chip10(the lower surface (the undersurface) of the InP substrate1) is in contact with the surface71P. Two side surfaces of the terahertz chip10are in contact with the two surfaces72P and73P, respectively, of the cutout CS.

The thickness d of the terahertz chip10is greater than the depth d2of the cutout CS. Accordingly, the uppermost surface of the terahertz chip10is outside the dielectric substrate50.

In the present embodiment, the terahertz chip10can have any thickness. The direction of thickness of the terahertz chip10is the same as the direction of the top surface of the dielectric substrate50, which obviates the need for thinning the terahertz chip10.

The result of simulation suggests that the terahertz module according to the present embodiment can attain 90% coupling efficiency, as with the terahertz module according to the conventional example.

FIG.11is a diagram illustrating an example of a method of implementation of the terahertz module according to Embodiment 1.

A groove84of the dielectric substrate50corresponds to the first side surface SP. Although not shown, the cutout CS is formed in the first side surface SP into which the terahertz chip10is fit.

A microwave circuit board80includes a metallic layer80aand a resin layer80b. Signals and voltages are transmitted from a coaxial connector70to the metallic layer80aof the microwave circuit board80. These signals and voltages are further sent to the terahertz chip10through bonding wires90.

As described above, according to the present embodiment, the terahertz chip and the dielectric substrate are coupled together by fitting the terahertz chip into the cutout formed in a side surface of the dielectric substrate, thereby attaining a high coupling efficiency between the terahertz chip and the dielectric substrate, without having to thin the terahertz chip.

FIG.12is a diagram depicting a dielectric substrate50according to Embodiment 2.

The dielectric substrate50has a thickness of Sd. A cutout CS is formed in a first side surface SP of the dielectric substrate50. The cutout CS is formed in a direction perpendicular to the first side surface SP, from an upper side US to a lower side LS of the first side surface SP.

The cutout CS has a cuboid shape. The cutout CS has a length of L, a width of w, and a depth of d, where w=Sd. The cutout CS has a surface74P, a surface75P, and a surface76P. The surface74P is parallel to the first side surface SP. The surface75P and the surface76P are perpendicular to the first side surface SP.

FIG.13is a diagram depicting a terahertz module according to Embodiment 2.

The terahertz module includes a terahertz chip10and a dielectric substrate50coupled to the terahertz chip10.

The terahertz chip10is fit into the cutout CS of the dielectric substrate50. The terahertz chip10is fit into the cutout CS of the dielectric substrate50in such a direction that the upper surface of an InP substrate1is parallel to the first side surface SP of the cutout CS and the InP substrate1is arranged in a bottom side of the cutout CS. The bottom surface of the terahertz chip10(the lower surface (the undersurface) of the InP substrate1) is in contact with the surface74P. Two side surfaces of the terahertz chip10are in contact with the two surfaces75P and76P, respectively, of the cutout CS.

The terahertz chip10has a thickness d equal to a depth d of the cutout CS. Accordingly, the uppermost surface of the terahertz chip10connects to the first side surface SP of the dielectric substrate50.

Even in the present embodiment, the terahertz chip10can have any thickness, as with Embodiment 1. The direction of thickness of the terahertz chip10is the same as the direction of the top surface of the dielectric substrate50, which thus obviates the need for thinning the terahertz chip10.

FIG.14is a diagram depicting a terahertz module according to Embodiment 3.

As with Embodiment 2, a terahertz chip10is fit into a cutout CS of a dielectric substrate50. A bow-tie antenna is formed on the terahertz chip10.

The antenna electrodes4B and2B are capable of transmitting/receiving terahertz waves to/from a free space. The first transmission lines40S and20S are connected to the antenna electrodes4B and2B, and capable of transmitting the terahertz waves.

The RTD20has a primary electrode connected to the first transmission lines40S and20S.

The second transmission lines40F and20F are connected to the RTD20, and capable of transmitting the terahertz waves.

The pad electrodes40P and20P are connected to the second transmission lines40F and20F.

The low-pass filter9is connected to the pad electrodes40P and20P.

The impedances between the RTD20and the antenna electrodes4B and2B can be matched by transforming the impedances of the first transmission lines40S and20S. The pad electrodes20P and40P can comprise electrodes for supplying bias power supply and data signal.

The low-pass filter9may include a metal insulator metal (MIM) reflector. A resistor element may be connected between the pad electrode40P and the pad electrode20P. The resistor element may include a metal interconnect. The metal interconnect may include bismuth, nickel, titanium, or platinum.

The spacing between the antenna electrodes4B and2B of the bow-tie antenna is substantially the same as the spacing between the transmission lines (slotlines).

The RTD20has the same cross section as described with respect toFIG.7of Embodiment 1.

The terahertz chip including the bow-tie antenna, instead of the slot antenna according to Embodiment 1, can also provide advantageous effects similar to Embodiment 1.

In the present embodiment, example applications of the terahertz module described in the above embodiments are now set forth.

A photonic crystal B1can be used as a dielectric substrate50.

FIG.15is a perspective view of the photonic crystal B1.FIG.16is a plan view of the photonic crystal B1.FIG.17is a cross-sectional view of the photonic crystal B1.

For example, the photonic crystal B1is referred to as a two-dimensional photonic crystal slab. The photonic crystal B1is formed of a semiconducting material, for example. Examples of the semiconducting material comprising the photonic crystal B1include Si, GaAs, InP, GaN, GaInAsP/InP, InGaAs/GaAs, GaAlAs/GaAs, GaInNAs/GaAs, GaAlInAs/InP, AlGaInP/GaAs, and GaInN/GaN. The photonic crystal B1in plan view may have, while it has a rectangular shape inFIGS.15and16, any other shape.

The photonic crystal B1has a top surface41and an undersurface42. The top surface41and the undersurface42are flat. The photonic crystal B1has a first side surface SP having a cutout (not shown) into which a terahertz chip10is fit.

The photonic crystal B1includes multiple grid points31. The grid points31diffract a terahertz wave in a photonic band-gap band for a photonic band structure of the photonic crystal B1. The grid points31are disposed periodically on an XY plane of the photonic crystal B1. The grid points31are each formed of a pore, for example. As shown inFIG.17, the pores pass through the photonic crystal B1from the top surface41to the undersurface42. While the pores have round shapes inFIGS.15and16, they may have polygonal shapes or oval shapes. While the periodic array of square grating is shown inFIGS.15and16, the periodic array may be a two-dimensional periodic array such as a rectangular grating, a triangular grating, or a honeycomb grating.

The index of refraction of the terahertz wave can be caused to change by adjusting the grating constant for the grid points31. This allows the propagation path for the terahertz wave to be controlled. For example, the transmission path can be straightened, bent, branched (demultiplexed), crossed. or directionally coupled (multiplexed). Also, the photonic crystal B1can planar integrate a compact transmission path adopting a refractive index confinement structure, a filter, a non-linear optical element such as a lens, an antenna, etc.

In the following, five example applications with use of the photonic crystal B1will be described as the dielectric substrate50.

FIG.18is a diagram depicting a first example application of the terahertz module.

The dielectric substrate50can form a refractive index distribution by adjusting a grating constant for the grid points31, and a dielectric waveguide110for the terahertz wave is thereby formed. The dielectric waveguide110is formed in a direction perpendicular to the upper and lower surfaces of an InP substrate1. The upper and lower surfaces of the InP substrate1are parallel to the first side surface SP of the dielectric substrate50, the surface71P of the cutout CS, and the surface74P of the cutout CS.

FIG.19is a diagram depicting a second example application of the terahertz module.

The dielectric substrate50forms a refractive index distribution by adjusting the grating constant for the grid points, and a planar lens112is thereby formed. As shown inFIG.19, the terahertz wave emitted by the terahertz chip10is collected by the planar lens112.

Note that by adjusting the grating constant for the grid points, the dielectric substrate50can form, rather than the planar lens112, a reflective mirror for reflecting the terahertz wave or a filter for passing therethrough or filtering out a predetermined frequency component of the terahertz wave.

FIG.20is a diagram depicting a third example application of the terahertz module.

Multiple terahertz chips10are disposed in a row and coupled to the photonic crystal, thereby forming a terahertz chip array. The terahertz chips10emit terahertz waves having frequencies that vary due to differences in drive voltage. The terahertz waves emitted by the terahertz chips10are collected by a planar lens112and output through an output waveguide119.

FIG.21is a diagram depicting a fourth example application of the terahertz module.

A filter formed on the photonic crystal allows implementation of the frequency multiplexing. Depending on a frequency, multiplexing or demultiplexing is possible.

The terahertz chips10emit terahertz waves having different frequencies.

The terahertz waves emitted by the terahertz chips10are demultiplexed by a demultiplexer181, and sent to multiple waveguides183. The terahertz waves having the frequencies, output from the waveguides183, are multiplexed by a multiplexer182. The multiplexed terahertz waves are output to an antenna.

FIG.22is a diagram depicting a fifth example application of the terahertz module.

A resonator117, a coupler133, a mixer132, and an absorber134are formed on the photonic crystal.

The local oscillator131includes: an array in which the terahertz chips10are disposed in a row; a complex lens115; and the resonator117having a high-Q value.

A portion of a local oscillating signal LO emitted by the local oscillator131is sent to the absorber134, and the remaining portion is set to the coupler133. The absorber134can prevent the local oscillating signal LO from being reflected.

The coupler133passes the local oscillating signal LO to the mixer132and blocks a modulated signal RF output from the mixer132.

The mixer132mixes an intermediate frequency signal IF and the local oscillating signal LO and thereby generates a modulated signal RF, and emits the modulated signal RF to an antenna.

Simulation

Next, a result of simulation will be described.

FIG.23is a diagram depicting a result of simulation.

FIG.23shows a transmittance where a microwave circuit board80is provided shown inFIG.11versus a transmittance where the microwave circuit board80is not provided. As shown inFIG.23, the difference between the two is approximately 1 dB. This suggests that providing the microwave circuit board80has sufficiently small impact on the transmittance.

Variations

The present disclosure is not limited to the above embodiments. For example, the present disclosure encompasses the following variations.(1) While the RTD is used as an example of an active device in the above embodiments, the active device can be configured of any other diode or transistor. For example, a tunnel transit time (TUNNETT) diode, an impact ionization avalanche transit time (IMPATT) diode, a GaAs-based field effect transistor (FET), a GaN-based FET, a high electron mobility transistor (HEMT), a heterojunction bipolar transistor (HBT), a complementary metal-oxide-semiconductor (CMOS) FET, etc. can be used as the active device.(2) While the example is shown in which the terahertz chip includes a first tunnel barrier layer/a quantum well (QW) layer/a second tunnel barrier layer have the configuration of AlAs/GaInAs/AlAs, the present disclosure is not limited to such a material system. For example, the first tunnel barrier layer/the quantum well layer/the second tunnel barrier layer may have a configuration of AlGaAs/GaAs/AlGaAs. The first tunnel barrier layer/the quantum well layer/the second tunnel barrier layer may also have a configuration of AlGaN/GaN/AlGaN. The first tunnel barrier layer/the quantum well layer/the second tunnel barrier layer may still also have a configuration of SiGe/Si/SiGe.(3) While the terahertz chip includes the slot antenna or the bow-tie antenna in the above embodiments, the present disclosure is not limited thereto. The antenna included in the terahertz chip may have any shape insofar as the antenna reflects the radio wave (the terahertz wave) in a direction perpendicular to the substrate. For example, the terahertz chip may include a planar antenna such as a patch antenna, a dipole antenna, or a ring antenna.

The presently disclosed embodiments should be considered in all aspects as illustrative and not restrictive. The scope of the present disclosure is defined by the appended claims, rather than by the description above. All changes which come within the meaning and range of equivalency of the appended claims are to be embraced within their scope.

REFERENCE SIGNS LIST