Integrated circuit, and method and system for providing power to integrated circuit

An integrated circuit includes a highest class core circuit that has a positive power supply terminal connected to a positive power supply terminal of an external power source, and is configured to receive a first supply voltage which is at least a portion of a an input supply voltage that is provided from the external power source based on an operation throughput; and a lowest class core circuit that has a positive power supply terminal connected to a negative power supply terminal of an adjacent upper class core circuit, has a negative power supply terminal connected to a negative power supply terminal of the external power source, and is configured to receive a second supply voltage which is at least a portion of a part of the input supply voltage that excludes the first supply voltage.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims priority under 35 U.S.C. § 119 to Korean Patent Application No. 10-2017-0094970, filed on Jul. 26, 2017, in the Korean Intellectual Property Office (KIPO), the disclosure of which is incorporated herein in its entirety by reference.

BACKGROUND

The present disclosure relates to integrated circuits, generally, and more specifically to integrated circuits having hierarchical structures whereby power consumption of the integrated circuits may decrease without increasing areas of the integrated circuits, and methods and systems for providing power to the integrated circuits.

2. Description of the Related Art

In general, an integrated circuit (IC) may include an analog circuit and a digital circuit. In at least some analog circuits and systems, a relatively high supply power is required to increase a signal to noise ratio (SNR), and in at least some digital circuits and systems, a relatively low supply power is used to decrease power consumption. Regarding a method of providing power to an IC in which an analog circuit part and a digital circuit part are combined, research into a power distribution method for preventing, without significantly increasing an area of the IC due to an additional circuit, circuit damage caused by providing excessively high power to the digital circuit has been conducted.

SUMMARY

Provided are integrated circuits and methods and systems for providing power to the integrated circuits.

According to at least some example embodiments, an integrated circuit includes a highest class core circuit that has a positive power supply terminal connected to a positive power supply terminal of an external power source, and is configured to receive a first supply voltage which is at least a portion of a an input supply voltage that is provided from the external power source based on an operation throughput; and a lowest class core circuit that has a positive power supply terminal connected to a negative power supply terminal of an adjacent upper class core circuit, has a negative power supply terminal connected to a negative power supply terminal of the external power source, and is configured to receive a second supply voltage which is at least a portion of a part of the input supply voltage that excludes the first supply voltage.

According to at least some example embodiments, a method of distributing and providing an input supply voltage that is provided from a power source to an integrated circuit including at least a highest class core circuit and a lowest class core circuit includes determining an operation throughput of the highest class core circuit; providing, based on the determined operation throughput of the highest class core circuit, a first supply voltage which is at least a portion of the input supply voltage to the highest class core circuit; and providing a second supply voltage which is at least a portion of a part of the input supply voltage that excludes the first supply voltage to the lowest class core circuit.

According to at least some example embodiments, a system for providing power to an integrated circuit includes a power source that provides an input supply voltage to the integrated circuit through a positive power supply terminal and a negative power supply terminal; a highest class core circuit that has a positive power supply terminal connected to the positive power supply terminal of the power source, and is configured to receive a first supply voltage which is at least a portion of the input supply voltage based on an operation throughput; and a lowest class core circuit that has a positive power supply terminal connected to a negative power supply terminal of an adjacent upper class core circuit, has a negative power supply terminal connected to the negative power supply terminal of the power source, and is configured to receive a second supply voltage which is at least a portion of a part of the input supply voltage that excludes the first supply voltage from the input supply voltage.

DETAILED DESCRIPTION

Detailed example embodiments are disclosed herein. However, specific structural and functional details disclosed herein are merely representative for purposes of describing example embodiments. Example embodiments o may, however, be embodied in many alternate forms and should not be construed as limited to only the embodiments set forth herein.

Example embodiments are described herein with reference to schematic illustrations of idealized embodiments (and intermediate structures). As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, are to be expected. Thus, example embodiments should not be construed as limited to the particular shapes of regions illustrated herein but are to include deviations in shapes that result, for example, from manufacturing.

FIG. 1is a schematic diagram for describing a system for providing power to an integrated circuit100, according to at least one example embodiment.

The power supply system may include the integrated circuit100and a power source110.

The power source110may provide a supply voltage to the integrated circuit100through a positive power supply terminal111and a negative power supply terminal112. For example, the power source110may provide a direct current voltage corresponding to a voltage difference between the positive power supply terminal111and the negative power supply terminal112to the integrated circuit100.

The integrated circuit100may include, but is not limited to, an analog-digital converter (ADC), a phase lock loop (PLL), a digital signal processor (DSP), a micro controller unit (MCU), a central processing unit (CPU), an application processor (AP), and a memory.

A positive power supply terminal120of the integrated circuit100may be connected to the positive power supply terminal111of the power source110. Also, a negative power supply terminal130of the integrated circuit100may be connected to the negative power supply terminal112of the power source110. The integrated circuit100may receive a supply voltage from the power source110through the positive power supply terminal120and the negative power supply terminal130.

The integrated circuit100may generate an output signal150by performing operation processing based on a received input signal140.

The integrated circuit100may include a plurality of digital circuits for performing operation processing by using a digital input signal, a plurality of analog circuits for performing operation processing by using an analog input signal, or a combination thereof. The digital input signal may be a sequence of discrete values. For example, the digital input signal may include a sequence of a high voltage value and a low voltage value. In this regard, the digital input signal may be changed from a low voltage to a high voltage or from a high voltage to a low voltage.

The integrated circuit100may include a plurality of circuits. In this regard, the plurality of circuits may be core circuits which are main processing circuits inside a processor such as a microprocessor. Also, the plurality of core circuits may operate independently of each other.

FIG. 2is a diagram of an integrated circuit200according to at least one example embodiment. The integrated circuit200ofFIG. 2is an example of the integrated circuit100ofFIG. 1.

The integrated circuit200may include a plurality of circuits,230and240. According to at least some example embodiments, each of the circuits230and240of the integrated circuit200is assigned to a class from among a plurality of classes, and the plurality of classes may be ranked from a lowest class to a highest class. For example, in the example illustrated inFIG. 2, the plurality of classes includes at least two classes: a highest class and a lowest class. Further, in the example illustrated inFIG. 2, the circuit230is assigned to the highest class and the circuit240is assigned to the lowest class. The plurality of circuits, for example, the highest class circuit230and the lowest class circuit240, may receive a supply voltage Vp through the positive power supply terminal111(ofFIG. 1) and the negative power supply terminal112(ofFIG. 1) of the external power source110(ofFIG. 1), the positive power supply terminal111having a voltage Vdd and the negative power supply terminal112having a voltage Vss.

Referring toFIG. 2, the integrated circuit200may include the highest class circuit230and the lowest class circuit240. Also, the highest class circuit230and the lowest class circuit240may be core circuits for performing operation processing independently of each other.

A positive power supply terminal231of the highest class circuit230may be connected to the positive power supply terminal111of the external power source110(ofFIG. 1). Also, a negative power supply terminal232of the highest class circuit230may be connected to a positive power supply terminal of an adjacent lower class circuit. For example, the negative power supply terminal232of the highest class circuit230may be connected to a positive power supply terminal241of the lowest class circuit240.

The positive power supply terminal241of the lowest class circuit240may be connected to a negative power supply terminal of an adjacent upper class circuit. For example, the positive power supply terminal241of the lowest class circuit240may be connected to the negative power supply terminal232of the highest class circuit230. Also, a negative power supply terminal242of the lowest class circuit240may be connected to the negative power supply terminal112of the external power source110(ofFIG. 1).

The highest class circuit230may receive an input signal233. Also, the lowest class circuit240may receive an input signal243. For example, the input signal233and the input signal243may be digital input signals or analog input signals.

The highest class circuit230may generate an output signal234by performing operation processing based on the received input signal233. Also, the lowest class circuit240may generate an output signal244by performing operation processing based on the received input signal243.

The highest class circuit230may receive a supply voltage Vpu235which is at least a portion of the supply voltage Vp provided from the external power source110(ofFIG. 1) based on an operation throughput. The supply voltage Vp provided from the external power source110may also be referred to, in the present disclosure, as the input supply voltage Vp. Also, the operation throughput of the highest class circuit230may depend on the input signal233received by the highest class circuit230. For example, the operation throughput of the highest class circuit230may depend on a change frequency of the input signal233received by the highest class circuit230. In this regard, as the change frequency of the input signal233received by the highest class circuit230increases, the operation throughput of the highest class circuit230may increase.

As the operation throughput of the highest class circuit230increases, the supply voltage Vpu235provided to the highest class circuit230may decrease. Also, as the change frequency of the input signal233received by the highest class circuit230increases, the supply voltage Vpu235provided to the highest class circuit230may decrease.

The lowest class circuit240may receive a supply voltage Vpl245which is at least a portion of the part of the supply voltage Vp provided from the external power source110(ofFIG. 1) that excludes the supply voltage Vpu235provided to the highest class circuit230(e.g., at least a portion of a part of the supply voltage Vp that excludes the supply voltage Vpu).

A distribution ratio between the supply voltage Vpu235provided to the highest class circuit230and the supply voltage Vpl245provided to the lowest class circuit240from the supply voltage Vp provided from the external power source110(ofFIG. 1) may be determined based on the operation throughput of the highest class circuit230and an operation throughput of the lowest class circuit240. Accordingly, the distribution ratio between the supply voltage Vpu235provided to the highest class circuit230and the supply voltage Vpl245provided to the lowest class circuit240from the supply voltage Vp provided from the external power source110(ofFIG. 1) may be time variant.

Also, the distribution ratio between the supply voltage Vpu235of the highest class circuit230and the supply voltage Vpl245of the lowest class circuit240from the supply voltage Vp provided from the external power source110(ofFIG. 1) may be determined by system complexity of the highest class circuit230and system complexity of the lowest class circuit240. In this regard, the system complexity may be determined by a type and size of a device constituting a circuit and the number of devices. For example, when the system complexity of the highest class circuit230is greater than the system complexity of the lowest class circuit240, the supply voltage Vpu235of the highest class circuit230may be greater than the supply voltage Vpl245.

FIG. 3is a graph showing a relationship between a voltage provided to a circuit and an operation processing speed, according to at least one example embodiment.

Referring toFIG. 3, the horizontal axis of the graph denotes the supply voltage Vpl245, which is a supply voltage that is provided to the lowest class circuit240. Also, the vertical axis of the graph denotes an operation processing speed of a circuit.

InFIG. 3, a first curve310denotes an operation processing speed of the highest class circuit230according to the supply voltage Vpl245ofFIG. 2. Also, a second curve320denotes an operation processing speed of the lowest class circuit240according to the supply voltage Vpl245ofFIG. 2.

When an input supply voltage Vp350that is provided from the external power source110(ofFIG. 1) is constant, a supply voltage Vpu235decreases as the supply voltage Vpl245ofFIG. 2increases, and the supply voltage Vpu235increases as the supply voltage Vpl245decreases. Changes of the operation processing speed of the highest class circuit230and the operation processing speed of the lowest class circuit240based on the supply voltage Vpl245ofFIG. 2will be described for convenience with reference toFIG. 3.

Referring to the first curve310, as the supply voltage Vpl245ofFIG. 2increases, the supply voltage Vpu235decreases, and accordingly, the operation processing speed of the highest class circuit230decreases. Also, when the supply voltage Vpl245is V2340, the supply voltage Vpu235may have a threshold voltage of the highest class circuit230, and the operation processing speed of the highest class circuit230is 0.

Referring to the second curve320, a change of the operation processing speed of the lowest class circuit240has an opposite trend to the change of the operation processing speed of the highest class circuit230. For example, the operation processing speed of the lowest class circuit240is 0 during a section in which the supply voltage Vpl245increases from 0 to V1330which is a threshold voltage of the lowest class circuit240. Also, the operation processing speed of the lowest class circuit240increases during a section in which the supply voltage Vpl245increases beyond the threshold voltage of the lowest class circuit240.

As described above with reference toFIG. 2, when an operation throughput of the lowest class circuit240is constant, as an operation throughput of the highest class circuit230increases, the supply voltage Vpu235provided to the highest class circuit230may decrease, and the supply voltage Vpl245provided to the lowest class circuit240may increase. Accordingly, when the operation throughput of the lowest class circuit240is constant, and the operation throughput of the highest class circuit230increases, the operation processing speed of the highest class circuit230may decrease, and the operation processing speed of the lowest class circuit240may increase.

Also, when the operation processing speed of the lowest class circuit240is constant, as the operation throughput of the highest class circuit230decreases, the supply voltage Vpu235provided to the highest class circuit230may increase, and the supply voltage Vpl245provided to the lowest class circuit240may decrease. Accordingly, the operation processing speed of the highest class circuit230may increase, and the operation processing speed of the lowest class circuit240may decrease.

FIG. 4is a diagram of an example input signal and a modeling circuit for describing a factor that influences power consumption of a circuit, according to at least one example embodiment.

A circuit that constitutes an integrated circuit may include a transistor, and the transistor may be modeled as a circuit including a switch that operates according to an input signal and a capacitor.

A power source450ofFIG. 4may provide a supply voltage Vpx to a modeling circuit400. The modeling circuit400may include two switches S1420and S2430that are open and closed based on a received input signal VI. The modeling circuit400may include a capacitor410having a capacitance C. The capacitance C of the capacitor410may denote complexity of a circuit. For example, as complexity of a circuit increases, the capacitor C of the capacitor410of the modeling circuit400may increase.

The input signal VI may be a digital input signal which is a sequence of a high voltage VH or a low voltage VL. For example, the low voltage VL may be 0 V.

Referring toFIG. 4, a graph460denotes the input signal VI according to time. The input signal VI may have a certain cycle T, and may have the high voltage VH and the low voltage VL that are alternately repeated during the same period T/2. Accordingly, a reciprocal 1/T of the cycle T of the input signal VI having the high voltage VH and the low voltage VL that are alternately repeated may denote a change frequency of the input signal VI.

While the input signal VI is the high voltage VH, the switch S1420may be closed and the switch S2430may be open. Also, while the input signal VI is the low voltage VL, the switch S1420may be open and the switch S2430may be closed.

In a section where time passes from 0 to T/2, electric charges of C×Vpx, which is the amount of electric charges proportional to a voltage Vc440of both ends of the capacitor410, are accumulated in the capacitor410, and in a section where time passes from T/2 to T, the electric charges accumulated in the capacitor410are discharged through a ground part.

During one cycle T, the amount of electric charges provided from the power source450to a circuit is C×Vpx. Thus, an average current that flows from the power source450may be C×Vpx/T, and an average power provided from the power source450may be C×Vpx2/T. Accordingly, based on the law of conservation of energy, power consumption of the circuit may be C×Vpx2/T, which is the same as the average power provided from the power source450.

Accordingly, power consumption of the circuit may be proportional to a square of the input supply voltage Vp that the circuit receives, complexity of the circuit, and a change frequency of the input signal VI. In this regard, when the change frequency of the input signal VI of the circuit and the complexity of the circuit are constant, power consumption of the circuit may decrease as the supply voltage Vpx provided to the circuit decreases.

FIG. 5is a diagram for describing a relationship between a change frequency of an input signal that is input to each of a plurality of classes of circuits and a supply voltage that is distributed to each of a plurality of circuits, according to at least one example embodiment.

Referring toFIG. 5, a first modeling circuit500is a circuit resulting from modeling of an example of the highest class circuit230ofFIG. 2. Also, a second modeling circuit540is a circuit resulting from modeling of an example of the lowest class circuit240ofFIG. 2.

A supply voltage Vpu505that is provided to the first modeling circuit500corresponds to the supply voltage Vpu235that is provided to the highest class circuit230ofFIG. 2. Also, a supply voltage Vpl545that is provided to the second modeling circuit540corresponds to the supply voltage Vpl245that is provided to the lowest class circuit240ofFIG. 2.

The first modeling circuit500may include a first capacitor510having a first capacitance C1. Also, the second modeling circuit540may include a second capacitor550having a second capacitance C2. As described above with reference toFIG. 4, the first capacitance C1may denote system complexity of the highest class circuit230ofFIG. 2corresponding to the first modeling circuit500. Also, the second capacitance C2may denote system complexity of the lowest class circuit240ofFIG. 2corresponding to the second modeling circuit540.

Referring toFIG. 5, a graph580denotes a first input signal VI1that is received by the first modeling circuit500. Also, a graph585denotes a second input signal VI2that is received by the second modeling circuit540.

The first modeling circuit500may include a switch S1520and a switch S2525. The opening and closing of the switch S1520and the opening and closing of the switch S2525may be determined based on the first input signal VI1. For example, while the first input signal VI1is the high voltage VH, the switch S1520may be closed and the switch S2525may be open. Also, while the first input signal VI1is the low voltage VL, the switch S1520may be open and the switch S2525may be closed.

The second modeling circuit540may include a switch S3560and a switch S4565. The opening and closing of the switch S3560and the opening and closing of the switch S4565may be determined based on the second input signal VI2. For example, while the second input signal VI2is the high voltage VH, the switch S3560may be closed and the switch S4565may be open. Also, while the second input signal VI2is the low voltage VL, the switch S3560may be open and the switch S4565may be closed.

Referring toFIG. 5, a change frequency of the first input signal VI1may be greater than that of the second input signal VI2. Referring to the graph580, a cycle of the first input signal VI1is T, and the first input signal VI1changes from the high voltage VH to the low voltage VL or from the low voltage VL to the high voltage VH every T/2. Referring to a graph585, the second input signal VI2maintains the high voltage VH and does not change.

Since the second input signal VI2ofFIG. 5maintains the high voltage VH, the switch S3560of the second modeling circuit540may be kept closed, and the switch S4565may be kept open. Also, at a first phase where the first input signal VI1is the high voltage VH, the switch S1520may be closed and the switch S2525may be open. Also, at a second phase where the first input signal VI1is the low voltage VL, the switch S1520may be open and the switch S2525may be closed.

At the first phase, as the supply voltage Vpu505, which is a portion of the supply voltage Vp, is provided from a power source590, electric charges may be accumulated in the first capacitor510from the power source590. Also, as electric charges are accumulated in the first capacitor510, a voltage Vc1530of both ends of the first capacitor510may increase.

At the second phase, the electric charges accumulated in the first capacitor510may travel via a path that is connected as the switch S2525and the switch S3560are closed, and thus, may be accumulated in the second capacitor550. In this regard, as the electric charges of the first capacitor510are discharged, the voltage Vc1530of both ends of the first capacitor510may decrease.

As the first phase and the second phase are alternately repeated, the amount of electric charges accumulated in the second capacitor550may increase, and accordingly, a voltage Vc2570of both ends of the second capacitor550may increase. In this regard, as the second capacitance C2of the second capacitor550increases, an increase in the voltage Vc2570of both ends of the second capacitor550that increases as electric charges travel from the first capacitor510and are accumulated in the second capacitor550may decrease.

Referring toFIG. 5, since the switch S3560is closed, the supply voltage Vpl545that is provided to the second modeling circuit540and the voltage Vc2570of both ends of the second capacitor550are the same as each other. Accordingly, as the second capacitance C2of the second capacitor550increases, an increase in the supply voltage Vpl545that increases as electric charges travel from the first capacitor510and are accumulated in the second capacitor550may decrease.

Also, as the first phase and the second phase are alternately repeated, the supply voltage Vpl545that is provided to the second modeling circuit540may increase. In this regard, since a total of the supply voltage Vpu505that is provided to the first modeling circuit500and the supply voltage Vpl545that is provided to the second modeling circuit540is constant as the input supply voltage Vp of the power source590, the supply voltage Vpu505may decrease as the supply voltage Vpl545increases.

Accordingly, when a change frequency of the first input signal VI1that is received by the first modeling circuit500corresponding to the highest class circuit230ofFIG. 2is greater than that of the second input signal VI2that is received by the second modeling circuit540, the supply voltage Vpu505that is provided to the first modeling circuit500may decrease, and the supply voltage Vpl545that is provided to the second modeling circuit540may increase.

FIG. 6is a diagram of an integrated circuit600according to another embodiment. The integrated circuit600ofFIG. 6is an example of the integrated circuit100ofFIG. 1.

Referring toFIG. 6, the integrated circuit600may include a highest class circuit630, a middle class circuit640and a middle class circuit650belonging to different middle classes, and a lowest class circuit660. Thus, according to at least some example embodiments, each of circuits630-660is a assigned to a different class from among a plurality of classes, and the plurality of classes may be ranked from a lowest class (e.g., the class to which the circuit660is assigned) to a highest class (e.g., the class to which the circuit630is assigned).

The integrated circuit600may receive the input supply voltage Vp through the positive power supply terminal111(ofFIG. 1) and the negative power supply terminal112(ofFIG. 1) of the external power source110(ofFIG. 1), the positive power supply terminal111having the voltage Vdd and the negative power supply terminal112having the voltage Vss.

The highest class circuit630, the middle class circuit640, the middle class circuit650, and the lowest class circuit660may respectively include positive power supply terminals631,641,651, and661and negative power supply terminals632,642,652, and662.

Also, the highest class circuit630, the middle class circuit640, the middle class circuit650, and the lowest class circuit660may perform operation processing by respectively using received input signals633,643,653, and663and thus may generate output signals634,644,654, and664.

The positive power supply terminal631of the highest class circuit630may be connected to the positive power supply terminal111(ofFIG. 1) of the external power source110(ofFIG. 1). Also, a negative power supply terminal of each of the circuits belonging to a class other than the lowest class circuit may be connected to a positive power supply terminal of an adjacent lower class circuit.

For example, the negative power supply terminal632of the highest class circuit630may be connected to the positive power supply terminal641of the middle class circuit640. Also, the positive power supply terminal641of the middle class circuit640may be connected to the negative power supply terminal632of the highest class circuit630, and the positive power supply terminal651of the middle class circuit650may be connected to the negative power supply terminal642of the middle class circuit640, which is an adjacent upper class circuit. Also, the positive power supply terminal661of the lowest class circuit660may be connected to a negative power supply terminal of an adjacent upper class circuit (not shown). Also, the negative power supply terminal662of the lowest class circuit660may be connected to the negative power supply terminal112(ofFIG. 1) of the external power source110(ofFIG. 1).

The highest class circuit630may receive a supply voltage Vp1635which is at least a portion of a supply voltage provided from the external power source110(ofFIG. 1) based on an operation throughput. Also, the lowest class circuit660may receive a supply voltage Vp4665which is at least a portion of the part of the supply voltage provided from the external power source110(ofFIG. 1) that excludes the supply voltage Vp1635provided to the highest class circuit630. Also, the middle class circuit640may receive a supply voltage Vp2645which is at least a portion of the part of the supply voltage provided from the external power source110(ofFIG. 1) that excludes the supply voltage Vp1635and the supply voltage Vp4665. Also, the middle class circuit650may receive a supply voltage Vp3655which is at least a portion of the part of the supply voltage provided from the external power source110(ofFIG. 1) that excludes the supply voltage Vpl635, the supply voltage Vp4665, and the supply voltage Vp2645.

A distribution ratio between the supply voltage Vp1635, the supply voltage Vp2645, the supply voltage Vp3655, and the supply voltage Vp4665respectively distributed and provided to the highest class circuit630, the middle class circuit640, the middle class circuit650, and the lowest class circuit660from the supply voltage provided from the external power source110(ofFIG. 1) may be determined based on respective operation throughputs of the highest class circuit630, the middle class circuit640, the middle class circuit650, and the lowest class circuit660. Also, the respective operation throughputs of the highest class circuit630, the middle class circuit640, the middle class circuit650, and the lowest class circuit660are determined based on change frequencies of the input signals633,643,653, and663respectively received by the highest class circuit630, the middle class circuit640, the middle class circuit650, and the lowest class circuit660.

A distribution ratio between the supply voltages635,645,655, and665respectively provided to the plurality of classes of circuits630,640,650, and660may be determined based on a ratio between the change frequencies of the input signals633,643,653, and663respectively received by the plurality of classes of circuits630,640,650, and660. For example, a supply voltage of a circuit that receives an input signal having a relatively high change frequency may decrease.

Also, the distribution ratio between the supply voltage Vp1635, the supply voltage Vp2645, the supply voltage Vp3655, and the supply voltage Vp4665respectively distributed and provided to the highest class circuit630, the middle class circuit640, the middle class circuit650, and the lowest class circuit660from the supply voltage provided from the external power source110(ofFIG. 1) may be determined based on respective system complexities of the highest class circuit630, the middle class circuit640, the middle class circuit650, and the lowest class circuit660.

FIG. 7is a diagram of an integrated circuit700including the plurality of classes of circuits630,640,650, and660and a complex class circuit670belonging to at least two different classes, according to at least one example embodiment. The integrated circuit700ofFIG. 7is an example of the integrated circuit100ofFIG. 1.

Referring toFIG. 7, the integrated circuit700may include the highest class circuit630, the middle class circuit640, the middle class circuit650, and the lowest class circuit660illustrated inFIG. 6. RegardingFIG. 7, repeated descriptions of the highest class circuit630, the middle class circuit640, the middle class circuit650, and the lowest class circuit660will be replaced with the corresponding descriptions given with reference toFIG. 6.

A positive power supply terminal671of the complex class circuit670may be connected to the positive power supply terminal641of the middle class circuit640belonging to a first class except the lowest class circuit660from among the plurality of classes of circuits630,640,650, and660. Also, a negative power supply terminal672of the complex class circuit670may be connected to the negative power supply terminal652of the middle class circuit650belonging to a second class which is a lower class circuit than the middle class circuit640belonging to the first class from among the plurality of classes of circuits630,640,650, and660.

The complex class circuit670may receive a supply voltage Vp5675which is at least a portion of the part of a supply voltage provided from the external power source110(ofFIG. 1) that excludes a supply voltage provided to a circuit belonging to an higher class than the class of the circuit640(i.e., the first class) and excludes a supply voltage provided to a circuit belonging to a lower class than the class of the circuit650(i.e., the second class).

The supply voltage Vp5675according to at least one example embodiment may be determined based on at least one of an operation throughput of the middle class circuit640, an operation throughput of the middle class circuit650, and an operation throughput of the complex class circuit670. For example, the supply voltage Vp5675may decrease as at least one of the operation throughput of the middle class circuit640, the operation throughput of the middle class circuit650, and the operation throughput of the complex class circuit670increases.

The operation throughput of the complex class circuit670depends on a change frequency of an input signal673received by the complex class circuit670. For example, as the change frequency of the input signal673increases, the operation throughput of the complex class circuit670may increase.

FIG. 8is a diagram of an integrated circuit800including the plurality of classes of circuits630,640,650, and660and a single class circuit680, according to at least one example embodiment. The integrated circuit800ofFIG. 8is an example of the integrated circuit100ofFIG. 1.

Referring toFIG. 8, the integrated circuit800may include the highest class circuit630, the middle class circuit640, the middle class circuit650, and the lowest class circuit660illustrated inFIG. 6. RegardingFIG. 8, repeated descriptions of the highest class circuit630, the middle class circuit640, the middle class circuit650, and the lowest class circuit660will be replaced with the corresponding descriptions given with reference toFIG. 6.

Referring toFIG. 8, the integrated circuit800may include the single class circuit680. A positive power supply terminal681of the single class circuit680may be connected to the positive power supply terminal111(ofFIG. 1) of the external power source110(ofFIG. 1). Also, a negative power supply terminal682of the single class circuit680may be connected to the negative power supply terminal112(ofFIG. 1) of the external power source110(ofFIG. 1).

A supply voltage that is provided to the single class circuit680may be the same as a supply voltage of the external power source110(ofFIG. 1). Also, a range of an output signal674of the single class circuit680may be greater than that of an output signal of each of the plurality of classes of circuits.

The supply voltage Vp1635, the supply voltage Vp2645, the supply voltage Vp3655, and the supply voltage Vp4665that are distributed and provided to the highest class circuit630, the middle class circuit640, the middle class circuit650, and the lowest class circuit660may be determined independently of an operation throughput of the single class circuit680.

FIG. 9is a diagram of an integrated circuit900including a plurality of classes of circuits930,940,950, and960, a voltage supply of which is controlled through switches970and980, according to at least one example embodiment. The integrated circuit900ofFIG. 9is an example of the integrated circuit100ofFIG. 1.

The integrated circuit900may receive the input supply voltage Vp through the positive power supply terminal111(ofFIG. 1) and the negative power supply terminal112(ofFIG. 1) of the external power source110(ofFIG. 1), the positive power supply terminal111having the voltage Vdd and the negative power supply terminal112having the voltage Vss.

The integrated circuit900may include the plurality of classes of circuits930,940,950, and960. For example, the plurality of classes of circuits930,940,950, and960may be core circuits. According to at least some example embodiments, each of circuits930-960is assigned to a class from among a plurality of classes, and the plurality of classes may be ranked from a lowest class to a highest class. For example, in the example illustrated inFIG. 9, the plurality of classes includes at least two classes: a highest class and a lowest class. Further, in the example illustrated inFIG. 9, circuits930and940are assigned to the highest class and circuits950and960are assigned to the lowest class.

For example, the integrated circuit900may include a plurality of circuits930and940belonging to the highest class and a plurality of circuits950and960belonging to the lowest class.

Positive power supply terminals931and941of the plurality of circuits930and940belonging to the highest class may be connected to each other. Also, the positive power supply terminals931and941of the plurality of circuits930and940belonging to the highest class may be connected to the positive power supply terminal111(ofFIG. 1) of the external power source110(ofFIG. 1).

Negative power supply terminals932and942of the plurality of circuits930and940belonging to the highest class may be connected to each other. Also, the negative power supply terminals932and942of the plurality of circuits930and940belonging to the highest class may be connected to a positive power supply terminal of an adjacent lower class circuit.

Positive power supply terminals951and961of the plurality of circuits950and960belonging to the lowest class may be connected to each other. Also, the positive power supply terminals951and961of the plurality of circuits950and960belonging to the lowest class may be connected to a negative power supply terminal of an adjacent upper class circuit, for example, the negative power supply terminals932and942of the plurality of circuits930and940belonging to the highest class. Negative power supply terminals952and962of the plurality of circuits950and960belonging to the lowest class may be connected to each other. Also, the negative power supply terminals952and962of the plurality of circuits950and960belonging to the lowest class may be connected to the negative power supply terminal112(ofFIG. 1) of the external power source110(ofFIG. 1).

The integrated circuit900may include the switches970and980for connecting the positive power supply terminals931,941,951, and961and the negative power supply terminals932,942,952, and962of the circuits930,940,950, and960belonging to the plurality of classes. For example, the integrated circuit900may include the switch970for connecting the positive power supply terminals931and941and the negative power supply terminals932and942of the circuits930and940belonging to the highest class. Also, the integrated circuit900may include the switch980for connecting the positive power supply terminals951and961and the negative power supply terminals952and962of the circuits950and960belonging to the lowest class.

Supply voltages that are respectively provided to the circuits930,940,950, and960belonging to the plurality of classes may be adjusted according to whether the switches970and980are open or closed.

For example, when the switch970is closed, and the switch980is open, the supply voltage Vp provided from the external power source110(ofFIG. 1) may all be provided to the circuit950and the circuit960belonging to the lowest class. When the switch970is open, and the switch980is closed, the supply voltage Vp provided from the external power source110(ofFIG. 1) may all be provided to the circuit930and the circuit940belonging to the highest class.

The opening and closing of the switch970and the switch980may be determined based on whether the plurality of classes of circuits930,940,950, and960perform operation processing. For example, the integrated circuit900may be configured to control the switch970in such a manner that, when the circuit930and the circuit940belonging to the highest class do not perform operation processing, the switch970may be closed. Also, the integrated circuit900may be configured to control the switch980in such a manner that, when the circuit950and the circuit960belonging to the lowest class do not perform operation processing, the switch980may be closed.

Also, when at least one of the circuit930and the circuit940belonging to the highest class and at least one of the circuit950and the circuit960belonging to the lowest class perform operation processing, both of the switch970and the switch980may be open. In this regard, a distribution ratio between supply voltages that are distributed and provided to the circuits930and940belonging to the highest class and the circuits950and960belonging to the lowest class from the supply voltage of the external power source110(ofFIG. 1) may be determined based on an operation throughput of the circuits930and940belonging to the highest class and an operation throughput of the circuits950and960belonging to the lowest class.

FIG. 10is a diagram of a system for providing power to an integrated circuit1000, according to at least one example embodiment. The integrated circuit1000ofFIG. 10is an example of the integrated circuit100ofFIG. 1.

The system may include the integrated circuit1000and the power source110for providing power to the integrated circuit1000.

The power source110may provide the input supply voltage Vp to the integrated circuit1000through the positive power supply terminal111having the voltage Vdd and the negative power supply terminal112having the voltage Vss. For example, the negative power supply terminal112of the power source110may be connected to a ground voltage.

The integrated circuit1000may include a plurality of circuits, for example, the highest class circuit230and the lowest class circuit240. For example, the plurality of circuits, for example, the highest class circuit230and the lowest class circuit240, may be core circuits.

The plurality of circuits, for example, the highest class circuit230and the lowest class circuit240, may receive the input supply voltage Vp from the power source110through the positive power supply terminals231and241and the negative power supply terminals232and242, respectively.

Referring toFIG. 10, the integrated circuit1000may include the highest class circuit230and the lowest class circuit240. Also, the highest class circuit230and the lowest class circuit240may be core circuits that perform operation processing independently of each other.

The positive power supply terminal231of the highest class circuit230may be connected to the positive power supply terminal111of the power source110. Also, the negative power supply terminal232of the highest class circuit230may be connected to the positive power supply terminal241of the lowest class circuit240, which is an adjacent lower class circuit. Also, the negative power supply terminal242of the lowest class circuit240may be connected to the negative power supply terminal112of the power source110.

The highest class circuit230may receive the supply voltage Vpu235which is at least a portion of the supply voltage Vp provided from the power source110based on an operation throughput. Also, the lowest class circuit240may receive the supply voltage Vpl245, which is at least a portion of the part of the supply voltage Vp provided from the power source110that excludes the supply voltage Vpu235provided to the highest class circuit230.

A distribution method of the supply voltage Vpu235and the supply voltage Vpl245is the same as described above with reference toFIG. 2, and thus, a repeated description thereof will be omitted from the description ofFIG. 10.

FIG. 11is a flowchart of a method of providing power to the integrated circuit100, according to at least one example embodiment.

In operation1110, an operation throughput of the highest class circuit230may be determined. The highest class circuit230may be a core circuit. For example, the operation throughput of the highest class circuit230may be determined by a processor that distributes input signals.

The operation throughput of the circuit may be determined based on the input signal233received by the highest class circuit230. Also, the operation throughput of the highest class circuit230may be determined based on a change frequency of the input signal233.

The change frequency of the input signal233during a desired or, alternatively, predetermined period may be determined. For example, the operation throughput of the circuit may be determined based on a frequency at which the input signal233is changed from the low voltage VL to the high voltage VH or from the high voltage VH to the low voltage VL during a desired or, alternatively, predetermined period.

In operation1120, the supply voltage Vpu235, which is at least a portion of a supply voltage, may be provided to the highest class circuit230based on the operation throughput of the highest class circuit230.

The supply voltage Vpu235may be determined based on the operation throughput of the highest class circuit230. For example, as the operation throughput of the highest class circuit230increases, the supply voltage Vpu235may decrease. Also, as the change frequency of the input signal233received by the highest class circuit230increases, the supply voltage Vpu235may decrease.

In operation1130, the supply voltage Vpl245, which is at least a portion of the part of the supply voltage provided from the external power source110(ofFIG. 1) that excludes the supply voltage Vpu235may be provided to the lowest class circuit240.

A distribution ratio between the supply voltage Vpu235and the supply voltage Vpl245from the supply voltage of the external power source110(ofFIG. 1) may be determined based on the operation throughput of the highest class circuit230and an operation throughput of the lowest class circuit240. For example, when a ratio of the operation throughput of the highest class circuit230to the operation throughput of the lowest class circuit240is high, a ratio of the supply voltage Vpu235to the supply voltage Vpl245may increase.

At least some of the example embodiments of the inventive concepts described above may be implemented by one or more processors executing computer programs. For example, according to at least some example embodiments, the computer programs executed by the one or more processors may include a plurality of computer-executable instructions corresponding to operations described above with respect to at least some example embodiments. According to at least some example embodiments, the computer programs may be stored on a computer-readable recording medium. Also, a structure of data used in at least some example embodiments of the inventive concepts may be recorded on the computer-readable recording medium through various means. Examples of the computer-readable recording medium include magnetic storage media (e.g., ROM, floppy disks, hard disks, etc.), optical recording media (e.g., CD-ROMs, DVDs, etc.), etc.