Calibration system and method

A calibration system is disclosed. The calibration system includes a waveform generator configured to generate a periodic waveform and a control circuit in signal communication with the waveform generator. The control circuit includes an analog-to-digital converter configured to convert the periodic waveform to digital values and an electronic device in signal communication with the analog-to-digital converter. The electronic device is configured to verify calibration of (1) timing of the control circuit and (2) voltage levels of the control circuit based on the periodic waveform.

FIELD

This application discloses an invention which is related, generally and in various aspects, to systems and methods of calibrating devices, circuits and/or systems.

BACKGROUND

It is now more common for nuclear power plants to utilize one or more field-programmable gate arrays (FPGAs) in at least one of their various control circuits. In addition to including one or more FPGAs, such control circuits also include other devices/components such as, for example, sensors, input/outputs cards, analog-to digital converters and processors to monitor and/or control the operation of the nuclear power plant. In general, output signals generated by the sensors, which are indicative of a sensed or measured parameter, are input to input/output cards, which are connected to an FPGA, which in turn can be connected to a processor. For instances where an output signal generated by a sensor is an analog signal, an analog-to-digital converter is utilized to convert the analog signal to a corresponding digital signal. In various configurations, the analog-to-digital conversion can be performed by the input/output card, by an analog-to-digital converter connected to the input/output card, or by the FPGA.

In some nuclear power plant control circuits, several of these devices/components are packaged together in an electronic device such as, for example, the CompactRIO (cRIO) controller manufactured National Instruments. In applications where the electronic device provides only a monitoring function, a digital value output by the FPGA of the electronic device may be input to a computer system or other processing device that aggregates the outputs of multiple FPGAs. In applications where the electronic device functions as a controller, the electronic device may perform a control function based on the output signal of one or more of the sensors (or on other conditions).

In order to ensure that such control circuits are operating properly, the calibration of the control circuit can be verified. In particular, the calibration of the timing of the control circuit and the calibration of the analog voltages present within the control circuit can be verified. If the calibrations of either the timing or the analog voltages are not verified, the calibrations can be adjusted so that the control circuit is in proper calibration going forward. Known processes for verification and calibration are time consuming processes. For example, one known process includes verifying the timing of the control circuit and then individually injecting multiple different voltage levels to verify the analog voltages present within the control circuit. Similar processes are currently utilized to verify calibrations of devices and/or systems.

There is room for improvement in systems and methods of calibrating devices, circuits and/or systems.

DETAILED DESCRIPTION

It is to be understood that at least some of the figures and descriptions of the invention have been simplified to illustrate elements that are relevant for a clear understanding of the invention, while eliminating, for purposes of clarity, other elements that those of ordinary skill in the art will appreciate may also comprise a portion of the invention. However, because such elements are well known in the art, and because they do not facilitate a better understanding of the invention, a description of such elements is not provided herein.

It is further understood that any one or more of the teachings, expressions, aspects, embodiments, examples, etc. described herein may be combined with any one or more of the other teachings, expressions, aspects, embodiments, examples, etc. that are described herein. The following described teachings, expressions, aspects, embodiments, examples, etc. should therefore not be viewed in isolation relative to each other. Various suitable ways in which the teachings herein may be combined will be readily apparent to those of ordinary skill in the art in view of the teachings herein. Such modifications and variations are intended to be included within the scope of the claims.

Before explaining the various aspects of the calibration system in detail, it should be noted that the various aspects disclosed herein are not limited in their application or use to the details of construction and arrangement of parts illustrated in the accompanying drawings and description. Rather, the disclosed aspects may be positioned or incorporated in other aspects, embodiments, variations and modifications thereof, and may be practiced or carried out in various ways. Accordingly, aspects of the calibration system disclosed herein are illustrative in nature and are not meant to limit the scope or application thereof. Furthermore, unless otherwise indicated, the terms and expressions employed herein have been chosen for the purpose of describing the aspects for the convenience of the reader and are not meant to limit the scope thereof. In addition, it should be understood that any one or more of the disclosed aspects, expressions of aspects, and/or examples thereof, can be combined with any one or more of the other disclosed aspects, expressions of aspects, and/or examples thereof, without limitation.

Also, in the following description, it is to be understood that terms such as inward, outward, upward, downward, above, top, below, floor, left, right, side, interior, exterior and the like are words of convenience and are not to be construed as limiting terms. Terminology used herein is not meant to be limiting insofar as devices described herein, or portions thereof, may be attached or utilized in other orientations. The various aspects will be described in more detail with reference to the drawings.

FIG.1illustrates a calibration system10, in accordance with at least one aspect of the present disclosure. The calibration system10will be described in the context of its use to calibrate a control circuit12of a nuclear power plant. However, it will be appreciated that the calibration system10can be utilized to calibrate any number of different devices (an FPGA, a computer, a programmable logic controller, an input/output circuit, etc.), circuits and/or systems. The calibration system10includes a waveform generator14and a controller16. The controller16includes an input/output circuit18, an analog-to-digital (A/D) converter20and an FPGA22. According to various aspects, the calibration system10may also include a processor24connected to the FPGA22.

The waveform generator14is configured to generate one or more waveforms. For example, according to various aspects, the waveform generator14may be configured to generate one or more waveforms such as triangular waves, sine waves, square waves, sawtooth waves, etc. of different amplitudes over a wide range of frequencies. An exemplary triangular wave generated by the waveform generator14is shown inFIG.2, where the triangular wave is a 1 Hz, 0-10V triangular wave. An exemplary sine wave generated by the waveform generator14is shown inFIG.3, where the sine wave is a 0.5 Hz, 0-10V sine wave. Of course, different frequencies, amplitudes and/or waveforms other than those shown inFIGS.2and3may be generated by the waveform generator14. As shown inFIG.1, the waveform generator14is connected to (in signal communication with) the control circuit12. More specifically, the waveform generator14is connected to (in signal communication with) the input/output circuit18of the controller16.

The input/output circuit18is configured to receive analog signals at its input terminals (not shown for purposes of clarity). For example, the input/output circuit18may receive analog signals from a sensor26. Although only one sensor26is shown inFIG.1, it will be appreciated that the input/output circuit18may receive analog signals from a plurality of sensors26such as, for example, flow sensors, position sensors, pressure sensors, temperature sensors, etc. According to various aspects, the input/output circuit18may include any number of input/output cards (analog I/O cards, digital I/O cards and/or mixed I/O cards) and may be configured to accommodate both analog and digital inputs/outputs. For example, according to various aspects, the input/output circuit18is further configured to output a control signal to an actuator28. Although only one actuator28is shown inFIG.1, it will be appreciated that the input/output circuit18may output control signals to a plurality of actuators28to control a valve, a motor, a pump, etc.

The A/D converter20is connected to (in signal communication with) the input/output circuit18, and is configured to convert the analog signals received from the input/output circuit18into corresponding digital signals or digital values which are representative of the analog signals. Although only one A/D converter20is shown inFIG.1for purposes of clarity, it will be appreciated that the controller16may include any number of A/D converters20. For example, according to various aspects, the controller16includes a separate A/D converter20for each analog input/output card in the input/output circuit18. According to various aspects, the A/D converter20forms a part of the input/output circuit18.

The FPGA22is connected to (in signal communication with) the A/D converter20, and is configured to process the digital signals and/or digital values received from the A/D converter20. According to various aspects, the A/D converter20forms a part of the FPGA22. In addition to performing signal processing, the FPGA22may also be utilized for control, filtering, timing and/or other logic functions. As shown inFIG.1, according to various aspects, the FPGA22also includes a processor30which is in signal communication with the FPGA22. The processor30may be utilized for communication, signal processing and/or executing algorithms or routines which are stored in a memory associated with the processor30. The processor30can execute one or more such algorithms or routines to implement and control the functionality of the FPGA22. According to various aspects, the processor30interprets the digital signals or digital values output by the A/D converter20and responsively causes the FPGA22to output one or more digital signals. Such signals may be control signals to control one or more components of the control circuit12and/or informational signals to provide information such as a characteristic sensed by an analog sensor26. According to various aspects, the FPGA22, or the combination of the FPGA22and the processor30, may be considered a processing circuit.

The processor24can be in signal communication with the processor30, and may be utilized, for example, to format information provided by the processor30(e.g., information associated with an analog sensor26connected to the input/output circuit18) so that the information can be displayed on a monitor (not shown) connected to the processor24.

In order to ensure that certain control circuits employed in nuclear power plants or other applications are operating properly, the calibration of the control circuit can be verified by a calibration algorithm or routine executed by the processor30of the FPGA22. With the calibration algorithm or routine, the processor30can verify the timing and voltage levels of the control circuit12based on a waveform generated by the waveform generator14. For example, the sampling rate of the analog signals received by the input/output circuit18can be utilized to verify the timing of the control circuit12and the voltage levels of the analog signals received by the input/output circuit18can be utilized to verify the voltage levels of the control circuit12. If the calibrations of either the timing or the analog voltages are not verified, the calibrations can be adjusted so that the control circuit12is in proper calibration going forward. For example, with respect to the timing of the control circuit12, loop times utilized by the FPGA22can be adjusted to bring the timing into proper calibration. According to other aspects, the calibration or routine can be executed by a processing circuit other than the FPGA22and the processor30.

According to various aspects, to calibrate the control circuit12, a periodic waveform generated by the waveform generator14is input to the input/output circuit18. The waveform may be input to a test terminal block (not shown) of the input/output circuit18. The processor30initiates the execution of the calibration algorithm or routine. The calibration algorithm or routine may be initiated automatically, such as in response to receiving the periodic waveform at a particular input of the input/output circuit18(e.g. a test terminal block), or manually in response to an input or command from a user or device.

Information indicating the type of periodic waveform, the frequency of the periodic waveform and various voltage test points on the periodic waveform may be stored in a memory accessible by the processor30. According to various aspects, information indicating threshold tolerances for the timing and for each of the voltage test points may also be stored in the memory accessible by the processor30. The information may be stored in the memory when the FPGA22is programmed, such as at time of manufacture. However, it will be appreciated that the FPGA22programming can be subsequently updated.

As part of the calibration algorithm or routine, the processor30is configured to verify that the timing of the control circuit12is within a predetermined threshold tolerance. According to various aspects, the analog signal of the periodic waveform is sampled, and the sampled analog values are converted to digital signals or digital values by the A/D converter20. The digital signals or digital values are provided to the FPGA22and in turn to the processor30. The processor30utilizes the digital signals or digital values to determine the frequency of the periodic waveform. The processor30can then compare the determined frequency of the periodic waveform with the known frequency of the periodic waveform stored in the memory. If the determined frequency is within the predetermined threshold tolerance of the known frequency, the timing calibration of the control circuit12is considered to be verified. For example, if the periodic waveform has a known frequency of 1 Hz and the predetermined threshold tolerance is 1%, the timing calibration of the control circuit12will be considered to be verified if the determined frequency is within 1% of the known frequency of 1 Hz.

However, if the determined frequency is not within the predetermined threshold tolerance, the FPGA22(or the processor30of the FPGA22) can be utilized to adjust the calibration of the timing (e.g., by adjusting loop times utilized by the FPGA22) to bring the timing into proper calibration (i.e., within the predetermined threshold tolerance).

As part of the calibration algorithm or routine, the processor30is also configured to verify that each of the sampled voltage levels along the periodic waveform is within a predetermined threshold tolerance. Once the timing of the control circuit12has been verified or brought into proper calibration, the processor30can utilize the verified timing to verify each of the sampled voltage levels along the periodic waveform is within the predetermined threshold tolerance. For example, voltage levels associated with a 0-10V periodic waveform such as the triangular wave ofFIG.2include 0V, 2.5V, 5V, 7.5V, and 10V. Because the timing of the control circuit12and the frequency of the periodic waveform are known, the calibration algorithm or routine knows when these voltage levels should occur in the periodic waveform. For the 1 Hz, 0-10V triangular wave ofFIG.2, the amplitude of the periodic waveform should be 5V at 0.25 s and at 0.75s after the start of a period of the waveform, as is shown for example inFIG.2. Since the timing has been verified or brought into proper calibration as described above, the processor30can utilize the digital signals or digital values corresponding to each of the sampled voltage levels at specific times to compare the sampled voltage values with the expected voltage values. If the sampled voltage values are each within the predetermined threshold tolerance of the expected voltage values, the voltage value calibration of the control circuit12is considered to be verified.

However, if any of the sampled voltage values are not within the predetermined threshold tolerance of the expected voltage values, the FPGA22(or the processor30of the FPGA22) can be utilized to adjust the calibration of the voltage values (e.g., by adjusting the amplitude of analog signals at the input/output circuit18) to bring the voltage values into proper calibration (i.e., within the predetermined threshold tolerance). It will be appreciated that any number of voltage levels may be sampled and verified or adjusted, and that any predetermined threshold tolerance (e.g., 0.25%, 0.5%, 1%, etc.) may be utilized for the verification or calibration process. In general, a given predetermined threshold tolerance will be set on a case-by-case basis.

When the control circuit12is properly calibrated, the timing and voltage levels it utilizes to make control decisions are accurate to the extent they are within the predetermined threshold tolerances of the known/expected timing and voltage levels. If the predetermined threshold tolerance for a given application is 1% and the control circuit12interprets an actual 2.5V analog signal as being a 2.8V analog signal, the control circuit12is not properly calibrated and a control operation based on the interpreted voltage level could be unintended, improper and/or unsafe. For these and other reasons, verifying proper calibration and/or adjusting calibration have calibration become part of ongoing maintenance in nuclear plants or other applications. By utilizing the calibration algorithm or routine as described above, the time taken to verify and/or adjust the calibrations are significantly reduced. For example, the control circuit12can use as little as one period of a periodic waveform received from the waveform generator14to calibrate itself or verify its own calibration, greatly increasing the speed of the calibration process. As a facility such as a nuclear plant may include numerous control circuits12that need calibrated, increasing the speed of calibration significantly reduces maintenance time.

FIG.4illustrates a method40of calibrating a control circuit, in accordance with at least one aspect of the present disclosure. Although the method40is described in the context of calibrating the control circuit12, it will be appreciated that the method40may be utilized to calibrate any number of different devices (an FPGA, a computer, a programmable logic controller, an input/output circuit, etc.), circuits and/or systems. The method40may be implemented using the calibration system10or other similar systems. For purposes of simplicity, the implementation of the method40will be described in the context of the control circuit12.

For the method40, a periodic waveform is generated42by, for example, the waveform generator14. The periodic waveform is input44to an analog input of the input/output circuit18. The analog signal of the periodic waveform is sampled46by the FPGA22, and the sampled analog values are converted48to digital signals or digital values by the A/D converter20.

The digital signals or digital values are utilized by the processor30to determine50the frequency of the periodic waveform. The processor30compares52the determined frequency to the known frequency of the periodic waveform. If the determined frequency is within a predetermined threshold tolerance of the known frequency, the timing of the control circuit12is considered to be properly calibrated. If the determined frequency is not within the predetermined threshold tolerance of the known frequency, the timing of the control circuit12is adjusted to bring the timing into proper calibration.

After the calibration of the timing of the control circuit12has been verified or adjusted to be brought into proper calibration, the digital signals or digital values corresponding to the various sampled voltage levels along the periodic waveform and the known frequency of the periodic waveform are utilized by the processor30to compare54each of the sampled voltage levels along the periodic waveform with the expected voltage levels (the calibration algorithm or routine knows when the expected voltage levels should occur in the periodic waveform). If each of the various sampled voltage levels is within a predetermined threshold tolerance of the expected voltage levels, the voltage levels of the control circuit12are considered to be properly calibrated. If each of the various sampled voltage levels is not within a predetermined threshold tolerance of the expected voltage levels, the voltage levels of the control circuit12are adjusted to bring the voltage levels into proper calibration. The plurality of voltage levels can be compared to the expected voltage levels sequentially or in parallel.

The above-described method40may be repeated periodically or continuously, and may be repeated any number of times.

EXAMPLES

Example 1—A calibration system is provided. The calibration system comprises a waveform generator configured to generate a periodic waveform and a control circuit in signal communication with the waveform generator. The control circuit comprises an analog-to-digital converter configured to convert the periodic waveform to digital values and an electronic device in signal communication with the analog-to-digital converter. The electronic device is configured to verify calibration of (1) timing of the control circuit and (2) voltage levels of the control circuit based on the periodic waveform.

Example 2—The calibration system of Example 1, wherein the periodic waveform comprises a triangular wave.

Example 3—The calibration system of Example 1, wherein the periodic waveform comprises a sine wave.

Example 4—The calibration system of Examples 1, 2 or 3, wherein the electronic device comprises a field-programmable gate array.

Example 5—The calibration system of Examples 1, 2, 3 or 4, wherein the analog-to-digital converter forms a part of the electronic device.

Example 6—The calibration system of Examples 1, 2, 3, 4 or 5, wherein the control circuit further comprises an input/output circuit connected to the analog-to-digital converter.

Example 7—The calibration system of Examples 1, 2, 3, 4, 5 or 6, wherein the input/output circuit forms a part of the electronic device.

Example 8—The calibration system of Examples 1, 2, 3, 4, 5, 6 or 7, wherein the control circuit further comprises a processor in signal communication with the electronic device.

Example 9—The calibration system of Example 8, wherein the processor forms a part of the electronic device.

Example 10—The calibration system of Examples 1, 2, 3, 4, 5, 6, 7, 8 or 9, wherein the calibration system further comprises a processor in signal communication with the control circuit.

Example 11—An electronic device is provided. The electronic device comprises an analog-to-digital converter configured to convert a periodic waveform to digital values and a processing circuit in signal communication with the analog-to-digital converter. The processing circuit is configured to verify calibration of (1) timing of the electronic device and (2) voltage levels of the electronic device based on the periodic waveform.

Example 12—The electronic device of Example 11, wherein the processing circuit comprises a field-programmable gate array.

Example 13—The electronic device of Examples 11 or 12, wherein the processing circuit further comprises a processor.

Example 14—The electronic device of Examples 11, 12 or 13, further comprising an input/output circuit in signal communication with the analog-to-digital converter.

Example 15—A calibration method is provided. The calibration method comprises generating a periodic waveform, inputting the generated periodic waveform into an electronic device, calibrating timing of the electronic device based on the inputted periodic waveform and calibrating voltage levels in the electronic device based on the inputted periodic waveform.

Example 16—The calibration method of Example 15, wherein calibrating timing of the electronic device based on the inputted periodic waveform comprises determining a frequency of the inputted periodic waveform.

Example 17—The calibration method of Example 16, wherein calibrating timing of the electronic device based on the inputted periodic waveform further comprises comparing the determined frequency of the inputted periodic waveform with a known frequency.

Example 18—The calibration method of Example 17, wherein calibrating timing of the electronic device based on the inputted periodic waveform further comprises determining whether the determined frequency of the inputted periodic waveform is within a threshold tolerance of the known frequency.

Example 19—The calibration method of Examples 15, 16, 17 or 18, wherein calibrating voltage levels in the electronic device based on the inputted periodic waveform comprises comparing sampled voltage levels of the inputted periodic waveform with expected voltage levels.

Example 20—The calibration method of Examples 19, wherein calibrating voltage levels in the electronic device based on the inputted periodic waveform further comprises determining whether each of the sampled voltage levels of the inputted periodic waveform is within a threshold tolerance of the expected voltage levels.

Although the various aspects of the calibration system10and calibration method40have been described herein in connection with certain disclosed aspects, many modifications and variations to those aspects may be implemented. Also, where materials are disclosed for certain components, other materials may be used. Furthermore, according to various aspects, a single component may be replaced by multiple components, and multiple components may be replaced by a single component, to perform a given function or functions. The foregoing description and the appended claims are intended to cover all such modifications and variations as falling within the scope of the disclosed aspects.

While this invention has been described as having exemplary designs, the described invention may be further modified within the spirit and scope of the disclosure. This application is therefore intended to cover any variations, uses, or adaptations of the invention using its general principles. For example, although the invention was described in the context of a control circuit12, the general principles of the invention are equally applicable to any type of device, circuit and/or system which converts analog signals into digital values. Similarly, although the invention was also described in the context of a nuclear power plant, the general principles of the invention are also equally applicable to applications other than nuclear power plants.