Method for fabricating a liquid-crystal-based electro-optical light modulator using surface MEMS techniques for flat panel display inspection

An electro-optic modulator is a liquid-crystal-based electro-optical light modulator. The liquid-crystal-based electro-optical light modulator is fabricated using surface Micro-electromechanical Systems (MEMS) techniques. The electro-optical light modulator is used for inspecting flat panel displays or the like. Utilizing surface MEMS techniques for fabrication considerably thins the electro-optic modulator and allows the use of pure liquid crystal without the need for thick containment plates.

TECHNICAL FIELD

The present invention generally relates to electro-optics, and more particularly to liquid crystal materials for use in electro-optic applications.

BACKGROUND

Electro-optic modulators using liquid crystals, particularly nematic curvilinear aligned phases (NCAP) films or polymer dispersed liquid crystal (PDLC) films, for modulation are used to test conduction of thin-film transistors and interconnects of flat panel displays (FPD) under fabrication. The electro-optic modulators are fabricated mechanically with thick, stacked subcomponents of glues, NCAP film on Mylar™, pellicle dielectric mirror, and hard coat using mechanical processes.

The electro-optic modulators lends themselves to a high degree of variability and performance compromises leading to increased noise, decreased dynamic range, and lower sensitivity. For example, the NCAP films with 12- or 25-micron thickness will have 20% thickness variation. Therefore, it would be advantageous to provide a device, system, and method that cures the shortcomings described above.

SUMMARY

An electro-optic modulator is described, in accordance with one or more embodiments of the present disclosure. The electro-optic modulator comprises a glass substrate. The electro-optic modulator comprises a transparent electrode disposed on the glass substrate. The electro-optic modulator comprises a first alignment layer disposed on the transparent electrode. The electro-optic modulator comprises a liquid crystal layer disposed on the first alignment layer. The electro-optic modulator comprises a second alignment layer disposed on the liquid crystal layer. The electro-optic modulator comprises a polymer layer disposed on the second alignment layer. The electro-optic modulator comprises a plurality of polymer studs. The plurality of polymer studs extend through at least a portion of the liquid crystal layer. The plurality of polymer studs mechanically support the polymer layer. The electro-optic modulator comprises a dielectric mirror disposed on the polymer layer. The electro-optic modulator comprises a hard coat layer disposed on the dielectric mirror.

In some embodiments, the liquid crystal layer includes a thickness of between 2 and 5 micrometers.

In some embodiments, the liquid crystal layer is not a nematic curvilinear aligned phases or a polymer dispersed liquid crystal.

In some embodiments, the plurality of polymer studs extend from the polymer layer through the second alignment layer and at least the portion of the liquid crystal layer.

In some embodiments, the electro-optic modulator comprises a plurality of alignment studs. The plurality of alignment studs extend from the second alignment layer up to the first alignment layer. The plurality of polymer studs extend through at least the portion of the liquid crystal layer up to the alignment studs. The plurality of polymer studs are disposed on the plurality of alignment studs.

In some embodiments, the electro-optic modulator comprises an anti-reflective coating. The glass substrate is disposed on the anti-reflective coating.

In some embodiments, the plurality of polymer studs extend from the second alignment layer through the liquid crystal layer up to the first alignment layer. The plurality of polymer studs are separated from the polymer layer by the second alignment layer.

In some embodiments, the plurality of polymer studs each include a width of less than 1.4 micrometers and a thickness of between 2 and 5 micrometers.

In some embodiments, the plurality of polymer studs each include a sidewall angle of between 83 and 93 degrees.

In some embodiments, the transparent electrode comprises at least one of indium tin oxide (ITO) or silver nanowire.

In some embodiments, the first alignment layer and the second alignment layer each comprise at least one of silicon oxynitride or silicon dioxide.

In some embodiments, the first alignment layer and the second alignment layer each include a refractive index between 1.51 and 1.55.

In some embodiments, the polymer layer and the plurality of polymer studs each comprise a crosslinked polymer.

In some embodiments, the dielectric mirror has greater than 80% reflectance for light with a wavelength between 570 to 670 nm.

In some embodiments, the dielectric mirror is a stack of repeating layers of silicon nitride and silicon dioxide.

In some embodiments, the dielectric mirror is a stack of repeating layers of zirconium oxide and silicon dioxide.

In some embodiments, the electro-optic modulator comprises an epoxy seal. The epoxy seal seals the liquid crystal layer between the first alignment layer and the second alignment layer.

An imaging system is described, in accordance with one or more embodiments of the present disclosure. The imaging system comprises an illumination source configured to generate illumination. The imaging system comprises a stage for a sample. The imaging system comprises a detector to generate an image of at least a portion of the sample. The imaging system comprises an electro-optic modulator disposed in a path of the illumination from the illumination source and separated from the sample by an air gap. The electro-optic modulator comprises a glass substrate. The electro-optic modulator comprises a transparent electrode disposed on the glass substrate. The electro-optic modulator comprises a first alignment layer disposed on the transparent electrode. The electro-optic modulator comprises a liquid crystal layer disposed on the first alignment layer. The electro-optic modulator comprises a second alignment layer disposed on the liquid crystal layer. The electro-optic modulator comprises a polymer layer disposed on the second alignment layer. The electro-optic modulator comprises a plurality of polymer studs. The plurality of polymer studs extend through at least a portion of the liquid crystal layer. The plurality of polymer studs mechanically support the polymer layer. The electro-optic modulator comprises a dielectric mirror disposed on the polymer layer. The electro-optic modulator comprises a hard coat layer disposed on the dielectric mirror.

An electro-optic modulator is described, in accordance with one or more embodiments of the present disclosure. The electro-optic modulator comprises a glass substrate. The electro-optic modulator comprises a transparent electrode disposed on the glass substrate. The electro-optic modulator comprises a first alignment layer disposed on the transparent electrode. The electro-optic modulator comprises a liquid crystal layer disposed on the first alignment layer. The electro-optic modulator comprises a second alignment layer disposed on the liquid crystal layer. The electro-optic modulator comprises a plurality of alignment studs. The plurality of alignment studs extend from the second alignment layer through the liquid crystal layer up to the first alignment layer. The electro-optic modulator comprises a dielectric mirror disposed on the second alignment layer. The electro-optic modulator comprises a plurality of dielectric studs. The plurality of dielectric studs extend from the dielectric mirror through a first portion of the liquid crystal layer up to the plurality of alignment studs. The plurality of dielectric studs are disposed on the plurality of alignment studs. The electro-optic modulator comprises a polymer layer disposed on the dielectric mirror. The electro-optic modulator comprises a plurality of polymer studs. The plurality of polymer studs extend from the polymer layer through the dielectric mirror, the second alignment layer, and a second portion of the liquid crystal layer up to the plurality of dielectric studs. The plurality of polymer studs are disposed on the plurality of dielectric studs.

In some embodiments, the liquid crystal layer includes a thickness of between 2 and 5 micrometers.

In some embodiments, the liquid crystal layer is not a nematic curvilinear aligned phases or a polymer dispersed liquid crystal.

DETAILED DESCRIPTION OF THE INVENTION

Embodiments of the present disclosure are generally directed to electro-optic modulators, methods for fabricating the electro-optic modulators, and imaging systems using the electro-optic modulators. The electro-optic modulators are liquid-crystal-based electro-optical light modulator. The liquid-crystal-based electro-optical light modulator is fabricated using surface Micro-electromechanical Systems (MEMS) techniques. The electro-optical light modulator is used for inspecting flat panel displays or the like. Utilizing surface MEMS techniques for fabrication considerably thins the electro-optic modulator and allows use of pure liquid crystal without the need for thick containment plates.

Referring now toFIG.1A-1B, an electro-optic (EO) modulator100is described, in accordance with one or more embodiments of the present disclosure. The electro-optic modulator100may also be referred to as an electro-optical light modulator, a liquid-crystal based electro-optical light modulator, and the like. The electro-optic modulator100is a flat-panel display (FPD) Spatial Light modulator (SLM). The electro-optic modulator100is a narrow gap device with two dielectric layers separated by polymer studs and an integrated dielectric mirror.

The electro-optic modulator100may include one or more films, layers, or coatings. The one or more film layers selectively permit the transmissivity of light. For example, the electro-optic modulator100may include one or more layers, such as, but not limited to, anti-reflective coating102, glass substrate104, transparent electrode106, alignment layer108, liquid crystal layer110, alignment stud112, polymer studs114, epoxy seal115, alignment layer116, polymer layer118, dielectric mirror120, hard coat layer122, and the like.

In some embodiments, the electro-optic modulator100includes the anti-reflective coating102. The anti-reflective coating102may also be referred to as a dielectric anti-reflective stack of layers.

In some embodiments, the electro-optic modulator100includes the glass substrate104. The glass substrate104may include a BK-7 glass, or the like. The glass substrate104is disposed on the anti-reflective coating102.

In some embodiments, the electro-optic modulator100includes the transparent electrode106. The transparent electrode106may also be referred to as a transparent conductive layer. The transparent electrode106is disposed on the glass substrate104. The transparent electrode106may include any conductive coating that is transparent at the wavelengths of interest. For example, the transparent electrode106may include a material, such as, but not limited to, indium tin oxide (ITO), silver nanowires, conductive polythiophene, carbon nanotubes. The material can be applied to the glass substrate via sputtering and masking techniques, or the like. The transparent electrode106may include a thickness. For example, the transparent electrode106may include a thickness of between 1600 and 1700 Å. In some embodiments, the transparent electrode106may include a thickness of between 1600 and 1700 Å with <1.8% variation over the transparent electrode106. The transparent electrode106may capacitively couple with a sample to induce a localized voltage and similarly an electric field. The localized voltage may generate the electric field.

In some embodiments, the electro-optic modulator100includes the alignment layer108. The alignment layer108is disposed on the transparent electrode106. The alignment layer108is a dielectric. The alignment layer108is disposed between the liquid crystal layer110and the transparent electrode106. By being a dielectric and disposed between the liquid crystal layer110and the transparent electrode106, the alignment layer108insulates the liquid crystal layer110from the transparent electrode106. The alignment layer108includes a refractive index (n). For example, the alignment layer108may include a refractive index of between 1.51 and 1.55. The alignment layer108may include any material which is a dielectric and which includes the desired refractive index. In some embodiments, the alignment layer108is a silicon oxynitride (SiOxNy). In some embodiments, the alignment layer108is a silicon dioxide (SiO2). The alignment layer108includes a thickness. For example, the alignment layer108may include a thickness of between 230 and 270 Å. An alignment layer may generally refer to a layer which assists in aligning the liquid crystal layer110. An alignment layer may also be referred to as a photo-responsive layer, as the alignment layer is formed of a photo-responsive material. The photo-responsive material may be photo-patterned to create the alignment layers for the liquid crystal material.

In some embodiments, the alignment layer108is etched. The alignment layer108is etched with one or more grooves (not depicted). The grooves may also be referred to as continuous nano-trenches, lines, or the like. The grooves may be fabricated by etching, plasma ash, and stripping. In some embodiments, the grooves are etched with a depth. For example, the grooves may be etched with a depth of 200 Å. In some embodiments, the grooves define a checkerboard pattern in the alignment layer108. The alignment layer108includes a line spacing (LS). The line spacing is a distance between the grooves. In some embodiments, the line spacing may be 350 nm or smaller. In some embodiments, the line spacing may be 120 nm or smaller. In some embodiments, the line spacing may be 110 nm or smaller. Although the electro-optic modulator100is described as including the alignment layer108, this is not intended as a limitation of the present disclosure. It is contemplated that the transparent electrode106may be etched with one or more grooves.

In some embodiments, the electro-optic modulator100includes the liquid crystal layer110. The liquid crystal layer110is disposed on the alignment layer108. In some embodiments, the liquid crystal layer110is vacuum inserted between the alignment layer108and the alignment layer116or filled by capillary action. In some embodiments, the liquid crystal layer110is discontinuous. The alignment studs112and the polymer studs114extend through the liquid crystal layer110.

The liquid crystal layer110may sense an electric field. The optical properties of the liquid crystal layer110change when an electrical field is applied across the liquid crystal. Intensity of light transmitted through the liquid crystal layer110is modulated by variations in the electric field strength across the liquid crystal layer110. Light transmission through the liquid crystal layer110may change in accordance with a magnitude of an electric field applied to the liquid crystal layer110. The electric field causes the liquid crystal layer110to align in the direction of the electric field.

In some embodiments, the liquid crystal layer110is pure liquid crystal. The pure liquid crystal is a nematic liquid crystal. The liquid crystal layer110is homogeneously aligned when an electric field is not present. The liquid crystal layer110is homogeneously aligned when an electric field is not present due to the alignment layer108and the alignment layer116. The liquid crystal layer110is not a polymer/liquid-crystal composite layer. For example, the liquid crystal layer110is not a nematic curvilinear aligned phases (NCAP) or a polymer dispersed liquid crystal (PDLC). In this regard, the liquid crystals in the liquid crystal layer110are not encapsulated as droplets in a polymer. The liquid crystal layer110includes a thickness. For example, the liquid crystal layer110includes a thickness of between 2 and 5 micrometers (um). The liquid crystal layer110is significantly thinner than a polymer/liquid-crystal composite NCAP or PDLC material. By utilizing pure liquid crystal rather than NCAP or PDLC, modulator sensitivity and defect-detectability should be significantly enhanced. Thus, the electro-optic modulator100provides higher sensitivity and throughput in detecting defects during flat-panel display manufacturing.

In some embodiments, the electro-optic modulator100includes the alignment studs112. The alignment studs112are disposed on or below the alignment layer108. The alignment studs112separate the polymer studs114and the liquid crystal layer110. In some embodiments, the alignment studs112are used as a form to fabricate the polymer studs114. The alignment studs112extend from the alignment layer108up to the alignment layer116. The alignment studs112may include a thickness. For example, the alignment studs112may include a thickness of 0.3 um+/−0.012 um. The alignment studs112define one or more openings between the alignment studs112. The liquid crystal layer110is added to the electro-optic modulator100by the openings. In some embodiments, the openings are sealed by glue. For example, the openings may be sealed by UV curable glue, epoxy or the like.

In some embodiments, the electro-optic modulator100includes the polymer studs114. The polymer studs114may include a corrosive-resistant material. The polymer studs114are made with photo-responsive polymers that can be cross-linked. For example, the polymer studs114may include, but is not limited to polyimide (PI).

The polymer studs114mechanically support the polymer layer118. For example, the polymer studs114bear the weight of the polymer layer118into the alignment layer108. In some embodiments, the polymer studs114bear the weight of the polymer layer118into the alignment layer108through the alignment studs112. The polymer studs114extend through at least a portion of the liquid crystal layer110. In some embodiments, the polymer studs114extend from the polymer layer118. The polymer studs114extend from the polymer layer118through the alignment layer116and at least a portion of the liquid crystal layer110. In some embodiments, the polymer studs114extend through at least a portion of the liquid crystal layer110up to the alignment studs112. In some embodiments, the polymer studs114are disposed on the alignment studs112.

The polymer studs114may include a width. The width of the polymer studs114may be based on the width of support structures211subtracted by twice the thickness of the alignment studs112(e.g., for both sides of the polymer studs114). The polymer studs114include a width of less than 1.4 um. In some embodiments, the polymer studs114include a width of between 0.776 and 0.824 um. The electro-optic modulator100includes a pitch between the polymer studs114. The pitch defines the distance between a center of one of the studs114to a center of an adjacent of the studs114. In some embodiments, the electro-optic modulator100includes a pitch between the polymer studs114of between 10 and 20 urn. In some embodiments, the polymer studs114include a thickness. For example, the polymer studs114may include a thickness of between 2 and 5 urn. In some embodiments, the polymer studs114include a sidewall angle. The sidewall angle of the polymer studs114may be between 83 and 93 degrees. A sidewall angle of 90 degrees is orthogonal to the alignment layer108. The polymer studs114may be considered to include a re-entrant profile and/or utilize bread-loafing.

In some embodiments, the electro-optic modulator100includes the epoxy seal115. The epoxy seal115may also be referred to as a glue seal. The epoxy seal115seals the liquid crystal layer110between the alignment layer108and the alignment layer116. The epoxy seal115is disposed around the edges of the liquid crystal layer110. The epoxy seal115seals the liquid crystal layer110, preventing egress of the liquid crystal material. The epoxy seal115is disposed in openings defined between the polymer studs114.

In some embodiments, the electro-optic modulator100includes the alignment layer116. The alignment layer116is disposed on or below the liquid crystal layer110. The alignment layer116is a dielectric. The alignment layer116includes a refractive index (n). For example, the alignment layer116may include a refractive index of between 1.51 and 1.55. The alignment layer116may include any material which is a dielectric and which includes the desired refractive index. In some embodiments, the alignment layer116is a silicon oxynitride (SiOxNy). In some embodiments, the alignment layer116is a silicon dioxide (SiO2). The alignment layer116includes a thickness. For example, the alignment layer116may include a thickness of between 2880 and 3120 Å. By way of another example, the alignment layer116may include a thickness of between 285 and 315 Å.

In some embodiments, the electro-optic modulator100includes the polymer layer118. The polymer layer118may also be referred to as a polymer layer, a polymer membrane, or the like. The polymer layer118is disposed on the alignment layer116. The alignment layer108and the alignment layer116are between the polymer layer118and the glass substrate104. The polymer layer118may include a corrosive-resistant material. The polymer layer118is made with photo-responsive polymers that can be cross-linked. For example, the polymer layer118may include, but is not limited to polyimide (PI). The polyimide is high cross-linked to survive a corrosive environment. The polymer layer118includes a thickness. For example, the polymer layer118includes a thickness of between 4 and 6 um. Thus, the polymer layer118and the polymer studs114each includes a crosslinked polymer, such as a polyimide.

In some embodiments, the electro-optic modulator100includes the dielectric mirror120. The dielectric mirror120may also be referred to as a pellicle dielectric mirror, a quarter-wave mirror, or the like. The dielectric mirror120is disposed or coated on the polymer layer118. In some embodiments, the dielectric mirror120is adhered to the polymer layer118by carbonyl bonds. The dielectric mirror120has reflectance for light with a desired wavelength. For example, the dielectric mirror120has greater than 80% reflectance for light with a wavelength between 570 to 670 nm. The dielectric mirror120may include a thickness. For example, the dielectric mirror120has a thickness of about 1 um. For instance, the dielectric mirror120may have a thickness between 0.9 um and 1.1 um.

The dielectric mirror is a multilayer dielectric mirror. The multilayer dielectric mirror includes a first material and a second material. The dielectric mirror120may start from a first material layer and end on a second material layer. In this regard, the dielectric mirror120may be coated as follows: first material layer, second material layer, . . . first material layer. The dielectric mirror120may include any number of the first material layers and the second material layers. For example, the dielectric mirror120may include six of the first material layers and five of the second material layers for a total of eleven layers. The first material layers and the second material layers each include a thickness. The thicknesses are dependent on the index of the dielectric mirror120. In some embodiments, the first material layers have a thickness of 790 Å+1-10%. In some embodiments, the second material layers have a thickness of 1070 Å+1-10%. The first material and second material may include any suitable material. For example, the dielectric mirror may be a silicon nitride (SiNx)/silicon dioxide (SiO2) multilayer dielectric mirror. The silicon nitride may be the first material and the silicon dioxide may be the second material. By way of another example, the dielectric mirror120may be a zirconium dioxide (ZrO2)/silicon dioxide (SiO2) multilayer dielectric mirror. The zirconium dioxide may be the first material and the silicon dioxide may be the second material. By way of another example, the dielectric mirror120may be Hafnium oxide (HfO2) and the second material may be silicon oxide. In some embodiments, the first material may be any element from group 4B of the periodic table.

In some embodiments, the dielectric mirror120includes a pellicle. The pellicle may be disposed adjacent to the polymer layer118.

In some embodiments, the electro-optic modulator100includes the hard coat layer122. The hard coat layer122is disposed on the dielectric mirror120. The hard coat layer122protects the dielectric mirror120. The hard coat layer122is a photo-definable hard coat. In some embodiments, the hard coat layer122comprises an organic hard coating. The hard coat layer122may comprise components of the hard coat described in U.S. Pat. No. 7,099,067. The hard coat layer122includes a thickness. For example, the hard coat layer122includes a thickness of between 2.37 and 5 um. The hard coat layer122includes a hardness. In some embodiments, the hard coat layer122includes a hardness of over 5H pencil hardness. The hard coat layer122may include a major hard coating and a thinner slip agent layer.

Referring now toFIGS.2A-2N, a method200is described, in accordance with one or more embodiments of the present disclosure. The method may also be referred to as a process of manufacturing an electro-optic modulator. The embodiments and the enabling technologies described previously herein in the context of the electro-optic modulator100should be interpreted to extend to the method. It is further noted, however, that the method is not limited to the architecture of the electro-optic modulator. The method200is a one-piece fabrication technique in which silicon (Si) or silicon germanium (SiGe) are used as a sacrificial layer on glass substrate plus as a release.

In a step202, the glass substrate104is provided. The glass substrate104is disposed on the anti-reflective coating102.

In a step204, the transparent electrode106is deposited on the glass substrate104by sputter deposition.

In a step206, the alignment layer108is deposited on the transparent electrode106. The alignment layer108is deposited on the transparent electrode106by chemical vapor deposition (CVD). For example, the alignment layer108is deposited on the transparent electrode106by plasma-enhanced chemical vapor deposition (PECVD).

The step may also include patterning one or more grooves in the alignment layer108. The one or more grooves are patterned by etching, plasma-ash, and stripping. For example, the one or more grooves may be patterned by a 248 nm phase-shifting mask (PSM), 193 nm photolithography, or the like.

In a step208, sacrificial layers209are deposited. The sacrificial layers209include a sacrificial layer209adeposited on the alignment layer108. The sacrificial layers209include a sacrificial layer209bdeposited under the antireflective coating102. The sacrificial layers209are deposited by CVD. For example, the sacrificial layers209are deposited by PECVD, low pressure chemical vapor deposition (LPCVD), atmospheric pressure chemical vapor deposition (APCVD), or the like. The sacrificial layers209may include amorphous silicon (a-Si), polycrystalline silicon (poly-Si), polycrystalline silicon germanium (poly-SiGe), or the like. In some embodiments, the sacrificial layer209aon the alignment layer108is a-Si deposited by PECVD. In some embodiments, the sacrificial layer209bunder the antireflective coating102is a poly-Si or poly-SiGe, which is deposited by one of LPCVD, PECVD, or APCVD. It is contemplated that depositing the poly-Si and/or poly-SiGe by LPCVD may warp the glass substrate104, such that PECVD or APCVD may be desirable.

The step may include patterning one or more grooves (not depicted) in the sacrificial layer209adisposed on the alignment layer108. The one or more grooves are patterned by etching, plasma-ash, and stripping. For example, the one or more grooves may be patterned by 193 nm photolithography, or the like. The one or more grooves include a line spacing of 120 nm or smaller. The grooves form nano-trenches in the a-Si.

In a step210, support structures211are patterned in the sacrificial layer209adisposed on the alignment layer108. The support structures211are patterned by photolithography, plasma-etch, and stripping. Over-etching from the sacrificial layer209ainto the alignment layer108is permissible. The support structures211provide support when forming the alignment studs112and the polymer studs114. The support structures211include the pitch, width, height, and sidewall angle. For example, the support structures211include a pitch between adjacent of the support structures211of between 10 and 20 um. By way of another example, the support structures211include a width of 1.4 um. By way of another example, the support structures211include a thickness of between 2 and 5 um. By way of another example, the support structures211include a sidewall angle of between 83 and 93 degrees.

In a step212, the alignment studs112and the alignment layer116is deposited on the sacrificial layer209adisposed on the alignment layer108. For example, the alignment studs112are deposited in the support structures211. The alignment studs112and the alignment layer116are deposited by chemical vapor deposition (CVD). For example, the alignment studs112and the alignment layer116are deposited by plasma-enhanced chemical vapor deposition (PECVD). The alignment studs112and the alignment layer116may include a stress. For example, the alignment studs112and the alignment layer116may include a tensile stress of between 50 and 150 MPa.

In a step214, the polymer studs114and the polymer layer118are spun and cured. For example, the polymer studs114are spun into the support structures onto the alignment studs112. By way of another example, the polymer layer118is spun onto the alignment layer116. The polymer studs114and the polymer layer118may be cross-linked by exposure to light. The polymer studs114and the polymer layer118may also be applied with a developer. The developer may remove the portions of the polymer studs114and the polymer layer118which are not cross-linked. The polymer studs114and the polymer layer118are cured at a temperature. The polymer studs114and the polymer layer118are cured at an elevated temperature to reduce shrinkage of the polymer studs114. The shrinkage of the polymer studs114is undesirable as the shrinkage may cause the polymer studs114to separate from the alignment studs112. In some embodiments, the polymer studs114and the polymer layer118are cured at a temperature between 350 and 400 C. In some embodiments, the polymer studs114and the polymer layer118are spun as a liquid polyimide which is then hardened during curing.

In a step216, the dielectric mirror120is deposited on the polymer layer118. The dielectric mirror120is deposited on the polymer layer118by PECVD or sputter deposition. In some embodiments, the dielectric mirror120is deposited on the polymer layer118by forming repeating layers of SiNxand SiO2. In some embodiments, the dielectric mirror120is deposited on the polymer layer118by forming repeating layers of ZrO2and SiO2. The dielectric mirror120may include a stress. For example, the dielectric mirror120may include a tensile stress of between 50 and 150 MPa. In some embodiments, the polymer layer118is pretreated with a CF4/O2etch to form carbonyl bonds on the polymer layer118for improving adhesion of the dielectric mirror120to the polymer layer118.

In a step218, an active area219is patterned from the electro-optic modulator100. The active array219is patterned using photoresist (PR) stripping. The photoresist (PR) stripping is compatible with the polymer layer118. The active area219may also be referred to as a modulation definition. In some embodiments, the active area219is patterned based on a critical dimension (CD) of an array to be tested. The active area219is patterned through the dielectric mirror120, the polymer layer118, the alignment layer116, the sacrificial layer, the alignment layer108. In some embodiments, the active area219is patterned up to the transparent electrode106s. In some embodiments, the active area219is patterned into the transparent electrode106. For example, the active area219may be patterned into up to 500 Å of the transparent electrode106.

In a step220, the hard coat layer122is deposited on the dielectric mirror120. In some embodiments, the hard coat layer122is spun and cured on the dielectric mirror120. The hard coat layer122may be cured using a low-temperature (LT) cure to prevent cracking the dielectric mirror120.

In a step222, the sacrificial layers are removed. The sacrificial layers may removed by taping, sawing, de-taping, backside etching, and release. In some embodiments, the polymer layer118is heavily anchored on the edges to pull the polymer layer118tight from tensile stress. Once the sacrificial layers are removed, the electro-optic modulator100defines a cavity between the alignment layer108and the alignment layer116. The electro-optic modulator100may also define one or more openings. The cavity is accessible through the one or more openings. The one or more openings are defined on the edges of the active area.

In a step224, the liquid crystal layer110is added between the alignment layer108and the alignment layer116. The liquid crystal layer110is added through the one or more openings. In some embodiments, the liquid crystal layer110is added by vacuum insertion or capillary action. For example, the liquid crystal layer110may be added by a capillary action through the cavity. The addition of the liquid crystal layer110by the capillary action through the cavity is unlike lamination methods to fabricated NCAP modulators or PDLC modulators. The step may further include sealing the one or more openings with the epoxy seal115.

Referring now toFIG.3, an electro-optic modulator300is described, in accordance with one or more embodiments of the present disclosure. The discussion of the electro-optic modulator100is incorporated herein by reference in the entirety as to the electro-optic modulator300.

The electro-optic modulator300may include one or more films, layers, or coatings. The one or more film layers selectively permit the transmissivity of light. For example, the electro-optic modulator300may include one or more layers, such as, but not limited to, glass substrate104, transparent electrode106, alignment layer108, liquid crystal layer110, polymer studs114, epoxy seal115, alignment layer116, polymer layer118, dielectric mirror120, hard coat layer122, and the like. The discussion of the glass substrate104, transparent electrode106, alignment layer108, liquid crystal layer110, polymer studs114, epoxy seal115, alignment layer116, polymer layer118, dielectric mirror120, and the hard coat layer122of the electro-optic modulator100is incorporated herein by reference in the entirety as to the electro-optic modulator300. The electro-optic modulator300is unlike the electro-optic modulator100, in that the electro-optic modulator100includes the alignment studs112and the electro-optic modulator300does not include the alignment studs112. The electro-optic modulator300is also unlike the electro-optic modulator100, in that the polymer studs114of the electro-optic modulator100extend from and are not separated from the polymer layer118whereas the polymer studs114of the electro-optic modulator300are separated from the polymer layer118by the alignment layer116.

In some embodiments, the polymer studs114extend from the alignment layer116. The polymer studs114are separated from the polymer layer118by the alignment layer116. Thus, the polymer studs114may or may not extend from the polymer layer118. The polymer studs114extend from the alignment layer116up to the alignment layer108. The polymer studs114are disposed on the alignment layer108. The polymer studs114mechanically support the polymer layer118by bearing the weight of the polymer layer118through the alignment layer116and the polymer studs114to the alignment layer108. In this example, the electro-optic modulator300does not include the alignment studs112. In some embodiments, the polymer studs114extend through all of the liquid crystal layer110. For example, the polymer studs114extend through the liquid crystal layer110up to the alignment layer108.

Referring now toFIGS.4A-4M, a method400is described, in accordance with one or more embodiments of the present disclosure. The method may also be referred to as a process of manufacturing an electro-optic modulator. The embodiments and the enabling technologies described previously herein in the context of the electro-optic modulator100, method200, and electro-optic modulator300should be interpreted to extend to the method. It is further noted, however, that the method is not limited to the architecture of the electro-optic modulator100, method200, and electro-optic modulator300. The method400is a two-piece fabrication technique with a Si substrate which is released and polymeric flip bonding to glass substrate.

In a step402, a silicon nitride (SiNx) layer is deposited on a Si substrate403. The SiNxlayer is deposited by CVD. For example, the SiNxlayer is deposited by106by LPCVD. The SiNxlayer has a thickness. For example, the SiNxlayer has a thickness of 1100 A.

In a step404, the dielectric mirror120is deposited on the SiNxlayer. The dielectric mirror120is deposited by PECVD or sputter deposition. The SiNxlayer forms an initial layer of the dielectric mirror120. The dielectric mirror120is deposited by forming repeating layers of SiNxand SiO2. The dielectric mirror120may include a stress. For example, the dielectric mirror120may include a tensile stress of between 50 and 150 MPa.

In a step406, the polymer layer118is spun and cured. The polymer layer118is spun and cured on the dielectric mirror120. The polymer layer118is cured at a temperature. The polymer layer118are cured at an elevated temperature to reduce stress in the dielectric mirror120due to shrinkage of the polymer layer118. In some embodiments, the polymer layer118is cured at a temperature between 350 and 400 C. In some embodiments, the polymer layer118are spun as a liquid polyimide which is then hardened during curing. The polymer layer118may be spun with a thickness between 3.8 and 4.2 um.

In a step408, the alignment layer116is deposited on polymer layer118. The alignment layer116is deposited by CVD. For example, the alignment layer116is deposited by PECVD. In some embodiments, the alignment layer116is deposited with a thickness. For example, the alignment layer116is deposited with a thickness of between 285 and 315 Å.

The step may also include patterning one or more grooves in the alignment layer116. The one or more grooves are patterned by etching, plasma-ash, and stripping. In some embodiments, the grooves are etched with a depth. For example, the grooves may be etched with a depth of 250 Å. In some embodiments, the grooves define a checkerboard pattern in the alignment layer116. The alignment layer116includes a line spacing (LS). The line spacing is a distance between the grooves. In some embodiments, the line spacing may be 300 nm or smaller. In some embodiments, the line spacing may be 110 nm or smaller.

In a step410, the polymer studs114are deposited on the alignment layer116. In some embodiments, the polymer studs114may be deposited with two masks. In some embodiments, the polymer studs114may be deposited with using an alignment with one mask. In some embodiments, the polymer studs114are postprocessed with a O2/CF4to form carbonyl bonds between the polymer studs114and the alignment layer116for improving adhesion of the polymer studs114to the alignment layer116.

In a step412, the transparent electrode106is deposited on glass substrate104by sputter deposition. In this regard, the glass substrate104is not disposed on the antireflective coating102.

In a step414, the alignment layer108is deposited on the transparent electrode106. The alignment layer108is deposited on the transparent electrode106by chemical vapor deposition (CVD). For example, the alignment layer108is deposited on the transparent electrode106by plasma-enhanced chemical vapor deposition (PECVD). The alignment layer108may need a deep ultraviolet (DUV) polarizer mask to align at a desired period.

The steps of depositing the transparent electrode106on the glass substrate104and depositing the alignment layer108may be performed before, simultaneous with, or after the steps of depositing silicon nitride (SiNx) layer on the Si substrate403, depositing the dielectric mirror120, spinning and curing the polymer layer118, and depositing the alignment layer116on the polymer layer118.

In a step416, the alignment layer108is bonded onto the polymer studs114. The glass substrate104, the transparent electrode106, and the alignment layer108are flipped and aligned onto the polymer studs114. The alignment layer108is bonded onto the polymer studs114by vacuum pressing. The alignment layer108is pressed at a glass transition temperature of the polymer studs114. For example, the polymer studs114may include a glass transition temperature of between 150 and 200 C.

In a step418, the Si substrate is released from the dielectric mirror120. The Si substrate is released from the dielectric mirror120by etching the Si substrate. For example, the Si substrate may be etched by potassium hydroxide (KOH) or the like. The edges of the polymer layer118may be clamped during the edges. In some embodiments, the polymer layer118need patterning and protective layer on edges depending on the clamps and the etching solution.

In a step420, the hard coat layer122is deposited on the dielectric mirror120. In some embodiments, the hard coat layer122is spun and cured on the dielectric mirror120. The hard coat layer122may be cured using a low-temperature (LT) cure to prevent cracking the dielectric mirror120.

In a step422, the liquid crystal layer110is added between the alignment layer108and the alignment layer116. The liquid crystal layer110is added through the one or more openings. In some embodiments, the liquid crystal layer110is added by vacuum or capillary effect insertion. For example, the liquid crystal layer110may be added by a capillary action through the cavity. The addition of the liquid crystal layer110by the capillary action through the cavity is unlike lamination methods to fabricated NCAP modulators or PDLC modulators and will prevent future damage of LC sensor when top mylar is removed during assembly process. The step may further include sealing the one or more openings with the epoxy seal115. In some embodiments, edge trim/sealing may be necessary without an upstream delineation etch.

Referring now toFIG.5, an electro-optic modulator500is described, in accordance with one or more embodiments of the present disclosure. The discussion of the electro-optic modulator100and the electro-optic modulator300is incorporated herein by reference in the entirety as to the electro-optic modulator500.

The electro-optic modulator100may include one or more films, layers, or coatings. The one or more film layers selectively permit the transmissivity of light. For example, the electro-optic modulator100may include one or more layers, such as, but not limited to, anti-reflective coating102, glass substrate104, transparent electrode106, alignment layer108, liquid crystal layer110, alignment stud112, polymer studs114, epoxy seal115, alignment layer116, polymer layer118, dielectric mirror120, hard coat layer122, and the like. The discussion of the anti-reflective coating102, glass substrate104, transparent electrode106, alignment layer108, liquid crystal layer110, alignment stud112, polymer studs114, epoxy seal115, alignment layer116, polymer layer118, dielectric mirror120, and the hard coat layer122of the electro-optic modulator100is incorporated herein by reference in the entirety as to the electro-optic modulator500. The electro-optic modulator500also includes dielectric studs502.

The electro-optic modulator500is like the electro-optic modulator100, with the exception that the electro-optic modulator500has the dielectric mirror120between the alignment layer116and the polymer layer118. The dielectric mirror120is disposed on the alignment layer116. The polymer layer118is disposed on the dielectric mirror120.

The alignment studs112extend from the alignment layer116through the liquid crystal layer110up to the alignment layer108. The alignment studs112are used as a form to fabricate the dielectric studs502.

The electro-optic modulator500includes the dielectric studs502. The dielectric studs502extend from the dielectric mirror120. The dielectric studs502extend from the dielectric mirror120through a first portion of the liquid crystal layer110. The dielectric studs502extend from the dielectric mirror120through the first portion of the up to the alignment studs112. The dielectric studs502are disposed on the alignment studs112. The alignment studs112separate the dielectric studs502and the liquid crystal layer110. The alignment studs112also separate the dielectric studs502and the alignment layer108. The dielectric studs502are used as a form to fabricate the polymer studs114.

The electro-optic modulator500includes the polymer studs114. The polymer studs114extend from the polymer layer118. The polymer studs114extend from the polymer layer118through the dielectric mirror120and the alignment layer116. The polymer studs114extend from the polymer layer118through the dielectric mirror120and the alignment layer116through a second portion of the liquid crystal layer110up to the dielectric studs502. The second portion of the liquid crystal layer110is less than the first portion of the liquid crystal layer110. In this regard, the dielectric studs502extend further into the liquid crystal layer110than the polymer studs114. The polymer studs114are disposed on the dielectric studs502. The dielectric studs502separate the alignment studs112and the polymer studs114.

The electro-optic modulator500may be fabricated by a similar process to the method200. Although the method200is described as including spinning and curing the polymer studs114and the polymer layer118followed by depositing the dielectric mirror120, this is not intended as a limitation of the present disclosure. In some embodiments, the dielectric mirror120may be deposited before spinning and curing the polymer studs114and the polymer layer118. The dielectric mirror120may then include dielectric studs502disposed in the support structure on the alignment studs112. The polymer layer118may then be deposited on the dielectric mirror120and the polymer studs114may then be deposited in the support structure on the dielectric studs502. The steps in this method may be considered a mirror-first process, as opposed to a polymer layer-first process. In some embodiments, the mirror-first process may use a photo-definable polymer layer118.

FIG.6is a conceptual view illustrating an imaging system600, in accordance with one or more embodiments of the present disclosure. For the purposes of the present disclosure, the term ‘imaging system’ is interchangeable with the term ‘imaging tool.’ The imaging system600may also be referred to as an automated optical inspection (AOI) system, a voltage imaging optical system (VIOS), an array checker, and the like.

The imaging system600may generally include any type of imaging tool suitable, such as, but not limited to, voltage imaging. Voltage imaging may be employed to detect and measure defects in flat panel thin film transistors (TFT) arrays. The performance of the TFT array is simulated as if it were assembled into a TFT cell and then the characteristics of the TFT array are measured by indirectly measuring actual voltage distribution on the panel, or so-called voltage imaging, using an electro-optic modulator (100,300,500). The voltage imaging may be performed by the imaging system600. The imaging system600may include one or more components for checking such TFT arrays or other samples.

The electro-optic modulator (100,300,500). may be advantageous for a number of imaging tasks, such as to modulate a light source of the imaging system600to assist in detecting one or more defects of a sample611, such as, but not limited to, thin film transistor (TFT) arrays, liquid crystal display (LCD) panels, OLED panels, and the like. The TFT arrays may be formed on a substrate, such as a clear plate of thin glass. The TFT arrays may include one or more printed layers. The printed layers may be formed on the substrate by a number of processes, such as, but not limited to, one or more material deposition steps, one or more lithography steps, one or more etching steps, and the like. The fabrication may occur in stages, where a material (e.g., indium tin oxide (ITO), etc.) is deposited over a previous layer or on the glass substrate, according to a process pattern. During fabrication, the printed layers are fabricated within selected tolerances to properly construct the final device. The printed layers may exhibit defects which are outside of the selected tolerances. Characteristics of the TFT array may be measured by the imaging system600to detect the defects.

In embodiments, the imaging system600includes an illumination source606to generate illumination608. The illumination608may include one or more selected wavelengths of light including, but not limited to, vacuum ultraviolet radiation (VUV), deep ultraviolet radiation (DUV), ultraviolet (UV) radiation, visible radiation, or infrared (IR) radiation. The illumination source606may further generate illumination608including any range of selected wavelengths. In embodiments, the illumination source606may include a spectrally-tunable illumination source to generate illumination608having a tunable spectrum.

In embodiments, the illumination source606directs the illumination608to a sample611via an illumination pathway609. The illumination pathway609may include one or more lenses612or additional illumination optical components614suitable for modifying and/or conditioning the illumination608. For example, the one or more illumination optical components614may include, but are not limited to, one or more polarizers, one or more filters, one or more beam splitters, one or more diffusers, one or more homogenizers, one or more apodizers, one or more shapers, one or more shutters (e.g., mechanical shutters, electro-optical shutters, acousto-optical shutters, or the like), one or more aperture stops, and/or one or more field stops.

In embodiments, the imaging system600includes the electro-optic modulator100. The electro-optic modulator (100,300,500) is disposed in a path of the illumination608from the illumination source606. The electro-optic modulator (100,300,500) may modulate one or more characteristics of the illumination608. During operation, light transmits through portions of the electro-optical modulator (100,300,500), and defects can be detected by observing changes in the reflected or transmitted light. The electro-optic modulator (100,300,500) is separated from the sample611by an air gap. The electro-optic modulator (100,300,500) may be placed a select number of microns (e.g., between 5-75 microns) above the surface of the sample611(e.g., the TFT array), and a voltage bias is applied across a transparent electrode of a layer of indium tin oxide (hereinafter “ITO”) on a surface of the electro-optic modulator (100,300,500). Thereupon, the electro-optic modulator (100,300,500) capacitively couples to the sample611so that an electric field associated with the sample611is sensed by one or more layers of the electro-optic modulator (100,300,500) (e.g., a layer including liquid crystals). The intensity of incident light transmitted through the liquid crystals of the electro-optic modulator are varied, (i.e., modulated), based on the electric field strength felt by the liquid crystals. For example, in areas where a normal pixel is located, a localized voltage potential is impressed (e.g., a capacitive coupling between the sample611and the electro-optic modulator (100,300,500)) causing one or more films of the electro-optical modulator100to be locally translucent. In the locally translucent regions, light from the light source606is allowed to pass through the electro-optical modulator (100,300,500) and reflect from the sample611, for passing through to a collection pathway622(e.g., for capture by detector604). By way of another example, in areas where no voltage potential is impressed (e.g., no capacitive coupling), one or more films of the electro-optical modulator (100,300,500) remains locally opaque. In the case where the electro-optical modulator (100,300,500) is locally opaque, light from light source606is scattered or otherwise prevented from passing through to the sample611. Thus, a transmission-voltage (T-V) curve may be determined by applying the voltage. The intrinsic switching voltage of the electro-optic modulator100may correspond to the voltage across the electro-optic modulator (100,300,500) at which light transmission through the electro-optic modulator (100,300,500) has a maximum sensitivity to a change in voltage. For example, the switching voltage may correspond to the electric field strength at which a given percentage of liquid crystal molecules are substantially aligned with the electric field allowing for the light transmission.

In embodiments, the sample611includes a thin-film transistor (TFT) array. For example, the sample611may include pixel elements disposed between inactive regions. The sample stage618may include any device suitable for positioning the sample611within the imaging system600.

In embodiments, a detector604is configured to capture radiation emanating from the sample611(e.g., sample light620) through a collection pathway622. For example, the collection pathway622may include, but is not required to include, the electro-optic modulator (100,300,500), a collection lens (e.g., an objective lens), or one or more additional collection pathway lenses624. In this regard, a detector604may receive radiation reflected or scattered (e.g., via specular reflection, diffuse reflection, and the like) from the sample611or generated by the sample611(e.g., luminescence associated with absorption of the illumination608, or the like).

The system600may include, but is not limited to, a controller603. The controller603may include one or more processors and memory, and may include or be coupled to a user interface610.

The collection pathway622may further include any number of collection optical components626to direct and/or modify illumination collected by the electro-optic modulator (100,300,500) including, but not limited to one or more collection pathway lenses624, one or more filters, one or more polarizers, or one or more blocks. Additionally, the collection pathway622may include field stops to control the spatial extent of the sample imaged onto the detector604or aperture stops to control the angular extent of illumination from the sample used to generate an image on the detector604. In another embodiment, the collection pathway622includes an aperture stop located in a plane conjugate to the back focal plane of an optical element to provide telecentric imaging of the sample. In embodiments, the imaging system600includes a beam splitter628oriented such that the electro-optic modulator100may simultaneously direct the illumination608to the sample611and collect radiation emanating from the sample611.

The detector604may include any type of optical detector suitable for measuring illumination received from the sample611. For example, the detector604may include, but is not limited to, a CCD detector, a TDI detector, a photomultiplier tube (PMT), an avalanche photodiode (APD), a complementary metal-oxide-semiconductor (CMOS) sensor, or the like. In another embodiment, the detector604may include a spectroscopic detector suitable for identifying wavelengths of light emanating from the sample611.

In embodiments, the controller603is communicatively coupled to a detector604. The controller603may include one or more processors configured to execute any of various process steps. In embodiments, the controller603is configured to generate and provide one or more control signals configured to perform one or more adjustments to one or more process tools based on image signals613from the detector604.

The one or more processors of the controller603may include any processor or processing element known in the art. For the purposes of the present disclosure, the term “processor” or “processing element” may be broadly defined to encompass any device having one or more processing or logic elements (e.g., one or more micro-processor devices, one or more application specific integrated circuit (ASIC) devices, one or more field programmable gate arrays (FPGAs), or one or more digital signal processors (DSPs)). In this sense, the one or more processors may include any device configured to execute algorithms and/or instructions (e.g., program instructions stored in memory). In one embodiment, the one or more processors may be embodied as a desktop computer, mainframe computer system, workstation, image computer, parallel processor, networked computer, or any other computer system configured to execute a program configured to operate or operate in conjunction with the imaging system600, as described throughout the present disclosure. Moreover, different subsystems of the system600may include a processor or logic elements suitable for carrying out at least a portion of the steps described in the present disclosure. Therefore, the above description should not be interpreted as a limitation on the embodiments of the present disclosure but merely as an illustration. Further, the steps described throughout the present disclosure may be carried out by a single controller or, alternatively, multiple controllers. Additionally, the controller603may include one or more controllers housed in a common housing or within multiple housings. In this way, any controller or combination of controllers may be separately packaged as a module suitable for integration into imaging system600. Further, the controller603may analyze data received from the detector604and feed the data to additional components within the imaging system600or external to the imaging system600.

The memory medium may include any storage medium known in the art suitable for storing program instructions executable by the associated one or more processors. For example, the memory medium may include a non-transitory memory medium. By way of another example, the memory medium may include, but is not limited to, a read-only memory (ROM), a random-access memory (RAM), a magnetic or optical memory device (e.g., disk), a magnetic tape, a solid-state drive and the like. It is further noted that memory medium may be housed in a common controller housing with the one or more processors. In one embodiment, the memory medium may be located remotely with respect to the physical location of the one or more processors and controller. For instance, the one or more processors of controller603may access a remote memory (e.g., server), accessible through a network (e.g., internet, intranet and the like).

In embodiments, the user interface610is communicatively coupled to the controller603. In embodiments, the user interface610may include, but is not limited to, one or more desktops, laptops, tablets, and the like. In embodiments, the user interface610includes a display used to display data of the system600to a user. The display of the user interface610may include any display known in the art. For example, the display may include, but is not limited to, a liquid crystal display (LCD), an organic light-emitting diode (OLED) based display, or a CRT display. Those skilled in the art should recognize that any display device capable of integration with a user interface610is suitable for implementation in the present disclosure. In embodiments, a user may input selections and/or instructions responsive to data displayed to the user via a user input device of the user interface610.

Referring generally again toFIGS.1A-6. It is contemplated that the electro-optic modulator (100,300,500) provides several benefits of NCAP based EO modulators. The electro-optic modulator (100,300,500) improves noise, dynamic range, and defectivity sensitivity as well as lower threshold fields of modulator product to detect defects during flat panel manufacturing. The electro-optic modulator (100,300,500) achieves a desired level of flatness. The electro-optic modulator (100,300,500) reduces part-to-part variation stemming from mechanical fabrication procedures. The electro-optic modulator (100,300,500) includes improved defect detection sensitivity and reduced threshold fields required for defect metrology during fabrication of flat-panel displays.

In some embodiments, the electro-optic modulator (100,300,500) may include an area. For example, the electro-optic modulator (100,300,500) may include an area of 130 mm by 130 mm up to an area of 1 cm by 1 cm.

As used throughout the present disclosure, the term “sample” generally refers to a substrate formed of a semiconductor or non-semiconductor material (e.g., thin filmed glass, or the like). For example, a semiconductor or non-semiconductor material may include, but is not limited to, monocrystalline silicon, gallium arsenide, indium phosphide, or a glass material. A sample may include one or more layers. For example, such layers may include, but are not limited to, a resist (including a photoresist), a dielectric material, a conductive material, and a semiconductive material. Many different types of such layers are known in the art, and the term sample as used herein is intended to encompass a sample on which all types of such layers may be formed. One or more layers formed on a sample may be patterned or un-patterned. For example, a sample may include a plurality of dies, each having repeatable patterned features. Formation and processing of such layers of material may ultimately result in completed devices. Many different types of devices may be formed on a sample, and the term sample as used herein is intended to encompass a sample on which any type of device known in the art is being fabricated. Further, for the purposes of the present disclosure, the term sample and wafer should be interpreted as interchangeable. In addition, for the purposes of the present disclosure, the terms patterning device, mask and reticle should be interpreted as interchangeable.

It is further contemplated that each of the embodiments of the methods described above may include any other step(s) of any other method(s) described herein. In addition, each of the embodiments of the method described above may be performed by any of the systems described herein. In some embodiments, the methods utilize Surface Micro-electromechanical systems (“Surface MEMS”) fabrication techniques available at silicon foundries to produce the electro-optic modulator100.

As used herein, directional terms such as “top,” “bottom,” “over,” “under,” “upper,” “upward,” “lower,” “down,” and “downward” are intended to provide relative positions for purposes of description, and are not intended to designate an absolute frame of reference. Various modifications to the described embodiments will be apparent to those with skill in the art, and the general principles defined herein may be applied to other embodiments