Semiconductor device and manufacturing the same

A semiconductor device capable of attaining the reduction of size is disclosed. The semiconductor device comprises a module substrate having a surface and a back surface, a control chip mounted on the surface of the module substrate, plural chip parts mounted on the surface in adjacency to the control chip, first and second output chips mounted on the back surface of the module substrate, plural lands formed on the back surface of the module substrate, and a seal portion formed of resin to seal the control chip and the plural chip parts, wherein the first and second output chips are larger in the amount of heat generated than the control chip, the heat from the first and second output ships is radiated to a mother board, and packaging parts on the surface side of the module substrate are sealed with only a sealing resin without using a metallic case or the like to attain the reduction in size of the module.

BACKGROUND OF THE INVENTION

The present invention relates to a semiconductor device manufacturing technique and more particularly to a technique applicable effectively to the reduction in size of a semiconductor module wherein semiconductor chips are mounted on both surface and back surface of a wiring substrate.

As an example of a module product (a semiconductor device) with chip parts such as chip capacitor and chip resistor as well as semiconductor chips for bare chip assembly mounted thereon, there has been developed a module called a power amplifier module, which is incorporated in a portable telephone set for example.

As to a semiconductor device (a high frequency integrated circuit device) with semiconductor chips and chip parts mounted thereon, a description thereof is found, for example, in Japanese Published Unexamined Patent Application No. 2000-299427.

In the Japanese Published Unexamined Patent Application No. 2000-299427, there is described a high frequency integrated circuit device of a structure wherein a semiconductor chip and chip parts are mounted on a surface of a multi-layer substrate and another semiconductor chip is mounted on a back surface of the same substrate, and a heat radiation cover formed of a metallic material such as aluminum is attached to the multi-layer substrate, the semiconductor chips and the chip parts being covered with the heat radiation cover.

SUMMARY OF THE INVENTION

However, in the high frequency integrated circuit device disclosed in the Japanese Published Unexamined Patent Application No. 2000-299427, it is necessary that a gap of at least 0.5 to 0.6 mm be ensured between an inner periphery wall of the heat radiation cover and chip parts disposed at the outermost periphery, thus giving rise to the problem that it is impossible to make a further reduction in size of the high frequency integrated circuit device.

More particularly, in a portable electronic device such as a portable telephone set, with a tendency to the reduction in size and thickness of the body of such an electronic device, it is required to make a further reduction in size of a packaging part such as a semiconductor device mounted on the portable electronic device, and therefore the situation where a further reduction in size of the high frequency integrated circuit device cannot be attained poses a problem.

It is an object of the present invention to provide a semiconductor device capable of being fabricated in a reduced size and a method of manufacturing the same.

It is another object of the present invention to provide a semiconductor device which can improve the heat radiation performance of a semiconductor chip, as well as a method of manufacturing the same.

It is a further object of the present invention to provide a semiconductor device which can improve the mounting performance, as well as a method of manufacturing the same.

It is a still further object of the present invention to provide a semiconductor device which can attain the reduction of cost, as well as a method of manufacturing the same.

The above and other objects and novel features of the present invention will become apparent from the following description and the accompanying drawings.

Typical inventions disclosed herein will be outlined below.

In one aspect of the present invention there is provided a semiconductor device comprising a wiring substrate, a first packaging part mounted on a surface of the wiring substrate, a second packaging part mounted on a back surface of the wiring substrate, a plurality of external terminals provided on the back surface of the wiring substrate, and a seal portion formed of resin to seal the first packaging part, the second packaging part being larger in the amount of heat generated than the first packaging part.

In another aspect of the present invention there is provided a method of manufacturing a semiconductor device, comprising the steps of providing a wiring substrate, mounting a first packaging part on a surface of the wiring substrate, mounting a second packaging part on a back surface of the wiring substrate, the second packaging part being larger in the amount of heat generated than the first packaging part, sealing the first packaging part with resin to form a seal portion, and providing external terminals on the back surface of the wiring substrate.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

Embodiments of the present invention will be described in detail hereinunder with reference to the accompanying drawings.

In the following embodiments, if necessary for convenience' sake, a description will be given in a divided manner into plural sections or embodiments, but unless otherwise mentioned, they are not unrelated to each other, but are in a relation such that one is a modification, details, or a supplementary explanation, of a part or the whole of the other.

In the following embodiments, when reference is made to, for example, the number of elements (including the number, numerical values, quantities, and ranges), it is to be understood that no limitation is made to the specific number referred to, but that numbers above and below the specific number are also employable, unless otherwise specified and except the case where a limitation is made to the specific number basically obviously.

In the following embodiments, it goes without saying that the constituent elements thereof (including element steps) are not always essential unless otherwise specified and except the case where they are considered essential basically obviously.

In the following embodiments, when reference is made, for example, to the shapes and positional relations of constituent elements or the like, it is to be understood that those substantially similar or closely similar to the shapes, etc. are also included unless otherwise specified and except the case where they are not so considered basically obviously.

In all of the drawings for explaining the embodiments, members having the same functions are identified by like reference numerals and repeated explanations thereof will be omitted.

FIG. 1is a plan view showing the structure of a power amplifier module as an example of a semiconductor device according to a first embodiment of the present invention,FIG. 2is a sectional view thereof,FIG. 3is a bottom view thereof,FIG. 4is a layout plan view showing an example of layout of packaging parts mounted on a surface side of a wiring substrate in the power amplifier module shown inFIG. 1,FIG. 5is a circuit block diagram showing an example of configuration of a high frequency amplifier circuit incorporated in the power amplifier module shown inFIG. 1,FIG. 6is a comparative data diagram showing an example of chip power and thermal resistance values at various stages in the power amplifier module shown inFIG. 1,FIG. 7is a partial sectional view showing an example of a packaging structure for mounting the power amplifier shown inFIG. 1onto a packaging substrate,FIG. 8is a sectional view showing an example of a method for polishing soldered portions in the amplifier module shown inFIG. 1,FIG. 9is a sectional view showing an example of a structure after polishing the soldered portions in the power amplifier module shown inFIG. 1,FIGS. 10 and 11are sectional views showing methods for polishing soldered portions according to modifications of the power amplifier module shown inFIG. 1,FIG. 12is a sectional view showing a method for flattening external terminals and a radiation board according to a further modification of the power amplifier module shown inFIG. 1,FIG. 13is a sectional view showing a structure after flattening the external terminals and the radiation board in the power amplifier module shown inFIG. 12,FIG. 14is a sectional view showing a method for flattening external terminals and a radiation board according to a still further modification of the power amplifier module shown inFIG. 1, andFIG. 15is a sectional view showing a structure after flattening the external terminals and the radiation board in the power amplifier module shown inFIG. 14.

The semiconductor device of this first embodiment, which is shown inFIGS. 1 and 2, is a high frequency module product called a power amplifier module1. According to the structure of the power amplifier module1, a first packaging part is soldered onto a surface4bof a module substrate4and a second packaging part is soldered onto a back surface4cof the packaging substrate, the first packaging part on the surface4bside being covered with a sealing resin. This module is incorporated mainly in a small-sized portable electronic device such as a portable telephone set.

The power amplifier module1amplifies a high frequency, for example, in a portable telephone set in plural stages.

To be more specific, the power amplifier module1comprises a module substrate4as a wiring substrate having a surface4band a back surface4copposite to the surface, a control chip (a first semiconductor chip)2as a first packaging part mounted on the surface4bof the module substrate4, the control chip2being an active part, chip parts3mounted on the surface4bin adjacency to the control chip2and having passive elements, a first output chip7and a second output chip8, which are second packaging parts mounted on the back surface4cof the module substrate4and which are second semiconductor chips having active elements (amplification elements), lands1aas external terminals formed on the back surface of the module substrate4, and a seal portion6formed by a sealing resin to seal the control chip2and the plural chip parts3. The first and second output chips7,8as second semiconductor chips are larger in the amount of heat generated than the control chip2.

Thus, in the power amplifier module1, the first and second output chips7,8having amplification elements and large in the amount of heat generated are disposed on the back surface4cof the module substrate4, and when mounting these semiconductor chips onto a packaging substrate, the semiconductor chips are soldered to the packaging substrate directly or indirectly to enhance the heat radiation performance. On the other hand, the control chip2and chip parts3, which are small in the amount of heat generated, are mounted on the surface4bside of the module substrate4and these packaging parts on the surface4bside are sealed with only a sealing resin low in elasticity and insulative such as a silicone resin without using a metallic case or the like, thereby attaining the reduction in size of the module.

In the power amplifier module1of this first embodiment, a cavity4aas a recess is formed nearly centrally on the back surface4cof the module substrate4. As shown inFIG. 3, the first and second output chips7,8are arranged side by side within the cavity4aand are flip-chip-bonded to the module substrate4. Further, the control chip2is flip-chip-bonded onto the surface4bof the module substrate4.

Thus, the control chip2and the first and second output chips8are flip-chip-bonded to the module substrate4respectively through solder bump electrodes16.

Further, as shown inFIG. 2, a radiation board9as a heat radiating member is attached through a heat-conductive adhesive10to a back side7bopposite to a main surface7aof the first output chip7(also true of the second output chip8) which is large in the amount of heat generated.

In the power amplifier module1of this first embodiment, its external terminals are the lands1aprovided on the back surface4cof the module substrate4, which plural lands la are arranged around the cavity4a, as shown inFIG. 3.

The plural chip parts3mounted on the surface4bof the module substrate4have passive elements respectively and, as shown inFIG. 4, respective connecting terminals3aare soldered to terminals4fformed on the surface side4bof the module substrate4. Further, as shown inFIG. 2, the terminals4fformed on the surface4bside and the lands1aformed on the back4cside are connected with each other through internal wiring lines4dand through hole wiring lines4e.

The module substrate4is a multi-layer wiring substrate having plural wiring layers.

The first output chip7(also true of the second output chip8) is under-filled with a sealing resin within the cavity4ato form an under-filled seal portion11.

Thus, in the cavity4a, the under-filled seal portion11is formed between the main surface7aof the first output chip7and the module substrate4.

The power amplifier module1has three-stage amplification circuits, of which the first-stage amplification circuit is formed in the control chip (first semiconductor chip)2as the first packaging part on the surface4bside, and the second- and final-stage amplification circuits are respectively formed in the first and second output chips7,8as second packaging parts on the back surface4c.

Although the first-stage amplification circuit is formed in the control chip2on the surface4bside and the final-stage amplification circuits is formed in the first and second output chips7,8on the back surface4c, the second-stage amplification circuit may be formed in the control chip2on the surface4bside or may be formed n the first and second output chips7,8on the back surface4c.

Also as to the first-stage amplification circuit, for the purpose of reducing the chip size, it may be formed in the first and second output chips7,8on the back surface4c.

In the power amplifier module1of this first embodiment, as shown inFIG. 5, two types of frequency bands are amplified dividedly in two amplification circuits. In each of the amplification circuits, amplification is performed in three stages. Each stage of amplification circuit is controlled by a control circuit in the control chip2.

The two types of frequency bands will now be described. One is based on GSM (Global System for Mobile Communication), using a frequency band of 880 to 915 MHz, while the other is based on DCS (Digital Communication System 1800), using a frequency band of 1710 to 1785 MHz. The module in question can cope with both these systems.

Therefore, as shown inFIG. 5, the high frequency circuit is divided into three circuit blocks2e,7e, and8eenclosed with dotted lines. In power amplifier module1, the control chip2, which is small in the amount of heat generated, is adopted for the circuit block2e, while the first and second output chips7,8, which are large in the amount of heat generated, are adopted for the circuit blocks7eand8e.

In the power amplifier module1of this first embodiment, as to the semiconductor chips included in the three circuit blocks2e,7e, and8e, the control chip2in the circuit block2esmall in the amount of heat generated is mounted on the surface4bside of the module substrate4, while the circuit blocks7eand8elarge in the amount of heat generated are incorporated in the first and second output chips7,8on the back surface4c. As shown inFIG. 7, when the power amplifier module1is mounted to a mother board12as a packaging substrate, back sides7b(see FIG.2) and8bof the first and second output chips7,8which are large in the amount of heat generated are soldered to substrate terminals12aof the mother board12through the radiation board9and soldered portions5, whereby it is possible to enhance the heat radiation performance.

As to the chip parts, all of them are mounted on the surface4bside of the module substrate4because they are small in the amount of heat generated.

Correspondingly to the circuit blocks2e,7e, and8e, as shown inFIG. 5, a GSM-side first-stage amplifier2cand a DCS-side first-stage amplifier2dare incorporated in the control chip2on GSM side and DCS side, respectively, a GSM-side second-stage amplifier7cand a GSM-side final-stage amplifier7dare incorporated in the first output chip7, further, a DCS-side second-stage amplifier8cand a DCS-side final-stage amplifier8dare incorporated in the second output chip8.

Upon receipt of a control signal Vcontrol the control chip2shown inFIG. 5controls the powers of the GSM-side first-, second- and final-stage amplifiers2c,7c,7d(also true of DCS side). In this first embodiment, MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) are used as amplifier elements. In this case, the control chip2controls the bias applied to the gate of each MOSFET and thereby controls the powers of outputs Pout (GSM) and Pout (DCS).

Using GSM-side amplifiers, thermal resistance values were simulated with respect to the control chip2mounted on the surface4bside of the module substrate4and the first output chip7mounted on the back4cside. There were obtained such results as shown inFIG. 6.

As shown in the same figure, in the case of the control chip2, if the value of power is set at 0.2W, a thermal resistance constraint is 250° C./W or less, while a simulation value thereof is 70° C./W, thus falling under the constraint.

On the other hand, in the case of the first output chip7, if the value of power is set at 8W or less under worst conditions, a thermal resistance constraint is 6° C./W or less, while a simulation value thereof is 3.9° C./W, thus found to be within the constraint also in the output chip. Since DCS side is smaller in the amount of heat generated than GSM side, it can be judged that if GSM side is within the constraint, so is the DCS side.

In the power amplifier module1of this first embodiment, such packaging parts as the control chip2and chip parts3mounted on the surface4bof the module substrate4are sealed with an insulating sealing resin without using a metallic case or the like, so that it becomes unnecessary to consider an electric short between the packaging parts and the metallic case and hence an external size can be determined taking only the dicing accuracy for division into individual chips into account.

That is, since the division into individual chips can be done at positions closest to the mounted parts, it is possible to diminish a dead space (waste space) in the substrate periphery and hence possible to reduce the size of the power amplifier module1.

In other word, since the packaging parts can be arranged up to positions closest to the outer periphery in the substrate range which permits the mounting of the parts, it is possible to improve the packaging density of parts.

Further, it is not that chips are mounted on either the surface4bor the back surface4cof the module substrate4, but the first-stage control chip2is mounted on the surface4b, while the final-stage first and second output chips7,8are mounted on the back surface4c. Thus, the first- and final-stage chips are mounted on the surface and the back surface dividedly between the first and the final stage, whereby the packaging area can be diminished and it is possible to attain the reduction in size of the power amplifier module1.

The first and second output chips7,8, which are large in the amount of heat generated, are mounted on the back surface4cof the module substrate4. Further, at the time of mounting the power amplifier module1onto the mother board12, the chips are mounted by soldering through the radiation board9and soldered portions5, whereby the heat generated from the first and second output chips7,8, which are large in the amount of heat generated, can be transmitted directly to the substrate and consequently the thermal resistances of both chips can be decreased.

Further, since semiconductor chips are flip-chip-connected to both the surface and the back surface of the module substrate4through bump electrodes16, the semiconductor chips can be made difficult to be influenced by the generated heat. This is because a high thermal resistance of the bump electrodes16makes the heat of the semiconductor chips on the back surface4cdifficult to be transmitted to the surface4b-side semiconductor chip.

Therefore, it is possible to enhance the heat radiation performance of the first and second output chips7,8which are large in the amount of heat generated, and hence possible to attain a high output operation of the power amplifier module1.

As a result, the power amplifier module1can be operated in a high temperature environment.

Next, the following description is provided about a method of manufacturing the semiconductor device (power amplifier module1) of this first embodiment.

First, a module substrate (wiring substrate)4having a surface4band a back surface4cis provided.

Thereafter, a control chip2and chip parts3are mounted on the surface4bof the module substrate4.

More specifically, the control chip2and chip parts3are arranged on the surface4bof the module substrate4in such a manner that a back side2bof the control chip2is turned upward, that is, a main surface2aof the control chip becomes opposed to the surface4bof the module substrate4, and that the chip parts3are positioned on terminals4f. Thereafter, the control chip2and the chip parts3are mounted by reflow for example. The control chip2is flip-chip-bonded to the module substrate through solder bump electrodes16.

Thereafter, the module substrate4is turned upside down, allowing the back surface4cto face upward. Then, first and second output chips7,8are arranged in a cavity4ain such a manner that respective back sides7band8bface upward, followed by flip-chip bonding of the two by reflow. The first and second output chips7,8are larger in the amount of heat generated than the control chip2.

Subsequently, sealing is performed with resin.

More specifically, the packaging parts on the surface4bside of the module substrate are sealed by resin molding, while the back surface4cis subjected to under-fill sealing within the cavity4a.

As a result, a seal portion6is formed on the surface4bside of the module substrate4, while an under-fill seal portion11is formed in the cavity4aon the back surface4c.

The under-fill seal portion11is formed by pouring a sealing resin between a main surface7aof the first output chip7and the module substrate4and also between a main surface8aof the second output chip8and the module substrate4.

Thereafter, a radiation board9is attached to the back sides7band8bof the first and second output chips7,8through a heat-conductive adhesive10.

The assembly of the power amplifier module1is now completed.

In the power amplifier module of this first embodiment, in order to improve the packaging performance at the time of connecting the radiation board9to a substrate, followed by mounting onto a mother board12, as shown inFIG. 7, it is preferable that after the assembly of the power amplifier module1, as shown inFIG. 8, first soldered portions20be formed on lands1arespectively and then the radiation board9and the first soldered portions20be polished so that both are flush with each other.

Unless the height of the lands1aand that of the radiation board9are equal to each other, there may occur a connection imperfection in either the radiation board9or the lands1aat the time of mounting the power amplifier module1onto the mother board12. To avoid this inconvenience, the radiation board9is projected beforehand with respect to the lands1aand in this state the first soldered portions20and the radiation board9are polished inwards from the lands1aside up to the height of a broken line H, whereby the first soldered portions20and the radiation board9can be made flush with each other, as shown inFIG. 9.

By so doing, the flatness of the first soldered portions20and that of the radiation board9are improved and therefore, when mounting the power amplifier module1onto the mother board12, it is possible to ensure a uniform soldered shape without tilting of the power amplifier module, whereby it is possible to effect a secondary packaging with improved stability and reliability.

As a result, it is possible to improve the packaging performance of the power amplifier module1.

It isFIGS. 10 to 15that illustrate various means for connecting the second semiconductor chip (although reference will be made to only the first output chip7, the following description also applies to the second output chip8) to the packaging substrate through a heat radiating member, the second semiconductor chip being mounted on the back4cside of the module substrate4and being large in the amount of heat generated.

FIG. 10shows a case where the radiation board9is not used, but the heat radiating member connected to the back side7bof the first output chip7is a second soldered portion21formed by solder. According to the method illustrated inFIG. 10, first soldered portions20are formed on lands1arespectively and the second soldered portion21is formed on the back side7bof the first output chip7, then the first soldered portions20formed on the lands1aand the second soldered portion21are polished up to the height of a broken line H to make the two flush with each other.

Thus, the radiation board9is substituted by solder which is a soft material easier to polish than the radiation board9, whereby the polishing work can be simplified. Besides, since the radiation board9is substituted by solder as a heat radiating member, it is possible to decrease the number of assembling steps.

In the power amplifier module1shown inFIG. 10, the first output chip7is sealed with a back-side chip seal portion13using resin.

FIG. 11shows a structure wherein the structure shown inFIG. 10is further covered with a polishing seal portion14.

To be more specific, first soldered portions20are formed on lands1arespectively and a second soldered portion21is formed on the back side7bof the first output chip7, using solder as a heat radiating member which solder is softer than the radiation board9, thereafter, the first and second soldered portions20,21are sealed with resin to form a seal portion14for polishing.

Subsequently, the seal portion14for polishing, as well as the first and second soldered portions20,21, are polished up to the height of a broken line H, allowing the soldered portions20,21to be exposed and making the two flush with each other.

That is, in the structure shown inFIG. 11, the first output chip7is covered with the back-side chip seal portion13and further the seal portion14for polishing, which is formed using a material softer than the back-side chip seal portion13, e.g., an epoxy resin, is laminated to the back-side chip seal portion.

According to this structure, during polishing, the second soldered portion21is held by the seal portion14for polishing, whereby it is possible to diminish the load imposed on the first output chip7and the lands1a.

FIG. 12shows a case where a radiation board9is used as a heat radiating member, and a soldered portion15for the radiation board is formed between the first output chip7and the radiation board9so as to be slightly smaller and thicker than the radiation board9and the first output chip7.

In this case, polishing is not performed, but at the time of reflowing the packaging parts on the surface4bside of t he module substrate4, as shown inFIG. 13, soldered portion15for the radiation board mounted to the back side7bof the first output chip7is melted by the application of load P, allowing the solder to be spread thin by the own weight of the module, whereby the lands1aand the radiation board9can be made flush with each other and it is possible to improve the flatness of the two.

FIG. 14shows a structure in which the radiation board9is not used, but solder bump electrodes16for flip-chip bonding of the first output chip7are formed large. As shown inFIG. 15, likeFIG. 13, when reflowing the packaging parts on the surface4bside of the module substrate4, the large bump electrodes16for flip-chip bonding are melted by the application of load P, allowing the solder to be spread thin by the own weight of the module, whereby the lands1aand the back side7bof the first output chip7can be made flush with each other and it is possible to improve the flatness of the two.

According to the structure shown inFIG. 14, since the radiation board9is not used, it is possible to thin the module substrate4and hence possible to lower the height of the module (product).

FIG. 16is a sectional view showing the structure of a power amplifier module as an example of a semiconductor device according to a second embodiment of the present invention,FIG. 17is a bottom view thereof,FIG. 18is a layout plan view showing an example of layout of packaging parts mounted on a surface side of a wiring substrate in the power amplifier module shown inFIG. 16,FIG. 19is a sectional view showing the structure of a power amplifier module according to a modification of the second embodiment of the present invention, andFIG. 20is a partial enlarged sectional view showing the structure of portion A inFIG. 19.

As in the first embodiment, the semiconductor device of this second embodiment is a power amplifier module22, which is different from the power amplifier module1of the first embodiment in that the cavity4aas a recess is not formed on the back surface4cof the module substrate4.

Therefore, it is necessary that the height of external terminals be equal to the mounted height of the first and second output chips7,8which are mounted on the back surface4c. For this reason, in the second embodiment, reference will be made to the case where external terminals are solder bumps18as salient electrodes.

The reason why the power amplifier module22is of BGA (Ball Grid Array) structure is because the back sides7b,8bof the first and second output chips7,8must be made substantially flush with the external terminals. But the external terminals may be pins or the like.

At the time of equalizing the height of the back sides7b,8bof the first and second output chips7,8with the height of solder bumps18, it is preferable that the solder bumps18be slightly projected with respect to those back sides.

By so doing, when mounting the power amplifier module onto the packaging substrate by reflow, it is possible to ensure connection of the solder bumps18and the first and second output chips7,8to the packaging substrate.

In the power amplifier module22, unlike the power amplifier module1of the first embodiment, the radiation board9is not used, so that the first and second output chips7,8can be connected to the packaging substrate directly with solder alone.

As shown inFIG. 17, plural solder bumps18are arranged around the under-fill seal portion11.

As in the power amplifier module1of the first embodiment, the first and second output chips7,8as second semiconductor chips are flip-chip-bonded to the back surface4cof the module substrate4. Further, the under-fill seal portion11is formed with resin between each of the first and second output chips7,8and the back surface4cof the module substrate4.

As shown inFIG. 18, on the surface4bside of the module substrate4a control chip2is mounted nearly centrally and plural chip parts3are mounted around the control chip2through soldered portions17as inFIG. 16.

Other structural points in the power amplifier module22of this second embodiment are the same as in the power amplifier module of the first embodiment, so tautological explanations thereof will here be omitted.

According to the power amplifier module22, like the power amplifier module1of the first embodiment, it is possible to attain the reduction in size thereof; besides, since the cavity4aas a recess is not formed in the module substrate4, it is possible to simplify the structure of the module substrate4and hence possible to reduce the cost of the module substrate.

Consequently, it is possible to reduce the cost of the power amplifier module22.

Moreover, since the first and second output chips7,8can be connected to the packaging substrate directly through only solder without interposition of the radiation board9therebetween, it is possible to further enhance the heat radiation performance of the power amplifier module22.

Additionally, the power amplifier module22can be made thin because the radiation board9is not used.

Other effects obtained by the power amplifier module22of this second embodiment are the same as in the case of the power amplifier module1of the first embodiment, so tautological explanations thereof will here be omitted;

Referring now toFIGS. 19 and 20, there is illustrated a modification of the power amplifier module22.

In a power amplifier module22shown inFIG. 19, a metal core18aas a metal ball is provided in the interior of each solder bump18which serves as an external terminal, and on the back surface4cof the module substrate4there are formed a first output chip7, plural solder bumps18around the first output chip7, and a back-side seal portion19which covers side portions of the first output chip7and the plural solder bumps18.

The metal core18ais formed of copper for example, and the solder bumps18each containing the metal core18aprevent solder from melting down for example at the time of secondary packaging on the user side.

More particularly, the height of the back-side seal portion19from the back surface4cof the module substrate4is set at a height corresponding to half or more of each solder bump18, whereby the solder bumps18can be prevented from melting down at the time of repair after the secondary packaging, and hence it is possible to retain the original shape of the solder bumps18.

Therefore, it is possible to realize a power amplifier module22having a structure suitable for repair.

Although the present invention has been described above concretely on the basis of embodiments thereof, it goes without saying that the invention is not limited to the above embodiments, but that various changes may be made within the scope not departing from the gist of the invention.

For example, although in the first and second embodiments a silicone resin is used as the resin for forming the seal portion6, there may be used a resin other than the silicone resin, e.g., an epoxy resin.

Although the semiconductor devices of the first and second embodiments are the power amplifier modules1and22, they may be other high frequency modules or semiconductor modules insofar as the modules are of the structure wherein semiconductor chips are mounted on both surface and back of the module substrate4in such manner that a semiconductor chip larger in the amount of heat generated than on the surface side is mounted on the back surface, and the surface side of the module substrate4is sealed with a sealing resin alone without using a metallic case or the like.

Further, packaging parts mounted on a wiring substrate such as the module substrate4are not limited to chip parts and semiconductor chips, but may be other electronic parts.

The following is a brief description of an effect obtained by typical inventions disclosed herein.

A first packaging part is mounted on a surface of a wiring substrate, while a second packaging part larger in the amount of heat generated than the first packaging part is mounted on a back surface of the wiring substrate, further, a resin seal portion is formed to seal the first packaging part. Thus, the semiconductor device concerned is not covered with a metallic case and hence it is possible to attain the reduction in size thereof.