Semiconductor light emitting device

A semiconductor light emitting device includes a first conductivity-type first semiconductor layer, a second conductivity-type second semiconductor layer, a semiconductor light emitting layer, and first and second electrodes. The semiconductor light emitting layer is provided between the first semiconductor layer and the second semiconductor layer, and includes a multiple quantum well structure. The quantum well structure includes well layers and barrier layers each laminated alternately, each of the well layers being not less than 6 nm and not more than 10 nm. The first and second electrodes are electrically connected to the first and second semiconductor layers such that current flows in a direction substantially vertical to the main surface.

CROSS REFERENCE TO RELATED APPLICATION

This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2012-046048 filed on Mar. 2, 2012, and No. 2012-050027 filed on Mar. 7, 2012, the entire contents of which are incorporated herein by reference.

FIELD

Embodiments described herein relate generally to a semiconductor light emitting device.

BACKGROUND

In the background art, some light emitting devices of nitride semiconductor are configured to have a light emitting layer of nitride semiconductor that includes a multiple quantum well structure with quantum well layers and barrier layers each laminated alternately so that the main surface of the light emitting layer is a polar face; and current flows in a direction substantially vertical to the main surface.

The light emitting devices employ an InGaN well layer; and a GaN barrier layer or an InGaN barrier layer whose In-composition is lower than that of the InGaN well layer. The InGaN well layer is compressed because InGaN has a lattice constant larger than that of GaN.

A piezo electric field arises from compression strain. The piezo electric field separates holes and electrons both injected into the InGaN well layer spatially from each other to prevent radiative recombination.

An InGaN well layer with a thickness of 3 nm or less is often employed to prevent a reduction in the radiative recombination due to the piezo effect. Thinning the InGaN well layer causes holes and electrons to approach each other, thereby preventing the reduction in the radiative recombination of holes and electrons.

Unfortunately, driving a semiconductor light emitting device having an InGaN well layer that is 3 nm or less with a large current could cause excessively high carrier density in the InGaN well layer. As a result, an Auger recombination exceeds the radiative recombination. The Auger recombination increases with the cube of carrier density whereas the radiative recombination increases with the square thereof. Furthermore, carriers overflowing from the InGaN well layer increases. Thus, internal light emission efficiency decreases to cause a problem that semiconductor light emitting devices having a high optical output are not enabled.

In the background art, some light emitting devices of nitride semiconductor are configured to have a light emitting layer that includes a multiple quantum well structure with quantum well layers and barrier layers each laminated alternately so that current flows in a direction substantially vertical to the main surface of the light emitting device. The light emitting layer is provided between N-type and P-type semiconductor layers.

The semiconductor light emitting devices are each configured to have two or more barrier layers whose band gaps are equal to each other. Holes and electrons are injected into the semiconductor light emitting layers in the multiple quantum well structure from the sides of the P-type semiconductor layer and the N-type semiconductor layer, respectively.

Heavy holes stay mostly in the quantum well layers near the P-type semiconductor layer whereas light electrons reach the quantum well layers near the P-type semiconductor layer. As a result, the holes and the electrons are more likely to recombine with each other in the quantum well layers near the P-type semiconductor layer.

Holes and electrons could be confined to just one thin quantum layer to give rise to excessively high carrier density in some cases. This causes a problem that non-radiative Auger recombination proportional to the cube of the carrier density is more than radiative recombination proportional to the cube thereof, thus decreasing optical output.

DETAILED DESCRIPTION

As will be described below, in accordance with an embodiment, a semiconductor light emitting device includes a first conductivity-type first semiconductor layer, a second conductivity-type second semiconductor layer, a semiconductor light emitting layer, and first and second electrodes. The semiconductor light emitting layer is provided between the first semiconductor layer and the second semiconductor layer, and includes a multiple quantum well structure. The quantum well structure includes well layers and barrier layers each laminated alternately, each of the well layers being not less than 6 nm and not more than 10 nm. The first and second electrodes are electrically connected to the first and second semiconductor layers such that current flows in a direction substantially vertical to the main surface.

In accordance with another embodiment, a semiconductor light emitting device includes an N-type semiconductor layer, a P-type semiconductor layer, a semiconductor light emitting layer, an N-side electrode and a P-side electrode. The semiconductor light emitting layer is formed between the N-type semiconductor layer and the P-type semiconductor layer; and includes a multiple quantum well structure. The quantum well structure includes well layers and barrier layers each laminated alternately. The N-side electrode and the P-side electrode are electrically connected to the N-type semiconductor layer and the P-type semiconductor layer such that current flows in a direction substantially vertical to a main surface of the semiconductor light emitting layer. In addition, one of the barrier layers nearest to the P-type semiconductor layer has a narrower band gap than the rest of the barrier layers, the barrier layers being each sandwiched between the well layers.

An embodiment will be described with reference to the drawing below. Wherever possible, the same reference numerals will be used to denote the same or like parts throughout figures.

First Embodiment

A light emitting device in accordance with a first embodiment will be described with reference toFIGS. 1A and 1B.FIGS. 1A and 1Bare views showing the light emitting device in accordance with the first embodiment.FIG. 1Ais a plan view thereof.FIG. 1Bis a sectional view cut and viewed along the line A-A inFIG. 1A. The light emitting device of the first embodiment is a blue light emitting diode using InGaN-series nitride semiconductors.

As shown inFIGS. 1A and 1B, a semiconductor light emitting device10includes a semiconductor lamination body11. The semiconductor lamination body11includes an N-type GaN clad layer12; a P-type GaN clad layer13and a P-type GaN contact layer14; and a semiconductor light emitting layer15. The N-type GaN clad layer12is a first-conduction-type first semiconductor layer. The P-type GaN clad layer13and the P-type GaN contact layer14are second-conduction-type second semiconductor layers. The semiconductor light emitting layer15is provided between the N-type GaN clad layer12and the P-type GaN clad layer13.

As will be described later, the semiconductor lamination body11is epitaxially grown on a sapphire substrate whose plane direction represents a C-plane. The growth front (main surface) of the semiconductor lamination body11is a C-plane. The semiconductor light emitting layer15is a C-plane and a polar face.

The N-type GaN clad layer12has a concave-convex portion12aon the opposite side of the semiconductor light emitting layer15. Light that have entered the concave-convex portion12afrom the side of the semiconductor light emitting layer15is scattered or refracted at the concave-convex portion12ato be extracted from the N-type GaN clad layer12. The concave-convex portion12aenhances the optical extraction efficiency of extracting light from the upper surface of the N-type GaN clad layer12.

A transparent conductive film (first electrode)16is provided on the concave-convex portion12aof the N-type GaN clad layer12. The conductive layer16is transparent to light emitted from the light emitting layer15. The transparent conductive film16is formed on the substantially entire surface of the concave-convex portion12aof the N-type GaN clad layer12.

The transparent conductive film16has a concave-convex surface that reflects the concave-convex portion12aof the N-type GaN clad layer12on the opposite side of the light emitting layer15.

The transparent conductive film16includes an ITO (Indium Tin Oxide) film having a thickness of 100 to 200 nm, for example. Current can spread spatially to the periphery of the semiconductor lamination body11owing to the transparent conductive film16. It is preferable to thicken the ITO film for spreading the current. Meanwhile, it is preferable to thin the ITO film because an ITO film absorbs light slightly. A transparent conductive film is referred to also as an ITO film below.

In addition, a P-type nitride semiconductor has resistivity larger than that of transparent conductive films including an ITO film, and is difficult to grow thick so that the P-type nitride semiconductor has high sheet resistance. Current will spread mostly through the transparent conductive film16. A spread of the current that passes through the P-type GaN layers, such as the P-type GaN clad layer13and the P-type GaN contact layer14, can be neglected.

A pad electrode17ais formed for bonding wire at the center of the transparent conductive film16. A line frame and a thin wire electrode17bare formed on the transparent conductive film16. The line frame runs along the outer periphery of the transparent conductive film16. The thin wire electrode17bis formed in an X-shaped line such that the thin wire electrode17bextends from the pad electrode17ain the four diagonal directions and is in contact with the four corners of the line frame. The thin wire electrode17bis formed as being a 2 μm-wide Au film, for example.

The transparent conductive film16has sheet resistance much higher than that of the thin wire electrode17bto thereby make the spread of the current worse when the semiconductor lamination body11becomes larger. The thin wire electrode17bis provided for enhancing the spread of the current due to the transparent conductive film16.

A metal electrode (second electrode)18is formed on the P-type GaN contact layer14on the opposite side of the semiconductor light emitting layer15. The metal electrode18is formed on the substantially entire surface of the P-type GaN contact layer14. The metal electrode18is a laminated film including silver (Ag) and gold (Au) layers both allowing ohmic contact with the P-type GaN layer. The Ag layer has a high optical reflectance to reflect light from the semiconductor light emitting layer15.

The semiconductor lamination body11is formed on the metal electrode18over the support substrate20so that the bonding layer19is sandwiched between the metal electrode18and the support substrate20. The bonding layer19is a gold-tin (AuSn) alloy layer, for example. The support substrate20is a silicon substrate, for example.

The support substrate20is provided with a substrate electrode21on the opposite side of the semiconductor lamination body11. The substrate electrode21is a gold film allowing ohmic contact with silicon.

As shown inFIG. 2, the semiconductor light emitting layer15is a quantum well structure with Inx1Ga(1-x1)N well layers26and Inx2Ga(1-x2)N barrier layers25each laminated alternately. Hereinafter, the Inx1Ga(1-x1)N well layers26and Inx2Ga(1-x2)N barrier layers25are referred to simply as InGaN well layers and InGaN barrier layers, respectively. The semiconductor light emitting layer15has an InGaN barrier layer as a starting layer and an InGaN barrier layer as a terminal layer.

The parameters x1 and x2 satisfy a relation of 0≦x2<x1<1. The In-compositions x1 of the InGaN well layers26are each set to about 0.15 so that light with a wavelength of 450 nm is emitted from the semiconductor light emitting device10. The In-compositions x2 of the InGaN barrier layers25are each set to 0.05 so that the band gaps of each InGaN barrier layers25become wider than the band gaps of each InGaN well layers26.

The thicknesses W1of the InGaN well layers26are each set to not less than 6 nm and not more than 10 nm. Preferably, the thicknesses W1are each set to not less than 8 nm and not more than 9 nm. The InGaN well layers26are only required to include two or more layers. The thicknesses W2of the InGaN barrier layers26are each set to 5 nm to 20 nm, for example.

The thickness and impurity concentration of the N-type GaN clad layer12are set to, for example, 2 to 5 μm and 1×1019cm−3, respectively. The N-type GaN clad layer12serves as a single-crystal underlayer to epitaxially grow layers from the semiconductor light emitting layer15to the P-type GaN contact layer14.

The P-type GaN clad layer13is 100 nm in thickness and has an impurity concentration of 1×1020cm−3, for example. The P-type GaN contact layer14is 10 nm in thickness and an impurity concentration of 1×1021cm−3, for example.

Applying a voltage between the pad electrode17aand the substrate electrode21causes a current to passthrough the semiconductor light emitting layer15in a direction substantially vertical to the main surface15a. The carriers injected into the InGaN well layer26radiatively recombine to emit light with a peak wavelength of about 450 nm.

The semiconductor light emitting device10mentioned above is configured to make the InGaN well layer26thicker than 3 nm, i.e., a normal thickness thereas such that the carrier density in the InGaN well layer26is prevented from being excessively high when a large current is supplied.

FIG. 3is a view showing a crystal structure of a nitride semiconductor. As shown inFIG. 3, GaN is a hexagonal wurtzite-type crystal. The main surface15aof the semiconductor light emitting layer15is a C-plane (0001), and is a polar face. InGaN laminated on GaN has lattice spacing larger than that of GaN to be subjected to compression stress and strain. This causes a piezo electric field in the c-axis direction, i.e., growth direction.

FIGS. 4A to 5are views showing simulations for light output of the semiconductor light emitting device10. The simulation involves the above-mentioned piezo electric field.

FIG. 4Ais a view showing a relation of Current vs Light Output with the thickness W1of each InGaN well layer26as a parameter.FIG. 4Bis a view showing a relation of Well Layer Thickness W1vs Light Output.

As initial conditions, the thickness of each InGaN barrier layer25and the number of the InGaN well layers26are set to 5 nm and 8, respectively. The thickness W1of the InGaN well layer26ranges from 2.5 nm to 10 nm. A semiconductor light emitting device that includes 2.5 nm-thick InGaN well layers is regarded as a comparative example. The white circle shows the experimental result of the semiconductor light emitting device of the comparative example.

As shown inFIG. 4A, the light output monotonically increases with increasing current in the thickness W1of the InGaN well layer26from 2.5 nm to 10 nm while showing a tendency to saturate therein. When the thickness W1of the InGaN well layer26is 2.5 nm, the output coincides well with the result of the semiconductor light emitting device of the comparative example. The coincidence shows the validity of the simulation.

When the thickness W1of the InGaN well layer26is in the range from 4 nm to 10 nm, the output is much higher than the experimental result (denoted by white dots) of the semiconductor light emitting device of the comparative example. The output increases 1.5 times to twofold from that of the comparative example.

As shown inFIG. 4B, the light output tends to increase as a whole in response to the thickness W1of the InGaN well layer26. Specifically, the light output basically increases while showing a tendency that the light output transiently saturates around at a thickness W1of 6 to 7 nm.

When the thickness W1of the InGaN well layer26is further increased to 8 nm to 9 nm, the light output further shows a tendency that the light output starts to increase again from the transient saturation. Immediately after the thickness W1of the InGaN well layer26has reached 10 nm, the light output starts to decrease.

The relation of the thickness W1of the InGaN well layer26versus the light output shows a peak thickness of 9 nm. Specifically, the light output approximately doubles when the thickness W1of the InGaN well layer26ranges from 8 nm to 9 nm. The light output increases by 1.8 times when the thickness W1of the InGaN well layer26is 6 nm.

The above-mentioned tendency has revealed that the light output is notably high when the thickness W1of the InGaN well layer26is 8 nm to 9 nm. The tendency probably shows a critical property that is not expected simply from a fitting curve40denoted by the dotted line. The fitting curve is obtained by fitting the curve of the light output in the thickness W1of the InGaN well layer26ranging from 2.5 nm to 6 nm.

Meanwhile, immediately after the thickness W1of the InGaN well layer26has reached 10 nm, the light output starts to decrease, which is not negligible. As a result, the preferable thickness W1of the InGaN well layer26is not less than 6 nm and not more than 10 nm. More preferably, the thickness W1of the InGaN well layer26is not less than 8 nm and not more than 9 nm.

A nitride semiconductor light emitting device having a thick InGaN well layer reduces its light output probably because holes and electrons are spatially separated owing to the piezo effect to prevent the radiative recombination thereof.

When current is passed through a semiconductor light emitting layer in a direction substantially vertical to the main plane of the semiconductor light emitting layer, and the semiconductor light emitting layer is near the electrode; voltage is applied substantially directly to the semiconductor light emitting layer. As a result, the current without a component that obliquely passes through the semiconductor light emitting layer generates more holes and electrons in the light emitting layer, e.g., the InGaN well layer, than the same current with the component.

In the present embodiment, holes and electrons are injected into the semiconductor light emitting layer15from the P-type GaN clad layer13and the N-type GaN clad layer12, respectively. That is, holes and electrons are injected from the sides opposite to each other. Holes having a large effective mass stay inside the semiconductor light emitting layer on the side of the P-type GaN clad layer13whereas electrons having a small effective mass reach the semiconductor light emitting layer on the side of the P-type GaN clad layer13.

As a result, the holes and the electrons are likely to recombine with each other in the InGaN well layers26on the side of the P-type GaN clad layer13. Holes and electrons are confined to just one InGaN well layer26to give rise to excessively high carrier density when the one InGaN well layer26is thin.

The excessively high carrier density decreases optical output as a result of the non-radiative Auger recombination or carrier overflow. The Auger recombination increases with the cube of the carrier density whereas the radiative recombination increases with the square thereof. Thus, the Auger recombination exceeds the radiative recombination.

Accordingly, setting the thickness W1of the InGaN well layer26to 6 nm or more reduces the carrier density therein, thereby preventing the Auger recombination to enhance light output: Setting the thickness W1of the InGaN well layer26to 8 nm or more further enhances the light output probably because the carrier overflow is prevented. Setting the thickness W1of the InGaN well layer26to 10 nm or more adversely decreases the light output probably because a quantum effect decreases.

FIG. 5is a view showing a relation between current and light output with the number of the InGaN well layers26as a parameter. As initial conditions, the thicknesses W1and W2of the InGaN well layer26and the InGaN barrier layer25are 8 nm and 5 nm, respectively. The number of the InGaN well layers26ranges from 1 to 5.

As shown inFIG. 5, the light output of the semiconductor light emitting device10increases with increasing the number of the InGaN well layers26. The number of the InGaN well layers26has an influence on the light output. A large difference is seen between the number being just 1 and the number ranging from 2 to 5.

When the injection current is 600 mA, the light output of the semiconductor light emitting devices10having 2 to 5 InGaN well layers is 1.3 times higher than that of the semiconductor light emitting device10having only one InGaN well layer26.

The semiconductor light emitting devices10having 2 to 5 InGaN well layers26show almost no difference of the light output. More specifically, the light output has almost no difference independently of the number of the InGaN well layers26. When the current is not less than 400 mA, the light output slightly increases as the number of the InGaN well layers26increases.

When the number of the InGaN well layers26is only one, the carriers concentrate in the one InGaN well layer26so that the light output decreases mainly because of the carrier overflow. When the number of the InGaN well layers26is two or more, the carriers are dispersed in the respective InGaN well layers26to prevent the carrier overflow.

Accordingly, the more the number of the InGaN well layers26, the higher the light output. The increment of the light output is however small in the range of sufficiently many InGaN well layers26so that just two or more are sufficient as the number of the InGaN well layers26.

Next, a method of manufacturing the semiconductor light emitting device10will be explained with reference toFIGS. 6A to 8B.FIGS. 6A to 8Bare cross-sectional views illustrating the steps of manufacturing the semiconductor light emitting device10in sequential order.

As shown inFIG. 6A, the N-type GaN clad layer12, the light emitting layer15, the P-type GaN clad layer13and the P-type GaN contact layer14are epitaxially grown on a sapphire substrate51with a C-plane of a plane direction for epitaxial growth in the order by MOCVD (metal organic chemical vapor deposition) method so as to form the semiconductor laminated body11.

The process of forming the semiconductor laminated body11is briefly described below. As a preliminary treatment, a sapphire substrate51is subjected to organic cleaning and acid cleaning, for example. The resultant sapphire substrate51is contained in a reaction chamber of the MOCVD system. Thereafter, the temperature of the sapphire substrate51is raised to 1100° C., for example, by high-frequency heating in a normal-pressure atmosphere of a mixed gas of a nitrogen (N2) gas and a hydrogen (H2) gas. Thereby, the surface of the sapphire substrate51is etched in gas phase, and a natural oxide film formed on the surface of the sapphire substrate51is removed.

The N-type GaN layer12with a thickness of 4 μm, in which the silicon concentration is 1 E19 cm−3, is formed by using the mixed gas of the N2gas and the H2gas as a carrier gas while supplying an ammonium (NH3) gas and a trimethyl gallium (TMG) gas, for example, as process gases, and supplying a silane (SiH4) gas, for example, as the N-type dopant.

The temperature of the sapphire substrate51is decreased to and kept at 800° C. which is lower than 1100° C., for example, while continuing supplying the NH3gas with the supply of the TMG gas and the SiH4gas stopped.

The InGaN barrier layer25with a thickness of 5 nm, in which the In composition ratio is 0.05, is formed by using the N2gas as the carrier gas while supplying the NH3gas, the TMG gas and a trimethyl indium (TMI) gas as the process gases, for example, and the InGaN well layer26with a thickness of 8 nm, in which the In composition ratio is 0.15, is formed while supplying an increased amount of the TMI gas.

The forming of the InGaN barrier layer25and the forming of the InGaN well layer26are alternately repeated 2 times, for example, while increasing or decreasing the supply of the TMI gas. Finally, the InGaN barrier layer25is formed. Thereby, the light emitting layer15having the MQW structure is obtained.

The undoped GaN cap layer with a thickness of 5 nm (not shown) is formed while continuing supplying the TMG gas and the NH3gas with the supply of TMI stopped.

The temperature of the sapphire substrate51is raised to and kept at 1030° C., for example, which is higher than 800° C., in the N2gas atmosphere while continuing supplying the NH3gas with the supply of the TMG gas stopped.

the P-type GaN clad layer13with a thickness of 100 nm, in which the concentration of Mg is approximately 1 E20 cm−3, is formed by using the mixed gas of the N2gas and the H2gas as the carrier gas while supplying: the NH3gas, the TMG gas as the process gases; and a bis(cyclopentadienyl) magnesium (Cp2Mg) gas as the P-type dopant.

The P-type GaN contact layer14with a thickness of approximately 10 nm, in which the concentration of Mg is approximately 1 E21 cm−3, is formed while supplying an increased amount of the Cp2Mg gas.

The temperature of the sapphire substrate51is lowered naturally with the supply of only the carrier gas continued while continuing supplying the NH3gas with the supply of the TMG gas stopped. The supplying of the NH3gas is continued until the temperature of the sapphire substrate51reaches 500° C. Thereby, the semiconductor laminated body11is formed on the sapphire substrate51and the P-type GaN contact layer14is located in the top surface.

As shown inFIG. 6B, a silver film with a thickness of 0.5 μm and the gold film with a thickness of 1 μm are stacked on the P-type GaN contact layer14by a sputtering method so as to form the metal electrode18.

As shown inFIG. 6C, a silicon substrate52is prepared. Gold films53,54with a thickness of 1 μm are formed on the both side surfaces of the silicon substrate52by sputtering method, for example. A gold tin (AuSn) alloy film55is formed on the gold film53by vacuum evaporation method, for example. The silicon substrate52is the support substrate20. The gold film54is the substrate electrode21.

As shown inFIG. 7A, the sapphire substrate51is reversed upside down, so that the metal electrode18faces the gold tin alloy film55, and the sapphire substrate51and the silicon substrate52are placed on each other. Thereafter, the semiconductor laminated body11and the substrate61are heated and pressed.

Since the gold tin alloy film55is melted, the gold film of the metal electrode18and the gold film53are fused, so that the bonding layer19is formed. Thereafter, the sapphire substrate51and the silicon substrate52are bonded with the bonding layer19interposed in between.

As shown inFIG. 7B, the sapphire substrate17and the semiconductor laminated body11are separated by laser lift-off method. The laser lift-off method is a method for emitting high-output laser beam to partially decompose inside of a substance by heat application and separating the substance with the decomposed portion being the border.

More specifically, laser beam is emitted, so that the laser beam passes through the sapphire substrate51but is absorbed by the N-type GaN clad layer12, whereby the N-type GaN clad layer12is dissociated, and the sapphire substrate51and the N-type GaN clad layer12are separated.

For example, the fourth harmonic wave (266 nm) of the Nd-YAG laser is emitted from the side of the sapphire substrate51. Sapphire is transparent to the light, and therefore, the emitted light passes through the sapphire substrate51and is effectively absorbed by the N-type GaN clad layer12.

The N-type GaN clad layer12in proximity to the interface with the sapphire substrate51includes many crystalline defects, and therefore, substantially all of the absorbed light is converted into heat, and the following reaction occurs.
2GaN=2Ga+N2(g)

Accordingly, GaN is dissociated into Ga and N2gas.

The laser beam may be a continuous wave (CW) or a pulse wave (PW), but the laser beam is preferably a pulse light having a high peak output. A Q switch laser, a mode locked laser, and the like capable of outputting ultra short pulse light in the order of picoseconds to femtoseconds are appropriate as pulse lasers having a high peak output.

After the dissociation of the N-type GaN clad layer12; a Ga layer57is remained on the exposed N-type GaN clad layer12. The Ga layer57is removed by warm water or an aqueous solution of hydrochloric acid (HCl),

As shown inFIG. 8A, the concave-convex portion12ais formed on the exposed portion of the N-type GaN clad layer12. Specifically, the N-type GaN clad layer12is etched by an aqueous solution of potassium hydroxide (KOH), for example. The KOH aqueous solution is suitable to have, for example, a concentration of approximately 20% to 40% at a temperature of approximately 60° C. to 70° C. Since N polar face of GaN is anisotropically etched by the KOH aqueous solution, the concave-convex portion12ais formed on the N polar face of GaN.

As shown inFIG. 8B, An ITO film58with a thickness of 200 nm is formed on the N-type GaN clad layer12having the concave-convex portion12aby sputtering method, for example. The ITO film58is subjected to thermal treatment in order to facilitate the crystallization of the ITO film58and improve the conductivity of the ITO film58.

For example, it is appropriate to perform the thermal treatment in nitrogen atmosphere or mixed atmosphere including nitrogen and oxygen at a temperature of about 400 to 750° C. for about one to 20 minutes. In this stage, the ITO film58becomes the transparent conductive film16shown inFIG. 1B.

A gold film is formed on the transparent conductive film16by sputtering method, for example. The gold film is patterned so as to form the pad electrode17aand the thin wire electrode17b. Thereby, the light emitting device10shown inFIGS. 1A and 1Bis obtained.

The thickness W2of the InGaN barrier layer25and the thickness W1of the InGaN well layer26can be estimated using TEM (Transmission Electron Microscope) or X-ray Reflectivity Method.

Cross-sectional TEM observation can directly determine the thickness W2of the InGaN barrier layer25and the thickness W1of the InGaN well layer26. The a-axis and c-axis of GaN are about 0.319 nm and about 0.518 nm as lattice constants, respectively. The InGaN well layer26with a thickness W1of 8 nm includes 16 InGaN lattices laminated.

The X ray reflectance method can indirectly determine the thickness W2of the InGaN barrier layer25and the thickness W1of the InGaN well layer26. The X ray reflectance method employs extremely oblique incidence of an X ray and analyses an intensity profile of the reflected X ray for determining thicknesses and density of a sample.

Specifically, the extremely oblique incidence of an X ray causes the X ray to reflect at the surface of a film, the interface of the film/the substrate, and each interface in films, so that the X rays reflected at the respective interfaces interfere with each other. The reflectance profile obtained by changing the incidence angle of the X ray continuously shows an oscillatory structure specific to the thickness, density, and interfacial roughness of films. Analysing the reflectance profile on the basis of a theoretical formula can provide evaluations of the thickness, density, and roughness of the films.

A high-brightness parallel beam allows it to evaluate an extremely thin film. Employing an artificial multilayer with a paraboloidal surface as incidence optics can provide such a high-brightness parallel beam.

As described above, in the semiconductor light emitting device10of the embodiment, the light emitting layer15whose main surface is a polar face and thickness W1is 8 nm has a MQW structure with the InGaN well layers26thicker than 3 nm and the InGaN barrier layers25each laminated alternately. The transparent conductive film16and the metal electrode18are formed such that current flows in a direction substantially vertical to the main surface of the semiconductor light emitting layer15.

As a result, the carrier density inside the InGaN well layers26is properly maintained also during great-current driving, thereby allowing it to prevent the Auger recombination and the carrier overflow. Thus, the semiconductor light emitting device is achieved with high light output.

A carrier-overflow prevention layer (overflow prevention layer) can be provided to the semiconductor light emitting device10. The superlattice buffer layer can be formed to enhance the crystallinity of the semiconductor lamination body15.FIG. 9is a sectional view showing a semiconductor light emitting device having the overflow prevention layer and the superlattice buffer layer.

As shown inFIG. 9, a semiconductor lamination body61of a semiconductor light emitting device60is provided with a P-type AlGaN overflow prevention layer62between the semiconductor light emitting layer15and the P-type GaN clad layer13.

The P-type AlGaN overflow prevention layer62is 5 nm in thickness; and has an Mg-concentration of 1×1020cm−3and an Al-compositional ratio of 0.2. The P-type AlGaN overflow prevention layer62has a wider band gap than the P-type GaN clad layer13.

A superlattice buffer layer63is formed between the semiconductor light emitting layer15and the N-type GaN clad layer12. The superlattice buffer layer63has 30 pairs of first and second InGaN layers each laminated alternately, e.g., both being different from each other in In-composition.

The first and second InGaN layers are, e.g., 1 nm and 3 nm in thickness, respectively. The In-composition of the first InGaN layer is higher than that of the second InGaN layer.

The P-type AlGaN overflow prevention layer62prevents carriers from overflowing from the InGaN well layer26to the P-type GaN clad layer13. The superlattice buffer layer63prevents lattice defects such as dislocations from propagating from the N-type GaN clad layer12to the semiconductor light emitting layer15. As a result, the light output of the semiconductor light emitting device60is further enhanced.

Although the above described has assumed a silicon substrate as the support substrate20, the support substrate20can employ other conductive substrates. The conductive substrates include a metal substrate, a conductive ceramic substrate, and a germanium (Ge) substrate. The conductive ceramic substrate is a SiC ceramic substrate, for example.

Although the above-described has assumed that the substrate for the semiconductor lamination body11to be grown thereon is a C-plane of the sapphire substrate, conductive substrates may be employed for the substrate. The conductive substrates for the semiconductor lamination body11include a GaN substrate whose main surface is a C-plane; a SiC substrate; and a ZnO substrate.

FIG. 10is a sectional view showing a semiconductor light emitting device having a semiconductor lamination body. As shown inFIG. 10, the semiconductor light emitting device70has a semiconductor lamination body11that is formed on the conductive growth substrate71whose main surface is a C-plane, e.g., the C-plane of the GaN substrate.

The N-type GaN clad layer12, the semiconductor light emitting layer15, the P-type GaN clad layer13, and the P-type GaN contact layer14are formed on the conductive substrate71in this order. The transparent conductive film16is formed on the P-type GaN contact layer14.

The substrate electrode72is formed on the opposite side of the conductive substrate71from the N-type GaN clad layer12. The substrate electrode72is, a Ti/Pt/Au film that allows ohmic contact with the N-type GaN.

The conductive substrate71can serve as both a growth substrate and a support substrate. The conductive substrate71advantageously eliminates the needs for contacting of the support substrate and removing of the growth substrate.

Alternatively, a current block layer for the pad electrode17aand the thin wire electrode17bmay be formed between the P-type GaN contact layer14and the transparent conductive film16.

Further, the transparent conductive film16can have a concave-convex portion to improve the light extraction efficiency.FIG. 11is a cross-sectional view illustrating a main portion of a semiconductor device having a transparent conductive film with a concave-convex portion.

As shown inFIG. 11, a, transparent conductive film80has a concave-convex portion81including both a convex portion81awhich is mainly a crystalline ITO and a concave portion81bwhich is mainly an amorphous ITO.

It is generally known that when an ITO film is formed by sputtering or the like method, it is possible to obtain the ITO film in which amorphous ITO and crystalline ITO mixedly exist depending on the temperature of substrate, the plasma density, the partial pressure of oxygen, and the like at the time of film formation.

With regard to the temperature of the substrate, for example, the crystalline temperature of ITO is in a range of 150° C. to 200° C. When the temperature of the substrate is near the crystalline temperature, it is possible to obtain the ITO film in which amorphous ITO and crystalline ITO mixedly exist.

Through cross-sectional TEM (Transmission Electron Microscope) observation and electron-beam diffraction patterns, it is confirmed that crystalline ITO and amorphous ITO mixedly exist in the ITO film in such a way that pillar-shaped bodies of the crystalline ITO are dispersed, and are surrounded by the amorphous ITO.

The etching rate of the crystalline ITO is smaller than the etching of the amorphous ITO. The etching rate of the crystalline ITO is in a range of approximately 50 nm/min to 100 nm/min, for example. The etching of the amorphous ITO is in a range of approximately 100 nm/min to 500 nm/min, for example. Hence, the selective etching rate of the crystalline ITO to the amorphous ITO is estimated to range from approximately 2 to 5.

The transparent conductive film80with the concave-convex portion81is obtained by selectively removing the amorphous ITO with the larger etching rate while leaving the crystalline ITO with the smaller etching rate by use of the difference between the etching rate of the crystalline ITO and the etching of the amorphous ITO.

In addition, it is preferable that the transparent conductive film80is thickly formed beforehand predicting the reduction of the thickness by etching.

Second Embodiment

A semiconductor light emitting device in accordance with a second embodiment will be described with reference toFIGS. 12A and 12B.FIGS. 12A and 12Bare views showing the semiconductor light emitting device in accordance with the second embodiment.FIG. 12Ais a plan view.FIG. 12Bis a sectional view taken along the line A-A inFIG. 12A. The semiconductor light emitting device of this embodiment is a blue LED (Light emitting Diode) using an InGaN-series nitride semiconductor.

As shown inFIGS. 12A and 12B, a semiconductor light emitting device110of this embodiment has a semiconductor lamination body111. The semiconductor lamination body111includes an N-type GaN clad layer112as an N-type semiconductor layer; a P-type GaN clad layer113and a P-type GaN contact layer114as a P-type semiconductor layer; and a semiconductor light emitting layer115formed between the N-type GaN clad layer112and the P-type GaN clad layer113.

The N-type GaN clad layer112has a concave-convex portion112aon the upper surface on the opposite side of the semiconductor light emitting layer115. Light having entered the concave-convex portion112afrom the semiconductor light emitting layer115is scattered or refracted to be extracted from the upper surface of the N-type GaN clad layer112. The concave-convex portion112aenhances the efficiency of the light extraction from the upper surface of the N-type GaN clad layer112.

A pad electrode117afor wire bonding is formed in the center of the N-type GaN clad layer112. A line frame and a thin wire electrode117bare formed on the N-type GaN clad layer112. The line frame runs along the outer periphery of the N-type GaN clad layer112. The thin wire electrode117bis formed in an X-shaped line such that the thin wire electrode117bextends from the pad electrode117ain the four diagonal directions and is in contact with the four corners of the line frame.

The thin wire electrode117bcan spread current to the periphery of the semiconductor lamination body111. The thin wire electrode117bis formed as being a 2 μm-wide Au film, for example. Preferably, the thin wire electrode117bis narrow in width because the thin wire electrode117bblocks light from the semiconductor light emitting layer115.

The metal electrode118is formed in contact with the P-type GaN contact layer114such that the metal electrode118is sandwiched between the P-type GaN contact layer114and a bonding layer119. The metal electrode118is formed on the substantially entire surface of the P-type GaN contact layer114. The metal electrode118is a doublelayer film of silver (Ag) and gold (Au) both allowing ohmic contact with the P-type GaN layer114. Ag has high light reflectance to efficiently reflect incident light from the semiconductor light emitting layer115.

A semiconductor lamination body111is formed on the metal electrode118so that both the metal electrode118and the bonding layer119are sandwiched between the semiconductor lamination body111and the support substrate120. The bonding layer119includes a gold-tin (AuSn) alloy layer. The support substrate120includes a silicon substrate.

The substrate electrode121is formed on the opposite side of the support substrate120from the semiconductor lamination body111. The substrate electrode121includes an Au film allowing ohmic contact with silicon.

As shown inFIG. 13, the semiconductor light emitting layer115has a quantum well structure where the Inx2Ga(1-x2)N barrier layers125a,125b,125c,125d, and the125e; and Inx1Ga(1-x1)N well layers126a,126b,126c, and126dare each laminated alternately. Hereinafter, the Inx2Ga(1-x2)N barrier layers and the Inx1Ga(1-x1)N well layers will be referred to simply as InGaN barrier layers and InGaN well layers, respectively. The semiconductor light emitting layer115starts with the InGaN barrier layer125aand ends with the InGaN barrier layer125e.

The InGaN barrier layers125a,125b,125c,125d, and125ewill be collectively denoted by the InGaN barrier layers125. The InGaN well layers126a,126b,126c, and126dwill be collectively denoted by the InGaN well layers126.

The InGaN barrier layer125is 5 nm in thickness, for example. The InGaN well layer126is 5 nm in thickness, for example. The InGaN well layer126includes 4 layers.

The In-composition (x1) of the InGaN well layers126is set to about 0.15 so that light with a wavelength of 450 nm is emitted from the semiconductor light emitting device110.

The In-composition (x1) of the InGaN well layer126and the In-composition (x2) of the InGaN barrier layer125satisfy a relation of 0≦x2<x1<1. The InGaN barrier layer125is adjusted such that the InGaN barrier layer125has a wider band gap than the InGaN well layer126.

The InGaN barrier layer125bof the barrier layers125b,125c, and125deach sandwiched between the InGaN well layers is adjusted such that the InGaN barrier layer125bnearest to the P-type GaN clad layer13has a narrower band gap than the InGaN barrier layers125cand125d.

Except for the InGaN barrier layer125b, the InGaN barrier layers125are adjusted such that the InGaN barrier layers125on the side of the N-type GaN clad layer112have a band gap equal to or wider than that of the InGaN barrier layer125on the side of the P-type GaN clad layer113.

When the band gap of the InGaN barrier layers125are denoted by Eg(125), more specifically, Eg(125a), et al, the following relation is established:
Eg(125b)<Eg(125c)≦Eg(125d)≦Eg(125a)=Eg(125e).

FIG. 14is a view showing a relation of the In-composition x of the InxGa(1-x)N layer versus the band gap Eg thereof. As shown inFIG. 14, the band gap Eg of the InxGa(1-x)N layer changes from the band gap (about 3.45 eV) of GaN to the band gap (about 0.7 eV) of InN with changing the In-composition x. The change of the band gap is not linear and slightly convex downward owing to band gap bowing. Eg is about 2.64 eV at x=0.15.

The N-type GaN clad layer112has a thickness of 2 to 5 μm and an impurity concentration of 1×1019cm−3, for example. The N-type GaN clad layer112serves as a single crystal buffer layer for growing epitaxially the layers from the semiconductor light emitting layer115to the P-type GaN contact layer114.

The P-type GaN clad layer113has a thickness of 100 nm and an impurity concentration of 1×1020cm−3, for example. The P-type GaN clad layer114has a thickness of 10 nm and an impurity concentration of 1×1021cm−3, for example.

Applying a voltage between the pad electrode117aand the substrate electrode121passes a current through the semiconductor light emitting layer115in a direction substantially vertical to the main surface115a. Holes and electrons both having been injected into the InGaN well layer126radiatively recombine with each other so that light with a wavelength of about 450 nm is emitted.

The above-described semiconductor light emitting device110is adjusted such that the band gap of the InGaN barrier layer125bis narrower than those of the InGaN barrier layers125cand125d. This prevents excessively high carrier density in the InGaN well layer126awhen a large current is passed therethrough.

Simulations will be described of the light output of the semiconductor light emitting device110and of the light output of semiconductor light emitting devices of first to second comparative examples, with reference toFIGS. 15 and 16.

FIG. 15is a view showing In-composition distribution of the semiconductor light emitting layers115included in the semiconductor light emitting device110and the semiconductor light emitting devices of the first to third comparative examples. The In-compositions of the InGaN barrier layers125aand125ebeing each in contact with the P-type clad layer113and the N-type clad layer112are assumed to be zero. That is, the InGaN barrier layers125aand125eare simply GaN layers.

As shown inFIG. 15, in the semiconductor light emitting device110of this embodiment, the In-compositions x1 of the InGaN barrier layers125b,125c, and125dare 0.05, 0.03, and 0, respectively. That is, the band gaps of the InGaN barrier layers125b,125c, and125dbecome wider in order in the direction from the P-type clad layer113toward the N-type clad layer112, satisfying the following formula:
Eg(125b)<Eg(125c)<Eg(125d)=Eg(125a)=Eg(125e)

Meanwhile, in the semiconductor light emitting device of the first comparative example, the In compositions x1 of the InGaN barrier layers125band125cand125dare 0.03, 0.03, and 0.03, respectively. That is, the band gaps of the InGaN barrier layers125b,125c, and125dare equal to each other, satisfying the following formula:
Eg(125b)=Eg(125c)=Eg(125d)<Eg(125a)=Eg(125e).

In the semiconductor light emitting device of the second comparative example, the In-compositions x1 of the InGaN barrier layers125b,125c, and125dare 0, 0.03, and 0.05, respectively. That is, the band gaps of the InGaN barrier layers125b,125c, and125dbecome narrower in order in the direction from the P-type clad layer113toward the N-type clad layer112, satisfying the following formula:
Eg(125d)<Eg(125c)<Eg(125b)<Eg(125a)=Eg(125e).

In the semiconductor light emitting device of the third comparative example, the In-compositions x1 of the InGaN barrier layers125b,125c, and125dare 0, 0, and 0, respectively. That is, the band gaps of the InGaN barrier layers125b,125c, and125dare equal to each other, satisfying the following formula:
Eg(125b)=Eg(125c)=Eg(125d)=Eg(125a)=Eg(125e).
The third comparative example has an In-concentration distribution mostly used in the background art.

FIG. 16is a view showing a simulation of the relations between current and light output in the semiconductor light emitting device110and the semiconductor light emitting devices of the first to third comparative examples. Both the InGaN barrier layer125and the InGaN well layer126are assumed to be 5 nm in thickness.

As shown inFIG. 16, the semiconductor light emitting device110of this embodiment has higher light output than the semiconductor light emitting device of the third comparative example. Meanwhile, the semiconductor light emitting devices of the first and second comparative examples have light output slightly higher than the output of the semiconductor light emitting device of the third comparative example.

FIGS. 17A and 17Bare views showing that carriers are injected into the InGaN well layers126, being of this embodiment and the third comparative example, respectively. The third comparative example will be described below.

As shown inFIG. 17B, in the semiconductor light emitting device of the third comparative example, holes and electrons are injected from the sides of the P-type GaN clad layer113and the N-type GaN clad layer112, respectively, into the semiconductor light emitting layer115including the MQW structure.

Heavy holes stay in the semiconductor light emitting layer115on the side of the P-type GaN clad layer113whereas light electrons reach the semiconductor light emitting layer115on the side of the P-type GaN clad layer113. As a result, the holes and the electrons are more likely to recombine with each other in the InGaN well layer126aon the side of the P-type GaN clad layer113.

Holes and electrons concentrate in the InGaN well layer126a. The InGaN well layer126ais so thin that the density of carriers is excessively high therein. As a result, the non-radiative Auger recombination proportional to the cube of carrier density exceeds the radiative recombination proportional to the square of carrier density, thereby preventing high luminance efficiency.

Meanwhile, as shown inFIG. 17A, holes injected into the InGaN well layer126afurther go into the InGaN well layer126band126cso that the hole density is equalized in the semiconductor light emitting device110of this embodiment.

As a result, the light output increases from the InGaN well layer126aprobably because the non-radiative Auger recombination decreases and the ratio of the radiative recombination (natural emission) to the Auger recombination increase.

The InGaN well layers126band126cbasically have low hole-density, thereby resulting in less Auger recombination and less radiative recombination (natural emission). The hole density increases in the InGaN well layers126band126cto some degree to probably enhance the radiative recombination (natural emission) and the resultant light output.

The semiconductor light emitting devices of the first and second comparative examples have no obvious tendency that holes easily move from the InGaN well layer126ato the InGaN well layers126band126c. The above-described shows that the semiconductor light emitting devices of the first and second comparative examples have light output similar to that of the semiconductor light emitting device of the third comparative example.

As described above, in order to increase the light output of the semiconductor light emitting device, it essential to make the bandgap of the InGaN barrier layer125bnarrower than those of the InGaN barrier layers125cand125d.

Next, a method of manufacturing the semiconductor light emitting device110will be explained with reference toFIGS. 18A to 20.FIGS. 18A to 20are cross-sectional views illustrating the steps of manufacturing the semiconductor light emitting device110in sequential order.

As shown inFIG. 18A, the N-type GaN clad layer112, the light emitting layer115, the P-type GaN clad layer113and the P-type GaN contact layer114are epitaxially grown on a sapphire substrate141with a C plane of a plane direction for epitaxial growth in the order by MOCVD (metal organic chemical vapor deposition) method so as to form the semiconductor laminated body111.

The process of forming the semiconductor laminated body11is briefly described below. As a preliminary treatment, a sapphire substrate141is subjected to organic cleaning and acid cleaning, for example. The resultant sapphire substrate141is contained in a reaction chamber of the MOCVD system. Thereafter, the temperature of the sapphire substrate141is raised to 1100° C., for example, by high-frequency heating in a normal-pressure atmosphere of a mixed gas of a nitrogen (N2) gas and a hydrogen (H2) gas. Thereby, the surface of the sapphire substrate141is etched in gas phase, and a natural oxide film formed on the surface of the sapphire substrate141is removed.

The N-type GaN layer112with a thickness of 4 μm, in which the silicon concentration is 1 E19 cm−3, is formed by using the mixed gas of the N2gas and the H2gas as a carrier gas while supplying an ammonium (NH3) gas and a trimethyl gallium (TMG) gas, for example, as process gases, and supplying a silane (SiH4) gas, for example, as the N-type dopant.

The temperature of the sapphire substrate141is decreased to and kept at 800° C. which is lower than 1100° C., for example, while continuing supplying the NH3gas with the supply of the TMG gas and the SiH4gas stopped.

The InGaN barrier layer125ewith a thickness of 5 nm, in which the In composition ratio is 0, the InGaN well layer126dwith a thickness of 5 nm, in which the In composition ratio is 0.15, the InGaN barrier layer125dwith a thickness of 5 nm, in which the In composition ratio is 0, and the InGaN well layer126cwith a thickness of 5 nm, in which the In composition ratio is 0.15, are formed by using the N2gas as the carrier gas while supplying the NH3gas and the TMG gas as the process gases, and intermitting the supply of a trimethyl indium (TMI) gas, for example.

The InGaN barrier layer125cwith a thickness of 5 nm, in which the In composition ratio is 0.03, the InGaN well layer126bwith a thickness of 5 nm, in which the In composition ratio is 0.15, the InGaN barrier layer125bwith a thickness of 5 nm, in which the In composition ratio is 0.05, and the InGaN well layer126awith a thickness of 5 nm, in which the In composition ratio is 0.15, are formed while supplying the NH3gas and the TMG gas as the process gases, and increasing or decreasing the supply of the TMI gas.

Finally, the InGaN barrier layer125awith a thickness of 5 nm, in which the In composition ratio is 0, is formed while stopping supplying only the TMI gas. Thereby, the light emitting layer115having the MQW structure is obtained.

The P-type GaN clad layer113with a thickness of 100 nm, in which the concentration of Mg is approximately 1 E20 cm−3, is formed. The P-type GaN contact layer114with a thickness of approximately 10 nm, in which the concentration of Mg is approximately 1 E21 cm−3, is formed.

As shown inFIG. 18B, a silver film with a thickness of 0.5 μm and the gold film with a thickness of 1 μm are stacked on the P-type GaN contact layer114by sputtering method so as to form the metal electrode118.

As shown inFIG. 18C, a silicon substrate142is prepared. Gold films143,144with a thickness of 1 μm are formed on the both side surfaces of the silicon substrate52by sputtering method, for example. A gold tin (AuSn) alloy film145is formed on the gold film143by vacuum evaporation method, for example. The silicon substrate142is the support substrate120. The gold film144is the substrate electrode121.

As shown inFIG. 19A, the sapphire substrate141is reversed upside down, so that the metal electrode118faces the gold tin alloy film145, and the sapphire substrate141and the silicon substrate142are placed on each other. Thereafter, the sapphire substrate141and the silicon substrate142are heated by a heater146and pressed.

Since the gold tin alloy film145is melted, the gold film of the metal electrode118and the gold film143are fused, so that the bonding layer119is formed. The sapphire substrate141and the silicon substrate142are bonded with the bonding layer119interposed in between.

As shown inFIG. 19B, the sapphire substrate141and the semiconductor laminated body111are separated, by laser lift-off method. The laser lift-off method is a method for emitting high-output laser beam to partially decompose inside of a substance by heat application and separating the substance with the decomposed portion being the border.

A gold film is formed on the N-type GaN clad layer112with the concave-convex portion112aby sputtering method, for example. The gold film is patterned so as to form the pad electrode117aand the thin wire electrode117b. Thereby, the light emitting device110shown inFIGS. 12A and 12Bis obtained.

An X-ray diffraction method, etc. can evaluate the InGaN barrier layer125and the InGaN well layer126for the In-compositions x2 and x1, respectively.

Specifically, the lattice constant of the InGaN barrier layers125is determined using the X-ray diffraction method, thereby determining the In-composition x2. A relation between the In-composition and lattice constant of InGaN obeys a Vegard's law. GaN has an a-axis length of about 0.319 nm and a c-axis length of about 0.518 nm. InGaN has an a-axis length of about 0.355 nm and a c-axis length of about 0.576 nm.

As described above, the semiconductor light emitting layer115has the multiple quantum-well structure where the InGaN well layers126and the InGaN barrier layers125are each laminated alternately. In addition, the InGaN barrier layer125bnearest to the P-type GaN clad layer113among the InGaN barrier layers125sandwiched with InGaN well layers126has a narrower band gap than the InGaN barrier layers125cand125d.

The thin wire electrode117band the metal electrode118are formed to pass a current through the semiconductor light emitting layer115in a direction substantially vertical to the main surface thereof.

As a result, holes injected into the InGaN well layer126acan get over the low barrier of the InGaN barrier layer125bto go into the InGaN well layers126band126c, thereby averaging the hole density in the InGaN well layers126.

The carrier density in the InGaN well layer126ais properly maintained also during the great-current driving, thereby allowing it to prevent the Auger recombination and the carrier overflow. Thus, the semiconductor light emitting device with high light output is achieved.

The semiconductor light emitting device110may include a transparent conductive film for enhancing the spread of current.FIG. 21is a sectional view showing a semiconductor light emitting device including the transparent conductive film on the N-type GaN clad layer112.

As shown inFIG. 21, in the semiconductor light emitting device150, the transparent conductive film (the first electrode)151is formed on the substantially entire surface of the concave-convex portion112aof the N-type GaN clad layer112. The transparent conductive film151is transparent to light emitted from the light emitting layer115. The transparent conductive film151includes an ITO (Indium Tin Oxide) film having a thickness of 100 to 200 nm.

The pad electrode117aand the thin wire electrode117bare formed on the transparent conductive film151. Spreading the current certainly to the periphery of the semiconductor lamination body111only by the use of the thin wire electrode117brequires a large square of the thin wire electrode117b. The large square of the thin wire electrode117bblocks light to some degree to cause a problem that the light output reduces.

Forming the thin wire electrode117band the transparent conductive film151as being a stem; and branches and leaves, respectively, allows it to spread current certainly to the periphery of the semiconductor lamination body111and drastically reduce the light blocking of the thin wire electrode117b.

The sheet resistance of the transparent conductive film151is much higher than that of the thin wire electrode117b, which spreads current firstly to the thin wire electrode117band secondly to the transparent conductive film151.

The N-type GaN clad layer112has higher resistivity than transparent conductive films including an ITO film. Accordingly, the thickly grown N-type GaN clad layer112has sheet resistance one order of magnitude higher than the ITO film. The current spreads mostly through the transparent conductive film151and partially through the N-type GaN clad layer112.

The semiconductor light emitting device110can be further provided with an overflow prevention layer for preventing the carrier overflow. A superlattice buffer layer can be further formed for enhancing the crystallinity of the semiconductor lamination body115.FIG. 22is a sectional view showing a semiconductor light emitting device including the overflow prevention layer and the superlattice buffer layer.

As shown inFIG. 22, the semiconductor lamination body161of the semiconductor light emitting device160includes the P-type AlGaN overflow prevention layer162between the semiconductor light emitting layer115and the P-type GaN clad layer113.

The P-type AlGaN overflow prevention layer162has a thickness of 5 nm, a Mg-concentration of 1×1020cm−3, and an Al-composition ratio of 0.2. The P-type AlGaN overflow prevention layer62has a wider band gap than the P-type GaN clad layer113.

The superlattice buffer layer163is formed between the semiconductor light emitting layer115and the N-type GaN clad layer112. The first and second InGaN layers, which differ from each other in an In-composition, are each laminated alternately as being 30 pairs of the first and second InGaN layers, for example.

The first and second InGaN layers are 1 nm and 3 nm in thickness, respectively. The first InGaN layer has a higher In-composition than the second InGaN layer.

The P-type AlGaN overflow prevention layer162effectively prevents carriers in the InGaN well layer126from overflowing into the P-type GaN clad layer113. The superlattice buffer layer163prevents lattice defects such as dislocations from propagating from the N-type GaN clad layer112to the semiconductor light emitting layer115. As a result, the semiconductor light emitting device160advantageously increases its light output.

FIG. 23is a sectional view showing a semiconductor light emitting device having a semiconductor lamination body formed on a conductive substrate. As shown inFIG. 23, the semiconductor lamination body111of the semiconductor light emitting device170is formed on the C surface of the conductive substrate171for growth, e.g., a C surface of a GaN substrate.

The N-type GaN clad layer112, the semiconductor light emitting layer115, the P-type GaN clad layer113, and the P-type GaN contact layer114are formed on the conductive substrate171in order. The transparent conductive film151is formed on the P-type GaN contact layer114.

The substrate electrode172is formed on the opposite side of the conductive substrate171from the N-type GaN clad layer112. The substrate electrode172is a Ti/Pt/Au film allowing ohmic contact with the P-type GaN layer, for example.

In addition, a P-type nitride-series semiconductor is difficult to grow thick. Accordingly, the P-type nitride-series semiconductor film has higher resistivity than transparent conductive films including an ITO film. A current will spread mostly through the transparent conductive film151. A negligibly small current spreads through the P-type GaN layers including the P-type GaN clad layer113and the P-type GaN contact layer114.

Alternatively, a current-block layer may be formed on the P-type GaN contact layer114in the transparent conductive film151such that the current-block layer faces the pad electrode117aand the thin wire electrode117band the current-block layer is not in contact with the pad electrode117aand the thin wire electrode117b.

Furthermore, the transparent conductive film151may include a concave-convex portion to enhance its light-extraction efficiency.FIG. 24is a sectional view showing the essential portion of a semiconductor light emitting device including the transparent conductive film having a concave-convex surface.

As shown inFIG. 24, the transparent conductive film180has the concave-convex surface181including the substantially crystalline convex181aand the substantially amorphous concave181b.

The In-compositions x of the InGaN barrier layers125b,125c, and125dhave been described as being 0.05, 0.03, and 0, respectively. The In-compositions x thereof are not limited to these values only if the In-compositions x become lower in this order.

Alternatively, the In-compositions x of the InGaN barrier layers125b,125c, and125dmay be 0.05, 0.02, and 0.01; or 0.06, 0.02, and 0. The In-compositions x can be properly adjusted for targeted light output.

Although the embodiments have been described assuming 4 InGaN well layers126, the number of the InGaN well layers126is not limited to 4.

Third Embodiment

A semiconductor light emitting device in accordance with a third embodiment will be described with reference toFIGS. 25 and 26.FIG. 25is a sectional view showing the essential portion of the semiconductor light emitting device in accordance with the third embodiment.FIG. 26is a view showing the composition distribution of the essential portion. Wherever possible, the same reference numerals will be used in the third embodiment to denote the same as those in the first embodiment. The same description will not be repeated. The third embodiment differs from the second embodiment in that the semiconductor light emitting layer is made up of an AlGaN layer.

As shown inFIG. 25, the N-type Aly3Ga(1-y3)N clad layer192(hereinafter referred to as the N-type AlGaN clad layer) is formed in contact with the N-type GaN layer112, i.e., single crystal underlayer, in the semiconductor lamination body191of the semiconductor light emitting device190of this embodiment. The P-type Aly3Ga(1-y3)N clad layer193(hereinafter referred to as the P-type AlGaN clad layer) is formed in contact with the P-type GaN contact layer114.

The semiconductor light emitting layer194is formed between the N-type AlGaN clad layer192and the P-type AlGaN clad layer193, and has a quantum well structure where the Aly2Ga(1-y2)N barrier layers195aand195b,195c,195d, and the195e(hereinafter referred to as the AlGaN barrier layers) and the Aly1Ga(1-y1)N well layers196a,196b,196c, and196d(hereinafter referred to as the AlGaN well layers) are each laminated alternately.

The semiconductor light emitting layer194starts from the AlGaN barrier layer195ain contact with the P-type AlGaN clad layer193, and ends at the AlGaN barrier layer195ein contact with the N-type AlGaN clad layer192.

The AlGaN barrier layers195a,195b,195c,195d, and195ewill be collectively denoted by the AlGaN barrier layers195. The AlGaN well layers196a,196b,196c, and196dwill be collectively denoted by the AlGaN well layers196.

Each of the AlGaN barrier layers195is 5 nm in thickness, for example. Each of the AlGaN well layers196is 5 nm in thickness, for example. The number of the AlGaN well layers196is 4, for example.

The Al-composition y1 of the AlGaN well layers196is about 0.06 for the semiconductor light emitting device190to emit light having wavelengths of 360 to 380 nm.

The Al-composition y1 of the AlGaN well layers196and the Al-composition y2 of the AlGaN barrier layers195satisfy a relation of 0<y1<y2≦1. The AlGaN barrier layers195are each adjusted to have a wider band gap than the AlGaN well layers196.

Furthermore, the AlGaN barrier layer195bnearest to the P-type AlGaN clad layer193is adjusted to have a narrower band gap than the AlGaN barrier layers195cand195d.

Except for the AlGaN barrier layer195b, the AlGaN barrier layers195are adjusted such that the AlGaN barrier layers195on the side of the N-type AlGaN clad layer192has a band gap equal to or wider than that of the AlGaN barrier layer195on the side of the P-type AlGaN clad layer193.

When the band gap of the AlGaN barrier layers195is denoted by Eg(195), more specifically, Eg(195a), et al, the following relation is established:
Eg(195b)<Eg(195c)<Eg(195d)<Eg(195a)=Eg(195e).

The band gap Eg of an AlyGa(1-y)N layer changes from the band gap (about 3.45 eV) of GaN to the band gap (about 6.2 eV) of AlN depending on the Al-composition y. The change is not, however, linear and slightly convex downward owing to the band gap bowing.

FIG. 26is a view showing the Al-composition distribution of the semiconductor light emitting layer194. Both the Al-compositions y3 of the N-type AlGaN clad layer192and the P-type AlGaN clad layer193are controlled to be 0.2. Both the Al-compositions y2 of the AlGaN well layer195ein contact with the AlGaN well layer195aand the N-type AlGaN clad layer192in contact with the P-type AlGaN clad layer193are controlled to be 0.2.

As shown inFIG. 26, in the semiconductor light emitting device190of this embodiment, the Al compositions y1 of the AlGaN barrier layers195b,195c, and195dare 0.09, 0.12, and 0.15, respectively. That is, the band gaps of the InGaN barrier layers195b,195c, and195dbecome wider in order in the direction from the P-type clad layer193toward the N-type clad layer192, satisfying the following formula:
Eg(195b)<Eg(195c)<Eg(195d)=Eg(195a)=Eg(195e).

Applying a voltage between the pad electrode117aand the substrate electrode121causes a current to pass through the semiconductor light emitting layer115in a direction substantially perpendicular to the main surface115a. Carriers injected into the AlGaN well layers196recombined with each other to emit near-ultraviolet light having wavelengths of 360 to 380 nm.

In the semiconductor light emitting device190mentioned above, the AlGaN barrier layer195bis adjusted to have a narrower band gap than the AlGaN barrier layers195a,195c,195d, and195eso that the carrier density in the AlGaN well layer196ais prevented from being excessively high when a large current is supplied.

The operation principle and manufacturing method of the semiconductor light emitting device190is the same as that of the semiconductor light emitting device110shown inFIGS. 12A and 12B. The same description will not be repeated.

As described above, the carrier density within the AlGaN well layers196ais properly maintained also during great-current driving in the semiconductor light emitting device190of this embodiment, thereby allowing it to prevent the Auger recombination and the carrier overflow. Thus, the semiconductor light emitting device is obtained with high light output of near-ultraviolet light in the wavelength range from 380 to 200 nm.

Alternatively, the semiconductor light emitting device190may include the transparent conductive film151, the P-type AlGaN overflow prevention layer162shown inFIG. 22, and the superlattice buffer layer163. Alternatively, the semiconductor lamination body191may be formed on the conductive substrate as shown inFIG. 23.

The Al-compositions y of the AlGaN barrier layers195b,195c, and195dare not specifically limited only if the Al-compositions y become higher in this order. The number of the AlGaN well layers196is not specifically limited.

Fourth Embodiment

A semiconductor light emitting device in accordance with a fourth embodiment will be described with reference toFIGS. 27A and 27B.FIGS. 27A and 27Bare views showing the semiconductor light emitting device of this embodiment.FIG. 27Ais a plan view with the upper portion removed.FIG. 27Bis a sectional view taken along the line C-C inFIG. 27Aand viewed in the arrow-direction.

Wherever possible, the same reference numerals will be used in the third embodiment to denote the same as those in the second embodiment, and the same description will not be repeated. The fourth embodiment differs from the second embodiment in that the current passing through the semiconductor light emitting layer is extracted from the side of the P-type semiconductor layer.

As shown inFIGS. 27A and 27B, the semiconductor light emitting device210of this embodiment is configured in the same way as the semiconductor light emitting device110shown inFIG. 12so that the P-side electrode211is formed on the P-type GaN contact layer14.

The different point is that the N-side electrode212includes a plurality of portions a such that the distance between the portion a and the main surface115ais substantially equal to the distance between the main surface115aand the P-side electrode211. The P-side electrode211is disposed to enclose the N-side electrode212therewith at the portion a. Moreover, the portion a can be referred to as a portion where the N-side electrode212intersects with a plane containing the P-side electrode211.

That is, the N-side electrode212includes a plurality of columnar first N-side electrodes212athat pass through the semiconductor light emitting layer115from the P-side electrode211and are in contact with the N-type GaN clad layer112. The first N-side electrodes212aare arranged at each apex and the central point of the hexagon b denoted by chain lines (honeycomb), for example. The first N-side electrode is a column that is 2 to 20 μm in diameter, for example. The distance between the first N-side electrodes adjacent to each other is 10 to 100 nm, for example.

The first N-side electrode212aprotrudes into the N-type GaN clad layer112just by a height of H1from the interface between the semiconductor light emitting layer115and the N-type GaN clad layer112. The side surface of the first N-side electrode212ais covered with the insulating film213. The first N-side electrode212ais electrically separated from the layers from the P-side electrode211to the semiconductor light emitting layer115.

Furthermore, the N-side electrode212is formed on the P-side electrode211through the insulating film213, and has the second N-side electrode212bto which two or more first N-side electrodes212aare commonly connected. The insulating film213is a silicon oxide film having a thickness of 100 to 300 nm, which is formed with a CVD (Chemical Vapor Deposition) method.

The first N-side electrode212ais formed to extract a current from the semiconductor light emitting layer115to the side of the P-type semiconductor layer. The second N-side electrode212bis formed to collect currents extracted from the respective N-side electrodes212a.

The semiconductor lamination body111is formed above the conductive support substrate120via the conductive bonding layer119sandwiched between the N-side electrode212and the conductive support substrate120. The second N-side electrode212bis in contact with the bonding layer119. The semiconductor lamination body111includes the cutout111apassing through the semiconductor lamination body111. The P-side electrode211is partially exposed to the cutout111a, and serves as the P-side electrode pad211a.

The semiconductor light emitting device210of this embodiment is configured such that the semiconductor light emitting layer115homogenizes the number of holes injected from the P-side electrode211to equalize the hole density in the InGaN well layers126as well as the electron density therein by homogenizing the number of electrons injected from the N-side electrode212.

Connecting the P-side electrode pad211aand the substrate electrode121to the positive and negative terminals of a power supply, respectively, causes a current to flow from the P-side electrode211intensively to the first N-side electrode212aas shown by the arrows c. The hexagonal shape “d” denoted by the dotted line shows a virtual area where the first N-side electrode212acollects the current from the P-side electrode211. As a result, the current distribution becomes more homogeneous in the plane of the semiconductor light emitting device210.

The horizontal distance between the two the first N-side electrodes212aadjacent to each other is 10 to 100 μm whereas the vertical distance between the P-type GaN contact layer114and the semiconductor light emitting layer115is 145 nm at longest. The horizontal distance is one to two orders of magnitude longer than the vertical distance.

Accordingly, the current is likely to flow more dominantly in the direction parallel to the main surface115aof the semiconductor light emitting layer115than in the direction vertical thereto.

Increasing the current flowing in the direction vertical to the main surface115arequires increasing the height H1by which the first N-side electrode212aprotrudes into the N-type GaN clad layer112. When the N-type GaN clad layer112is 4 μm in thickness, it is preferable that the height H1is not less than 2 μm, for example.

This reduces the ratio between the horizontal distance and the vertical distance to a level of one order of magnitude. This also allows it to increase the current flowing in the direction vertical to the main surface115aof the semiconductor light emitting layer115.

A simulation of the light output of the semiconductor light emitting device210will be described below with reference toFIG. 28. InFIG. 28, the simulation conditions and the first to third comparative examples are the same as those shown inFIG. 16.

As shown inFIG. 28, the semiconductor light emitting device210of this embodiment has higher light output than those of the first to third comparative examples. The simulation reveals that the current flows sufficiently in the direction vertical to the main surface of the semiconductor light emitting layer115.

The manufacturing method of the semiconductor light emitting device210will be described below with reference toFIGS. 29A to 30B.FIGS. 29A to 30Bare sectional views showing the essential steps of the manufacturing process of the semiconductor light emitting device210in order.

The semiconductor lamination body111is formed on the sapphire substrate141by MOCVD in the same way as inFIGS. 18A to 19B. The P-side electrode211is formed on the P-type GaN contact layer114of the semiconductor lamination body111.

As shown inFIG. 29A, a resist film221with the opening221acorresponding to the first N-side electrode212ais formed on the P-type GaN contact layer114by photolithography. The P-side electrode211is removed by wet-etching using iodine etchant and using the resist film221as a mask to expose the P-type GaN contact layer114.

The semiconductor lamination body111is anisotropically etched by RIE (Reactive Ion Etching) using a chlorine gas. The N-type GaN clad layer112is anisotropically etched just to a depth of H1from the surface thereof. This anisotropy etching forms a via hole222.

After the resist film221has been removed, a silicon oxide film223is formed on the resultant surface with a CVD method to conformally cover the P-type GaN contact layer114, and the side surface and bottom of the via hole222with the silicon oxide film223.

As shown inFIG. 29C, the silicon oxide film223is removed just from the bottom of the via hole222. As a result, the insulating film213covers the top and side surfaces of the P-side electrode211, and the side surface of the via hole222. In addition, the silicon oxide film223on the bottom of the via hole222will be removed as follows, for example.

Positive resist is applied on the resultant surface having the silicon oxide film223. Only the resist film on the bottom of the via hole222is exposed and developed to expose the silicon oxide film223on the bottom of the via hole222. The exposed silicon oxide film223is etched by wet etching using, e.g., hydrofluoric acid solution. The resist film is removed.

As shown inFIG. 30A, a Ti/Pt/Au laminated film is formed on the insulating film213by sputtering. As a result, the N-side electrode212includes the first N-side electrode212aembedded in the via hole222via the insulating film213and the second N-side electrode212bformed on the P-type GaN contact layer114.

The sapphire substrate141is attached to the silicon substrate142. Then, the sapphire substrate141is removed to expose the N-type GaN clad layer112. The concave-convex portion112ais formed on the exposed N-type GaN clad layer112. These manufacturing steps are conducted in the same way as inFIGS. 18C to 20.

As shown inFIG. 30B, the resist film224is formed on the N-type GaN clad layer112, including the opening224athat is to be the cutout111a. The semiconductor lamination body111is anisotropically etched using the resist film224as a mask to partially expose the P-side electrodes211. The exposed P-side electrode211becomes the P-side electrode pad211a. Then, the resist film224is removed. As a result, the semiconductor light emitting device210is achieved as shown inFIGS. 17A and 27B.

As described above, the N-side electrode212is formed on the side of the P-type semiconductor layer in the semiconductor light emitting device210of this embodiment. No electrode on the N-type GaN clad layer112through which light is extracted blocks the light extracted from the surface of the N-type GaN clad layer112. Thus, the semiconductor light emitting device210advantageously increases its light output.

Alternatively, the P-type AlGaN overflow prevention layer162may be formed between the semiconductor light emitting layer115and the P-type GaN clad layer113in the same way as in the semiconductor light emitting device160shown inFIG. 22. Furthermore, the superlattice buffer layer163may be formed between the N-type GaN clad layer112and the semiconductor light emitting layer115.

In the above-described case, the N-side electrode212has the second N-side electrode212b. The N-side electrode212without the second N-side electrode212bcauses no trouble. The important point is that the first N-side electrode212ais certainly in contact with the bonding layer119.

Also in the above-described case, the P-side electrode is disposed to enclose the N-side electrode therewith. Alternatively, the N-side electrode may be disposed to enclose the P-side electrode.

FIGS. 31A and 31Bare views showing a semiconductor light emitting device where the N-side electrode is disposed to enclose the P-side electrode.FIG. 31Ais a plan view with the upper portion removed.FIG. 31Bis a sectional view taken along the line C-C inFIG. 31Aand viewed in the arrow-direction.

As shown inFIGS. 31A and 31B, the semiconductor light emitting device230includes the P-side electrode231on the P-type GaN contact layer114. The N-side electrode232includes a plurality of portions “a” such that the distance between the portions “a” and the main surface115ais substantially equal to the distance between the main surface115aand the P-side electrode231. The P-side electrode231is disposed to enclose the N-side electrode212therewith at the portion “a”.

That is, the N-side electrode232is a thin wire electrode that forms a hexagon lattice (honeycomb) horizontally as a whole and passes vertically through the semiconductor light emitting layer115from the P-side electrode231to be in contact with the N-type GaN clad layer112. The N side electrode232is 2 to 20 μm in width, for example. One side of the hexagon is 6 to 60 μm in length, for example.

The N-side electrode232protrudes into the N-type GaN clad layer112just by a height of H1from the interface between the semiconductor light emitting layer115and the N-type GaN clad layer112. The insulating film233covers the side surface and bottom surface of the N-side electrode232to be electrically separated from the layers from the P-side electrode231to the semiconductor light emitting layer115.

The P-side electrode231is divided by the honeycomb-shaped N-side electrode232to be enclosed with the N-side electrode232.

Furthermore, a portion of the semiconductor light emitting layer115is removed from the P-type GaN contact layer114to form a cutout111bin the semiconductor lamination body111. The cutout111bexposes the N-type GaN clad layer112in the semiconductor lamination body111. A columnar N-side electrode bump234is formed on the N-type GaN clad layer112exposed to the cutout111b. The N-side electrode bump234is in contact with the N-side electrode232adjacent thereto.

The semiconductor lamination body111is formed on the P-side electrode231so that the bonding layer119is sandwiched between the P-side electrode231and the conductive support substrate. The honeycomb-shaped P-side electrodes231, which are in contact with the bonding layer119, are commonly connected to the bonding layer119.

The support substrate120is provided with a concave not shown adjacent to the semiconductor lamination body111. The insulating film235is embedded in the concave, e.g., with a CVD method. The N-side electrode pad236is formed on the insulating film235. The N-side electrode pad235is in contact with the N-side electrode bump234.

Connecting the substrate electrode121and the N-side electrode pad236to the positive and negative terminals of a power supply, respectively, causes a current to flow as shown by the arrows b from the P-side electrode231to the N-side electrode232enclosing the P-side electrode231via the semiconductor light emitting layer115.

The current having flowed into the N-side electrode232is collected and extracted from the N-side electrode232via the N-side electrode bump234and the N-side electrode pad236. The current distribution becomes more homogeneous in the plane of the semiconductor light emitting device230.

The manufacturing method of the semiconductor light emitting device230will be described below.FIGS. 32A to 33Bare sectional views showing the essential steps of the manufacturing process of the semiconductor light emitting device230.

The semiconductor lamination body111is formed on the sapphire substrate141in the same way as inFIGS. 18A and 18B. The P-side electrode231is formed on the P-type GaN contact layer114of the semiconductor lamination body111.

As shown inFIG. 32A, the resist film241is formed on the P-side electrode231such that the resist film241acquires the openings241aand241bboth corresponding to the honeycomb-shaped N-side electrode232and the cutout111b, respectively, by photolithography.

The P-side electrode231is removed by wet-etching using iodine etchant and using the resist film241as a mask to expose the P-type GaN contact layer114. At the step, the P-side electrode231is divided into each hexagonal shape.

The semiconductor lamination body111is anisotropically etched by RIE (Reactive Ion Etching) using a chlorine gas. The N-type GaN clad layer112is anisotropically etched just to a depth of H1from the surface thereof. This anisotropy etching forms a honeycomb-shaped trench and the cutout111b.

After the resist film241has been removed, a silicon oxide film is formed on the resultant surface with a CVD method to conformally cover the side surface and bottom of the trench242with the silicon oxide film. At this time, the silicon oxide film is formed also on the side surface and bottom of the cutout111b.

The silicon oxide film is anisotropically etched by RIE using a fluorine-containing gas. The silicon films on the P-side electrode and on the bottoms of the trench242and the cutout111bare removed, and the silicon films on the side surfaces of the trench242and the cutout111bare left. As a result, the insulating film233is formed on the side surface of the trench242.

As shown inFIG. 32C, the N-side electrode232is embedded in the trench242, and the end surface of the N-side electrode232is covered with an insulating film. This insulating film forms a portion of the insulating films233. Simultaneously, the N-side electrode bump234is formed.

A concave for the cutout111bis formed in the silicon substrate142. A silicon oxide film is formed on the silicon substrate142with a CVD method, and is polished, e.g., with a CMP method until the silicon substrate142is exposed. This step provides the insulating film235embedded in the silicon substrate142.

The bonding layer119is formed on the silicon substrate142, and the N-side electrode pad236is formed on the insulating film234. Preferably, the N-side electrode pad236is made up of the same material as the bonding layer119.

As shown inFIG. 33B, the sapphire substrate141is turned upside down and made to face the silicon substrate142such that the P-side electrode231is overlapped with the bonding layer119and the N-side electrode bump234is overlapped with the N-side electrode pad236. Then, the sapphire substrate141and the silicon substrate142are pressed firmly to connect the N-side electrode232with the P-side electrode231.

The sapphire substrate141and the silicon substrate142are in contact with each other in the same way as inFIGS. 19A to 20. Then, the sapphire substrate141is removed to expose the N-type GaN clad layer112on which the concave-convex surface112ais to be formed. This step provides the semiconductor light emitting device230shown inFIGS. 31A and 31B.

As described above, the honeycomb N-side electrode232is disposed to enclose the P-side electrode231.

In such a structure where the N-side electrode232encloses the P-side electrode231, the distance from the center of the P-side electrode231to the N-side electrode232is constant. The structure brings about the same effect as the effect brought about by the semiconductor light emitting device210shown inFIGS. 27A and 27B.

Also in this structure, the N-side electrode232encloses the semiconductor light emitting layer115, thereby allowing it to extract light from the N-type GaN clad layer112. The trench242may be made to have a sloped side surface so that light is directed more upward.

As shown inFIG. 34A, when the hexagonal N-side electrode232has at least one sloped side surface, light vertically incident to the sloped side surface can be directed upward. In contrast, as shown inFIG. 34B, when the hexagonal N-side electrode232has two parallel side surfaces, light vertically incident to the parallel side surfaces cannot be directed upward.