Apparatus and method for power supply overvoltage disconnect protection

A circuit for voltage transient protection is provided. The circuit includes an input monitor circuit, an input transistor, and a voltage regulator. The input transistor is connected between the input voltage and the input voltage terminal of the voltage regulator. The input monitor circuit asserts an input monitor circuit output signal if the input voltage reaches a pre-determined level. When the input monitor circuit output signal is asserted, and gate and source of the input transistor are shorted together (to disconnect the input of the voltage regulator from the input voltage), and the voltage regulator is disabled.

FIELD OF THE INVENTION

The invention is related to transient protection/suppression, and in particular but not exclusively, to a method and circuit for disconnecting input power from a regulator in an automotive electronic system when a load dump or other voltage spike occurs on the battery line.

BACKGROUND OF THE INVENTION

Over-voltage conditions can damage electronic devices, including transistors, regulators, and loads. High-voltage transient devices such as for automotive often use devices capable of operating with high voltages, so that the devices are not damaged during high voltage transients, such as load dump conditions.

A load dump condition may occur in an automobile due to an abrupt change in alternator load. For example, headlights being turned off, or the battery being disconnected from the battery post by a shock or mechanical vibration, may cause a load dump condition. The load dump condition may cause a large increase in voltage. The battery line, normally having a voltage of around 12 Volts, may have a voltage spike going to 50V or more during the load dump condition. To accommodate such high voltage spikes, devices capable of operating at such voltages may be used. However, such high-voltage devices are typically significantly more expensive and/or limited in availability.

DETAILED DESCRIPTION

Throughout the specification and claims, the following terms take at least the meanings explicitly associated herein, unless the context dictates otherwise. The meanings identified below do not necessarily limit the terms, but merely provide illustrative examples for the terms. The meaning of “a,” “an,” and “the” includes plural reference, and the meaning of “in” includes “in” and “on.” The phrase “in one embodiment,” as used herein does not necessarily refer to the same embodiment, although it may. As used herein, the term “or” is an inclusive “or” operator, and is equivalent to the term “and/or,” unless the context clearly dictates otherwise. The term “based, in part, on”, “based, at least in part, on”, or “based on” is not exclusive and allows for being based on additional factors not described, unless the context clearly dictates otherwise. The term “coupled” means at least either a direct electrical connection between the items connected, or an indirect connection through one or more passive or active intermediary devices. The term “circuit” means at least either a single component or a multiplicity of components, either active and/or passive, that are coupled together to provide a desired function. The term “signal” means at least one current, voltage, charge, temperature, data, or other signal. Where either a field effect transistor (FET) or a bipolar junction transistor (BJT) may be employed as an embodiment of a transistor, the scope of the words “gate”, “drain”, and “source” includes “base”, “collector”, and “emitter”, respectively, and vice versa.

Briefly stated, the invention is related to a circuit for voltage transient protection. The circuit includes an input monitor circuit, an input transistor, and a voltage regulator. The input transistor is connected between the input voltage and the input voltage terminal of the voltage regulator. The input monitor circuit asserts an input monitor circuit output signal if the input voltage reaches a pre-determined level. When the input monitor circuit output signal is asserted, and gate and source of the input transistor are shorted together (to disconnect the input of the voltage regulator from the input voltage), and the voltage regulator is disabled.

FIG. 1shows a block diagram of an embodiment of circuit100. Circuit100includes transistor M1, voltage regulator controller110, and input monitor circuit120.

Transistor M1is an input transistor that is coupled between input voltage IN and the voltage input (vin) of voltage regulator controller110. In one embodiment, input voltage IN is the battery voltage line for an automobile. However, the invention is not so limited, and may also be suitably employed in virtually any high voltage transient environment, such as industrial applications or the like.

Input monitor circuit120is arranged to monitor voltage IN. If voltage IN reaches a pre-determined level (which may be adjusted by hysteresis), input monitor circuit120asserts input monitor circuit output signal IM_OUT, which in turns causes input transistor M1, which operates as a switch, to open (transistor M1may however break down, and therefore no longer operate as an open switch, if input voltage IN exceeds the voltage rating of transistor M1). In one embodiment, input transistor M1is opened by shorting the gate of transistor M1to the source of transistor M1. In other embodiments, opening input transistor M1may be accomplished in other suitable ways. In one embodiment, input monitor circuit120includes a low-voltage reset circuit that asserts signal IM_OUT when the low-voltage reset circuit leaves the reset state (as shown inFIG. 4in one embodiment). However, the invention is not so limited, and some embodiments of input monitor circuit120do not include a low-voltage reset circuit. Other embodiments may use a high-voltage reset circuit, monitor logic, adjustable shunt regulator, a discrete comparator and voltage reference, and/or the like.

Voltage regulator controller110is arranged to control conversion of voltage regulator input voltage VR_IN into regulated output voltage Vout (not shown inFIG. 1). More specifically, voltage regulator controller110provides switch control signal S_CTL to control the regulation. In other embodiments, voltage regulator controller110may be a linear regulator controller rather than a switching regulator controller.

In circuit100, voltage regulator controller110also has an enable input (en) that is coupled to input monitor circuit120. In circuit100, input monitor circuit120, in addition to controlling input transistor M1, also disables voltage regulator controller110when the input voltage reaches the pre-determined level.

In one embodiment, when input voltage IN reaches the pre-determined level, the gate and source of transistor M1are shorted together, causing transistor M1to operate as an open switch. However, if the voltage limit of transistor M1is reached, transistor M1breaks down, and operates essentially as a zener diode. However, by disabling voltage regulator controller110, no current passes through transistor M1, and there is accordingly substantially no power through transistor M1. In this way, transistor M1is not damaged even though it is in voltage breakdown.

In circuit100, if input voltage Vin reaches the pre-determined level, the input voltage is disconnected from voltage regulator controller110, and the voltage regulator controller is disabled so that no current is drawn through transistor M1even if it is in voltage breakdown. It is not sufficient merely to disable voltage regulator controller110by disconnecting Vin, because that will not stop current from flowing through transistor M1if transistor M1is in voltage breakdown.

This topology potentially allows a voltage protection with twice the voltage limit of transistor M1. For example, a 30V part may be used for transistor M1, and provide 60V over-voltage protection. Or a 50V part may be used for transistor M1, and a 30V rated regulator to provide 80V over-voltage protection.

In one embodiment, as illustrated inFIG. 1, the input transistor M1is a P-channel MOSFET transistor. However, the invention is not so limited, and other embodiments of input transistor M1are within the scope and spirit of the invention.

AlthoughFIG. 1illustrates an embodiment in which voltage regulator controller110is disabled by de-asserted the signal at the enable pin of voltage regulator controller110, the invention is not so limited, and other ways of disabling voltage regulator controller110are within the scope and spirit of the invention. For example, in one embodiment, voltage regulator controller110is disabled by forcing the regulator voltage feedback pin high. This embodiment and others are within the scope and spirit of the invention. Any suitable method for shutting off the voltage regulator may be employed, so long as the method prevents current from passing through input transistor M1even when input transistor M1is in voltage breakdown. Simply disconnecting the input is not sufficient, because it does not prevent current from passing through the input transistor even when the input transistor is in voltage breakdown.

FIG. 2shows a block diagram of an embodiment of circuit200, which illustrates an automotive context for an embodiment of circuit100ofFIG. 1.

Circuit200further includes alternator230, battery B1, switch S1, transistor Q1B, diode D0, capacitor Cout, resistor RFB1, and resistor RFB2. Transistor Q1A is an embodiment of transistor M1ofFIG. 1. Voltage regulator controller210, in conjunction with transistor Q1B, diode D0, inductor L1, capacitor Cout, resistor RFB1, and resistor RFB2, operate together as a buck switching regulator, which converts voltage VR_IN to regulated output voltage Vout. Transistor Q1B is a high-side switch for the buck switching regulator. Voltage regulator210includes pin Pgate to provide switch control signal S_CTL to control high-side switch transistor Q1B.

In operation, voltage Vout is provided to power electronic circuits in an automobile that control loads such as headlights, seat motors, other motors, fans, and the like. Alternator230and battery B1are connected to the battery line. Battery B1provides battery voltage Vbat. The voltage on the battery line is battery line voltage Vbat_line. Battery line voltage Vbat_line is an embodiment of voltage Vin ofFIG. 1. If battery B1is disconnected from the battery line, a load dump condition may occur, causing a voltage spike on batteryline voltage Vbat_line. If voltage Vbat_line exceeds a pre-determined voltage level (19.25 V in one embodiment), then input monitor circuit220asserts signal IM_OUT, causing switch S1to close, and de-asserts signal EN, causing voltage regulator controller210to be disabled while voltage Vbat_line remains above the pre-determined level. In one embodiment, signals IM_OUT and signal EN are the same signal. In other embodiments, they are different signals.

In one embodiment, voltage regulator controller210is included on an integrated circuit. In one embodiment, voltage regulator controller210is included on an integrated circuit, and the other components of the voltage regulator are off-chip. However, in other embodiments, some of the other components of the voltage regulator may be included on the integrated circuit that includes voltage regulator controller210. For example, in one embodiment, transistor Q1B and voltage regulator controller210are both included together in an integrated circuit, and in another embodiment, transistor Q1B is a discrete off-chip component.

AlthoughFIG. 2illustrates a particular context for which circuit100may be employed, as previously discussed, the invention is not so limited, and embodiments of circuit100may be used in other contexts as previously discussed.

FIG. 3illustrates a block diagram of an embodiment of circuit300, which may be employed as an embodiment of circuit100ofFIG. 1. Circuit300may further include switch S1, transistor Q1B, diode D0, capacitor Cout, resistor RFB1, and resistor RFB2, which operate in a similar manner as described above with regard toFIG. 2. Also, circuit300may include transistor Q2, transistor Q3, diode D1, and resistors R3-R5. Transistor Q2is an embodiment of switch S1ofFIG. 2. Input monitor circuit320includes resistor R1, resistor R2, and low-voltage reset circuit350.

Resistors R1and R2operate together as a voltage divider to provide threshold voltage Vth from voltage Vin. Further, low-voltage reset circuit350is arranged to be in a reset state when threshold Vth is below a reset voltage level (as adjusted by voltage divider and hysteresis), and to be out of the reset state when threshold voltage Vth is above the reset voltage level (as adjusted by voltage divider and hysteresis). For example, in one embodiment, low-voltage reset circuit350is in a reset state when threshold voltage Vth is 3.0V or less (as adjusted by hysteresis). In one embodiment, when low-voltage reset circuit350is in the reset state, signal IM_OUT is logic low, and when low-voltage reset circuit350is out of the reset state, signal IM_OUT is high impedance (e.g. open drain). When low-voltage reset circuit350is high impedance, resistor R3actively turns on transistor Q3. Also, resistors R1and R2may be suitably selected in order to select the desired pre-determined level. In the embodiment shown, signal IM_OUT is logic low when low-voltage reset circuit350is in the reset state. In one embodiment, R1is pre-selected as 110 KiloOhms and resistor R2is pre-selected as 21.7 KiloOhms. In this embodiment, low-voltage reset circuit350is reset as long as Vin is 18.2 V or less.

Transistors Q2and Q3operate as switches. When low-voltage reset circuit350leaves the reset state, resistor R3turns on Q3, which in turn causes transistor Q2to turn on. When transistor Q2turns on, it shorts out the gate-source voltage on transistor Q1A. Additionally, transistor Q3and diode D1disable voltage regulator310when low-voltage reset circuit350leaves the reset state. Accordingly, there is no current flowing across either transistor Q1A or transistor Q1B because the regulator is off.

In one embodiment, as illustrated inFIG. 3, transistors Q1A and Q1B are included together in a dual MOSFET package. However, in other embodiments of circuit300, transistor Q1B is integrated and included on the same integrated circuit as voltage regulator controller310. Further,FIG. 3indicates 30V MOSFETs with over voltage protection to 60V, but this is merely exemplary of one embodiment, and the invention is not so limited.

Resistor R5is optional. For some applications, it is preferable to keep R5in the circuit, and for other applications, it is preferable to omit R5from the circuit.

Diode D1may be optional depending on the design of voltage regulator controller710. Depending on the implementation of voltage regulator710, in some embodiments, diode D1may be omitted, and the base of Q2may be directly connected to the enable pin of regulator controller310.

FIG. 4shows a block diagram of an embodiment of low-voltage reset circuit450, which is one embodiment of a low-voltage reset circuit that may be used for low-voltage reset circuit350ofFIG. 3. Low-voltage reset circuit450is a relatively small, simple three-pin integrated circuit with an integrated precision reference voltage, that operates at relatively small voltage (e.g. 1V) and relatively low current (e.g. 1 μA), and is commonly used for resetting digital circuits such as flash memory or a processor, or to indicate low battery voltage or a power failure condition, when the input voltage (e.g. the battery voltage) reaches an under-voltage condition (e.g. the input voltage is below 3.0V, as modified by hysteresis). One example of a low-voltage reset circuit is the LMS33460, available from National Semiconductor Corporation. The LMS33460 has a threshold voltage of 3.0V, with 115 mV of hysteresis. Of course, the low-voltage reset circuit may have more than three pins for purposes outside of the core functionality or may be internally connected. For example, the LMS33460 has five pins. The three primary pins are pin3(GND), pin4(OUTBAR), and pin5(YIN). Pin1is internally connected and should not be connected externally, and pin2is internally connected to ground, and should be either not connected externally or connected externally to ground. However, LMS33460 is still considered to be a “three-pin device”, as that term is used herein, since two of the pins are internally connected.

FIG. 5illustrates a block diagram of an embodiment of circuit500, which may be employed as an embodiment of circuit300ofFIG. 3. Circuit500is similar to circuit300ofFIG. 3, albeit different in some ways. In circuit500, low-voltage reset circuit550is an active high (open drain output) low-voltage reset circuit rather than an active low (open drain output) low-voltage reset circuit. By using an active-high (open drain output) low voltage reset, resistor R3and transistor Q3may be omitted from the circuit. Transistor Q2is an embodiment of switch S1ofFIG. 2.

FIG. 6shows a block diagram of an embodiment of low-voltage reset circuit650, which may be employed as an embodiment of low-voltage reset circuit550ofFIG. 5. Transistor M3in this embodiment is a high-voltage transistor (e.g. 30 V, or greater than the maximum Vin over voltage trip level).

FIG. 7shows a block diagram of an embodiment of circuit700, which may be employed as an embodiment of circuit100ofFIG. 1. Circuit700further includes resistor R6, resistor R7, and transistor Q4, which operate to provide signal EN. Input monitor circuit520includes resistor R1, resistor R2, resistor R12, and adjustable shunt regulator SR1.

FIG. 8illustrates a functional diagram of an embodiment of adjustable shunt regulator SR1ofFIG. 7.