Wireless transceiver chip and calibration method thereof

A wireless transceiver chip and calibration method thereof are disclosed. The wireless transceiver chip comprises at least one receiver, at least one transmitter, and at least one switch. The switch is connected to the receiver and the transmitter respectively for being applied to switch between the receiver and the transmitter. Practically, the switch is provided within the wireless transceiver chip, such that the pin count of the wireless transceiver chip can be reduced.

BACKGROUND OF THE INVENTION

1. Technical Field

The present invention is related to a wireless transceiver chip, wherein a switch is integrated into the wireless transceiver chip for reducing the pin count of the chip.

2. Description of the Prior Art

Referring toFIG. 1, a block diagram of the wireless transceiver chip according to the prior art is showed. The wireless transceiver chip10comprises a receiver11and a transmitter13, wherein the receiver11and the transmitter13are connected to the switch15through the different pins of the wireless transceiver chip10. That is, the switch15is provided on the external of the wireless transceiver chip10, and the receiver11is connected to the switch15through the first pin171of the wireless transceiver chip10, as well as, the transmitter13is connected to the switch15through the second pin173of the wireless transceiver chip10.

The switch15is further connected to the baseband chip19for switching between the receiver11and the transmitter13. Thereby, the signal from the wireless transceiver chip10can be sent to the baseband chip19via the path1, and the signal from the baseband chip19can be sent to the wireless transceiver chip10via the path2.

However, due to the pin count of the wireless transceiver chip10is too large, the wireless transceiver chip10has various problems, for example, the chip size of the wireless transceiver chip10can't be reduced easily, as well as, the circuit layout of wireless transceiver chip10is more difficult.

SUMMARY OF THE INVENTION

It is a primary object of the present invention to provide a wireless transceiver chip, which comprises a transmitter, a receiver, and a switch, and all of that are provided within a signal chip for advantageously reducing the pin count of the wireless transceiver chip.

It is a secondary object of the present invention to provide a wireless transceiver chip, which comprises a plurality of transmitters, receivers, and switches, wherein the corresponding transmitter and the receiver are connected to the different switches, such that the calibration process of the wireless transceiver chip can be proceeded.

It is another object of the present invention to provide a wireless transceiver chip, wherein the switch is provided within the chip, such that the switch can be controlled directly for data transmission between the wireless transceiver chip and the baseband chip.

It is still another object of the present invention to provide a calibration method for the wireless transceiver chip, wherein the transmitter and the corresponding receiver are connected to different switches, such that the pattern signal can be inputted and outputted via different switches, and the calibration process of the wireless transceiver chip can be achieved.

According to the above objects, a wireless transceiver chip, comprising: at least one receiver; at least one transmitter; at least one switch provided within the wireless transceiver chip, and connected to the receiver and the transmitter wherein the switch is used for switching between the receiver and the transmitter, thereby, the wireless transceiver chip and a baseband chip can communicate with each other, wherein the baseband chip is provided on the external of the wireless transceiver chip.

According to the above objects, a calibration method for the wireless transceiver chip, comprising the steps of: transmitting a first pattern signal to the first transmitter to further generate a calibration result of the first transmitter; transmitting a second pattern signal to the first receiver through the first transmitter to further generate a calibration result of the first receiver; transmitting a third pattern signal to the second transmitter to further generate a calibration result of the second transmitter; and transmitting a fourth pattern signal to the second receiver through the second transmitter to generate a calibration result of the second receiver.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Referring toFIG. 2, a block diagram showing a wireless transceiver chip according to the preferred embodiment of the present invention is disclosed. The wireless transceiver chip10comprises a receiver21, a transmitter23, and a switch23, wherein the switch25is provided within the wireless transceiver chip20, and respectively connected to the receiver21, the transmitter23. The baseband chip29, which is provided on the external of the wireless transceiver chip20, such as the receiver21is connected to the switch25through at least one receiving path221, as well as, the transmitter23is connected to the switch25through at least one transmitting path223, and further, the switch25can be used for switching between the receiver21and the transmitter23, thereby, the wireless transceiver chip10and the baseband chip29can transmit data between each other accordingly.

The wireless transceiver chip20is connected to a baseband chip29through the pin27of the wireless transceiver chip20for data transmission. According to the switch25, the receiver21can be connected to the baseband chip29through the receiving path221, the switch25, and the pin27for transmitting data to the baseband chip29from the receiver21, otherwise, the transmitter23can be connected to the baseband chip29through the transmitting path223, the switch25, and the pin27for transmitting data to the transmitter23from the baseband chip29.

The wireless transceiver chip20is further connected to at least one antenna24for receiving and transmitting wireless signal. For example, the wireless signal (analog signal) received by the antenna24can be amplified and down converted, thereafter, it will be sent to the baseband chip29. Besides, the analog signal that is sent from the baseband chip29will be up converted, subsequently, it will be sent to the antenna24for transmitting wireless signal. That is, the wireless transceiver chip20is used for proceeding the analog signal, and the baseband chip29is used for proceeding the digital signal and converting the signal between the digital signal and the analog signal. Mainly, the switch25is provided within the wireless transceiver chip20, thereby, the pin27count of the wireless transceiver chip20can be reduced, as well as, the chip size of which can be reduced accordingly.

Referring toFIG. 3, a block diagram showing a wireless transceiver chip according to another preferred embodiment of the present invention is disclosed. The wireless transceiver chip30comprises a receiver31, a transmitter33, and a switch35, wherein the switch35comprises two sub-switches, such as the first sub-switch351and the second sub-switch353. The switch35is connected to the receiver31and the transmitter33through the receiving paths321and the transmitting paths323.

According to the embodiment of the present invention, there are two receiving paths321and the transmitting paths323, for example, the receiving paths321and the transmitting paths323are connected to the first sub-switch351and the second sub-switch353respectively, and the switch35can be used for switching between the receiving paths321and the transmitting paths323, thereby, the receiver31or the transmitter33can be connected to the baseband chip39for data transmission between the wireless transceiver chip30and the baseband chip39.

Referring toFIG. 4, a block diagram showing a wireless transceiver chip according to another preferred embodiment of the present invention is disclosed. The wireless transceiver chip40comprises a receiver41, a transmitter43, and a switch45, wherein the switch45comprises four sub-switches which are connected to the receiver41and the transmitter43through the receiving paths421and the transmitting paths423respectively.

According to the embodiment of the present invention, there are four receiving paths421and the transmitting paths423, for example, the receiving paths421comprises RXI+/RXI−/RXQ+/RXQ−, as well as, the transmitting path423comprises TXI+/TXI−/TXQ+/TXQ−. The RXI+/RXI−/RXQ+/RXQ− of the receiving path421and the TXI+/TXI−/TXQ+/TXQ− of the transmitting path423are connected to the four sub-switches provided within the switch45respectively, thereby, the switch45can be used for switching between the receiver41and the transmitter43.

Referring toFIG. 5, a block diagram showing a wireless transceiver chip according to another preferred embodiment of the present invention is disclosed. In the embodiment the amounts of the receivers51, the transmitters53, and the switches55are two; nevertheless, the amounts of which can be more than two as well and more particularly which is a plurality.

The wireless transceiver chip50comprises a plurality of receivers51. transmitters53, and switches55. The amounts of the receivers51, the transmitters53, and the switches55are the same, wherein the receivers51and the corresponding transmitters53can be connected to different switches55respectively. For example, the receiver51comprises a first receiver511and a second receiver513, the transmitter53comprises a first transmitter531and a second transmitter533, and the switch55comprises a first switch551and a second switch553. The first transmitter531will be connected to the second switch553, while the first receiver511is connected to the first switch551; the second transmitter533will be connected to the first switch551, while the second receiver513is connected to the second switch553. That is, the first receiver511and the first transmitter531are connected to different switches, as well as, the second receiver513and the second transmitter533are connected to different switches, thereby, the calibration of the wireless transceiver chip50can be achieve. For example, the transmitting process, receiving process, and calibrating process can be proceeded according to the first switch551and the second switch553.

The wireless transceiver chip50comprises a first pin571and a second pin573, wherein the amounts of the first pins571and the second pins573are the same with the amount of the sub-switches provided within the switch55. For example, since the switch55comprises four sub-switches, the amounts of the first pins571and the second pins573are four as well.

Referring toFIG. 6AandFIG. 6B, block diagrams showing the paths of the signal transmitting and receiving for the wireless transceiver chip according to the preferred embodiment of the present invention are disclosed. The wireless transceiver chip50comprises two receivers51, two transmitters53, and two switches55according to this embodiment, nevertheless, the amounts of the receivers51, transmitters53, and switches55can be more than two, and more particularly which is a plurality, wherein the receiver51and the corresponding transmitter53arc connected to different switches55respectively.

The receiver51comprises a first receiver511and a second receiver513, the transmitter53comprises a first transmitter531and a second transmitter533, as well as, the switch55comprises a first switch551and a second switch553. The first transmitter531will be connected to the second switch553, while the first receiver511is connected to the first switch551; the second transmitter533will be connected to the first switch551, while the second receiver513is connected to the second switch553. That is, the first receiver511and the first transmitter531are connected to different switches, as well as, the second receiver513and the second transmitter533are connected to different switches.

While the wireless transceiver chip50are receiving the data, the signal will be sent to the first switch551from the first receiver511, and outputted from the first pin571, such as the first receiving path R1shown onFIG. 6A, otherwise, the signal will be sent to the second switch553from the second receiver513, and outputted from the second pin573, such as the second receiving path R2shown onFIG. 6A.

While the wireless transceiver chip50are transmitting the data, the signal will be inputted from the first pin571, and sent to the second transmitter533through the first switch551, such as the first transmitting path T1shown onFIG. 6B, otherwise, the signal will be inputted from the second pin573, and sent to the first transmitter531through the second switch553, such as the second transmitting path T2shown onFIG. 6B.

The switch, such as the first switch551and/or the second switch553, is used for switching the path, such as the foregoing mentioned the first receiving path R1, the second receiving path R2, the first transmitting path T1, and the second transmitting pith T2. Alternatively, the connection of the receiver51, the transmitter53and the switch55can be altered, such that the transmitting path and the receiving path will be altered accordingly. For example, the first receiver511is connected to the second switch553, the second receiver513is connected to the first switch551, the first transmitter531is connected to the first switch551, and the second transmitter533is connected to the second switch553. . . and so on.

Referring toFIG. 7A,FIG. 7B.FIG. 8A, andFIG. 8B, block diagrams showing the calibration paths for the wireless transceiver chip according to the preferred embodiment of the present invention are disclosed. According to the present embodiment, the wireless transceiver chip50comprises two receivers51and two transmitters53, and the calibration can be proceeded for the first transmitter531, the first receiver511, the second transmitter533, and the second receiver513, alternatively, the wireless transceiver chip50can comprise a plurality of receivers51and transmitters53as well, and the calibration can be proceeded for the transmitters53and receivers51accordingly.

The wireless transceiver chip50comprises a first transmitter531, a first receiver511, a second transmitter533, and a second receiver513. First, a first pattern signal (pattern1) is sent to the first transmitter531to further generate a calibration result of the first transmitter531. For example, the first pattern signal is inputted from the second pin573, and sent to the first transmitter531through the second switch553for proceeding the calibration of the first transmitter531. The calibration result of the first transmitter531will be outputted from the first pin571through the first receiver511and the first switch551in turn to achieve the calibration of the first transmitter531accordingly, as shown onFIG. 7A.

Thereafter, a second pattern signal (pattern2) is sent to the first receiver511through the first transmitter531to further generate a calibration result of the first receiver511. For example, the second pattern signal is inputted from the second pin573, and sent to the first transmitter531and the first receiver511through the second switch553for proceeding the calibration of the first receiver511. The calibration result of the first receiver511will be outputted from the first pin571through the first switching551, as shown onFIG. 7B.

Furthermore, a third pattern signal (pattern3) is sent to the second transmitter533to further generate a calibration result of the second transmitter533. For example, the third pattern signal is inputted from the first pin571, and sent to the second transmitter533through the first switch551for proceeding the calibration of the second transmitter533. The calibration result of the second transmitter533will be outputted from the second pin573through the second receiver513and the second switch553in turn, as shown onFIG. 8A.

Moreover, a fourth pattern signal (pattern4) will be sent to the second receiver513through the second transmitter533to further generate a calibration result of the second receiver513. For example, the fourth pattern signal is inputted from the first pin571, and sent to the second transmitter533and the second receiver513through the first switch551for proceeding the calibration of the second receiver513. The calibration result of the second receiver513will be outputted from the second pin573through the second switching553, a shown onFIG. 8B.

The foregoing mentioned calibration can be proceeded by switching the switch, that is, according to the switching of the first switch551and the second switch553, the transmitting paths can be structured for the first pattern signal, the second pattern signal, the third pattern signal, and the fourth pattern signal. Accordingly, referring to the calibration process shown onFIG. 7A,FIG. 7B,FIG. 8A, andFIG. 8B, the calibration process for the wireless transceiver chip50is disclosed. Alternatively, the calibration order for the transmitter53and the receiver51can be altered. For example, the calibration of the second transmitter533and the second receiver513can be proceeded first, and further, the calibration of the first transmitter531and the first receiver511can be proceeded thereafter.

Referring toFIG. 9, a block diagram showing a wireless transceiver chip according to another preferred embodiment of the present invention is disclosed. The wireless transceiver chip60comprises more than two receivers61and transmitters63. Similarly, the calibration of the receivers61and the transmitters63can be proceeded according to the foregoing mentioned steps of calibration process shown onFIG. 7A,FIG. 7B,FIG. 8A, andFIG. 8B.

According to this embodiment, the wireless transceiver chip60comprises a plurality of receivers61, transmitters63, and switches65. For example, the wireless transceiver chip60including a plurality of receivers61, transmitters63, and switches65, wherein the receivers comprise a first receiver611, a second receiver613. . . , a (n−1)th receiver617, and a nth receiver619, the transmitters comprise a first transmitter631, a second transmitter633, . . . , a (n−1)th transmitter637, and a nth transmitter639, and the switches comprise a first switch651, a second switch653, . . . , a (n−1)th switch657, and nth switch659, and the number of n is a integer and larger than 4.

With respect to the wireless transceiver chip60that comprises more than two receivers61and transmitters63, the calibration process can be proceeded for a plurality of receivers61and transmitters63simultaneously. For example, the calibration process for the first transmitter631and the (n−1)th transmitter637, first receiver611and the (n−1)th receiver617, the second transmitter633and the nth transmitter639, as well as, the second receiver613and the nth receiver619, can be proceeded simultaneously. Alternatively, the connection of the receiver61, the transmitter63, and the switch65can be altered as well.