INTEGRATED CIRCUIT SUBSTRATE DESIGN WITH INTEGRATED POWER CONVERTER MODULE AND METHOD OF MANUFACTURING THEREOF

An integrated circuit package including a die substrate having a first and second die surfaces, a die high voltage input power connection in the die substrate to receive a high voltage input power and transmit the high voltage input power to a high voltage power trace on the first die surface, a power converter module on the first die surface and electrically connected to the high voltage power trace to convert the high voltage input power to a low voltage output power, a low voltage power trace located on the first die surface and electrically connected to the power converter module to carry the low voltage output power to a circuit die on the first die surface. A method of manufacturing the integrated circuit package and a computer having one or more circuits that include the package is also disclosed.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims priority to CN Patent Application No. 202210320197.1, entitled “AN INTEGRATED CIRCUIT SUBSTRATE DESIGN WITH INTEGRATED POWER CONVERTER MODULE AND METHOD OF MANUFACTURING THEREOF”, filed Mar. 29, 2022. The above-listed application is commonly assigned with the present application is incorporated herein by reference as if reproduced herein in its entirety.

TECHNICAL FIELD

This application is directed, in general, to integrated circuit packages and methods of manufacturing thereof, and in particular, an integrated circuit package that includes a die-integrated power regulator module.

BACKGROUND

Graphics processors such as graphical processing unit (GPU) dies or chips are increasingly important for high performance computing (HPC) and artificial intelligence applications. By working together, the cores of a GPU can improve computing performance especially when a processing task can be divided up and processed across many cores. To keep increasing computing performance, there is a movement towards using increasingly larger dies with more transistors per core and a higher operation clock speed.

More transistors, cores and higher working clock speeds, however, all require higher levels of power consumption. Some believe that there may soon be reached a power limitation to integrate graphics processors into computing systems, such as HPC data-center system, to improve performance. Computing systems would benefit from improved power efficiency because this would facilitate better computing performance and higher computing density. Raising the power efficiency of a circuit die is important to furthering the goal of increasing computing performance.

SUMMARY

One aspect provides an integrated circuit package including a die substrate having a first die surface and a second die surface on an opposite side of the die substrate as the first die surface, a die high voltage input power connection in the die substrate and arranged to receive a high voltage input power and transmit the high voltage input power to a high voltage power trace located on the first die surface, a power converter module located on the first die surface and electrically connected to the high voltage power trace, wherein the power converter module converts the high voltage input power to a low voltage output power and a low voltage power trace located on the first die surface and electrically connected to the power converter module to carry the low voltage output power to a circuit die located on the first die surface.

In some embodiments, the die high voltage input power connection can include microbumps located on the second die surface and through substrate vias electrically connected to the microbumps.

In some embodiments, the high voltage input power can be in a range of about 7 to about 22 Volts and the low voltage output power can be in a range of about 0.3 to about 1.5 Volts.

In some embodiments, the low voltage power trace can have a path length from the power converter module to the circuit die that is equal to about 10 mm or shorter.

In some embodiments, the die high voltage input power connection can within a distance of about 5 to 10 mm of a perimeter of the die substrate.

In some embodiments, the microbumps of the die high voltage input power connection can be arranged as a two-by-one dimensional array adjacent to a perimeter of the die substrate.

In some embodiments, the power converter module can include a capacitor submodule, inductor submodule, and transistor submodule arranged as a vertical stack.

In some embodiments, the power converter module can be located on the first die surface between the high voltage power trace and the low voltage power trace.

In some embodiments, wherein the power convertor module can be one of a plurality of power converter modules and the power convertor modules can on the first die surface and each connected to one of a plurality of the die high voltage input power connections located adjacent to a perimeter of the die substrate.

Any such embodiments, can further include a power controller module located on the first die surface and connected to adjust the power converter module to output the low voltage output power from the high voltage input power.

Any such embodiments, can further include a thermal cooling module located on the first die surface, wherein the thermal cooling module contacts the circuit die and the power converter module.

In any such embodiments, the circuit die can be a graphics processing unit circuit die.

Any such embodiments can further include a package substrate, where the die high voltage input power connection can be connected to a high voltage power trace on a first package surface of the package substrate to carry the high voltage input power from a package input power connector to the die high voltage input power connection. In some such embodiments, the DC resistance loss across the low voltage power trace of the package substrate is less than about 0.1 Ohm. In some such embodiments, a path length of the high voltage power trace on the package substrate can equal a value in a range from about 30 to 50 mm.

Another aspect is a method of a method of manufacturing an integrated circuit package. The method include providing a die substrate having a first die surface and a second die surface on an opposite side of the die substrate as the first die surface and forming a die high voltage input power connection in the die substrate. Forming the die high voltage input power connection can include forming a high-power through-substrate via through the die substrate, forming a high voltage power trace on the first die surface, and forming a microbump on the second die surface, the microbump electrically connected to the through substrate via. The method can include forming a low-voltage power trace on the first surface of the die substrate and mounting a power converter module to the first die surface. The power converter module can be mounted such that the power convertor module is electrically connected to the high voltage power trace on the first die surface, the power convertor module is electrically connected to the low voltage power trace on the first die surface, and the power converter module converts a high voltage input power to a low voltage output power carried to the low voltage power trace. The method can include mounting a circuit die to the first die surface, where the circuit die is connected to the low voltage power trace on the first die surface.

Some such embodiments can include mounting a power controller module to the first die surface and connected to adjust the power converter module to output the low voltage output power from the high voltage input power.

Some such embodiments can include mounting a thermal cooling module on the first die surface, where the thermal cooling module contacts the circuit die and the power converter module.

Some such embodiments can include mounting the die substrate to a package substrate, where the die high voltage input power connection is electrically connected to a high voltage power trace on a first package surface of the package substrate.

Any such embodiments can further include providing a package substrate having a first package surface and a second package surface, forming a high voltage power trace on the first package surface of the package substrate and connecting a package input power connector to the high voltage power trace.

Another aspect is an integrated circuit package that includes the die substrate, the die high voltage input power connection, the power converter module, the low voltage power trace and further includes the thermal cooling module located on the first surface of the die substrate, where the thermal cooling module contacts the graphics processing unit circuit die and the power converter module, and includes a printed circuit board, where the die high voltage input power connection is connected by a high voltage through-substrate via to a high voltage power on a first printed circuit board surface to carry the high voltage input power to the die high voltage input power connection.

Another aspect is a computer having one or more circuits that include any embodiments of the integrated circuit package disclosed herein.

DETAILED DESCRIPTION

Embodiments of the disclosure follow from our recognition of several drawbacks of existing integrated circuit packages. A higher power input current requires a larger area power plane and ground return, and more package substrate layers (e.g., printed circuit board PCB layers) for a better power distribution network (PDN) design, thereby increasing complexity and manufacturing cost of the package substrate. Power density regulators components (referred to herein as power converter modules) are often placed distant from the integrated circuit package (e.g., a GPU core, or, GPU as referred to herein) on the substrate package thereby requiring the use of a larger substrate package increased package substrate cost. Simulations done as part of the present disclosure suggest that power distribution efficiency can be lowered by about 10% due to power delivery resistance on the package substrate (e.g. due to resistance along both the substrate's input power path and GPU's core power path), which can translate into an about 10% lower GPU core performance. Thermal cooling solutions for the power converter modules located on the package substrate and the circuit die are difficult to implement. E.g., the use of thermal interface materials (TIM) is often inefficient. It can be difficult to distribute decoupling capacitors, e.g., located under the GPU, with power converter modules located on the package substrate. Larger GPU power current inputs require additional power converter modules and a larger number of solder balls for core power input (e.g., over 1000 balls) resulting in more complex solder ball and tracing designs.

To help mitigate these drawbacks, our innovation is to integrate the power regulation module onto the circuit die package with input power. This follows from our recognition that most power loss in conventional designs is caused by high current paths from the package substrate. By reducing the length of these paths from the package substrate to the circuit die, by placing high input voltage paths on the circuit die itself, power loss can be reduced. This is in contrast to previous solutions that tried to improve GPU performance per Watt of input power by improving the components parts of the power converter, e.g., by providing better metal—oxide—semiconductor field-effect transistor, MOSFET, inductor components. Such previous solutions may have had limited success because this does not address the direct current, DC, resistance of core power path from power converter's output to GPU package input and from the package substrate to the die, and the ensuing power efficiency loss.

Our new integrated circuit package design uses the substrate package's high voltage (e.g., about 12 V)/low current input power instead of low voltage (e.g., about 1 V)/high current as circuit die input. The new package design includes putting substantially more die power input routing, control signals the power converter modules and decoupling capacitors on the circuit package. Consequently, the need for multiple circuit die power input and output paths on the package substrate is substantially reduced, thereby reducing the complexity of solder ball and tracing designs. E.g., the number of solder ball arrays fir high voltage power input and out can be reduced by about an order of magnitude for some designs. E.g., the total number of solder balls, including electrical grounding balls, can similarly be reduced by about and order of magnitude for some designs. This reduction, in turn, facilitates arranging the remaining high voltage power balls layouts to reduce or avoid electrical interference by isolating the high voltage paths from signal paths, e.g. by placing high voltage power paths close to the outer perimeter of the die substrate.

One aspect of the disclosure is an integrated circuit package.FIGS.1-5illustrate cross-sectional and plan views the integrated circuit package100, in accordance with the invention. With continuing reference toFIGS.1-5, any of the package100embodiments can include a die substrate105having a first die surface107a second die surface109opposite the first die surface (e.g., a second die surface109on an opposite side of the die substrate105as the first die surface107; in some embodiments, top and bottom die surfaces, respectively). The package100includes a die high voltage input power connection110in the die substrate105and the connection110arranged to receive a high voltage input power112and transmit the high voltage input power112to a high voltage power trace115located on the first die surface107. The package includes a power converter module120located on the first die surface107and electrically connected to the high voltage power trace115. The power converter module converts the high voltage input power112to a low voltage output power122. The package100includes a low voltage power trace124located on the first die surface and electrically connected to the power converter module to carry the low voltage output power122to a circuit die130located on the first die surface107.

The term circuit die (e.g., circuit die130), as used herein, refers to any of a central processing unit (CPU), a graphics processing unit (GPU), or other processing cores, as familiar to those skilled in the pertinent arts, or, combinations thereof. E.g., in some embodiments the circuit die130is a graphics processing unit circuit die.

In some package embodiments, the die high voltage input power connection110includes microbumps132(e.g., about 100, 50, 20, 10 μm sized solder balls) located on the second die surface109and through substrate vias135electrically connected to the microbumps132, e.g., via flip chip and solder reflow processes familiar to those skilled in the pertinent arts

In some package embodiments, the high voltage input power112can be in a range of about 7 to about 22 Volts and the low voltage output power122can be in a range of about 0.3 to about 1.5 Volts.

As used herein the term “about” signifies within ±10%, or ±1% for some embodiments, of the number recited, or other value described, as understood by person skilled in the pertinent art.

In some package embodiments, to help reduce leakage currents and power loss, the low voltage power trace124has a path length140from the power converter module120to the circuit die130that is equal to about 10 mm or shorter (e.g., about 10 mm, 5 mm, or 1 mm in some embodiments).

In some package embodiments, the microbumps132of the die high voltage input power connection110can be arranged as a two-by-one dimensional array150adjacent to a perimeter of the die substrate105, e.g., to facilitate keep high voltage input power connection110near a perimeter145of the die substrate105, and therefore help reduce interference.

In some package embodiments, to reduce current path power losses, the die high voltage input power connection110can be within a distance142of about 5 to 10 mm of a perimeter145of the die substrate105.

Such embodiments can result in the distance between the power converter module120and the high voltage input power connection110being increased as compared to previous designs (e.g., about 70 to 150 mm for some embodiments as compared to about 5 to 10 mm in previous designs) but this does not present a problem of increasing DC resistance because the high voltage current can be about 1/10 of the current from previous designs.

In any package embodiments, the power converter module, or modules, can include a capacitor submodule160, inductor submodule162, and transistor submodule165arranged as a vertical stack168, e.g., to help decrease the amount of area on the first die surface107occupied by the power converter module120.

In some package embodiments, to facilitate minimizing the path length140, or path lengths, from the power converter module, or modules, to the circuit die130, the power converter module120can be located on the first die surface107between the high voltage power trace115and the low voltage power trace124.

In some package embodiments, the power convertor module can be one of a plurality of power converter modules (e.g., modules120a,120b,120c,120d. . . ,FIG.2) and the power convertor modules can be on the first die surface107and each connected to one of a plurality of the die high voltage input power connections110located adjacent to a perimeter145of the die substrate105

Any such package embodiments can further include a power controller module (e.g.,FIG.4, power converter controller410) located on the first die surface107and connected to adjust the power converter module120to output the low voltage output power122from the high voltage input power112.

One skilled in the pertinent art would be familiar with how the integrated circuit chip of the power controller module410could be designed to set or switch different output voltages or responses for different levels of load transient power, e.g., via pulse-width modulation (PWM) techniques using a power MOSFET device. E.g., the average value of voltage (and current) fed to the load is can be controlled by the power controller module by turning the module (e.g., a transistor of the module) to switch between supply and load, on and off, at a fast rate. The longer the module (e.g., transistor switch) is on compared to the off periods, the higher the power supplied.

Any such package embodiments can further include a thermal cooling module170located on the first die surface107, the thermal cooling module contacting both the circuit die130and the power converter module120upper surfaces as illustrated inFIG.1. That is, the circuit die130and the power converter module120, or modules, can share a same thermal cooling module170. In some embodiments such as illustrated inFIGS.1and5, when the circuit die130and the power converter module120project different heights (e.g., heights510,515, respectively) from the first die surface107the mounting surface172of the thermal cooling module can be contoured to allow contact to both the circuit die130and the power converter module120.

Any such package embodiments can further include a package substrate (e.g.,FIGS.2and5, package substrate205, where the die high voltage input power connection110is connected to a high voltage power trace210on a first package surface215of the package substrate205to carry the high voltage input power112from a package input power connector220to the die high voltage input power connection110.

In some such embodiments, to reduce power losses, the DC resistance loss across the low voltage power trace124of the die substrate105can be less than about 0.1 Ohm. For instance, in some such embodiments, the DC resistance across the low voltage core power trace changes from 0.0383 Ohm to 0.0077 Ohm, with a DC resistance loss of about 0.031 Ohm. E.g., some of our simulation results suggest that, compared to previous designs where the package substrate (PCB) power plane power loss can be about 23 W (600A), some embodiments of our new design can have a power loss reduced to about 4.6 W, resulting in a 18 W or about 5 times power saving.

In some such embodiments, a path length225of the high voltage power trace210on the package substrate205equals a value in a range from about 30 to 50 mm or 40 mm in some embodiments. This follows from our movements of the high voltage power traces210from the package substrate205) to the die substrate105which in turn allows enough spacing for board input power with multi-layer and wide traces (e.g., 3 to 4 times wider as compared to traditional designs) for input power.

FIGS.2and5illustrate embodiments of the package100that further includes a package substrate205(e.g., a printed circuit board). The die high voltage input power connection110can be connected by a high voltage through-substrate via135to a high voltage power trace115on a first printed circuit board surface215to carry the high voltage input power112to the package input power connector220located on the package substrate205.

As illustrated inFIGS.2and5, some such embodiments can further include one or more memory modules240located on the first package surface215of the substrate205. As a non-limiting example, the memory modules240can be or include double data rate dynamic random-access memory (DDR SDRAM), such as synchronous dynamic random-access memory (SDRAM) designed for GPU circuit dies130.

As illustrated inFIGS.1and5, some embodiments of the package100can further include one or more decoupling capacitors180on the die substrate105, e.g., to improve electrical performance of integrated circuit package100. In some embodiments the decoupling capacitors180can be located only on the second die surface109, to make space available on the first die surface107for the high voltage input power connection110, the high voltage power traces115, the power converter modules120and low voltage power traces124. In other embodiments however one of more decoupling capacitors180can be located on the on the first die surface107or on both surfaces107,109.

As noted embodiments of our package design can substantially reduce the complexity of solder ball and tracing designs because of the reduced need for routing core power through microbumps132on the second die surface109. For example, as illustrated inFIG.3, for some simulations of a GPU die130with 400 W total graphic power (TGP) requirement, due to our new package design there is a need for only 68 microbumps132for high voltage input power to the package100and a total of 120 microbump including electrical ground microbumps. In contrast, a traditional GPU package with the same TGP requirement required 608 microbumps for GPU core power and total about 1088 including electrical ground microbumps. The need for less microbumps facilitates signal fan-out, to reduce interference, and also provides space for decoupling capacitors (e.g., decoupling capacitors180) at bottom of the die substrate (e.g., second die surface109) instead of on the package substrate205. Embodiments of the new design can substantially eliminate the need for need VID and voltage sense pins for voltage control, since the control signals will be connected from GPU die to power converter modules120located directly on die substrate105.

Another aspect of the disclosure is a computer having one or more circuits (e.g.,FIG.2, computer250, printed circuit board205) that include the integrated circuit package100. E.g., any embodiments of the integrated circuit cooling package100disclosed herein can be part of a computer having one or more circuits that include the package100thereon.

Another aspect of the disclosure is a method of manufacturing an integrated circuit package.FIG.6illustrates by flow diagram selected steps in a method600of manufacturing the integrated circuit package100of the discloser including the manufacture of any of the embodiments of the package100discussed in the context ofFIGS.1-5.

With continuing reference toFIGS.1-5throughout, as illustrated inFIG.6, embodiments of the method600includes providing (step605) a die substrate105having a first die surface107and a second die surface109on an opposite side of the die substrate as the first die surface, and, forming (step610) a die high voltage input power connection110in the die substrate105. Forming the die high voltage input power connection110(step610) can include: forming (step612) a high-power through-substrate via135, or plurality of such vias, through the die substrate105, forming (step615) a high voltage power trace115on the first die surface107, and forming (step617) a microbump132, or plurality of microbumps, on the second die surface109, the microbump or electrically connected to the through substrate via135or vias. The method600includes forming (step630) a low-voltage power trace124on the first surface107of the die substrate105and mounting a power converter module (step635) to the first die surface107. The power convertor module is mounted (step635) such that the power convertor module is electrically connected to the high voltage power trace115on the first die surface107, the power convertor module is electrically connected to the low voltage power trace124on the first die surface107, and the power converter module converts a high voltage input power112to a low voltage output power122carried to the low voltage power trace115.

The method600can include mounting (step640) a circuit die130to the first die surface107, where the circuit die is connected to the low voltage power trace on the first die surface107.

Some embodiments of the method600can further include mounting (step645) a power controller module410to the first die surface107and being connected to adjust the power converter module120to output the low voltage output power122from the high voltage input power112.

One skilled in the pertinent art would be familiar with how to form metal traces on die substrate surfaces, and mount circuit dies, power converter modules, power controller module or other circuit components to die surfaces, e.g., using solder paste printing, gluing, dipping flux or solder paste and reflow soldering techniques.

Some embodiments of the method can further include mounting (step655) a thermal cooling module170on the first die surface107, wherein the thermal cooling module contacts the circuit die130and the power converter module12.

Some embodiments of the method can further include mounting (step660) the die substrate105to a package substrate205, wherein the die high voltage input power connection is electrically connected to a high voltage power trace210on a first package surface215of the package substrate.

In any such embodiments, the method600can further include providing (step662) a package substrate205having a first package surface215and a second package surface217, forming (step665) a high voltage power trace210on the first package surface215of the package substrate205and connecting (step670) a package input power connector220to the high voltage power trace210.

One skilled in the pertinent art would be familiar with how to form metal traces on package surfaces, and mounting the integrated circuit package, memory modules, decoupling capacitors other package components to package surface, e.g., using solder paste printing, flip-chip, gluing, dipping flux or solder paste and reflow soldering techniques.