Fuse structure for a semiconductor device

A fuse structure for a semiconductor device is provided. The fuse structure includes a fuse layer between the upper and bottom insulating layers. The fuse layer is connected to the other metal layers through via plugs. The fuse layer includes separate blocks and at least a connecting block and is coupled to at least a heat buffer block of a different layer. Because the heat buffer block is coupled to the blocks of the fuse layer, new fusing point and a new path for effectively dissipating the heat are provided and a longer and sinuous electric current path is obtained between the blocks through the heat buffer blocks. The heat buffer block and the blocks coupled to the heat buffer block can avoid large current flowing through the fuse structure and prevent overheating.

BACKGROUND OF THE INVENTION

1. Field of the Invention

This invention generally relates to a fuse structure for a semiconductor device, and more particularly to a fuse structure having at least a heat buffer block for a semiconductor device.

2. Description of Related Art

As the size of a semiconductor device becomes smaller, the semiconductor device is more seriously affected due to impurity or defect in itself. A defect of a single diode or transistor may cause the whole chip to fail. To solve this problem, some redundant circuits connected to fuses generally will be added into the circuit. When a defect is found in a circuit, the fuses can be used to disable the defected circuit and enable the redundant circuit. For memory devices, the defected cell can be replaced by a non-defected cell to its address. Another reason to use fuses in the integrated circuits is to permanently write the controlling bytes such as ID codes into the chip.

Generally, the fuses are made of polysilicon or metal. Laser fuses and electronic fuses are two major types of fuses based on how the fuses are blown to be open. The laser fuses will be blown by the laser beam; and the electronic fuses will be blown by currents. The electronic fuses are generally applied to EEPROM devices, while the laser fuses are generally applied to DRAM devices.

Generally, an integrated circuit has a passivation layer including silicon nitride, silicon oxide or both at the top thereof. For the layout of the laser fuse, to prevent the passivation layer from damage, an opening at the top layer is required and the laser beam has to precisely focus on the fuse in order not to damage the adjacent devices. However, it is common that the passivation layers neighboring to the fuses are damaged due to the strong power of the laser beam.

For the layout of the electronic polysilicon fuse, it requires a high voltage to generate a current big enough to heat the fuse to rupture the fuse. When the size is getting smaller, the voltage that the integrated circuit can provide is decreased. Hence, a silicide layer is disposed on the (polysilicon) fuse so that an appropriate voltage can blow the fuse. Since the heat generated by the current can enhance the electron migration, the silicide layer and the polysilicon fuse will agglomerate together to make the silicide layer rupture and the grains of the polysilicon re-grow.

To make the fuse open means either the fuse is ruptured, the silicide layer on the polysilicon fuse is fused, or the post-burn resistance of the polysilicon fuse is so high to deem open.

As the conditions of the manufacturing process and the applied voltage frequently change, even after applying the voltage to blow the fuse, the remaining fuse may be found or the post-burn resistance is not stable, which affects the reliability and the performance of the devices. Further, the heat generated by the current my also deteriorates the adjacent devices and affects their reliability.

SUMMARY OF THE INVENTION

An object of the present invention is to provide a fuse structure that can be blown by a low voltage, and the heat generated by the current will not damage the adjacent devices.

Another object of the present invention is to provide a fuse structure having heat buffer blocks to enhance the reliability of the fuse structure.

Still another object of the present invention is to provide a fuse structure that can be blown by a low voltage/current, wherein the heat buffer blocks can effectively dissipate the heat generated by the current so that the neighboring devices will not be degraded by heat, thus improving the stability of the devices.

The present invention provides a fuse for a semiconductor device or a integrated circuit, comprising: a first insulating layer; a fuse layer on the first insulating layer, a second insulating layer on the fuse layer and a top layer on the second insulating layer. The fuse layer includes a plurality of blocks and the second insulating layer includes a plurality of via plugs. The top layer includes at least a heat buffer block on the second insulating layer. Since the via plugs connect the heat buffer block and the blocks of the fuse layer, the blocks of the fuse layer are coupled to the heat buffer block.

The present invention provides a fuse for a semiconductor device or a integrated circuit. According to one embodiment of this invention, the fuse structure includes at least a heat buffer block, thus providing a better thermal conducting path for effectively dissipating the heat around the fusing points, or even transfer the heat to another layer. Since the fuse layer of another embodiment in this invention comprises a plurality of blocks, a longer and sinuous electric current path with more fusing points is obtained between the blocks of the fuse layer through the heat buffer blocks. Thus, the sensitivity and reliability of the fuse structure are increased.

The above is a brief description of some deficiencies in the prior art and advantages of the present invention. Other features, advantages and embodiments of the invention will be apparent to those skilled in the art from the following description, accompanying drawings and appended claims.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

FIG. 1is a cross-sectional view of a fuse structure along the I–I′ line ofFIG. 2. The fuse structure10is formed in a semiconductor device or an IC. The fuse structure10is formed on a substrate100. The substrate100may further includes another semiconductor device elements (not shown) formed thereon. A bottom insulating layer110is formed on the substrate100. The bottom insulating layer110includes an oxide layer such as a silicon oxide layer or spin-on glass layer. A fuse layer120is formed on the bottom insulating layer120. The fuse layer120can be a composite layer including a polysilicon layer and a silicide layer, for example. The material of the silicide layer includes titanium silicide, cobalt silicide, nickel silicide, and platinum silicide. The fuse layer120also can be a metal layer or a metal alloy layer. The material of the metal layer includes titanium, tungsten, aluminum, and copper. The thickness of the fuse layer120is adjustable. The resistivity of the fuse layer can be adjusted by changing the material, length, width and thickness of the fuse layer. Generally, the resistivity of the fuse layer is higher than the other metal line and the interconnects for an ideal fuse structure.

An upper insulating layer130is formed to cover the fuse layer120. The upper insulating layer130includes an oxide layer such as a silicon oxide layer or SOG. Then a patterned photoresist layer (not shown) is formed as a mask to define the via hole135. The number and size of the via holes vary depending on the needs. A plurality of via holes135is inside the upper insulating layer130to connect the subsequent formed top metal pad layers150and160, and the fuse layer120. After removing the upper insulating layer that is not covered by the patterned photoresist layer, a plurality of via plugs140is formed inside the via holes135. The via plugs can be formed by sputtering a metal layer (not shown) into the via holes to fill the via holes and etching back the undesired metal until the metal layer levels with the upper insulating layer. Then the first and second top metal pad layers150and160are formed on the upper insulating layer130and the via plugs140.

When a current is applied to the first top metal pad layer150, the current flows into the fuse layer120through the via plugs140, and then enters the second top metal pad layer160through the via plugs140. The application of the current can also be in the reverse direction based on the design of the device.FIG. 2is a top view of a fuse structure in accordance with one preferred embodiment of the present invention. In a preferred embodiment, the fuse layer120has two wider areas122aand122band a narrower area124between the two wider areas122aand122b. When the current (flowing in the direction of the leader arrow) flows from the area122athrough the area124to the area122b, because the area124is smaller, the current density flowing through the area124is higher. Likewise, when the current flows from the area122bthrough the area124to the area122a, because the area124is smaller, the current density flowing through the area124is higher.

Hence, compared with the wider areas122aand122b, the area124is deemed to be a high-resistance narrow channel with higher current density flowing through, which results in higher temperature and stronger electron migration in this local area124. Therefore, the area124is considered a fusing point because it is narrower and is thus easy to be blown out. Based on this design, only a smaller current or voltage is required to blow out the narrower portion of the fuse.

However, this design may still cause damage to the adjacent devices due to the heat generated by the current, especially in the narrower portion.

Therefore, the present invention provides a fuse structure having at least a heat buffer block to prevent the device from being damaged by the heat generated by the current. However, the total resistance of the fuse structure is not increased.

In one preferred embodiment, the fuse structure is formed in a semiconductor device or in an IC. The fuse structure has a fuse layer with a heat buffer block.FIG. 3is a top view of a fuse structure in accordance with one preferred embodiment of the present invention. The fuse layer300includes a first block310, a second block320, a third block330, a fourth block340, and a connecting block315connecting the first block310and the fourth block340. The second and third blocks320and330are between the first and fourth blocks310and340. The connecting block315is between the second and third blocks320and330, but the connecting block315does not connect the second and third blocks320and330. The second and third blocks320and330are not connected to each other. The first, second, third, and fourth blocks are not connected to one another except for the connection between the first and fourth blocks by the connecting block315. The second and third blocks320,330are coupled to the heat buffer block350through the via plugs (not shown). The heat buffer block350is in a level different from the fuse layer300, so that the heat buffer block350can only be coupled to the second and third blocks320,330through via plugs. The heat buffer block350is not coupled to the first and fourth blocks.

The cross-sectional view of the fuse structure along the I–I′ line ofFIG. 3is similar to that ofFIG. 1.FIG. 4is a cross-sectional view of a fuse structure ofFIG. 3along the II–II′ line. The fuse structure40is formed over a substrate400. The fuse structure40includes a bottom insulating layer410formed on the substrate400, a fuse layer300on the bottom insulating layer410, and an upper insulating layer430covering the fuse layer300. The size and the pattern of the fuse layer300can be adjusted by photolithography technology as needed. The fuse layer300can be a composite layer including a polysilicon layer and a silicide layer, for example. The material of the silicide layer includes titanium silicide, cobalt silicide, nickel silicide, and platinum silicide. The fuse layer300also can be a metal layer or an alloy layer. The material of the metal layer includes titanium, tungsten, aluminum, and copper. The thickness of the fuse layer300is adjustable. The resistivity of the fuse layer can be adjusted by changing the material, length, width and thickness of the fuse layer. Generally, the resistivity of the fuse layer is higher than the other metal line and the interconnects for an ideal fuse structure. The upper insulating layer430includes via holes435that are defined by the photolithography technology. A plurality of via plugs440can be formed in the via holes435. The material of the via plugs440can be titanium, tungsten, aluminum, and copper. The number and size of the via plugs vary depending on the design needs. As shown inFIG. 4, a plurality of via plugs440is disposed in the upper insulating layer430to connect the heat buffer block350and the fuse layer300. The heat buffer block350is on the upper insulating layer430and on the via plugs440. The method for forming the heat buffer block350includes forming a top metal layer450on the upper insulating layer430and the via plugs440and patterning the top metal layer450to form the heat buffer block350and the other top metal pad layer (not shown) by photolithography technology. The material of the top metal layer450can be titanium, tungsten, aluminum, and copper. The thickness of the top metal layer450is adjustable. The pattern of the top metal layer450can be altered based on the requirements of the process. The heat buffer block350has a better heat (thermal) conductivity than the fuse layer300. Hence the heat buffer block350can help to dissipate the heat. The top metal pad layers (as shown inFIG. 1) can be used as a current input pad for the fuse structure or for connecting the fuse structure with other devices in the integrated circuit.

When the current (flowing in the direction of the leader arrow) flows from the first block310through the connecting block315to the fourth block340, because the area of the connecting block315is smaller than the areas of the first and fourth blocks310and340, the current density flowing through the connecting block315is higher. Hence, compared with the wider first and fourth blocks, the narrower connecting block315is deemed to be a high-resistance narrow channel with higher current density flowing through, which results in higher temperature and enhanced electron migration in the connecting block315. The connecting block315is considered a fusing point because it is narrower and is thus easy to be blown out (either ruptured or open by high post-burn resistance). Likewise, when the current flows from the fourth block340through the connecting block315, then to the first block310, because the area of the connecting block315is smaller compared to its abutting blocks310and340, the current density flowing through the connecting block315is higher and the connecting block315becomes the fusing point.

Compared toFIG. 2, since the fuse layer300of this embodiment has a heat buffer block not coupled to the current path but coupled to the second and third blocks that is not coupled to the first and fourth blocks. Hence, the connection of the heat buffer block and the second and third blocks provides a new path for conducting heat to effectively dissipate the heat. When the connecting block315is over-heated due to the higher current density flowing through the narrower area, the thermal conducting path provided by the heat buffer block350and the second and third blocks can effectively dissipate the heat around the connecting block315.

In another preferred embodiment, the fuse structure can also be formed in a semiconductor device or in an IC. However, the fuse structure has a fuse layer with at least a heat buffer block, and preferably with a plurality of heat buffer blocks.FIG. 5is a top view of a fuse structure in accordance with another preferred embodiment of the present invention. The fuse layer500includes a first block510, a second block520, a first inner block530, a second inner block540and a third inner block550. The first inner block530, the second inner block540and the third inner block550are disposed between the first and second blocks510,520, while the first inner block530is close to the first block510, the second inner block540is close to the second block520and the third inner block550is between the first and second inner blocks530,540. All blocks are not connected to one another.

Each inner block530,540or550is composed of three blocks. Each inner block is, for example, shaped as a dumb-bell shape, i.e. the rectangle or ellipse with a neck or a waist. That is, the first inner block530is composed of a first terminal block530a, a second terminal block530cand a first connecting block530bconnecting the first and the second terminal blocks530a,530c, while the first and the second terminal blocks530a,530care wider than the first connecting block530b. The second inner block540is composed of a third terminal block540a, a fourth terminal block540cand a second connecting block540bconnecting the third and the fourth terminal blocks540a,540c, while the third and the fourth terminal blocks540a,540care wider than the second connecting block540b. The third inner block550is composed of a fifth terminal block550a, a sixth terminal block550cand a third connecting block550bconnecting the fifth and the sixth terminal blocks550a,550c, while the fifth and the sixth terminal blocks550a,550care wider than the third connecting block550b. The shape of the terminal block is not limited to rectangular, but can be polygonal, round, or triangular. Not only the width or length of each connecting block can be adjusted, but also the connecting location of the terminal block and the connecting block can be adjusted, according to the layout design.

Although the first and second blocks510and the first inner block530, the second inner block540and the third inner block550disposed between the first and second blocks510are not connected to one another, a plurality of heat buffer blocks of a different layer is coupled to these blocks of the fuse layer through via plugs (not shown), thus electrically connecting these blocks of the fuse layer. Referring toFIG. 5, a first heat buffer block515is coupled to the first block510and the first terminal block530aof the first inner block530; a second heat buffer block525is coupled to the second terminal block530cof the first inner block530and the sixth terminal block550cof the third inner block550; a third heat buffer block535is coupled to the fifth terminal block550aof the third inner block550and the third terminal block540aof the second inner block540; and a fourth heat buffer block545is coupled to the fourth terminal block540cof the second inner block540and the second block520. The heat buffer blocks515,525,535and545are in a level different from the fuse layer300, so that the heat buffer blocks are coupled to and electrically connect the blocks of the fuse layer through via plugs.

Alternatively,FIG. 5Ais a top view of a fuse structure in accordance with another preferred embodiment of the present invention. The fuse layer500′ includes a first block510′, a second block520′ and an inner block530′ disposed between the first and second blocks510′,520′. All these blocks are not connected to one another. The inner block530′ is composed of three blocks and is, for example, shaped as a dumb-bell shape, i.e. the rectangle or ellipse with a neck or a waist. The inner block530′ is composed of a first terminal block530′a, a second terminal block530′cand a connecting block530′bconnecting the first and the second terminal blocks530′a,530′c, while the first and the second terminal blocks530′a,530′care wider than the connecting block530′b. Similarly, the heat buffer blocks of a different layer are coupled to these blocks of the fuse layer through via plugs (not shown), thus electrically connecting these blocks of the fuse layer. Referring toFIG. 5A, a first heat buffer block515′ is coupled to the first block510′ and the first terminal block530′aof the inner block530′, while a second heat buffer block525′ is coupled to the second terminal block530′cof the first block530′ and the second block520′.

FIG. 6is a cross-sectional view of the fuse structure ofFIG. 5along the I–I′ line. The fuse structure60is formed over a substrate600. The fuse structure60includes a bottom insulating layer610formed on the substrate400, a fuse layer500on the bottom insulating layer610, and an upper insulating layer630covering the fuse layer500. The size and the pattern of the fuse layer500can be adjusted by photolithography technology as needed and according to the design of the preferred embodiments. The fuse layer500can be a composite layer including a polysilicon layer and a silicide layer, for example. The material of the silicide layer includes titanium silicide, cobalt silicide, nickel silicide, and platinum silicide. The fuse layer500also can be a metal layer or an alloy layer. The material of the metal layer includes titanium, tungsten, aluminum, and copper. The thickness of the fuse layer500is adjustable. The resistivity of the fuse layer can be adjusted by changing the material, length, width and thickness of the fuse layer. Generally, the resistivity of the fuse layer is higher than the other metal line and the interconnects for an ideal fuse structure. The upper insulating layer630includes via holes635that are defined by the photolithography technology. A plurality of via plugs640can be formed in the via holes635. The material of the via plugs640can be titanium, tungsten, aluminum, and copper. The number and size of the via plugs vary depending on the design requirements. As shown inFIG. 6, a plurality of via plugs640is disposed in the upper insulating layer630to connect the heat buffer blocks and the fuse layer500. The heat buffer blocks are on the upper insulating layer630and on the via plugs640. The method for forming the heat buffer blocks includes forming a top layer660on the upper insulating layer630and the via plugs640and patterning the top layer660to form the heat buffer blocks525,535(as shown) and the other top metal pad layer (not shown) by photolithography technology. The thickness of the top layer660is adjustable. The pattern of the top layer660can be altered based on the requirements of the process. The material of the top layer660can be a metal, such as, titanium, tungsten, aluminum, and copper, or even polysilicon. Preferably, the heat buffer blocks have a better heat (thermal) conductivity than the fuse layer500, the heat buffer blocks can thus help to dissipate the heat. The top metal pad layers (as shown inFIG. 1) can be used as a current input pad for the fuse structure or for connecting the fuse structure with other devices in the integrated circuit.

Referring back toFIG. 5or5A, when the current (flowing in the direction of the leader arrow) flows from the first block510through the inner blocks and the heat buffer blocks to the second block520, because the areas of the connecting blocks of the inner blocks are smaller than the areas of the terminal blocks of the inner blocks, the current density flowing through the connecting blocks is higher. Hence, compared with the wider terminal blocks of the inner blocks, the narrower connecting blocks530b,540b,550bor530′bare deemed to be high-resistance narrow channels with higher current density flowing through, which results in higher temperature and enhanced electron migration in the connecting blocks530b,540b,550bor530′b. The connecting blocks530b,540b,550band530′b(FIG. 5A) are considered fusing points because they are narrower and are thus easy to be blown out (either ruptured or open by high post-burn resistance). Likewise, when the current flows from the second block520through the inner blocks and the heat buffer blocks to the first block510, because the area of the connecting blocks of the inner blocks are smaller compared to their abutting terminal blocks, the current density flowing through the connecting blocks is higher and the connecting blocks530b,540b,550band530′bbecome the fusing points. Moreover, according to the design of the layout, the shape of any heat buffer block can also be adjusted, so that the current density flowing through the specific region (i.e. the narrower region) of the heat buffer block(s) is higher and the specific region of the heat buffer block(s) becomes the fusing point. On the other hand, the resistivity of the connecting via plug(s) can be carefully designed, so that the via plug(s) can become the fusing point, if necessary.

Compared toFIG. 2, since the fuse layer500ofFIG. 5has a plurality of inner blocks and a longer and sinuous electric current path is obtained between the first and second blocks through the heat buffer blocks and the inner blocks. Thus, the current flowing through the longer and serpentine electric current path is smaller than the current flowing through the fuse structure ofFIG. 2. Further, since the current flowing through the fuse structure of this embodiment is smaller, if the fuse layer is a composite layer of polysilicon and silicide, electro-migration occurs at the fusing points to make the silicide fused and the post-burn resistance of the fuse is high enough to deem open. Therefore, the design of this embodiment can avoid such large current flowing through the fuse structure ofFIG. 2and prevent overheating. If the fuse layer is a metal layer or an alloy layer, the design of this embodiment can allows larger current flowing through. Moreover, because a plurality of fusing points is present in the fuse structure of this embodiment, the sensitivity and reliability of the fuse structure are increased.

In addition, the heat buffer blocks coupled to the blocks and the inner blocks become new paths for conducting heat to effectively dissipate the heat. When the connecting blocks are over-heated due to the higher current density flowing through the narrower area, the thermal conducting paths provided by the heat buffer blocks and the coupled blocks can effectively dissipate the heat around the connecting blocks, or even transfer the heat to another layer.

Hence, the fuse structure of the present invention including at least a heat buffer block and separate blocks can provide a more effective heat conducting path, which can improve the heat dissipation and the reliability of the fuse structure, and prevent the negative impact due to the high heat of the fuse. For the devices adjacent to the fuse, the risk of overheating is reduced and the process window is thus increased because the heat generated by the current will be dissipated efficiently by the thermal buffer block.

The above description provides a full and complete description of the preferred embodiments of the present invention. Various modifications, alternate construction, and equivalent may be made by those skilled in the art without changing the scope or spirit of the invention. Accordingly, the above description and illustrations should not be construed as limiting the scope of the invention which is defined by the following claims.