Output power detection circuit with threshold limiting characteristics

An output power detection circuit including a detection circuit is disclosed. The output power detection circuit further includes a summing network, wherein a first voltage input of the summing network is capable of receiving a voltage that is proportional with a current flowing through an output stage of an RF amplifier circuit, a second voltage input is coupled with the detection circuit, and an output is capable of providing a summing voltage.

TECHNICAL FIELD OF THE INVENTION

Embodiments of the present invention relate generally to radio frequency (RF) power amplifiers and more specifically, to an output power detection circuit with threshold limiting characteristics.

BACKGROUND OF THE INVENTION

Radio frequency (RF) power amplifiers are often used in wireless devices, such as cellular telephones. Extending the battery life is a key concern for users and manufacturers of these wireless devices. One of the key factors in determining the battery life of a wireless device is the power consumption of the RF power amplifiers. The RF power amplifiers are designed to operate into an optimal load impedance and are typically coupled to an antenna of the wireless device.

However, under a load mismatch condition, such as, for example, when the antenna of the wireless device approaches objects (e.g., metal structures, human contact, or a hand in the near field of the antenna, or the like), the load impedance of the RF power amplifier changes and the RF power amplifier draws excess current. In some cases, the current can exceed more than two times the current drawn under an optimal load impedance. When the RF power amplifier draws excess current, the battery life of the wireless device is reduced. In addition, the adjacent channel power ratio (ACPR) and error vector magnitude (EVM) linearity limits are often exceeded when the RF power amplifier draws excess current. This reduction in battery life and exceeding of the ACPR and EVM limits are undesirable.

FIG. 1illustrates a schematic diagram of a detection circuit100according to the prior art. Detection circuit100includes RF amplifier stages A1-A3, a voltage detection VDETsignal, an external bias control signal, an RFINsignal, an RFOUTsignal, an output coupler102, a diode D1, and a collector voltage VCC. Output coupler102senses the forward output power from RF amplifier stages A1-A3(i.e., RFOUTsignal), which is rectified by diode D1to provide a voltage detection VDETsignal. The voltage detection VDETsignal is applied to an external power control device to adjust the external bias control ExtBIASsignal until the detected output voltage from output coupler102equalizes with the power control signal voltage of the external power control device, thereby substantially maintaining a constant forward output power from RF amplifier stages A1-A3.

However, the use of detection circuit100is disadvantageous, because the external power control device does not provide a mechanism to limit the amount of current that is drawn by RF amplifier stages A1-A3. For example, under certain load mismatch conditions, the external power control device will continue to draw as much current as is necessary in order to maintain the forward output power of RF amplifier stages A1-A3constant with the external power control device. Among other things, this reduces the efficiency of RF amplifier stages A1-A3and decreases the battery life of the wireless device, which, as described above, is disadvantageous for users and manufacturers of these wireless devices.

FIG. 2illustrates a schematic diagram of another detection circuit200according to the prior art. Detection circuit200includes RF amplifier stages A1-A3, voltage detection VDETsignal, an external collector voltage VCCcontrol signal, RFINsignal, RF out signal, output coupler102, diode D1, and a bias voltage VBIASsignal. Detection circuit200is similar to detection circuit100, except that instead of using an external power control device to adjust the bias current of RF amplifier stages A1-A3, detection circuit200uses the external power control device to adjust the collector voltage VCCof RF amplifier stages A1-A3.

However, the use of detection circuit200is disadvantageous, for the same reasons as discussed above with respect to detection circuit100. In addition, implementation of a hard current limit with detection circuits100and200is not desirable, as it may adversely affect the RF characteristics of RF amplifier stages A1-A3. For example, as the output power of RF amplifier stages A1-A3is ramping to a specified value, as defined by the external power control device, a sharp discontinuity may occur when the supply current reaches a predetermined maximum limiting value. This sharp discontinuity is commonly referred to as a hard limit and causes various spurious emissions and unwanted harmonics in the frequency domain. These spurious emissions and unwanted harmonics are undesirable.

DETAILED DESCRIPTION OF THE INVENTION

Reference will now be made to the following detailed description of the exemplary embodiments of the present invention. Those skilled in the art will recognize that embodiments of the present invention provide many inventive concepts and novel features that are merely illustrative and not to be construed as restrictive. Accordingly, the specific embodiments discussed herein are given by way of example and do not limit the scope of the embodiments of the present invention. In addition, those skilled in the art will understand that for purposes of explanation, numerous specific details are set forth, though embodiments of the invention can be practiced without these specific details, and that certain features have been omitted so as to more clearly illustrate embodiments of the invention.

FIG. 3illustrates a high-level block diagram of a wireless device300according to an exemplary embodiment of the present invention. In one embodiment of the present invention, wireless device300comprises an antenna302, a switch/duplexer304, a transmitter306, a receiver308, TX/RX circuitry310, a speaker/microphone312, a main processor314, a display/keypad316, a memory318, and a battery320. Wireless device300may be any wireless device, including, but not limited to, conventional cellular telephones, paging devices, personal digital assistant devices, text-messaging devices, portable computers, or any other like device capable of wireless communication.

As will be explained below in greater detail, transmitter306comprises radio frequency (RF) power amplifier circuitry including output power detection circuitry, one or more RF power amplifier stages, and other like circuitry. In one embodiment of the present invention, the RF power amplifier circuitry of transmitter306is formed on a Gallium Arsenide (GaAs) substrate. However, other semiconductor materials (e.g., silicon, silicon germanium, indium phosphide, gallium nitride, silicon carbide, aluminum gallium arsenide; indium gallium arsenide; indium gallium phosphide; indium aluminum arsenide; aluminum gallium nitride; indium gallium nitride; gallium arsenide antimonide; indium gallium arsenide nitride; and aluminum arsenide) may be used. In addition, for purposes of illustration and ease of explanation, embodiments of the present invention are described in terms of bipolar junction transistor (BJT) technology (e.g., heterojunction bipolar transistors (HBTs)). However, embodiments of the invention may be practiced using other transistor technology, including, for example, but not limited to, field effect transistor (FET) technology (e.g., junction field effect transistors, heterostructure field effect transistors, modulation-doped field effect transistors, metal-semiconductor field effect transistors (MESFETs), high electron mobility transistors, metamorphic high electron mobility transistors, and pseudomorphic high electron mobility transistors (pHEMTs)) or complementary metal-oxide semiconductor (CMOS) technology.

TX/RX circuitry310receives from antenna302an incoming signal transmitted by, for example, a communication system or a wireless network provider, through switch/duplexer304and receiver308. TX/RX circuitry310processes and sends the incoming signal to the speaker (i.e., voice data) or to main processor314(e.g., web browsing) for further processing. Likewise, TX/RX circuitry310receives analog or digital voice data from the microphone or other outgoing data (e.g., web data, e-mail) from main processor314. TX/RX circuitry310transmits an RF signal that is transmitted through transmitter306via antenna302.

Main processor314executes a basic operating system program stored in memory318in order to control the overall operation of wireless device300. For example, main processor314controls the reception of signals and the transmission of signals by TX/RX circuitry310, receiver308, and transmitter306. Main processor314is capable of executing other processes and programs resident in memory318and may move data into or out of memory318, as required by an executing process.

Main processor314is also coupled to display/keypad316. The user of wireless device300uses the keypad to enter data into wireless device300. The display may be a liquid crystal display capable of rendering text and/or at least various graphics; alternate embodiments may use other types of displays. Battery320is coupled with the electrical components of wireless device300, in accordance with known electrical principles.

Those skilled in the art will recognize that wireless device300is given by way of example and that for simplicity and clarity, only so much of the construction and operation of wireless device300as is necessary for an understanding of the present invention is shown and described. For example, wireless device300is capable of communicating using one or more of a number of conventional standards, including, but not limited to GSM/EDGE, CDMA, W-CDMA, or the like. In addition, or as an alternative, although an exemplary wireless device300is shown and described, embodiments of the present invention contemplate any suitable component or combination of components performing any suitable tasks in association with wireless device300, according to particular needs. Moreover, it is understood that wireless device300should not be construed to limit the types of devices in which embodiments of the present invention may be implemented.

In accordance with the principles of embodiments of the present invention, the RF power amplifier circuitry of transmitter306of wireless device300provides for maintaining certain parameters within the RF power amplifier circuitry above certain threshold levels, as described below in greater detail. In addition, or as an alternative, below the threshold levels, the RF power amplifier circuitry control-loop parameters are unchanged.

FIG. 4illustrates a schematic diagram of an output power detection circuit400according to one embodiment of the present invention. Output power detection circuit400comprises RF amplifier circuit402, detection circuit404, a summing network406, a control circuit408, a mirror circuit410, a VRAMPsignal, an RFINsignal, an RFOUTsignal, and a battery voltage VBATT. RF amplifier circuit402comprises transistors Q1-Q3, resistors R1-R3, inductors L1-L3, and capacitors C1-C3. Although RF amplifier circuit402is shown and described as having only these components, any number of transistors, capacitors, resistors, inductors, or other components may be used.

Detection circuit404comprises a capacitor C4, a diode D2, and a coupler412. Although detection circuit404is shown and described as having a single capacitor C4, a single diode D2, and a single coupler412, embodiments of the present invention contemplate any circuit which detects the output power of RF amplifier circuit402and provides an output signal corresponding to that output power. Mirror circuit410comprises a transistor Q4and a resistor R4. Although mirror circuit410is shown and described as having a single transistor Q4and a single resistor R3, embodiments of the present invention contemplate any suitable transistor or components performing the same or substantially similar function as mirror circuit410.

In one embodiment of the present invention, transmitter306of wireless device300ofFIG. 3comprises RF power amplifier circuitry including output power detection circuit400. In addition, or as an alternative, transistors Q1-Q3of RF amplifier circuit402are RF amplifier stages associated with the RF power amplifier circuitry of wireless device300. RF amplifier circuit402may be driven by the RFINsignal via a RF driver stage or by TX/RX circuitry310of wireless device300. In addition, RF amplifier circuit402may transmit the RFOUTsignal into a load. In one embodiment of the present invention, the load may be an antenna and may be, for example, antenna302of wireless device300. RF amplifier circuit402, and in particular transistor Q3, may experience a load mismatch of antenna302of wireless device300.

To further explain the operation of output power detection circuit400, an example is now given. In the following example, transistor Q3experiences a load mismatch condition, such as, for example, when antenna302of wireless device300comes in close proximity with objects, for example, a hand, in the near field of antenna302, or the like. Although a load mismatch condition of transistor Q3of RF amplifier circuit402is described as a load mismatch generated from an antenna mismatch condition, embodiments the present invention contemplate any suitable load mismatch condition. For example, a load mismatch condition may be any load mismatch condition that causes collector current ICCto increase in transistor Q3of RF amplifier circuit402, thereby increasing the power consumption and decreasing the battery life or exceeding the adjacent channel power ratio (ACPR) and error vector magnitude (EVM) limits of wireless device300.

In an embodiment of the present invention, transistor Q4of mirror circuit410, is a current mirror transistor, and is coupled in parallel with transistor Q3of RF amplifier circuit402, such that the base of transistor Q3is coupled with the base of transistor Q4and the collector of transistor Q3is coupled with the collector of transistor Q4via a resistor R4. Since transistor Q4is configured as a current mirror transistor, transistor Q4senses a portion of the current flowing through transistor Q3, such that the current flowing through transistor Q4is proportional to the current flowing through transistor Q3.

In addition, because transistor Q4is configured as a current mirror transistor, transistor Q4may be sized smaller than, for example, the size of transistor Q3. As an example only and not by way of limitation, transistor Q3may be sized to handle several amps of current flowing through transistor Q3, wherein transistor Q4may be sized to handle only a hundredth of the current flowing through transistor Q3. However, even though transistor Q4may be sized smaller than transistor Q3, the current flowing through transistor Q4is still proportional to the current flowing through transistor Q3.

Furthermore, because, as discussed above, transistor Q4is a current mirror transistor, transistor Q4generates a voltage V1, which is representative of the current flowing through transistor Q3. In addition, or as an alternative, the value of resistor R4determines the ratio between the current flowing through transistor Q3and the current flowing through transistor Q4. Thus, in accordance with the principles of embodiments of the present invention, the current flowing through transistor Q4generates a voltage V1that is proportional to collector current ICC. Transistor Q4provides a voltage V1at one input of summing network406.

In an embodiment of the present invention, output coupler412detects the output power of RF amplifier circuit402. The detected output power of RF amplifier circuit402is rectified by diode D2to provide a voltage V2at another input of summing network406, wherein voltage V2is proportional to the output power of RF amplifier circuit402. Voltages V1and V2are then applied to summing network406.

Summing voltage VSof summing network406has the following dependence on voltages V1and V2:
VS=α×V2+β×max(0,ICC−IT)  (1)
where α and β are fixed gains and threshold current ITis a threshold value that is set during the design phase of output power detection circuit400. In addition, α and β provide the ability to determine how aggressively collector current ICCis limited by the threshold value of threshold current IT.

To further explain the threshold value of threshold current IT, an example is now given. In the following example, the maximum current of RF amplifier circuit402may require a current limit, such as, for example, 2.3 Amps. The threshold value of threshold current ITmay be set to any value below the current limit, such as, for example, 2.0 Amps. Although an example maximum current and an example threshold current ITis described, embodiments of the present invention contemplate using any maximum current or any threshold value of threshold current IT.

As shown and described in equation 1, when collector current ICCis below the threshold value of threshold current IT, the control-loop parameters of output power detection circuit400are unchanged. For example, when collector current ICCis below the threshold value of threshold current IT, 0 is the maximum as between 0 and (ICC−IT). Thus, multiplying β by 0 eliminates β from the calculation of summing voltage VS, and summing voltage VSis proportional to the output power of RF amplifier circuit402because V2is proportional to the output power of RF amplifier circuit402. In addition, when collector current ICCis equal to the threshold value of threshold current IT, the control-loop parameters of output power detection circuit400are also unchanged because, collector current ICCminus threshold current ITis equal to zero, (i.e., (ICC−IT=0)).

However, when collector current ICCexceeds the threshold value of threshold current IT, there is excess current, and summing voltage VSis increased by an amount proportional to the excess current. For example, summing voltage VSis the output of summing network406, is input into control circuit408and results in a reduction of bias voltage VBIAS, thereby limiting the excess current.

The form of bias voltage VBIASdependence is:
VBIAS=G1×VRAMP−G2×max(0,ICC−IT)  (2)
where G1and G2are fixed gains. It is important to note, with reference to equation (2), that below the threshold value of threshold current IT, bias voltage VBIASis proportional to the VRAMPsignal, with an essentially fixed gain G1. However, once collector current ICCexceeds the threshold value of threshold current IT, the dependence of bias voltage VBIASon the VRAMPsignal is progressively reduced with increasing current. Among other things, the continuity in bias voltage VBIAScoupled with the ability to adjust the gain about the threshold value of threshold current IT, provides control-loop stability for output power detection circuit400and minimizes any spurious emissions associated with RF amplifier circuit402.

Although control circuit408is shown and described as supplying the bias voltage VBIASof transistors Q1-Q3of RF amplifier circuit402, embodiments of the present invention contemplate supplying transistor Q3, or transistor Q1and/or Q2, or any combination of transistors. In addition, although control circuit408is shown and described as comparing summing voltage VSand the VRAMPsignal, embodiments of the present invention contemplate any circuit which detects a difference in two voltage levels and outputs a signal corresponding to this difference.

As described above, the threshold value of threshold current ITmay be set to any value below a maximum current limit using output power detection circuit400. However, unlike in the prior art, no abrupt discontinuity occurs in bias voltage VBIASas a function of the VRAMPsignal at the threshold value of threshold current IT. Embodiments of the present invention use the threshold value of threshold current ITto progressively reduce the increasing current associated with RF amplifier circuit402as bias voltage VBIASis increased in response to the VRAMPsignal. Among other things, this reduces any spurious emissions and unwanted harmonics in the frequency domain of embodiments of the present invention, which enables embodiments of the present invention to provide control-loop stability of output power detection circuit400.

In addition, because the maximum current of RF amplifier circuit402is limited under load mismatch conditions, the battery life of, for example, battery320, of wireless device300is increased relative to prior art circuits that do not limit the maximum current. Among other things, this increases the talk time associated with wireless device300, improves the ruggedness of RF amplifier circuit402, and reduces any excessive heating associated with output power detection circuit400.

FIG. 5illustrates a schematic diagram of an output power detection circuit500according to another embodiment of the present invention. Output power detection circuit500comprises RF amplifier circuit402, detection circuit404, summing network406, control circuit408, RFINsignal, RFOUTsignal, and a bias voltage VBIASsignal. As discussed above, although RF amplifier circuit402is shown inFIG. 5and described above as having only certain components, any number of transistors, capacitors, resistors, inductors, or other components may be used. In addition, although detection circuit404is shown inFIG. 5and described above as having a single capacitor C4, a single diode D2, and a single coupler412, embodiments of the present invention contemplate any circuit which detects the output power and provides an output signal corresponding to that output power.

Output power detection circuit500is similar to output power detection circuit400, except that rather than using current mirror circuit410to generate voltage V1, embodiments of the present invention operate in conjunction with the bias network associated with RF amplifier circuit402to generate voltage V1. As an example only, and not by way of limitation, the bias network of RF amplifier circuit402generates a voltage V1that is proportional to collector current ICCflowing through transistor Q3.

In one embodiment of the present invention, voltage V1is generated from the bias network associated with transistor Q3of RF amplifier circuit402. Although voltage V1is shown and described as generated from the bias network associated with transistor Q3, embodiments of the present invention contemplate generating voltage V1from the bias network associated with transistor Q1, transistor Q2, transistor Q3or any combination of bias networks of RF amplifier circuit402. In addition, as described above, voltages V1and V2are applied to summing network406and therefore, equation 1 is likewise valid for output power detection circuit500.

In addition, as described above, when collector current ICCexceeds the threshold value of threshold current IT, there is excess current, and summing voltage VSis increased by an amount proportional to the excess current. For example, summing voltage VS, which is the output of summing network406, is input into control circuit408and results in a reduction of collector voltage VCC, thereby limiting the excess current.

The form of the collector voltage VCCdependence is:
VCC=G1×VRAMP−G2×max(0,ICC−IT)  (3)
where G1and G2are fixed gains. It is important to note, with reference to equation (3), that below the threshold value of threshold current IT, collector voltage VCCis proportional to the VRAMPsignal, with an essentially fixed gain G1. However, once collector current ICCexceeds the threshold value of threshold current IT, the dependence of collector voltage VCCon the VRAMPsignal is progressively reduced with increasing current. Among other things, the continuity in collector voltage VCCcoupled with the ability to adjust the gain about the threshold value of threshold current IT, provides control-loop stability for output power detection circuit500and minimizes any spurious emissions associated with RF amplifier circuit402.

Although control circuit408is shown and described as supplying the collector voltage VCCof transistors Q1-Q3of RF amplifier circuit402, embodiments of the present invention contemplate supplying transistor Q3, or transistor Q1and/or Q2, or any combination of transistors. In addition, as described above, although control circuit408is shown and described as comparing summing voltage VSand the VRAMPsignal, embodiments of the present invention contemplate any circuit which detects a difference in two voltage levels and outputs a signal corresponding to this difference.

As described above, the threshold value of threshold current ITmay be set to any value below a maximum current limit using output power detection circuit500. However, unlike in the prior art, no abrupt discontinuity occurs in collector voltage VCCas a function of the VRAMPsignal at the threshold value of threshold current IT. Embodiments of the present invention use the threshold value of threshold current ITto progressively reduce the increasing current associated with RF amplifier circuit402as collector voltage VCCis increased in response to the VRAMPsignal. Among other things, this reduces any spurious emissions and unwanted harmonics in the frequency domain of embodiments of the present invention, which enables embodiments of the present invention to provide control-loop stability of output power detection circuit500.

In one embodiment of the present invention, transmitter306of wireless device300ofFIG. 3comprises RF power amplifier circuitry including output power detection circuit500. As discussed above, transistors Q1-Q3of RF amplifier circuit402are RF amplifier stages associated with the RF power amplifier circuitry of wireless device300and may be driven by the RFINsignal via a RF driver stage or by TX/RX circuitry310of wireless device300. In addition, RF amplifier circuit402may transmit the RFOUTsignal into a load, which may be an antenna and may be, for example, antenna302of wireless device300. RF amplifier circuit402, and in particular transistor Q3, may experience a load mismatch of antenna302of wireless device300.

Thus, in accordance with the principles of embodiments of the present invention, when the current increases in the bias network associated with RF amplifier circuit402, collector voltage VCCis adjusted to limit the maximum collector current ICCof RF amplifier circuit402. Among other things, this decreases the power consumption and increases the battery life of, for example, battery320, of wireless device300relative to prior art circuits that do not limit the maximum current. In addition, among other things, this increases the talk time associated with wireless device300, improves the ruggedness of RF amplifier circuit402, and reduces any excessive heating associated with output power detection circuit500.

While the exemplary embodiments of the present invention have been shown and described, it will be understood that various changes and modifications to the foregoing embodiments may become apparent to those skilled in the art without departing from the spirit and scope of the present invention. Accordingly, the invention is not limited to the embodiments disclosed, but rather by the appended claims and their equivalents.