Voltage regulator

One example discloses a voltage regulator, including: a power supply input; a regulated voltage output; an output transistor coupled to the power supply input and the regulated voltage output; and a current amplifier coupled between the power supply input and the regulated voltage output; wherein the current amplifier is configured to supply a second current from the power supply input to the regulated voltage output when a first current between the power supply input and the output transistor exceeds a threshold current.

The present specification relates to systems, methods, apparatuses, devices, articles of manufacture and instructions for voltage regulation.

SUMMARY

According to an example embodiment, a voltage regulator, comprising: a power supply input; a regulated voltage output; an output transistor coupled to the power supply input and the regulated voltage output; and a current amplifier coupled between the power supply input and the regulated voltage output; wherein the current amplifier is configured to supply a second current from the power supply input to the regulated voltage output when a first current between the power supply input and the output transistor exceeds a threshold current.

In another example embodiment, the output transistor is an NMOS transistor having a drain coupled to the power supply input and a source coupled to the regulated voltage output.

In another example embodiment, the second current supplied by the current amplifier to the regulated voltage output is a multiple of the first current between the power supply input and the output transistor.

In another example embodiment, the current amplifier includes an amplifier control circuit and an amplified current circuit; the amplifier control circuit, is coupled between the power supply input and the output transistor, and is configured to sense the first current between the power supply input and the output transistor; and the amplified current circuit, is coupled to the amplifier control circuit, and is coupled between the power supply input and the regulated voltage output, and is configured to supply the second current from the power supply input to the regulated voltage output when the first current between the power supply input and the output transistor exceeds the threshold current.

In another example embodiment, the amplifier control circuit and the amplified current circuit are configured as a current mirror, having a current mirror multiple equal to a ratio of the first current and the second current; and the amplified current circuit is configured to supply the second current from the power supply input to the regulated voltage output at the current mirror multiple when the first current between the power supply input and the output transistor exceeds the threshold current.

In another example embodiment, the amplifier control circuit includes a resistor for monitoring the first current between the power supply input and the output transistor.

In another example embodiment, further comprising a differential amplifier configured to compare a voltage reference with a feedback voltage received from the output; and wherein the output transistor is coupled and controlled by the differential amplifier.

In another example embodiment, the voltage regulator is embedded in at least one of: a wall charger, a wireless charger, a mobile phone, or a USB connector, a notebook adapter, a TV adapter, or a PC adapter.

In another example embodiment, the current amplifier is part of an output stage of the voltage regulator.

In another example embodiment, the current amplifier is configured to reduce voltage steps and/or voltage spikes at the regulated voltage output.

In another example embodiment, the current amplifier includes a first NMOS transistor configured to pass the first current and a second NMOS transistor configured to pass the second current; and the first and second NMOS transistors are configured as a current mirror.

In another example embodiment, the current amplifier is a first current amplifier; further comprising a second current amplifier coupled between the first current amplifier and the regulated voltage output; the second current amplifier is configured to supply a third current from the power supply input to the regulated voltage output when the second current between the power supply input and the first current amplifier exceeds a second threshold current.

In another example embodiment, the first current amplifier includes a first NMOS transistor configured to pass the first current and a second NMOS transistor configured to pass the second current; the first and second NMOS transistors are configured as a first current mirror; the second current amplifier includes a first PMOS transistor configured to pass the second current and a second PMOS transistor configured to pass the third current; and the first and second PMOS transistors are configured as a second current mirror.

According to an example embodiment, a voltage regulator, comprising: a power supply input; a regulated voltage output; an output transistor coupled to the power supply input and the regulated voltage output; and means for current amplification coupled between the power supply input and the regulated voltage output; wherein the means for current amplification is configured to supply a second current from the power supply input to the regulated voltage output when a first current between the power supply input and the output transistor exceeds a threshold current.

According to an example embodiment, a method for voltage regulation in a device having a power supply input, a regulated voltage output, and an output transistor coupled to the power supply input and the regulated voltage output, comprising: supplying a second current from the power supply input to the regulated voltage output when a first current between the power supply input and the output transistor exceeds a threshold current.

The above discussion is not intended to represent every example embodiment or every implementation within the scope of the current or future Claim sets. The Figures and Detailed Description that follow also exemplify various example embodiments.

Various example embodiments may be more completely understood in consideration of the following Detailed Description in connection with the accompanying Drawings, in which:

DETAILED DESCRIPTION

In order to supply internal circuits operating at different voltage supplies in an integrated circuit voltage regulators are often needed. To reduce the number of pins and external components these voltage regulators should preferably have no external components. Additional demands on these voltage regulators are low-current consumption and frequency stability over a large range of output current and capacitive load. In addition fast reaction to load current variations is required to avoid voltage spikes that might influence the performance of the circuit or cause reliability problems.

FIG. 1Ais a first example100of a voltage regulator.

The first example100voltage regulator (e.g. an NMOS regulator) is a closed-loop series regulator in which an NMOS device is used as output transistor102(i.e. a source follower). Some advantages of this regulator100include: simple frequency stabilization, good line regulation and low output impedance.

This example100regulator uses a resistive feedback (i.e. voltage divider)104to compare a regulated output voltage106with a reference voltage108. A differential amplifier110and a compensating capacitor112form a low-frequency, dominant pole. The output transistor102forms a second pole with a load's114output capacitance116. This second pole is larger than the unity-gain bandwidth defined by the internal gain stage. When the unity-gain bandwidth is small, then there is frequency stability over a wide range of output currents118and output capacitors116.

Fast load current118variations in the NMOS voltage regulator100however can cause voltage spikes at the voltage output106called load steps. If the output (i.e. load) capacitance116(Cload) is small in an integrated regulator, the load steps may not be suppressed by the load capacitance116. The amplitude of the regulated output voltage106spike mainly depends on the Ids-Vgs relation of the NMOS output transistor102. The duration of the voltage106spikes depends on the unity gain bandwidth of the regulator100.

FIG. 1Bis an example set of voltage120and current122waveforms from the first example voltage regulator100.

Load steps might be either negative124or positive126,128dependent on the polarity of the current variation. Negative voltage spikes124might cause problems with performance of attached circuits. In case of peripheral digital circuits it may reduce the speed of such circuits. In case of analog circuits, crosstalk due to the voltage spikes124,126or current biasing might be a problem.

FIG. 2is a second example200of a voltage regulator. The second example200voltage regulator (e.g. an NMOS regulator) is also a closed-loop series regulator in which an NMOS device is used as output transistor232.FIG. 2Bis an example set of voltage220and current222waveforms from the second example voltage regulator200.

The second voltage regulator200includes: an intermediate transistor202, resistive feedback204, gate voltage205, regulated output voltage206, reference voltage208, differential amplifier210, compensating capacitor212, a replica output regulator230, and an output transistor232. The load214includes an output capacitance216and output current218.

Positive voltage spikes might be a problem if the maximum voltage rating of attached circuit is violated; however, if the maximum voltage rating is close to a typical voltage level, the replica-output regulator230prevents such spikes. The replica output regulator230uses the gate voltage205in the closed-loop portion of the voltage regulator200as an input voltage.

When the gate of the replica output regulator230transistor is held at a constant voltage, frequency stability requirements are minimized as are positive voltage spikes (seeFIG. 2B) due to load current222variations. The regulated output voltage waveform220will depend on the output current waveform222through the Ids-Vgs relation of the NMOS output transistor232; however there is still a negative load step224.

FIG. 3is a third example300of a voltage regulator. The third voltage regulator300includes: an output transistor302, resistive feedback304, a gate voltage305, a regulated output voltage306, a reference voltage308, a differential amplifier310, and a fast control circuit320. The load314includes an output capacitance316and an output current318.

The third voltage regulator300presents another approach toward overcoming voltage steps due to large load current variations using a fast control circuit320which can be either a window comparator or a fast control loop. Both methods control the gate of the NMOS output transistor.

The fast control circuit320controls the gate voltage305in response to a step in the output current318. The fast control circuit320includes window comparators (not shown) for monitoring the regulated output voltage306. If the regulated output voltage306goes beyond a certain voltage range the gate voltage305of the output transistor302is controlled by the window comparator such that the regulated output voltage306does not go out of a defined regulated voltage range.

In some embodiments however fast comparators are required which may consume a large current. Also there can be a risk of instability due to a high-gain of the window comparator. Implementing window comparators (i.e. the fast control circuit320) in a replica output voltage regulator may be complicated since the gate voltage305is basically fixed.

FIG. 4Ais a fourth example400of a voltage regulator. The fourth voltage regulator400includes: an output transistor402(e.g. an NMOS transistor), a feedback path404, a gate voltage405(i.e. a control voltage), a regulated output voltage406, a load current407, a reference voltage408, a voltage controller410(e.g. differential amplifier), and a current amplifier412. The current amplifier412is part of an output stage of the voltage regulator, and includes an amplifier control circuit414and an amplified current circuit416. Connected to the fourth voltage regulator400is a power supply418and a load420.

The current amplifier412is coupled between a power supply input, which is between the power supply418and the voltage regulator400, and the regulated voltage output which is between the voltage regulator400and the load420.

The current amplifier412is configured to supply a second current from the power supply input to the regulated voltage output when a first current between the power supply input and the output transistor402exceeds a threshold current.

In the embodiment shown inFIG. 4Athe first current is passing through the amplifier control circuit414and the second current is passing through the amplified current circuit416.

The amplifier control circuit414, between the power supply input and the output transistor, is configured to sense the first current between the power supply input and the output transistor402.

The amplified current circuit416coupled to the amplifier control circuit414and between the power supply input and the regulated voltage output, is configured to supply the second current from the power supply input to the regulated voltage output when the first current between the power supply input and the output transistor exceeds the threshold current.

In an example embodiment, the second current supplied by the current amplifier412to the regulated voltage output is a multiple of the first current between the power supply input and the output transistor402.

In an example embodiment the amplifier control circuit414and the amplified current circuit416are configured as a current mirror, having a current mirror multiple equal to a ratio of the first current and the second current. The amplified current circuit416is configured to supply the second current from the power supply input to the regulated voltage output at the current mirror multiple when the first current between the power supply input and the output transistor exceeds the threshold current.

The voltage controller410(e.g. differential amplifier) is configured to compare the voltage reference408with the feedback voltage404received from the output transistor402. The output transistor402is coupled and controlled by the voltage controller410.

FIG. 4Bis an example regulated output voltage vs. load current graph422from the fourth example voltage regulator. Shown in the graph422: one axis corresponds to the regulated output voltage406, another axis corresponds to the load current407.

An I-V (i.e. current-voltage) waveform without current amplification424is shown along with an I-V waveform with current amplification426. A current amplification activation point428represents the threshold current where the load current407(e.g. Iload) equals the first current between the power supply input and the output transistor402(e.g. Iref).

By using current amplification in the output stage, the voltage regulator400improves upon load current regulation, as shown inFIG. 4B, thereby reducing voltage steps and/or spikes. The voltage regulator400can be used in integrated circuits requiring integrated fast voltage regulators for digital and analog circuits, and can be embedded in: a wall charger, a wireless charger, a mobile phone, or a USB connector.

Thus instead of voltage regulation by controlling the gate voltage405of the output transistor402, the output current is amplified using the current amplifier412once the current to the output transistor402exceeds the preselected threshold value. Since current mode circuits typically have a high bandwidth, using the voltage regulator400the load current407control can be very fast, resulting in a fast reaction to load current407variations. For replica output voltage regulators the voltage regulator400has an advantage that with a constant gate voltage the load step can still be improved.

FIG. 5is a fifth example500of a voltage regulator. The fifth voltage regulator500includes: an output transistor502, feedback (not shown), a gate voltage505(e.g. control voltage), a regulated output voltage506, a load current507, a reference voltage (not shown), a voltage controller (not shown), and a current amplifier512. The current amplifier512includes a reference current circuit514(e.g. R1) for monitoring a first current (i.e. reference current) (Iref).

The current amplifier512also includes a current mirror516which multiplies the output transistor502drain current by a preselected current multiplication value (i.e. K) once the output transistor's502drain current meets and/or exceeds Iref. In this example embodiment, a power supply (not shown) and a load520are also connected to the fifth voltage regulator500.

The fifth voltage regulator500otherwise operates in a manner similar to that described inFIGS. 4A and 4B.

FIG. 6is a sixth example600of a voltage regulator. The sixth voltage regulator600includes: an output transistor602(e.g. Mn), feedback (not shown), a gate voltage605(e.g. control voltage), a regulated output voltage606, a load current607, a reference voltage (not shown), a voltage controller (not shown), and a current amplifier612.

The current amplifier612includes an amplifier control circuit614and an amplified current circuit616. The amplifier control circuit614includes a first NMOS transistor613and a resistor615(i.e. a bypass resistor for monitoring the first current (i.e. reference current, Iref). The amplified current circuit616includes second NMOS transistor617, wherein the first NMOST613and second NMOST617are configured as a current mirror.

Connected to the voltage regulator600is a power supply618and a load620having an output capacitance622.

The resistor615(R1) is coupled between the drain and source of the NMOS transistor613and defines the threshold current (e.g. Iload=Iref) where current amplification begins (e.g. the current amplification activation point428).

Resistor R1also sets a minimum bandwidth of the current mirror. The bandwidth of the current mirror in one example embodiment is larger than the bandwidth of a current loop formed by the output transistor602(e.g. Mn) and the current mirror.

When the current through the NMOST613is equal to Vt/R1(e.g. Iload=Iref) the current mirror begins operation and the current is amplified K times (e.g. a 1:K ratio). Vt is the threshold voltage of the NMOST613. When Vgs (the voltage between the NMOST's613gate and source) is smaller than Vt, the NMOST613does not conduct.

As discussed with respect toFIGS. 4A and 4B, when Iload=Iref the Iload−Vout waveform is shifted thereby reducing voltage steps at the load620as Iload increases. The dominant pole is formed by the output transistor602and the load capacitor622. This embodiment can be as fast as a single transistor yielding a highest possible bandwidth.

FIG. 7is a seventh example700of a voltage regulator. The seventh voltage regulator700includes: an output transistor702(e.g. Mn), feedback (not shown), a gate voltage705(e.g. control voltage), a regulated output voltage706, a load current707, a reference voltage (not shown), a voltage controller (not shown), a first current amplifier712and a second current amplifier724.

The first current amplifier712includes an amplifier control circuit (not shown) having a first NMOST713and a resistor715for monitoring a first current (i.e. reference current, Iref). The first current amplifier712also includes an amplified current circuit (not shown) having a second NMOST717, wherein the first MOST713and second MOST717are configured as a first current mirror.

The second current amplifier724includes an amplifier control circuit (not shown) having a first PMOST726and a resistor728for monitoring a second current through the second NMOST717. The second current amplifier724also includes an amplified current circuit (not shown) having a second PMOST730wherein the first PMOST726and second PMOST730are configured as a second current mirror.

Connected to the voltage regulator700is a power supply718and a load720having an output capacitance722.

The first current amplifier712is configured to supply a second current from the power supply input when a first current between the power supply input and the output transistor702exceeds a first threshold current. The second current amplifier724is configured to supply a third current from the power supply input to the regulated voltage output706when the second current between the power supply input and the first current amplifier712exceeds a second threshold current. Together the first and second current amplifiers712and714further multiply the current sent to the load720

The seventh example voltage regulator700thus includes multiple current amplification stages. These multiple current amplification stages offer higher current amplification gain and bandwidth as compared to the single NMOST current mirror ofFIG. 6.