SOLID-STATE IMAGING DEVICE, METHOD OF MANUFACTURING SOLID-STATE IMAGING DEVICE, AND ELECTRONIC EQUIPMENT

A solid-state imaging device that can further improve the quality and reliability of the solid-state imaging device is provided. There is provided a solid-state imaging device including: a sensor substrate having an imaging element that generates a pixel signal in a pixel unit; and at least one chip having a signal processing circuit necessary for signal processing of the pixel signal, wherein the sensor substrate and the at least one chip are electrically connected to and stacked on each other, and wherein a protective film is formed on at least a part of a side surface of the at least one chip, the side surface being connected to a surface of the at least one chip on a side on which the at least one chip is stacked on the sensor substrate.

TECHNICAL FIELD

The present technology relates to a solid-state imaging device, a method of manufacturing a solid-state imaging device, and electronic equipment.

BACKGROUND ART

Generally, solid-state imaging devices such as complementary metal oxide semiconductor (CMOS) image sensors and charge coupled devices (CCDs) are widely used in digital still cameras, digital video cameras, and the like.

Therefore, in recent years, technological developments for achieving higher quality and higher reliability in a solid-state imaging device have been actively performed. For example, a technology in which a solid-state imaging element and a circuit such as a signal processing circuit or a memory circuit are stacked according to a wafer-on-wafer (WoW) technology for performing joining in a wafer state has been proposed.

CITATION LIST

Patent Literature

JP 2014-099582 A

SUMMARY

Technical Problem

However, in the technology proposed in PTL 1, there is a concern that it is not possible to further improve the quality and reliability of the solid-state imaging device.

Consequently, the present technology is contrived in view of such circumstances, and an object thereof is to provide a solid-state imaging device that can further improve the quality and reliability of a solid-state imaging device and electronic equipment equipped with the solid-state imaging device.

Solution to Problem

As a result of intensive research to achieve the above-mentioned object, the present inventor has succeeded in further improving the quality and reliability of a solid-state imaging device and has completed the present technology.

That is, in the present technology, there is provided a solid-state imaging device including: a sensor substrate having an imaging element that generates a pixel signal in a pixel unit; and at least one chip having a signal processing circuit necessary for signal processing of the pixel signal, wherein the sensor substrate and the at least one chip are electrically connected to and stacked on each other, and wherein a protective film is formed on at least a part of a side surface of the at least one chip, the side surface being connected to a surface of the at least one chip on a side on which the at least one chip is stacked on the sensor substrate.

In the solid-state imaging device according to the present technology, the protective film may be formed to cover the sensor substrate in a region which is on a side of the at least one chip on which the at least one chip is stacked on the sensor substrate and in which the sensor substrate and the at least one chip are not stacked on each other.

In the solid-state imaging device according to the present technology, the protective film may be formed to cover an outer periphery of the at least one chip in a plan view from a side of the at least one chip.

In the solid-state imaging device according to the present technology, the at least one chip may be constituted by a first chip and a second chip, the first chip and the sensor substrate may be electrically connected to and stacked on each other, the second chip and the sensor substrate may be electrically connected to and stacked on each other, a protective film may be formed on at least a part of a side surface of the first chip, the side surface being connected to a surface of the first chip on a side on which the first chip is stacked on the sensor substrate, and a protective film may be formed on at least a part of a side surface of the second chip, the side surface being connected to a surface of the second chip on a side on which the second chip is stacked on the sensor substrate.

In the solid-state imaging device according to the present technology, the first chip and the second chip may be stacked in the same direction on the sensor substrate, and the protective film may be formed to cover the sensor substrate in a region which is on a side of the first chip on which the first chip is stacked on the sensor substrate, which is on a side of the second chip on which the second chip is stacked on the sensor substrate, in which the sensor substrate and the first chip are not stacked on each other, and in which the sensor substrate and the second chip are not stacked on each other.

In the solid-state imaging device according to the present technology, the first chip and the second chip may be stacked in the same direction on the sensor substrate, and the protective film may be formed to cover an outer periphery of the first chip and an outer periphery of the second chip in a plan view from a side of the first chip and a side of the second chip.

In the solid-state imaging device according to the present technology, the first chip and the second chip may be stacked in the same direction on the sensor substrate, the protective film may be formed in a region which is on a side of the first chip on which the first chip is stacked on the sensor substrate, which is on a side of the second chip on which the second chip is stacked on the sensor substrate, and which is between the first chip and the second chip, and the region on which the protective film is formed may be rectangular in a cross-sectional view from a side of the first chip and a side of the second chip.

In the solid-state imaging device according to the present technology, the first chip and the second chip may be stacked in the same direction on the sensor substrate, the protective film may be formed in a region which is on a side of the first chip on which the first chip is stacked on the sensor substrate, which is on a side of the second chip on which the second chip is stacked on the sensor substrate, and which is between the first chip and the second chip, and the region on which the protective film is formed may have a reversely tapered shape in a cross-sectional view from a side of the first chip and a side of the second chip.

In the solid-state imaging device according to the present technology, the protective film may be formed by a single film formation.

In the solid-state imaging device according to the present technology, the protective film may contain a material having an insulating property.

In the solid-state imaging device according to the present technology, the protective film may contain silicon nitride.

Further, in the present technology, there is provided electronic equipment equipped with the solid-state imaging device according to the present technology.

Furthermore, in the present technology, there is provided a method of manufacturing a solid-state imaging device including at least: stacking a sensor substrate having an imaging element that generates a pixel signal in a pixel unit and at least one chip having a signal processing circuit necessary for signal processing of the pixel signal to be electrically connected to each other; forming a protective film to cover the at least one chip after the stacking; and thinning the at least one chip from a second surface of the at least one chip opposite a first surface of the at least one chip on a side on which the at least one chip is stacked on the sensor substrate to remove the protective film on the second surface.

The method of manufacturing a solid-state imaging device according to the present technology may further include forming the protective film to cover the at least one chip and the sensor substrate after the stacking.

According to the present technology, it is possible to further improve the quality and reliability of the solid-state imaging device. The effects described here are not necessarily limited and may be any of the effects described in the present disclosure.

DESCRIPTION OF EMBODIMENTS

Hereinafter, preferred embodiments for implementing the present technology will be described. The embodiments which will be described below show an example of a representative embodiment of the present technology, and the scope of the present technology should not be narrowly interpreted on the basis of this. In the drawings, unless otherwise specified, “up” means the upper direction or the upper side in the drawing, “down” means the lower direction or the lower side in the drawing, “left” means the left direction or the left side in the drawing, and “right” means the right direction or the right side in the drawing. Further, in the drawings, the same or equivalent elements or members are denoted by the same reference numerals and signs, and repeated description will be omitted.

The description will be made in the following order.

1. Outline of the Present Technology

2. First Embodiment (Example 1 of Solid-state Imaging Device and Example 1 of Method of Manufacturing Solid-state Imaging Device)

3. Second Embodiment (Example 2 of Solid-state Imaging Device and Example 2 of Method of Manufacturing Solid-state Imaging Device)

4. Third Embodiment (Example of Electronic Equipment)

5. Usage Example of Solid-state Imaging Device to Which the Present Technology Is Applied

6. Application Example to Endoscopic Surgery System

7. Application Example to Moving Body

1. Outline of the Present Technology

First, an outline of the present technology will be described.

Solid-state imaging devices have achieved high image quality in the forms of a high vision function, a 4k×2k super high vision function, and a super slow motion function, and along with this, a solid-state imaging device has a large number of pixels, a high frame rate, and high gradation. A transmission rate is the number of pixels×the frame rate×the gradation, for example, and thus in a case where the number of pixel is 4k×2k=8M, the frame rate is 240 f/s, and the gradation is 14 bits, the transmission rate becomes 8M×240 f/s×14 bits=26 Gbps.

After signal processing in a stage after a solid-state imaging element, due to an output of RGB in color coordination, higher speed transmission of 26 G×3=78 Gbps is required. If high-speed transmission is performed with a small number of connection terminals, a signal rate per connection terminal becomes high, the difficulty of matching the impedance of a high-speed transmission path increases, the clock frequency increases, and loss also increases, and thus power consumption increases.

In order to avoid this, it is preferable to increase the number of connection terminals for dividing the transmission and slowing down the signal rate. However, increasing the number of connection terminals involves arranging terminals necessary for connection between the solid-state imaging element, a signal processing circuit in the subsequent stage, a memory circuit, and the like, and thus a package of each circuit becomes large. In addition, an electrical wiring substrate required for this is also required to have a stacked wiring with a finer wiring density, a wiring path length becomes longer, and the power consumption increases accordingly.

As the package of each circuit becomes larger, the substrate itself to be mounted also becomes larger, and finally a camera itself equipped with the solid-state imaging device becomes larger.

As a solution, there is a technology in which a solid-state imaging element and a circuit such as a signal processing circuit or a memory circuit are stacked according to a wafer-on-wafer (WoW) technology for performing joining in a wafer state. According to this, semiconductors can be connected with many fine wirings, the number of connection terminals increases, the transmission speed per wiring becomes low, and power consumption can be suppressed. However, in the case of the technology of stacking according to a wafer-on-wafer (WoW) technology, there is no problem as long as chips of wafers to be stacked are the same size, but if the sizes of the chips constituting the wafers are different, the size of the chip having a small chip size with respect to the chip having a large chip size should be matched to the largest chip size, resulting in poor profitability and cost increase.

This will be described specifically and in detail with reference toFIG.6.FIG.6is a diagram showing a solid-state imaging device600formed by performing stacking using a wafer-on-wafer (WoW) technology.

In the solid-state imaging device600shown inFIG.6, from above (from a light incidence side), an on-chip lens131-2, a color filter131-2, a solid-state imaging element120, a wiring layer140, a wiring layer141, a memory circuit121, a wiring layer142, and a logic circuit122are stacked in that order. Here, a sensor substrate600aincludes the solid-state imaging element120and the wiring layer140, a memory circuit chip600bincludes the memory circuit121and the wiring layer141, and a logic circuit chip600cincludes the logic circuit122and the wiring layer142.

Here, by applying the WoW technology, in wirings21-1that electrically connect the sensor substrate600aand the memory circuit chip600bto each other, and wirings21-2that electrically connect the memory circuit chip600band the logic circuit chip600cto each other, connection at a fine pitch is possible.

As a result, the number of wirings can be increased, and thus the transmission speed in each signal line can be reduced, and it is possible to save power.

However, since the areas required for the stacked sensor substrate600a, memory circuit chip600b, and logic circuit chip600care different, a space Z1in which neither a circuit nor a wiring is formed is generated on each of the left and right sides of the memory circuit chip600bhaving an area smaller than that of the largest sensor substrate600ain the drawing. Further, a space Z2in which neither a circuit nor a wiring is formed is generated on each of the left and right sides of the logic circuit chip600chaving an area smaller than that of the memory circuit chip600bin the drawing.

That is, the spaces Z1and Z2are generated due to the different areas required for the sensor substrate600a, the memory circuit chip600b, and the logic circuit chip600c, and inFIG.6, stacking is performed with the sensor substrate600a(the solid-state imaging element120), which requires the largest area, as a reference, and as a result, the spaces Z1and Z2are generated.

Accordingly, the profitability related to the manufacture of the solid-state imaging device600is reduced, and as a result, the cost related to the manufacture is increased.

In the yield of each wafer to be stacked, a defect in the chip (the substrate) constituting each wafer is treated as a defect in the chip or the substrate constituting another wafer to be stacked, and the yield of the wafer in the entire stack is a product (multiplication) of the yields of the wafers, resulting in yield deterioration and cost increase.

This will be described specifically and in detail with reference toFIG.7.FIG.7is a diagram for explaining a yield.

InFIG.7, in a solid-state imaging device700, among a sensor substrate (which may be a sensor chip)11including a solid-state imaging element, a memory circuit chip12including a memory circuit, and a logic circuit chip13including a logic circuit, which are formed on wafers W1to W3, a defective configuration is represented by being filled with a mesh. That is, inFIG.7, the wafer W1has defects in two sensor substrates11-1and11-2, the wafer W2has defects in two memory chips12-1and12-2, and the wafer W3has defects in two memory chips13-1and13-2.

As shown inFIG.7, defects that occur in the sensor substrate11, the memory circuit chip12, and the logic circuit chip formed on the wafers W1to W3do not necessarily occur at the same position. Therefore, as shown inFIG.7, in the solid-state imaging device700formed by being stacked, six defects (indicated by lla to110marked with a cross on the wafer W1occur.

As a result, with respect to the solid-state imaging device700having six defects, at least two of the three components, that is, the sensor substrate11, the memory circuit chip12, and the logic circuit chip13, are not defective, but each is treated as having six defects. Therefore, for each component, originally, the number of the yield is two, but the number of the yield becomes six after being multiplied by the number of wafers.

As a result, the yield of the solid-state imaging device700decreases and the manufacturing cost increases.

Another solution is a technology for connecting objects of different sizes to each other by forming bumps. Since chips of different sizes which are selected as non-defective products or the chip and the substrate of different sizes which are selected as non-defective products are connected to each other via the bumps, there is no influence on a profitability difference between the wafers and a yield of each chip or the substrate. However, since it is difficult to form small bumps and a connection pitch is limited, the number of connection terminals is not larger than that in the WoW technology. In addition, when the number of connection terminals is large, the cost increases due to the decrease in yield due to joining because the connection is made in a mounting process, and the connection in the mounting process is also joined individually, and thus the time is long and the process cost increases.

This will be described specifically and in detail with reference toFIG.8.FIG.8is a diagram showing a solid-state imaging device800formed by a bump connection.

As shown inFIG.8, after a sensor substrate800a, a memory circuit chip800b, and a logic circuit chip800cof different sizes are separated into individual pieces, only non-defective products are selectively arranged and connected to each other by forming bumps31.

In the solid-state imaging device800shown inFIG.8, from above (from a light incidence side), the on-chip lens131-1, the color filter131-2, and the sensor substrate800aare stacked, below them, the memory circuit chip800band the logic circuit chip800care stacked on the same layer, and below them, a support substrate132is provided to be stacked. The sensor substrate800aincludes the solid-state imaging element120and the wiring layer140, the memory circuit chip800bincludes the memory circuit121and the wiring layer141, and the logic circuit chip800cincludes the logic circuit122and the wiring layer142. The sensor substrate800a(the wiring layer140) and the memory circuit chip800b(the wiring layer141) are electrically connected to each other via bumps31-1and the sensor substrate800a(the wiring layer140) and the logic circuit chip800c(the wiring layer142) are electrically connected to each other via bumps31-2.

In the solid-state imaging device800ofFIG.8, the sensor substrate800aand the memory circuit chip800bof different sizes which are selected as non-defective products are connected to each other via bumps31-1, and the sensor substrate800aand the logic circuit chip800cof different sizes which are selected as non-defective products are connected to each other via the bumps31-2, and thus the influence on the profitability difference between the wafers and the yield of the substrate or each chip is reduced.

However, it is difficult to form the bumps31(the bumps31-1and the bumps31-2), and as shown inFIG.8, there is a limit in reducing a connection pitch d3. Therefore, it is not possible to make the connection pitch d3smaller than the connection pitch dl ofFIG.6in the case where the WoW technology is used.

Therefore, the solid-state imaging device800ofFIG.8stacked using the bumps31(the bumps31-1and the bumps31-2) cannot have a larger number of connection terminals than the solid-state imaging device6ofFIG.6which is stacked according to the WoW technology. Further, in the case of connection using the bumps as in the solid-state imaging device800ofFIG.8, when the number of connection terminals is large, the joining is performed in the mounting process, and thus the yield related to the joining decreases and the cost increases. Furthermore, since the bump connection in the mounting process is also an individual task, each process takes a long time and the process cost also increases.

As described above, the technology for connecting a high-speed transmission signal output from a solid-state imaging device having the high quality and high frame rate to a processing circuit in a subsequent stage such as a logic circuit or a memory circuit may be extremely costly.

Next, contamination of the circuit chips (the signal processing circuit chips) such as the memory circuit chip and the logic circuit chip joined (connected) to the sensor substrate during thin processing will be described with reference toFIG.9.FIG.9is a diagram for explaining contamination of the solid-state imaging device with contaminants (for example, dust, metal contaminants, and the like).

As shown inFIG.9(a), a sensor substrate900aincluding the solid-state imaging element120and the wiring layer140and a first chip900b(a memory circuit chip900binFIG.9) including a signal processing circuit (a memory circuit inFIG.9)121and the wiring layer141are electrically connected to each other, and the sensor substrate900aincluding the solid-state imaging element120and the wiring layer140and a second chip900c(a logic circuit chip900cinFIG.9) including a signal processing circuit (a logic circuit inFIG.9)122and the wiring layer142are electrically connected to each other.

Specifically, wirings120aformed in the wiring layer140of the sensor substrate900aand wirings121aformed in the wiring layer141of the memory circuit chip900bare electrically connected to each other by wirings134connected in Cu-Cu (copper-copper) connection, and the wirings120aformed in the wiring layer140of the sensor substrate900aand wirings122aformed in the wiring layer142of the logic circuit chip900care electrically connected to each other by the wirings134connected in Cu-Cu (copper-copper) connection.

As shown inFIG.9(b), from a second surface of the memory circuit chip900bopposite a first surface of the memory circuit chip900bon a side on which the memory circuit chip900bis stacked on the sensor substrate900aand a second surface of the logic circuit chip900copposite a first surface of the logic circuit chip900con a side on which the logic circuit chip900cis stacked on the sensor substrate900a, a semiconductor substrate that constitutes the memory circuit121and a semiconductor substrate that constitutes the logic circuit122are thinned and further flattened. In addition, thinning the semiconductor substrate that constitutes the memory circuit121and the semiconductor substrate that constitutes the logic circuit122means that the semiconductor substrate that constitutes the memory circuit121and the semiconductor substrate that constitutes the logic circuit122are scraped to reduce the thickness.

FIG.9(c)is an enlarged cross-sectional view of a portion P4b shown inFIG.9(b). Contaminants D (for example, dust and metal contaminants) may adhere to the logic chip100c(the logic circuit122and the wiring layer142), and it may not be possible to prevent contamination of the logic chip100c.

The present technology is contrived in view of the above-described circumstances. According to the present technology, by covering the chips with a protective film (for example, a SiN film) and thinning the chips after a chip-on-wafer (CoW) technology, it is possible to prevent contamination of each chip at the time of thinning.

The present technology mainly relates to a solid-state imaging device and a method of manufacturing a solid-state imaging device. The solid-state imaging device according to the present technology is a solid-state imaging device including: a sensor substrate having an imaging element that generates a pixel signal in a pixel unit; and at least one chip having a signal processing circuit necessary for signal processing of the pixel signal, wherein the sensor substrate and the at least one chip are electrically connected to and stacked on each other, and wherein a protective film (for example, a silicon nitride film) is formed on at least a part of a side surface of the at least one chip, the side surface being connected to a surface of the at least one chip on a side on which the at least one chip is stacked on the sensor substrate. Further, the method of manufacturing a solid-state imaging device according to the present technology is a method of manufacturing a solid-state imaging device including at least: stacking a sensor substrate having an imaging element that generates a pixel signal in a pixel unit and at least one chip having a signal processing circuit necessary for signal processing of the pixel signal to be electrically connected to each other; forming a protective film to cover the at least one chip after the stacking; and thinning the at least one chip from a second surface of the at least one chip opposite a first surface of the at least one chip on a side on which the at least one chip is stacked on the sensor substrate to remove the protective film on the second surface.

Hereinafter, preferred embodiments for implementing the present technology will be described in detail with reference to the drawings. The embodiments which will be described below show an example of a representative embodiment of the present technology, and the scope of the present technology should not be narrowly interpreted on the basis of this.

2. First Embodiment (Example 1 of Solid-state Imaging Device and Example 1 of Method of Manufacturing Solid-state Imaging Device)

A solid-state imaging device and a method of manufacturing a solid-state imaging device of a first embodiment according to the present technology (Example 1 of the solid-state imaging device and Example 1 of the method of manufacturing a solid-state imaging device) will be described with reference toFIGS.1to4.

First, description will be made usingFIG.1.FIG.1is a diagram for illustrating a solid-state imaging device and a method of manufacturing a solid-state imaging device of the first embodiment according to the present technology.

As shown inFIG.1(a), a sensor substrate100aincluding a solid-state imaging element120and a wiring layer140and a first chip100b(a memory circuit chip100binFIG.1) including a signal processing circuit (a memory circuit inFIG.1)121and a wiring layer141are electrically connected to each other, and the sensor substrate100aincluding the solid-state imaging element120and the wiring layer140and a second chip100c(a logic circuit chip100cinFIG.1) including a signal processing circuit (a logic circuit inFIG.1)122and a wiring layer142are electrically connected to each other.

Specifically, wirings120aformed in the wiring layer140of the sensor substrate100aand wirings121aformed in the wiring layer141of the memory circuit chip100bare electrically connected to each other by wirings134connected in Cu-Cu (copper-copper) connection, and the wirings120aformed in the wiring layer140of the sensor substrate100aand wirings122aformed in the wiring layer142of the logic circuit chip100care electrically connected to each other by the wirings134connected in Cu-Cu (copper-copper) connection.

Then, a protective film50(a SiN film50inFIG.1) is formed to cover the sensor substrate100a, the memory circuit chip100b, and the logic circuit chip100c. Although the SiN film50is used inFIG.1, as long as a material of the protective film50has an insulating property and functions as a stopper for contamination with contaminants such as metal contaminants and dust at the time of thinning, which will be described later, the material of the protective film50is not limited and may be anything.

A region (an opening) Ia that is on a side of the memory circuit chip100bstacked on the sensor substrate100a, on a side of the logic circuit chip100cstacked on the sensor substrate100a, and between the memory circuit chip100band the logic circuit chip100chas a rectangular shape in a cross-sectional view (in the region (the opening) Ia shown inFIG.1(a), a length of an upper side and a length of a lower side are substantially the same). The SiN film50is embedded in the region (the opening) Ia.

As shown inFIG.1(b), from a second surface of the memory circuit chip100bopposite a first surface of the memory circuit chip100bon a side on which the memory circuit chip100bis stacked on the sensor substrate100aand a second surface of the logic circuit chip100copposite a first surface of the logic circuit chip100con a side on which the logic circuit chip100cis stacked on the sensor substrate100a, a semiconductor substrate that constitutes the memory circuit121and a semiconductor substrate that constitutes the logic circuit122are thinned and further flattened, and the SiN films50on the second surface of the memory circuit chip100band on the second surface of the logic circuit chip100care removed. In addition, thinning the semiconductor substrate that constitutes the memory circuit121and the semiconductor substrate constituting the logic circuit122means that the semiconductor substrate that constitutes the memory circuit121and the semiconductor substrate that constitutes the logic circuit122are scraped to reduce the thickness.

Therefore, the SiN films50are formed on left and right side surfaces of the memory circuit chip100bconnected to the surface of the memory circuit chip100bon a side on which the memory circuit chip100bis stacked on the sensor substrate100aand on left and right side surfaces of the logic circuit chip100cconnected to the surface of the logic circuit chip100con a side on which the logic circuit chip100cis stacked on the sensor substrate100a. Then, the SiN film50is formed to cover the sensor substrate100ain a region which is on a side of the memory circuit chip100bon which the memory circuit chip100bis stacked on the sensor substrate100a, which is on a side of the logic circuit chip100con which the logic circuit chip100cis stacked on the sensor substrate100a, in which the sensor substrate100aand the memory circuit chip100bare not stacked on each other, and in which the sensor substrate100aand the logic circuit chip100care not stacked on each other.

The SiN film50is embedded in a region (an opening) Ib that is on a side of the memory circuit chip100bstacked on the sensor substrate100a, on a side of the logic circuit chip100cstacked on the sensor substrate100a, and between the memory circuit chip100band the logic circuit chip100c, and the region in which the SiN film50is formed has a rectangular shape in a cross-sectional view. That is, the SiN film50in the region (the opening) Ib includes a SiN film formed on the right side surface of the memory circuit chip100b, a SiN film formed on the left side surface of the logic circuit chip100c, and a SiN film formed to cover the sensor substrate100ain a region between the right side surface of the memory circuit chip100band the left surface of the logic circuit chip100c.

FIG.1(c)is a top view from a side of the logic circuit chip100c(the logic circuit122). As shown inFIG.1(c), the SiN film50is formed to cover an outer periphery of the logic circuit chip100cand can prevent contamination of the logic circuit chip100cat the time of thinning. Incidentally, although not shown, the same applies to the memory circuit chip100b, and the SiN film50is formed to cover the outer periphery of the memory circuit chip100band can prevent contamination of the memory circuit chip100bat the time of thinning.

FIG.1(d)is an enlarged cross-sectional view of a portion P5bshown inFIG.1(b). The SiN film50is formed on a left side surface S1and a right side surface S2of the logic circuit chip100c, and the SiN film50is formed to cover the wiring layer140and an insulating film140-1(for example, an oxide film) of the sensor substrate100a(inFIG.1(d), the SiN film50is formed on the wiring layer140and the insulating film140-1of the sensor substrate100a). Due to the formation of the SiN film50, the contaminants D (for example, dust and metal contaminants) on a right wall side of the opening Ic are kept away from the logic chip100cas shown with a direction of an arrow Q, and the contamination of the logic chip100cis prevented.

Next, description will be made usingFIG.2.FIG.2is a diagram for illustrating the solid-state imaging device and the method of manufacturing a solid-state imaging device of the first embodiment according to the present technology.

FIG.2(a)shows a state before a sensor substrate200aincluding a solid-state imaging element120and a wiring layer140and a first chip200b(a memory circuit chip200binFIG.2) including a signal processing circuit (a memory circuit inFIG.2)121and a wiring layer141are joined to each other in Cu-Cu (copper copper) joining and shows a state before the sensor substrate200aincluding the solid-state imaging element120and the wiring layer140and a second chip200c(a logic circuit chip200cinFIG.2) including a signal processing circuit (a logic circuit inFIG.2)122and a wiring layer142are joined to each other in Cu-Cu (copper-copper) joining. As shown inFIG.2(a), the sensor substrate200aand the memory circuit chip200bare joined to each other in a direction of an arrow R, and similarly, the sensor substrate200aand the logic circuit chip200care joined to each other in the direction of the arrow R.

As shown inFIG.2(b), the sensor substrate200aincluding the solid-state imaging element120and the wiring layer140and the first chip200b(the memory circuit chip200binFIG.2) including the signal processing circuit (the memory circuit inFIG.2)121and the wiring layer141are electrically connected to each other, and the sensor substrate200aincluding the solid-state imaging element120and the wiring layer140and the second chip200c(the logic circuit chip200cinFIG.2) including a signal processing circuit (the logic circuit inFIG.2)122and the wiring layer142are electrically connected to each other.

Specifically, wirings120aformed in the wiring layer140of the sensor substrate200aand wirings121aformed in the wiring layer141of the memory circuit chip200bare electrically connected to each other by wirings134connected in Cu-Cu (copper-copper) connection, and the wirings120aformed in the wiring layer140of the sensor substrate200aand wirings122aformed in the wiring layer142of the logic circuit chip100care electrically connected to each other by the wirings134connected in Cu-Cu (copper-copper) connection.

Then, after the sensor substrate200a, the memory circuit chip200b, and the logic chip200care joined to each other, the protective film50(the SiN film50inFIG.2) is formed to cover the sensor substrate100a, the memory circuit chip100b, and the logic circuit chip100c. The SiN film50may be formed in one-time film formation (one-time application) or may be formed in a plurality of times of film formation.

A region (an opening) Jb that is on a side of the memory circuit chip200bstacked on the sensor substrate200a, on a side of the logic circuit chip200cstacked on the sensor substrate200a, and between the memory circuit chip200band the logic circuit chip200chas a rectangular shape in a cross-sectional view (in the region (the opening) Jb shown inFIG.2(b), a length of an upper side and a length of a lower side are substantially the same). The SiN film50is embedded in the region (the opening) Jb.

As shown inFIG.2(c), from a second surface of the memory circuit chip200bopposite a first surface of the memory circuit chip200bon a side on which the memory circuit chip200bis stacked on the sensor substrate200aand a second surface of the logic circuit chip200copposite a first surface of the logic circuit chip200con a side on which the logic circuit chip200cis stacked on the sensor substrate200a, a semiconductor substrate that constitutes the memory circuit121and a semiconductor substrate that constitutes the logic circuit122are thinned, and the SiN films50on the second surface of the memory circuit chip200band on the second surface of the logic circuit chip200care removed. In addition, thinning the semiconductor substrate that constitutes the memory circuit121and the semiconductor substrate that constitutes the logic circuit122means that the semiconductor substrate that constitutes the memory circuit121and the semiconductor substrate that constitutes the logic circuit122are scraped to reduce the thickness.

Therefore, the SiN films50are formed on left and right side surfaces of the memory circuit chip200bconnected to the surface of the memory circuit chip200bon a side on which the memory circuit chip200bis stacked on the sensor substrate200aand on left and right side surfaces of the logic circuit chip200cconnected to the surface of the logic circuit chip200con a side on which the logic circuit chip200cis stacked on the sensor substrate200a. Then, the SiN film50is formed to cover the sensor substrate200ain a region which is on a side of the memory circuit chip200bon which the memory circuit chip200bis stacked on the sensor substrate200a, which is on a side of the logic circuit chip200con which the logic circuit chip200cis stacked on the sensor substrate200a, in which the sensor substrate200aand the memory circuit chip200bare not stacked on each other, and in which the sensor substrate200aand the logic circuit chip200care not stacked on each other.

The SiN film50is embedded in a region (an opening) Jc that is on a side of the memory circuit chip200bstacked on the sensor substrate200a, on a side of the logic circuit chip200cstacked on the sensor substrate200a, and between the memory circuit chip200band the logic circuit chip200c, and the region in which the SiN film50is formed has a rectangular shape in a cross-sectional view. That is, the SiN film50in the region (the opening) Jc includes a SiN film formed on the right side surface of the memory circuit chip200b, a SiN film formed on the left side surface of the logic circuit chip200c, and a SiN film formed to cover the sensor substrate200ain a region between the right side surface of the memory circuit chip200band the left surface of the logic circuit chip200c.

Finally, with reference toFIGS.3and4, the entire method of manufacturing a solid-state imaging device of the first embodiment according to the present technology will be described.

In a first step, as shown inFIG.3(a), the solid-state imaging element120(the sensor substrate) on the wafer is electrically inspected, and then the memory circuit121(the memory circuit chip) and logic circuit122(the logic circuit chip) which are confirmed to be good products are formed to have a predetermined layout, and the wirings134are formed at the terminals120aand121a. Further, the wirings134from the terminals121aof the memory circuit121and the terminals122aof the logic circuit122and the wirings134from the terminals120aof the solid-state imaging element120in the wafer are aligned to appropriately oppose each other and are connected to each other in Cu-Cu connection, and the opposing layers are joined to each other by forming an oxide film joining layer135by oxide film joining.

In a second step, as shown inFIG.3(b), a silicon layer (the semiconductor substrate) on an upper portion of each of the memory circuit121and the logic circuit122in the drawing is thinned to have a height that does not affect the characteristics of the device, an oxide film133that functions as an insulating film is formed, and the memory circuit chip having the memory circuit121and the logic chip having the logic circuit122, which are rearranged, are embedded. The steps shown inFIGS.2(a) to2(c)are inserted between the first step (FIG.3(a)) and the second step (FIG.3(b)), and the protective film (the SiN film)50is formed.

In a third step, as shown inFIG.3(c), the support substrate132is joined to the upper parts of the memory circuit121and the logic circuit122. At this time, the layers in which the support substrate132, the memory circuit121, and the logic circuit122oppose each other are joined to each other by forming the oxide film joining layer135by oxide film joining.

In a fourth step, as shown inFIG.4(a), the solid-state imaging element120is turned upside down to be on an upper side, and the silicon layer (the semiconductor substrate) which is an upper layer of the solid-state imaging element120in the drawing is thinned. Thinning the silicon layer (the semiconductor substrate) means cutting the silicon layer (the semiconductor substrate) to reduce the thickness.

In a fifth step, as shown inFIG.4(b), the on-chip lens131-1and the color filter131-2are provided on the solid-state imaging element120and are separated into individual pieces, and thus a solid-state imaging device400is completed. The SiN film50is formed to cover the left and right side surfaces of the memory circuit121(the memory circuit chip), the left and right side surfaces of the logic circuit122(the logic circuit chip), and the solid-state imaging element120(the sensor substrate) (inFIG.4(b), on the left and right side surfaces of the solid-state imaging element120(the sensor substrate) and in a downward direction therefrom).

The above-described contents of the solid-state imaging device according to the first embodiment (Example 1 of a solid-state imaging device) of the present technology can be applied to a solid-state imaging device according to a second embodiment of the present technology which will be described later, in particular unless there is a technical contradiction.

The solid-state imaging device of a second embodiment (Example 2 of the solid-state imaging device) according to the present technology will be described with reference toFIG.5.

FIG.5is a diagram for illustrating the solid-state imaging device and the method of manufacturing a solid-state imaging device of the second embodiment according to the present technology.

FIG.5(a)shows a state before a sensor substrate500aincluding a solid-state imaging element120and a wiring layer140and a first chip500b(a memory circuit chip500binFIG.5) including a signal processing circuit (a memory circuit inFIG.5)121and a wiring layer141are joined to each other in Cu-Cu (copper copper) joining and shows a state before the sensor substrate500aincluding the solid-state imaging element120and the wiring layer140and a second chip500c(a logic circuit chip500cinFIG.5) including a signal processing circuit (a logic circuit inFIG.5)122and a wiring layer142are joined to each other in Cu-Cu (copper-copper) joining. As shown inFIG.5(a), the sensor substrate500aand the memory circuit chip500bare joined to each other in a direction of an arrow R, and similarly, the sensor substrate500aand the logic circuit chip500care joined to each other in the direction of the arrow R.

As shown inFIG.5(a), the memory circuit chip500band the logic circuit chip500chave a tapered shape in a cross-sectional view (in each chip of the memory circuit chip500band the logic circuit chip500cshown inFIG.5(a), a length of an upper side is shorter than a length of a lower side).

As shown inFIG.5(b), the sensor substrate500aincluding the solid-state imaging element120and the wiring layer140and the first chip500b(the memory circuit chip500binFIG.5) including the signal processing circuit (the memory circuit inFIG.5)121and the wiring layer141are electrically connected to each other, and the sensor substrate500aincluding the solid-state imaging element120and the wiring layer140and the second chip500c(the logic circuit chip500cinFIG.5) including a signal processing circuit (the logic circuit inFIG.5)122and the wiring layer142are electrically connected to each other.

Specifically, wirings120aformed in the wiring layer140of the sensor substrate500aand wirings121aformed in the wiring layer141of the memory circuit chip500bare electrically connected to each other by wirings134connected in Cu-Cu (copper-copper) connection, and the wirings120aformed in the wiring layer140of the sensor substrate500aand wirings122aformed in the wiring layer142of the logic circuit chip500care electrically connected to each other by the wirings134connected in Cu-Cu (copper-copper) connection.

Then, after the sensor substrate500a, the memory circuit chip500b, and the logic chip500care joined to each other, the protective film50(the SiN film50inFIG.5) is formed to cover the sensor substrate500a, the memory circuit chip500b, and the logic circuit chip500c. The SiN film50may be formed in one-time film formation (one-time application) or may be formed in a plurality of times of film formation. Although the SiN film50is used inFIG.5, as long as a material of the protective film50has an insulating property and functions as a stopper for contamination with contaminants such as metal contaminants and dust at the time of thinning, which will be described later, the material of the protective film50is not limited and may be anything.

As described above, since the memory circuit chip500band the logic circuit chip500chave a tapered shape in a cross-sectional view, a region (an opening) Kb that is on a side of the memory circuit chip500bstacked on the sensor substrate500a, on a side of the logic circuit chip500cstacked on the sensor substrate500a, and between the memory circuit chip500band the logic circuit chip500chas a reversely tapered shape in a cross-sectional view (in the region (the opening) Kb shown inFIG.5(b), a length of an upper side is longer than a length of a lower side). The SiN film50is embedded in the region (the opening) Kb. Since the region (the opening) Kb has a reversely tapered shape in a cross-sectional view, the upper side of the region (the opening) Kb is more open, and the SiN film50is easily embedded.

As shown inFIG.5(c), from a second surface of the memory circuit chip500bopposite a first surface of the memory circuit chip500bon a side on which the memory circuit chip500bis stacked on the sensor substrate500aand a second surface of the logic circuit chip500copposite a first surface of the logic circuit chip500con a side on which the logic circuit chip500cis stacked on the sensor substrate500a, a semiconductor substrate that constitutes the memory circuit121and a semiconductor substrate that constitutes the logic circuit122are thinned, and the SiN films50on the second surface of the memory circuit chip500band on the second surface of the logic circuit chip500care removed. In addition, thinning the semiconductor substrate that constitutes the memory circuit121and the semiconductor substrate that constitutes the logic circuit122means that the semiconductor substrate that constitutes the memory circuit121and the semiconductor substrate that constitutes the logic circuit122are scraped to reduce the thickness.

Therefore, the SiN films50are formed on left and right side surfaces of the memory circuit chip500bconnected to the surface of the memory circuit chip500bon a side on which the memory circuit chip500bis stacked on the sensor substrate500aand on left and right side surfaces of the logic circuit chip500cconnected to the surface of the logic circuit chip500con a side on which the logic circuit chip500cis stacked on the sensor substrate500a. Then, the SiN film50is formed to cover the sensor substrate500ain a region which is on a side of the memory circuit chip500bon which the memory circuit chip500bis stacked on the sensor substrate500a, which is on a side of the logic circuit chip500con which the logic circuit chip500cis stacked on the sensor substrate500a, in which the sensor substrate500aand the memory circuit chip500bare not stacked on each other, and in which the sensor substrate500aand the logic circuit chip500care not stacked on each other.

The SiN film50is embedded in a region (an opening) Kc that is on a side of the memory circuit chip500bstacked on the sensor substrate500a, on a side of the logic circuit chip500cstacked on the sensor substrate500a, and between the memory circuit chip500band the logic circuit chip500c, and the region in which the SiN film50is formed has a reversely tapered shape in a cross-sectional view. That is, the SiN film50in the region (the opening) Kc includes a SiN film formed on the right side surface of the memory circuit chip500b, a SiN film formed on the left side surface of the logic circuit chip500c, and a SiN film formed to cover the sensor substrate500ain a region between the right side surface of the memory circuit chip500band the left surface of the logic circuit chip500c.

Then, as the entire method of manufacturing a solid-state imaging device of the second embodiment according to the present technology, the contents ofFIG.3andFIG.4in which the entire method of manufacturing a solid-state imaging device of the first embodiment according to the present technology has been described can be applied as they are.

The above-described contents of the solid-state imaging device according to the second embodiment (Example 2 of a solid-state imaging device) of the present technology can be applied to the above-described solid-state imaging device according to the first embodiment of the present technology, in particular unless there is a technical contradiction.

4. Third Embodiment (Example of Electronic Equipment)

Electronic equipment of a third embodiment according to the present technology is electronic equipment equipped with the solid-state imaging device of any one of the solid-state imaging devices of the first embodiment and the second embodiment according to the present technology.

5. Usage Example Solid-state Imaging Device to Which the Present Technology Is Applied

FIG.10is a diagram showing a usage example of the solid-state imaging devices of the first and second embodiments according to the present technology as an image sensor.

The above-described solid-state imaging devices according to the first and second embodiments can be used in various cases where light such as visible light, infrared light, ultraviolet light, and X rays is sensed as follows, for example. That is, as shown inFIG.10, the solid-state imaging device according to any one of the first and second embodiments can be used in devices (for example, the electronic equipment according to the third embodiment described above) which are used in, for example, a field of appreciation in which an image provided for appreciation is captured, a field of traffic, a field of home appliances, a field of medical treatment and health care, a field of security, a field of beauty, a field of sports, and a field of agriculture.

Specifically, in a field of appreciation, the solid-state imaging device according to any one of the first and second embodiments can be used in devices for capturing an image provided for appreciation such as a digital camera, a smartphone, and a mobile phone with a camera function, for example.

In a field of traffic, the solid-state imaging device according to any one of the first and second embodiments can be used in devices provided for traffic such as an in-vehicle sensor that images the front, rear, surroundings, inside, and the like of an automobile, a monitoring camera that monitors traveling vehicles and roads, and a distance measuring sensor that measures a distance between vehicles and the like for safe driving such as automatic stop, recognition of a driver's state, and the like, for example.

In a field of home appliances, the solid-state imaging device according to any one of the first and second embodiments can be used in devices provided for home appliances such as a television receiver, a refrigerator, and an air conditioner, for example, in order to image a user's gesture and operate equipment in response to the gesture.

In a field of medical treatment and health care, the solid-state imaging device according to any one of the first and second embodiments can be used in devices provided for medical treatment and health care such as an endoscope and a device that performs angiography by receiving infrared light, for example.

In a field of security, the solid-state imaging device according to any one of the first and second embodiments can be used in devices provided for security such as a surveillance camera for crime prevention and a camera for person authentication, for example.

In a field of beauty, the solid-state imaging device according to any one of the first and second embodiments can be used in devices provided for beauty such as a skin measuring instrument that images the skin and a microscope that images the scalp, for example.

In a field of sports, the solid-state imaging device according to any one of the first and second embodiments can be used in devices provided for sports such as an action camera and a wearable camera for sports applications, for example.

In a field of agriculture, the solid-state imaging device according to any one of the first and second embodiments can be used in devices provided for agriculture such as a camera that monitors the conditions of fields and crops, for example.

Next, the usage examples of the solid-state imaging devices according to the first and second embodiments of the present technology will be specifically described. For example, as a solid-state imaging device101, the solid-state imaging device according to any one of the first and second embodiments described above can be applied to any type of electronic equipment equipped with an imaging function, for example, a camera system such as a digital still camera or a video camera, a mobile phone having an imaging function, and the like. As an example, a schematic configuration of electronic equipment102(a camera) is shown inFIG.11. The electronic equipment102is, for example, a video camera that can capture a still image or a moving image and includes the solid-state imaging device101, an optical system (an optical lens)310, a shutter device311, a drive unit313that drives the solid-state imaging device101and the shutter device311, and a signal processing unit312.

The optical system310guides image light (incident light) from a subject to a pixel portion101aof the solid-state imaging device101. This optical system310may be constituted by a plurality of optical lenses. The shutter device311controls a light irradiation period and a light shielding period for the solid-state imaging device101. The drive unit313controls a transfer operation of the solid-state imaging device101and a shutter operation of the shutter device311. The signal processing unit312performs various types of signal processing on signals output from the solid-state imaging device101. A video signal Dout after signal processing is stored in a storage medium such as a memory or is output to a monitor or the like.

6. Application Example to Endoscopic Surgery System

The present technology can be applied to various products. For example, the technology according to the present disclosure (the present technology) may be applied to an endoscopic surgery system.

FIG.12is a diagram showing an example of a schematic configuration of an endoscopic surgery system to which the technology according to the present disclosure (the present technology) can be applied.

FIG.12shows a state where a surgeon (a doctor)11131is performing a surgical operation on a patient11132on a patient bed11133using an endoscopic surgery system11000. As shown in the drawing, the endoscopic surgery system11000includes an endoscope11100, other surgical instruments11110such as a pneumoperitoneum tube11111and an energized treatment tool11112, a support arm device11120that supports the endoscope11100, and a cart11200equipped with various devices for endoscopic surgery.

The endoscope11100includes a lens barrel11101, a region of which having a predetermined length from a distal end is inserted into a body cavity of the patient11132and a camera head11102connected to a proximal end of the lens barrel11101. Although the endoscope11100configured as a so-called rigid mirror having the rigid lens barrel11101is shown in the shown example, the endoscope11100may be configured as a so-called flexible mirror having a flexible lens barrel.

An opening in which an objective lens is fitted is provided at the distal end of the lens barrel11101. A light source device11203is connected to the endoscope11100, and light generated by the light source device11203is guided to the distal end of the lens barrel by a light guide extending inside the lens barrel11101and is radiated toward the observation target in the body cavity of the patient11132via the objective lens. The endoscope11100may be a direct-viewing endoscope or may be a perspective endoscope or a side-viewing endoscope.

An optical system and an imaging element are provided inside the camera head11102, and the reflected light (observation light) from the observation target converges on the imaging element by the optical system. The observation light is photoelectrically converted by the imaging element, and an electrical signal corresponding to the observation light, that is, an image signal corresponding to an observation image is generated. The image signal is transmitted as RAW data to a camera control unit (CCU)11201.

The CCU11201is constituted by a central processing unit (CPU), a graphics processing unit (GPU), and the like and comprehensively controls the operation of the endoscope11100and a display device11202. In addition, the CCU11201receives an image signal from the camera head11102and performs various types of image processing for displaying an image based on the image signal, for example, development processing (demosaic processing) on the image signal.

The display device11202displays an image based on an image signal having been subjected to image processing by the CCU11201under the control of the CCU11201.

The light source device11203is constituted by, for example, a light source such as a light emitting diode (LED) and supplies radiation light at the time of imaging a surgical site or the like to the endoscope11100.

An input device11204is an input interface for the endoscopic surgery system11000. The user can input various types of information or instructions to the endoscopic surgery system11000via the input device11204. For example, the user inputs an instruction to change imaging conditions (a type of radiation light, a magnification, a focal length, or the like) of the endoscope11100.

A treatment tool control device11205controls the driving of the energized treatment tool11112for cauterizing or incising tissue, sealing a blood vessel, or the like. In order to secure a field of view of the endoscope11100and secure an operation space of the surgeon, a pneumoperitoneum device11206sends gas into the body cavity of the patient11132via the pneumoperitoneum tube11111in order to inflate the body cavity. A recorder11207is a device that can record various types of information related to surgery. A printer11208is a device that can print various types of information related to surgery in various formats such as text, images and graphs.

The light source device11203that supplies the endoscope11100with the radiation light for imaging the surgical site can be configured of, for example, an LED, a laser light source, or a white light source configured of a combination thereof. When a white light source is formed by a combination of RGB laser light sources, it is possible to control an output intensity and an output timing of each color (each wavelength) with high accuracy, and thus the light source device11203can adjust white balance of the captured image. Further, in this case, laser light from each of the respective RGB laser light sources is radiated to the observation target in a time division manner, and driving of the imaging element of the camera head11102is controlled in synchronization with radiation timing such that images corresponding to respective RGB can be captured in a time division manner. According to this method, it is possible to obtain a color image without providing a color filter to the imaging element.

Further, the driving of the light source device11203may be controlled to change the intensity of output light at predetermined time intervals. The driving of the imaging element of the camera head11102is controlled in synchronization with the timing of the change in the light intensity to acquire an image in a time division manner, and the image is synthesized, whereby it is possible to generate a so-called image in a high dynamic range without underexposure or overexposure.

In addition, the light source device11203may have a configuration in which light in a predetermined wavelength band corresponding to special light observation can be supplied. In the special light observation, for example, by emitting light in a band narrower than that of radiation light (that is, white light) during normal observation using wavelength dependence of light absorption in a body tissue, so-called narrow band light observation (narrow band imaging) in which a predetermined tissue such as a blood vessel in a mucous membrane surface layer is imaged with a high contrast is performed. Alternatively, in the special light observation, fluorescence observation in which an image is obtained by fluorescence generated by emitting excitation light may be performed. The fluorescence observation can be performed by emitting excitation light to a body tissue and observing fluorescence from the body tissue (autofluorescence observation), or locally injecting a reagent such as indocyanine green (ICO) to a body tissue and emitting excitation light corresponding to a fluorescence wavelength of the reagent to the body tissue to obtain a fluorescence image. The light source device11203may have a configuration in which narrow band light and/or excitation light corresponding to such special light observation can be supplied.

FIG.13is a block diagram showing an example of a functional configuration of the camera head11102and the CCU11201shown inFIG.12.

The camera head11102includes a lens unit11401, an imaging unit11402, a drive unit11403, a communication unit11404, and a camera head control unit11405. The CCU11201includes a communication unit11411, an image processing unit11412, and a control unit11413. The camera head11102and the CCU11201are connected to each other such that they can communicate with each other via a transmission cable11400.

The lens unit11401is an optical system provided at a portion for connection to the lens barrel11101. Observation light taken from the tip of the lens barrel11101is guided to the camera head11102and is incident on the lens unit11401. The lens unit11401is constituted by a combination of a plurality of lenses including a zoom lens and a focus lens.

The imaging unit11402is constituted by an imaging element. The imaging element constituting the imaging unit11402may be one element (a so-called single plate type) or a plurality of elements (a so-called multi-plate type). When the imaging unit11402is configured as a multi-plate type, for example, image signals corresponding to RGB are generated by the imaging elements, and a color image may be obtained by synthesizing the image signals. Alternatively, the imaging unit11402may be configured to include a pair of imaging elements for acquiring image signals for the right eye and the left eye corresponding to three-dimensional (3D) display. When3D display is performed, the surgeon11131can ascertain the depth of biological tissues in the surgical site more accurately. Here, when the imaging unit11402is configured as a multi-plate type, a plurality of lens units11401may be provided according to the imaging elements.

Further, the imaging unit11402may not necessarily be provided in the camera head11102. For example, the imaging unit11402may be provided immediately after the objective lens inside the lens barrel11101.

The drive unit11403is constituted by an actuator and moves the zoom lens and the focus lens of the lens unit11401by a predetermined distance along an optical axis under the control of the camera head control unit11405. Thereby, the magnification and the focus of the image captured by the imaging unit11402can be appropriately adjusted.

The communication unit11404is constituted by a communication device for transmitting or receiving various types of information to or from the CCU11201. The communication unit11404transmits the image signal obtained from the imaging unit11402as RAW data to the CCU11201via the transmission cable11400.

In addition, the communication unit11404receives a control signal for controlling driving of the camera head11102from the CCU11201and supplies the control signal to the camera head control unit11405. The control signal includes, for example, information on the imaging conditions such as information indicating that the frame rate of the captured image is designated, information indicating that the exposure value at the time of imaging is designated, and/or information indicating that the magnification and the focus of the captured image are designated.

The imaging conditions such as the frame rate, the exposure value, the magnification, and the focus may be appropriately designated by the user, or may be automatically set by the control unit11413of the CCU11201on the basis of the acquired image signal. In the latter case, a so-called auto exposure (AE) function, a so-called auto focus (AF) function, and a so-called auto white balance (AWB) function are provided in the endoscope11100.

The camera head control unit11405controls the driving of the camera head11102on the basis of the control signal from the CCU11201received via the communication unit11404.

The communication unit11411is constituted by a communication device for transmitting and receiving various types of information to and from the camera head11102. The communication unit11411receives the image signal transmitted from the camera head11102via the transmission cable11400.

In addition, the communication unit11411transmits a control signal for controlling the driving of the camera head11102to the camera head11102. The image signal or the control signal can be transmitted through electric communication, optical communication, or the like.

The image processing unit11412performs various types of image processing on the image signal which is the RAW data transmitted from the camera head11102.

The control unit11413performs various kinds of control regarding the imaging of the surgical site or the like using the endoscope11100and a display of a captured image obtained by imaging the surgical site or the like. For example, the control unit11413generates the control signal for controlling the driving of the camera head11102.

Further, the control unit11413causes the display device11202to display the captured image obtained by imaging the surgical site or the like on the basis of the image signal having subjected to the image processing by the image processing unit11412. In this case, the control unit11413may recognize various objects in the captured image using various image recognition technologies. For example, the control unit11413can recognize surgical instruments such as forceps, a specific biological part, bleeding, mist when the energized treatment tool11112is used, and the like by detecting the edge shape and color of the object included in the captured image. When the control unit11413causes the display device11202to display the captured image, it may cause various types of surgical support information to be superimposed and displayed with the image of the surgical site using the recognition result. When the surgical support information is superimposed and displayed and is presented to the surgeon11131, it is possible to reduce the burden on the surgeon11131, and the surgeon11131can reliably proceed the surgery.

The transmission cable11400connecting the camera head11102and the CCU11201to each other is an electric signal cable that deals with electric signal communication, an optical fiber that deals with optical communication, or a composite cable thereof.

Here, in the example shown in the drawing, communication is performed in a wired manner using the transmission cable11400, but communication between the camera head11102and the CCU11201may be performed in a wireless manner.

The example of the endoscopic surgery system to which the technology according to the present disclosure can be applied has been described above. The technology according to the present disclosure can be applied to the endoscope11100, the camera head11102(the imaging unit11402thereof), or the like among the configurations described above. Specifically, the solid-state imaging device111of the present disclosure can be applied to the imaging unit10402. By applying the technology according to the present disclosure to the endoscope11100, the camera head11102(the imaging unit11402thereof), or the like, it is possible to improve the quality and reliability of the endoscope11100, the camera head11102(the imaging unit11402thereof), or the like.

While the endoscopic surgery system has been described here as an example, the technology according to the present disclosure may be applied to other systems, for example, a microscopic surgery system.

7. Application Example to Moving Body

The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be realized as a device equipped in any type of moving body such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, a personal mobility device, an airplane, a drone, a ship, and a robot.

FIG.14is a block diagram showing a schematic configuration example of a vehicle control system which is an example of a moving body control system to which the technology according to the present disclosure can be applied.

The vehicle control system12000includes a plurality of electronic control units connected thereto via a communication network12001. In the example illustrated inFIG.14, the vehicle control system12000includes a drive system control unit12010, a body system control unit12020, a vehicle exterior information detection unit12030, a vehicle interior information detection unit12040, and an integrated control unit12050. In addition, as a functional configuration of the integrated control unit12050, a microcomputer12051, an audio and image output unit12052, and an in-vehicle network interface (I/F)12053are shown.

The drive system control unit12010controls operations of devices related to a drive system of a vehicle according to various programs. For example, the drive system control unit12010functions as a control device such as a driving force generation device for generating a driving force of a vehicle such as an internal combustion engine or a driving motor, a driving force transmission mechanism for transmitting a driving force to wheels, a steering mechanism for adjusting a turning angle of a vehicle, and a braking device for generating a braking force of a vehicle.

The body system control unit12020controls operations of various devices mounted in the vehicle body according to various programs. For example, the body system control unit12020functions as a control device of a keyless entry system, a smart key system, a power window device, or various lamps such as a headlamp, a back lamp, a brake lamp, a turn signal, and a fog lamp. In this case, radio waves transmitted from a portable device that substitutes for a key or signals of various switches may be input to the body system control unit12020. The body system control unit12020receives inputs of the radio waves or signals and controls a door lock device, a power window device, and a lamp of the vehicle.

The vehicle exterior information detection unit12030detects information on the outside of the vehicle equipped with the vehicle control system12000. For example, an imaging unit12031is connected to the vehicle exterior information detection unit12030. The vehicle exterior information detection unit12030causes the imaging unit12031to capture an image of the outside of the vehicle and receives the captured image. The vehicle exterior information detection unit12030may perform object detection processing or distance detection processing for peoples, cars, obstacles, signs, and letters on the road on the basis of the received image.

The imaging unit12031is an optical sensor that receives light and outputs an electrical signal according to the amount of the received light. The imaging unit12031can also output the electrical signal as an image or ranging information. In addition, the light received by the imaging unit12031may be visible light or invisible light such as infrared light.

The vehicle interior information detection unit12040detects information on the inside of the vehicle. For example, a driver state detection unit12041that detects a driver's state is connected to the vehicle interior information detection unit12040. The driver state detection unit12041includes, for example, a camera that captures an image of a driver, and the vehicle interior information detection unit12040may calculate a degree of fatigue or concentration of the driver or may determine whether or not the driver is dozing on the basis of detection information input from the driver state detection unit12041.

The microcomputer12051can calculate a control target value of the driving force generation device, the steering mechanism, or the braking device on the basis of the information on the outside and the inside of the vehicle acquired by the vehicle exterior information detection unit12030and the vehicle interior information detection unit12040and output a control command to the drive system control unit12010. For example, the microcomputer12051can perform cooperative control for the purpose of realizing functions of an advanced driver assistance system (ADAS) including collision avoidance or impact mitigation of a vehicle, following traveling based on inter-vehicle distance, vehicle speed maintenance driving, vehicle collision warning, vehicle lane deviation warning, or the like.

Further, the microcomputer12051can perform cooperative control for the purpose of automated driving or the like in which autonomous travel is performed without depending on operations of the driver by controlling the driving force generation device, the steering mechanism, the braking device, or the like on the basis of information on the surroundings of the vehicle acquired by the vehicle exterior information detection unit12030or the vehicle interior information detection unit12040.

In addition, the microcomputer12051can output a control command to the body system control unit12020on the basis of the information on the outside of the vehicle acquired by the vehicle exterior information detection unit12030. For example, the microcomputer12051can perform cooperative control for the purpose of preventing glare, such as switching from a high beam to a low beam, by controlling the headlamp according to the position of a preceding vehicle or an oncoming vehicle detected by the vehicle exterior information detection unit12030.

The audio and image output unit12052transmits an output signal of at least one of an audio and an image to an output device capable of visually or audibly notifying an occupant of a vehicle or the outside of the vehicle of information. In the example ofFIG.14, an audio speaker12061, a display unit12062, and an instrument panel12063are illustrated as the output device. The display unit12062may include, for example, at least one of an onboard display and a head-up display.

FIG.15is a diagram showing an example of an installation position of the imaging unit12031.

The imaging units12101,12102,12103,12104, and12105may be provided at positions such as a front nose, side-view mirrors, a rear bumper, a back door, and an upper portion of a windshield in a vehicle interior of the vehicle12100, for example. The imaging unit12101provided on the front nose and the imaging unit12105provided in the upper portion of the windshield in the vehicle interior mainly acquire images of a side in front of the vehicle12100. The imaging units12102and12103provided on the side-view mirrors mainly acquire images of lateral sides from the vehicle12100. The imaging unit12104provided on the rear bumper or the back door mainly acquires images of a side behind the vehicle12100. The images of a side in front of the vehicle which are acquired by the imaging units12101and12105are mainly used for detection of preceding vehicles, pedestrians, obstacles, traffic signals, traffic signs, lanes, and the like.

FIG.15shows an example of imaging ranges of the imaging units12101to12104. An imaging range12111indicates the imaging range of the imaging unit12101provided at the front nose, imaging ranges12112and12113respectively indicate the imaging ranges of the imaging units12102and12103provided at the side-view mirrors, and an imaging range12114indicates the imaging range of the imaging unit12104provided at the rear bumper or the back door. For example, a bird's-eye view image of the vehicle12100as viewed from above can be obtained by superimposition of image data captured by the imaging units12101to12104.

For example, the microcomputer12051can extract, particularly, a closest three-dimensional object on a path along which the vehicle12100is traveling, which is a three-dimensional object traveling at a predetermined speed (for example, 0 km/h or higher) in the substantially same direction as the vehicle12100, as a preceding vehicle by acquiring a distance to each of three-dimensional objects in the imaging ranges12111to12114and temporal change in the distance (a relative speed with respect to the vehicle12100) on the basis of the distance information obtained from the imaging units12101to12104. Further, the microcomputer12051can set an inter-vehicle distance which should be secured in front of the vehicle in advance with respect to the preceding vehicle and can perform automated brake control (also including following stop control) or automated acceleration control (also including following start control). In this way, it is possible to perform cooperative control for the purpose of automated driving or the like in which a vehicle autonomously travels without depending on operations of the driver.

For example, the microcomputer12051can classify and extract three-dimensional object data regarding three-dimensional objects into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, and other three-dimensional objects such as utility poles on the basis of the distance information obtained from the imaging units12101to12104and can use the three-dimensional object data for automatic avoidance of obstacles. For example, the microcomputer12051identifies obstacles in the vicinity of the vehicle12100into obstacles that can be visually recognized by the driver of the vehicle12100and obstacles that are difficult to be visually recognized by the driver. Then, the microcomputer12051can determine a risk of collision indicating the degree of risk of collision with each obstacle and can perform driving assistance for collision avoidance by outputting a warning to the driver through the audio speaker12061or the display unit12062and performing forced deceleration or avoidance steering through the drive system control unit12010when the risk of collision has a value equal to or greater than a set value and there is a possibility of collision.

At least one of the imaging units12101to12104may be an infrared camera that detects infrared rays. For example, the microcomputer12051can recognize a pedestrian by determining whether there is a pedestrian in the captured images of the imaging units12101to12104. Such pedestrian recognition is performed by, for example, a procedure in which feature points in the captured images of the imaging units12101to12104as infrared cameras are extracted and a procedure in which pattern matching processing is performed on a series of feature points indicating the outline of the object and it is determined whether the object is a pedestrian. When the microcomputer12051determines that there is a pedestrian in the captured images of the imaging units12101to12104, and the pedestrian is recognized, the audio and image output unit12052controls the display unit12062such that the recognized pedestrian is superimposed and displayed with a square contour line for emphasis. In addition, the audio and image output unit12052may control the display unit12062such that an icon or the like indicating a pedestrian is displayed at a desired position.

An example of the vehicle control system to which the technology according to the present disclosure (the present technology) can be applied has been described above. The technology according to the present disclosure may be applied, for example, to the imaging unit12031or the like among the configurations described above. Specifically, the solid-state imaging device111of the present disclosure can be applied to the imaging unit12031. By applying the technology according to the present disclosure to the imaging unit12031, it is possible to improve the quality and reliability of the imaging unit12031.

The present technology are not limited to the above-described embodiments, usage examples, and application examples, and various changes can be made without departing from the gist of the present technology.

Furthermore, the effects described in the present specification are merely exemplary and not intended to be limited, and other effects may be provided as well.

In addition, the present technology can also adopt the following configurations.

a sensor substrate having an imaging element that generates a pixel signal in a pixel unit; and

at least one chip having a signal processing circuit necessary for signal processing of the pixel signal,

wherein the sensor substrate and the at least one chip are electrically connected to and stacked on each other, and

wherein a protective film is formed on at least a part of a side surface of the at least one chip, the side surface being connected to a surface of the at least one chip on a side on which the at least one chip is stacked on the sensor substrate.

[2] The solid-state imaging device according to [1], wherein the protective film is formed to cover the sensor substrate in a region which is on a side of the at least one chip on which the at least one chip is stacked on the sensor substrate and in which the sensor substrate and the at least one chip are not stacked on each other.

[3] The solid-state imaging device according to [1] or [2], wherein the protective film is formed to cover an outer periphery of the at least one chip in a plan view from a side of the at least one chip.

wherein the at least one chip is constituted by a first chip and a second chip,

wherein the first chip and the sensor substrate are electrically connected to and stacked on each other,

wherein the second chip and the sensor substrate are electrically connected to and stacked on each other,

wherein a protective film is formed on at least a part of a side surface of the first chip, the side surface being connected to a surface of the first chip on a side on which the first chip is stacked on the sensor substrate, and

wherein a protective film is formed on at least a part of a side surface of the second chip, the side surface being connected to a surface of the second chip on a side on which the second chip is stacked on the sensor substrate.

[5] The solid-state imaging device according to [4],

wherein the first chip and the second chip are stacked in the same direction on the sensor substrate, and

wherein the protective film is formed to cover the sensor substrate in a region which is on a side of the first chip on which the first chip is stacked on the sensor substrate, which is on a side of the second chip on which the second chip is stacked on the sensor substrate, in which the sensor substrate and the first chip are not stacked on each other, and in which the sensor substrate and the second chip are not stacked on each other.

[6] The solid-state imaging device according to [4] or [5],

wherein the first chip and the second chip are stacked in the same direction on the sensor substrate, and

wherein the protective film is formed to cover an outer periphery of the first chip and an outer periphery of the second chip in a plan view from a side of the first chip and a side of the second chip.

[7] The solid-state imaging device according to any one of [4] to [6],

wherein the first chip and the second chip are stacked in the same direction on the sensor substrate,

wherein the protective film is formed in a region which is on a side of the first chip on which the first chip is stacked on the sensor substrate, which is on a side of the second chip on which the second chip is stacked on the sensor substrate, and which is between the first chip and the second chip, and

wherein the region on which the protective film is formed is rectangular in a cross-sectional view from a side of the first chip and a side of the second chip.

[8] The solid-state imaging device according to any one of [4] to [6],

wherein the first chip and the second chip are stacked in the same direction on the sensor substrate,

wherein the protective film is formed in a region which is on a side of the first chip on which the first chip is stacked on the sensor substrate, which is on a side of the second chip on which the second chip is stacked on the sensor substrate, and which is between the first chip and the second chip, and

wherein the region on which the protective film is formed has a reversely tapered shape in a cross-sectional view from a side of the first chip and a side of the second chip.

[9] The solid-state imaging device according to any one of [1] to [8], wherein the protective film is formed by a single film formation.

[10] The solid-state imaging device according to any one of [1] to [9], wherein the protective film contains a material having an insulating property.

[11] The solid-state imaging device according to any one of [1] to [10], wherein the protective film contains silicon nitride.

[12] Electronic equipment equipped with the solid-state imaging device according to any one of [1] to [11].

[13] A method of manufacturing a solid-state imaging device including at least: stacking a sensor substrate having an imaging element that generates a pixel signal in a pixel unit and at least one chip having a signal processing circuit necessary for signal processing of the pixel signal to be electrically connected to each other;

forming a protective film to cover the at least one chip after the stacking; and

thinning the at least one chip from a second surface of the at least one chip opposite a first surface of the at least one chip on a side on which the at least one chip is stacked on the sensor substrate to remove the protective film on the second surface.

[14] The method of manufacturing a solid-state imaging device according to [13], including forming the protective film to cover the at least one chip and the sensor substrate after the stacking.

REFERENCE SIGNS LIST

400,600,700,800Solid-state imaging device