Adapter to concatenate connectors

Examples disclosed herein involve a first connector that facilitates access to a system, a second connector that facilitates access to the same system, and an adapter controller to facilitate concatenating functionality of the first connector and the second connector when the apparatus is communicatively coupled to the system via the first connector and the second connector; and establish a high speed connection between the system and the apparatus via the first connector and the second connector.

CROSS-REFERENCE TO RELATED APPLICATION

This application is a U.S. National Stage Application of and claims priority to International Patent Application No. PCT/US2015/010229, filed on Jan. 6, 2015, and entitled “ADAPTER TO CONCATENATE CONNECTORS.”

BACKGROUND

Users may connect peripheral devices (e.g., storage devices, input/output (I/O) devices, printers, digital cameras, wireless antennas, etc.) to computing systems to expand the functionality of the computing system or facilitate interaction with the peripheral devices. There are a variety of connection interfaces and protocols that may be used to establish a connection between a peripheral device and a computing device. Example connections/connectors include universal serial bus (USB), display port, serial port, M.2 (Next generation form factor (NGFF)), peripheral component interconnect (PCI), peripheral component interconnect express (PCIe), Thunderbolt™, Lightning™, etc.

Wherever possible, the same or similar reference numbers will be used throughout the drawing(s) and accompanying written description to refer to the same or like parts. As used in this patent, stating that any part (e.g., a layer, film, area, or plate) is in any way positioned on (e.g., positioned on, located on, disposed on, or formed on, etc.) another part, means that the referenced part is either in contact with the other part, or that the referenced part is above the other part with at least one intermediate part located therebetween. Stating that any part is in contact with another part means that there is no intermediate part between the two parts. As used in this patent, stating that any device is connected to another device means that the devices are communicatively coupled with one another, for example, through a wired connection or wired communication link.

DETAILED DESCRIPTION

Examples disclosed herein involve an adapter to concatenate resources or functionality of connectors of a system. An example connection adapter involved herein may be connected to a computing device (e.g., a computer, a server, a mobile device, etc.) via a plurality of connectors (e.g., two, three, four, etc.) and a peripheral device. The example connection adapter, in accordance with aspects of this disclosure, facilitates establishing a high speed connection or communication link between the computing device and the peripheral device using the plurality of connectors. As used herein, a communication link or connection may be direct (without intermediate component(s), element(s), or device(s) or indirect (with intermediate component(s), element(s), or device(s)).

Many computing devices include a hardware design that is not flexible. In other words, the types of peripheral devices that can connect to the computing device is defined by the hardware design (e.g., the types of connectors included on the computing device). Accordingly, it may be difficult for users to take advantage of opportunities to expand the capabilities of the computing device because of a number or type of peripheral devices that may be connected to the computing device can be limited (due to the hardware design of the devices). Furthermore, it may not be possible to access the computing device via a high speed connection as individual connectors in the hardware design of the computing device may not have the bandwidth or speed capabilities demanded by certain peripheral devices. Examples disclosed herein disclose a connection adapter to facilitate high speed access to a computing platform for a peripheral device by concatenating resources or functionality of multiple connectors of the computing device. In some examples, the connection adapter may have capabilities of connecting to a plurality of types of peripheral devices (e.g., universal serial bus (USB), serial attached SCSI (SAS) device (where SCSI stands for small computer system interface), serial advanced technology attachment (SATA) device, a Thunderbolt™ device, a Lightning™ device, a flexible wireless device (e.g., wireless display (Wi-Di) device, wireless local area network (WLAN) device, wireless USB device, etc.).

An example apparatus disclosed herein includes a first connector that facilitates access to a system, a second connector that facilitates access to the same system, and an adapter controller to facilitate concatenating functionality of the first connector and the second connector when the apparatus is communicatively coupled to the system via the first connector and the second connector and to establish a high speed connection between the system and the apparatus via the first connector and the second connector. An example method includes identifying a first connection from a connection adapter to a peripheral device; identifying a second connection from the connection adapter to a system platform, the second connection established via a first connector of the system platform and a second connector of the system platform; and instructing the system platform to concatenate resources of the first connector and resources of the second connector such that the concatenated resources provide a high speed connection to the peripheral device via the connection adapter. An example computing platform may concatenate resources of a first connector and a second connector in response to receiving information (e.g., identification information, instructions, etc.) from a connection adapter by adjusting flexible input/output lanes connected to the first connector and the second connector; and establish a high speed communication link using the concatenated resources with a peripheral device via the adapter through the first connector and the second connector.

FIG. 1is a schematic diagram of an example peripheral connection system100including a connection adapter110that may be implemented in accordance with an aspect of this disclosure. In the illustrated example ofFIG. 1, the connection adapter110is connected to a computing platform120and a peripheral device130. InFIG. 1, the connection adapter110is connected to the computing platform via a first connection140and a second connection150in accordance with the teachings of this disclosure. The example first and second connections140,150may be any wired connection to the computing platform via any type of connector of the computing platform. Further, the connection adapter110is connected to the peripheral device130via the peripheral connection160. In the illustrated example ofFIG. 1, the connection adapter110facilitates a high speed connection between the peripheral device130and the computing platform120. Accordingly, the peripheral device130may access the computing platform120using high speed connection resources provided via the first and second connections140,150.

The example computing platform120ofFIG. 1may be any type of system or computing device, such as a personal computer (PC), laptop computer, tablet computer, server, etc. In the illustrated example ofFIG. 1, the computing platform120includes a platform controller122, a switch architecture124, a first platform connector126, and a second platform connector128. The example platform controller122may include any number of processors, controllers, etc. that control the computing platform120. For example, the platform controller122may include a central processing unit (CPU), an I/O hub (e.g., a platform controller hub (PCH)), a graphics controller module (GFX), etc. The platform controller122may control any operations of the computing platform (e.g., display, communications, processing, data retrieval, data storage, etc.).

In examples disclosed herein, the platform controller122facilitates connection to the connection adapter110via the first platform connector126and the second platform connector128. Furthermore, in examples disclosed herein, the platform controller122may control the switch architecture124to provide adequate resources to the connection adapter110or the peripheral device130via the first and second platform connectors126,128. The example platform controller130may control the switch architecture124in response to information (e.g. detection signals, identification information indicating a type of device connected to the connectors126,128, etc.) received from the connection adapter110or the peripheral device130. In some examples, the switch architecture124may be controlled by the connection adapter110via general purpose input/output (GPIO) lines or other mechanisms. Accordingly, the example platform controller122or connection adapter110ofFIG. 1may adjust the switch architecture124to enable access to control circuitry (e.g., CPU, PCH, GFX, etc.) of the platform controller122to facilitate a high speed connection or increased bandwidth/performance of a communication link established via the first and second platform connectors126,128(e.g., a communication link with the connection adapter110or the peripheral device130). For example, the platform controller122may concatenate resources or functionality of the computing platform120or the first and second platform connectors126,128to facilitate or establish the high speed connection.

The example switch architecture124may include any number of communication buses, multiplexers, demultiplexers, switches, etc. to facilitate communication or connections between the first and second platform connectors126,128and the platform controller122. In some examples, the computing platform120may not include the switch architecture124, and the platform controller122is directly connected to the first and second platform connectors126,128. In some examples, the switch architecture124includes a plurality of flexible input/output (I/O) lanes. The switch architecture124(e.g., the flexible I/O lanes) is adjustable based on a desired amount of resources (e.g., connection speed, bandwidth, etc.) that are to be made available to the first and second platform connectors126,128. Accordingly, flexible interconnects (e.g., switches, multiplexers, etc.) may be selected within the switch architecture124to facilitate a high speed connection with the connection adapter110or the peripheral device130. The flexible interconnects of the switch architecture124may be based on a high speed signal layout of the computing platform120in combination with interconnect options between the first and second platform connectors126,128. Accordingly, the computing platform120may use the high speed signal layout to increase or maximize a number of possible signals or types of signals that may be routed to the first and second platform connectors126,128. In examples disclosed herein, a connection or communication link established by a device (e.g., the connection adapter110or the peripheral device130) via both the first and second platform connectors126,128is considered a high speed connection in that the speed or bandwidth available for the connection or communication link is greater than the speed or connection would be via either the first platform connector126or the second platform connector128.

The example first and second platform connectors126,128may be any type of connector to facilitate access to the computing platform120. For example, the first or the second platform connectors126,128may be a M.2 connector, a USB connector, a PCI connector, a display port, a serial port, etc. In some examples, the first and second connector126,128may be placed at a fixed (e.g., a standard) distance apart from one another on a housing of the computing platform120. In some examples, the computing platform120may include other connectors in addition to or instead of the first and second platform connectors126,128.

The example peripheral device130may be any type of peripheral device130capable of communicating with the connection adapter110or accessing the computing platform120via the connection adapter110. For example, the peripheral device130may be one or a plurality of SAS device(s), SATA device(s), a Thunderbolt™ device(s), flexible wireless device(s) (e.g., wireless display (Wi-Di) device, wireless local area network (WLAN) device, wireless USB device, etc.), etc. In examples, disclosed herein, the peripheral device130may connect to the computing platform120via the first and second platform connectors126,128using the connection adapter110. Accordingly, the peripheral device130may establish a high speed connection with the computing platform120. For example, the platform controller122or the connection adapter110may adjust the switch architecture124or settings of the platform controller122to provide a plurality (e.g., five, ten, etc.) of high speed serial lines providing capabilities for a PCI express connection, a SATA connection, a gigabit Ethernet connection, a USB3 connection, etc. with the peripheral device130. In some examples, once a physical connection is established between the computing platform120and the peripheral device130via the connection adapter110, the computing platform120may automatically setup communication with the peripheral device130or an I/O controller of the connection adapter110(e.g., via a basic input/output system (BIOS), via the platform controller122, via communication or computing standards, etc.).

The example connection adapter110ofFIG. 1facilitates a high speed connection between the peripheral device130and the computing platform110. In examples disclosed herein, the connection adapter110may send information to the computing platform120to facilitate concatenating functionality or resources (e.g., flexible I/O lanes) of the computing platform120(e.g., using resources of the switch architecture). As used herein, concatenating is defined to include combining, arranging, or linking a plurality of elements or components (e.g., resources of the computing platform). For example, upon establishing the first and second connections140,150or the peripheral connection160, the connection adapter122may send information (e.g., instructions, identification information indicating a device or connection type, side signals, etc.) to the platform controller122via the first connector126or the second connector128(e.g., via GPIO lines of the first connection140and the second connection150) to facilitate adjusting or concatenating the functionality of the first and second platform connectors126,128(e.g., by adjusting flexible I/O lanes of the switch architecture124) to facilitate a high speed connection with the peripheral device130. In some examples, the platform controller122or other components of the computing platform120(e.g., the BIOS) may establish a communication link using communication and computing standards based on the detected physical connection of the connection adapter110and peripheral device130to the computing platform120. The example information sent between the connection adapter110and the computing platform120may be defined to tell the BIOS a type or kind of connection (or adapting) may be used for connecting to the peripheral device130. In some examples, a system management bus (SMbus) may be available for the BIOS to integrate the connection adapter110.

Though illustrated separately in the example ofFIG. 1, the example connection adapter110and the example peripheral device130may be collocated. In other words, the connection adapter110ofFIG. 1may be positioned on, with, or within the peripheral device130(or vice versa).

FIG. 2is a block diagram of an example connection adapter110that may be implemented by the peripheral connection system100ofFIG. 1. The example connection adapter110ofFIG. 2may be used to implement the connection adapter110ofFIG. 1. While the connection adapter110ofFIG. 2includes an adapter controller210, an I/O controller220, a communication bus230, a first adapter connector240, a second adapter connector250, and a peripheral connector260. The example adapter controller210may communicate (e.g., send or receive signals) to devices (e.g., the computing platform120, the peripheral device130, etc.) via the communication bus230and the I/O controller220, the first adapter connector240, or the second adapter connector250. In examples disclosed herein, the adapter controller210ofFIG. 2may facilitate establishing a high speed connection between devices (e.g., the computing platform120and the peripheral device130ofFIG. 1).

The example I/O controller220may be any type of I/O interface, I/O port or I/O connector. For example, the I/O controller220may be a Thunderbolt™ controller, a Lightning™ controller, a USB3 controller, a SATA controller, a SAS controller, etc. In some examples, the I/O controller220may include a switch, a repeater, or a hub. Accordingly, the I/O controller220facilitates connection to the connection adapter110ofFIG. 2for a device (e.g., the peripheral device130) to establish a high speed connection with another device, such as the computing platform120ofFIG. 1. In the illustrated example ofFIG. 2, the I/O controller220connects to the peripheral connector260. The peripheral connector260may be implemented by any one of or combination of USB port(s), Thunderbolt port(s), SATA connector(s), SAS connector(s), or any other type of port or connector to facilitate a high speed connection to the computing platform120ofFIG. 1. Accordingly, in such an example, a variety of devices (e.g. SAS drives, SATA drives, USB devices, Thunderbolt devices, etc.) may establish a high speed connection with the computing platform120ofFIG. 1via the connection adapter110.

The example first adapter connector240and a second adapter connector250may be connected to a device, such as the computing platform120ofFIG. 1. For example, if the connection adapter110ofFIG. 2is connected to the computing platform120ofFIG. 1, the first adapter connector240may connect to the first platform connector126to establish first connection140and the second adapter connector250may connect to the second platform connector128to establish the second connection150. Accordingly, in such an example, the adapter connectors240,250are compatible with the platform connectors126,128in that they have a matching physical compatibility (e.g., volume, pin configuration, housing, etc.). For example, the example connectors126,128,240,250may be connected via male and female connectors. In some examples, the first adapter connector240and the second adapter connector250may be physically located at a fixed or standard distance from one another that matches a similar fixed or standard distance between the first platform connector126and the second platform connector128. The example first adapter connector240and second adapter connector250may include any suitable interface or circuitry based on the corresponding type of connector.

The example adapter controller210facilitates establishing a connection or communication link between devices (e.g., the computing platform120and the peripheral device130via the I/O controller220) connected to the connection adapter110ofFIG. 2. In examples disclosed herein, the adapter controller210may facilitate concatenating functionality of connectors of a device connected to the first adapter connector240and the second adapter connector250. For example, the connector controller210may facilitate concatenating the functionality of the connectors126,128of the computing platform120ofFIG. 1by sending information associated with the connection adapter110, instructing the platform controller122, or requesting the platform controller122to adjust the switch architecture124(e.g., a set of flexible I/O lanes) to make resources or bandwidth of both the connectors126,128available to the connection adapter110. Accordingly, once a suitable connection is established via the connection adapter110, the computing platform120may then set up communication protocol between the computing platform120and the peripheral device130based on the resources (e.g., control devices, flexible I/O lanes, etc.) made available through connecting to the computing platform120via the first and second connections140,150.

While an example manner of implementing the connection adapter110ofFIG. 1is illustrated inFIG. 2, at least one of the elements, processes or devices illustrated inFIG. 2may be combined, divided, re-arranged, omitted, eliminated or implemented in any other way. Further, the adapter controller210, the i/o controller220, the communication bus230, the first adapter connector240, the second adapter connector250, or, more generally, the example connection adapter110ofFIG. 2may be implemented by hardware or any combination of hardware and executable instructions (e.g., software or firmware). Thus, for example, any the adapter controller210, the i/o controller220, the communication bus230, the first adapter connector240, the second adapter connector250, or, more generally, the example connection adapter110may be implemented by at least one of an analog or digital circuit, a logic circuit, a programmable processor, an application specific integrated circuit (ASIC), a programmable logic device (PLD) or a field programmable logic device (FPLD). When reading any of the apparatus or system claims of this patent to cover a purely software or firmware implementation, at least one of the adapter controller210, the i/o controller220, the communication bus230, the first adapter connector240, or the second adapter connector250is/are hereby expressly defined to include a tangible computer readable storage device or storage disk such as a memory, a digital versatile disk (DVD), a compact disk (CD), a Blu-ray disk, etc. storing the executable instructions. Further still, the example connection adapter110ofFIG. 2may include at least one element, process, or device in addition to, or instead of, those illustrated inFIG. 2, or may include more than one of any or all of the illustrated elements, processes, and devices.

FIG. 3is a block diagram of an example adapter controller210that may be implemented by the connection adapter110ofFIG. 1 or 2. The example adapter controller210ofFIG. 3may be used to implement the adapter controller210ofFIG. 2. The adapter controller210ofFIG. 3includes a connection identifier310, a communication manager320, and a connection manager330. The example connection manager330may communicate with the connection identifier310and the communication manager320to establish a high speed communication links between devices connected to a connection adapter (e.g., the connection adapter110ofFIG. 1 or 2).

The example connection identifier310ofFIG. 3identifies or detects when a connection adapter (e.g., the connection adapter110ofFIG. 1 or 2) is connected to a device (e.g., the computing platform120). For example, the connection identifier310may monitor ports or connectors (e.g., the first adapter connector240, the second adapter connector250, etc.) of the connection adapter110. In such an example, when a device is connected via a port or connector of the connection adapter110, the connection identifier310may indicate to the connection manager330that the connection adapter is connected to a device. Accordingly, the connection manager330may use such information to facilitate establishing a high speed communication link with another device (e.g., the computing platform120or the peripheral device130).

The example communication manager320ofFIG. 3sets up or facilitates establishing a connection between devices (e.g., the computing platform120or the peripheral device130) connected to the connection adapter110. Accordingly, the communication manager320may serve as an interface between the connection manager330and the computing platform120or the peripheral device130ofFIG. 1. The communication manager320may send or receive signals, messages, requests, instructions, identification information, etc. to the computing platform120or the I/O controller220. For example, to establish a high speed communication link with the computing platform120, the communication manager320may send information or instructions to the computing platform120to concatenate resources or functionality of the first platform connector126and the second platform connector128in accordance with the teachings of this disclosure. Such example information or instructions may include identification information, pin layout, pin configuration, pin assignments, etc.

The example connection manager330ofFIG. 3may facilitates establishing communication links between devices (e.g., the computing platform120and the peripheral device130ofFIG. 1) connected to the connection adapter110ofFIG. 1 or 2. For example, the connection manager330may determine a type of communication or a type of the peripheral device130(or I/O controller220) to be connected with the computing platform120. In some examples, the connection manager330may determine a particular communication protocol or communication link settings (e.g., speed, bandwidth, etc.) based on settings of the computing platform120or a type of connection to the computing platform120. In some examples, the connection manager330ofFIG. 3establishes settings for a communication based on a type of connection identified by the connection identifier310. For example, settings (e.g., pin assignments, pin configuration, resources needed, etc.) for a first type of connector (e.g., a thunderbolt connection) may be different for settings for a second type of connection (e.g., a SAS drive connection). Accordingly, the connection manager330may instruct the platform controller122to concatenate functionality of the first platform controller126and the second platform controller128based on the type of connection identified by the connection identifier310. In some examples, the connection manager330ofFIG. 3may establish communication links between a plurality of peripheral devices and a computing platform. In such examples, the multiple peripheral devices may simultaneously be connected to the computing platform via the connection adapter110.

While an example manner of implementing the adapter controller210ofFIG. 2is illustrated inFIG. 3, at least one of the elements, processes or devices illustrated inFIG. 3may be combined, divided, re-arranged, omitted, eliminated or implemented in any other way. Further, the connection identifier310, the communication manager320, the connection manager330or, more generally, the example adapter controller210ofFIG. 3may be implemented by hardware or any combination of hardware and executable instructions (e.g., software or firmware). Thus, for example, any of the connection identifier310, the communication manager320, the connection manager330or, more generally, the example adapter controller210could be implemented by at least one of an analog or digital circuit, a logic circuit, a programmable processor, an application specific integrated circuit (ASIC), a programmable logic device (PLD) or a field programmable logic device (FPLD). When reading any of the apparatus or system claims of this patent to cover a purely software or firmware implementation, at least one of the connection identifier310, the communication manager320, or the connection manager330is/are hereby expressly defined to include a tangible computer readable storage device or storage disk such as a memory, a digital versatile disk (DVD), a compact disk (CD), a Blu-ray disk, etc. storing the executable instructions. Further still, the example adapter controller210ofFIG. 3may include at least one element, process, or device in addition to, or instead of, those illustrated inFIG. 3, or may include more than one of any or all of the illustrated elements, processes and devices.

FIG. 4illustrates an example implementation of a peripheral connection system400that may be implemented by the peripheral connection system100ofFIG. 1. The example peripheral connection system400ofFIG. 4includes an I/O device430connected to a computer420via a connection adapter410. In the illustrated example ofFIG. 4, the connection adapter410may be used to implement the connection adapter110ofFIG. 1, the computer420may be used to implement the computing platform120ofFIG. 1, and the I/O device430may be used to implement the peripheral device130ofFIG. 1. As illustrated inFIG. 4, the connection adapter410is connected to the computer420via two M.2 connections440,450. The example connection adapter410is also connected to the I/O device430via any suitable connection460for the I/O device430. In some examples, the connection adapter410and the I/O device430may be collocated with one another on or within a same device. The example connection adapter410ofFIG. 4includes an I/O controller412.

In the illustrated example ofFIG. 4, the computer420includes a CPU452, an I/O Hub454, and a graphics controller module (GFX)456. The CPU452, the I/O HUB454(e.g., a PCH), and the GFX456may be used to implement the platform controller122ofFIG. 1(as illustrated by the dotted line). The example computer420ofFIG. 4also includes two multiplexers (MUX) or switches462,464. The example multiplexers/switches425,426may be used to implement the switch architecture124ofFIG. 1(as illustrated by the dotted line424). The components452,454,456,462,464of the example computer420inFIG. 4are connected with one another as illustrated via communication links or connections (e.g., PCI express connections, USB connections, display port connections, etc.).

In the illustrated example ofFIG. 4, the CPU452and the I/O HUB454are connected via a communication link453and the CPU452and the GFX456are connected via another communication link455. The example CPU452is connected to the MUX/switches462,464via PCI express connections472,474, respectively. The I/O HUB454inFIG. 4is connected to the MUX/switches462,464via USB connections482,484, respectively. The example GFX456is connected to the MUX/switches462,464via display port connections492,494, respectively.

Using the example peripheral connection system400ofFIG. 4, the following example implementations may refer to the connections ofFIG. 4to illustrate potential configurations of the computer420that may be used to establish high speed connections between various I/O device(s)430and the computer420via the connection adapter410. In examples disclosed herein, the connection adapter410may be able to facilitate connection to a variety of types of I/O devices430or a single designated type of I/O device430.

For example, if the I/O device430is a Thunderbolt™ device, the example connection adapter410may instruct the computer420to establish a communication link with the Thunderbolt™ device430to facilitate access to the GFX456and the CPU452(because Thunderbolt™ uses Display Port and PCI). Accordingly, in such an example, in response to the instructions from the connection adapter410(e.g., from the I/O controller412, which may implement a Thunderbolt™ controller), the computer420may instruct the MUX/Switch462to establish a connection between the GFX456and the first M.2 connection440via the display connection492and the second MUX/switch464to establish a connection between the CPU452and the second M.2 connection450via the PCI express connection474. Accordingly, in such an example, the Thunderbolt™ device430may have high speed access (via the display port connection492and the PCI express connection474) to the computer420via both the M.2 connections440,450.

As another example, if the I/O device430were a SAS hard drive, the example connection adapter410may instruct the computer420to establish a communication link with the SAS hard drive430to facilitate high speed access to the CPU452(because SAS uses high speed communication with a CPU). Accordingly, in such an example, in response to the instructions from the connection adapter410(e.g., from the I/O controller412, which may implement a SAS controller), the computer420may instruct the MUX/Switch462to establish a first connection between the CPU and the first M.2 connection440via the PCI express connection472and the second MUX/switch464to establish a second connection between the CPU452and the second M.2 connection450via the PCI express connection474. Accordingly, in such an example, the SAS hard drive430may have high speed access (via both PCI express connections472,474) to the computer420via both the M.2 connections440,450. It is noted, that an SAS drive430connected to the CPU via only one of the first PCI express link472or the second PCI express link474(i.e., via one of the first M.2 connection440or second M.2 connection450) would not have as great of a high speed connection with the computer420as the above described example.

In yet another example, if the I/O device430were a Wi-Di device, the example connection adapter410may instruct the computer420to establish a communication link with the Wi-Di device430to facilitate access to the CPU452, the I/O HUB454, and the GFX456(because the Wi-Di uses Display Port, PCI Express, and USB). Accordingly, in such an example, in response to the instructions from the connection adapter410, the computer420may instruct the MUX/switch462to establish a connection between the CPU452and the first M.2 connection440via the PCI express connection472and a connection between the I/O HUB454and the first M.2 connection440via the USB connection482. Also, the computer420may instruct the MUX/switch464to establish a connection between the GFX456and the second M.2 connection450via the display port connection494. In this example, the I/O controller412ofFIG. 4may convert communication protocol into wireless communication protocol for the Wi-Di device. Accordingly, in such an example, the Wi-Di device430may have high speed access (via the PCI express connection472, the USB connection482, and the display port connection494) to the computer via both the M.2 connections440,450.

Accordingly, the illustrated example ofFIG. 4demonstrates the flexibility made available to the I/O devices430using the connection adapter410. Thus, the computer420may concatenate resources (e.g., flexible I/O lanes, the components452,454,456,462,464, etc.) connected to the first and second connector by establishing the above mentioned communication links between the components452,454,456,462,464of the computer420and the first and second connections440,450. Accordingly, using the connection adapter420, a peripheral device (e.g., Thunderbolt™ devices, SAS devices, Wi-Di devices, etc.) may establish high speed connections with a computer using a plurality of connectors (e.g., two M.2 connectors). It is noted that althoughFIG. 4illustrates the use of two M.2 connectors, other connectors or types of connectors may be used. For example, USB connection(s), Display port connection(s), PCI connection(s), etc. may be used in addition or instead of the M.2 connections440,450ofFIG. 4.

A flowchart representative of example machine readable instructions for implementing the connection adapter110or the adapter controller210ofFIGS. 2 and 3, respectively, is shown inFIG. 5. In this example, the machine readable instructions comprise a program/process for execution by a processor such as the processor712shown in the example processor platform700discussed below in connection withFIG. 7. The program/process may be embodied in executable instructions (e.g., software) stored on a tangible computer readable storage medium such as a CD-ROM, a floppy disk, a hard drive, a digital versatile disk (DVD), a Blu-ray disk, or a memory associated with the processor712, but the entire program/process or parts thereof could alternatively be executed by a device other than the processor712or embodied in firmware or dedicated hardware. Further, although the example program is described with reference to the flowchart illustrated inFIG. 5, many other methods of implementing the example connection adapter110or the example adapter controller210may alternatively be used. For example, the order of execution of the blocks may be changed, or some of the blocks described may be changed, eliminated, or combined.

The process500ofFIG. 5begins with an initiation of the connection adapter110(e.g., upon startup of the connection adapter110, upon instructions from a user, upon startup of a device connected to the connection adapter110(e.g., the computing platform120or the peripheral device130), upon being connected to another device, etc.). At block510of the example process500ofFIG. 5, the connection identifier310identifies a connection from the connection adapter110to a system platform (e.g., the computing platform120ofFIG. 1) via a first connector (e.g., the first platform connector126) and a second connector (e.g., the second platform connector128). At blocks510an identification may be made based on a received signal (e.g., a beacon, a communication request, etc.) identified or detected upon connection between the connection adapter110and the computing platform120.

The example communication manager320, at block520ofFIG. 5, instructs the system platform (e.g., the computing platform120) to concatenate resources of the first high speed connector (e.g., flexible I/O lanes, switches, multiplexers, controllers, etc. connected to the first high speed connector) and resources of the second high speed connector (e.g., flexible I/O lanes, switches, multiplexers, controllers, etc. connected to the first high speed connector). Accordingly, at block530, the concatenated resources provide a high speed connection to a peripheral device (e.g., the peripheral device130) via the connection adapter110. After block520, the example process500ofFIG. 5ends.

A flowchart representative of example machine readable instructions for implementing the platform controller122ofFIG. 1is shown inFIG. 6. In this example, the machine readable instructions comprise a program/process for execution by a processor such as the processor712shown in the example processor platform700discussed below in connection withFIG. 7. The program/process may be embodied in executable instructions (e.g., software) stored on a tangible computer readable storage medium such as a CD-ROM, a floppy disk, a hard drive, a digital versatile disk (DVD), a Blu-ray disk, or a memory associated with the processor712, but the entire program/process or parts thereof could alternatively be executed by a device other than the processor712or embodied in firmware or dedicated hardware. Further, although the example program is described with reference to the flowchart illustrated in FIG. F, many other methods of implementing the example A1may alternatively be used. For example, the order of execution of the blocks may be changed, or some of the blocks described may be changed, eliminated, or combined.

The process600ofFIG. 6begins with an initiation of the platform controller122(e.g., upon startup of the computing platform120, upon instructions from a user or the connection adapter110, upon being connected to another device (e.g., the connection adapter110), etc.). At block610ofFIG. 6, the platform controller122concatenates resources of a first connector and a second connector in response to receiving instructions from a connection adapter by adjusting flexible I/O lanes connected to the first connector and the second connector. In some examples, the adjusted flexible I/O lanes may include or comprise multiplexers, switches, etc. At block620, the platform controller122establishes a communication link with a peripheral device via the connection adapter through the first connector and the second connector. In some examples, at block620, the communication link is established with the peripheral device130in response to receiving instructions or in response to the connection adapter110setting up the communication link. After block620, the example process600ofFIG. 6ends.

As mentioned above, the example processes ofFIG. 5 or 6may be implemented using coded instructions (e.g., computer or machine readable instructions) stored on a tangible computer readable storage medium such as a hard disk drive, a flash memory, a read-only memory (ROM), a compact disk (CD), a digital versatile disk (DVD), a cache, a random-access memory (RAM) or any other storage device or storage disk in which information is stored for any duration (e.g., for extended time periods, permanently, for brief instances, for temporarily buffering, or for caching of the information). As used herein, the term tangible computer readable storage medium is expressly defined to include any type of computer readable storage device or storage disk and to exclude propagating signals and to exclude transmission media. As used herein, “tangible computer readable storage medium” and “tangible machine readable storage medium” are used interchangeably. Additionally or alternatively, the example processes ofFIG. 5 or 6may be implemented using coded instructions (e.g., computer or machine readable instructions) stored on a non-transitory computer or machine readable medium such as a hard disk drive, a flash memory, a read-only memory, a compact disk, a digital versatile disk, a cache, a random-access memory or any other storage device or storage disk in which information is stored for any duration (e.g., for extended time periods, permanently, for brief instances, for temporarily buffering, or for caching of the information). As used herein, the term non-transitory computer readable medium is expressly defined to include any type of computer readable storage device or storage disk and to exclude propagating signals and to exclude transmission media.

As used herein, when the phrase “at least” is used as the transition term in a preamble of a claim, it is open-ended in the same manner as the term “comprising” is open ended. As used herein the term “a” or “an” may mean “at least one,” and therefore, “a” or “an” do not necessarily limit a particular element to a single element when used to describe the element. As used herein, when the term “or” is used in a series, it is not, unless otherwise indicated (e.g., when accompanied by the term “either”), considered an “exclusive or.”

FIG. 7is a block diagram of an example processor platform700capable of executing the instructions ofFIG. 5to implement the connection adapter110ofFIG. 2 or 3. In some examples, the example processor platform700may be used to implement the computing platform120ofFIG. 1and may be capable of executing the instructions ofFIG. 6to implement the platform controller122. The example processor platform700may be or may be included in any type of apparatus, such as a server, a personal computer, a mobile device (e.g., a cell phone, a smart phone, a tablet, etc.), a personal digital assistant (PDA), an Internet appliance, the connection adapter110or any other type of computing device.

The processor platform700of the illustrated example ofFIG. 7includes a processor712. The processor712of the illustrated example is hardware. For example, the processor712can be implemented by at least one integrated circuit, logic circuit, microprocessor or controller from any desired family or manufacturer.

The processor712of the illustrated example includes a local memory713(e.g., a cache). The processor712of the illustrated example is in communication with a main memory including a volatile memory714and a non-volatile memory716via a bus718. The volatile memory714may be implemented by Synchronous Dynamic Random Access Memory (SDRAM), Dynamic Random Access Memory (DRAM), RAMBUS Dynamic Random Access Memory (RDRAM) or any other type of random access memory device. The non-volatile memory716may be implemented by flash memory or any other desired type of memory device. Access to the main memory714,716is controlled by a memory controller.

The processor platform700of the illustrated example also includes an interface circuit720. The interface circuit720may be implemented by any type of interface standard, such as an Ethernet interface, a universal serial bus (USB), or a peripheral component interconnect (PCI) express interface.

In the illustrated example, at least one input device722is connected to the interface circuit720. The input device(s)722permit(s) a user to enter data and commands into the processor712. The input device(s) can be implemented by, for example, an audio sensor, a microphone, a camera (still or video), a keyboard, a button, a mouse, a touchscreen, a track-pad, a trackball, isopoint or a voice recognition system.

At least one output device724is also connected to the interface circuit720of the illustrated example. The output device(s)724can be implemented, for example, by display devices (e.g., a light emitting diode (LED), an organic light emitting diode (OLED), a liquid crystal display, a cathode ray tube display (CRT), a touchscreen, a tactile output device, a light emitting diode (LED), a printer or speakers). The interface circuit720of the illustrated example, thus, may include a graphics driver card, a graphics driver chip or a graphics driver processor.

The processor platform700of the illustrated example also includes at least one mass storage device728for storing executable instructions (e.g., software) or data. Examples of such mass storage device(s)728include floppy disk drives, hard drive disks, compact disk drives, Blu-ray disk drives, RAID systems, and digital versatile disk (DVD) drives.

The coded instructions732ofFIG. 5 or 6may be stored in the mass storage device728, in the local memory713in the volatile memory714, in the non-volatile memory716, or on a removable tangible computer readable storage medium such as a CD or DVD.

From the foregoing, it will be appreciated that the above disclosed methods, apparatus and articles of manufacture establish a high speed connection between a computing platform and a peripheral device by concatenating functionalities of multiple connectors of the computing platform. Accordingly, greater flexibility may be offered to peripheral devices to connect to computing platforms in accordance with the examples disclosed herein. For example, if a peripheral device was not compatible with a particular computing platform because the computing platform did not have proper available connections for the peripheral devices, the examples involved herein may allow for compatible connectivity with high speed capabilities. Furthermore, a variety of different types of peripheral devices may further be connected to the computing platform using the examples disclosed herein.