Method for fabricating controlled stress silicon nitride films

A method for fabricating a multiple layer silicon nitride film on a semiconductor substrate is provided herein. In one embodiment, a method for fabricating a multiple layer silicon nitride film on a semiconductor substrate includes providing a substrate over which the multiple layer silicon nitride film is to be formed; and forming the multiple layer silicon nitride film in a single processing reactor by: (a) depositing a base layer comprising silicon nitride on the base structure; (b) depositing a middle layer comprising a stress-controlling material on the base layer; and (c) depositing a top layer comprising silicon nitride on the middle layer. The stress-controlling material selectively increases or reduces the stress of the multiple layer silicon nitride film as compared to silicon nitride alone.

BACKGROUND OF THE INVENTION

1. Field of the Invention

Embodiments of the invention generally relate to methods for depositing silicon-based materials. More specifically, the present invention relates to chemical vapor deposition techniques for fabricating multi-layer silicon nitride films.

2. Description of the Related Art

Silicon nitride films are commonly utilized in the fabrication of devices that form integrated circuits. These films must possess varying characteristics depending upon the particular application for which the film is being deposited. One characteristic that is critical to control for certain applications is film stress. For example, in some applications, it is desirable to form a silicon nitride film having a higher stress (as compared to an underlying silicon substrate) so as to improve electron mobility through the silicon. Such improved electron mobility increases the speed of an NMOS/NFET device.

In other applications, it is desirable to form a silicon nitride film having a lower stress (as compared to an underlying silicon substrate) so as to minimize dislocation of the layer from, for example, the underlying substrate or to minimize the formation of dislocations in the substrate itself. Such dislocations are detrimental to device functionality as they scatter electron/hole motion and/or enhance diffusion where it is undesirable to do so. In addition, present manufacturing techniques utilize different processing tools to fabricate the spacer structures, resulting in increased time and cost of these components.

Thus, there is a need in the art for an improved method for fabricating silicon nitride films.

SUMMARY OF THE INVENTION

A method for fabricating a multiple layer silicon nitride film on a semiconductor substrate is provided herein. In one embodiment, a method for fabricating a multiple layer silicon nitride film on a semiconductor substrate includes providing a substrate over which the multiple layer silicon nitride film is to be formed; and forming the multiple layer silicon nitride film in a single processing reactor by: (a) depositing a base layer comprising silicon nitride on the base structure; (b) depositing a middle layer comprising a stress-controlling material on the base layer; and (c) depositing a top layer comprising silicon nitride on the middle layer. The stress-controlling material selectively increases or reduces the stress of the multiple layer silicon nitride film as compared to silicon nitride alone.

In another embodiment, a method for fabricating a multiple layer silicon nitride film on a semiconductor substrate includes forming a silicon nitride base layer upon a substrate; forming one or more middle layers upon the base layer, wherein the composition of the one or more middle layers is selected to control the stress of the multiple layer silicon nitride film; and forming a silicon nitride upper layer upon the one or more middle layers.

Where possible, identical reference numerals are used herein to designate identical elements that are common to the figures. The images in the drawings are simplified for illustrative purposes and are not depicted to scale.

The appended drawings illustrate exemplary embodiments of the invention and, as such, should not be considered as limiting the scope of the invention that may admit to other equally effective embodiments.

DETAILED DESCRIPTION

The present invention is generally a method for fabricating controlled stress, multiple-layer silicon nitride films, also referred to herein as a silicon nitride stack, in integrated semiconductor circuits and devices.

FIG. 1depicts a flow diagram illustrating a method100for fabricating a multiple layer silicon nitride film over a desired location on a substrate in accordance with one embodiment of the present invention. The method100includes processing steps performed upon a substrate during fabrication of the silicon nitride stack. Sub-steps and auxiliary procedures (e.g., process control sub-steps, lithographic routines, and the like) that are well known in the art are omitted herein. Controlled stress, multiple-layer silicon nitride films formed as described in the method100are suitable for use in connection with the fabrication of, for example, field effect transistors (FET), dynamic random access memory (DRAM), flash memory, static random access memory (SRAM), advanced image sensors based on complementary metal oxide semiconductor (CMOS) structures, advanced light emitting diode (LED) structures, and the like.

Each of the steps of the method100can be performed using a low pressure chemical vapor deposition (LPCVD) reactor, among other suitable processing reactors known to those skilled in the art, such as chemical vapor deposition (CVD) reactors, atomic layer deposition (ALD) reactors, batch deposition reactors, and the like. For example, an ALD reactor may be used to provide a more well-defined and controllable stack at the expense of reduced throughput/additional cost. Alternatively, a CVD reactor may be utilized to increase deposition rates and, thereby, increase throughput/reduced cost. Moreover, each of the steps of the method100may be performed in-situ, i.e., in the same process chamber, or within the same process tool. One LPCVD reactor suitable for performing the inventive method is briefly discussed below with reference toFIG. 3. In addition, one LPCVD reactor suitable for performing the method100is a SiNgen® Plus LPCVD reactor available from Applied Materials, Inc. of Santa Clara, Calif.

FIG. 2depicts a schematic, cross-sectional view of a substrate where a controlled stress, multiple-layer silicon nitride film210is fabricated on a substrate200using one embodiment of the method ofFIG. 1. The image inFIG. 2is not depicted to scale and is simplified for illustrative purposes. To best understand the invention, the reader should simultaneously refer toFIGS. 1 and 2.

The method100starts at step102and proceeds to step104, where the substrate200is provided. Embodiments of the substrate200include, but are not limited, to semiconductor wafers, such as crystalline silicon (e.g., Si<100> or Si<111>), silicon oxide, strained silicon, SOI, silicon germanium, doped or undoped polysilicon wafers, and the like. Generally, surfaces on which a controlled stress, multiple-layer silicon nitride film is formed may comprise regions of bare silicon, barrier material, low-k or high-k dielectric material, conductive material, and the like. For example, the controlled stress, multiple-layer silicon nitride film may be formed upon a semiconductor substrate as part of a process of forming certain devices or structures related to an integrated circuit, such as barrier layers, spacer structures, and the like. Optionally, prior to forming the controlled stress, multiple-layer silicon nitride film, the substrate200may be pretreated by selectively performing processes such as polishing, annealing, baking, etching, reduction, oxidation, halogenation, hydroxylation, and the like. In one embodiment, the substrate200is a crystalline silicon wafer.

At step105, a multiple layer silicon nitride film210having a controlled stress is formed on the substrate200. Step105comprises a series of steps wherein a base layer202, a middle layer204, and an upper layer206are deposited as described in more detail below.

At step106, a base layer comprising silicon nitride (Si3N4) or carbon-doped silicon nitride is deposited on the substrate. In the embodiment depicted inFIG. 2, a base layer202is deposited on exposed surfaces of the substrate200. In other embodiments, the base layer202may be deposited over a variety of materials disposed on the substrate, for example, in connection with the fabrication of an integrated circuit or similar device. The base layer202comprises silicon nitride or carbon-doped silicon nitride and is deposited to a thickness of about 50-500 Angstroms. In one embodiment, base layer202is deposited to a thickness of about 250 Angstroms. The thickness of the base layer202is exemplary and is not to be taken as a limiting factor. It is contemplated that layers having other thicknesses may optionally be utilized. It is further contemplated that multiple layers similar to the base layer202may be additionally formed on top of the base layer202during step106.

In one embodiment, the base layer202is formed using the illustrative chemistries and processes described below. Optionally, the base layer202may be doped with other elements to control film characteristics, such as the etch selectivity of the layer with respect chemistries used in further processing of the substrate. In one embodiment, the base layer202may be doped with carbon (C). Additional processes for forming silicon nitride and doped silicon nitride films are disclosed in U.S. patent application Ser. No. 11/245,373, filed on Oct. 6, 2005, by R. Suryanarayanan lyer, et al., and entitled, “METHOD AND APPARATUS FOR THE LOW TEMPERATURE DEPOSITION OF DOPED SILICON NITRIDE FILMS,” which is hereby incorporated by reference in its entirety.

In one embodiment, the base layer202may be formed using a mixture comprising a nitridation chemical and a silicon source chemical, each in a gaseous or liquid form. In one embodiment, the nitridation chemical comprises at least one of nitrogen (N2), ammonia (NH3), hydrazine (N2H4) and the like, and the silicon source chemical comprises at least one of bis(tertiary butylamino)silane (BTBAS), silane (SiH4), disilane (Si2H6), dichlorosilane (SiH2Cl2), hexachlorodisilane (Si2Cl6), and the like.

In other embodiments, step106may use carbon-containing nitridation chemicals having a chemical formula R(C)—CXNYR(N), where R(C) is hydrogen (H) or other hydrocarbon compound group, R(N) is nitrogen or other nitrogen containing compound group, and x and y are integers. Examples of suitable chemicals include (CH3)3—N, H3C—NH2, methylamine, H3C—NH—NH2, methylhydrazine, (H3C)—N═N—H, and HC≡N, among other such chemicals.

In yet other embodiments, step106may use hydrogen-containing silicon source chemicals having chemical formulas (SiR3)3—N, (SiR3)2N—N(SiR3)2, or (SiR3)N═(SiR3)N, wherein R is hydrogen (H), a hydrocarbon reagent, or a fragment consisting of methyl, ethyl, phenyl, tertiary, butyl and combinations thereof. In one embodiment, R contains hydrogen and is free of halogens. In another embodiment, R contains hydrogen and one or more halogen elements. Examples of suitable silicon source chemicals include (SiH3)3—N, (SiH3)2N—N(SiH3)2, (SiH3)N═(SiH3)N, and trisilylamine, among other such chemicals. In addition, other source gases disclosed with respect to the other layers and steps described below may be utilized to form like materials in any of the layers described herein. Carbon-doped silicon nitride films may be formed utilizing, e.g., at least one of the carbon-containing silicon source chemicals mentioned above. Alternatively or in combination, carbon source chemicals, such as C2H4, C4H8, and the like, may be added to the silicon source and nitridation chemistries disclosed above to form a carbon-doped silicon nitride film.

In one embodiment, the silicon nitride base layer202is formed in an LPCVD reactor, such as a SiNgen® Plus 300 mm reactor, by providing ammonia (NH3) at about 10-15,000 sccm, and silane (SiH4) at about 1-100 sccm (i.e., a NH3:SiH4flow ratio ranging from 1:10 to 15,000:1), while maintaining a substrate pedestal temperature of about 650-800° C. and a chamber pressure of about 10-350 Torr. The duration of the deposition process is about 10-600 sec, but may vary depending on deposition rates and desired layer thicknesses. One specific process provides 10,000 sccm NH3, 17 sccm SiH4(i.e., a NH3:SiH4flow ratio of 588:1), while maintaining the substrate temperature at about 700° C. and the chamber pressure at about 240 Torr.

In another embodiment, a carbon-doped silicon nitride base layer202is formed in an LPCVD reactor, such as a SiNgen® Plus 300 mm reactor, by providing ammonia (NH3) at about 25-5,000 sccm, and BTBAS at about 50-1,000 mg per min, while maintaining a substrate pedestal temperature of about 600-700° C. and a chamber pressure of about 10-350 Torr. The duration of the deposition process may be about 10-600 sec, but may vary depending on deposition rates and desired layer thicknesses. One specific process provides 40 sccm NH3, 305 mg per min BTBAS, while maintaining the substrate temperature at about 675° C. and the chamber pressure at about 275 Torr. Other examples of process conditions for depositing a doped silicon nitride base layer202are described in the previously incorporated U.S. patent application Ser. No. 11/245,373.

At step108, a middle layer comprising a stress-controlling material is deposited over the base layer. It is contemplated that multiple middle layers may be formed on top of the base layer during step108to control the stress of the multiple layer silicon nitride film210. It is assumed that the individual layers do not interact with each other—i.e., there are no interfacial reactions of consequence to the overall stress value of the multiple layer silicon nitride film. It is further assumed that thermal mismatch stresses are negligible and that stress control of the multiple layer silicon nitride film, or stack, is primarily achieved using the intrinsic stress of each layer. As such, the total stress, σ, of a stack having from 1 to i layers and a total thickness, t, is given as:

σ=σ1⁡(t1t)+σ2⁡(t2t)+σ3⁡(t3t)+…+σi⁡(tit)(Equation⁢⁢1)
wherein σiis the stress of the individual ithlayer of the stack, and tiis the thickness of the individual ithlayer of the stack (i.e., t1+t2+ . . . +ti=t). Thus, the one or more middle layers may be selectively formed to control the overall stress of the multiple layer silicon nitride film.

The selection of the materials used to form the middle layer depends on the desired stress of the middle layer, and thereby, the desired stress of the overall multiple layer silicon nitride film210. For example, in embodiments where the stress of the multiple-layer silicon nitride film210is to be increased, the middle layer comprises a boron-containing material, such as boron nitride (BN) and/or boron-doped silicon nitride (SiN—B). A middle layer comprising such boron-containing material results in a multiple layer silicon nitride film210having a higher stress. Alternatively, in embodiments where the stress of the multiple-layer silicon nitride film210is to be decreased, the middle layer comprises a carbon-containing material, such as silicon carbide (SiC) and/or carbon-doped silicon nitride (SiN—C), and/or an oxygen-containing material, such as silicon oxide (SiO2) or silicon oxynitride (SiO—N). A middle layer comprising such carbon- or oxygen-containing material results in a multiple layer silicon nitride film210having a lower stress. In embodiments wherein properties of the multiple layer silicon nitride film210such as refractive index (RI), wet and dry etch rate selectivity, chemical mechanical polishing (CMP) rate, and the like, are to be consistent with the silicon nitride base and upper layers, the middle layer preferably comprises a doped silicon nitride, for example, a boron- or carbon-doped silicon nitride.

In the embodiment depicted inFIG. 2, a middle layer204is deposited over the base layer202. In one embodiment, the middle layer204comprises boron-containing material such as boron nitride and/or boron-doped silicon nitride and is formed to a thickness of between approximately 50-500 Angstroms. Alternatively, the middle layer204comprises a carbon-containing material, such as silicon carbide and/or carbon-doped silicon nitride and may be formed to a thickness of between approximately 50-500 Angstroms. The thickness values for embodiments of the middle layer204are exemplary and are not to be taken as a limiting factor. It is contemplated that layers having other thicknesses may optionally be utilized.

A middle layer204comprising a boron-containing silicon nitride film may be formed using the silicon nitride film chemistries described with respect to step106, above, with the addition of doping chemicals, such as at least one of boron trichloride (BCl3), borane (BH3), diborane (B2H6), or other boron containing source chemical. Alternatively, a middle layer204comprising a carbon containing silicon nitride film may be formed using the carbon-doped silicon nitride film chemistries described with respect to step106, above.

In one embodiment, using an LPCVD reactor, a boron-containing silicon nitride middle layer204may be formed by providing ammonia (NH3) at about 25-5,000 sccm, BTBAS at about 50-1,000 mg per min, and a boron containing source chemical, such as B2H6(typically diluted in H2or He or N2), BCl3, and the like, at about 25-500 sccm, while maintaining a substrate pedestal temperature of about 500-700° C. and a chamber pressure of about 10-350 Torr. The duration of the deposition process may be about 10-600 sec, but may vary depending on deposition rates and desired layer thicknesses. One specific process provides 40 sccm NH3, 305 mg per min BTBAS, and 150 sccm B2H6, while maintaining the substrate temperature at about 550° C. and a chamber pressure of about 275 Torr.

In another embodiment, using an LPCVD reactor, a boron-containing middle layer204may be formed by providing ammonia (NH3) at about 25-5,000 sccm and a boron containing source chemical such as B2H6at about 25-500 sccm, while maintaining a substrate pedestal temperature of about 500-700° C. and a chamber pressure of about 10-350 Torr. The duration of the deposition process may be about 10-600 sec, but may vary depending on deposition rates and desired thickness. One specific process provides 40 sccm NH3and 150 sccm B2H6, while maintaining a substrate temperature of about 650° C. and a chamber pressure of about 275 Torr.

In another embodiment, a carbon-containing silicon nitride middle layer204may be formed using the process described above in reference to step106. The carbon-containing silicon nitride middle layer204may be formed by providing ammonia (NH3) at about 25-5,000 sccm and BTBAS at about 50-1,000 mg per min, while maintaining a substrate pedestal temperature of about 600-700° C. and a chamber pressure of about 10-350 Torr. The duration of the deposition process may be about 10-600 sec, but may vary depending on deposition rates and desired thickness. One specific process provides 40 sccm NH3and 305 mg per min BTBAS, while maintaining a substrate temperature of about 675° C. and a chamber pressure of about 275 Torr.

In another embodiment, using an LPCVD reactor, a carbon-containing middle layer204may be formed by providing ammonia (NH3) at about 25-5,000 sccm and a carbon containing source chemical such as C2H4at about 25-500 sccm, while maintaining a substrate pedestal temperature of about 500-700° C. and a chamber pressure of about 10-350 Torr. The duration of the deposition process may be about 10-600 sec, but may vary depending on deposition rates and desired thickness. One specific process provides 40 sccm NH3and 150 sccm C2H4, while maintaining a substrate temperature of about 650° C. and a chamber pressure of about 275 Torr.

At step110, an upper layer is formed atop the middle layer(s) to complete the multiple layer silicon nitride film. The upper layer generally comprises silicon nitride or carbon-doped silicon nitride and, in one embodiment, is formed using the process described above in reference to step106. The upper layer may be formed to a thickness of between approximately 50-500 Angstroms. In one embodiment, the thickness of the upper layer is approximately 250 Angstroms. The thickness of the upper layer is exemplary and is not to be considered limiting. It is further contemplated that multiple layers similar to the upper layer204may additionally be formed on top of the middle layer204during step110.

The total thickness of the multiple layer silicon nitride film is generally between about 200-800 Angstroms. In one embodiment, the total thickness of the multiple layer silicon nitride film is about 750 Angstroms. It is contemplated that the thickness of any or all of the base, middle, and/or upper layers may be adjusted based upon the desired stress or other characteristics required for a particular application. The stress, σf, in a thin film on a substrate is given by Stoney's equation:

σf=ts2×Es⁡(biaxial)tf×6⁢⁢R⁡(1-vs)(Equation⁢⁢2)
Wherein tsand tfare the substrate and film thicknesses, respectively, Esand vsis the Young's modulus and Poisson's ratio of the substrate, and R is the radius of deflection. Stoney's equation and equation 1, above, show that stress is a function of the intrinsic stress of the individual layers and of the thickness of the individual layers. As discussed above, this can be utilized to control the overall film stack stress. As such, knowing the intrinsic stress of each layer, and the boundary conditions of final stress and final thickness required for a particular application allows for the optimal thickness of each layer to be predetermined.

In the embodiment depicted inFIG. 2, an upper layer206is deposited atop the middle layer204. Together, the layers202,204, and206form the multiple layer silicon nitride film210.

Upon completion of step110, at step112, method100ends. The method100advantageously utilizes characteristics of component layers and forms multiple layer silicon nitride films having controlled film stress. More particularly, the film stress can be selectively controlled to either increase or decrease the stress of the resultant deposited film by selection and control of the formation of one or more middle layers of the multiple layer silicon nitride film. Thus, it is possible to control the stress of a particular multiple layer silicon nitride film by sequentially depositing various material layers as disclosed hereinabove. Additionally, the layers may advantageously be formed in a single processing reactor, thereby preventing contamination of the multiple layer silicon nitride film layers. After completion of the multiple layer silicon nitride film, additional processing may continue in the same or other process chambers to complete the formation of various devices on the substrate, for example, to continue fabrication of a FET device.

FIG. 4depicts a flow diagram illustrating a method400for fabricating a shallow trench isolation (STI) structure in a substrate utilizing one embodiment of a multiple layer silicon nitride film in accordance with one embodiment of the teachings disclosed above. In this example, the objective is to reduce the stress of the overall film stack. The method400includes various processing steps performed upon a substrate during fabrication of the STI structure. Sub-steps and auxiliary procedures well known in the art (e.g., process control sub-steps, lithographic routines, and the like) are omitted herein for the sake of clarity.

FIGS. 5A-Gtogether depict a series of schematic, cross-sectional views of a shallow trench isolation (STI) structure being formed in a substrate utilizing one embodiment of a multiple layer silicon nitride film using one embodiment of the method ofFIG. 4. In the embodiment depicted inFIGS. 5A-G, the STI structure is formed in a region of a substrate502disposed between adjacent devices (not shown), for example transistors, to be subsequently formed on the substrate502.

The cross-sectional views inFIGS. 5A-Grelate to individual processing steps performed to fabricate the STI structure in a substrate, for example, in connection with the fabrication of a field effect transistor (FET). As such, prior and subsequent processing steps that may be performed on the substrate, for example, in connection with the fabrication of the FET or other devices or structures upon a semiconductor substrate, are not shown. In addition, the images inFIGS. 5A-Gare not depicted to scale and are simplified for illustrative purposes. To best understand the invention, the reader should simultaneously refer to FIGS.4and5A-G.

The method400starts at step402and proceeds to step404, where a pad oxide layer504is formed on the substrate502, as depicted inFIG. 5A. The substrate502may be similar to the substrate200described above with respect toFIG. 2. Optionally, prior to forming the STI structure, the substrate502may be pretreated by selectively performing processes such as polishing, annealing, baking, etching, reduction, oxidation, halogenation, hydroxylation, and the like. In one embodiment, the substrate502is a crystalline silicon wafer.

The pad oxide layer504may be formed to a thickness of about 100 to 500 Angstroms from, e.g., silicon oxide (SiO2), silicon oxynitride (SiON), and the like. It is contemplated that other materials and thicknesses may be used to form the pad oxide layer504used in connection with fabrication of STI structures. The pad oxide layer504may be formed in any suitable reactor, for example the SiNgen® Plus LPCVD reactor. Examples of suitable processes for forming the pad oxide layer504are disclosed in U.S. Pat. No. 6,713,127, issued Mar. 30, 2004 to Subramony, et al. (hereinafter the '127 patent), which is hereby incorporated by reference in its entirety.

At step405a multiple layer silicon nitride film505is deposited over the pad oxide layer504, as depicted inFIG. 5B. The multiple layer silicon nitride film505is similar to the multiple layer silicon nitride film210disclosed above with reference toFIG. 2. In the embodiment depicted in FIGS.4and5A-G, the multiple layer silicon nitride film505comprises a base layer506formed atop the pad oxide layer504(step406), a middle layer407formed atop the base layer506(step407), and an upper layer508formed atop the middle layer507(step408).

At step406, the base layer506is deposited on the pad oxide layer504. The base layer506may be deposited to a thickness of about 500-2,500 Angstroms. In one embodiment, base layer506is deposited to a thickness of about 1162.5 Angstroms. It is contemplated that layers having other thicknesses may also be utilized.

The base layer506is generally similar to the base layer202described above with reference toFIG. 2. In addition, the base layer506may have a low-stress interface with the pad oxide layer504to facilitate reduction in dislocations of the substrate502, e.g., dislocations in the crystalline structure of a silicon substrate. The reduction in dislocations of the substrate502facilitates reduction in electrical leakage due to electron hopping along those dislocations in the substrate502. Examples of other chemistries and process conditions suitable for forming a base layer506having suitable characteristics for use in the fabrication of STI and other structures is disclosed in U.S. patent application Ser. No. 11/273,380, filed herewith by lyer, et al., and entitled “METHOD OF FABRICATING A SILICON NITRIDE STACK,” which is hereby incorporated by reference in its entirety.

At step407, the middle layer507is deposited over the base layer506. The middle layer507is similar to the middle layer204described above with respect toFIG. 2. In one embodiment, the middle layer507comprises carbon-doped silicon nitride and/or silicon carbide in order to further reduce the stress of the multiple layer silicon nitride film505, thereby further reducing the potential for dislocations forming in the substrate502. The middle layer507may be deposited to a thickness of about 100-2,000 Angstroms. In one embodiment, the middle layer507is deposited to a thickness of about 387.5 Angstroms. It is contemplated that layers having other thicknesses may optionally be utilized. Optionally, one or more additional layers (not shown) may be deposited between the base layer506and the upper layer508as described above with respect toFIG. 1.

At step408, the upper layer508is deposited over the base layer506. The upper layer508may be deposited to a thickness of about 100-2,000 Angstroms. The upper layer508is similar to the upper layer206described above with respect toFIG. 2. In one embodiment, upper layer508is deposited to a thickness of about 387.5 Angstroms. It is contemplated that layers having other thicknesses may optionally be utilized. The total thickness of the multiple layer silicon nitride film505is generally between about 500-2500 Angstroms.

Although the upper layer508may be formed using the process chemistries described above in reference to layer206, the process parameters utilized to form the upper layer508may be selectively controlled to form a film having a high oxidation resistance, for example, to facilitate resistance of the multiple layer silicon nitride film505to subsequent oxidation processes that may be performed in the STI structure fabrication process. In addition, the upper layer508may further be controlled to have a refractive index (RI) that is optimized, for example, to facilitate photoresist deposition and patterning and subsequent trench etching steps in the STI structure fabrication process. Examples of such process control are described in the previously incorporated U.S. patent application Ser. No. 11/273,380.

At step410, a photoresist layer510is deposited on the upper layer508and patterned to form an opening512, as depicted inFIG. 5C. The photoresist layer510may generally be formed to a thickness of about 2,000-8,000 Angstroms. However, it is contemplated that the thickness of the photoresist layer510may be any thickness suitable for subsequent processing and formation of the STI structure. The opening512is of a size and shape that corresponds to the region where the trench of the STI structure is to be formed. The photoresist layer510may deposited and patterned using conventional methods known in the art.

At step412, using the patterned photoresist layer510as a mask, a trench514is etched through the multiple layer silicon nitride film505and the pad oxide layer504and into the substrate502, as depicted inFIG. 5D. The trench514of the STI structure is generally about 2,000-4,000 Angstroms deep and about 1,000-3,000 Angstroms wide. However, it is contemplated that the depth and width of the trench514may be any suitable value for use as an STI structure. The trench514may be formed by conventional etch methods.

At step414, the exposed surfaces of the trench (e.g., the substrate502) are oxidized to form a trench liner516, as depicted inFIG. 5E. The trench liner516generally comprises a layer of silicon oxide formed on the exposed surfaces of the substrate502that define the boundaries of the trench514. The trench liner516is generally between about 50-200 Angstroms thick. However, it is contemplated that the thickness of the liner516may be any suitable value for use as a trench liner in an STI structure. The trench liner516may be formed by any suitable oxidation process, for example, an in-situ steam generation (ISSG) process in a rapid thermal processing (RTP) chamber, such as a RADOX™ chamber available from Applied Materials, of Santa Clara, Calif., or by furnace oxidation.

At step416, a layer of material518is deposited to fill the trench514, as depicted inFIG. 5F. The material518may comprise silicon oxide, boron and/or phosphorous doped silicon oxide, or the like. The material518is generally deposited in a manner that conformally coats the trench liner516and fills the trench514. The material518may be deposited by any suitable method such as chemical vapor deposition (CVD), spin-on coating, and the like, as is known in the art.

At step418, the excess material518, the multiple layer silicon nitride film505, and the pad oxide layer504are removed, leaving an STI structure500having an upper surface that is substantially flush with an upper surface of the substrate502. The excess material518, the multiple layer silicon nitride film505, and the pad oxide layer504may be removed by any suitable process, such as chemical mechanical polishing (CMP), etching, and the like.

Upon completion of step418, at step420, the method400ends. After completion of the STI structure500, additional processing may continue in the same or other process chambers to complete the formation of various devices on the substrate. For example, the substrate502having the STI structure500formed therein may undergo further processing to form transistors or other devices to be isolated from each other on either side of the STI structure500.

In another example, a stress-controlled, multiple-layer silicon nitride film having a high stress may be utilized to increase the stress induced on an underlying substrate. For example, a stress-controlled, multiple-layer silicon nitride film having a high stress may be formed in place of the nitride etch stop layers described in U.S. patent application Ser. No. 10/885,969, filed Jul. 6, 2004 by lyer, et al., and entitled, “SILICON NITRIDE FILM WITH STRESS CONTROL.”

FIG. 3depicts a schematic diagram of one exemplary LPCVD reactor300that may be used to practice portions of the method100ofFIG. 1. Other examples of suitable LPCVD reactors are described in U.S. patent application Ser. No. 10/911,208, filed Aug. 4, 2004 by lyer, et al., and U.S. patent application Ser. No. 11/147,938, filed Jun. 8, 2005 by Smith, et al. In the embodiment depicted inFIG. 3, the reactor300comprises a processing chamber301, a pumping system338, a gas panel336, a power source316, and a controller346.

The processing chamber301generally includes an upper assembly303, a bottom assembly308, and a pedestal lift assembly331. The upper assembly303generally comprises a lid310having an inlet port334and a showerhead344. The bottom assembly308houses a substrate support pedestal324and comprises a chamber body302having a wall306. A substrate access port328is formed in the chamber body302to facilitate entry and egress of a substrate322into and out of the processing chamber301. The pedestal lift assembly331is coupled to the substrate support pedestal324and comprises a lift mechanism330, a lift plate318and a set of lift pins314.

The substrate support pedestal324is disposed in an internal volume304of the processing chamber301and, during processing, supports the substrate322. The pedestal324includes a heater320configured to regulate the temperature of the substrate322and/or temperature in the internal volume304. The heater320is coupled to the power source316and capable of maintaining the substrate322at a temperature of up to about 800° C.

The showerhead344provides, through a plurality of openings354, distribution of gases or vapors delivered from the gas panel336. Size, geometry, number, and location of the openings354are selectively chosen to facilitate a predefined pattern of gas/vapor flow to the substrate322.

The gas panel336provides process chemicals, in liquid and/or gaseous form, to the processing chamber301. The gas panel336is coupled to the lid310using a plurality of gas lines340. Each gas line340may be selectively adapted for transferring specific chemical(s) from the gas panel336to the inlet port334, as well as be temperature controlled.

In operation, the pedestal lift assembly331controls the elevation of the pedestal324between a processing position (as shown inFIG. 3) and a lowered position from which the substrate322may transported, through the substrate access port328, into and out of the processing chamber301. The assembly331is sealingly coupled to the chamber body302using a flexible bellows332and, optionally, is configured to rotate the substrate support pedestal324.

The wall306may be thermally regulated. In one embodiment, a plurality of conduits312are disposed in the wall306and configured to circulate a heat transfer fluid regulating the temperature of the wall.

The pumping system338is coupled to a pumping port326formed in the wall306. The pumping system338generally includes a throttle valve and one or more pumps arranged to control the pressure in the internal volume304. Gases flowing out of the processing chamber301are routed through a pumping ring342to enhance gas flow uniformity across the surface of the substrate322. One such pumping ring is described in U.S. patent Ser. No. 10/911,208, filed Oct. 4, 2004, by lyer, et al., and entitled “Thermal Chemical Vapor Deposition of Silicon Nitride Using BTBAS Bis(Tertiary-Butylamino Silane) in a Single Wafer Chamber,” which is herein incorporated by reference.

In alternate embodiments (not shown), the reactor300may comprise a photoexcitation system delivering radiant energy to the substrate322through windows in the lid310, as well as a remote plasma source coupled to the inlet port334.

The system controller346generally comprises a central processing unit (CPU)350, a memory343, and support circuits352and is coupled to and controls modules and apparatuses of the reactor300. In operation, the controller346directly controls modules and apparatus of the system300or, alternatively, administers computers (and/or controllers) associated with these modules and apparatuses.

The invention may be practiced using other processes and/or processing apparatuses where parameters are adjusted to achieve acceptable characteristics by those skilled in the art without departing from the spirit of the invention.