VERTICAL CAVITY SURFACE EMITTING LASER DEVICE WITH AT LEAST ONE BONDING LAYER

In some implementations, a vertical cavity surface emitting laser (VCSEL) device includes a substrate; a first mirror disposed over the substrate; a bonding layer disposed over the first mirror; and an active region disposed over the bonding layer. The substrate is a gallium arsenide (GaAs) substrate, and the active region is an indium phosphide (InP)-based active region.

TECHNICAL FIELD

The present disclosure relates generally to a vertical cavity surface emitting laser (VCSEL) device and to a VCSEL device with at least one bonding layer.

BACKGROUND

A vertical-emitting laser device, such as a VCSEL, is a laser in which a beam is emitted in a direction perpendicular to a surface of a substrate (e.g., vertically from a surface of a semiconductor wafer). Multiple vertical-emitting devices may be arranged in an array with a common substrate.

SUMMARY

In some implementations, a VCSEL device includes a substrate; a first mirror disposed over the substrate; a bonding layer disposed over the first mirror; and an active region disposed over the bonding layer, wherein: the substrate is a gallium arsenide (GaAs) substrate, and the active region is an indium phosphide (InP)-based active region.

In some implementations, a die includes a GaAs substrate; and a plurality of individual epitaxial structures disposed on the substrate, wherein each epitaxial structure, of the plurality of individual epitaxial structures, comprises: a first mirror disposed over the substrate; a bonding layer disposed over the first mirror; and an InP-based active region disposed over the bonding layer.

In some implementations, a method of forming a VCSEL device includes forming a first epitaxial substructure on a GaAs substrate; forming a second epitaxial substructure on an InP substrate; attaching, using a bonding layer, the first epitaxial substructure to the second epitaxial substructure to form an epitaxial structure; and removing the InP substrate from the epitaxial structure.

DETAILED DESCRIPTION

A short-wave infrared (SWIR) vertical cavity surface emitting laser (VCSEL) device is configured to emit an output beam (e.g., an output laser beam) that has a wavelength in a near-infrared range (e.g., the wavelength of the output beam is in a range of 1200-1600 nanometers). Typically, a SWIR VCSEL includes a pair of reflectors (e.g., a pair of distributed Bragg reflectors (DBRs)) and an active region disposed between the pair of reflectors. The pair of reflectors and the active region may be formed over a substrate.

In many cases, an active region that comprises indium phosphide (InP) and that is grown on an InP substrate provides a desired optical gain (e.g., a high optical gain) for a SWIR VCSEL. However, due to a low index contrast for InP-based DBRs grown on an InP substrate, achieving a high reflectivity for DBRs that are monolithically grown on an InP substrate (e.g., with an InP-based active region) is challenging. This detrimentally impacts an optical performance of the SWIR VCSEL.

Further, in some cases a SWIR VCSEL can be formed using a conventional wafer fusion process. However, the conventional wafer fusion process requires specialized equipment that can apply high temperatures (e.g., greater than 200 degrees Celsius). Moreover, the conventional wafer fusion process is complex, which, in some cases, creates low quality layers and/or structures within the SWIR VCSEL. This introduces defects or allows defects to propagate through the SWIR VCSEL. This can degrade a performance, manufacturability, and/or a reliability of the SWIR VCSEL.

Some implementations described herein provide a VCSEL device (e.g., a SWIR VCSEL device) that includes a bonding layer that is configured to bond a first mirror (e.g., a non-InP-based mirror) to an InP-based active region. In some implementations, the VCSEL device includes an additional bonding layer that is configured to bond the InP-based active region to a second mirror (e.g., a non-InP-based mirror). In this way, the VCSEL device includes mirrors (e.g., gallium arsenide and/or aluminum gallium arsenide (GaAs/AlGaAs)-based DBRs) that have a high index contrast and therefore provide an increased reflectivity as compared to InP-based DBRs grown on an InP substrate. Further, the bonding layer and the additional bonding layer each comprise a polymer (e.g., an SU-8 photoresist polymer or a benzocyclobutene (BCB) polymer), or a similar material, that is transparent for light with wavelengths less than or equal to 1600 nanometers. The bonding layer and the additional bonding layer therefore do not impact an optical performance of the VCSEL device. Thus, the VCSEL device has an improved optical performance as compared to a typical SWIR VCSEL.

Some implementations described herein provide a multistage process for forming the VCSEL device. The multistage process includes forming a first epitaxial substructure on a GaAs substrate; forming a second epitaxial substructure on an InP substrate; attaching, using a bonding layer, the first epitaxial substructure to the second epitaxial substructure to form an epitaxial structure; and removing the InP substrate from the epitaxial structure. The first epitaxial substructure includes a first mirror (e.g., a first non-InP-based mirror), and the second epitaxial substructure includes an InP-based active region. In some implementations, the multistage process includes forming, after removing the InP substrate from the epitaxial structure, an additional bonding layer on a surface of the epitaxial structure, and forming a second mirror (e.g., a second non-InP-based mirror) on a surface of the additional bonding layer.

In this way, using a multistage process enables formation of high-quality layers and/or structures of independent epitaxial substructures. Further, forming and/or using the bonding layer to attach the first independent epitaxial substructure to the second epitaxial substructure is a low temperature process (e.g., less than or equal to 200 degrees Celsius), which decreases a likelihood that one or more layers of the first independent epitaxial substructure and/or the second epitaxial substructure are damaged during the attachment process. Accordingly, the multistage process enables formation of high-quality layers and/or structures within the VCSEL device, which reduces a likelihood of defects or of a propagation of defects through the VCSEL device. Therefore, using a multistage process to form a VCSEL device improves a performance, manufacturability, and/or a reliability of the VCSEL device, as compared to a typical SWIR VCSEL formed using a conventional wafer fusion process.

FIGS.1A-1Bare diagrams of different configurations of an example VCSEL device100described herein. The VCSEL device100may include, for example, a SWIR VCSEL device, an oxide confined VCSEL device, an implant confined VCSEL device, a mesa confined VCSEL device, a top emitting VCSEL device, or a bottom emitting VCSEL device. In some implementations, the VCSEL device100may be configured to emit an output beam (e.g., an output laser beam). For example, the device may be configured to emit an output beam that has a wavelength in a near-infrared range (e.g., the wavelength of the output beam is in a range of 1200-1600 nanometers).

In a first example configuration, as shown inFIG.1A, the VCSEL device100may include a substrate102, a first mirror104, a bonding layer106, a first n-type layer108, an active region110, a p-type layer112, a tunnel junction114, a second n-type layer116, an additional bonding layer118, a second mirror120, a set of first contacts122(shown inFIG.1Bas first contacts122-1and122-2), and/or a set of second contacts124(shown inFIG.1Bas second contacts124-1and124-2).

The substrate102may include a substrate upon which other layers and/or structures shown inFIG.1are formed. The substrate102may include a semiconductor material, such as GaAs, InP, germanium (Ge), and/or another type of semiconductor material. In some implementations, the substrate102may be an n-doped substrate, such as an n-type GaAs substrate, an n-type InP substrate, or an n-type Ge substrate.

The first mirror104may be disposed over the substrate102. For example, the first mirror104may be disposed on (e.g., directly on) a surface of the substrate102or on one or more intervening layers or structures (e.g., one or more spacers, one or more cladding layers, and/or other examples) between the substrate102and the first mirror104. The first mirror104may include a reflector, such as a dielectric DBR or a semiconductor DBR. For example, the first mirror104may include a set of alternating semiconductor layers, such as a set of alternating GaAs layers and aluminum gallium arsenide (AlGaAs) layers or a set of alternating AlGaAs layers with different percentages of aluminum (Al) (e.g., AlGaAs layers with a low Al percentage and AlGaAs layers with a high Al percentage). In some implementations, the first mirror104may be an n-doped mirror (e.g., an n-doped DBR). For example, the first mirror104may include a set of alternating n-doped GaAs (n-GaAs) layers and n-doped AlGaAs (n-AlGaAs) layers or a set of alternating n-doped AlGaAs layers with a low Al percentage (low Al n-AlGaAs) and n-doped AlGaAs layers with a high Al percentage (high Al n-AlGaAs).

The bonding layer106may be disposed over the first mirror104. For example, the bonding layer106may be disposed on (e.g., directly on) a surface of the first mirror104or on one or more intervening layers or structures (e.g., one or more spacers, one or more cladding layers, and/or other examples) between the first mirror104and the bonding layer106. The bonding layer106may comprise, for example, at least one of a polymer, such as an SU-8photoresist polymer or a BCB polymer; a metal material; or a silicon dioxide (SiO2) material. In some implementations, a thickness of the bonding layer106may be between a particular thickness range. For example, the thickness of the bonding layer106may be between10nanometers and 1.6 micrometers (e.g., greater than or equal to10nanometers and less than or equal to 1.6 micrometers). In some implementations, the bonding layer106may be configured to bond the first mirror104to the first n-type layer108or, alternatively, to the active region110(e.g., when the first n-type layer108is not present in the VCSEL device100).

The first n-type layer108may be disposed over the bonding layer106. For example, the first n-type layer108may be disposed on (e.g., directly on) a surface of the bonding layer106or on one or more intervening layers or structures (e.g., one or more spacers, one or more cladding layers, and/or other examples) between the bonding layer106and the first n-type layer108. The first n-type layer108may comprise, for example, at least one n-doped semiconductor layer, such as an n-doped InP (n-InP) layer.

The active region110may be disposed over the first n-type layer108and/or the bonding layer106. For example, the active region110may be disposed on (e.g., directly on) a surface of the first n-type layer108or on one or more intervening layers (e.g., one or more spacers, one or more cladding layers, and/or other examples) between the first n-type layer108and the active region110. As an alternative example, when the first n-type layer108is not present in the VCSEL device, the active region110may be disposed on (e.g., directly on) a surface of the bonding layer106or on one or more intervening layers (e.g., one or more spacers, one or more cladding layers, and/or other examples) between the bonding layer106and the active region110. The active region110may include one or more layers where electrons and holes recombine to emit light (e.g., as an output beam) and define an emission wavelength range of the VCSEL device100. For example, the active region110may include one or more quantum wells, such as at least one InP-based quantum well (e.g., at least one quantum well comprising InP and/or at least one of indium gallium arsenide phosphide (InGaAsP) and/or indium aluminum gallium arsenide (InAlGaAs), among other examples), and/or one or more quantum dot layers, such as at least one InP-based quantum dot layer (e.g., at least one quantum dot layer comprising InP and/or at least one of InGaAsP and/or InAlGaAS, among other examples). Accordingly, in some implementations, the active region110may be an InP-based active region.

The p-type layer112may be disposed over the active region110. For example, the p-type layer112may be disposed on (e.g., directly on) a surface of the active region110or on one or more intervening layers or structures (e.g., one or more spacers, one or more cladding layers, and/or other examples) between the active region110and the p-type layer112. The p-type layer112may comprise, for example, at least one p-doped semiconductor layer, such as a p-doped InP (p-InP) layer.

The tunnel junction114may be disposed over the p-type layer112. For example, the tunnel junction114may be disposed on (e.g., directly on) a surface of the p-type layer112or on one or more intervening layers between the p-type layer112and the tunnel junction114. In some implementations, the tunnel junction114may include a set of highly doped alternating semiconductor layers, such as a set of alternating highly n-doped semiconductor layers and highly p-doped semiconductor layers. For example, the tunnel junction114may include a set of alternating highly n-doped In-based layers (e.g., highly n-doped InP (n−-InP) layers and/or highly n-doped InGaAs (n−-InGaAs) layers), and highly p-doped In-based layers (e.g., highly p-doped InGaAlAs (p+-InGaAlAs) layers and/or highly p-doped InAlAs (p+-InAlAs) layers).

The second n-type layer116may be disposed over the tunnel junction114. For example, the second n-type layer116may be disposed on (e.g., directly on) a surface of the tunnel junction114or on one or more intervening layers or structures (e.g., one or more spacers, one or more cladding layers, and/or other examples) between the tunnel junction114and the second n-type layer116. Additionally, in some implementations, the second n-type layer116may be disposed over the p-type layer112(e.g., when the tunnel junction114is disposed over a particular portion of the tunnel junction114). For example, the second n-type layer116may be disposed on (e.g., directly on) one or more other portions (e.g., that does not include the particular portion) of the surface of the p-type layer112. The second n-type layer116may comprise, for example, at least one n-doped semiconductor layer, such as an n-doped InP (n-InP) layer.

The additional bonding layer118may be disposed over the second n-type layer116. For example, the additional bonding layer118may be disposed on (e.g., directly on) a surface of the second n-type layer116or on one or more intervening layers or structures (e.g., one or more spacers, one or more cladding layers, and/or other examples) between the second n-type layer116and the additional bonding layer118. The additional bonding layer118may comprise, for example, at least one of a polymer, such as an SU-8 photoresist polymer or a BCB polymer; a metal material; or an SiO2material. In some implementations, a thickness of the additional bonding layer118may be between a particular thickness range. For example, the thickness of the additional bonding layer118may be between 10 nanometers and 1.6 micrometers (e.g., greater than or equal to 10 nanometers and less than or equal to 1.6 micrometers). In some implementations, the additional bonding layer118may be configured to bond the second n-type layer116to the second mirror120(e.g., when the second mirror120is a semiconductor DBR, as described herein).

The second mirror120may be disposed over the additional bonding layer118. For example, the second mirror120may be disposed on (e.g., directly on) a surface of the additional bonding layer118or on one or more intervening layers or structures (e.g., one or more spacers, one or more cladding layers, and/or other examples) between the additional bonding layer118and the second mirror120. The second mirror120may include a reflector, such as a semiconductor DBR. For example, the second mirror120may include a set of alternating semiconductor layers, such as a set of alternating GaAs layers and AlGaAs layers or a set of alternating AlGaAs layers with different percentages of Al (e.g., AlGaAs layers with a low Al percentage and AlGaAs layers with a high Al percentage). In some implementations, the second mirror120may be an n-doped mirror (e.g., an n-doped DBR). For example, the second mirror120may include a set of alternating n-doped GaAs (n-GaAs) layers and n-doped AlGaAs (n-AlGaAs) layers or a set of alternating n-doped AlGaAs layers with a low Al percentage (low Al n-AlGaAs) and n-doped AlGaAs layers with a high Al percentage (high Al n-AlGaAs).

Alternatively, in some implementations, the second mirror120may include a dielectric DBR and, therefore, the additional bonding layer118may not be included in the VCSEL device100(e.g., because the additional bonding layer118is not needed to bond the second n-type layer116to the second mirror120). Accordingly, the second mirror120may be disposed over the second n-type layer116. For example, the second mirror120may be disposed on (e.g., directly on) a surface of the second n-type layer116or on one or more intervening layers or structures (e.g., one or more spacers, one or more cladding layers, and/or other examples) between the second n-type layer116and the second mirror120.

The set of first contacts122may comprise one or more n-type contacts. In some implementations, each of the set of first contacts122may be disposed over the first n-type layer108. For example, a first contact122(e.g., first contact122-1or first contact122-2, as shown inFIG.1A) may be disposed on (e.g., directly on) a surface of the first n-type layer108(e.g., a portion of the surface of the first n-type layer108on which the active region110is not disposed) or on one or more intervening layers (e.g., one or more spacers, one or more cladding layers, and/or other examples) between the first n-type layer108and the first contact122. In some implementations, each of the set of first contacts122may be an n-doped semiconductor structure, such as an n-doped InP (n-InP) structure and/or an n-doped InAlAs (n-InAlAs) structure. Each of the set of first contacts122may facilitate an electrical connection with the VCSEL device100.

The set of second contacts124may comprise one or more p-type contacts. In some implementations, each of the second contacts124may be disposed over the second n-type layer116. For example, a second contact124(e.g., second contact124-1or second contact124-2, as shown inFIG.1A) may be disposed on (e.g., directly on) a surface of the second n-type layer116(e.g., a portion of the surface of the second n-type layer116on which the additional bonding layer118and/or the second mirror120is not disposed) or on one or more intervening layers (e.g., one or more spacers, one or more cladding layers, and/or other examples) between the second n-type layer116and the second contact124. In some implementations, each of the set of second contacts124may be an n-doped semiconductor structure, such as an n-doped InP (n-InP) structure and/or an n-doped InAlAs (n-InAlAs) structure. Each of the set of second contacts124may facilitate an electrical connection with the VCSEL device100.

In a second example configuration, as shown inFIG.1B, the VCSEL device100may include the substrate102, the first mirror104, the bonding layer106, the first n-type layer108, the active region110, the p-type layer112, the tunnel junction114, the second n-type layer116, the additional bonding layer118, the second mirror120, the set of first contacts122(shown inFIG.1Bas first contacts122-1and122-2), and/or the set of second contacts124(shown inFIG.1Bas second contacts124-1and124-2). Additionally, the VCSEL device100may include a set of vias126(shown inFIG.1Bas via126-1and126-2) and/or a metal layer128.

As shown inFIG.1B, the set of vias126may each be formed in the substrate102, the first mirror104, the bonding layer106, and the first n-type layer108. In some implementations, a first contact122, of the set of first contacts122, may be disposed within an interior portion of a via126, of the set of vias126. For example, as shown inFIG.1B, a first contact122(e.g., first contact122-1or first contact122-2) may be disposed on one or more interior walls of a corresponding via126(e.g., via126-1or via126-2) such that the first contact122contacts the substrate102, the first mirror104, the bonding layer106, and the first n-type layer108.

As further shown inFIG.1B, the metal layer128may be disposed over the substrate102. For example, the metal layer128may be disposed on (e.g., directly on) a surface of the substrate102(e.g., on a surface different than the surface on which the first mirror104is disposed) or on one or more intervening layers or structures (e.g., one or more spacers, one or more cladding layers, and/or other examples) between the substrate102and the metal layer128. The metal layer128may comprise a metal layer, such as a gold (Au) layer, and/or a metal alloy layer, such as a gold-zinc (Au—Zn) layer, among other examples, through which electrical current may flow. In some implementations, the metal layer128may be n-doped and may be configured as a cathode (e.g., an n-metal cathode) for the VCSEL device100(e.g., when the substrate102is an n-doped substrate and the VCSEL device is configured as shown inFIG.1B).

In some implementations, multiple VCSEL devices may be included in a single die (e.g., a die that comprises an array of VCSEL devices). For example, the die may include a plurality of VCSEL devices that share a common substrate102. That is, the die may comprise the substrate102and may comprise, disposed on respective regions of a surface of the substrate102, individual epitaxial structures that include the first mirror104, the bonding layer106, the first n-type layer108, the active region110, the p-type layer112, the tunnel junction114, the second n-type layer116, the additional bonding layer118, the second mirror120, the set of first contacts122, and/or the set of second contacts124arranged in a same or similar configuration as described herein in relation toFIGS.1A-1B. In some implementations, each epitaxial structure includes the set of vias126, and the metal layer128may be disposed over a surface of the common substrate102(e.g., that is different than the surface of the common substrate102on which the individual epitaxial structures are disposed) in a similar manner as described herein in relation toFIG.1B.

As indicated above,FIGS.1A-1Bare provided as an example. Other examples may differ from what is described with regard toFIGS.1A-1B. In practice, the VCSEL device100(and a die that includes multiple VCSEL devices) may include additional layers and/or structures, fewer layers and/or structures, different layers and/or structures, or differently arranged layers and/or structures than those shown inFIGS.1A-1B. Further, in some implementations, structures and layers shown inFIGS.1A-1Bare respectively shown as continuously formed over other structures and layers and having a uniform thickness. In practice, the structures and layers may be non-continuously formed over other structures and layers and/or may have non-uniform thicknesses.

FIGS.2A-2Bare diagrams of an example implementation200of a multistage process for forming a VCSEL device (e.g., a VCSEL device that is the same as, or similar to, the VCSEL device100described herein in relation toFIGS.1A-1B). As shown inFIGS.2A-2B, the multistage process may include a first formation process202, a second formation process204, an attachment process206, a removal process208, and/or a third formation process210.

As shown inFIG.2A, the multistage process includes forming a first epitaxial substructure212on a substrate214(e.g., that is the same as, or similar to, the substrate102described herein in relation toFIGS.1A-1B) during the first formation process202. The first formation process202may include, for example, a molecular beam epitaxy (MBE) process, a metal-organic chemical vapor deposition (MOCVD) process, and/or another similar formation process. As shown inFIG.2A, the first epitaxial substructure212may include a first mirror216(e.g., that is the same as, or similar to, the first mirror104described herein in relation toFIGS.1A-1B). Accordingly, the first formation process202may be used to form the first mirror216over the substrate214.

As further shown inFIG.2A, the multistage process includes forming a second epitaxial substructure218on a substrate220during the second formation process204. The second formation process204may include, for example, an MBE process, an MOCVD process, and/or another similar formation process. The substrate220may include a substrate upon which the second epitaxial substructure218is formed. The substrate220may include a semiconductor material, such as GaAs, InP, Ge, and/or another type of semiconductor material. In some implementations, the substrate220may be an n-doped substrate, such as an n-type GaAs substrate, an n-type InP substrate, or an n-type Ge substrate. As further shown inFIG.2A, the second epitaxial substructure218may include a first n-type layer222, an active region224, a p-type layer226, a tunnel junction228, and/or a second n-type layer230(e.g., that are respectively the same as, or similar to, the first n-type layer108, the active region110, the p-type layer112, the tunnel junction114, and/or the second n-type layer116described herein in relation toFIGS.1A-1B). Accordingly, the second formation process204may be used to form the second n-type layer230over the substrate220, the tunnel junction228over the second n-type layer230, the p-type layer226over the tunnel junction228, the active region224over the p-type layer226, and/or the first n-type layer222over the active region224.

In some implementations, the first formation process202and the second formation process204may be performed contemporaneously (e.g., some or all of the first formation process202may be performed when the second formation process204is performed) or separately (e.g., the first formation process202may be performed prior to performance of the second formation process204, or vice versa).

As further shown inFIG.2A, the multistage process includes forming an epitaxial structure232by attaching the first epitaxial substructure212to the second epitaxial substructure218during the attachment process206. The attachment process206may include orientating the first epitaxial substructure212to the second epitaxial substructure218to cause a “top” surface of the first epitaxial substructure212(e.g., a surface of the first mirror216) to face a “top” surface of the second epitaxial substructure218(e.g., a surface of the first n-type layer222). For example, as shown inFIG.2A, the second epitaxial substructure218may be “turned” or “flipped” to cause the surface of the first mirror216of the first epitaxial substructure212to face the surface of the first n-type layer222of the second epitaxial substructure218. In an additional, or alternative, example, the first epitaxial substructure212may be “turned” or “flipped” to cause the surface of the first mirror216of the first epitaxial substructure212to face the surface of the first n-type layer222of the second epitaxial substructure218.

In some implementations, the attachment process206may include cleaning a surface of the first epitaxial substructure212. For example, the attachment process206may include cleaning the surface of the first mirror216of the first epitaxial substructure212using a spin cleaning process, a plasma cleaning process, an etching process, or a similar process. As further shown inFIG.2A, the attachment process206may include forming a bonding layer234(e.g., that is the same as, or similar to, the bonding layer106described herein in relation toFIGS.1A-1B) on the surface of first epitaxial substructure212. For example, the attachment process206may include spin coating the surface of the first mirror216with the bonding layer234(e.g., after cleaning the surface of the first mirror216). Further, the attachment process206may include disposing the second epitaxial substructure218on the bonding layer234. For example, the attachment process206may include disposing the surface of the first n-type layer222of the second epitaxial substructure218(e.g., after “turning” or “flipping” the second epitaxial substructure218) on the bonding layer234. In this way, the first epitaxial substructure212may be attached to the second epitaxial substructure218to form the epitaxial structure232.

Alternatively, in some implementations, the attachment process206may include cleaning a surface of the second epitaxial substructure218. For example, the attachment process206may include cleaning the surface of the first n-type layer222of the second epitaxial substructure218using a spin cleaning process, a plasma cleaning process, an etching process, or a similar process. The attachment process206then may include forming the bonding layer234on the surface of the second epitaxial substructure218. For example, the attachment process206may include spin coating the surface of the first n-type layer222with the bonding layer234(e.g., after cleaning the surface of the first n-type layer222). Further, the attachment process206may include disposing the first epitaxial substructure212on the bonding layer234. For example, the attachment process206may include disposing the surface of the first mirror216of the first epitaxial substructure212(e.g., after “turning” or “flipping” the first epitaxial substructure212) on the bonding layer234. In this way, the first epitaxial substructure212may be attached to the second epitaxial substructure218to form the epitaxial structure232.

In some implementations, after disposing the first epitaxial substructure212or the second epitaxial substructure218on the bonding layer234, the attachment process206may include applying compressive pressure on the first epitaxial substructure212and/or the second epitaxial substructure218. For example, the attachment process206may include pushing at least one of the first epitaxial substructure212or the second epitaxial substructure218towards the other when the bonding layer234is drying, curing, and/or setting. Additionally, or alternatively, after disposing the first epitaxial substructure212or the second epitaxial substructure218on the bonding layer234, the attachment process206may include applying heat to at least one of the first epitaxial substructure212, the second epitaxial substructure218, or the bonding layer234. For example, the attachment process206may include applying heat, wherein a temperature of the applied heat is within a range of 100 to 200 degrees Celsius (e.g., greater than or equal to 100 degrees Celsius and less than or equal to 200 degrees Celsius). In this way, the attachment process206may cause the first epitaxial substructure212to bond to the second epitaxial substructure218(or may increase a strength of the bond between the first epitaxial substructure212and the second epitaxial substructure218) to form the epitaxial structure232. Further, this may improve a durability and/or a structural integrity of the epitaxial structure232.

After completion of the attachment process206, as further shown inFIG.2A, the epitaxial structure232may include the first mirror216formed over the substrate214, the bonding layer234formed over the first mirror216, the first n-type layer222formed over the bonding layer234, the active region224formed over the first n-type layer222, the p-type layer226formed over the active region224, the tunnel junction228formed over the p-type layer226, the second n-type layer230formed over the tunnel junction228, and the substrate220formed over the second n-type layer230.

As shown inFIG.2B, the multistage process may include removing a portion of the epitaxial structure232during the removal process208. In some implementations, the removal process208may include removing the substrate220from the epitaxial structure232. For example, the removal process208may include removing the substrate220from the epitaxial structure232using an etching process (e.g., that includes etching the substrate220to remove the substrate220from the epitaxial structure232).

As further shown inFIG.2B, the multistage process may include forming an additional bonding layer236and/or a second mirror238(e.g., that are respectively the same as, or similar to, the additional bonding layer118and/or the second mirror120described herein in relation toFIGS.1A-1B) over the epitaxial structure232during the third formation process210.

In an example, such as when the second mirror238is a semiconductor DBR, the third formation process210may be used to form the additional bonding layer236and the second mirror238over the epitaxial structure232. Accordingly, the third formation process210may include forming the additional bonding layer236on a surface of the epitaxial structure232(e.g., the surface of the epitaxial structure232that was exposed by removing the substrate220from the epitaxial structure232). For example, the attachment process206may include spin coating a surface of the second n-type layer230with the additional bonding layer236(e.g., after cleaning the surface of the second n-type layer230in a similar manner as elsewhere described herein). Further, the third formation process210may include forming the second mirror238on the additional bonding layer236. For example, the third formation process210may include using an MBE process, an MOCVD process, and/or another similar formation process to form the second mirror238on a surface of the additional bonding layer236. In this way, the second mirror238may be attached to the epitaxial structure232. In some implementations, the third formation process210includes applying compressive pressure and/or heat may to the epitaxial structure232in a similar manner as that described elsewhere herein. In this way, the third formation process210may cause the second mirror238to bond to the second n-type layer230(or may increase a strength of the bond between the second mirror238to bond to the second n-type layer230) to modify the epitaxial structure232. Further, this may improve a durability and/or a structural integrity of the epitaxial structure232.

As an alternative example, such as when the second mirror238is a semiconductor DBR, the third formation process210may be used to form the second mirror238over the epitaxial structure232(e.g., without formation of the additional bonding layer236). Accordingly, the third formation process210may include forming the second mirror238on the surface of the second n-type layer230. For example, the third formation process210may include using an MBE process, an MOCVD process, and/or another similar formation process to form the second mirror238on the surface of the second n-type layer230. In this way, the second mirror238may be formed over the second n-type layer230and therefore may be included in the epitaxial structure232.

In some implementations, the multistage process may include one or more additional processes. For example, after completion of the third formation process210, an additional formation process (e.g., that includes using an MBE process, an MOCVD process, and/or another similar formation process) may be used to form a set of first contacts and/or a set of second contacts (e.g., that are respectively the same as, or similar to, the set of first contacts122and/or the set of second contacts124described herein in relation toFIGS.1A-1B) on the epitaxial structure232. The additional formation process may include, for example, forming the set of first contacts on respective portions of a surface the first n-type layer222and/or forming the set of second contacts on respective portions of a surface of the second n-type layer230.

As an alternative example, after completion of the third formation process210, another additional formation process (e.g., that includes using an MBE process, an MOCVD process, and/or another similar formation process; that includes using an etching process; that includes a metallization process; and/or other another process) may be used to form a set of vias, a set of first contacts, a set of second contacts, and/or a metal layer (e.g., that are respectively the same as, or similar to, the set of vias126, the set of first contacts122, the set of second contacts124, and/or the metal layer128described herein in relation toFIGS.1A-1B) on the epitaxial structure232. The other additional formation process may include etching the set of vias in the epitaxial structure232(e.g., where each via is formed in the substrate214, the first mirror216, the bonding layer234, and the first n-type layer222of the epitaxial structure232) and respectively forming the set of first contacts within the set of vias. The other additional formation process may include forming the set of second contacts on respective portions of a surface of the second n-type layer230and/or forming the metal layer on a surface of the substrate214(e.g., a surface of the substrate214on which the epitaxial structure232is not disposed).

As indicated above,FIGS.2A-2Bare provided as an example. Other examples may differ from what is described with regard toFIGS.2A-2B. In practice, the multistage process may include forming additional layers and/or structures, fewer layers and/or structures, different layers and/or structures, or differently arranged layers and/or structures than those shown inFIGS.2A-2B.