Insulating substrate and semiconductor device using same

In order to address the problem in that, by increasing the gate resistance of a power semiconductor element, while variation of switching time can be controlled, loss due to the gate resistance becomes larger and power efficiency for the entire system is lowered, the present invention provides an insulating substrate capable of uniformizing switching speeds of circuit elements while suppressing influence on power efficiency of the circuit elements. In the insulating substrate according to the present invention, part of a wiring layer is formed as a control signal circuit layer, and part of the control signal circuit layer is formed as a resistance layer that increases input resistance when the circuit element receives a control signal.

TECHNICAL FIELD

The present disclosure relates to an insulating substrate.

BACKGROUND ART

Power semiconductor elements such as IGBT (Insulated Gate Bipolar Transistor), power MOSFET transistor (Metal Oxide Semiconductor Field Effect Transistor), or MOSGTO (MOS Gate Turn-off Thyristor) are commonly known. These power semiconductor elements control electric power by inputting a signal for controlling the element into a gate to turn on/off the element.

The gate of power semiconductor element is connected with a wire formed on an insulating substrate. A control signal is inputted into the gate via the wire. If a plurality of power semiconductor elements is connected with the wire in parallel, it is typically assumed that those power semiconductor elements will be simultaneously turned on/off. However, if a switching speed of any one of those power semiconductor elements is different from that of others, the electric current is concentrated on a semiconductor element that turns on prior to other elements, or on a semiconductor element that delays in switching to off-state. Then the lifespan of such element will be more likely to be decreased, or such element will be more likely to be broken.

The switching time of semiconductor element is increased if the gate resistance is increased, and the switching time of semiconductor element is decreased if the gate resistance is decreased. Therefore, by increasing the gate resistance, it is possible to adjust the switching speed so that the difference in on/off timing between elements will be decreased. In some cases, in addition to the gate resistance of semiconductor element, a gate resistance component which is formed as a chip component is provided between the wire and the gate terminal, so that the switching times of each semiconductor element do not significantly vary due to variation in gate resistance within the semiconductor element.

Patent Literature 1 listed below describes a technique for adjusting gate resistance. In Patent Literature 1, a part of terminal connected to a gate electrode is formed with a material which has large specific resistance, and a sectional area size of that part or a length of that part is adjusted, thereby adjusting the gate resistance. Patent Literature 2 listed below describes a configuration example where a stack structure is formed on a sintered substrate, on which a glass powder paste and a metal paste are sintered.

CITATION LIST

Patent Literature

PTL 1: JP Patent Publication 2012-084621 A

PTL 2: JP Patent Publication 2012-033664 A

SUMMARY OF INVENTION

Technical Problem

In the technique described in Patent Literature 1, it is possible to adjust the variation in switching time by increasing the gate resistance of power semiconductor element. On the other hand, the loss due to the gate resistance is also increased, which causes a problem where overall electric power efficiency of the system is decreased.

The present disclosure is made in the light of the technical problem above. It is an objective of the present disclosure to provide an insulating substrate that is capable of suppressing an effect of circuit element (such as power semiconductor element) on electric power efficiency, while aligning switching speeds between circuit elements.

Solution to Problem

In an insulating substrate according to this disclosure, a part of a wire layer is formed as a control signal circuit layer, and a part of the control signal circuit layer is formed as a resistance layer that increases an input resistance when a circuit element receives a control signal.

An insulating substrate according to this disclosure comprises: a heat dissipation layer;

a wire layer on which a wire is formed, the wire being connected with a first and a second circuit elements; and

an insulating layer that electrically insulates between the wire layer and the heat dissipation layer,

wherein a part of the wire layer is formed as a control signal circuit layer that propagates a control signal to the first and the second circuit elements, and

wherein a part of the control signal circuit layer is formed as a resistance layer that increases an input resistance when the first and the second circuit elements receive the control signal.

The resistance layer may be formed, as a part of a signal wire forming a signal propagation path for the control signal circuit layer, integrally with the signal wire.

The control signal circuit layer may be formed with a material including silicon oxide, and

the resistance layer may be formed with a material including metal oxide.

The control signal circuit layer may be formed with a material including ceramics, and

the resistance layer may be formed with a material including metal oxide.

A difference between an input resistance of the first circuit element and an input resistance of the second circuit element may be smaller than a difference between resistances of portions of signal wires forming a signal propagation path of the control signal circuit layer excluding the resistance layer.

The resistance layer may have a resistance that causes the input resistance of the first circuit element being same as the input resistance of the second circuit element.

At least one of the first circuit element or the second circuit element may have an electric power terminal that outputs electric power, and

a coil may be formed at a part of the wire layer, the coil being disposed to surround the electric power terminal.

A signal wire that propagates the control signal may be formed inside the control signal circuit layer, and

the signal wire may be formed at a portion that overlaps with the first and the second circuit elements along a stacking direction of the heat dissipation layer, of the insulating layer, and of the wire layer.

The first and the second circuit elements may be electrically connected with the control signal circuit layer in parallel to each other.

The insulating layer may be formed with a ceramics material.

A semiconductor device according to this disclosure comprises the first and the second circuit elements formed on the insulating substrate,

wherein the first and the second circuit elements are configured as semiconductor elements.

Advantageous Effects of Invention

With the insulating substrate according to this disclosure, it is possible to suppress a decrease in electric power efficiency due to increased gate resistance, while aligning switching speeds between circuit elements.

DESCRIPTION OF EMBODIMENTS

Hereinafter, for the sake of readily understanding this disclosure, a configuration of conventional insulating substrate and its technical problem will be described firstly. Then a configuration of insulating substrate according to this disclosure will be described.

FIG. 1is a perspective view illustrating a configuration of a conventional insulating substrate. The insulating substrate is an insulating substrate that equips a semiconductor element40. The semiconductor element40is, for example, a semiconductor element that converts electric power. The semiconductor element40may be controlled by inputting a control signal via a gate terminal42. The terminal41is a terminal that outputs electric power.

The insulating substrate includes a heat dissipation layer10, an insulating layer20, and a wire layer30. A control signal input circuit31ais formed on the wire layer30. The control signal input circuit31aincludes a wire32a. A control signal is inputted to the gate terminal42via the wire32aand a bonding wire33. Each of the semiconductor elements40is connected with the control signal input circuit31ain parallel to each other.

The control signal input circuit31amay further include a resistor34on the wire32a, so as to align switching speeds between each of the semiconductor elements40. The resistor34is, for example, a chip-like independent electric component.

If the resistor34is a chip component that is provided as a finished product, it is difficult to individually refine resistances of each of resistors34. Then a resistor that has a large resistance may be selected as the resistor34in some cases, so as to suppress a difference of switching speeds between each of the semiconductor elements40below ignorable level. This is because a large resistance decreases switching speed, thereby suppressing the difference of switching speeds within a range that can be relatively ignored.

In such cases, however, there arises a technical problem that an overall electric power efficiency of the system including the semiconductor elements40is decreased. In addition, it is necessary to keep an implementation area size for providing chip components. It restricts the overall size of the insulating substrate1. In addition, when such implementation area size is assured, the wire32ais elongated and thus its resistance is increased further.

Instead of using the chip-like resistor34, a part of the gate terminal may be formed with a material that has a large specific resistance, and length or width of the material portion may be adjusted, thereby adjusting the resistance. In such cases, it is necessary for increasing the resistance to elongate the resistance portion or to narrow the width. If the gate length itself is elongated, the overall size of the insulating substrate is also increased. Then it is necessary to bend the terminals into spiral form, for example, thereby suppressing the gate terminal length. In addition, it is not desirable to narrow the gate terminal width because narrowing the gate terminal width may decrease rigidity of the terminal and reliability of gate terminal or of the connection portion may be decreased due to thermal loads. Further, in order to finely control switching of the semiconductor element40, it is necessary to increase the switching frequency. However, increasing the terminal length or decreasing the terminal width may cause increase in inductance of wires, which renders it difficult to finely control the semiconductor element40at high frequency.

In the light of above, this disclosure attempts to suppress an implementation area size of the resistance portion provided at outside of semiconductor element, by forming the resistance for adjusting switching speed integrally with the wire. In addition, this disclosure attempts to process the resistance layer after formed to finely adjust the resistance, by forming the resistance layer as a part of the wire.

FIG. 2is a perspective view illustrating a configuration of an insulating substrate1according to an embodiment 1. The heat dissipation layer10is formed at a surface of the insulating layer20, and the wire layers30aand30bare formed at another surface of the insulating layer20. The insulating layer20has a role for electrically insulating between the heat dissipation layer10and the wire layers30a,30b. A part of the wire layers30aand30bis formed as a control signal input circuit31. The control signal input circuit31includes a wire32and a connection terminal35. The connection terminal35is a terminal for connecting the wire32with the semiconductor element40(refer toFIG. 4). The insulating layer20may be formed using ceramics materials such as Al2O3, AlN, or Si3N4, for example.

FIG. 3is a perspective view illustrating an internal structure of the control signal input circuit31. A part of the wire32is formed as a resistance layer36. By adjusting a resistance of the resistance layer36so that resistances (input resistance with respect to gate electrode) between a circuit that outputs a control signal to the control signal input circuit31and the gate electrodes of each of the semiconductor elements40are same with each other, it is possible to align the switching speeds between each of the semiconductor elements40. A gate terminal42is a terminal that connects the gate electrode in the semiconductor element40with outside of the element. The resistance between the gate electrode and the gate terminal42is sufficiently small, and thus may be ignored.

When forming the control signal input circuit31: a paste including glass powder is placed on the insulating layer20; a metal paste (e.g. a paste in which Cu or Ag is mixed with glass powders) is printed on the glass powder paste for forming the wire32; a metal oxide paste (e.g. a paste including RuO2and glass powder) is printed on the metal paste for forming the resistance layer36. Then the insulating layer20/the glass powder paste/the metal paste/the metal oxide paste are collectively sintered. Accordingly, it is possible to integrally form the insulating layer20and the control signal input circuit31.

In the process for sintering the insulating layer20and the control signal input circuit31, the glass powder/the metal (the wire32)/the metal oxide (the resistance layer36) forming the control signal input circuit31are also integrally formed. Accordingly, the resistance layer36is integrally formed with the wire32as a part of the wire32. Therefore, it is not necessary to additionally provide a resistor configured as a chip component.

When finely adjust the resistance of the resistance layer36, the control signal input circuit31is firstly formed without covering the resistance layer36, as shown inFIG. 3. Then by adjusting length of the resistance layer36or width of the resistance layer36using such as laser processing, it is possible to finely adjust the resistance. If the wire32or the resistance36is to be covered, it is possible to cover the wire32and the resistance layer36as shown inFIG. 2, by placing glass powder pastes on the substrate after finely adjusted and by sintering the substrate again.

A desirable material of the glass powder is a material that can be stacked on a ceramics substrate for forming the insulating layer20and then can be sintered. Examples of such material may be those that contain silicon oxide, such as (a) a glass powder that contains SiO2, B2O3, and alkali metal oxide, (b) a glass powder that contains SiO2, B2O3, Al2O3, and alkaline earth metal oxide, (c) a glass powder that contains SiO2, B2O3, and alkali earth metal oxide, (d) a glass powder that contains SiO2, B2O3, ZrO2, and alkali metal oxide, (e) a glass powder that contains SiO2, alkali metal oxide, and alkali earth metal oxide.

FIG. 4is an internal view illustrating a state where the semiconductor element40is implemented on the insulating substrate1. For the sake of explanation, the figure shows a state where parts of components are removed so that the internal structure can be seen. This example shows an implementation where a stack structure of the heat dissipation layer10/the insulating layer20/the wire layers30aand30bshown inFIGS. 2-3(including the component31) is overlapped with a stack structure of the heat dissipation layer10/the insulating layer20/the wire layer30(without the component31, including the semiconductor element40).

The wire32is connected with the gate terminal42via the connection terminal35. A layer, which is formed by sintering glass powders, is formed around the wire32, thereby the control signal input circuit31is formed as a layer forming a part of the wire layers30aand30b. The glass portion around the wire32has a role to insulate the wire32from the wire layers (30a,30b) at both sides of the wire32. The terminal41is electrically connected with the wire layers30aand30b. The terminal41outputs electric power via the wire layers30aand30b.

The wire32is formed overlapping with two adjacent semiconductor elements40in the stacking direction of the insulating substrate1. In other words, the wire32is arranged crossing the opposing sides of two adjacent semiconductor elements40. Accordingly, comparing to the structure where the control signal input circuit31is disposed between two semiconductor elements40as shown inFIG. 1, the two semiconductor elements inFIG. 4are disposed closer to each other. Therefore, the length of the wire32can be shorter than that ofFIG. 1. Thus the overall size of the insulating substrate1can be smaller and the electric resistance of the wire32can be suppressed.

An bonding agent for connecting between the gate terminal42and the connection terminal35and for connecting between the terminal41and the wire layers30a,30bmay be such as: (a) solders using such as Sn, Ag, Cu, In, Sb, or Pb; (b) bonding materials using nano-size particles of such as Ag, Cu, Au, or Ni; (c) oxides of Ag particles, Cu particles, or Ni particles in sub-micron size.

The control signal input circuit may be formed using a material including ceramics powders. For example, in the configuration of the embodiment 1, alumina powders may be used instead of glass powders. However, it is more desirable to use glass powder pastes and metal pastes as in the embodiment 1, because it is possible to form the control signal circuit layer by simultaneously performing the sintering process to stably form the circuit layer.

Comparing to the difference of resistance between signal wires (excluding the resistance layer) forming the signal propagation path of the control signal circuit layer, it is more beneficial if the difference between input resistances of the circuit element is as small as possible. For example, it is better if the difference between an input resistance of a first one of the semiconductor element40and an input resistance of a second one of the semiconductor element40is as smaller as possible than a difference between a resistance of signal wire connected with the first one of the semiconductor element40and a resistance of signal wire of the second one of the semiconductor element40. Accordingly, in the embodiment 1, the resistance of the resistance layer36is adjusted so that resistances between a circuit outputting a control signal to the control signal input circuit31and the gate electrodes of each of the semiconductor elements40are approximately same with each other.

In the insulating substrate1according to the embodiment 1, the resistance layer36is formed integrally with the signal propagation path as a part of the wire32. The specific resistance of the resistance layer36formed with metal oxides is sufficiently large, and the resistance for adjusting the switching speed of the semiconductor element40can be implemented with small size. Thus it is possible to suppress increase in size of the insulating substrate1.

In the insulating substrate1according to the embodiment 1, it is not necessary for increasing the resistance of the resistance layer36to increase the wire length or to narrow the wire width. Therefore, it is possible to configure the resistance of the resistance layer36at a desired value without unnecessarily increasing the wire inductance to impair the control accuracy.

FIG. 5is a schematic perspective view illustrating a part of the insulating substrate1according to an embodiment 2 of this disclosure. In the embodiment 2, a coil37is formed inside the wire layer30bfor measuring an electric current passing through the wire layer30b. The coil37is formed as a wire surrounding the terminal41while keeping the insulation. The coil37may be formed by a process similar to that for forming the control signal input circuit31.

When an electric current flows through the terminal41, another electric current is induced in the coil37. The coil37is connected with the control signal input circuit31. By acquiring the electric current flowing in the coil37via the control signal input circuit31, it is possible to measure the electric current flowing in the terminal41. Since the coil37is arranged near the terminal41, which is the measured target, it is possible to increase the measurement accuracy and to enhance the control accuracy of the semiconductor element40comparing to acquiring the electric current from the terminal41via a lead line, for example.

FIG. 6is a perspective view illustrating an implementation example of the coil37. It is not always necessary to provide the coil37for each of the semiconductor elements40. The coil37may be provided only for a part of the semiconductor elements40.FIG. 6shows an example where the coil37is provided at two semiconductor elements40positioned diagonally to each other. By increasing the distance between the coils37, it is possible to suppress the interference between the coils37and to keep the measurement accuracy.

FIG. 7is a diagram illustrating a configuration of a unit cell portion of an electric power converter100according to an embodiment 3 of this disclosure. The electric power converter100is a device such as an inverter, a converter, or a power conditioner, for example. The electric power converter100includes the insulating substrate1ofFIG. 4described in any one of the embodiments 1-2, a heat dissipating fin110, and a smoothing condenser120. The semiconductor element40implemented in the insulating substrate1ofFIG. 4is, for example, an element that converts direct current electric power into alternating current electric power using switching devices. By using the insulating substrate1according to the embodiments 1-2, it is possible to improve the conversion efficiency of the electric power converter100.

<Modification of this Disclosure>

The invention is not limited to the above-mentioned embodiments and includes various modified examples. For example, the above-mentioned embodiments have described in detail for the purpose of easy understanding of the invention, and all the elements described therein do not have to be included.

In the embodiments above, an example is shown where the metal oxide for forming the resistance layer36is RuO2. Alternatively, other metal oxides may be employed. For example, IrO2or RhO2may be employed. Further, a mixture of Ag/Pd may be employed. In addition to above, gold, platinum, palladium, silver, or copper may be mixed to be employed. When forming the resistance layer36, a paste in which (a) these metal oxides or metal powders, (b) additives such as CuO, V2O5, MnO2, TiO2, and (c) glass are mixed is printed as a part of the control signal input circuit31, and then is sintered along with the insulating layer20.

In the embodiments above, silicon nitride ceramics may be used as a material for the insulating layer20, for example. As a material for the control signal input circuit31, a material may be employed that is a thermally expanding ceramics which thermal expansion coefficient is closer to that of the insulating layer20and that can be bonded to the insulating layer20. The thermal expansion coefficient α of silicon nitride ceramics substrate is approximately 3 (ppm/K). Thus a material may be employed for the control signal input circuit31which thermal expansion coefficient α is approximately at or below 10 (ppm/K).

The embodiments above describe laser processing as a method for adjusting the resistance of the resistance layer36. Other methods may be employed for adjusting the resistance. For example, the combination of materials may be adjusted. For example, for the resistance layer36, a material may be employed such as (a) RuO2only, (b) a mixture of silicon nitride and RuO2, (c) adding silver in addition to (a) (b). It is possible to adjust the resistance of the resistance layer36by modifying combination or composition of the material. Further, by adjusting the size or resistivity of the resistance layer36, a desired resistance may be implemented.

In the embodiments above, an example is shown where the semiconductor element40is implemented on the insulating substrate1. When implementing circuit elements other than the semiconductor element40on the insulating substrate1, it is possible to align the gate resistance with respect to such circuit elements to improve the operational accuracy, by employing the configuration according to this disclosure.

In the embodiments above, the electric power converter100is shown as an example of device comprising the insulating substrate1. By employing the insulating substrate1according to this disclosure in other types of semiconductor devices, it is possible to improve operational efficiency of the semiconductor element40.

REFERENCE SIGNS LIST