Amplifier

An amplifier comprising at least one amplifying element (20a, 25a) and a biasing circuit (32a, 32b) for biasing the or each amplifying element with a bias voltage is disclosed. The biasing circuit (32a, 32b) is adapted to vary the bias voltage such that the or each amplifying element switches between non-switching and switching modes of operation in response to a bias control signal (4) passing through a threshold value.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims the priority under 35 U.S.C §119 of European patent application no. 11158248.2, filed on Mar. 15, 2011, the contents of which are incorporated by reference herein.

The invention relates to an amplifier, typically a radiofrequency (RF) amplifier.

RF amplifiers are used in a variety of applications. An example application is IEEE802.15.4. This specifies multiple output powers from a radio module. For example, output powers of 2.5 dBm are used in a low-power mode, whereas 10 dBm and 18 dBm output powers are used in medium-power and high-power modes.

Typically, these multiple output powers are achieved by providing a basic RF amplifier module to provide an output power of 2.5 dBm along with either one or two additional power amplifier modules to boost this to 10 dBm or 18 dBm. This, however, is quite a cumbersome approach, requiring two additional amplifiers in the high power mode. Separate RF output pins are also required for each of the different power modes.

Furthermore, it is difficult to maintain precise control of power gain over the range of output powers with this approach.

In accordance with a first aspect of the invention, there is provided an amplifier comprising at least one amplifying element and a biasing circuit for biasing the or each amplifying element with a bias voltage, wherein the biasing circuit is adapted to vary the bias voltage such that the or each amplifying element switches between non-switching and switching modes of operation in response to a bias control signal passing through a threshold value.

Thus, by enabling the amplifying elements to switch between non-switching and switching, the amplifier can operate at either a lower efficiency (non-switching) or a higher efficiency (switching). The lower efficiency mode is suited for lower power operation but enables more accurate control of power gain, whereas the higher efficiency mode is more suited to higher power operation. In this way, it is possible to operate over a larger power range without comprising accuracy of control of the power gain, and both the low power and medium power modes discussed above can be accommodated by the same amplifier module, which means also that the same RF output pin can be shared for the low and medium power modes. For the high power mode discussed above, only one external amplifier is required.

We have found that an amplifier according to the invention that is capable of switching between Class AB and Class E can achieve efficiencies of around 10% in Class AB and around 30% in Class E. Thus, in switching from Class AB (i.e. low power mode) to Class E (i.e. high power mode), the power drawn from the supply only increases by a factor of around 2 despite the fact that the RF power output increases by a factor of around 5.6.

Typical switching modes of operation are Class D and Class E, Class E being particularly preferred. Typical non-switching modes of operation are Class A, Class B, Class AB and Class C, Class AB being particularly preferred.

Typically, the or each amplifying element is coupled to a load via a reactive load network configured to yield a transient response whereby simultaneous imposition of substantial voltage across and substantial current through the or each amplifying element is avoided in the switching mode of operation and to present a load tuned to an operating frequency of the amplifier in the non-switching mode of operation. This arrangement is particularly well suited to use with Class E and Class AB as the switching and non-switching modes of operation respectively.

This reactive load network will typically comprise one or more inductors and one or more capacitors, and in one variant comprises a capacitor and inductor in parallel. The value of the capacitor in the reactive load network may be selected to achieve the desired transient response in the switching mode (e.g. Class E) of operation and to tune to the operating frequency of the amplifier in the non-switching (e.g. Class AB) mode of operation.

By stating that the “simultaneous imposition of substantial voltage across and substantial current through the or each amplifying element is avoided” we mean that the current through and voltage across the or each amplifying element are controlled by the reactive load network to ensure that there is no significant loss during a switching interval (i.e. when an amplifying element is actually switching on or off) of, for example, a Class E cycle of operation.

Preferably, the or each amplifying element comprises a first transistor, which is biased by the bias voltage to act as a switch in the switching mode of operation and as a linear or almost linear amplifier in the non-switching mode of operation.

In one embodiment, the or each amplifying element further comprises a second transistor in series with the first transistor, the second transistor being operable as a switch in response to a respective gain control signal for selectively coupling an amplifying element to a load. An advantage of providing a second transistor in series with the first transistor in the switching mode of operation is that high transient voltages that would be present at the drain of the first transistor in the absence of the second transistor will be shared between the two transistors. Hence, a lower voltage transistor can be used for the first transistor.

Thus, each amplifying element may be effectively enabled and disabled by its respective gain control signal. The act of disabling an amplifying element decouples the first transistor from the load, whereas enabling an amplifying element couples the first transistor to the load. The or each amplifying element is normally coupled to the load via a reactive load network such as that described above.

In this embodiment, the first and second transistor typically form a cascode arrangement when in the non-switching mode of operation.

In this embodiment, the amplifier may further comprise a third transistor switchable for diverting a portion of the current flowing through the first transistor to an alternating current (AC) ground node.

This third transistor will typically be switched in response to a respective gain control signal. It diverts a portion of the current flowing through the first transistor away from the load to the AC ground node. This allows a more granular control of power gain than simply enabling or disabling an amplifying element as achieved by the second transistor.

Typically, at least two amplifying elements are coupled in parallel.

In a preferred embodiment, the amplifier comprises first and second groups of amplifying elements, each having at least one amplifying element, wherein the first and second groups of amplifying elements are coupled in a differential arrangement. The invention may also be used with single-ended arrangements.

The amplifier typically further comprises a pre-amplifier for driving the or each amplifying element, the pre-amplifier being responsive to the bias control signal to switch between high and low gain modes when the or each amplifying element is in the switching and non-switching mode respectively.

In a first variant, the pre-amplifier comprises first and second pre-amplifying elements in parallel, the second pre-amplifying element being enabled in the high gain mode and disabled in the low gain mode.

The first and second pre-amplifying elements may each comprise input and output transistors arranged in cascode.

Thus, the output transistor of each of the first and second pre-amplifying elements may be biased into an inactive mode of operation by the bias control signal when in the low gain mode.

This is typically achieved by coupling the bias control signal to the gate of the output transistors causing them to cut-off and become effective open circuits.

In a preferred embodiment, the pre-amplifier comprises first and second groups of pre-amplifying elements, each having first and second pre-amplifying elements as defined above with respect to the first variant, wherein the first and second groups of pre-amplifying elements are coupled in a differential arrangement. The invention may also be used with single-ended arrangements.

In accordance with another aspect of the invention, there is provided an amplifier comprising a first transistor and a second transistor in series with the first transistor, the second transistor being operable as a switch in response to a gain control signal for selectively diverting a portion of the current flowing through the first transistor to an alternating current ground node.

This aspect of the invention achieves a more granular gain control than simply switching the first transistor on or off.

Typically, the second transistor is operable to divert the portion of the current flowing through the first transistor from a load to the alternating current ground node.

In accordance with yet another aspect of the invention, there is provided a transceiver system comprising an amplifier according to the first aspect, coupled to an aerial, and a low noise amplifier coupled to the aerial for amplifying a signal received by the aerial.

This aspect of the invention provides a simple way of implementing a transceiver using an amplifier according to the first aspect as the transmitter and a separate low noise amplifier as the receiver.

If a differential output from the amplifier according to the first aspect of the invention is provided then the coupling to the aerial may be made via a balun.

Similarly, the aerial may be coupled to the low noise amplifier via a balun, which may be the same one as the balun mentioned above.

Often, the amplifier according to the first aspect of the invention will be coupled to the aerial via a bandpass filter. This helps to control the harmonic content of the output signal, which may be required for regulatory compliance.

The amplifier according to the first aspect of the invention and/or the low noise amplifier may be enabled or disabled via respective control signals.

A low noise amplifier is used to amplify very weak signals in the receive mode. By “low noise amplifier”, we mean an amplifier with a noise figure lower than 5 dB, preferably lower than 3 dB and even more preferably lower than 1 dB.

FIG. 1shows a pre-amplifier1, which receives an RF input signal and amplifies it to a suitable level for driving a power amplifier output stage2. The output stage2drives a load3. A bias control signal4is used to switch the pre-amplifier1and output stage2between non-switching, Class AB in this case, and switching, Class E in this case, modes of operation. Typically, this will be a digital control signal where a binary 0 might be used to select Class AB and a binary 1 to select Class E, or vice-versa.

Control of the RF output power from output stage2in Class E is made by adjusting the voltage of power supply5as will be described below. In Class AB, power control is achieved by a different mechanism using a separate set of power control signals generated by power control circuit6.

In Class AB operation the transistors in the output stage2are biased to conduct slightly during quiescent conditions and they conduct further when driven by an input signal. In any one cycle of the input waveform the transistors conduct for greater than 180° and less than 360°. In Class E operation the output transistors a switching technique is used, and the transistors are turned on and off. For this reason, different drive signal levels are required from the pre-amplifier1for each of the Class AB and Class E modes of operation. The pre-amplifier1is therefore switchable between high and low gain modes under the control of bias control signal4. In the low gain mode (for Class AB operation) an output signal of about 500 mV peak is generated by the pre-amplifier1, whereas in high gain mode (Class E operation) the output signal is around 2.5V peak. Since the gain mode of pre-amplifier1is selected by bias control signal4, the gain mode of the pre-amplifier1is switched along with the class of operation of the output stage2.

A suitable circuit for pre-amplifier1is shown inFIG. 2. This is an inductively-loaded differential amplifier with cascode outputs, tuned to be resonant at the operating frequency when loaded by output stage2. As explained above, it is switchable between a low power mode for Class AB operation and a high power mode for Class E operation.

Pre-amplifier1comprises a first differential pair of input transistors10a,10b, and a second differential pair of input transistors11a,11b. The gates of input transistors10a,11aare coupled together, as are their sources. Similarly, the gates of input transistor10b,11bare coupled together, as are their sources. A differential input signal12a,12bis applied to the gates of input transistors10a,10b,11a,11b. Thus, signal12ais coupled to the gates of input transistors10a,11a, and signal12bis coupled to the gates of input transistors10b,11b. The sources of all the input transistors are coupled to ground.

A DC bias voltage is applied to the junction of resistors18a,18b, which biases transistors10a,10b,11a,11b. The signal12a,12bis superimposed on this DC bias voltage at the gates of input transistors10a,10b,11a,11b, provided the driving source has a resistance much lower than the value of the resistors18a,18b. A transistor19is provided, which disables the pre-amplifier when switched on by pulling the junction of resistors18a,18bwhere the DC bias voltage is applied to ground.

The drain of each of input transistors10a,10b,11a,11bis coupled to the source of a respective output transistor13a,13b,14a,14b. Thus, each input transistor10a,10b,11a,11bforms a cascode pair with a respective one of the output transistors13a,13b,14a,14b.

The gates of output transistors13a,13bare coupled together, as are the gates of output transistors14a,14b.

The drains of output transistors13a,14aare coupled together and to one terminal of an inductive load17, whereas the drains of output transistors13b,14bare coupled together and to the other terminal of inductive load17. A differential output signal15a,15bis taken from the two terminals of the inductive load17. As mentioned above, the inductance value of inductive load17is selected to achieve resonance at the operating frequency when loaded by output stage2.

In the high gain mode the gates of the output transistors13a,13b,14a,14bare all biased to a suitable voltage for each of the transistors to be operating in an activate region (i.e. they all respond to amplify an input signal).

However, in the low gain mode, the gates of output transistors14a,14bare pulled to a suitably low potential such that output transistors14a,14band input transistors11a,11bno longer conduct during any part of the input signal waveform. This is achieved by coupling a gain select terminal16controlled by the bias control signal4to ensure that the bias is present only when the Class E mode of operation is selected. Thus, only output transistors13a,13band input transistors10a,10bare active in the low gain mode and a lower gain is achieved.

The circuit topology shown inFIG. 2ensures that the input load impedance is similar in both high and low gain modes since the same number input of transistors10a,10b,11a,11bare always present. Thus, when driven from a voltage-controlled oscillator (VCO) directly, the VCO will remain in range without retuning it for each of the high and low gain modes.

Similarly, the output impedance is maintained at a constant value for both high and low gain modes since the same number of cascode output transistors13a,13b,14a,14bare present at the output in both modes. This is required if the pre-amplifier1output is to resonate with the input of output stage2.

FIG. 3shows a circuit diagram for the output stage2. In this four pairs of input transistors are provided as shown by reference numerals20a,20b,21a,21b,22a,22b,23a, and23b. Each pair20a,20b;21a,21b;22a,22b; and23a,23bforms a differential input to the output stage2. The sources of transistors20a,20b,21a,21b,22a,22b,23a,23bare all coupled to ground. The gates of transistors20a,21a,22a,23aare all coupled to an input pin24a, whereas the gates of transistors20b,21b,22b,23bare all coupled to an input pin24b. Together input pins24a,24bform a differential input, which is AC coupled (via capacitors) to the differential output signal15a,15bof pre-amplifier1.

Each input transistor20a,20b,21a,21b,22a,22b,23a,23bis coupled via its drain to the source of a respective output transistor25a,25b,26a,26b,27a,27b,28a,28b. The drains of output transistors25a,26a,27a,28aare coupled to one terminal of a reactive load network comprising the parallel combination of inductor29and capacitor30. The drains of output transistors25b,26b,27b,28bare coupled to the other terminal of the reactive load network. A centre-tap of inductor29is coupled to the supply voltage34. The two terminals of the reactive load network are coupled to a load31.

The value of capacitor30is selected such that the reactive load network is configured to yield a transient response whereby simultaneous imposition of substantial voltage across and substantial current through input transistors20a,20b,21a,21b,22a,22b,23a,23bis avoided in the Class E mode of operation and to present a load tuned to an operating frequency of the amplifier in the Class AB mode of operation.

The input pins24a,24b(and hence the gates of input transistors20a,20b,21a,21b,22a,22b,23a,23b) are coupled via resistors32a,32brespectively to a biasing terminal33, the voltage on which is controlled by the bias control signal4such that no or very little bias is present when in the Class E mode of operation

The gate of each of output transistors25a,25b,26a,26b,27a,27b,28a,28bis coupled to a respective gain control signal35a,35b,36a,36b,37a,37b,38a,38b, the purpose of which will be explained below.

To place the output stage2in Class E mode, the bias control signal4is driven such that no or very little bias is present on the biasing terminal33. This causes input transistors20a,20b,21a,21b,22a,22b,23a,23bto act as switches, switching as the differential input signal24a,24bvaries as is required for Class E operation. The gate of each of output transistors25a,25b,26a,26b,27a,27b,28a,28bis biased using gain control signals35a,35b,36a,36b,37a,37b,38a,38bto switch on the output transistors25a,25b,26a,26b,27a,27b,28a,28bso that current flowing through the input transistors flows directly to the reactive load network. The gain control signals35a,35b,36a,36b,37a,37b,38a,38bare generated by the power control circuit6depending on the output power required.

Control of the output power in Class E mode is achieved by varying the supply voltage34by controlling the supply voltage from power supply5. This makes use of the principle that the output power is proportional to the square of the supply voltage for a fixed load, and it is possible to achieve control of the output power in 1 dB steps in this way.

To place the output stage2in Class AB mode, the bias control signal4is driven such that a suitable bias voltage is present on the biasing terminal33to bias the input transistors20a,20b,21a,21b,22a,22b,23a,23bvia resistors32a,32bto be in a linear, active region of operation.

Control of the output power in Class AB mode is achieved by selecting which of input transistors20a,20b,21a,21b,22a,22b,23a,23bwill contribute to the current flowing through the reactive load network. This is controlled by selectively switching on or off output transistors25a,25b,26a,26b,27a,27b,28a,28busing gain control signals35a,35b,36a,36b,37a,37b,38a,38b. Thus, for example by switching off output transistors25a,25busing gain control signals35a,35b, no current will flow through the associated input transistors20a,20binto the reactive load network, and the output power is therefore reduced.

To simplify the switching of the output transistors25a,25b,26a,26b,27a,27b,28a,28b, the gain control signals are often coupled together in pairs. Thus gain control signals35a,35bare coupled together, as are gain control signals36aand36b,37aand37b, and38aand38b.

In the Class AB mode of operation, the gain control signals35a,35b,36a,36b,37a,37b,38a,38bfor those output transistors25a,25b,26a,26b,27a,27b,28a,28bthat are switched on are used to bias the gates of the switched on output transistors25a,25b,26a,26b,27a,27b,28a,28bsuch that they form cascode pairs with the input transistors20a,20b,21a,21b,22a,22b,23a,23b.

Each of the input transistors20a,20b,21a,21b,22a,22b,23a,23bis sized to be the quarter of the size of a conventional transistor used in the output stage of an RF amplifier. Thus, the combination of input transistors20a,21a,22a,23aand of input transistors20b,21b,22b,23bprovides the same gain (and hence, output power) as such a conventional transistor. As a result, disabling any pair of input transistors20aand20b,21aand21b,22aand22b, or23aand23bwill decrease the output power by 6 dB.

In alternative embodiments, the input transistors20a,20b,21a,21b,22a,22b,23a,23bmay not be equally-sized but may have their sizes selected to provide differently-sized steps of output power control. For example, disabling the pair of input transistors23aand23bmay cause a 3 dB decrease, whereas disabling the pair of input transistor22aand22bmay cause a 6 dB decrease.

The input impedance of the output stage2does not vary significantly as the output power is varies since the number of input transistors20a,20b,21a,21b,22a,22b,23a,23bremains the same.

Where it is desired to achieve control of output power in steps smaller than is practically possible by switching a single transistor on or off, the technique ofFIG. 4may be used. In this, a portion of the circuit ofFIG. 3is shown along with an additional transistor40coupled in series with input transistor23a. Whereas output transistor28ais used to control whether current from input transistor23aflows to the reactive load network, the additional transistor40is used to divert a portion of the current from input transistor23ato the supply or other AC ground. The additional transistor40is controlled by power control circuit6, which provides a suitable bias to its base to switch it on or off to achieve a desired output power.

The proportion of current that is diverted by additional transistor40when it is switched on depends on the relative sizes of output transistor28aand additional transistor40. If they are equally sized then half the current from input transistor23awill be diverted from the reactive load network to the supply. A more granular control of the size of the gain step is therefore available than can be provided simply by switching output transistor28a. This technique can of course be used with any of the input transistors20a,20b,21a,21b,22a,22b,23a,23b, but has been shown with reference to input transistor23afor ease of explanation. The gates of any such additional transistors are coupled to respective gain control signals to control switching of the additional transistors.

An application of the amplifier described above is shown inFIG. 5, where an amplifier50according to the invention is coupled to a differential input signal51to produce a differential output signal52. The differential output signal52is switchable between low and high power modes as described above. The differential output signal52is coupled to a centre-tapped balun53(the centre-tap being coupled to the supply voltage34), which is in turn coupled through a bandpass filter54to a load55such as an aerial. The bandpass filter54is provided to prevent the harmonic content of the signal coupled to the load55being excessive. An additional low noise amplifier56is provided, which acts as a receiver to amplify signals received at the load55, which may be an aerial, and converted to a differential signal52by balun53. Thus, amplifier56generates a higher power differential signal57from the differential signal52received by the load55. Thus, the system ofFIG. 5is a transmitter and receiver. In a transmit mode, the amplifier56will be disabled and the amplifier50enabled, whereas in a receive mode, the amplifier56will be enabled and the amplifier50disabled.