Circuit device and manufacturing method thereof

A method of manufacturing a circuit device includes the steps of preparing a conductive foil, forming conductive patterns in convex shapes by forming an isolation trench on a surface of the conductive foil, covering the surface of the conductive foil with a resin film so as to form the resin film covering the isolation trench thicker than the resin film covering upper surfaces of the conductive patterns, exposing the upper surfaces of the conductive patterns out of the resin film by removing the resin film, electrically connecting the conductive pattern exposed out of the resin film to a circuit element, forming sealing resin to seal the circuit element, and removing a rear surface of the conductive foil until the conductive patterns are mutually isolated.

BACKGROUND OF THE INVENTION

Priority is claimed to Japanese Patent Application Number JP2004-086555 filed on Mar. 24, 2005, the disclosure of which is incorporated herein by reference in its entirety.

1. Field of the Invention

The present invention relates to a circuit device and a manufacturing method thereof and, more specifically, to a circuit device and a manufacturing method thereof which are capable of enhancing positional accuracy of an exposed part of a conductive pattern.

2. Background Art

Heretofore, there have been demands for the downsizing, the thinning, and the reduction in weight of circuit devices to be incorporated in electronic devices since the circuit devices have been adopted to cellular telephones, portable computers, and the like.

Taking a semiconductor device as an example for the circuit devices, a circuit device so-called a chip size package (CSP) having a size being equivalent to that of a chip has been recently developed.

However, a typical CSP applies a glass epoxy substrate as an interposer that precludes downsizing and achieving a thin profile of the CSP. To solve this problem, the applicant of the present invention has developed a method of manufacturing a circuit device as shown inFIG. 13AtoFIG. 14C, in which a mounting substrate is not required. This technology is described for instance in Japanese Unexamined Patent Publication No. 2003-155591.

The method of manufacturing a circuit device will be described with reference toFIG. 13AtoFIG. 14C. As shown inFIG. 13A, conductive foil110is prepared and etching resist111is patterned in a desired shape on a surface thereof. Next, as shown inFIG. 13B, isolation trenches112are formed on the surface of the conductive foil110by performing half etching. Then, as shown inFIG. 13C, resin film115is coated on the surface of the conductive foil after peeling off the etching resist111. Next, as shown inFIG. 13D, open portions130are formed on the surfaces of conductive patterns113. Such formation of the open portions130can be achieved by performing a removing method using a laser, a lithographic process, and the like. Here, errors upon formation of the open portions130are taken into account, and the peripheral portion of each of the open portions130and the peripheral portion of each of the conductive patterns113are separated from each other by providing a predetermined distance α.

As shown inFIG. 14A, sealing resin120is formed after a semiconductor element116and a chip element117are electrically connected to the conductive patterns113. Subsequently, as shown inFIG. 14B, the respective conductive patterns113are electrically isolated by removing a rear surface of the conductive foil. Thereafter, as shown inFIG. 14C, external electrodes121are formed on rear surfaces of the conductive patterns113and then covering resin122is formed thereon. In the above-described process, it is possible to form a conventional circuit device.

However, the circuit device and the manufacturing method described above have the following problems.

As shown inFIG. 13D, the conductive patterns113have been formed in unnecessarily large planar sizes due to redundant design in consideration of errors upon formation of the open portions130. Such redundant design has caused an increase in size of the entire circuit device. Moreover, a high-precision and expensive exposure machine or laser irradiator is required to form the open portion130in an accurate position. Such requirement has increased manufacturing costs.

Moreover, since an adhesive for attaching the chip element117or the like has been formed on the open portion130of the resin film, the adhesive has been formed into a constricted shape. Such a form has precluded reliability against thermal stress.

The present invention was made in view of the above-described problems, and a main objective thereof is to provide a circuit device and a manufacturing method thereof in which a positional accuracy for a conductive pattern is high with low cost.

SUMMARY OF THE INVENTION

The present invention provides a circuit device that includes conductive patterns, a circuit element electrically connected to the conductive pattern, a resin film being formed between the conductive patterns and covering side surfaces of the conductive patterns, an adhesive configured to fix the circuit element to the conductive patterns by contacting the upper surfaces and the side surfaces of the conductive patterns, and sealing resin for sealing the circuit element.

The present invention includes that, in the circuit device, the adhesive is any of a conductive adhesive and an insulative adhesive.

The present invention includes that, in the circuit device, a side surface of the adhesive is formed into a smoothly curved surface.

The present invention includes that, in the circuit device, the conductive patterns comprise a multilayer wiring structure.

The present invention includes that, in the circuit device, the circuit element is a semiconductor element to be mounted with a flip chip. The present invention further provides a method of manufacturing a circuit device that includes the steps of forming a conductive pattern, forming a resin film to cover the conductive patterns, exposing an upper surface of the conductive pattern out of the resin film, electrically connecting a circuit element to the conductive pattern through an adhesive, and covering the circuit element.

The present invention also provides a method of manufacturing a circuit device that includes the steps of preparing a conductive foil, forming conductive patterns in convex shapes by forming an isolation trench on a surface of the conductive foil, covering the surface of the conductive foil with a resin film so as to form the resin film covering the isolation trench thicker than the resin film covering upper surfaces of the conductive patterns, exposing the upper surfaces of the conductive patterns out of the resin film by removing the resin film, electrically connecting the conductive pattern exposed out of the resin film to a circuit element, forming sealing resin to seal the circuit element, and removing a rear surface of the conductive foil until the conductive patterns are mutually isolated.

The present invention includes that, in the method of manufacturing a circuit device, the upper surface of the conductive pattern is exposed out of the resin film by uniformly etching the resin film.

The present invention includes that, in the method of manufacturing a circuit device, the circuit element includes a semiconductor element to be mounted in a face-down manner.

The present invention includes that, in the method of manufacturing a circuit device, a rear surface of the conductive pattern constitutes an external electrode.

The present invention includes that, in the method of manufacturing a circuit device, the resin film is removed after subjecting the resin film to exposure.

The present invention includes that, in the method of manufacturing a circuit device, the resin film is formed by laminating the resin films in sheet shapes on the conductive film with a vacuum press.

The present invention includes that, in the method of manufacturing a circuit device, the resin film is formed by coating any of liquid resin and semisolid resin on a surface of the conductive foil.

The present invention includes that, in the method of manufacturing a circuit device, the resin film is removed until a side surface of the resin film is partially exposed.

According to the circuit device of the present invention, side surfaces of the adhesive can be formed into smoothly curved shapes. Therefore, it is possible to enhance reliability of this adhesive against thermal stress.

According to the method of manufacturing a circuit device of the present invention, it is possible to expose conductive patterns partially while curtailing formation of conventional exposed portions. Therefore, it is possible to remarkably enhance positional accuracy of the conductive patterns at the exposed portions. Moreover, it is possible to expose the conductive patterns partially without using an exposure machine or a laser irradiator. In this way, it is possible to reduce costs for manufacturing the circuit device.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

First Embodiment

A method of manufacturing a circuit device according to a first embodiment will be described with reference toFIG. 1AtoFIG. 5C. The method of manufacturing a circuit device of this embodiment includes the steps of preparing conductive foil10, forming conductive patterns13in convex shapes by forming isolation trenches12on a surface of the conductive foil10, covering the surface of the conductive foil10with resin film15so as to form the resin film15covering the isolation trenches12thicker than the resin film15covering upper surfaces of the conductive patterns13, exposing the upper surfaces of the conductive patterns13out of the resin film15by removing the resin film15, electrically connecting the conductive patterns13exposed out of the resin film15to circuit elements, forming sealing resin20to seal the circuit elements, and removing a rear surface of the conductive foil10until the conductive patterns13are mutually isolated. In the following, a combination of semiconductor element16and chip element17is adopted as an example of the above-described circuit elements. Now, the respective steps will be described below in detail.

As shown inFIGS. 1A to 1C, a first process of this embodiment is intended to prepare the conductive foil10and to form the conductive patterns13into convex shapes by forming the isolation trenches12on the surface of the conductive foil10.

In this process, the conductive foil10in a sheet shape is firstly prepared as shown inFIG. 1A. The material for this conductive foil10is selected in consideration of an adhesion property with a brazing member, a bonding property, and a plating property thereof. For example, a conductive foil using Cu as a main material, a conductive foil using Al as a main material, a conductive foil made of an alloy such as Fe—Ni, and the like are applied. The thickness of the conductive foil may be in the order of a range from 10 μm to 300 μm in consideration of an etching process to be performed later.

Subsequently, etching resist11which is an etching resistant mask is formed on a surface of the conductive foil10. Then, the etching resist11is patterned so as to expose the conductive foil10in positions other than regions constituting the conductive patterns13.

As shown inFIG. 1B, the isolation trenches12are formed by etching. The depth of the isolation trenches12formed by etching is equal to 50 μm, for example. As side surfaces of the isolation trenches12are formed into rough surfaces, an adhesion property with the sealing resin20or the resin film15in a later process will be enhanced. An etchant used herein may be typically ferric chloride or cupric chloride, and the conductive foil10is either dipped in or showered with this etchant. Here, wet etching generally provides non-anisotropic etching. Therefore, the side surfaces are formed into curved structures. Moreover, as shown inFIG. 1C, the etching resist11is peeled off and removed after completion of etching.

As shown inFIGS. 2A to 2C, a second process of this embodiment is intended to cover the surface of the conductive foil10with the resin film15so as to form the resin film15covering the isolation trenches12thicker than the resin film15covering the upper surfaces of the conductive patterns13.

There may be two possible methods of forming the resin film15on the surface of the conductive foil10. The first method is to form the resin film15by attaching a resin sheet14closely to the surface of the conductive foil10. The second method is to form the resin film15by coating a liquid or semisolid resin material on the surface of the conductive foil10and then hardening the resin material. Although it is possible to form the resin film15by any of these methods, the method using the resin sheet14will be described herein.

As shown inFIG. 2A, the resin sheet14is attached to the surface of the conductive foil10by pressure. To be more precise, the conductive foils10and the resin sheets14alternately laminated are attached to one another by pressurization in the vertical direction. Such attachment may be also achieved by use of a vacuum press, which is configured to perform press under an almost vacuum atmosphere. Meanwhile, it is possible to harden or stabilize the resin by subjecting the resin film15to exposure or heating after completing formation thereof.

A cross section of the conductive foil10having the resin film15formed on the surface by the above-mentioned method will be described with referenceFIG. 2B. Here, the substantially entire area of the surface of the conductive foil10including the isolation trenches12is covered with the resin film15.

Details of the formed resin film15will be described with reference toFIG. 2C. The resin film15formed in the position of each of the isolation trenches12is formed thicker than the resin film15covering the upper surfaces of the conductive patterns13. In addition, it is also possible to form the resin film15covering a lower part of the isolation trench12thicker than the resin film15covering an upper part of the isolation trench12. It is possible form the thicker resin film15in the position of the isolation trench12as shown in the drawing either by the above-described method using the resin sheets14or by the method using the liquid resin material. In the method of forming the resin film15using the resin sheets14, the resin material is concentrated on the positions of the isolation trenches12by pressurizing the resin sheets14, whereby the resin film15covering the isolation trenches12are thickly formed. Meanwhile, in the method using the liquid resin material, the resin film15covering the isolation trenches12is thickly formed as the resin material is preferentially carried in the positions of the isolation trenches12.

A third process of this embodiment is intended to expose the upper surfaces of the conductive patterns13out of the resin film15by removing the resin film15.

To be more precise, as shown inFIG. 3A, the upper surfaces of the conductive patterns13are exposed out of the resin film15by removing the substantially entire resin film15formed on the surface of the conductive foil10. Here, the upper surfaces of the conductive patterns13are caused to be exposed out of the resin film15by etching the resin film15entirely instead of using a laser or lithographic process. As described previously, the resin film15covering the upper surfaces of the conductive patterns13is formed thinner than the resin film15covering the isolation trenches12. Therefore, when the resin film15is etched uniformly without a mask, the upper surfaces of the conductive patterns13having the thinly formed resin film15thereon are preferentially exposed. In this embodiment, the etching process of the resin film15is stopped when the upper surfaces of the conductive patterns13are exposed. In this way, it is possible to expose the upper surface of the conductive patterns13out of the resin film15while leaving the resin film15in the regions of the isolation trenches12. As an etchant for etching the resin film15, a chemical agent which is reactive to the resin film15but not reactive to the material for the conductive foil10is adopted. To be more precise, it is possible to adopt a strong alkaline chemical as an etchant.

A cross-section after exposing the conductive patterns13will be described with reference toFIG. 3B. Upper side surfaces of the isolation trenches12along with the upper surfaces of the conductive patterns13may be also exposed out of the resin film15by etching the resin film15. In this way, by performing the etching process until the upper side surfaces of the isolation trenches12are exposed out of the resin film15, it is possible to ensure exposure of the upper surfaces of the conductive patterns13even in case of the uneven process of etching.

As shown inFIGS. 4A and 4B, a fourth process of this embodiment is intended to connect the conductive patterns13having been exposed out of the resin film electrically to the circuit elements.

As shown inFIG. 4A, the semiconductor element16and the chip element17are adopted as an example of the circuit elements. The semiconductor element16is fixed to the upper surface of the conductive pattern13through brazing member18, and the semiconductor element16is electrically connected to the conductive patterns13through metal thin lines19. Electrodes on both ends of the chip element17are fixed to the conductive patterns13through the brazing member18. Here, passive elements and active elements are generally applicable as the circuit elements. Moreover, a resin sealing type package or CSP is applicable as the circuit element.

A mounting structure of the chip element17to be connected through the brazing member18will be described with reference toFIG. 4B. The brazing member18is formed so as to partially cover the upper surfaces and the side surfaces of the conductive patterns13. Meanwhile, side surfaces of the brazing member18are continuously formed into smoothly curved faces. In comparison with the conventional example, the side surfaces of the brazing member18of this embodiment is formed into the smooth shapes because no bumps such as the open portions130as shown inFIG. 13Bare formed therein. Since the side surfaces of the brazing member18are smoothly formed, it is possible to enhance strength of the brazing member18against thermal stress. In addition, since the isolation trenches12are covered with the resin film15, it is possible to suppress a short circuit between the conductive patterns13attributable to excessive diffusion of the brazing member18.

As shown inFIGS. 5A to 5C, a fifth process of this embodiment is intended to form the sealing resin20so as to seal the circuit elements and to remove the rear surface of the conductive foil10until the conductive patterns13are mutually isolated.

As shown inFIG. 5A, the sealing resin20covers the circuit elements and a plurality of conductive patterns13, and the sealing resin20is filled in the isolation trenches12between the conductive patterns13. Then, the conductive patterns13are supported by the sealing resin20. This process can be achieved by transfer molding, injection molding or dipping. As the resin material, thermosetting resin such as epoxy resin is applicable to transfer molding while thermoplastic resin such as polyimide resin or polyphenylene sulfide is applicable to injection molding.

An advantage of this process is that the conductive foil10constituting the conductive pattern13serves as a supporting substrate until coating the sealing resin20. Conventionally, conductive paths have been formed by use of a supporting substrate which was not actually essential. On the contrary, in this embodiment, the conductive foil10serving as the supporting substrate10is the essential material as the material for electrodes. Accordingly, the embodiment has advantages that it is possible to minimize constituent materials and to reduce costs.

As shown inFIG. 5B, the rear surface of the conductive foil10is removed until the sealing resin20filled in the isolation trenches20are exposed, thereby isolating the respective conductive patterns13. This process is intended to remove the rear surface of the conductive foil10chemically and/or physically and thereby to isolate the respective conductive patterns13. This process is achieved by polishing, grinding, etching, metal evaporation with a laser, and the like.

As shown inFIG. 5C, rear surfaces of the conductive patterns exposed out of the sealing resin20are covered with covering resin22and external electrodes21are formed in desired positions. Meanwhile, the respective circuit devices formed in a matrix are separated into individual pieces by cutting the sealing resin20along dicing lines23constituting boundaries of the respective circuit devices.

Second Embodiment

In this embodiment, a method of manufacturing a circuit device in the case of adopting a face-down semiconductor element as an embedded circuit element will be described with reference toFIG. 6AtoFIG. 7C. Basic points of the method of manufacturing a circuit device of this embodiment are similar to the above-described first embodiment. Accordingly, description will be made below mainly on different points.

Firstly, as shown inFIG. 6AandFIG. 6B, conductive patterns13are formed into convex shapes by forming isolation trenches12on a surface of conductive foil10. Here, the conductive patterns13are mainly formed for the purpose of connecting pads for an element to be disposed in a face-down manner. After completing formation of the isolation trenches12, etching resist11is peeled off.

Next, as shown inFIG. 6C, resin film15is formed on the surface of the conductive foil10, and then upper surfaces of the conductive patterns13are exposed out of the resin film15by etching the resin film15. Details of this process are similar to the first embodiment.

Next, as shown inFIG. 6D, semiconductor element24is disposed in a face-down manner. Electrodes of the semiconductor element24are electrically connected to the conductive patterns13through brazing member18. Here, side surfaces of the brazing member18are also continuously formed into smoothly curved surfaces. Accordingly, the brazing member18has high strength against thermal stress. Moreover, as described previously, the conductive patterns13have very high positional accuracy. Therefore, the conductive patterns13can also deal with the semiconductor element24which has numerous fine-pitch terminals. After completing fixation of the semiconductor element24, an underfill member made of resin may be filled below the semiconductor element24. Furthermore, as shown inFIG. 7A, the semiconductor element24is covered with sealing member20.

Next, as shown inFIG. 7B, a rear surface of the conductive foil10is removed until the respective conductive patterns13are mutually isolated. Here, the conductive foil10is subjected to selective etching after selectively forming etching resist25thereon. Exposed surfaces on the rear surfaces of the conductive patterns13to be isolated by etching in this process constitute electrodes to allow attachment of a brazing member to perform mounting of the circuit device. Therefore, an area of the lower surface of each of the conductive patterns13exposed out of the device is greater than an area of the upper surface thereof which is exposed out of the resin film15.

Next, as shown inFIG. 7C, the conductive patterns13exposed on the rear surface is partially covered with covering resin22, and external, electrodes21made of a brazing member are formed on the rear surfaces of the conductive patterns13. The circuit device24configured to embed the semiconductor element24in the face-down manner is manufactured by the above-described processes.

Third Embodiment

This embodiment will describe one example of the circuit device which can be manufactured by the above-described embodiments.FIG. 8Ais a plan view of circuit device9, andFIG. 8Bis a cross-sectional view thereof. The circuit device9shown in these drawings embeds a plurality of circuit elements, and the respective circuit elements are electrically connected to one another through metal thin lines19or conductive patterns13.

A planar shape of the conductive patterns13will be further described with reference toFIG. 8A. In this drawing, upper surfaces13A of the conductive patterns are indicated by solid lines and lower surfaces13B of the conductive patterns are indicated by dashed lines. Each upper surface13A of the conductive pattern constitutes a die pad region where a circuit element is mounted and a bonding pad region where a metal thin line is connected. As described previously, the conductive patterns13in this specification have very high positional accuracy. Therefore, it is possible to prevent a short circuit between the conductive patterns13attributable to deviation of planar positions of the conductive patterns13.

Semiconductor element16and chip element17are adopted as circuit elements. These circuit elements are fixed onto islands made of the conductive patterns13.

Sealing resin20covers the circuit elements, the metal thin lines19, and the conductive patterns13while exposing rear surfaces of the conductive patterns13. As for the sealing resin20, thermosetting resin or thermoplastic resin is generally applicable. Moreover, the sealing resin20is filled in isolation trenches12for isolating the respective conductive patterns13. In addition, entire circuit device10A of this embodiment is supported by the sealing resin20.

In this embodiment, the upper surface13A of the conductive pattern and the lower surface13B of the conductive pattern can be formed into mutually different shapes. Therefore, it is possible to form a plurality of upper surfaces13A of the conductive patterns on one of the conductive patterns13. In this way, the circuit device9can incorporate more complicated electric circuits.

Fourth Embodiment

In this embodiment, a configuration of a circuit device having a multilayer wiring structure and a manufacturing method thereof will be described. In this embodiment as well, conductive patterns are exposed while omitting an exposure process using an exposure mask. Details of respective processes will be described below.

As shown inFIG. 9A, a first process of this embodiment is intended to prepare an insulative resin sheet formed by attaching first conductive foil40and second conductive foil41to insulative resin42.

The first conductive foil40is formed on substantially the entire area of a surface of the insulative resin sheet, while the second conductive foil41is formed on substantially the entire area of a rear surface of the insulative resin sheet. As for the material of the insulative resin42, the insulative resin42is made of a polymer insulative material such as polyimide resin or epoxy resin. Meanwhile, the first conductive foil40and the second conductive foil41may be made of a material mainly containing Cu or a publicly known material for a lead frame. The conductive foils may be coated on the insulative resin42by a plating method, a vacuum deposition method or a sputtering method. Alternatively, metal foils made by a rolling method or a plating method may be attached thereto.

The insulative resin sheet may be also formed by a casting method. This manufacturing method will be briefly described below. Firstly, past polyimide resin is coated on the first conductive foil40in a flat film shape and also on the second conductive foil41in a flat film shape. Then, the polyimide resin on the both members is semi-hardened and the both members are attached together to finish the insulative resin sheet.

The insulative resin42may be made of polyimide resin, epoxy resin, and the like. In the case of the casting method for forming the sheet by coating the paste, the film thickness may be set in a range from about 10 μm to 100 μm. When forming the sheet, the minimum film thickness commercially available is equal to 25 μm. Filler may be blended in light of heat conductivity.

As shown inFIG. 9BandFIG. 9C, a second process of this embodiment is intended to form through holes52on the first conductive foil40and the insulative resin42in desired positions of the insulative resin sheet and to selectively expose the second conductive foil41.

Firstly, as shown inFIG. 9B, resist59is entirely coated on a surface of the first conductive foil40, and then the first conductive foil40is partially exposed by patterning. To be more precise, resist50is patterned so as to expose portions for electrically connecting the two conductive foils together.

Subsequently, as shown inFIG. 9C, the first conductive foil40is etched by use of this resist50. Since the first conductive foil40is made of the material mainly containing Cu, chemical etching is performed by use of ferric chloride or cupric chloride as an etchant. Although the open diameter of the through hole52varies depending on resolution of photolithography, the open diameter ranges from about 50 to 100 μm in this case.

Next, as shown inFIG. 9D, after removing the resist50, the insulative resin42immediately below the through holes52is removed with a laser while using the first conductive foil40as a mask, whereby the rear surface of the second conductive foil41is exposed at the bottom of each of the through holes52. The laser used herein may be a carbon dioxide gas laser. If a residue remains at the bottom of the open portion after evaporating the insulative resin with the laser, this residue may be removed by wet etching with sodium permanganate, ammonium persulfate or the like.

As shown inFIG. 10A, a third process of this embodiment is intended to form connecting portions46in the through holes52and to electrically connect the first conductive foil40to the second conductive foil41.

A plated film serving as the connecting portions46for electrically connecting the second conductive foil41to the first conductive foil41is formed on the entire surface of the first conductive foil41including the through holes52. This plated film is made by both of electroless plating and electrolytic plating. Here, Cu in a thickness of about 2 μm is at least formed on the entire surface of the first conductive foil40including the through holes52by electroless plating. In this way, the first conductive foil40is electrically connected to the second conductive foil41. Accordingly, electrolytic plating is also performed while using the first conductive foil40and the second conductive foil41as electrodes. In this way, Cu is plated in a thickness of about 20 μm. In this way, Cu is buried in the through holes52, thereby forming the connecting portions46.

As shown inFIG. 10BtoFIG. 10D, a fourth process of this embodiments is intended to etch the first conductive foil40and the second conductive foil41into desired patterns and thereby to form first conductive patterns43and second conductive patterns44.

Surfaces of the first conductive foil40and the second conductive foil41are patterned by chemical etching while covering the surfaces with photoresist50formed into desired patterns. Since the conductive foils are made of the material mainly containing Cu, ferric chloride or cupric chloride may be used as an etchant.

As shown inFIGS. 11A and 11B, a fifth process of this embodiment is intended to cover the first conductive patterns43with resin film48and then to expose the surfaces of the first conductive patterns43out of the resin film48.

Firstly, as shown inFIG. 11A, the resin film48is formed so as to cover the first conductive patterns43. This resin film48can be formed either by coating a liquefied resin film or by laminating sheet-shaped resin films. Formation of the resin film48by lamination can be achieved by a method similar to the method described with reference toFIGS. 2A to 2C. In this embodiment as well, the resin film48covering upper surfaces of the first conductive patterns43becomes thinner than the resin film48directly covering the insulative resin42.

Next, as shown inFIG. 11B, the upper-surfaces of the first conductive patterns43are exposed by entirely etching a surface of the resin film48. In this process, the resin film48is etching by a simplified method without using an exposure mask. Accordingly, it is possible to expose the upper surfaces of the patterns by the simplified method curtailing an exposure process. Moreover, since the method does not apply the exposure mask, it is possible to design the entire device while ignoring aligning accuracy of this mask. Therefore, it is possible to enhance patterning density. Here, in order to ensure exposure of the upper surfaces of the first conductive patterns43, it is also possible to carry out etching of the resin film48until side surfaces of the first conductive patterns43are partially exposed.

As shown inFIGS. 12A to 12C, a sixth process of this embodiment is intended to fix circuit elements45onto the surfaces of the first conductive patterns43and further to seal the circuit elements45.

Firstly, as shown inFIG. 12A, the circuit elements45are fixed onto the first conductive patterns43. Here, the circuit elements45are fixed onto the surface of the first conductive patterns43, and then the circuit elements45are electrically connected by use of metal thin lines19when appropriate. Active elements and passive elements are generally applicable to the circuit elements45.

Next, as shown inFIG. 12B, the circuit elements45and the metal thin lines19are covered and sealed with sealing resin47. Moreover, as shown inFIG. 12C, the second conductive patterns44exposed out of a rear surface of the device are subjected to a rear-surface treatment. To be more precise, the rear surface except positions for forming external electrodes53is covered with covering resin22. Then, the circuit device including the multilayer wiring is finished by forming the external electrodes53.