Graphics system for supporting multiple digital display interface standards

The present invention sets forth an apparatus for supporting multiple digital display interface standards. In one embodiment, the apparatus includes a graphics processing unit (GPU) configured to determine a display device type of a display device that is in connection with a digital display interconnect, receive a display device information associated with the display device, and output a first data signal to the display device. The display device is of display port (DP) digital display interface standard and the digital display interconnect is of digital visual interface (DVI) digital display interface standard. The apparatus further includes a removable adaptor circuitry between the display device and the digital display interconnect.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention generally relates to a graphics system, and more particularly, to a graphics system that is capable of supporting multiple digital display interface standards.

2. Description of the Related Art

As display devices complying with the latest digital display interface standards become more prevalent, accommodating connections among them becomes more and more important from the perspective of graphics system providers. To support this requirement, many solutions have been introduced. For example, graphics cards equipped solely with digital display interconnects meeting the display port (DP) digital display interface standard are offered. However, since display devices of non-DP digital display interface standards (e.g., digital visual interface (DVI) digital display interface standard) are still the mainstream in the current market such arrangement renders the backward compatibility more expensive because additional adaptors, such as DP-to-DVI adaptors, are necessary for facilitating the connection with the DVI-based display devices.

Moreover, due to physical space limitation associated with the graphics cards any attempt of placing a sufficient number of both DP- and DVI-based digital display interconnects on the same graphics card has been proved impractical.

What is needed in the art is thus a graphics system that is capable of supporting multiple digital display interface standards that can address the foregoing limitations.

SUMMARY OF THE INVENTION

An apparatus configured to interface a display device supporting a first digital display interface standard is provided. In one embodiment, the apparatus includes a removable adaptor circuitry coupled to the display device, and a graphics processing unit (GPU) coupled to the removable adaptor circuitry via a digital display interconnect supporting a second digital display interface standard. The GPU is configured to determine a display device type of the display device that is in connection with the digital display interconnect, receive a display device information associated with the display device, and output a first data signal to the display device. The first digital display interface standard may refer to the display port (DP) digital display interface standard, and the second digital display interface standard may refer to the digital visual interface (DVI) digital display interface standard.

A computer readable medium containing a sequence of instructions for supporting multiple digital display interface standards is provided. In one embodiment, when a GPU executes the sequence of instructions, the execution causes the GPU to determine a display device type of the display device that is in connection with the digital display interconnect, receive a display device information associated with the display device, and output a first data signal to the display device.

A computing device capable of supporting multiple digital display interface standards is provided. In one embodiment, the computing device includes a display device supporting a first digital display interface standard, a graphics system having a digital display interconnect supporting a second digital display interface standard, and a GPU. The GPU is configured to determine a display device type of the display device that is in connection with the digital display interconnect, receive a display device information associated with the display device, and output a first data signal to the display device. The computing device further includes a removable adaptor circuitry coupled to the display device and the digital display interconnect, wherein the first digital display interface standard may correspond to the DP digital display interface standard, and the second digital display interface standard may correspond to the DVI digital display interface standard.

At least one advantage of the present invention is the DVI-based digital display interconnects on a single graphics card could be fully utilized to connect both DVI- and DP-based display devices, without incurring too much additional expenses.

DETAILED DESCRIPTION

FIG. 1is a simplified block diagram illustrating a computing device102configured to implement one or more aspects of the present invention. The computing device102includes a graphics system104and a basic input output system (BIOS)106. The graphics system104further includes a graphics processing unit (GPU)108, a first digital display interconnect112, and a second digital display interconnect114. The first digital display interconnect112and the second digital display interconnect114are for connection with first and second display devices116and118, respectively. It is worth noting that the first digital display interconnect112and the second digital display interconnect114are of the same digital display interface standard. In one implementation, that digital display interface standard is DVI digital display interface standard. Accordingly, the connection between the first display device116and the first digital display interconnect112could be established successfully if the first display device116is of DVI standard. When the second display device118is of DP digital display interface standard, a removable adaptor circuitry122, which is between the DP-based second display device118and the second digital display interconnect114, is required. Consequently, the DP-based second display device118could be in connection with the second digital display interconnect114.

In response to the connection of the display device, the GPU108may output first control signal124to the first digital display interconnect112or the second control signal126to the second digital display interconnect114. As such, the first display device116could receive the first control signal124from the first digital display interconnect112, and the second display device118could receive the second control signal126from the second digital display interconnect114through the adaptor circuitry122. It is worth noting that the first control signal124and the second control signal126are from distinct signal pins of the GPU108and outputted to the first digital display interconnect112and the second digital display interconnect114after the selection of a first switch127. The selection of the first switch127depends on which display device116or118has been in connection with the graphics system104. When a DVI-based display device is connected, the first control signal124is outputted. When a DP-based display device is connected, the second control signal126is transferred. In one implementation, the signal pin that outputs the first control signal124is the I square C (I2C) signal pin, while the second control signal126is from the auxiliary (AUX) signal pin of the GPU108. The first control signal124and the second control signal126are of different formats (e.g., signal level) that are corresponding to the connected display devices116and118. The first control signal124and the second control signal126are for asking for display device information of the display devices116and118. Upon the receipt of the first control signal124and the second control signal126, the first display device116and the second display device118respond with their corresponding information in forms of the first control signal124and the second control signal126, back to the same signal pins of the GPU108from which the control signals124and126are outputted. In one implementation, the display device information is extended display identification data (EDID) information. The EDID information comprises size of display device, refreshing rate, and resolution rate.

Thereafter, the GPU108outputs a first data signal128to the first digital display interconnect112or a second data signal129to the second digital display interconnect114so that the first display device116or the second display device118could receive the first data signal128or the second data signal129for display. It is worth noting that the first data signal128and the second data signal129are from the different signal pins (digital link pins) of the GPU108. In one implementation, the first data signal128in the form of a minimized differential signaling (TMDS) is outputted from a signal pin of “Link A.”. On the other hand, the second data signal129from another signal pin (such as “Link B”) could be for the DVI- or DP-based display device.

The GPU108could recognize the connection of the first display device116or the second display device118in multiple ways. In one implementation, the computing device102further includes a second switch132indicative of which display device has been in connection with the graphics system104. The BIOS106is configured to receive that connection information from the second switch132, and notify the GPU108of the same. The BIOS106may be including distinct BIOS chips (not shown), each of which is for receiving the information of the connection of the distinct display device116or118. In another implementation, a general purpose input output (GPIO) pin of the GPU108is utilized by being electrically connected with the first digital display interconnect112and the second digital display interconnect114. Whenever the first digital display interconnect112or the second digital display interconnect114is in connection with the first display device116or the second display device118, the voltage level of the GPIO pin could vary accordingly so as to reflect the connection. In yet another implementation, a ground pin138of the adaptor circuitry122, which is connected to the first switch127, could be set to indicate the connection of the second display device118with the second digital display interconnect114.

In conjunction withFIG. 1,FIG. 2Ais a simplified block diagram showing a removable adaptor circuitry202according to one embodiment of the present invention. The adaptor circuitry202is disposed between a DVI-based digital display interconnect204and a DP-based display device206. The adaptor circuitry202further comprises a level shifting circuit208. When the GPU108recognizes the connection between the second digital display interconnect114and the second display device118, the GPU outputs the second control signal126and second data signal129to the second display device118through the adaptor circuitry122. The adaptor circuitry202serves the same function as the adaptor circuitry122does inFIG. 1. InFIG. 2A, when the DVI-based digital display interconnect204(the second digital display interconnect114inFIG. 1) is in connection with of the DP-based display device206(the second display device118inFIG. 1), an AUX-based control signal212(the second control signal126inFIG. 1) from its AUX signal pin (not shown) to the DVI-based digital display interconnect204. The AUX-based control signal212is to be received by the level shifting circuit208. The display device information responded by the DP-based display device206is in the form of another AUX-based control signal214(the second control signal126inFIG. 1). The AUX-based control signal214will be transmitted back to the GPU108through the level shifting circuit208as well. The level shifting circuit208could be configured to raise the signal level of either or both of the AUX-based control signals212and214. After getting the display device information, the GPU108could send a TMDS-based data signal216according to the display device information, to the DP-based display device206(the data signal128) through the adaptor circuitry202for display.

In conjunction withFIG. 1,FIG. 2Bis a simplified block diagram showing another removable adaptor circuitry252according to one embodiment of the present invention. The adaptor circuitry252(the adaptor circuitry122) is disposed between another DVI-based digital display interconnect254(the second digital display interconnect114) and another DP-based display device256(the second display device118). The adaptor circuitry252further comprises a TMDS drive circuit258so as to receive another TMDS-based data signal262(the data signal128) from the DVI-based digital display interconnect254. The adaptor circuitry252also includes a level shifting circuit259for receiving AUX-based control signals264and266(the second control signal126) from both the DVI-based digital display interconnect254and the DP-based display device256, respectively. The transfer of the TMDS-based data signal262follows the receipt of the AUX-based control signal266, which is triggered by the receipt of the AUX-based control signal264on the part of the GPU108.

In conjunction withFIG. 1,FIG. 3is a flow chart showing a method300for supporting different digital display interface standards according to one embodiment of the present invention. In step302, the GPU108determines the type of the display device116or118that is in connection with the digital display interconnect112or114. It is worth noting that the display device type of the display device116or118may be referred to as the digital display interface standard of the display device116or118. In step304, the GPU108retrieves the display device information associated with the display device116or118that is in connection with the digital display interconnect112or114, by sending out control signals of formats corresponding to the display device type. In step306, the GPU108outputs the data signal corresponding to display device type of the display device116or118through the digital display interconnect112or114.

In addition to the above description where only one display device is made in connection with the digital display interconnect or only one control signal is outputted to the display device or received by the GPU, the embodiments of the present invention include the connections of more than one display device and usage of more than one control signal at the same time.

The above description illustrates various embodiments of the present invention along with examples of how aspects of the present invention may be implemented. One embodiment of the present invention may be implemented as a program product for use with a computer system. The program(s) of the program product define functions of the embodiments (including the methods described herein) and can be contained on a variety of computer-readable storage media. Illustrative computer-readable storage media include, but are not limited to: (i) non-writable storage media (e.g., read-only memory devices within a computer such as CD-ROM disks readable by a CD-ROM drive, ROM chips, or any type of solid-state non-volatile semiconductor memory) on which information is permanently stored; and (ii) writable storage media (e.g., floppy disks within a diskette drive, CD-RW disks, DVD-RW disks, flash memory, hard-disk drive, or any type of solid-state random-access semiconductor memory) on which alterable information is stored. The above examples, embodiments, instruction semantics, and drawings should not be deemed to be the only embodiments, and are presented to illustrate the flexibility and advantages of the present invention as defined by the following claims.