Semiconductor Device and Method for Manufacturing the Same

A semiconductor device includes a wiring layer, and a first semiconductor chip and a second semiconductor chip disposed on the wiring layer. In addition, the semiconductor device includes a heat sink disposed on a back surface side of the first semiconductor chip and a back surface side of the second semiconductor chip. The heat sink includes a material having a thermal conductivity greater than thermal conductivities of the first semiconductor chip and the second semiconductor chip, and a reinforcing rib is formed on the heat sink.

TECHNICAL FIELD

The present invention relates to a semiconductor device and a method for manufacturing the same.

BACKGROUND ART

In recent years, further improvement has been required in performance of mobile terminals including smartphones. For this reason, different materials integration, integration scale improvement, and high-frequency signal transmission are required for semiconductor packages constituting a mobile terminal. In addition, since the semiconductor packages are for mobile applications, thinning of the semiconductor packages is also required. As a technology for achieving them, a wafer level package (WLP) have attracted attention.

In the WLP, since semiconductor chips of various materials and shapes are sealed with a molding resin, integration of different materials is possible. In addition, with improvement of patterning accuracy of exposure devices and accuracy of the chip transfer machines, wiring can be performed finely and highly accurately between different semiconductor chips, and thus, improvement of integration scale and transmission of high-frequency signals can be achieved. Further, in flip chip mounting that is a conventional semiconductor package mounting technology, a package substrate is required, but in the WLP, the package substrate is not required, and thinning of the semiconductor packages can be achieved.

As a method for manufacturing the WLP, for example, as described in Non Patent Literature 1, there are various manufacturing methods such as a “face-down” method and a “face-up” method. Any manufacturing methods are characterized by batch manufacturing at the wafer level and can reduce the cost per package.

As an example of the method for manufacturing the WLP, a “face-up” method manufacturing method will be described. First, an adhesive layer is formed on a support substrate, and a semiconductor chip is mounted on the adhesive layer using a chip transfer machine. In this mounting, a back surface of the semiconductor chip with respect to a circuit formation surface is brought into contact with the adhesive layer. Subsequently, the semiconductor chip is sealed with a molding resin to form a dummy wafer. Further, the molding resin sealing the semiconductor chip is ground to expose the circuit formation surface of the semiconductor chip. Next, a wiring layer is formed on the exposed circuit formation surface by a known build-up method. Finally, the support substrate and the adhesive layer are peeled off from the dummy wafer, and singulation into individual packages is performed.

As described above, the WLP has various merits. However, the WLP also has problems. One of the problems is heat dissipation due to sealing of the semiconductor chip with the molding resin. The thermal conductivity of the molding resin used for the WLP is typically around 1 W/m·K. This value is smaller than about 170 W/m·K, which is a value of Si as a typical semiconductor chip, and about 400 W/m·K, which is a value of copper as a typical material of a heat dissipation substrate. Heat generated in the semiconductor chip sealed with such a molding resin cannot be diffused, which may lead to a temperature rise of the semiconductor chip.

Against the background of the problem regarding the heat dissipation described above, a technology has been devised for improving heat dissipation characteristics of a WLP structure. As a typical technology, there is a method of attaching a heat dissipation substrate to a semiconductor chip. This will be described with reference toFIG.4.

In this semiconductor device, two semiconductor chips302and303are sealed by a molding resin layer305on a wiring layer301. In addition, the semiconductor chip302and the semiconductor chip303are provided with a heat dissipation substrate307with an adhesive layer306interposed therebetween. In addition, an integrated circuit302aof the semiconductor chip302and an integrated circuit303aof the semiconductor chip303are electrically connected to each other through wiring301aformed in the wiring layer301. In addition, a terminal301bis disposed below the wiring layer301, and the wiring layer301is connected (mounted) to a printed circuit board (not illustrated) through the terminal301b.

In the semiconductor device, heat generated in the semiconductor chip302and the semiconductor chip303is diffused from the heat dissipation substrate307to the atmosphere through the adhesive layer306, so that the heat dissipation of the WLP can be improved.

In addition, there is a semiconductor device for which heat dissipation improvement of the WLP structure is attempted that is disclosed in Non Patent Literature 2. The semiconductor device will be described with reference toFIG.5. In the semiconductor device, the two semiconductor chips302and303are sealed by a sealing layer315including Cu on the wiring layer301. The periphery of the semiconductor device is surrounded by a silicon layer316. Note that the integrated circuit302aof the semiconductor chip302and the integrated circuit303aof the semiconductor chip303are electrically connected to each other through the wiring301aformed in the wiring layer301. In addition, a terminal301bis disposed below the wiring layer301, and the wiring layer301is connected (mounted) to a printed circuit board (not illustrated) through the terminal301b.

In the semiconductor device, heat generated in the semiconductor chip302and the semiconductor chip303is diffused from the sealing layer315including copper into the atmosphere, so that the heat dissipation of the WLP can be improved. In addition, the outer periphery of the semiconductor device is surrounded by the silicon layer316, and the thickness of the semiconductor device coincides with the thickness of the silicon layer316on the outer periphery, from a manufacturing method to be described later. Thus, thinning of the semiconductor package can be achieved.

CITATION LIST

Non Patent Literature

SUMMARY OF INVENTION

Technical Problem

In the semiconductor device described with reference toFIG.4, two manufacturing methods are conceivable. First, there is a manufacturing method using a plate-shaped heat dissipation substrate as the support substrate. In this manufacturing method, the support substrate is not peeled off after the wiring layer is formed, and singulation into individual packages including the support substrate is performed. However, since the heat dissipation substrate of this manufacturing method requires mechanical strength that can withstand a step of forming the wiring layer, the support substrate serving as the heat dissipation substrate requires a certain thickness. For this reason, in this manufacturing method, thinning of the semiconductor package required for mobile applications is limited.

Secondly, there is a manufacturing method in which after the wiring layer is formed, the support substrate and the adhesive layer are peeled off from the dummy wafer, and a heat sink is attached to each singulated package. In this manufacturing method, mechanical strength is not required for the heat sink. For this reason, the heat sink can be thinned, and it is possible to achieve thinning of the semiconductor package suitable for mobile applications. However, in the second manufacturing method, since the heat sink cannot be provided as batch mounting at the wafer level, the cost per package increases.

As described above, in the semiconductor device described with reference toFIG.4, it is difficult to achieve both the heat dissipation of the WLP structure and the thinning of the package.

In the semiconductor device described with reference toFIG.5, the heat dissipation of the WLP can be improved while suppressing the thickness of the semiconductor device by suppressing the thickness of the Si layer on the outer periphery. However, a method for manufacturing this configuration is more costly than the manufacturing method described in Non Patent Literature 1. To describe this, a description will be given of a method for manufacturing the semiconductor device ofFIG.5.

First, the adhesive layer is formed on the support substrate, and the semiconductor chip is mounted on the adhesive layer using a chip transfer machine. At this time, the circuit formation surface of the semiconductor chip is mounted to be in contact with the adhesive layer. Subsequently, a Si interposer wafer including a hole having a size of about each package size is mounted on the support substrate. In this step, the mounted semiconductor chip is placed in the hole of the Si interposer wafer. Thereafter, the hole of the Si interposer wafer is filled with copper by an electroplating method to form the dummy wafer.

Next, the support substrate and the adhesive layer are peeled off from the dummy wafer to expose the circuit formation surface of the semiconductor chip. The wiring layer is formed on the exposed circuit formation surface by the build-up method. Finally, the dummy wafer is singulated into individual packages.

As described above, in the manufacture of the semiconductor device of Non Patent Literature 2, mounting and peeling of the Si interposer wafer and filling of copper are required as compared with the manufacturing method described with reference to Non-Patent Literature 1, so that the step becomes complicated and the manufacturing cost increases. As described above, in the conventional technology, there has been a problem that the WLP structure capable of obtaining high heat dissipation cannot be formed thin in a state where the manufacturing cost is suppressed.

The present invention has been made to solve the above problem, and an object of the present invention is to enable the WLP structure capable of obtaining high heat dissipation to be formed thinner while suppressing manufacturing cost.

Solution to Problem

A semiconductor device according to the present invention includes: a wiring layer in which wiring is formed; a first semiconductor chip and a second semiconductor chip disposed on the wiring layer and molded with a molding resin layer including a molding resin; a first integrated circuit formed on the first semiconductor chip and connected to the wiring; a second integrated circuit formed on the second semiconductor chip and connected to the wiring; a heat sink that is disposed on a back surface side of the first semiconductor chip and a back surface side of the second semiconductor chip, includes a material having a thermal conductivity greater than thermal conductivities of the first semiconductor chip and the second semiconductor chip, and dissipates heat of the first semiconductor chip and the second semiconductor chip; and a reinforcing rib formed on the heat sink in a region where the first semiconductor chip and the second semiconductor chip are not disposed.

A method for manufacturing a semiconductor device according to the present invention includes: a first step of fixing a back surface of a first semiconductor chip in which a first integrated circuit is formed on a main surface and a back surface of a second semiconductor chip in which a second integrated circuit is formed on a main surface, to a region where a reinforcing rib is not formed, of a heat sink on which the reinforcing rib is formed and that includes a material having a thermal conductivity greater than thermal conductivities of the first semiconductor chip and the second semiconductor chip; a second step of molding the first semiconductor chip and the second semiconductor chip fixed to the heat sink with a molding resin on the heat sink to form a molding resin layer; and a third step of performing formation to a state in which the first semiconductor chip and the second semiconductor chip are disposed on a wiring layer including wiring, the first integrated circuit and the second integrated circuit are connected to the wiring, and the first semiconductor chip and the second semiconductor chip are molded with the molding resin layer on the wiring layer.

Advantageous Effects of Invention

As described above, according to the present invention, since the heat sink includes the reinforcing rib, it is possible to form a thinner WLP structure capable of obtaining high heat dissipation while the manufacturing cost is suppressed.

DESCRIPTION OF EMBODIMENTS

Hereinafter, a semiconductor device according to an embodiment of the present invention will be described with reference toFIGS.1A and1B. The semiconductor device includes a wiring layer101, and a first semiconductor chip102and a second semiconductor chip103disposed on the wiring layer101.

The first semiconductor chip102and the second semiconductor chip103are formed of, for example, a semiconductor such as Si, InP, GaN, or GaAs. The first semiconductor chip102and the second semiconductor chip103can include different materials. For example, the first semiconductor chip102can be manufactured from a compound semiconductor, and the second semiconductor chip103can be manufactured from Si.

Wiring101aincluding metal is formed in the wiring layer101. A first integrated circuit102aelectrically connected to the wiring101ais formed on a main surface of the first semiconductor chip102facing the wiring layer101side. A second integrated circuit103aelectrically connected to the wiring101ais formed on a main surface of the second semiconductor chip103facing the wiring layer101side. The first integrated circuit102aand the second integrated circuit103aare connected to each other by the wiring101a. The first semiconductor chip102and the second semiconductor chip103are molded by a molding resin layer106including a molding resin on the wiring layer101.

In addition, the semiconductor device includes a heat sink104disposed on a back surface side of the first semiconductor chip102and a back surface side of the second semiconductor chip103. The heat sink104includes a material having a thermal conductivity greater than thermal conductivities of the first semiconductor chip102and the second semiconductor chip103, and is used to dissipate heat of the first semiconductor chip102and the second semiconductor chip103. The heat sink104can include, for example, an insulating material such as silicon carbide, aluminum nitride, beryllium oxide, or diamond.

In this example, the first semiconductor chip102and the second semiconductor chip103are bonded and fixed to the heat sink104using an adhesive layer108. The adhesive layer108can include, for example, solder containing lead and tin as main components. In this case, the first semiconductor chip102and the second semiconductor chip103are fixed to the heat sink104by so-called soldering. In addition, the first semiconductor chip102and the second semiconductor chip103can be fixed to the heat sink104by a known direct bonding technology. In this case, the first semiconductor chip102and the second semiconductor chip103are fixed in direct contact with the heat sink104.

Here, in the semiconductor device, a reinforcing rib105is formed on the heat sink104. The reinforcing rib105is a columnar structure formed on a surface of the plate-shaped heat sink104on the wiring layer101side and extending in the planar direction of the heat sink104. The reinforcing rib105can be, for example, a columnar structure having a rectangular cross section. The reinforcing rib105is formed on the heat sink104in a region where the first semiconductor chip102and the second semiconductor chip103are not disposed. For example, as illustrated inFIG.1B, the reinforcing rib105can be disposed in a peripheral portion of the heat sink104having a rectangular shape in a plan view in a state of surrounding the inside of the heat sink104. In addition, the reinforcing rib105can also be disposed in a lattice shape on a plane of heat sink104in a plan view. The heat sink104and the reinforcing rib105can be integrally formed.

As described above, since the strength of the heat sink104can be enhanced by providing the reinforcing rib105, the plate thickness of the heat sink104can be made thinner, and the WLP structure capable of obtaining high heat dissipation can be formed thinner. Note that heat generated in the first semiconductor chip102and the second semiconductor chip103is diffused from the heat sink104into the atmosphere. In a case where the adhesive layer108is used, heat generated in the second semiconductor chip103is diffused into the atmosphere from the heat sink104via the adhesive layer108. In this configuration, since the molding resin layer106is not interposed in a heat dissipation path, heat dissipation can be improved.

Note that, in the semiconductor device (package), a terminal101bis formed under the wiring layer101, and the wiring layer101is electrically connected (mounted) to a printed circuit board107through the terminal101b. In this example, secondary mounting of the WLP on the printed circuit board107by the face-down method is exemplified, but effects of the present invention can also be obtained by another method such as the face-up method of the WLP, or a design in which the secondary mounting is not performed.

Next, a method for manufacturing a semiconductor device according to the present invention will be described with reference toFIGS.2A to2D.

First, as illustrated inFIG.2A, the back surface of the first semiconductor chip102in which the first integrated circuit is formed on the main surface and the back surface of the second semiconductor chip103in which the second integrated circuit is formed on the main surface are fixed to the heat sink104(first step). As described above, the heat sink104includes a material having a thermal conductivity greater than thermal conductivities of the first semiconductor chip102and the second semiconductor chip103. In addition, the reinforcing rib105is formed on the heat sink104, and the first semiconductor chip102and the second semiconductor chip103are fixed to a region where the reinforcing rib105is not formed. For example, these are fixed by the adhesive layer108including solder or the like. The reinforcing rib105is formed on the wiring layer101side of the heat sink104.

Next, as illustrated inFIG.2B, the first semiconductor chip102and the second semiconductor chip103fixed to the heat sink104are molded with a molding resin on the heat sink104to form the molding resin layer106(second step). The molding resin layer106can be formed by, for example, forming a layer of the molding resin by a known compression molding method, transfer molding method, or the like and curing the layer of the molding resin formed.

Next, as illustrated inFIG.2C, the molding resin layer106on the main surface side of each of the first semiconductor chip102and the second semiconductor chip103is thinned by grinding or the like to expose the main surfaces (integrated circuit formation surfaces) of the first semiconductor chip102and the second semiconductor chip103. For example, the above-described thinning can be performed by a well-known grinding technology or the like.

Next, as illustrated inFIG.2D, the wiring layer101including the wiring101ais formed by, for example, a known build-up method (third step). In the case of assuming secondary mounting on a printed circuit board, the terminal101bby a solder bump or the like is formed on the wiring layer101. Through this step, the first semiconductor chip102and the second semiconductor chip103are disposed on the wiring layer101. Formation to a state is performed in which the first integrated circuit and the second integrated circuit are connected to the wiring101a, and the first semiconductor chip102and the second semiconductor chip103are molded with the molding resin layer106on the wiring layer101. Note that, in this type of technology, the wiring layer101manufactured in this manner may be referred to as a rewiring layer.

Thereafter, the heat sink104is cut to be singulated into individual semiconductor devices (packages). For example, singulation can be performed by a known dicing technology. After the singulation, each semiconductor device is mounted on the printed circuit board as described with reference toFIG.1. For example, in a case where the terminal101bis a solder bump, the mounting on the printed circuit board can be performed by using a known reflow technology.

As described above, according to the embodiment, manufacturing is performed with the heat sink104as a support substrate, and after the wiring layer101is formed, singulation is performed without peeling off the heat sink104used as the support substrate, so that the manufacturing step is simplified, and the WLP structure capable of obtaining high heat dissipation can be manufactured while suppressing the manufacturing cost. In addition, as described above, since the reinforcing rib105is provided, even if the plate thickness of the heat sink104is made thinner in a state where high strength is maintained, it is possible to withstand a manufacturing process as the support substrate, and the WLP structure capable of obtaining high heat dissipation can be formed thinner.

Meanwhile, as illustrated inFIG.3, a first semiconductor chip109and a second semiconductor chip110having different thicknesses can also be used. For example, the first semiconductor chip109can be formed to be thicker than the second semiconductor chip110. A first integrated circuit109aelectrically connected to the wiring101ais formed on a main surface of the first semiconductor chip109facing the wiring layer101side. A second integrated circuit110aelectrically connected to the wiring101ais formed on a main surface of the second semiconductor chip110facing the wiring layer101side. In this case, the plate thickness of a heat sink104ain a second region152where the second semiconductor chip110is disposed is made thicker than the plate thickness of the heat sink104in a first region151where the first semiconductor chip109is disposed. The other configurations are similar to those described above.

In addition, in the method for manufacturing a semiconductor device in this case, in the above-described manufacturing method, the plate thickness of the heat sink104at a position where the second semiconductor chip110is disposed is made thicker than the plate thickness of the heat sink104at a position where the first semiconductor chip109is disposed.

As described above, according to the present invention, since the heat sink includes the reinforcing rib, it becomes possible to form a thinner WLP structure capable of obtaining high heat dissipation while the manufacturing cost is suppressed.

Note that it is obvious that the present invention is not limited to the embodiment described above, but can be modified and combined in many ways by a person having ordinary knowledge in the art within the technical idea of the present invention.

REFERENCE SIGNS LIST