Splice cassettes and chips

A splice cassette includes a base and a cover. The base includes an outer channel and an inner storage region separated by a spool wall. The cover is configured to mount to the base to enclose the inner storage region. The outer channel extends radially outwardly from a perimeter of the cover. The cover includes guide spools and a chip receiving arrangement disposed on an inwardly-facing surface that faces the base when the cover mounts to the base. The splice chip remains on the cover when the cover is removed from the base.

BACKGROUND

A wide variety of telecommunication applications utilize fiber optic cables, and in turn involve fiber optic cable splicing and fiber optic cable storage. In these applications, a splice tray is often used to store spliced fiber optic cables. The splice trays commonly include a splice chip for holding or retaining the splice elements of the cables. In telecommunications centers, numerous cables are present. It is desired that such equipment can organize the cables and permit access to the cables in an orderly manner.

SUMMARY

Aspects of the disclosure are directed to a splice cassette including a base and a cover. The base includes an outer channel and an inner storage region separated by a spool wall. The cover is configured to mount to the base to enclose the inner storage region. The cover includes guide spools and a chip receiving arrangement disposed on an inwardly-facing surface that faces the base when the cover mounts to the base.

Other aspects of the disclosure relate to a method of storing excess length of cables in a splice cassette. The cables include jacketed or buffered portions and stripped portions. The method includes (a) mounting a splice between two fibers to a splice chip that is attached to a cover of the splice cassette; (b) fastening a plurality of optical cables to a base of the splice cassette; (c) routing part of the stripped portions of the cables around guides of the cover so that the stripped portions extend in a common direction; (d) routing another part of the stripped portions of the cables within an inner storage region of the base; (e) mounting the cover to the base; and (f) routing the jacketed or buffered portions of the cables around an outer channel of the base.

A variety of examples of desirable product features or methods are set forth in part in the description that follows, and in part will be apparent from the description, or may be learned by practicing various aspects of the disclosure. The aspects of the disclosure may relate to individual features as well as combinations of features. It is to be understood that both the foregoing general description and the following detailed description are explanatory only, and are not restrictive of the claimed invention.

DETAILED DESCRIPTION

Reference will now be made in detail to various features of the present disclosure that are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used throughout the drawings to refer to the same or like parts.

In general, the disclosure is directed to example splice cassettes including a splice chip held by a cover that couples to a base. The base includes an outer storage channel in which jacketed/buffered cables are stored. The base also includes an inner storage space in which bare/buffered optical fibers are stored. The cover cooperates with the base to enclose the inner storage space when the cover is mounted to the base. The splice chip is configured to hold multiple rows of splices. In certain implementations, the splice chip is configured to hold a stack of splices in each row.

FIG. 1is a perspective view of a bottom portion of a rack100configured to hold telecommunications equipment. The rack100includes a splice region110at which one or more splice cassettes may be stored on the rack100. In the example shown, a sliding drawer, blade, or other frame112is mounted to the rack100at the splice region110. The sliding frame112includes compartments114at which the splice cassettes200may be disposed. The frame112may be slid forwardly or rearwardly relative to the rack100to provide access to the splice cassettes200disposed in the drawer compartments114. The splice cassettes200are configured to stack or otherwise fit together so that a bottom of one splice cassette200engages a top of another splice cassette200.

In the example shown, the compartments114include a front compartment that extends horizontally across the rack100from a first side to a second side. The front compartment is configured to hold one or more splice cassettes200in a row extending parallel to a sideways axis of the rack100. A forward-rearward facing compartment is disposed at each of opposite ends of the front compartment. Each forward-rearward facing compartment is configured to hold one or more splice cassettes200in a row extending parallel to a forward-rearward axis of the rack100. Behind the front axis, additional forward-rearward facing compartments may be disposed. In other implementations, however, the sliding frame112may include a greater or lesser number of compartments114arranged in various other configurations.

FIG. 2is a perspective view of an example splice cassette200including a base210, a cover230, and a splice chip250shown exploded outwardly from each other. The splice cassette200has a first side202and an opposite second side204. The cover230defines a portion of the first side202and the base210defines the second side204. The splice cassette200also includes opposite elongated sides206extending between the first and second sides202,204of the cassette200. Opposite ends208extend between the opposite sides206and between the first and second sides202,204.

The splice chip250is positioned to be enclosed by the base210and cover230when the cover230is mounted to the base210. In particular, the base210defines an inner space213bounded by a spool212. The cover230is sized and shaped to seat on the spool212and extend over the inner space213. In certain implementations, the splice chip250mounts to the cover230and includes latching fingers258that extend towards the base210when the cover230is mounted to the base210. The splice chip250is configured to hold one or more splices as will be disclosed in more detail herein.

FIGS. 3-6illustrate one example base210suitable for use with splice cassette200. The base210includes a panel211having a surface that defines the second side204of the splice cassette200(seeFIG. 4). A spool wall212extends upwardly from an opposite surface of the panel211. The spool wall212bounds and defines an inner region213of the base210. One or more latch receivers215are disposed within the inner region213. One or more inner retention fingers214extend inwardly from the spool wall212and/or outwardly towards the latch receivers215within the inner region213. The inner retention fingers214extend generally parallel to the panel211.

One or more flanges217extend radially outwardly from the panel211at the spool wall212to form an outer channel216. In certain implementations, the flanges217extend parallel to the panel211. In certain implementations, the flanges217are integral with the panel211. In certain implementations, the flanges217are circumferentially spaced apart to provide finger-room to facilitate routing cables around the outer channel216. Cable retainers218extend upwardly from the distal ends of the flanges217and outer retention fingers219extend radially outwardly from the spool212to further define the outer channel216and aid in retaining the cables within the outer channel216.

The base210also defines a transition region220at which the outer channel216connects to the inner region213. In particular, a transition channel221extends from the outer channel216to the inner region213(seeFIG. 5). In the example shown, the transition channel221is formed by an offset between first and second ends212a,212bof the spool wall212. The transition channel221is further defined by a transition guide222that extends parallel to a second end212bof the spool wall212. A gap223separates the second end212bof the spool wall212and the transition guide222.

One or more openings224are defined through a bottom surface of the cassette200at the transition region220. In certain implementations, the openings224are defined through the panel211. In other implementations, the openings224are defined through one or more of the flanges217. In still other implementations, the openings224are defined through both the panel211and one or more flanges217. In the example shown, eight openings224are defined through a flange217in alignment with the gap223between the spool wall212and the transition guide222. In other implementations, a greater or lesser number of openings224may be provided. The openings224facilitate securing cables transitioning between the outer channel216and the inner region213to the base210with cable fasteners as will be described in more detail herein.

FIGS. 7-10illustrate one example cover230suitable for use with splice cassette200. The cover230has a splice region245at which a splice chip250can be mounted. The cover230is sized and shaped to extend over the inner region213defined by the spool wall212. The cover230has an inwardly-facing surface231(seeFIG. 9) and an opposite outwardly-facing surface232(seeFIG. 10). When the cover230is coupled to the base210, the inwardly-facing surface231faces, but is spaced from the panel211of the base210. Support flanges233extend radially outwardly from the cover230to seat on the spool wall212when the cover230is coupled to the base210.

The cover230defines one or more finger grip detents234that define concave recesses in the outwardly facing surface232. The finger grip detents234facilitate grasping the cover230to mount the cover230to the base210and/or to remove the cover230from the base210. In the example shown, the cover230defines two finger grip detents234that are spaced apart along a length of the cassette200. In certain implementations, the finger grip detents234are defined by convex protrusions extending from the inwardly-facing surface231.

One or more flexible latch fingers235extend from the inwardly-facing surface231. The latch fingers235are positioned to align with the latch receivers215of the base210when the cover230is coupled to the base210. In the example shown, two latch fingers235are spaced apart along a length of the cover230and face in opposite directions. The latch fingers235are configured to extend into wells defined by the receivers215of the base210and to snap-fit to structures within the wells. The snap-fit connection between the fingers235and the receivers215may be overcome by a user pulling upon the finger grip detents234.

The cover230includes outer guides237and inner guides241to route optical fibers from the base210to the splice region250of the cover230. The outer guides237are configured to facilitate retaining the optical fibers within the perimeter of the cover230. The inner guides241are configured to alter the routing direction of the optical fibers and/or facilitate storage of excess fiber length. In the example shown, the inner guides241and the splice region245are disposed within a boundary defined by the outer guides237. A transition region236extends radially outwardly from the outer guides237to cooperate with the transition region220of the base210to protect the optical fibers as the fibers are routed from the base210to the cover230(seeFIG. 9).

As shown inFIG. 7, the outer guides237include a side wall238extending along a periphery of the cover230. The outer sidewall238defines gaps or breaks240to facilitate finger access to optical fibers routed within the outer guides237. The outer sidewall238adjacent the transition region236provides bend radius protection for optical fibers routed onto the cover230. One or more retention fingers239extend from the guides237,241parallel to the inwardly-facing surface231of the cover230. The retention fingers239aid in managing the optical fibers routed about the guides237,241.

The inner guides241form a storage arrangement on the cover230. The inner guides241include a first spool242and a second spool243. The spools242,243are positioned so that one or more optical fibers may be looped in a figure-8 or S-shaped pattern around the spools242,243on the cover230. The inner guides241also are positioned relative to the outer guides237to form an outer channel in which the optical fibers may be routed in a loop. A ramp244is disposed on the inwardly-facing surface231of the cover230and is oriented to extend along the length of the cover230. The ramp244aids in routing optical fibers between the cover230and the base210as will be described in more detail herein.

In the example shown, one of the spools242,243defines a substantially complete spool and another of the spools242,243defines a partial spool. In other implementations, both spools242,243may be complete spools or both spools242,243may be partial spools. In the example shown, each spool242,243at least partially surrounds a finger-grip detent234. In certain implementations, the inner guides241are positioned closer to one of the elongated sides of the cover230than the other.

A chip receiving arrangement246, which is configured to secure a splice chip250to the cover230, is disposed at the splice region245of the cover230. When the cover230is mounted to the base210, the splice chip250is held within the inner region213of the base210between the base panel211and the inwardly-facing surface231of the cover230. The chip receiving arrangement246includes one or more guides247along which the splice chip250can slide, a stop248against which the splice chip250abuts when mounted in the arrangement246, and a flexible ramp249or other latching member that locks the chip250into position.

In the example shown, the chip receiving element246includes the stop248extend between two spaced apart parallel guides247that define channels in which edges of the splice chip250(seeFIG. 13) may slide. The splice chip250is configured to be slid along the guides247until an edge of the splice chip250abuts the stop248. When the splice chip250has been slid over the ramp249, the ramp249snaps or springs to an initial position to lock the splice chip250in position. The guides247hold the splice chip250to the cover230and inhibit lateral movement of the splice chip250. The stop248and flexible ramp249inhibit axial movement of the splice chip250along the sliding axis of the splice chip250.

FIGS. 11-16illustrate one example splice chip250that is suitable for use with the splice cassette200described above. The splice chip250is configured to hold one or more splices265(FIG. 13). Of course, other types of splice chips may be utilized with the above-described splice cassette200. For example, another example splice chip suitable for use with the above described cassette200is disclosed in U.S. Pat. No. 7,684,669, the disclosure of which is hereby incorporated herein by reference. In still other implementations, the splice chip250may be used with other types of splice cassettes, such as the splice wheel disclosed in U.S. Pat. No. 6,480,660, the disclosure of which is hereby incorporated herein by reference.

The example splice chip250includes a base section251having a first side252and a second side253. The first side252of the base section251is generally flat and configured to slide over the inwardly-facing surface251of the cover230to mount the splice chip250to the chip receiving element246. In the example shown, opposite ends of the base section251define guide edges254shaped to complement the channels defined by guides247. For example, the guide edges254shown inFIG. 13have a tapered or triangular cross-section protruding laterally from the ends of the base section251. In other implementations, the guide edges254may be formed on adjacent ends or on sections that are angled relative to each other.

In some implementations, the splice chip250has a length ranging from about one inch to about two inches. In certain implementations, the splice chip250has a length ranging from about 1.1 inches to about 1.5 inches. In one example implementation, the length of the splice chip is about 1.4 inches. In one example implementation, the length of the splice chip is about 1.3 inches. In some implementations, the splice chip250has a width ranging from about 0.5 inches to about 1.5 inches. In certain implementations, the splice chip250has a width ranging from about 1.8 inches to about 1.2 inches. In one example implementation, the length of the splice chip is about 1.0 inches. In one example implementation, the length of the splice chip is about 1.1 inches. In one example implementation, the length of the splice chip is about 0.9 inches.

A support wall255extends upwardly from the second side253of the base section251at one end of the base section251. One or more separation members256extend upwardly from the second side253of the base section251to form one or more splice receiving rows257(seeFIGS. 13 and 14). In the example shown, the separation members256are spaced apart along an axis CLof the base section251between the guide edges254. Each row257extends laterally across the base section251and is sized to receive at least one splice265therein (seeFIGS. 13 and 14). In certain implementations, each row257defines a channel264in the base section251to aid in holding the splices265. As shown inFIG. 14, the separation members256are arranged parallel to each other and to the support wall255.

At least one latching finger258extends upwardly from the second side253of the base section251in lateral alignment with the separation member256of each row257to further define the row257. The latching fingers258are configured to retain the splice couplings265within the rows257. In particular, each latching finger258is configured to flex to facilitate insertion of the splice coupling265into the row257. Each latching finger258includes a tab or lug that snaps over the splice coupling265to hold the coupling265within the row257. In the example shown, the tab or lug extends towards the support wall255. In some implementations, one or more of the rows257has an even number of latching fingers258. In other implementations, each row includes an odd number of latching fingers.

In some implementations, at least one of the latching fingers258of one of the rows257has the same height as another of the latching fingers258of the row257. In certain implementations, all of the latching fingers258of the row257have the same height. In other implementations, however, at least one of the latching fingers258of a row257has a different height than another latching finger258of the same row257. In certain implementations, at least one of the rows257may include a latching member258having a first height, another latching member258having a second height that is different from the first height, and yet another latching member258having a third height that is different from the first and second heights.

Latching fingers258of different heights enable multiple splices265to be mounted in each row257. For example, as shown inFIG. 13, a row257having latching tabs258of three different heights may configured to receive a stack of three splices265. In other implementations, a row257may be configured to hold a greater or lesser number of splices265. In certain implementations, a plurality of rows257of the splice chip250have latching fingers258of different heights to support multiple splices265in each row257.

In some implementations, at least one of the rows257includes a pair259of latching fingers258having a common height. For example, inFIGS. 11 and 12, each row257includes a pair259of latching members258including a first latching finger260spaced laterally apart from a second latching finger261. In certain implementations, the first and second latching fingers260,261of each row257are disposed on opposite sides of the separation member256of the row257. In the example shown, the first and second latching fingers260,261are disposed at opposite sides of the base section251. In certain implementations, all of the rows257include the pair259of latching members258.

In some implementations, at least one of the rows257also includes at least a third latching member262that has a different height from the first and second latching members260,261. In the example shown, the third latching member262is shorter than the pair259of latching members. In other implementations, however, the third latching member262may be taller than the pair259of latching members. In some implementations, at least one of the rows257also includes at least a fourth latching member263that has a different height from the first, second, and third latching members260,261,262. In the example shown, the fourth latching member263is shorter than the third latching member262. In other implementations, however, the fourth latching member263may be taller than the third latching member262and/or the pair259of latching members.

In the example shown, each row257of the splice chip250includes four latching fingers258. The first and second latching fingers260,261are the tallest fingers258of the row257and are spaced the farthest apart along the row257. The third latching finger262is disposed between the separation member256of the row257and the second latching finger261. The third latching finger262is shorter than the first and second latching fingers. The fourth latching finger263is disposed between the separation member256of the row257and the first latching finger260. The fourth latching finger263is shorter than the third latching finger262. In other implementations, each row may include a greater or lesser number of latching fingers258. In some such implementations, one of the additional latching fingers258may form a pair with one of the third or fourth latching fingers262,263.

Two or more optical fiber cables may be routed to the splice cassette200to splice together two or more optical fibers. Excess length of the cables may be stored at the cassette200. For example, in some implementations, up to about six feet of jacketed cable may be stored in the outer channel216of the base210and up to about six feet of bare optical fiber may be stored in the inner region213of the base210. In certain implementations, the inner region213of the base can store up to about sixty-six inches of bare optical fiber. In certain implementations, the inner region213of the base can store up to about five feet of bare optical fiber. In other implementations, the base210may be sized to store a greater or lesser amount of fibers and jacketed cables.

The splice cassette200receives at least one input cable and at least one output cable. Optical fibers contained within the input cable are spliced to optical fibers contained within the output cable. In certain implementations, the splice cassette200receives multiple input cables and/or multiple output cables. In some implementations, the jacketed cables received at the cassette200include cable jackets surrounding loose optical fibers. In certain implementations, the optical fibers are disposed in buffer tubes. In other implementations, the jacketed cables received at the cassette200include cable jackets surrounding ribbonized optical fibers. In some implementations, one of the cables received at the cassette200has ribbonized optical fibers and one of the cables received at the cassette200has loose optical fibers.

In some implementations, the input cables may have a cross-dimension of about 2 mm to about 8 mm. In certain implementations, the input cables may have a cross-dimension of about 3 mm to about 5 mm. In one example implementation, the input cable has a cross-dimension of about 3 mm. In one example implementation, the input cable has a cross-dimension of about 5 mm. In other implementations, the input cables may have a greater or lesser cross-dimension. Certain types of input cables are sized to contain fiber ribbon matrices. In some implementations, the input cables have a round cross-section. In other implementations, the input cables have an oval or obround cross-section.

In some implementations, the output cables have a round cross-section. In other implementations, the output cables have an oval or obround cross-section. In certain implementations, the output cables may have a cross-dimension of about 3 mm. In other implementations, the input cables may have a greater or lesser cross-dimension.

In some implementations, the splice chip250is configured to splice twenty-four optical fibers of one or more input cables to twenty-four optical fibers of one or more output cables. In certain implementations, the optical fibers of both the input and output cables are individually fusion spliced together. In certain example implementations, a single input cable may include twenty-four stranded fibers. In certain example implementations, a single input cable may include a fiber ribbon matrix having two rows of twelve fibers. In certain example implementations, two output cables may include twelve stranded fibers. In other implementations, other permutations may be utilized for the number of cables and number of fibers.

In some implementations, the splice chip250is configured to splice forty-eight optical fibers of an input cable to forty-eight optical fibers of one or more output cables. In certain implementations, four input cables and four output cables each include twelve stranded optical fibers. In certain implementations, the optical fibers of both the input and output cables are ribbonized before being spliced (e.g., in the field). In other implementations, the fibers of the input and/or the output cables may be ribbonized (e.g., at the factory). In other implementations, six input cables each include eight optical fibers (e.g., loose or ribbonized). In other implementations, other permutations may be utilized for the number of cables and number of fibers.

In other implementations, the splice chip250may be configured to splice (e.g., mass fusion splice) together seventy-two optical fibers of an input cable to seventy-two optical fibers of one or more output cables. For example, in certain implementations, the input cables may include fiber ribbon matrices (e.g., six rows of twelve fibers, three rows of twenty-four fibers, etc.) contained within obround or oval jackets. In certain implementations, six output cables may each include twelve stranded fibers that are ribbonized in the field before being spliced to the input ribbon matrix. In other implementations, other permutations may be utilized for the number of cables and number of fibers.

Referring now toFIGS. 18-21, a routing process by which the optical cables may be spliced and stored in the splice cassette200will herein be described. First, the input and output cables are prepared for splicing. For example, jackets or buffer tubes of the input and output cables may be stripped and removed from ends of the input and output cables to reveal the optical fibers (e.g., loose optical fibers, ribbonized optical fibers, etc.). In some implementations, a sufficient length of jacket or buffer tube is stripped to reveal a length of about six feet of optical fibers. In certain implementations, a sufficient length of jacket or buffer tube is stripped to reveal a length of about sixty-three inches of optical fibers. In certain implementations, a sufficient length of jacket or buffer tube is stripped to reveal a length of about five feet of optical fibers.

In certain implementations, loose optical fibers may be ribbonized to facilitate mass fusion splicing of the optical fibers. In certain implementations, ribbonized fibers may be separated to facilitate individual fusion splicing of the optical fibers. The optical fibers of the input cable are spliced to the optical fibers of the output cables. For example, in certain implementations, ribbonized fibers may be mass fusion spliced together. In other implementations, separate optical fibers may be individually fusion spliced together.

Splices265, which may be covered by splice sleeves, are positioned over the fusion splice to protect the splice region of the fibers. The splices265are snapped or otherwise secured to the splice chip250. For example, one or more of the splices265may be seated in one or more of the rows257of the splice chip250and retained by the latching fingers258of the splice chip250. In certain implementations, multiple splices265may be stacked in one row257before inserting a splice265in an adjacent row265. In other implementations, a single splice265may be seated in each row257before stacking the splices265within the rows257. In still other implementations, the splices265may be arranged as desired within the splice250.

Referring toFIG. 18, the jacketed or buffered portions of the input and output cables may be secured to the base210of the cassette200. For example, in some implementations, the jacketed or buffered portions of the input and output cables may be fastened to the base210using cable ties. In other implementations, however, the jacketed or buffered portions of the input and output cables may be fastened to the base210using wax lacing270, string, or other such ties. As shown inFIG. 18, the wax lacing270may be threaded through the openings224at the transition region220of the base210.

In some implementations, the jacketed or buffered portions of the input and output cables may be secured to the base210in a stacked configuration. The spool wall212and transition guide222hold the cables therebetween to aid in retaining the cables in the stacked configuration (seeFIG. 20). In certain implementations, felt tape275may be wrapped around each jacketed or buffered portions of the input and output cables to enhance resistance between the wax lacing275and the cables and to aid in retaining the cables in the stacked configuration. In certain implementations, the felt tape275extends along a distance of the jacketed or buffered cable portion sufficient to extend across the openings224.

In the example shown inFIG. 18, one input cable and six output cables are arranged in a stacked configuration having three rows of two cables and a top row of one cable. In certain implementations, the input cable is one of the bottom-most cables. A first looped section272of the wax lacing270is threaded around the first row of cables and through a first pair of openings224in the base210. A second looped section274of the wax lacing270is threaded around the first and second row of cables and through a second pair of openings224in the base210. A third looped section276of the wax lacing270is threaded around the three rows of cables and through a third pair of openings224in the base210. A fourth looped section278of the wax lacing270is threaded around all of the cables and through a fourth pair of openings224in the base210. Finally, the ends of the wax lacing270are tied in a knot (e.g., square knot)279above the first looped section272. In certain implementations, each of the looped sections forms a half-hitch with another of the looped sections. In other implementations, however, the wax lacing270may be otherwise tied around the cables.

The spliced optical fibers are routed around the inner guides241of the cover230so that optical fibers extending from both sides of the splice chip250end up facing in a common direction. In the example shown inFIG. 19, a first optical fiber301is spliced to a second optical fiber302and the splice is protected by a splice265and disposed at the splice chip250. The first optical fiber301extends from the splice265, wraps around the first spool242of the inner guides241, and extends over the channel ramp244at which the first optical fiber301transitions to the cover230. The second optical fiber302extends from an opposite end of the splice265, wraps around the second spool243of the inner guides241, crosses between the spools242,243, wraps around the first spool242, and thereafter follows the same path as the first optical fiber301. Additional spliced optical fibers are routed in the same pattern. In other implementations, the fibers may be otherwise routed between the two spools242,243until the fibers extend together in a common direction.

Referring toFIGS. 19 and 20, the cover230, which holds the splice chip250, the splices, and the first windings of optical fibers as described above, is mounted to the base210. Any excess length of the optical fibers between the tied down sections of the jacketed or buffered cables and the sections wrapped around the inner guides241of the cover230may be stored within the inner region213of the base210as shown inFIG. 20. The optical fibers may be routed beneath and around the inner retention fingers214in one or more loops. A length of optical fiber is stored to accommodate resplicing of the optical fibers if necessary and to accommodate movement of the cover230to a remote position from the base210to facilitate the splicing process.

The cover230is oriented so that the inwardly-facing surface231faces the stored optical fibers. The transition region236of the cover230aligns with the transition region220of the base210so that the cover230encloses any unjacketed or unbuffered optical fibers (seeFIG. 21). The cover230is pushed towards the base210so that the latch fingers235of the cover230extend into and attach (e.g., snap-fit, latch, etc.) to the latch receivers215of the base210. The support flanges233seat on the spool wall212of the base210. In certain implementations, a half-twist is added to the optical fibers when the fibers are initially routed around the cover230. For example, a half-twist may be added to a fiber ribbon so that the same optical fiber is consistently positioned at a top of the ribbon. In such implementations, the fibers are untwisted when the cover230is mounted to the base210.

As shown inFIG. 21, the jacketed or buffered portions of the cables are routed around the outer channel216of the base210. The cables are threaded through the outer retention fingers219in one or more loops around the outer channel216. In certain implementations, the cables are routed around the outer channel216after the cover230is mounted to the base210.