Apparatus, system and method for calibrating and verifying a wireless communication device

An apparatus for testing a wireless communication device includes a receiver, a capture module, and a control module. The receiver receives at least one test packet transmitted from the wireless communication device. The capture module captures at least a portion of the at least one test packet. The control module selectively controls the capture module to capture at least the portion based on a predetermined test flow. In one example, the at least one test packet is transmitted by the wireless communication device according to the predetermined test flow. In one example, control module selectively controls the capture module to capture at least the portion based on an expected calibration value associated with the at least one test packet. In one example, the control module selectively controls the capture module to capture at least the portion based on a predetermined value of interest.

BACKGROUND

1. Field of the Invention

The present disclosure relates to wireless communication systems, and more particularly to production testing of wireless communication systems.

2. Related Art

As the number and uses of wireless data communication systems increase, it has become increasingly important to the manufacturers of such systems to perform production testing of the wireless transceivers embedded in such systems in a more time-efficient manner. As is well known, a problem with production testing of such embedded transceivers is that no direct, e.g., wired, digital control connection is generally available between the device under test (DUT) and the test controller (e.g., personal computer). Instead, communication must take place through the host processor also embedded within the system. Accordingly, production testing becomes more complicated since testing firmware must be installed or stored for running on the embedded host processor.

While using firmware in an embedded processor may be acceptable for a single platform, this approach quickly becomes unacceptable when multiple platforms are involved and must be supported. Further, as is often the case, the wireless transceiver function, e.g., a wireless transceiver operating according to the IEEE 802.11 standard, is merely a small portion of the overall set of functions of the host system. Accordingly, the manufacturer, while interested in producing a fully functional wireless transceiver capability, is nonetheless not interested in spending significant resources on integrating the wireless function in view of its limited role in the overall operation of the system.

Many well-known and popular data communications systems include wireless transceivers that communicate via digital data signals in which the data is distributed among a number of data packets which are transmitted sequentially and then reassembled within the receiver, often following transmission along various distinct signal paths (e.g., as is done with the Internet). Conventional test equipment for measuring these data signals capture these data packets, store them and then transfer them for analysis. Often, the transfer and analysis of the captured data takes longer than the process by which they are captured from within the data signal, in part because of the need to transfer the captured data to remote analysis circuitry (e.g., a computer separate from the test equipment). Consecutive data packets are often closely spaced, particularly within data signals being transmitted at high data rates. Accordingly, conventional test equipment will often not measure consecutive packets, but instead will capture non-adjacent packets spaced in time by an interval approximating the time needed for analysis or measurement.

However, it is often desirable to capture consecutive packets, e.g., to analyze power variations from one packet to another. To do this with conventional test equipment, it would generally be necessary to increase the time interval available for capturing the data packets, thereby causing the capture window to become equal to the duration of the number of consecutive data packets sought to be captured and analyzed. This, however, is disadvantageous due to the fact that increasing the capture window will also slow down the overall data capture and analysis operation, since more data will need to be transferred between the capture memory and analysis engine. Further, in many communication systems, the data packets are not closely spaced, which means that much of the captured data is unused since it corresponds to the gaps between consecutive data packets.

SUMMARY

In one example, an apparatus for testing a wireless communication device includes a receiver, a capture module, and a control module. The receiver receives at least one test packet transmitted from the wireless communication device. The capture module captures at least a portion of the at least one test packet. The control module selectively controls the capture module to capture at least the portion based on a predetermined test flow. In one example, the at least one test packet is transmitted by the wireless communication device according to the predetermined test flow. A related method is also disclosed.

In one example, the control module selectively controls the capture module to capture at least the portion based on an expected calibration value associated with the at least one test packet. In one example, the control module controls the capture module to capture at least the portion when the wireless communication device transmits the at least one test packet based on a calibration value that is substantially equal to the expected calibration value. In one example, the expected calibration value is based on a plurality of values including a transmit power calibration value, an oscillator calibration value, a phase calibration value, an amplitude calibration value, an in-phase DC offset calibration value, and/or a quadrature DC offset calibration value.

In one example, the control module selectively controls the capture module to capture at least the portion based on a predetermined value of interest. In one example, the control module controls the capture module to capture at least the portion when the wireless communication device transmits the at least one test packet based on a transmission value that corresponds with the predetermined value of interest. In one example, the predetermined value of interest is based on at least one of a transmit power value, a data rate value, and a modulation type value.

In one example, a wireless communication system in a test environment includes the apparatus and a device under test (DUT). The DUT includes a transmitter and a second control module. The transmitter transmits the at least one test packet. The second control module periodically adjusts a transmission characteristic of the transmitter from a first transmission characteristic to a second transmission characteristic based on the predetermined test flow. The second control module controls the transmitter to transmit the at least one test packet based on the predetermined test flow.

In one example, the DUT includes a calibration register. The calibration register stores a calibration value. The transmission characteristic is based on the calibration value. In one example, the calibration value is based on a transmit power calibration value, an oscillator calibration value, a phase calibration value, an amplitude calibration value, an in-phase DC offset calibration value, and/or a quadrature DC offset calibration value.

In one example, the transmission characteristic is based on a transmission data rate. In one example, the first and second transmission characteristics are based on a transmit power, a data rate, and/or a modulation type.

DETAILED DESCRIPTION

The following description of the embodiments is merely exemplary in nature and is in no way intended to limit the invention, its application, or uses. For purposes of clarity, the same reference numbers will be used in the drawings to identify similar elements. The embodiments are described in sufficient detail to enable one of ordinary skill in the art to practice the disclosure, and it will be understood that other embodiments may be practiced with some variations without departing from the spirit or scope of the subject invention.

As used herein, the term module, circuit and/or device refers to an Application Specific Integrated Circuit (ASIC), an electronic circuit, a processor (shared, dedicated, or group) and memory that execute one or more software or firmware programs, a combinational logic circuit, and/or other suitable components that provide the described functionality. Absent a clear indication to the contrary from the context, it will be understood that individual circuit elements as described may be singular or plural in number. For example, the terms “circuit” and “circuitry” may include either a single component or a plurality of components, which are either active and/or passive and are connected or otherwise coupled together (e.g., as one or more integrated circuit chips) to provide the described functionality. Additionally, the term “signal” may refer to one or more currents, one or more voltages, or a data signal. The phrase at least one of A, B, and C should be construed to mean a logical (A or B or C), using a non-exclusive logical or. Further, while the present disclosure has been discussed in the context of implementations using discrete electronic circuitry (preferably in the form of one or more integrated circuit chips), the functions of any part of such circuitry may alternatively be implemented using one or more appropriately programmed processors, depending upon the signal frequencies or data rates to be processed.

Increased time efficiency of a system and method for testing a wireless device under test can be realized by selectively capturing and analyzing test packets from a wireless device based on a predetermined test flow. Furthermore, by pre-programming a wireless transceiver with the predetermined test flow, minimal, if any, communication between the wireless transceiver and host processor is needed during testing. Other advantages will be recognized by those of ordinary skill in the art.

Referring toFIG. 1, a wireless data communication system in a general production test environment includes a device under test (DUT)100, a computer150for control of the testing, and test equipment160(e.g., including a vector signal generator (VSG) and a vector signal analyzer (VSA)), all interconnected substantially as shown. The DUT100has a number of embedded sub systems, including a host processor110, memory120(e.g., non volatile memory), a wireless transceiver130(e.g., a transmitter and receiver) and one or more peripheral devices140, interconnected substantially as shown. The host processor110controls the memory120, wireless transceiver130and peripheral devices140via various control interfaces121,111,113. Typically, the memory120stores, as firmware, programs to be used by the DUT100. The control computer150generally runs the production test software that controls the DUT100through an external interface151, e.g., universal serial bus (USB), serial peripheral interface (SPI), RS-232 serial interface, etc. The control computer150also controls the test equipment160via another interface161, e.g., USB, general purpose interface bus (GPIB), Ethernet, etc. The test equipment160communicates with the wireless transceiver130via an interface101, which can be a wireless interface, but for production testing purposes is usually a wired interface.

In a typical transmitter test scenario, the control computer150will send one or more commands to the host processor110, which translates such commands into corresponding commands for the wireless transceiver130. Following transmission of the test signal via the test interface101, the control computer150retrieves the measurement results from the test equipment160(via its interface161), following an appropriate delay for the wireless transceiver130to settle at its programmed output frequency and power.

As can be seen by this example, the commands necessary for the wireless transceiver130must pass through and be translated by the host processor110. As the host processor110can be of many different types, and run many different operating systems, it will generally be very difficult to provide the necessary software inside the host processor110for translating the commands appropriately. Normally, such software must be written specifically for each application, thereby making it a difficult process for a system integrator to integrate the wireless transceiver130within the DUT100.

As discussed in more detail below, a proposed test method in accordance with the present disclosure provides for simplified production testing using a predetermined test flow, or sequence, to verify the performance of the embedded wireless transceiver. By pre-programming the wireless transceiver with the test flow, minimal, if any, communication between the wireless transceiver and the host processor110will be needed during testing. The test flow can be uploaded to the transceiver130as part of the loading of the testing firmware, or can alternatively be made an integral part of the firmware, e.g., with a predetermined data area defining the tests. After completion of the loading of the firmware into the transceiver130, the device will be placed into a test mode where it awaits commands from the test equipment160. This can be done as part of the firmware that is loaded, or as a separate command issued by the host processor110. As a result, the only interaction with the host processor110involves the loading of the firmware, loading of the test flow (unless it is an integrated portion of the firmware), and possibly a command to place the wireless transceiver130in a production test mode of operation.

Referring toFIG. 2, one example of this method can be depicted as shown. In the first step202, the test firmware is transferred to the host processor110, generally by the control computer150. In the next step204, the test firmware is transferred from the host processor110to the wireless transceiver130via the interface111. It should be understood that the test firmware may be complete in that it also includes the desired test flow, or sequence, as an integral part. Alternatively, the test flow data can be transferred to the host processor110from the computer150, and then relayed to the wireless transceiver130. As a further alternative, the desired test flow data can be in the form of a data table previously stored in the memory120, that can now be retrieved via the interface121and relayed by the host processor110to the wireless transceiver130.

In the next step206, the wireless transceiver130is set in a test mode of operation, i.e., where the wireless transceiver130will now await one or more commands from the test equipment160(discussed in more detail below), e.g., by listening for a command from the test equipment160on a predetermined frequency. Such setting of the wireless transceiver130in its test mode operation can be initiated automatically as part of the test firmware that has been loaded, or can be initiated by an appropriate command issued by the host processor110. In the next step208, test operation of the test equipment160is initiated, e.g., by sending the appropriate command for which the wireless transceiver130is listening, as noted. Alternatively, the wireless transceiver130can transmit a “ready” signal at a predetermined frequency, following the reception of which the test equipment160will begin sending one or more test commands. Preferably, the command set is minimal, e.g., only a NEXT type of command, thereby requiring only that the receiver watch for a good data packet (e.g., representing a NEXT command), and further thereby not requiring any media access control (MAC) layer operations. Following transmission of the initial test command from the test equipment160, the wireless transceiver130preferably transmits an acknowledgement signal to indicate reception of such command, following which the main sequence of test commands from the test equipment160will begin. Controlling of the test equipment160is done under supervision by the control computer150via the interface161.

A subsequent step210can include updating of the test firmware loaded into the wireless transceiver130, whereby various operation settings, parameters or conditions can be modified based on data (e.g., transceiver calibration data) received from the control computer150via the host processor110or from a data table stored in the memory120conveyed via the host processor110to the wireless transceiver130.

Referring toFIG. 3, a test method in accordance with another embodiment of the presently claimed invention has a first step302of initiating system test operation. This causes the host processor110to be prepared for the next step304in which the test firmware is transferred from the memory120via the host processor110to the wireless transceiver130. As discussed above, the test firmware can include the test flow, or can also be composed of two components, i.e., the test commands and test sequence data. In the next step306, the wireless transceiver130is set in its test mode of operation. As discussed above, this can be done automatically as part of the loading of the test firmware, or can be initiated by an appropriate command sent by the host processor110via the interface111, with such command either initiated by the host processor110or conveyed by the host processor110in response to its reception from the computer150.

In the next step308, actual testing is initiated. As discussed above, this can be in the form of either the wireless transceiver130initiating communication with the test equipment160over the interface101, or the test equipment160, under the control of the computer150, initiating communication with the wireless transceiver130via the interface101.

Subsequent steps can include a step310in which the test firmware is updated, as discussed above, to modify various test settings, parameters or conditions.

As discussed above, a test method in accordance with the present disclosure includes steps for placing the DUT100in a test operation mode in conjunction with the external test equipment160. Following that, there are two general categories of testing: testing of the signal transmit function of the wireless transceiver130; and testing of the signal reception function of the wireless transceiver130.

Referring toFIG. 4, one example of a transmit test sequence can be described as follows. Testing begins with the receiver (RX) portion of the DUT100awaiting a command420. The test equipment160issues its command410(e.g., a GOTO-NEXT command). Following reception of this command, the transmitter (TX) of the DUT100transmits an acknowledgment signal440indicating it received and understood the command. Following this, the DUT100begins transmitting data signals as determined by the test flow. This is represented by signal transmission time slots460,461, . . .463. The test flow will determine the number of packets to be transmitted, with such transmitted packets containing the same signal, or multiple signals in the case of a multi-packet transmission.

Following receipt of the acknowledgement440, the test equipment160will wait for a specified time interval430to allow the transmitter to settle to its desired operation (e.g., frequency accuracy and power level). Following this time interval430, the test equipment160begins performing measurements450,451. Following completion of these measurements450,451, the test equipment160, or alternatively the controller computer150, after having accessed the data collected by the test equipment160, analyzes the collected data and prepares to set up the next test sequence470. Similarly, following completion of its signal transmissions463, the DUT100will prepare for the next portion of the test sequence by processing any necessary operations480.

When the test equipment160or computer150has completed processing of the data470, the next test command (e.g., GOTO-NEXT) is transmitted. The first of such commands411may not be received by the DUT100if its preparations480for the next test have not yet been completed. If so, no acknowledgement signal is received by the test equipment160. Accordingly, the test equipment160will continue to send its commands412, following which at some point in time one of these commands412will be received421by the DUT100and an acknowledgement445will be transmitted by the DUT100. This will be the start of a new test sequence where the DUT100will transmit a new test signal a known number of times465,466, . . .468, and the test equipment160will perform the desired measurements455,456, followed by further analysis and preparation for subsequent testing471.

It should be understood that, although unusual in a production test environment, the test equipment160may not receive good data from the DUT100. While this is generally an indication of a bad DUT100, it may be desirable to repeat the failed test before simply discarding the DUT100. In such a situation, two possible courses of action exist. According to one, the test equipment160can send a different command (e.g., a REPEAT command rather than a GOTO-NEXT command). This is a simple implementation and should be easy for the DUT100to identify this different command. However, this can slow testing down as the test equipment160may need to load a new command or new data to enable the generation of a new signal. Alternatively, the test equipment160can simply not send another command, following which the DUT100can interpret this as an indication that the measurement was not successful, in which case the DUT100simply repeats the original test.

As noted above, the transmit signals460,461, . . .463, being sent by the DUT100can be a single transmit signal, or can be a set of multi-packet signals. Using such multi-packet signals has an advantage that little or no communication is needed between the test equipment160and the DUT100during calibration, since a solution is generally reached by iteration, as discussed in U.S. patent application Ser. No. 11/161,692, filed Aug. 12, 2005, and entitled “Method for Measuring Multiple Parameters of a Signal Transmitted by a Signal Generator,” the disclosure of which is herein incorporated in its entirety by reference.

Referring toFIG. 5, the expected test flow for receiving signals can be described as follows. This test flow differs from the signal transmission test flow in that it is intended to implement the test such that the DUT100need not fully analyze (if at all) the data actually being received from the test equipment160, but rather simply determine if a valid packet has been received. Accordingly, the test equipment160need not issue a test command (e.g., a GOTO-NEXT command) when transitioning from one received test to another. Instead, it is preferable to let the DUT100determine when to move on to the next test. This can be done by simply having the DUT100continue to the next test when the DUT has received a predetermined number of good signal packets.

If the DUT100transmits an acknowledgement whenever it has received a good packet, the test equipment160can simply count the number of good packets without requesting such count from the DUT100, thereby allowing the received signal test flow to progress without additional communications being necessary to simply determine the results of the test, since the test equipment160knows how many packets were sent and can determine how many were received by simply counting the number of acknowledgement signals received form the DUT100. This technique is particularly valid where the test equipment160includes test equipment like the VSA and VSG because it is unlikely to have lost acknowledgement signals since the transmitter power of the DUT100is generally higher than the transmitter power of the VSG. Hence, it is unlikely that the VSA will miss an acknowledgement signal packet, particularly if the VSA is triggered by the trailing edge of the signal packet transmitted by the VSG. Further, having the VSA receive the acknowledgement packet provides the additional benefit of allowing the switching time of the transmit/receive switch in the DUT100to be tested as well.

Referring again toFIG. 5, the test equipment160transmits the test command510. Assuming the previous test was a transmit test, this test command510instructs the DUT100to initiate the next test which is a receive test. The DUT100receives this command520, which causes the test firmware to enable the receive test580. When the receiver section of the DUT100is ready, an acknowledgement signal is transmitted540, indicating the readiness of the receiver. This can be important as compared to conventional test methods where packets are sent by the test equipment160until the receiver starts receiving such packets. By having the DUT100indicate its readiness, the test equipment160need only enable its VSA to await reception of the acknowledgment signal from the DUT100, following which the test equipment160can then prepare for receive testing530.

When the test equipment160(e.g., the VSA) receives the acknowledgement signal540, the test equipment160knows that the DUT100is ready and begins signal transmission. Accordingly, the test equipment160(e.g., the VSG) begins transmitting a predetermined number of signal packets561,562,563,564,568,569, each of which produces a corresponding acknowledgement signal571,572,573,574,578,579. The test equipment160receives these acknowledgement packets and increases its internal count for each such packet received. Additionally, as noted above, the transmit/receive switch operation of the DUT100can be analyzed by analyzing an interval560between a transmitted test signal563and the reception of an acknowledgement signal573. (Using an acknowledgement signal in this manner is advantageous since such a signal is already included in virtually all standard or default transceiver signal sets, thereby avoiding a need for adding another otherwise unnecessary signal or functionality.)

In this example, no packet errors have occurred, so the DUT100has received the predetermined number of packets and will move on to the next receive test581. Similarly, the test equipment160knows that the DUT100has received all packets based upon the received number of acknowledgement signals and can prepare for the next receive test531as well. When the DUT100is prepared, an acknowledgement signal is transmitted541indicating such readiness, and the test equipment160, following reception of this acknowledgement551, begins to transmit packets for the next test561. In the event that the DUT100has not received packets within a predetermined time interval, it can retransmit its acknowledgement541, e.g., where the DUT100becomes ready faster than the test equipment160for the next test.

Referring toFIG. 6, if a packet error is encountered, the DUT100does not receive its full predetermined number of good packets. As shown, the test flow begins from where the previous test was a transmit test. The VSG of the test equipment160sends the test command610indicating the start of the new operation or the end of the previous operation. The DUT100receives this command620and prepares to enable itself for receive testing680. When it is ready, the DUT100sends its acknowledgement that it is ready to receive640. This acknowledgement is received650by the test equipment160, following which when the test equipment160is ready, e.g., completing its internal setup630, it begins transmitting the predetermined number of packets661,662,663,664,668,669. In response to this, the DUT100transmits an acknowledgement671,673,674,678,679for each of the good packets it has received.

As shown, one of the packets662was not received by the DUT100. Accordingly, no corresponding acknowledgement was transmitted by the DUT100as illustrated by an empty received packet690in the Figure. Following completion of the transmit sequence, the test equipment160knows how many acknowledgement packets it received, and since one packet was apparently missed690, the test equipment160knows that the receiver of the DUT100is still awaiting at least one more packet before it can continue to the next test in the test flow. Accordingly, the test equipment160will compute635the number of additional packets needed to be received by the DUT100, and begin transmitting691the necessary number of packets.

Following reception of this missing packet, the DUT100transmits an acknowledgement signal692, and begins preparing for the next test operation681. When it is ready, the DUT100will send another acknowledgement to the test equipment160. In this example, the test equipment160is not yet ready when the DUT100is ready. Accordingly, the DUT100sends it acknowledgement signal641, but since the test equipment160is not yet ready and does not respond, the DUT100, after a predetermined time interval, will send another acknowledgement signal642. The test equipment160is now ready and following reception of this acknowledgement signal651begins to transmit more data packets661, to which the DUT100responds by sending corresponding acknowledgement packets671.

As discussed above, the signals being transmitted for testing purposes can be multi-packet signals, in which case it may be desirable to have the DUT100respond only to certain types of data packets. For example, transmitting different data packets at different power levels can allow testing of actual receiver sensitivity to be performed (where certain packets are expected to not be received) without requiring the transmitter to send many more packets to make the receiver meet the desired packet number for progression to the next test.

Referring now toFIG. 7, an exemplary block diagram of the wireless transceiver130is depicted. The wireless transceiver130includes a control module700that is operative to execute a predetermined test flow701and a plurality of calibration registers that can be adjusted to calibrate the wireless transceiver130. The calibration registers can include a power register702, a oscillator register704, a phase register706, an amplitude register708, a in-phase DC offset (IDC) register710, and a quadrature DC offset (QDC) register712. If desired, the wireless transceiver130can include other suitable calibration registers.

Calibration of the wireless transceiver130typically involves finding a close to optimal setting for each of the calibration registers702,704,706,70,710,712to adjust performance of the wireless transceiver130. Therefore, the predetermined test flow701can include a predetermined calibration test flow that steps through the different possible values (or a subset thereof) for each register702,704,706,70,710,712. The test equipment160can measure packets transmitted from the DUT100according to the predetermined test flow701. The measurements can be used to estimate error for each register and ultimately to determine an optimal value for each register702,704,706,70,710,712. In addition, if the predetermined test flow701includes a predetermined number of register control values, the test equipment160can identify values close to the expected register values based on the predetermined test flow701and can capture packets close to the expected register values while ignoring other packets transmitted from the DUT100.

An advantage of having a predetermined test flow spanning all possible combinations is that a calibration of the wireless transceiver130can be repeated when a non-conclusive result is obtained (e.g. from a wrong initial estimate of the expected register value) from the first sequence. The predetermined test flow can simply be repeated and the test equipment160can identify and capture different packets close the new expected register settings based on the results from the failed test. This can be very advantageous when testing a first wireless transceiver in a manufacturing environment since the expected register values may not be correct.

Exemplary transmitter calibration of the wireless transceiver can include transmit power calibration, oscillator (e.g. crystal) frequency centering, IQ-mismatch calibration, and DC offset (i.e., carrier leakage) calibration. In some embodiments, there are 64 control values for each calibration register702,704,706,70,710,712. The transmit power can be calibrated by cycling through the values (or subset of the values) of the power register702. The oscillator can be calibrated by cycling through the values (or subset of the values) of the oscillator register704. IQ-mismatch typically includes a phase offset and amplitude offset. Therefore, IQ-mismatch can be calibrated by cycling through the values (or subset of the values) of the phase register706and the amplitude register708. The DC offset (i.e., carrier leakage) can be calibrated by cycling through the values (or subset of the values) of the IDC register710and the QDC register712.

To reduce testing time, the predetermined test flow701can cycle through the possible values for each register702,704,706,70,710,712in steps of 2, 3, 4 or any other suitable step size. Alternatively, the predetermined test flow701can cycle through a subset of the total values for each register702,704,706,70,710,712(e.g., cycle through 40 out of the 64 total values).

Referring now toFIG. 8, an exemplary timing diagram of one example of the predetermined test flow701that can be performed by the wireless transceiver130is generally identified at800. In this example, the DUT100transmits the predetermined test flow701that is used to calibrate the wireless transceiver130. The DUT100periodically adjusts one or more of the registers and transmits calibration packets based on the predetermined test flow. In some embodiments, the DUT100cycles through all possible values of each register during the predetermined sequence. However, as previously noted, the DUT100can cycle through the possible value in steps of 2, 3, 4 or other suitable step size and/or the DUT100can cycle through a subset of all the possible values.

At time802, the DUT100sets the power register702to a first power value (e.g., X0), the amplitude register708to a first amplitude value (e.g., Y0), the phase register706to a first phase value (e.g., Z0), and the oscillator register704to a first oscillator value (e.g., W0). Once the registers have been adjusted, the DUT100transmits calibration packet804at time802. The DUT100subsequently transmits calibration packet806. As illustrated packet806has a transmitted power that is less than packet804due to the power settling when the power register of the wireless transceiver130is initially adjusted.

At time808, the DUT100sets the amplitude register708to a second value (e.g., Y1) and the phase register706to a second value (e.g., Z1). Once the registers have been adjusted, the DUT100transmits calibration packet810. The DUT100subsequently transmits packet812.

At time814, the DUT100sets the amplitude register708to a third value (e.g., Y2) and the phase register706to a third value (e.g., Z2). Once the registers have been adjusted, the DUT100transmits calibration packet816. As shown, packets804and812have a transmitted power that is greater than the final transmit power produced by the first power value (e.g., X0) and packets806and810are less than the final transmit power due to the power settling when the power register702is initially adjusted.

At time818, the DUT100sets the oscillator register704to a second value (e.g., W1). Once the oscillator register704has been adjusted to the second value, the DUT100transmits calibration packet819.

At time820, the DUT100sets the amplitude register708to a fourth value (e.g., Y3) and the phase register706to a fourth value (e.g., Z3). Once the registers have been adjusted, the DUT100transmits calibration packet822. The DUT100subsequently transmits packet824.

At time826, the DUT100sets the power register702to a second power value (e.g., X1), the amplitude register708to a fifth amplitude value (e.g., Y4), the phase register706to a fifth phase value (e.g., Z4), and the oscillator register704to a third oscillator value (e.g., W2). In addition, the DUT100transmits calibration packet828at time826. The DUT100subsequently transmits calibration packet830.

At time832, the DUT100sets the amplitude register708to a sixth value (e.g., Y5) and the phase register706to a sixth value (e.g., Z5). Once the registers have been adjusted, the DUT100transmits calibration packet834.

At time836, the DUT100sets the oscillator register704to a fourth value (e.g., W3). Once the oscillator register704has been adjusted to the fourth value, the DUT100transmits calibration packet838.

At time840, the DUT100sets the amplitude register708to a seventh value (e.g., Y6) and the phase register706to a seventh value (e.g., Z6). Once the registers have been adjusted, the DUT100transmits calibration packet842. The DUT100subsequently transmits calibration packet844.

At time846, the DUT100sets the power register702to a third power value (e.g., X2), the amplitude register708to an eighth amplitude value (e.g., Y7), the phase register706to an eighth phase value (e.g., Z7), and the oscillator register704to a fifth oscillator value (e.g., W4). In addition, the DUT100transmits calibration packet848at time846. The DUT100subsequently transmits calibration packet850.

At time852, the DUT100sets the amplitude register708to a ninth value (e.g., Y8) and the phase register706to a ninth value (e.g., Z8). Once the registers have been adjusted, the DUT100transmits calibration packet854.

At time856, the DUT100sets the oscillator register704to a sixth value (e.g., W5). Once the oscillator register704has been adjusted to the sixth value, the DUT100transmits calibration packet858.

At time860, the DUT100sets the amplitude register708to a tenth value (e.g., Y9) and the phase register706to a tenth value (e.g., Z9). Once the registers have been adjusted, the DUT100transmits calibration packet862. The DUT100subsequently transmits calibration packet864.

The DUT100continues to periodically adjust the values of the registers until the DUT100has cycled through all possible calibration values for each register. In addition, although not illustrated, the DUT100can also periodically adjust the IDC register710and the QDC register in a similar manner until the DUT100has cycled through all possible calibration values for each register.

Referring now toFIG. 9, exemplary steps that can be taken by the DUT100when performing the predetermined test flow701to calibrate the wireless transceiver130are generally identified at900. In general the DUT100, adjusts one or more calibration registers and then subsequently transmits one or more packets until at least one packet has been transmitted using all values (or a subset thereof) of the calibration registers.

In this example, the process starts in step902when the predetermined test flow701is initiated. In step904, the DUT100sets the registers702,704,706,708,710,712to a first value. In step906, the DUT100transmits one or more calibration packets. In step908, the DUT100determines whether all possible calibration values (or a subset thereof) of the amplitude register708have been transmitted. If all possible amplitude calibration values (or a subset thereof) have not been transmitted, the DUT100adjusts the amplitude register708to another value in step910and then transmits one or more calibration packets in step906.

If the DUT100determines that all possible calibration values (or a subset thereof) of the amplitude register708have been transmitted, the DUT100determines whether all possible calibration values (or a subset thereof) of the phase register706have been transmitted in step912. If all possible phase calibration values (or a subset thereof) have not been transmitted, the DUT100adjusts the phase register706to another value in step914and then transmits one or more calibration packets in step906.

If the DUT100determines that all possible calibration values (or a subset thereof) of the phase register706have been transmitted, the DUT100determines whether all possible calibration values (or a subset thereof) of the oscillator register704have been transmitted in step916. If all possible oscillator calibration values (or a subset thereof) have not been transmitted, the DUT100adjusts the oscillator register704to another value in step918and then transmits one or more calibration packets in step906.

If the DUT100determines that all possible calibration values (or a subset thereof) of the oscillator register704have been transmitted, the DUT100determines whether all possible calibration values (or a subset thereof) of the IDC register710have been transmitted in step920. If all possible IDC calibration values (or a subset thereof) have not been transmitted, the DUT100adjusts the IDC register710to another value in step922and then transmits one or more calibration packets in step906.

If the DUT100determines that all possible calibration values (or a subset thereof) of the IDC register710have been transmitted, the DUT100determines whether all possible calibration values (or a subset thereof) of the QDC register712have been transmitted in step924. If all possible QDC calibration values (or a subset thereof) have not been transmitted, the DUT100adjusts the QDC register712to another value in step926and then transmits one or more calibration packets in step906.

If the DUT100determines that all possible calibration values (or a subset thereof) of the QDC register712have been transmitted, the DUT100determines whether all possible calibration values (or a subset thereof) of the power register702have been transmitted in step928. If all possible power calibration values (or a subset thereof) have not been transmitted, the DUT100adjusts the power register702to another value in step930and then transmits one or more calibration packets in step906. However, if all possible power calibration values (or a subset thereof) have been transmitted, the process ends in step932.

Referring now toFIG. 10, an exemplary timing diagram of one example of the predetermined test flow701that can be implemented by the wireless transceiver130is generally identified at1000. In this example, the DUT100the predetermined test flow701is used to verify operation of the wireless transceiver130. More specifically, the DUT100periodically adjusts a data rate of the wireless transceiver130and transmits one or more verification test packets for each data rate supported by the wireless transceiver130. When adjusting the data rate, the wireless transceiver130can also adjust a transmit power and/or modulation type of the wireless transceiver130. In addition, since transmit quality is typically reduced when transmitting at lower data rates, many systems increase the transmit power of the wireless transceiver130when transmitting at lower data rates. Therefore, in order to verify all supported data rates, the DUT100can periodically cycle through all supported data rates at each transmit power based on the predetermined test flow701.

At time1002, the DUT100adjusts the data rate of the wireless transmitter130to 54 Mbps. More specifically, the DUT100adjusts the transmit power of the wireless transceiver130to a first power value (e.g., N) and the modulation type of the wireless transceiver130to 64-QAM. In addition, the DUT100transmits verification packet1004at time1002. The DUT100subsequently transmits verification packets1006,1008,1010,1012. As illustrated packet1002has a transmitted power that is greater than the target transmit power (e.g., N) and packet1004has a transmitted power that is less than the target transmit power due to the power settling when the transmit power of the wireless transceiver130is initially adjusted. Packets1008,1010,1012can be used for error vector magnitude (EVM) averaging, which is known in the art. Although only three packets (e.g.,1008,1010,1012) are used in this example, skilled artisans will appreciate that more packets can be used such as, for example, 20 packets as required by IEEE 802.11.

At time1014, the DUT100adjusts the data rate of the wireless transmitter130to 48 Mbps. To transmit at 48 Mbps, the wireless transceiver130uses the same modulation type, therefore the DUT100does not need to adjust the modulation type. The DUT100transmits verification packet1016at time1014and subsequently transmits verification packets1018and1020thereafter.

At time1022, the DUT100adjusts the data rate of the wireless transmitter130to 36 Mbps. More specifically, the DUT100adjusts the modulation type of the wireless transceiver130to 16-QAM. The DUT100transmits verification packet1024at time1022and subsequently transmits verification packets1026and1026thereafter.

At time1030, the DUT100adjusts the data rate of the wireless transmitter130to 24 Mbps. To transmit at 24 Mbps, the wireless transceiver130uses the same modulation type, therefore the DUT100does not need to adjust the modulation type. The DUT100transmits verification packet1032at time1030and subsequently transmits verification packets1034and1036thereafter.

At time1038, the DUT100adjusts the data rate of the wireless transmitter130to 18 Mbps. In order to adjust the data rate to 18 Mbps, the DUT100adjusts the modulation type of the wireless transceiver130to QPSK. The DUT100transmits verification packet1040at time1038.

At time1042, the DUT100adjusts the data rate of the wireless transmitter130to 12 Mbps. To transmit at 12 Mbps, the wireless transceiver130uses the same modulation type, therefore the DUT100does not need to adjust the modulation type. The DUT100transmits verification packet1044at time1042.

At time1046, the DUT100adjusts the data rate of the wireless transmitter130to 9 Mbps. In order to adjust the data rate to 9 Mbps, the DUT100adjusts the modulation type of the wireless transceiver130to BPSK. The DUT100transmits verification packet1048at time1046.

At time1050, the DUT100adjusts the data rate of the wireless transmitter130to 6 Mbps. To transmit at 6 Mbps, the wireless transceiver130uses the same modulation type, therefore the DUT100does not need to adjust the modulation type. The DUT100transmits verification packet1052at time1050.

At time1054, the DUT100adjusts the data rate of the wireless transmitter130to 11 Mbps. In order to adjust the data rate to 11 Mbps, the DUT100adjusts the modulation type of the wireless transceiver130to DSSS. The DUT100transmits verification packet1056at time1054. Although only one packet is transmitted in the example, skilled artisans will appreciate that more than one packet can be transmitted in accordance with the present disclosure.

At time1058, the DUT100adjusts the data rate of the wireless transmitter130to 5.5 Mbps. To transmit at 5.5 Mbps, the wireless transceiver130uses the same modulation type, therefore the DUT100does not need to adjust the modulation type. The DUT100transmits verification packet1060at time1058. Although only one packet is transmitted in the example, skilled artisans will appreciate that more than one packet can be transmitted in accordance with the present disclosure.

At time1062, the DUT100adjusts the data rate of the wireless transmitter130to 2 Mbps. To transmit at 2 Mbps, the wireless transceiver130uses the same modulation type, therefore the DUT100does not need to adjust the modulation type. The DUT100transmits verification packet1064at time1062. Although only one packet is transmitted in the example, skilled artisans will appreciate that more than one packet can be transmitted in accordance with the present disclosure.

At time1066, the DUT100adjusts the data rate of the wireless transmitter130to 1 Mbps. To transmit at 1 Mbps, the wireless transceiver130uses the same modulation type, therefore the DUT100does not need to adjust the modulation type. The DUT100transmits verification packet1068at time1066. Although only one packet is transmitted in the example, skilled artisans will appreciate that more than one packet can be transmitted in accordance with the present disclosure.

The process periodically repeats for each transmit power level (or a subset thereof) of the wireless transmitter130. For example, the DUT100adjusts the data rate of the wireless transmitter130to 54 Mbps at time1070. More specifically, the DUT100adjusts the transmit power of the wireless transceiver130to a second power value (e.g., N−1) and the modulation type of the wireless transceiver130to 64-QAM. In addition, the DUT100transmits verification packet1072at time1070. The DUT100subsequently transmits verification packets1074,1076,1078, and1080. As illustrated packet1072has a transmitted power that is greater than the target transmit power (e.g., N−1) due to the power settling when the transmit power of the wireless transceiver130is initially adjusted.

Referring now toFIG. 11, exemplary steps that can be taken by the DUT100when performing the verification test are generally identified at1100. The process starts in step1102when the verification test is initiated. In step1104, the DUT100adjusts the transmit power of the wireless transceiver130to, for example, a first transmit power. In step1106, the DUT100adjusts the data rate of the wireless transceiver130to, for example, a first supported data rate. In step1108, the DUT100transmits one or more verification packets.

In step1110, the DUT100determines whether another supported data rate needs to be verified. If another data rate need to be verified, the process returns to step1106and the DUT100adjusts the data rate to the next supported data rate. However, if another data rate does not need to be verified (e.g., all supported data rates, or a subset thereof, have been tested), the DUT100determines whether another transmit power level needs to be verified according to the predetermined test flow701in step1112.

If another transmit power level needs to be verified, the process returns to step1104and the DUT100adjusts the transmit power level to the next power level according to the predetermined test flow. However, if another transmit power level does not need to be verified (e.g., all supported transmit powers, or a subset thereof, have been tested), the process ends in step1114.

Referring now toFIG. 12, an exemplary block diagram of a portion of the test equipment160is depicted. The test equipment160includes a wireless receiver1200, a data capture module1202(e.g., sample-and-hold circuitry and analog-to-digital signal conversion circuitry), a control module1204, and memory1206. The control module1204includes a predetermined test flow1208that corresponds to the predetermined test flow701of the DUT100. In some embodiments, the test equipment160also includes an analysis module1210and a display1212. In other embodiments, the analysis module1210and display1212are external to the test equipment160and can be included in, for example, the computer150.

When the predetermined test flow701,1208is initiated (e.g., the calibration and/or the verification predetermined test flow), the test equipment160selectively captures test packets transmitted from the DUT701based on the predetermined test flow701,1208. More specifically, the wireless receiver1200receives one or more test packets from the DUT100. The control module1208selectively controls the capture module1202to capture one or more of the test packets from an incoming data stream1214based on the predetermined test flow1208, which corresponds with the predetermined test flow701of the DUT100. The captured data1216is stored in memory1206. The captured data1222is retrieved from the memory1206and transferred to the analysis module1210(e.g., a microprocessor and associated support circuitry) either locally within the test equipment or remotely in an external computer, all of which are well known in the art. The results1224of the data analysis can then be made available for viewing on the display1212by the user (not shown).

Referring now toFIG. 13, an exemplary timing diagram of one example of the test equipment160selectively capturing one or more packets based on the predetermined test flow701,1208is generally identified at1300. In this example, the DUT100transmits one or more test packets based on the predetermined test flow701for calibrating the wireless transceiver130. The test equipment160selectively captures the one or more test packets based on the predetermined test flow701,1208and predetermined expected values for each of the calibration registers702,704,706,708,710,712. The predetermined expected values can be based on previous calibration test results.

The test equipment160selectively captures the one or more test packets transmitted from the DUT100having characteristics closest to the expected values. More specifically, the test equipment160selectively captures the one or more test packets having characteristics closest to the expected values based on the predetermined test flow701,1208. For example, if the amplitude register708has an expected value of 13 and the phase register706has an expected value of 0, the test equipment160can capture packets822and824during time intervals1302and1304, respectively, since they are the closest to the respective expected values. If, for example, the oscillator register704has an expected value of −11, the test equipment160can capture packet844during time interval1306since packet844is closest to the expected value for the oscillator calibration. Similarly, if, for example, the power register702has an expected value of N−4, the test equipment160can capture packet864during time interval1308since packet864is closest to the expected value for the power calibration.

Rather than capture a single packet that is closest to the expected values for each calibration register702,704,706,708,710,712, the test equipment160can alternatively capture one or more packets closest to the expected values and interpolate the desired result. Referring toFIG. 14, an exemplary timing diagram of the test equipment160selectively capturing one or more packets closest to the expected values for each register702,704,706,708,710,712based on the predetermined test flow701,1208is generally identified at1400. In this example, the DUT100transmits one or more test packets based on the predetermined test flow701,1208to calibrate the wireless transceiver130.

The test equipment160selectively captures test packets based on the predetermined test flow701,1208and expected values for each of the calibration registers702,704,706,708,710,712. In this example, the amplitude register708has an expected value of 3, therefore the test equipment160captures packets804,806,810,812during time intervals1402,1404,1406,1408, respectively, which are the packets closest to the expected amplitude value of 3. The test equipment160can interpolate packets804,806,810,812to determine the desired calibration value for the amplitude register708. If, for example, the oscillator register704has an expected value of −12, the test equipment160can capture packet844during time interval1410since packet844is the closest to the expected oscillator calibration value. Similarly, if, for example, the phase register706has an expected value of 1, the test equipment160can capture packets862and864during time intervals1412and1414, which can be combined with packets804and806that were previously captured during time intervals1042and1404, since the expected value (e.g., 1) is between packets862,864(e.g., 4) and packets804,806(e.g., 0).

Referring now toFIG. 15, exemplary steps that can be taken by the test equipment160to selectively capture one or more test packets based on the predetermined test flow701,1208and the expected calibration values for each calibration register702,704,706,708,710,712are generally identified at1500. The process starts in step1502. In step1504, the test equipment160determines expected calibration values for each of the calibration registers702,704,706,708,710,712. As previously noted, the expected values can be based on previous test results. In step1506, the test equipment160initiates the predetermined calibration test flow.

In step1508, the test equipment160determines whether one or more test packets (transmitted from the DUT100) are close to any of the expected calibration value for the calibration registers702,704,706,708,710,712. If none of the test packets are close to any of the expected calibration values for the calibration registers702,704,706,708,710,712, the test equipment160determines whether the predetermined calibration test flow is complete in step1510. If the predetermined calibration test flow is not complete, the process returns to step1508. However, if the predetermined calibration test flow is complete, the process ends in step1512.

If the test equipment160, determines that one or more of the test packets are close to at least one of the expected values of the calibration registers702,704,706,708,710,712, the test equipment160captures the one or more test packets in step1514. Once the one or more packets have been captured, the process returns to step1510.

Although not depicted, skilled artisans will appreciate that the aforementioned steps can be performed prior to performing the predetermined test flow in order to create a predetermined test capture flow that can used by the test equipment160to capture the one or more test packets.

Referring now toFIG. 16, an exemplary timing diagram of the test equipment160selectively capturing one or more packets based on the predetermined test flow701,1208is generally identified at1600. In this example, the DUT100transmits one or more test packets based on the predetermined test flow701,1208to verify operation the wireless transceiver130. The test equipment160selectively captures the one or more test packets based on the predetermined test flow701,1208and predetermined values of interest. The predetermined values of interest can be determined by the user (not shown) prior to initiating the predetermined verification test flow. For example, if EVM and/or spectral mask of the wireless transceiver130is to be verified, the predetermined values can be based on a transmit power, a data rate, and/or a modulation type of each test packet. If, for example, the transmit power N is used to transmit packets at 48 Mbps, the test equipment160can capture packets1016,1018,1020during time intervals1602,1604,1606, respectively, since the packets are transmitted at power N at a data rate of 48 Mbps. These packets can be used by the analysis module1210to analyze EVM and other parameters that can be extracted from the EVM analysis.

Additional measurements can be captured to verify the spectral mask of the wireless transceiver130. For example, the test equipment160can selectively capture one or more test packets (or a portion thereof) for each modulation type and transmit power. Therefore, the test equipment160can capture a portion of packet1028during time interval1608, which corresponds to transmit power N and modulation type 16-QAM. The test equipment160can subsequently capture a portion of packet1040during time interval1610, which corresponds to transmit power N and modulation type QPSK. The test equipment160can subsequently capture a portion of packet1048during time interval1612, which corresponds to transmit power N and modulation type BPSK. In addition, the test equipment160can capture packets1056,1060,1064,1068during time intervals1614,1616,1618,1620, respectively, for each DSSS modulation type at transmit power N.

In addition, if for example, the transmit power N−1 is used to transmit packets at 54 Mbps, the test equipment160can capture packets1076,1078,1080during time intervals1622,1624,1626, respectively, since the packets are transmitted at power N−1 at a data rate of 54 Mbps. These packets can also be used by the analysis module1210to analyze EVM and other known parameters that can be extracted from the EVM analysis.

Referring now toFIG. 17, exemplary steps that can be taken by the test equipment160to selectively capture one or more test packets based on the predetermined test flow701,1208and the predetermined values of interest are generally identified at1700. The process starts in step1702. In step1704, the values of interest are determined, for example, by the user (not shown). In step1706, the test equipment160initiates the predetermined verification test flow. In step1708, the test equipment160determines whether one or more test packets (transmitted from the DUT100) correspond to the predetermined values of interest. If none of the test packets correspond to the predetermined values of interest, the test equipment160determines whether the predetermined test flow701,1208is complete in step1710. If the predetermined calibration test flow701,1208is not complete, the process returns to step1708. However, if the predetermined calibration test flow is complete, the process ends in step1712.

If the test equipment160, determines that one or more of the test packets correspond to the predetermined values of interest, the test equipment160captures the one or more test packets in step1614. Once the one or more packets have been captured, the process returns to step1710.

As noted above, among other advantages, by pre-programming a wireless transceiver with a predetermined test flow, minimal, if any, communication between the wireless transceiver and host processor is needed during testing. Furthermore, by providing test equipment with the predetermined test flow, the test equipment can selectively capture test packets based on the predetermined test flow in order to increase testing efficiencies. Other advantages will be recognized by those of ordinary skill in the art.