A lateral DMOS transistor having a uniform distribution of channel impurity concentration includes a drift region of a first conductivity; a body of a second conductivity, the body being disposed in the drift region and has a channel thereon; and a source region of the first conductivity, the source region being disposed within the body and having an upper region surrounded by a first impurity region of the first conductivity.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims the benefit of Korean Patent Application No. 10-2004-0117144, filed on Dec. 30, 2004, which is hereby incorporated by reference as if fully set forth herein.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a semiconductor device, and more particularly, to a lateral double-diffused metal-oxide-semiconductor (LDMOS) having a uniform distribution of channel impurity concentration.

2. Discussion of the Related Art

Referring toFIG. 1, illustrating a conventional LDMOS transistor, an n−semiconductor substrate100has active region set according to a device isolation layer110. A p-type body120and an n−extended drain region130are formed in the n−semiconductor substrate100to be separated from each other by a predetermined distance. An n+source region140is disposed on the p-type body120. A channel121, occurring in the p-type body120adjacent the n+source region140, is overlapped by a gate isolating layer160and a gate conducting layer170, which are sequentially formed atop the channel. Spacers are formed on the sidewalls of the gate conducting layer170. An n+drain region150is disposed on the n−extended drain region130. The structure is completed by a double diffusion process in which an ion implantation process is carried out twice, i.e., once before formation of the gate spacer layer180and again after its formation. The source and drain regions140and150are electrically connected with a source electrode S and a drain electrode D, respectively.

FIG. 2shows the relative impurity concentrations with respect to the channel of the LDMOS transistor ofFIG. 1. For example, the n+source region140exhibits an impurity concentration curve A1, which is relatively high and decreases toward the channel121; the channel exhibits an impurity concentration curve B1that is relatively low and decreases toward the n−drift region of the semiconductor substrate100; and the drift region exhibits a uniform impurity concentration curve C1. To obtain a desirable breakdown voltage, the channel121should show a uniform distribution of its ion concentration. Since a contemporary LDMOS transistor has a grade junction, however, the length of the channel121cannot be reduced, which limits device integration.

SUMMARY OF THE INVENTION

Accordingly, the present invention is directed to an LDMOS transistor that substantially obviates one or more problems due to limitations and disadvantages of the related art.

The present invention provides an LDMOS transistor in which an impurity concentration is uniformly distributed in a channel so as to reduce the length of the channel.

To achieve these and other advantages in accordance with the invention, as embodied and broadly described herein, there is provided a lateral double-diffused MOS transistor comprising a drift region of a first conductivity; a body of a second conductivity, the body being disposed in the drift region and having a channel thereon; and a source region of the first conductivity, the source region being disposed within the body and having an upper region surrounded by a first impurity region of the first conductivity.

DETAILED DESCRIPTION OF THE INVENTION

Reference will now be made in detail to exemplary embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Wherever possible, like reference designations will be used throughout the drawings to refer to the same or similar parts.

Referring toFIG. 3, illustrating an LDMOS transistor according to the present invention, an n−semiconductor substrate200has an active region defined by a device isolation layer210. The n−semiconductor substrate200serves as a drift region, and if necessary, such a drift region may be specifically formed. A p-type body220and an n−extended drain region230are formed in the n−semiconductor substrate200to be separated from each other. The p-type body220and an n−extended drain region230can be separated by a predetermined distance. An n+source region240is disposed within the p-type body220and has an upper region surrounded by an n−first impurity region241. The disposition of the n−first impurity region241, which has a lower impurity concentration than the n+source region240, effectually shortens the length of a channel221occurring in an upper region of the p-type body220.

An n−second impurity region242is disposed between the channel221and the n−extended drain region230on the surface of the n−semiconductor substrate200. The n−second impurity region242has a higher impurity concentration than the n−semiconductor substrate200. Thus, there is no falloff of the impurity concentration in the channel221toward the n−second impurity region242. An end portion of the n−second impurity242may overlap an end portion of the channel221, in which case the channel length becomes even shorter.

An n+drain region250is disposed on the n−extended drain region230. A gate stack is formed atop the channel221by a sequential forming of the gate isolating layer260and gate conducting layer270. Spacers280are formed on the sidewalls of the gate conducting layer270. The structure is completed by a double diffusion process in which a first ion implantation process is carried out before the gate spacer layer280is formed, and a second ion implantation process is carried out after the gate spacer layer280is formed. The n+source region240and the n+drain region250are electrically connected with a source electrode S and a drain electrode D, respectively, using general wiring formation techniques.

FIG. 4shows the relative impurity concentrations with respect to the channel of the LDMOS transistor ofFIG. 3. For example, the n+source region240exhibits an impurity concentration curve A2, which is relatively high and decreases toward the n−first impurity region241. The n−first impurity region exhibits an impurity concentration curve B2, which is lower but shows a uniform ion distribution. The channel221in the p-type body220exhibits an impurity concentration curve C2, which also shows a fairly uniform ion distribution. The n−second impurity region242exhibits an impurity concentration curve D2, which shows a very uniform ion distribution.

The uniform ion distribution of the channel221in the p-type body220is due to the n−second impurity region242, which has a lower concentration than the n−semiconductor substrate200, is disposed between the channel and the n−extended drain region230. Thus, the impurity concentration of the channel221shows a very nearly uniform distribution even near the n−second impurity region242.

Accordingly, in an LDMOS transistor of the present invention, a first impurity region surrounds a source region, thereby reducing the length of a channel occurring in a body. In addition, first and second impurity regions are disposed at either side of the channel, so that an impurity concentration shows a uniform ion distribution. As a result, channel length can be reduced, a sufficient breakdown voltage can be maintained, and an on-resistance characteristic can be improved.

It will be apparent to those skilled in the art that various modifications can be made in the present invention without departing from the spirit or scope of the invention. Thus, it is intended that the present invention covers such modifications provided they come within the scope of the appended claims and their equivalents.