Semiconductor device and method for determining fuse state

A semiconductor device includes a semiconductor substrate, a fuse which comprises a conductive material and is formed on a semiconductor substrate, a contacting target conductor region which is placed around the fuse on the semiconductor substrate and formed so as to make electrical contact with the fuse through the conductive material constituting the fuse when a process for cutting the fuse is carried out, and a determination unit which detects whether or not the fuse is electrically disconnected, and detects whether or not the contacting target conductor region and the fuse are electrically connected, and determines that the fuse is in a cut state when electrical disconnection of said fuse is detected or electrical connection between said contacting target conductor region and said fuse is detected.

This application is based on Japanese Patent application NO. 2006-157604, the content of which is incorporated hereinto by reference.

BACKGROUND

1. Technical Field

The present invention relates to a semiconductor device and a method for determining a state of fuse, and particularly, relates to a semiconductor device including a fuse and a method for determining a state of fuse.

2. Related Art

Conventional technologies in which a fuse is mounted on a semiconductor device to adjust the value of a resistance used in the semiconductor device by cutting the fuse, or a defective element is separated and then it is replaced with a normal element, are known. Typical manner for cutting a fuse includes cutting a fuse by irradiating a laser beam to a portion of the fuse and cutting a fuse by applying an electric current.

Japanese Unexamined Patent Publication 2005-57186 describes an electric fuse which is cut by utilizing a phenomenon in which the material constituting the electric fuse migrates by an electromigration. Here, since a configuration where the portion of the electric fuse to be cut is enclosed by a plate, heat generated in the portion to be cut when a current flows through the fuse is trapped or accumulated. It is described that thus, cutting is accelerated.

Japanese Unexamined Patent Publication 2004-342729, Japanese Unexamined Patent Publication 2000-31283, Japanese Unexamined Patent Publication 2001-210093, Japanese Unexamined Patent Publication 2004-265523 and Japanese Unexamined Patent Publication 2004-103610 describe a technology for determining the state of cutting of such a fuse.

Japanese Unexamined Patent Publication 2004-342729 describes a determination circuit which determines the melt-cut state of a fuse on the basis of the difference between the reference resistance and the resistance of the fuse after melt-cut.

Japanese Unexamined Patent Publication 2000-31283 describes a circuit having an output inverter which monitors the state of a fuse and a switching transistor which initially melt-cuts a fuse and automatically re-fuses the fuse when re-growth of a filament is recognized after the initial melt-cut of the fuse.

Japanese Unexamined Patent Publication 2001-210093 describes a repair signal generating circuit which outputs a repair signal correctly detecting whether or not the fuse is cut, so that a circuit having a defective portion can be surely repaired.

Japanese Unexamined Patent Publication 2004-265523 describes a semiconductor device having such a configuration that the performance of the drive circuit in a latch circuit can be increased in comparison with a normal mode by switching mode signals. As a result, it is described that misrecognition of the disconnection of a fuse can be prevented.

Japanese Unexamined Patent Publication 2004-103610 describes a trimming pattern (electric fuse) for adjustment which selects on or off of the connection of a circuit for adjustment that has been prepared in advance on a semiconductor integrated circuit.FIG. 10is a schematic plan diagram showing a trimming pattern as described in Japanese Unexamined Patent Publication 2004-103610. The trimming pattern includes two pads11and12to which a voltage is applied, a fine interconnect10connecting the two pads11and12, and two connections13and14which are located on each of both sides of the fine interconnect10without making contact with the fine interconnect10and connected to the circuit for adjustment and the semiconductor integrated circuit. With this trimming pattern, when a voltage is applied between the pads11and12, a current flows through the fine interconnect10so that the fine interconnect10is melt to be connected to the connections13and14. With this operation, an adjustment circuit connected to the connections13and14is turned on and thus trimming is carried out. In this case, the trimming is not carried out by having the fine interconnect10cut such that an adjustment circuit connected to the pads11and12is turned off. It is described that it is easier to make the melted metal contact to the connections13and14, which are close by, than to melt-cut the fine interconnect10. Thus, it is described that trimming can be easily carried out in a short period of time.

However, there is a problem with the conventional technology described in Japanese Unexamined Patent Publication 2005-57186, 2004-342729, 2000-31283, 2001-210093, and 2004-265523, in which the cut state of the fuse, which is supposed to be cut, cannot be correctly determined in cases where the fuse is not sufficiently cut, or where the material constituting the fuse migrates to cause reconnection after the fuse is once cut. In addition, the distance between interconnects becomes smaller as semiconductors are miniaturized. Therefore, the problem of short circuiting between interconnects has become significant.

Furthermore, there is also a problem with the technology described in Japanese Unexamined Patent Publication 2004-103610, in which the cut state of the fuse cannot be correctly determined in cases where the melted metal does not make contact with the connections13and14or where the material constituting the fuse migrates to cause re-cut after the contact is once made. In addition, in the configuration described in Japanese Unexamined Patent Publication 2004-103610, it is necessary to add a structure for applying a voltage between the pads11and12, as well as two connections13and14. Thus, there is another problem that the area increases.

SUMMARY

According to the present invention, there is provided a semiconductor device, including:

a semiconductor substrate;

a fuse which comprises a conductive material and is formed on the semiconductor substrate;

a contacting target conductor region which is placed around the fuse on the semiconductor substrate and formed so as to make electrical contact with the fuse through the conductive material constituting the fuse when a process for cutting the fuse is carried out; and

a determination unit which detects whether or not the fuse is electrically disconnected, as well as whether or not the contacting target conductor region and the fuse are electrically connected, and determines that the fuse is in a cut state when electrical disconnection of the fuse is detected or electrical connection between the contacting target conductor region and the fuse is detected.

The present invention provides a method for determining a fuse state in a semiconductor device including a fuse which includes a conductive material and is formed on a semiconductor substrate and a contacting target conductor region which is placed around the fuse on the semiconductor substrate and formed so as to be electrically connected to the fuse through the conductive material constituting the fuse when a process for cutting the fuse is carried out, the method for determining a fuse state including:

detecting whether or not the fuse is electrically disconnected;

detecting whether or not the contacting target conductor region and the fuse are electrically connected; and

determining that the fuse is in a cut state when electrical disconnection of said fuse is detected or electrical connection between the contacting target conductor region and the fuse is detected.

In this configuration, the accuracy of determination of the cut state of a fuse can be improved. In addition, when a process for cutting a fuse is carried out, the contacting target conductor region is electrically connected to the fuse in the configuration. When it is detected whether or not the contacting target conductor region and the fuse are electrically connected, it is necessary to ground either the contacting target conductor region or the fuse. In the configuration of the present invention, the fuse is grounded using an interconnect used to ground conventional fuses, and thus, it can be detected whether or not the contacting target conductor region and the fuse are electrically connected. Therefore, it is not necessary to additionally provide a specific interconnect for grounding, and the accuracy of determining the fuse state can be increased while preventing increase in the area of the device, which has a simple configuration.

The semiconductor device of the present invention may have a configuration where in the fuse, a cut portion is formedbetween the one end side and a connect portion which is connected to the contacting target conductor region in a cut state.

The semiconductor device of the present invention may have a configuration where the fuse includes a flow-out portion composed of the conductive material which has flown out from the fuse to be connected with the contacting target conductor region and to form a cut portion between the flow-out portion and the first detection unit in a cut state

The present inventors found a new technique for cutting a fuse. Here, the fuse may be an electric fuse which is cut by a current flow. By providing a certain configuration to an electric fuse and through control in accordance with a method for applying voltage, the conductor which is a part of the electric fuse and constitutes the electric fuse is forced to flow toward outside when the electric fuse is cut, and thus, the balance between migration and the supply of the material is lost thereby forming a larger cut portion in other part.

A portion of connection between the fuse and the contacting target conductor region and a cut portion where the fuse is cut can be selectively set. As a result, a configuration where the fuse is cut in a portion between one end side and the connect portion to which the contacting target conductor region connects in a cut state can be provided as described above. In addition, this technique allows the disconnection of the electric fuse in the cut state to be maintained in improved condition.

Here, “outside” means outside of the region where the fuse is formed in the state before being cut. For example, in the case where the fuse is formed of an interconnect, it can mean outside of the trench for the interconnect. Therefore, the conductive material constituting the fuse is sucked out in the direction toward the flow-out portion, and the fuse is cut in a portion different from the flow-out portion.

According to the present invention, the accuracy of determining a fuse state can be improved.

DETAILED DESCRIPTION

First Embodiment

FIG. 1is a schematic diagram showing the configuration of the semiconductor device according to an embodiment of the present invention.

A semiconductor device100includes a semiconductor substrate (not shown), a fuse102which comprises a conductive material and is formed on the semiconductor substrate, and a contacting target conductor region108which is placed around the fuse102on the semiconductor substrate and formed so as to be electrically connected to the fuse102through the conductive material constituting the fuse102when a process for cutting the fuse102is carried out.

The semiconductor device100further includes a determination unit115which detects whether or not the fuse102is electrically disconnected, and in addition, detects whether or not the contacting target conductor region108and the fuse102are electrically connected, and thus, determines that the fuse102is in a cut state when electrical disconnection of the fuse102is detected, or electrical connection between the contacting target conductor region108and the fuse102is detected.

According to the present embodiment, the determination unit115includes a cut detecting circuit110(first detection unit), a contact detecting circuit112(second detection unit) and an NOR circuit114(output unit). The cut detecting circuit110is connected to one end of the fuse102and detects whether or not the fuse102is electrically disconnected. The contact detecting circuit112is connected to the contacting target conductor region108and detects whether or not the contacting target conductor region108and the fuse102are electrically connected. The NOR circuit114, into which an output from the cut detecting circuit110and an output from the contact detecting circuit112are inputted, outputs a signal which indicates that the fuse102is in a cut state in the case where the electrical disconnection of the fuse102is detected by the cut detecting circuit110, or in the case where the electrical connection between the contacting target conductor region108and the fuse102is detected by the contact detecting circuit112. A first terminal116is connected to the other end of the fuse102. The contacting target conductor region108is placed in the vicinity of the fuse102and connected to the contact detecting circuit112. The output of the NOR circuit114is connected to a second terminal118.

The cut detecting circuit110supplies a predetermined electric potential to the one end of the fuse102in a state where the other end of the fuse102(first terminal116) is grounded and detects whether the electric potential at the one end is high or low. Thus, the cut detecting circuit110detects that the fuse102is electrically disconnected in the case where this electric potential is higher than the reference potential, and detects that the fuse102is not electrically disconnected in the case where this electric potential is lower than the reference potential. The cut detecting circuit110may determine that the potential is low in the case where, for example, the ground potential is detected and that the potential is high in the case where a potential which is approximately the same as that supplied to the one end of the fuse102is detected.

The contact detecting circuit112supplies a predetermined electric potential to the contacting target conductor region108in a state where the fuse102is grounded, and detects whether the electric potential of the contacting target conductor region108is high or low. Thus, the contact detecting circuit112detects that the contacting target conductor region108and the fuse102are not electrically connected in the case where this electric potential is higher than the reference potential, and detects that the contacting target conductor region108and the fuse102are electrically connected in the case where this electric potential is lower than the reference potential. The contact detecting circuit112may determine that the potential is low in the case where the ground potential is detected and that the potential is high in the case where a potential which is approximately the same as that supplied to the contacting target conductor region108is detected.

FIG. 2is a schematic diagram showing the configuration of a specific example of the cut detecting circuit110and the contact detecting circuit112in the semiconductor device100ofFIG. 1.

The cut detecting circuit110includes a first switch130, a first inverter132, a second inverter134and a third inverter136. The first inverter132and the second inverter134are connected so as to be in annular form where the output from one is inputted into the other, respectively, and function as a memory circuit. The fuse102and the first switch130are connected to the input of the first inverter132. The first switch130turns on and off the connection between the power line Vcc and the first inverter132. The output of the first inverter132is inputted into the third inverter136. The output of the third inverter136is inputted into the NOR circuit114.

The contact detecting circuit112includes a second switch140, a fourth inverter142and a fifth inverter144. The fourth inverter142and the fifth inverter144are connected so as to be in annular form where the output from one is inputted into the other, respectively, and function as a memory circuit. The contacting target conductor region108and the second switch140are connected to the input of the fourth inverter142. The second switch140turns on and off the connection between the power line Vcc and the fourth inverter142. The output of the fourth inverter142is inputted into the NOR circuit114. The contact detecting circuit112may have the similar configuration as that used for determining whether or not an antifuse is electrically connected.

FIG. 3shows the fuse102according to the present embodiment in a cut state. When the fuse102according to the present embodiment is in a cut state, a cut portion152(cut region) is formed between a contact portion (connection region)150with the contacting target conductor region108and the cut detecting circuit110.

In this configuration, in the case where the first terminal116is grounded and a predetermined electric potential (Vcc) is supplied to the contacting target conductor region108, the electric potential of the contacting target conductor region108varies depending on whether or not the contacting target conductor region108is electrically connected to the fuse102. Therefore, the state of the electrical connection between the contacting target conductor region108and the fuse102can be detected by the contact detecting circuit112. In this case, the electric potential of the contacting target conductor region108becomes GND when the contacting target conductor region108is connected to the fuse102via the contact portion150. Meanwhile, the electric potential of the contacting target conductor region108becomes Vcc when the contacting target conductor region108is not electrically connected to the fuse102.

Next, the process procedure for determining whether the fuse102is in a cut state or not in the semiconductor device100having the above described configuration is specifically described. First, the detection process by the cut detecting circuit110is described.

The first switch130is turned on so that the first inverter132and the power line Vcc are connected. As a result, a predetermined electric potential (Vcc) is supplied to one end of the fuse102. In addition, the first terminal116is grounded (GND). Then, the first switch130is turned off after a predetermined time has passed.

In the case where the fuse102is not electrically disconnected in the above described state, a current flows through the fuse102, and therefore, the potential at the one end of the fuse102becomes GND (low potential). Therefore, the input into the first inverter132becomes GND (low potential) and the input into the third inverter136becomes Vcc. At this time, GND is inputted from the third inverter136into the NOR circuit114. Meanwhile, in the case where the fuse102is electrically connected, no current flows through the fuse102, and therefore, the potential at the one end of the fuse102is maintained at Vcc (high potential). Therefore, the input into the first inverter132becomes Vcc (high potential) and the input into the third inverter136becomes GND. At this time, Vcc is inputted from the third inverter136into the NOR circuit114.

Next, the detection process by the contact detecting circuit112is described.

The second switch140is turned on so that the fourth inverter142and the power line Vcc are connected. As a result, a predetermined electric potential (Vcc) is supplied to the contacting target conductor region108. In addition, the first terminal116is grounded (GND). Then, the second switch140is turned off after a predetermined time has passed.

In the case where the contacting target conductor region108is electrically connected to the fuse102, that is, in the case where a process for electrically disconnecting the fuse102is carried out, in the above described state, the contacting target conductor region108is electrically connected to the fuse102via the contact portion150, and therefore, the electric potential of the contacting target conductor region108becomes GND (low potential). Therefore, the input into the fourth inverter142becomes GND (low potential), and Vcc is inputted from the fourth inverter142into the NOR circuit114. Meanwhile, in the case where the contacting target conductor region108is not electrically connected, that is, in the case where a process for electrically disconnecting the fuse102is not carried out, the electric potential of the contacting target conductor region108becomes Vcc (high potential). Therefore, the input into the fourth inverter142becomes Vcc (high potential), and GND is inputted from the fourth inverter142into the NOR circuit114.

According to the present embodiment, detection by the cut detecting circuit110and detection by the contact detecting circuit112can be carried out at the same time. That is, the first switch130and the second switch140can be turned on at the same time so as to carry out the above described detections.

The NOR circuit114outputs Vcc only when the input from the cut detecting circuit110and the input from the contact detecting circuit112are both GND, and otherwise, outputs GND. According to the present embodiment, the determination unit115may determine that the fuse102is in a cut state in the case where the output from the NOR circuit114is GND, and determine that the fuse102is not electrically disconnected and not in the cut state in the case where the output from the NOR circuit114is Vcc.

As described above, in the semiconductor device100according to the present embodiment, the accuracy for determining the cut state of the fuse102can be improved. Even if the semiconductor device100including the fuse102on which a process for cutting is carried out is used for a long period of time and both ends of the fuse102are short circuited, it can be determined that this fuse102is in the cut state when the connection between the fuse102and the contacting target conductor region108is detected, for example. Contrarily, even if the semiconductor device100including the fuse102on which a process for cutting is carried out is used for a long period of time and the connection between the fuse102and the contacting target conductor region108is opened, it can be determined that the fuse102is in the cut state when the disconnection of the fuse102is detected.

Next, a specific configuration of fuse102according to the present embodiment and the procedure for cutting the same are described. According to the present embodiment, the fuse102may be an electric fuse which can be cut by making a current flow through it. The present inventors found a technique for cutting an electric fuse by providing a certain configuration to an electric fuse and through control in accordance with a method for applying a voltage to an electric fuse in such a manner that the material constituting the electric fuse is forced to flow toward outside of the electric fuse, and thus, the balance between migration and the supply of the material is lost when the electric fuse is cut, thereby forming a larger cut portion in other part. That is, excessive power is applied to an electric fuse on which a process for cutting is to be carried out, and thus, a current flows through the electric fuse so that the conductive material is heated and expanded. When the conductive material expands, cracking occurs in the coating film surrounding the conductive material. Furthermore, the conductive material expands so that the conductive material is forced to flow toward outside through the cracks in the coating film surrounding the conductive material. As a result, the balance between migration and the supply of the conductive material is lost, and a large cut part is created at another portion than the region from which the conductive material has flown out. In the following, the cutting of the electric fuse in accordance with this technique is referred to as “crack assisted type cutting.”

This crack assisted type cutting makes the cutting of an electric fuse easy and can maintain an excellent cut state. In addition, the configuration of the electric fuse can be modified so that portions where the conductive material flows out and the conductive material is cut can be selectively formed. According to the present embodiment, a process for cutting the fuse102is carried out using the crack assisted type cutting.

FIGS. 4A and 4Bare top diagrams showing the configuration of a fuse102according to the present embodiment. The fuse102has a configuration where a contact portion150and a cut portion152are formed selectively, when a process for cutting is carried out.FIG. 4Ashows a state before cutting, andFIG. 4Bshows a state after cutting.

A semiconductor device100has a semiconductor substrate (not shown) and a fuse102formed on the semiconductor substrate. The fuse102is composed of a first interconnect103cand a second interconnect103e, which are formed in different layers, and a via103dwhich connects the first interconnect103cand the second interconnect103e. Here, the first interconnect103cis formed in the upper layer and the second interconnect103eis formed in the lower layer. One end of the second interconnect103eis connected to a second pad portion106, and the other end is connected to the via103d. One end of the first interconnect103cis connected to the via103d, and the other end is connected to the first pad portion104. The first pad portion104is connected to a first terminal116. The second pad portion106is connected to a cut detecting circuit110.

The first interconnect103chas a folded interconnect structure103b. The folded interconnect structure103bhas a first straight line portion connected to the first pad portion104, a second straight portion placed approximately parallel to the first straight line portion, a third straight line portion placed approximately parallel to the second straight line portion, a fourth straight line portion placed approximately parallel to the third straight line portion, a first connection portion which connects the first straight line portion and the second straight line portion, a second connection portion which connects the second straight line portion and the third straight line portion, a third connection portion which connects the third straight line portion and the fourth straight line portion, and a fourth connection portion which connects the fourth straight line portion and the via103d.

In addition, according to the present embodiment, the semiconductor device100has a configuration where the top side, bottom side, and lateral sides of the fuse102are covered with a cover member404. The cover member404is composed of a via402, an electrode400and a plate which is not shown. The electrode400may be provided as a pad electrode which is formed in the same layer as the first interconnect103cof the fuse102. The via402is formed in an upper layer and a lower layer of the electrode400, and connects the plates which are formed in further upper layer and a further lower layer, and the electrode400to each other. The via402may be provided as a slit via in a configuration where the via402and the electrode400can cover around the fuse102in wall form. As a result, heat generated in the fuse102when a current flows between the first pad portion104and the second pad portion106is reflected from the cover member404so as to be trapped inside the cover member404. Thus, it becomes easy to form a contact portion150and a cut portion152in the fuse102. In addition, the cover member404also functions as a diffusion preventing structure which prevents the material that constitutes the fuse102from diffusing or dispersing to the surroundings when the fuse102is cut. Therefore, the dispersed pieces of the material that constitutes the fuse102can be prevented from reaching other elements.

According to the present embodiment, the contacting target conductor region108can be formed of a cover member404. The cover member404is placed so as to be electrically disconnected from the fuse102when the fuse102is in a state before cutting. In addition, the cover member404is placed in the vicinity of the folded interconnect structure103bof the first interconnect103cand formed so as to make contact with the first interconnect103cof the fuse102via the contact portion150when a process for cutting is carried out on the fuse102. Meanwhile, the cover member404is formed so as not to make contact with the second interconnect103eeven when a process for cutting is carried out on the fuse102. Furthermore, the cover member404is connected to the contact detecting circuit112.

The configuration of the cover member404is also described in the Japanese Unexamined Patent Publication 2005-57186 or the like. According to the present embodiment, a conventionally used cover member may be used as the contacting target conductor region108, and thus, the accuracy for determining the state of the fuse102can be improved while preventing the increase of the area of the device.

When a current flows between the first pad portion104and the second pad portion106in the fuse102having the above described configuration, the material constituting the fuse102is heated. At this time, the conductive material is easily heated in portions where the interconnect is folded. Therefore, the conductive material easily thermally expands in the portion of the folded interconnect structure103b, and cracking easily occurs. The material which constitutes the fuse102flows out from the folded interconnect structure103bso as to form a contact portion150. That is, according to the present embodiment, the portion of the folded interconnect structure103bis an expected region of material flow-out150a, where a contact portion150is to be formed.

When a material flows out from the expected region of the material flow-out150aand a contact portion150is formed, the supply of the material does not keep up with the flow in the via103d. Thus, via103dtends to be cut easily. Therefore, the portion of the via103dbecomes an expected region to be cut, where the cut portion152is to be formed. In the fuse102according to the present embodiment, portions where the contact portion150and the cut portion152are formed can be selected.

FIGS. 5A and 5Bare cross sectional diagrams along line A-A′ inFIGS. 4A and 4Bshowing an example of the fuse.FIG. 5Ashows the state before cutting, andFIG. 5Bshows the state after cutting. Here, though an example where the second interconnect103eis a lower layer interconnect and the first interconnect103cis an upper layer interconnect is shown, these may be the opposite.

As shown inFIG. 5A, the semiconductor device100includes a semiconductor substrate (not shown), and a first etch stop film302, a first interlayer insulating film304, a first protective film306, a second etch stop film308, a second interlayer insulating film310, a third etch stop film312, a third interlayer insulating film314, a second protective film316and a fourth etch stop film318, which are formed on the semiconductor substrate in this order.

The via103dof the fuse102is electrically connected to the second interconnect103eand the first interconnect103cin the state before cutting. The second interconnect103eis formed in the first etch stop film302, the first interlayer insulating film304and the first protective film306. The via103dis formed in the second etch stop film308, the second interlayer insulating film310and the third etch stop film312. The first interconnect103cis formed in the third etch stop film312, the third interlayer insulating film314and the second protective film316.

The second interconnect103e, the via103dand the first interconnect103cmay be composed of a copper containing metal film which includes copper as the main component. The copper containing metal film may include silver. Furthermore, the copper containing metal film may include one or more additional elements selected from among Al, Au, Pt, Cr, Mo, W, Mg, Be, Zn, Pd, Cd, Hg, Si, Zr, Ti and Sn. The copper containing metal film can be formed in accordance with, for example, a plating method. In addition, a silicide film, for example, may be formed on the surface of the copper containing metal film.

Furthermore, a barrier metal film320is formed on the sides and the bottom of the first interconnect103c, the via103dand the second interconnect103eso as to make contact with and cover each of them. The barrier metal film may have a composition which contains metal of a high melting point. The barrier metal film320may be composed of, for example, Ta, TaN, Ti, TiN, W, WN or the like.

That is, a barrier metal film320is provided between the second interconnect103eand the via103dso as to make contact with these in the state before cutting. In addition, a barrier metal film320is also provided between the via103dand the first interconnect103cso as to make contact with them.

The first interlayer insulating film304and the third interlayer insulating film314may be composed of a low dielectric constant film, such as SiOC. In addition to SiOC, polyhydrogen siloxane such as HSQ (hydrogen silsesquioxane), MSQ (methyl silsesquioxane) or MHSQ (methylated hydrogen silsesquioxane), aromatic containing organic materials such as polyaryl ether (PAE), divinyl siloxane-bis-benzocyclobutene (BCS) or Silk®, SOG, FOX (flowable oxide), Cytop and BCB (benzocyclobutene) can be used as the low dielectric constant film. In addition, porous films theseof can also be used as the low dielectric constant film. The first interlayer insulating film304and the third interlayer insulating film314may be composed of the same material or different materials.

The second interlayer insulating film310may be composed of the same material as those described above for the first interlayer insulating film304and the third interlayer insulating film314. Here, it is preferable that the second interlayer insulating film310is composed of a material that is harder than that of the first interlayer insulating film304and the third interlayer insulating film314, in terms of the relation to the first interlayer insulating film304and the third interlayer insulating film314. The second interlayer insulating film310may be composed of, for example, a material having higher Young's modulus than that of the first interlayer insulating film304and the third interlayer insulating film314. This configuration makes it easy to form a contact portion150in an interconnect portion and form a cut portion152in the via103d.

The second interlayer insulating film310in which the via103dis formed, may be composed of, for example, SiOC (Black Diamond). The third interlayer insulating film314in which the first interconnect103cmay be formed, may be composed of SiOC (Aurora). Here, Black Diamond and Aurora are both porous films of SiOC. Aurora has lower relative dielectric constant, lower film density, and is more flexible film than Black Diamond.

Here, the invention is not limited to this configuration. The second interlayer insulating film310may be composed of the same material as the first interlayer insulating film304or the third interlayer insulating film314. In this case also, the first interconnect103cemits heat when a current is applied and expands a great deal, while the via103dhas a small conductive volume and the amount of the expansion due to heat conduction is small. Therefore, a cut portion152can be selectively formed in the via103d.

The second etch stop film308and the fourth etch stop film318function as an etch stop film when via holes and interconnect trenches are formed, and have a function of preventing the copper that constitutes the second interconnect103eand the first interconnect103cfrom diffusing. The second etch stop film308and the fourth etch stop film318may be composed of a material which is harder than that of the first interlayer insulating film304and the third interlayer insulating film314. The second etch stop film308and the fourth etch stop film318may be composed of a material having higher Young's modulus than that of the first interlayer insulating film304and the third interlayer insulating film314. The second etch stop film308and the fourth etch stop film318may be composed of, for example, SiCN, SiN, SiC, SiOF or SiON.

The first protective film306and the second protective film316have a function of protecting the first interlayer insulating film304and the third interlayer insulating film314when the second interconnect103eand the first interconnect103care respectively polished in accordance with CMP. The first protective film306and the second protective film316can be composed of, for example, an SiO2film.

The first etch stop film302and the third etch stop film312may be composed of a material which is the same as that for the second etch stop film308and the fourth etch stop film318. In addition, though not shown here, the first etch stop film302and the third etch stop film312may be a multilayer film of a first insulating film composed of the same material as that for the second etch stop film308and the fourth etch stop film318, and a second insulating film formed on top of the first insulating film and composed of the same material as that for the first protective film306and the second protective film316.

Here, the second interconnect103e, the via103dand the first interconnect103chaving the above described configuration may be formed in accordance with the same process as that for conventional multilayer interconnect structures. As a result, the fuse102can be formed without adding any special process.

As described above, the surroundings of the first interconnect103c, for example, are covered with coating films, such as a barrier metal film320and a fourth etch stop film318, and further covered with the third interlayer insulating film314which is a more flexible material than the coating films, in the configuration.

When excessive power is applied to the fuse102having this configuration by applying a predetermined voltage between the first pad portion104and the second pad portion106, the material which constitutes the first interconnect103cexpands in the direction toward the third interlayer insulating film314, which is a flexible film. As the material expands, cracks are occurred in the barrier metal film320and the like, and the material that constitutes the first interconnect103cflows out through the cracks and into the third interlayer insulating film314. That is, the material that constitutes the first interconnect103cflows out to the outside of the interconnect trench. Such a flow-out is occurred in the folded interconnect structure103bof the first interconnect103c. As a result, as shown inFIG. 4B, a contact portion150is formed. At this time, the contact portion150is connected to the cover member404. Thus, the cover member404(contacting target conductor region108) and the first terminal116are electrically connected.

Furthermore, the material that constitutes the fuse102suddenly moves in the direction toward the contact portion150, and therefore, the material flow is cut in a portion where the material fails to keep up with the movement. According to the present embodiment, the material flow is cut and a cut portion152is formed at a portion of the via103d. As a result of this mechanism, the contact portion150can be formed in a location at a distance from the cut portion152.

In addition, according to the present embodiment, a barrier metal film320is provided between the via103dand the second interconnect103e, and therefore, the barrier metal film320easily peels from the second interconnect103e. Thus, the cut portion152is easily formed between the barrier metal film320and the second interconnect103e.

Furthermore, the material that constitutes the via103dmoves together with the barrier metal film320, so that the cut portion152is formed between the barrier metal film320and the second interconnect103eafter cutting. Therefore, even when heat treatment or the like is carried out in a subsequent process, the barrier metal film320prevents the conductive material constituting the copper containing metal film from moving again and being reconnected to the second interconnect103e. As a result, the heat resistance of the semiconductor device100can be improved. This is because the barrier metal film320is formed double between the contact portion150and the cut potion152, and therefore, the move of the conductive material due to the heat treatment can be prevented.

Here, though a single damascene structure is shown as the interconnect structure in the above, a dual damascene structure may be provided.

In the semiconductor device100according to the present embodiment, as described above, the accuracy for determining whether or not the fuse102is in a cut state can be increased. In addition, the present embodiment provides a configuration wherein the electrical connection between the contacting target conductor region108and the fuse102is detected by grounding one end of the fuse102. Therefore, when determining whether or not the fuse102and the contacting target conductor region108are electrically connected, the interconnect used for cutting the fuse102and determining whether the two ends of the fuse102are electrically disconnected can be used. Thus, a new interconnect for grounding is not required to be formed. Thus, the accuracy of determining the fuse102state can be improved with a simple configuration while preventing the increase of the area of the device. Furthermore, since the cover member404is used as the contacting target conductor region108, there is no need to further form the contacting target conductor region108. Thus, the accuracy of determining the fuse102state can be improved without increasing the area of the device.

Second Embodiment

FIG. 6is a schematic diagram showing the configuration of a semiconductor device100according to the present embodiment.

According to the present embodiment, the process procedure for determining the cut state of a fuse102is different from the process procedure as described in the first embodiment.

The semiconductor device100further includes a transistor154of which either one of the source or the drain is connected to between the fuse102and a cut detecting circuit110, in addition to the configuration as described in the first embodiment in reference toFIG. 2. Here, either the source or the drain of the transistor154, whichever is not connected to between the fuse102and a cut detecting circuit110, is grounded. Though not specifically described, a transistor which is included in a conventional fuse structure and used for cutting a fuse102can be used as the transistor154. In addition, the cut detecting circuit110further includes a third switch131which turns on and off the connection between the fuse102and the first inverter132, in addition to the configuration as described in the first embodiment in reference toFIG. 2.

The process procedure for determining whether the fuse102of the semiconductor device100having the above configuration is in a cut state or not is specifically described below. According to the present embodiment, detection by the cut detecting circuit110is carried out at timing different from that for detection by a contact detecting circuit112.

First, the detection process by the cut detecting circuit110is explained.

A first switch130is turned on to connect a first inverter132and a power line Vcc, and at the same time, a third switch131is turned on to connect the first inverter132and the fuse102. At this time, a second switch140and the transistor154are kept off. As a result, a predetermined electric potential (Vcc) is provided at one end of the fuse102. In addition, the first terminal116is grounded (GND). After that, the first switch130is turned off, after a predetermined period of time has passed.

With this configuration, the determination of the state of electrical connection of the fuse102shows a similar result as in the first embodiment. That is, in the case where the fuse102is not electrically disconnected, GND is inputted from a third inverter136to an NOR circuit114. Meanwhile, in the case where the fuse102is electrically connected, Vcc is inputted from the third inverter136into the NOR circuit114.

Next, the detection process by the contact detecting circuit112is explained.

The first switch130and the third switch131are turned off. At this time, the first inverter132and the second inverter134in the cut detecting circuit110functions as a memory circuit, and therefore, the above detection results can be preserved. In this state, the second switch140is turned on, to connect the fourth inverter142and the power line Vcc. Thus, a predetermined electric potential (Vcc) is provided to a contacting target conductor region108. In addition, a first terminal116is grounded (GND), and at the same time, the transistor154is turned on. As a result, one end and the other end of the fuse102are both grounded. After this, the second switch140is turned off, after a predetermined period of time has passed. Since one end and the other end of the fuse102are both grounded, the potential of the contacting target conductor region108can be set to be GND, irrespectively of the positional relationship between the contact portion and the cut portion of the fuse102, in the case where a process for cutting the fuse102is carried out so that the fuse102makes electrical connection with the contacting target conductor region108.

The detection of the state of electrical connection between the contacting target conductor region108and the fuse102in the above described state can show a similar result as in the first embodiment. That is, Vcc is inputted from the fourth inverter142into the NOR circuit114, in the case where the contacting target conductor region108is electrically connected to the fuse102. Meanwhile, GND is inputted from the fourth inverter142into the NOR circuit114, in the case where the contacting target conductor region108is not electrically connected to the fuse102.

According to the present embodiment, the NOR circuit114outputs Vcc only when the input from the cut detecting circuit110and the input from the contact detecting circuit112are both GND, and otherwise outputs GND, as described in the first embodiment. A determination unit115determines that the fuse102is in a cut state in the case where the output from the NOR circuit114is GND, and determines that the fuse102is not in a cut state in the case where the output from the NOR circuit114is Vcc.

Though in the present embodiment, the fuse102may have the same configuration as described in the first embodiment, the configuration of the fuse102is not particularly limited. Examples of the configuration of the fuse102are described below.

FIGS. 7A and 7Bare diagrams showing the fuse102where the fuse102is an electric fuse.FIG. 7Ais a top diagram, andFIG. 7Bis a cross sectional diagram along B-B′ inFIG. 7A.

The fuse102may be formed of an interconnect. A first pad portion104and a second pad portion106are formed at one end and at the other end of the fuse102, respectively. Here, though the fuse102in a form extending in one direction is shown, the form of the fuse102may vary.

A contacting target conductor region108may be formed of a cover member which prevents the material that constitutes the fuse102from dispersing when the fuse102is cut, as the cover member404described in the first embodiment in reference toFIG. 4.

In addition, the fuse102may have such a configuration that it can be melt-cut by irradiating a laser, as shown inFIGS. 8A and 8B.FIG. 8Ais a top diagram, andFIG. 8Bis a cross sectional diagram along C-C′ inFIG. 8A.

The same effects as those described in the first embodiment can be gained in the semiconductor device100according to the present embodiment. According to the present embodiment, the transistor used for cutting a fuse102can also be used as the transistor154, and the accuracy of determining the fuse102state can be improved by a simple configuration while preventing the increase of the area of the device.

As described above, though the embodiments according to the present invention are described in reference to the drawings, these are illustrative of the present invention, and a variety of configurations can be adopted, in addition to that above.

According to the first embodiment, an example where the fuse102is formed of a first interconnect103c, a via103dand a second interconnect103ein which the cut portion152is formed in the via103dis described. However, other examples can be provided. For example, the fuse102may be a combination of a narrow interconnect and a folded interconnect structure103bformed of a wide interconnect. In this case, a cut portion152may be formed in the narrow interconnect.

Here, the above described embodiments show a configuration where a cover member404is used as a contacting target conductor region108, and therefore, the contacting target conductor region108surrounds the entirety of the fuse102in the configurations shown inFIG. 1and other figures. However, it is not necessary for the contacting target conductor region108to have such a configuration that surrounds the entirety of the fuse102, and any configuration is possible, as long as the contacting target conductor region is arranged so as to make contact with the fuse102when a process for cutting the fuse102is carried out.FIG. 9schematically shows such an example. In addition, the contacting target conductor region108may be provided separately from the cover member404.