Test board for high-frequency system level test

A test board for a high-frequency system level test: The test board includes a main board having through holes filled with a conductive material. These holes may be located at a portion of the main board from which an existing module socket has been removed. An interface board has surface mounted device (SMD) pads on front and rear surfaces. The SMD pads on the front surface of the interface board are connected with the SMD pads on the rear surface thereof through cross connection wiring within the interface board for a pin swap. The through holes of the main board are connected with the SMD pads on the rear surface of the interface board via iron cores fixed at a guide. A test module socket is mounted on surfaces of the SMD pads on the front surface of the interface board.

BACKGROUND OF THE INVENTION

This application claims the priority of Korean Patent Application No. 2004-35091, filed on May 18, 2004, in the Korean Intellectual Property Office. The entire content of Korean Patent Application No. 2004-35091 is hereby incorporated herein by reference.

1. Field of the Invention

The present invention relates to semiconductor device test equipment, and more particularly, to a test board for a system level test in which a semiconductor memory device is tested on the main board of a computer.

2. Description of the Related Art

Generally, after semiconductor memory devices, (such as synchronous dynamic random access memory (SDRAM), Rambus (DRAM), and static RAM (SRAM)) are manufactured, an assembled semiconductor device is inserted into a socket and the device is tested using special test equipment.

Since semiconductor device test equipment is very expensive, the cost for testing semiconductor devices is significant. As a result, the price of semiconductor devices takes into account the cost of testing the devices. In addition, since semiconductor device test equipment tests a semiconductor device on a separate system, and not in the environment in which the semiconductor device is actually installed and used, the tests frequently cannot properly take into account environmental characteristics such as the noise that occurs when devices are on the main board of a computer. This can decrease test accuracy. As a result, problems may occur in the quality of the semiconductor devices.

To solve these problems, frequently, semiconductor devices are tested using a computer main board. With this type of testing, a socket is installed on the main board of a computer. A module or a device to be tested is inserted into the socket, and the computer is operated to monitor whether the module or the device is normal or if it has a defect.

Recently, due to high processing speed, the noise that occurs when devices are used in particular environments has become a significant issue relative to quality. Thus, testing semiconductor devices in an environment in which the devices are actually used, i.e., in an installation environment, is often preferred in contrast to testing semiconductor devices in the relatively silent environment provided by semiconductor device test equipment. A test in the installation environment is performed by inserting a semiconductor memory device into the main board of a personal computer or of a work station similar to the main board in which the semiconductor memory device will actually be used. The computer or the work station is then operated and the operation is monitored to determine if the semiconductor memory device is normal or has if it has a defect.

FIG. 1illustrates a conventional test board for a system level test in which a semiconductor memory device can be tested in a environment similar to that in which the device will be actually used. Referring toFIG. 1, a test board100includes a main board110on which a central processing unit (CPU) and other electronic parts are installed. Preexisting module sockets112into which semiconductor memory devices would normally be inserted have been removed from a front surface111of the main board110. The main board110is positioned upside down. Connectors114are installed on the rear surface113of the main board110and connected with connectors124on the rear surface123of interface board120. A plurality of test module sockets122are installed on the front surface121of the interface board120. The connectors124are connected with the test module sockets122via signal lines125.

Electrical test signals generated in the main board110are transmitted to the test module sockets122via the connectors114and124and the signal lines125. The inside of each test module socket122is separated when the test module socket122is pressed down using a hand, handler, or other tool so that an external contact, i.e., a lead line, of a semiconductor memory device can be inserted into the test module socket122. After a test device, i.e., a semiconductor memory device, is put on the test module socket122, pressure on the top of the test module socket122is released, and lead lines on the test device is held by and in contact with the test module socket122.

As a processing speed of a semiconductor memory device increases, the test board100must perform tests at high frequency. However, high-frequency testing is often limited by parasitic resistance (R), inductance (L), and capacitance (C), the value of which depends on the height A between the main board110and the interface board120and a length B of the signal lines125.

Therefore, an improved test board capable of reducing the length of the signal lines and capable of performing a high-frequency test is desired.

SUMMARY OF THE INVENTION

The present invention provides a test board for a high-frequency system level test. The test board including a main board that includes through holes filled with a conductive material. These holes may be located in a portion of the board from which an existing module socket has been removed. A guide is disposed to face a surface of the main board. The guide includes stationary iron cores contacting the through holes of the main board. An interface board includes surface mounted device (SMD) pads connected with the iron cores.

Some of the SMD pads may be disposed on a rear surface of the interface board and contact the iron cores, respectively, and the others of the SMD pads may be disposed on a front surface of the interface board. The SMD pads on the rear surface of the interface board may be connected with the SMD pads on the front surface thereof through cross connection wiring within the interface board for a pin swap. The test board may further include a test module socket installed on the SMD pads disposed on the front surface of the interface board.

Each iron core may include an end which protrudes over a front surface of the guide and is folded to form a space into which a highly elastic rubber piece is inserted and another end which protrudes over the surface of the main board from which the existing module socket is removed and is soldered.

According to still another aspect of the present invention, there is provided a test board including a main board that includes through holes filled with pogo pins. A guide is disposed to face a surface of the main board to fix the pogo pins. An interface board includes SMD pads connected with the pogo pins protruding above the guide.

The pogo pins protruding from the surface of the main board may be soldered on the main board.

According to the present invention, conventional connectors that are disposed between a main board and an interface board are removed, and a test module socket is mounted immediately on SMD pads on the interface board.

With the present invention signal lines are greatly shortened. Accordingly, a memory device can be tested at high frequency under the same environment as that under which the memory device is actually used. In addition, system breakage can be reduced, thereby increasing reliability and mass productivity. The test module socket can be easily replaced and repaired since it is installed using surface mount.

DETAILED DESCRIPTION OF THE INVENTION

The attached drawings illustrate preferred embodiments of the present invention. The drawings and the following description provide an understanding, the merits, and the objectives accomplished by the present invention.

Hereinafter, the invention will be described in detail by explaining preferred embodiments of the invention with reference to the attached drawings. Like reference numerals in the drawings denote like elements.

FIG. 2illustrates a test board200according to an embodiment of the present invention. The test board200includes a main board210and an interface board220. A guide230is positioned between boards210and220in order to connect the boards to each other.

The main board210includes through holes or via holes215from which a conventional module socket212has been removed. The through holes215are formed using a conductive material such as copper (Cu), silver (Ag), or gold (Au). The through holes215are soldered, thereby forming contact electrodes217.

The guide230includes iron cores232whose ends are folded to form spaces, into which highly elastic rubber pieces234are inserted.

Surface mounted device (SMD) pads222a,222b,223a, and223bare formed on both the front and rear surfaces of the interface board220. Cross connection wiring224within the interface board220forms a pin swap between the SMD pads222aand222band a pin swap between the SMD pads223aand223b. A test module socket240is mounted on the SMD pads222band223bon the front surface of the interface board220, as shown inFIGS. 2 and 3. Since the test module socket240is mounted on surfaces of the SMD pads222band223b, it can be easily replaced and repaired.

The iron cores232, the SMD pads222aand223aand the SMD pads222band223b, and the test module socket240are positioned above and connected with the contact electrodes217. The length of the signal line from the contact electrodes217to the test module socket240is much shorter than a sum of the height A and the length B shown inFIG. 1. Therefore, a semiconductor memory module inserted into the test module socket240can be tested at a high speed.

FIG. 4illustrates a test board400according to a second embodiment of the present invention. The test board400includes soft iron cores415that penetrate through holes412, respectively, of a main board410and a guide430. The ends of the iron cores415that protrude above the front surface411of the main board410are fixed by solders413. The other ends of the iron cores415that protrude above the front surface431of the guide430are folded to form spaces, into which high elastic rubber pieces434are inserted. SMD pads422a,422b,423a, and423bare formed on both the rear and front surfaces of the interface board420. Cross connection wiring424is implemented within the interface board420for a pin swap between the SMD pads422aand422band for a pin swap between the SMD pads423aand423b. A test module socket440is mounted on the pads423band422bon the front surface of the interface board420.

FIG. 5illustrates a test board500according to a third embodiment of the present invention. The test board500includes pogo pins515that penetrate through holes512of the main board510and the guide530. Each pogo pin515is a barrel that houses a spring that has cone-shape opposite ends. One ends of the pogo pins515that protrudes from the front surface of the main board510may be soldered so as to be fixed to the main board510. The other ends of the pogo pins515that protrude from the front surface531of the guide530may contact SMD pads522aand523a. Cross connection wiring524within the interface board520creates a pin swap between the SMD pads522aand522band a pin swap between the SMD pads523aand523b. A test module socket540is mounted on the pads523band522bon the front surface of the interface board520. The pogo pins515prevent breakage that might occur due to the pressure created when a test module is pressed and inserted into the test module socket540. Therefore, the test board510according to the third embodiment provides reliability and mass productivity.