Transistor switch having constant on resistance with input signal with having variable voltage component

Systems, methods, and devices to control a transistor to maintain one or more substantially constant characteristics while activated or deactivated are provided. One such system includes a transistor that receives an activation signal on a gate terminal to become activated during a first period and receives a deactivation signal on the gate terminal to become deactivated during a second period. The transistor receives an input signal on an input terminal during the first period and the second period. The input signal varies during the first period and during the second period. The transistor may have improved reliability (e.g., substantially constant on resistance RON) because a first difference between the input signal and the activation signal substantially does not vary during the first period and a second difference between the input signal and the deactivation signal substantially does not vary during the second period.

BACKGROUND

This disclosure relates to a transistor switch that maintains a substantially constant on resistance when passing an input signal that includes a variable voltage component (e.g., an alternating current (AC) component).

Many integrated circuits use switches formed using transistors to allow a signal to pass through the switch to be received by other circuitry. Generally speaking, the lower the amount of signal distortion in the circuitry of an electronic device, the greater the reliability of the circuitry. On an electronic display panel, for example, thin film transistors may switch a variety of input signals to operate the display. In general, these signals include substantially only a direct current component. When the transistor switches are used to pass only direct current input signals, the transistor switches may keep a substantially constant “on resistance,” or RON, which is the resistance of the transistor switch when the transistor switch is on. By maintaining a substantially on resistance RON, the transistor switches generally may not distort these direct current input signals.

The on resistance RONof transistor switches may vary, however, when the input signals include a variable voltage component that varies over time. When the input signals include a sinusoidal or other alternating current component, the on resistance RONof the transistor switches may vary over time. The resulting output signals may be non-linear, unreliable, and/or high in noise. Moreover, transistors formed as circuit-on-glass devices made from polysilicon may exhibit even greater variability of on resistance RON. As a result, sending a signal that includes a variable voltage component through a transistor switch—particularly one formed as a circuit-on-glass device—may produce an unreliable output signal. Although increasing a size of the transistor may reduce the variability of the on resistance RON, a larger transistor takes up more integrated circuit die space. The comparatively larger size of the transistor may crowd out other possible circuitry on the integrated circuit die and/or may add to the design cost. A larger transistor may also consume more energy, lowering the potential battery life of electronic devices that would include the larger transistor. Moreover, given design constraints, making a transistor that is large enough to completely eliminate the on resistance RONvariability may be difficult or impractical.

SUMMARY

To avoid the increased distortion that can arise when input signals having variable voltage components are passed through a transistor, the disclosure describes systems and methods for controlling a transistor to maintain a more constant on resistance RON. Electronic devices such as handheld devices, tablets, computers, and electronic displays that use the systems and methods of this disclosure may have more reliable signal quality and, as a result, may themselves be more reliable and/or more power efficient. In particular, the on resistance RONof the transistor switches may be made substantially uniform, even when an input signal with a variable voltage component is applied to the transistor, by adding the same variable voltage component to the gate activation and gate deactivation signals. It is believed that the on resistance RONof a transistor depends on the voltage difference between the input (source) terminal of the transistor and the gate terminal of the transistor. By adding the variable voltage component of the input signal to the gate activation and gate deactivation signals, the variable voltage components on the input (source) terminal and the gate terminal may cancel each other out. This leaves substantially only a direct current (DC) voltage difference between the input (source) terminal and the gate terminal.

Thus, maintaining a DC voltage difference between the input (source) terminal and the gate terminal in this way keeps the on resistance RONsubstantially constant while the input (source) signal is passed through the transistor. Moreover, as mentioned above, the variable voltage component may be added to the gate deactivation signal as well. This may prevent a voltage swing in the input signal from inadvertently activating the transistor when the transistor should be controlled to be off, which could occur if the gate deactivation signal were merely a direct current voltage value.

DETAILED DESCRIPTION

A variety of devices may use transistors, such as MOSFETs, to act as switches to allow or disallow an input signal to pass through the transistor. For example, a display panel of a liquid crystal display (LCD) or an organic light emitting diode (OLED) display may have many thin film transistor (TFT) switches patterned on a glass substrate. This type of circuitry is often referred to as circuit-on-glass (COG) circuitry. Transistor switches in a display panel may switch a variety of different signals through various parts of the display panel (e.g., to display images). Numerous other types of electronic devices may also use transistor switches to route various signals.

In general, a transistor can act as a switch in the following way. A transistor includes at least three terminals: a source terminal (in general, the input terminal), a drain terminal (in general, the output terminal), and a gate terminal. Whether the transistor switch allows or disallows an input signal to pass depends on a voltage difference between (1) the input signal on the source terminal and (2) a gate activation-deactivation signal on the gate terminal. For a type of transistor known as an NMOS transistor, when the voltage difference between the gate terminal and the source terminal of the NMOS transistor is sufficiently high, the transistor switches “ON” and allows the input signal to pass through a “channel” that forms in the transistor between the source terminal and the drain terminal. When the voltage difference between the gate terminal and the source terminal of the NMOS transistor is sufficiently low, the transistor switches “OFF” and prevents the input signal from passing. The opposite configuration is true for a type of transistor known as a PMOS transistor. That is, when the voltage difference between the gate terminal and the source terminal of the PMOS transistor is sufficiently low, the transistor switches “ON” and allows the input signal to pass through a “channel” that forms in the transistor between the source terminal and the drain terminal. When the voltage difference between the gate terminal and the source terminal of the PMOS transistor is sufficiently high, the transistor switches “OFF” and prevents the input signal from passing. A transistor switch may include at least one NMOS transistor, at least one PMOS transistor, and/or at least one complementary pair of NMOS and PMOS transistors. In the latter case, a complementary pair of NMOS and PMOS transistors is referred to as a complementary-MOS (CMOS) transistor switch.

When a transistor switch is activated, the channel that forms between the source (input) terminal and drain (output) terminal may have characteristics that vary depending on the voltage difference between the gate terminal and source terminal (input). An input signal with substantially only a direct current (DC) voltage component—that is, an input signal that is generally static at least while the transistor switch is active and allowing the input signal to pass—may cause the transistor switch to maintain certain uniform characteristics while allowing the input signal to pass when a uniform gate activation-deactivation signal is applied to the gate terminal. For example, the transistor switch may have a uniform on resistance RON, which is the resistance of the channel while the transistor is in an “ON” state. When the transistor switch maintains a constant on resistance RON, the input signal may pass through the transistor switch and be output on the drain (output) terminal of the transistor switch with relatively little distortion.

Increased distortion, however, can occur with input signals that include not only a direct current (DC) component, but also a variable voltage component (e.g., an alternating current (AC) component). This disclosure will describe systems and methods to maintain a substantially uniform on resistance RONeven with an input signal that includes a variable voltage component. Specifically, the on resistance RONmay be made substantially uniform, even when an input signal with a variable voltage component is applied to the transistor, by adding the same variable voltage component to the gate activation and gate deactivation signals. In this way, only direct current (DC) voltage differences may arise between both the input signal and the gate activation signal and the input signal and the gate deactivation signal. This keeps the on resistance RONsubstantially constant while the input (source) signal is passed through the transistor. Adding the variable voltage component to the gate deactivation signal may also prevent a voltage swing in the input signal from inadvertently activating the transistor when the transistor should be controlled to be off, which could occur if the gate deactivation signal were merely a direct current voltage value.

Transistor switches that maintain a substantially uniform on resistance RON, even for an input signal with a variable voltage component, may appear in a variety of suitable electronic devices.FIG. 1, for example, is a block diagram various components of a suitable electronic device10.FIGS. 2, 3, and 4are examples of the electronic device10. These include a handheld electronic device, a tablet computing device, and a notebook computer, respectively.

Turning first toFIG. 1, the electronic device10may include, among other things, an electronic display12, input structures14, input/output (I/O) ports16, one or more processor(s)18, memory20, nonvolatile storage22, a network interface24, and a power source26. The various functional blocks shown inFIG. 1may include hardware elements (including circuitry), software elements (including computer code stored on a non-transitory computer-readable medium) or a combination of both hardware and software elements. It should be noted thatFIG. 1is merely one example of a particular implementation and is intended to illustrate the types of components that may be present in the electronic device10. Indeed, the various depicted components (e.g., the processor(s)18) may be separate components (e.g., graphics processing unit, central processing unit, etc.), components of a single contained module (e.g., a system-on-a-chip device), or may be incorporated wholly or partially within any of the other elements within the electronic device10. The components depicted inFIG. 1may be embodied wholly or in part as machine-readable instructions (e.g., software or firmware), hardware, or any combination thereof. Any of the components of the electronic device10, including the electronic display12, may include transistor switches controlled to maintain a substantially uniform on resistance RONeven while passing an input signal with a variable voltage component.

The electronic device10may represent a block diagram of the handheld device depicted inFIG. 2, the tablet computing device depicted inFIG. 3, the notebook computer depicted inFIG. 4, or similar devices, such as desktop computers, televisions, and so forth. In the electronic device10ofFIG. 1, the display12may be any suitable electronic display used to display image data (e.g., a liquid crystal display (LCD) or an organic light emitting diode (OLED) display). In some examples, the display12may represent one of the input structures14, enabling users to interact with a user interface of the electronic device10. In some embodiments, the electronic display12may be a MultiTouch™ display that can detect multiple touches at once. Other input structures14of the electronic device10may include buttons, keyboards, mice, trackpads, and the like. The I/O ports16may enable electronic device10to interface with various other electronic devices.

The processor(s)18and/or other data processing circuitry may execute instructions and/or operate on data stored in the memory20and/or nonvolatile storage22. The memory20and the nonvolatile storage22may be any suitable articles of manufacture that include tangible, non-transitory computer-readable media to store the instructions or data, such as random-access memory, read-only memory, rewritable flash memory, hard drives, and optical discs. By way of example, a computer program product containing the instructions may include an operating system (e.g., OS X® or iOS by Apple Inc.) or an application program (e.g., iBooks® by Apple Inc.).

The network interface24may include, for example, one or more interfaces for a personal area network (PAN), such as a Bluetooth network, for a local area network (LAN), such as an 802.11x Wi-Fi network, and/or for a wide area network (WAN), such as a 4G or LTE cellular network. The power source26of the electronic device10may be any suitable source of energy, such as a rechargeable lithium polymer (Li-poly) battery and/or an alternating current (AC) power converter.

As mentioned above, the electronic device10may take the form of a computer or other type of electronic device.FIG. 2depicts a front view of a handheld device10A, which represents one example of the electronic device10. The handheld device10A may represent, for example, a portable phone, a media player, a personal data organizer, a handheld game platform, or any combination of such devices. By way of example, the handheld device10A may be a model of an iPod® or iPhone® available from Apple Inc. of Cupertino, Calif.

The handheld device10A may include an enclosure28to protect interior components from physical damage and to shield them from electromagnetic interference. The enclosure28may surround the display12, which may display a graphical user interface (GUI)30having an array of icons32. By way of example, one of the icons32may launch an application program (e.g iBooks® by Apple Inc.). User input structures14, in combination with the display12, may allow a user to control the handheld device10A. For example, the input structures14may activate or deactivate the handheld device10A, navigate a user interface to a home screen, navigate a user interface to a user-configurable application screen, activate a voice-recognition feature, provide volume control, and toggle between vibrate and ring modes. Touchscreen features of the display12of the handheld device10A may provide a simplified approach to controlling the application programs. The handheld device10A may include I/O ports16that open through the enclosure28. These I/O ports16may include, for example, an audio jack and/or a Lightning® port from Apple Inc. to connect to external devices. The electronic device10may also be a tablet device10B, as illustrated inFIG. 3. For example, the tablet device10B may be a model of an iPad® available from Apple Inc.

In certain embodiments, the electronic device10may take the form of a computer, such as a model of a MacBook®, MacBook® Pro, MacBook Air®, iMac®, Mac® mini, or Mac Pro® available from Apple Inc. By way of example, the electronic device10, taking the form of a notebook computer10C, is illustrated inFIG. 4in accordance with one embodiment of the present disclosure. The depicted computer10C may include a display12, input structures14, I/O ports16, and a housing28. In one embodiment, the input structures14(e.g., a keyboard and/or touchpad) may be used to interact with the computer10C, such as to start, control, or operate a GUI or applications (e.g., iBooks® by Apple Inc.) running on the computer10C.

The transistor switches may form any suitable parts of the circuitry of the electronic device10. In general, as shown by a flowchart40ofFIG. 5, for an input signal having a variable voltage component is passed, a transistor switch may be driven in the following way. Specifically, an input signal having a direct current (DC) voltage component as well as a non-DC voltage component, such as a variable voltage (e.g., alternating current (AC)) component, may be supplied to an input (source) terminal of the transistor switch (block42). To cause the transistor switch to maintain a substantially constant on resistance RONwhen activated, a gate activation-deactivation signal supplied to the gate terminal of the transistor switch may be controlled to maintain a constant direct current (DC) voltage difference between the gate terminal of the voltage and the input signal on the source terminal. That is, the gate activation-deactivation signal may include the same non-DC voltage component as the input signal. As a result, the voltage difference between the gate terminal of the voltage and the input signal on the source terminal may remain substantially constant (e.g., Vgs=Vg−Vsmay remain constant while the transistor switch is activated or while the transistor switch is deactivated). As will be discussed below, maintaining a constant Vgsmay cause the on resistance RONof the transistor to remain substantially constant even as the input signal to the transistor varies over time.

An NMOS transistor50, represented by a circuit diagram ofFIG. 6, may represent one form of transistor switch that can maintain a substantially constant on resistance RON, even when a signal that includes a variable voltage component is passed through it, according to transistor control systems and methods of this disclosure. The NMOS transistor50ofFIG. 6includes an input terminal52, an output terminal54, and a gate terminal56. The input terminal52receives an input signal58that includes a variable voltage component. Although the input terminal52is depicted inFIG. 6to be a drain terminal, and the output terminal54is depicted to be a source terminal, it should be appreciated that the NMOS transistor50, being a MOSFET, is a symmetric device. That is, the source and the drain terminals of the NMOS transistor50are interchangeable. Which terminal plays which role depends on which terminal receives the input signal and the voltage value of the gate activation-deactivation signal being applied to the gate terminal56. In this case, the input terminal52receives the input signal58. Hence, for the purpose of this disclosure (and notwithstanding the particular illustration ofFIG. 6and similar circuitry in other drawings), the input terminal52may also be referred to as the source terminal, and the output terminal54may also be referred to as the drain terminal.

Based on the voltage values of an NMOS gate activation-deactivation signal Vgnsupplied to the gate terminal56, the NMOS transistor50may allow or disallow the input signal58to pass through the NMOS transistor50. Specifically, whether the NMOS transistor50allows or disallows the input signal58to pass depends on a voltage difference between (1) the input signal58on the input (source) terminal52and (2) the gate activation-deactivation signal Vgnon the gate terminal56. When the voltage difference between the gate terminal56and the input (source) terminal52of the NMOS transistor50is sufficiently high, the NMOS transistor50switches “ON” and allows the input signal to pass through a “channel” that forms in the NMOS transistor50between the input (source) terminal52and the output (drain) terminal54. When the voltage difference between the gate terminal56and the input (source) terminal52of the NMOS transistor50is sufficiently low, the NMOS transistor50switches “OFF” and prevents the input signal58from passing. When the NMOS transistor50is activated, the input signal58may enter the input terminal52and be output on the output terminal54as an output signal59.

As an aside, it should be appreciated that PMOS transistors operate in a complementary way to the NMOS transistor50. That is, when the voltage difference between the gate terminal and the source terminal of a PMOS transistor is sufficiently low, the transistor switches “ON” and allows the input signal to pass through a “channel” that forms in the transistor between the source terminal and the drain terminal. When the voltage difference between the gate terminal and the source terminal of the PMOS transistor is sufficiently high, the transistor switches “OFF” and prevents the input signal from passing.

Returning to the example of the NMOS transistor50ofFIG. 6, the NMOS transistor50may have on resistance RONcharacteristics that the systems and methods of this disclosure may employ to maintain a substantially constant on resistance RONwhile the NMOS transistor50is activated. These on resistance RONcharacteristics, as will be described with reference toFIGS. 7 and 8, may cause the NMOS transistor50to behave poorly when the gate activation-deactivation signal Vgnincludes substantially only direct current (DC) voltage components for activation and deactivation, respectively. In certain examples, the NMOS transistor50may be a circuit-on-glass (COG) transistor on a display panel of the electronic display12and may be based on polysilicon (poly-Si), which may generally exhibit greater on resistance RONvariability than single-crystalline silicon. The NMOS transistor50may behave relatively linearly and with relatively low distortion, however, when driven with the gate activation-deactivation signals described further below in this disclosure.

A second-order model of the NMOS transistor50may be as follows:

Id=(μn⁢COX)⁢WL⁡[(Vgs-VT)⁢Vds-12⁢Vds2],(Equation⁢⁢1)
where μnrepresents electron mobility, COXrepresents oxide capacitance, W=represents a width of the gate, L represents a length of the gate, Vds represents a drain-to-source voltage (i.e., Vd−Vs), Vgs represents a gate-to-source voltage (i.e., Vgn−Vs), Idrepresents the drain current, and VTrepresents the transistor threshold voltage.

The on resistance RON, also referred to as resistance drain-to-source, is the resistance of the channel that forms in the NMOS transistor50when the NMOS transistor is activated. From the second-order model of the NMOS transistor50of Equation 1, the on resistance RONmay be derived by taking the partial derivative of Idover Vds:

Using this model of on resistance RON,FIG. 7illustrates a plot60comparing the on resistance RONof the NMOS transistor50(ordinate62) in relation to an input (source) signal Vs(abscissa64), given a constant gate activation-deactivation signal Vgn. As represented by a curve66, the on resistance RONincreases with changes in the output input (source) signal Vs. IN accordance with Equation 2, the on resistance RONbecomes substantially infinite when the input (source) signal Vsexceeds the difference between the gate voltage Vgnand the threshold voltage VT(i.e., Vgn−VT). This is shown inFIG. 7as an asymptote68, beyond which the on resistance RONis effectively infinite, and the input (source) signal Vscannot pass through the NMOS transistor50.

FIG. 8is a plot70that shows the effect of the input (source) signal58, which has a variable voltage component (e.g., AC component). In the plot70ofFIG. 8, the on resistance RONof the NMOS transistor50(ordinate72) is compared to possible values of input (source) signal Vs(abscissa74) when the gate activation-deactivation signal Vgnis constant. Here, because the input (source) signal58is changing at least over the time when the NMOS transistor50is activated, an on resistance RONdifference (ΔRON78) as the input (source) signal58occurs around a direct current voltage component80.

In other words, when the input (source) signal58includes a variable voltage component (e.g., a square wave or sinusoidal wave component) over the period of time that the NMOS transistor50is activated, the on resistance RONof the NMOS transistor50will vary. Without further measures, this variable resistance could cause signal distortion including noise folding and harmonics, switch malfunction, poor reliability, and/or poor noise performance. In addition, although increasing a size of the transistor may reduce the variability of the on resistance Ron, this may be expensive in terms of space on the integrated circuit and/or may lead to higher power consumption. This may be especially true for chip-on-glass (COG) circuitry on a display panel of the display12, which may have highly limited space availability. A transistor in the display panel of the display12may also be formed from polysilicon, which may cause the transistor to have a greater on resistance RONvariability in general. As will be discussed further below, applying a gate activation-deactivation signal that includes the same variable voltage component as the input (source) signal58may cause the on resistance RONto remain substantially constant, which may reduce signal distortion and improve the transistor noise characteristics.

A complementary-MOS (CMOS) transistor switch90shown inFIG. 9may have characteristics related to that of the NMOS transistor50. The CMOS transistor switch90ofFIG. 9includes an NMOS transistor92and a PMOS transistor94in complementary arrangement. The NMOS transistor92has an input (source) terminal96, an output (drain) terminal98, and a gate terminal100. The PMOS transistor94likewise has an input (source) terminal102, an output (drain) terminal104, and a gate terminal106. The input (source) signal58may pass through the CMOS transistor switch90when a sufficiently high gate activation-deactivation signal Vgnis applied on the NMOS gate terminal100and may pass through the PMOS transistor94when a sufficiently low gate activation-deactivation signal Vgpis applied on the PMOS gate terminal106.

On resistance RONcharacteristics of the CMOS transistor switch90are shown inFIG. 10for the case in which the gate activation-deactivation signals Vgnand Vgpare constant. In particular, a plot110shown inFIG. 10compares the on resistance RONof the CMOS transistor switch90(ordinate112) against an input (source) signal Vs(abscissa114). In the plot110ofFIG. 10, a first curve116represents the change in on resistance RONin relation to the input (source) signal Vswhen the gate activation-deactivation signal Vgnapplied to the NMOS gate terminal100is constant. A second curve118represents the on resistance RONof the PMOS transistor94when a constant gate activation-deactivation signal Vgpis applied to the PMOS gate terminal106. Because the NMOS transistor92is coupled in parallel to the PMOS transistor94, the total on resistance RONis less than each individual resistance and is represented by a third curve120. When the input (source) signal58is applied to the CMOS transistor switch90, the on resistance RONstill varies, as shown by a change in on resistance ΔRON122around the direct current (DC) component124of the input (source) signal58. Although the ΔRON122may be lower than that of either one of NMOS transistor92and PMOS transistor94individually, the ΔRON122is non-zero, and thus may still introduce some distortion.

Variation in the on resistance RONof the NMOS transistor50or the CMOS transistor switch90may be reduced by providing gate activation-deactivation signals that include the variable voltage component of the input (source) signal58. For example, as shown inFIG. 11, the NMOS transistor50may be activated and deactivated using a gate activation-deactivation signal that includes the same sinusoidal component as the input (source) signal58. At some first time, the gate terminal56of the NMOS transistor50may be supplied with an “ON” gate activation-deactivation signal130that causes the transistor50to enter an “ON” state. At some second time, the gate terminal56of the NMOS transistor50may be supplied with an “OFF” gate activation-deactivation signal132that causes the transistor50to enter an “OFF” state. Both of these signals include the same variable voltage component as the input (source) signal58.

Indeed, as seen inFIG. 11, the “ON” gate activation-deactivation signal130includes the variable voltage component (here, a sinusoidal component) of the input (source) signal58superposed on an activation direct current (DC) voltage component134. The “OFF” gate activation-deactivation signal132includes the variable voltage component of the input (source) signal58superposed on a deactivation direct current (DC) voltage component136. The input (source) signal58may be understood to be the variable voltage component (here, the sinusoidal component) superposed on an input direct current (DC) voltage component138. Because the signals58,130, and132all include the same variable voltage component, the only differences between the input (source) signal58and the gate activation-deactivation signals130and132are direct current (DC) voltage differences. As such, the difference between the activation direct current (DC) voltage component134and the input direct current (DC) voltage component138may remain substantially constant while the “ON” gate activation-deactivation signal130is being applied. Likewise, the difference between the deactivation direct current (DC) voltage component136and the input direct current (DC) voltage component138may remain substantially constant while the “OFF” gate activation-deactivation signal132is being applied.

The constancy of the difference between the activation direct current (DC) voltage component134and the input direct current (DC) voltage component138may result in a substantially constant on resistance RON. This is represented in a plot140ofFIG. 12. In the plot140, the on resistance RON(ordinate142) is compared against the input (source) voltage Vs (abscissa144) when the “ON” gate activation-deactivation signal130is applied to the gate terminal56of the NMOS transistor50. Since the “ON” gate activation-deactivation signal130includes substantially the same variable voltage component as the input (source) signal Vs, the alternating current (AC) variations of the input (source) signal Vs cancel each other out, and thus do not cause changes over time to the on resistance RON. Thus, the on resistance RONdifference (ΔRON), as shown by a curve146, remains substantially 0 around the signal center148of the input (source) signal58.

Because the on resistance RONremains constant despite swings in the voltage of the input (source) signal58, the otherwise non-linear NMOS transistor50exhibits a highly linear behavior. Indeed, the relationship between the on resistance RONand the input (source) signal58may be substantially irrelevant. The thin film transistor layout of the NMOS transistor50may be much smaller than otherwise. Moreover, the NMOS transistor50may be designed to be optimized for substantially only one direct current (DC) voltage component bias, rather than a range of voltages. Having a smaller transistor switch size correspondingly may lower switch parasitic capacitances, such as the capacitance from gate to source (Cgs) and a parasitic capacitance from gate to drain (Cgd). This structure may also avoid additional charging capacitors that could consume additional energy. In addition, there may be relatively low distortion at the output terminal54of the NMOS transistor50because the on resistance RONremains constant even despite relatively great swings in the input (source) signal58.

Comparable techniques may be used to control the CMOS transistor switch90to maintain a substantially constant on resistance RON, as shown inFIG. 13. The NMOS transistor92of the CMOS transistor switch90may be operated in the same way as the NMOS transistor50. That is, at some first time, the gate terminal100of the NMOS transistor92may be supplied with the gate activation-deactivation signal130, which causes the transistor92to enter an “ON” state. At some second time, the gate terminal100of the NMOS transistor92may be supplied with a gate activation-deactivation signal132, which causes the transistor92to enter an “OFF” state. The PMOS transistor94of the CMOS transistor switch90may be operated in a complementary manner to the NMOS transistor92. At the first time, the gate terminal106of the PMOS transistor94may be supplied with the gate activation-deactivation signal132, which causes the transistor94to enter an “ON” state. At the second time, the gate terminal106of the PMOS transistor94may be supplied with the gate activation-deactivation signal130, which causes the transistor92to enter an “OFF” state.

InFIG. 13, as inFIG. 11, the difference between the activation direct current (DC) voltage component134and the input direct current (DC) voltage component138may remain substantially constant while the gate activation-deactivation signal130is being applied. Likewise, the difference between the deactivation direct current (DC) voltage component136and the input direct current (DC) voltage component138may remain substantially constant while the gate activation-deactivation signal132is being applied. As seen inFIG. 14, this may result in a substantially constant on resistance RON. In a plot170ofFIG. 14, the on resistance RON(ordinate172) is compared against the input (source) voltage Vs (abscissa174) when the gate activation-deactivation signals130and132are applied to the gate terminals100and106, respectively. Since the gate activation-deactivation signals130and132include substantially the same variable voltage component as the input (source) signal58, the alternating current (AC) variations of the input (source) signal Vs and the signals130and132cancel each other out, and thus do not cause changes over time to the on resistance RON. Thus, the on resistance RONdifference (ΔRON), as shown by a curve176, remains substantially 0 around the signal center178of the input (source) signal58.

Any suitable circuitry may carry out the transistor control described above with reference toFIGS. 11-14. One example of circuitry to control the NMOS transistor50appears as control circuitry180inFIG. 15. The control circuitry180may control the NMOS transistor50to maintain a substantially constant on resistance RONdespite receiving the input signal58, which includes a variable voltage component. The input signal58may be any suitable signal that exhibits non-DC behavior over at least the period of time while the input signal will be switched through the NMOS transistor50. For instance, the input signal58may be a regular signal (e.g., a sinusoid, squarewave, or a sawtooth signal, to name a few examples) or may be an irregular signal (e.g., a random or non-repeating signal).

The input signal58may be supplied to the input (source) terminal52of the NMOS transistor50, which is shown inFIG. 15as a circuit-on-glass (COG) transistor on the display12. Meanwhile, the input (source) signal58may be passed through a buffer184to other circuitry that may extract the variable voltage component of the input (source) signal58. Any suitable direct-current-blocking (DC-blocking) circuitry186and/or188, such as one or more capacitive elements, may allow only the variable voltage component of the input signal58to pass through to be added to certain various direct current voltages. In the example ofFIG. 15, alternating-current-blocking (AC-blocking) circuitry190and/or192coupled to voltage sources Vgnegative and Vgpositive may ensure that substantially only direct current (DC) components of these voltages are received. The AC-blocking circuitry190and/or192may represent, for example, resistive and/or an inductive elements. The AC-blocking circuitry190may permit only a direct current (DC) value of Vgnegative to be added to the variable voltage component of the input (source) signal58. The AC-blocking circuitry192may permit only a direct current (DC) component value of Vgpositive to be added to the variable voltage component of the input (source) signal58.

The resulting Vgnegative signal194and Vgpositive signal196may include the same variable voltage component as the input (source) signal58, and substantially correspond to the gate activation-deactivation signals132and130, respectively. The Vgnegative signal194and the Vgpositive signal196may be supplied to an activation signal switching device198(e.g., an amplifier198), which is shown inFIG. 15to be controlled by a control signal Vctrl. When the control signal Vctrlhas a first value (e.g., a logic high or logic low), the activation signal switching device198may supply the Vgpositive signal196to cause the NMOS transistor50to activate and permit the input (source) signal58to pass through the NMOS transistor50to be output as an output signal59.

In the example shown inFIG. 15, the NMOS transistor50is a circuit-on-glass (COG) transistor that may be formed from, for example, a polysilicon material. As a result, the on resistances RONcharacteristics of the NMOS transistor50may change relatively sharply with changes in the input (source) signal Vsrelative to the gate activation-deactivation signal. Since the gate activation-deactivation signal includes the variable voltage component of the input signal58, however, the difference between the gate and input (source) signal (Vgs) is maintained at a first constant DC voltage when the NMOS transistor50is switched on and at a second constant DC voltage when the NMOS transistor50is switched off.

In certain embodiments, the switching device198includes transistor components that are themselves activated with constant direct current (DC) gate activation values. As such, as discussed above with reference toFIGS. 7-10, the size of the transistors of the switching device198may be sufficiently large to produce a substantially negligible change in on resistance RONwithin the transistors that are internal to the switching device198. The switching device198may be located, however, in an area of the display12where the larger size of those component transistors may be acceptable. Additionally or alternatively, the amplifier198may be disposed in different circuitry not part of the circuit-on-glass (COG) circuitry of the electronic display12. For example, the switching device198may be located in display driver circuitry located in the electronic display12or elsewhere in the electronic device10(e.g., in processor(s)18). Additionally or alternatively, the switching device198may be formed from different materials than the transistor50located on the COG circuitry of the display12, whether the switching device198is located on the COG circuitry or not. In one particular example, the switching device198may be located apart from the COG circuitry and may be formed from a material other than polysilicon and the transistor50may be located on the COG circuitry and may be formed based on polysilicon.

An example of circuitry to control the CMOS transistor switch90appears as control circuitry280inFIG. 16. The control circuitry280may control the CMOS transistor switch90to maintain a substantially constant on resistance RONdespite receiving the input signal58, which includes a variable voltage component. As discussed above, the input signal58may be any suitable signal that exhibits non-DC behavior over at least the period of time that the input signal will be switched through the CMOS transistor switch90. For instance, the input signal58may be a regular signal (e.g., a sinusoid, squarewave, or a sawtooth signal, to name a few examples) or may be an irregular signal (e.g., a random or non-repeating signal).

The input signal58may be supplied to the input (source) terminal96of the NMOS transistor92and the input (source) terminal102of the PMOS transistor94of the CMOS transistor switch90, which is shown inFIG. 16as a circuit-on-glass (COG) complementary transistor pair. Meanwhile, the input (source) signal58may be passed through a buffer284to other circuitry that may extract the variable voltage component of the input (source) signal58. Any suitable direct-current-blocking (DC-blocking) circuitry286and/or288, such as one or more capacitive elements, may allow only the variable voltage component of the input signal58to pass through to be added to certain various direct current voltages. In the example ofFIG. 16, alternating-current-blocking (AC-blocking) circuitry290and/or292coupled to voltage sources Vgnegative and Vgpositive may ensure that substantially only direct current (DC) components of these voltages are received. The AC-blocking circuitry290and/or292may represent, for example, resistive and/or an inductive elements. The AC-blocking circuitry290may permit only a direct current (DC) component value of Vgnegative to be added to the variable voltage component of the input (source) signal58. The AC-blocking circuitry292may permit only a direct current (DC) component value of Vgpositive to be added to the variable voltage component of the input (source) signal58.

The resulting Vgnegative signal294and Vgpositive signal296may include the same variable voltage component as the input (source) signal58, and substantially correspond to the gate activation-deactivation signals132and130, respectively. The Vgnegative signal294and the Vgpositive signal296may be supplied to activation signal switching devices298and300(e.g., amplifiers), which are shown inFIG. 16to be controlled by control signals Vctrl_nmosand Vctrl_pmosrespectively. When these control signals are first values (e.g., a logic high or logic low), the activation signal switching device298may supply the Vgpositive signal296to cause the NMOS transistor92to activate and permit the input (source) signal58to pass through the NMOS transistor92to be output as an output signal59. The activation switching device300may correspondingly supply the Vgnegative signal294to cause the PMOS transistor94to activate and permit the input (source) signal58to pass through the PMOS transistor94to be output as the output signal59. With different control signals (e.g., a logic low or logic high), the activation signal switching devices298and300may supply the opposite gate activation-deactivation signals to the gate terminals100and106, causing the NMOS transistor92and the PMOS transistor94to stop passing the input (source) signal through to the output (drain) terminals98and104.

In the example shown inFIG. 16, the CMOS transistor switch90may maintain a relatively constant on resistance RONbecause the gate activation-deactivation signals include the variable voltage component of the input signal58. It should be appreciated that the switching devices298and300may take any suitable form and/or disposition, including those discussed above with reference to the switching device198.