Layouts for interlevel crack prevention in fluxgate technology manufacturing

An integrated fluxgate device includes a substrate that includes a dielectric layer. A fluxgate core is located over the dielectric layer. Lower windings are disposed in a lower metal level between the fluxgate core and the dielectric layer, and upper windings are disposed in an upper metal level above the fluxgate core. A metal structure in the upper metal level or the lower metal level overlaps an end of the fluxgate core and is conductively isolated from the upper and lower windings.

FIELD

This disclosure relates to the field of microelectronic devices. More particularly, this disclosure relates to fluxgate magnetometer sensors in microelectronic devices.

BACKGROUND

Fluxgate magnetometer sensors in microelectronic devices have thin film magnetic material in the fluxgate cores embedded in dielectric material. The fluxgate cores are typically more than a micron thick to provide a desired sensitivity for the sensor. There is commonly stress in the thin film magnetic material from the deposition process, and there is further stress from thermal cycling of the integrated fluxgate device due to thermal expansion mismatch between the fluxgate core and the surrounding dielectric material, which frequently causes mechanical failure of the sensor, such as cracking of the dielectric material surrounding the fluxgate core.

SUMMARY

An integrated fluxgate device containing a fluxgate magnetometer sensor has a fluxgate core of a thin film magnetic material. The fluxgate magnetometer sensor has a crack-resistant structure at an end of the fluxgate core. The crack-resistant structure includes at least one of a laterally rounded contour of the fluxgate core at the end having corner radii of at least 2 microns, a lower metal end structure in the lower dielectric layer extending under the end of the fluxgate core, or an upper metal end structure in the upper dielectric layer extending over the end of the fluxgate core.

DETAILED DESCRIPTION

The present disclosure is described with reference to the attached figures. The figures are not drawn to scale and they are provided merely to illustrate the disclosure. Several aspects of the disclosure are described below with reference to example applications for illustration. It should be understood that numerous specific details, relationships, and methods are set forth to provide an understanding of the disclosure. One skilled in the relevant art, however, will readily recognize that the disclosure can be practiced without one or more of the specific details or with other methods. In other instances, well-known structures or operations are not shown in detail to avoid obscuring the disclosure. The present disclosure is not limited by the illustrated ordering of acts or events, as some acts may occur in different orders and/or concurrently with other acts or events. Furthermore, not all illustrated acts or events are required to implement a methodology in accordance with the present disclosure.

An integrated fluxgate device containing a fluxgate magnetometer sensor has a fluxgate core of a thin film magnetic material. The fluxgate magnetometer sensor has a crack-resistant structure at an end of the fluxgate core. The crack-resistant structure includes at least one of a laterally rounded contour of the fluxgate core at the end having corner radii of at least 2 microns, a lower metal end structure extending under the end of the fluxgate core, or an upper metal end structure in the upper dielectric layer extending over the end of the fluxgate core. Tests performed in pursuit of the instant disclosure have shown corner radii of at least 2 microns to be effective in reducing instances of cracks in dielectric material surrounding the fluxgate core. The lower metal end structure and the upper metal end structure may include winding segments of windings around the fluxgate core. The lower metal end structure and the upper metal end structure may be electrically coupled to the windings. Alternatively, the lower metal end structure and the upper metal end structure may be electrically isolated from the windings.

For the purposes of this disclosure, the terms “lateral” and “laterally” are understood to refer to a direction parallel to a plane of a top surface of the integrated fluxgate device, and the terms “vertical” and “vertically” are understood to refer to a direction perpendicular to the plane of the top surface of the integrated fluxgate device.

FIG.1is an exploded view of an example integrated fluxgate device containing a fluxgate magnetometer sensor. The integrated fluxgate device100is formed on a substrate102. The substrate102may include a semiconductor material such as silicon. A top surface104of the substrate102includes dielectric material such as silicon dioxide or silicon nitride. The dielectric material may be, for example, an inter-level dielectric (ILD) of an interconnect region of the integrated fluxgate device100. Interconnects such as vias may be exposed at the top surface104. The integrated fluxgate device100may include electronic circuits with active components such as transistors which are part of the fluxgate magnetometer sensor106, referred to herein as the fluxgate sensor106.

The fluxgate sensor106includes a fluxgate core108of thin film magnetic material. The fluxgate core108may be, for example, 1 micron to 3 microns thick. A width110of the fluxgate core108may be, for example, 10 microns to 500 microns. Increasing the thickness and the width110of the fluxgate core108may desirably improve the sensitivity of the fluxgate sensor106, but may undesirably increase a size and cost of the integrated fluxgate device100. The thickness and the width110may be selected to provide a desired balance between sensitivity and cost.

The fluxgate sensor106includes lower winding segments112of windings114around the fluxgate core108. The lower winding segments112include metal, and may be part of an interconnect level of the integrated fluxgate device100. The lower winding segments112are disposed under the fluxgate core108. The fluxgate sensor106further includes upper winding segments116of the windings114. The upper winding segments116also include metal, and may be part of another interconnect level of the integrated fluxgate device100. The upper winding segments116are disposed over the fluxgate core108. The upper winding segments116may be electrically coupled to the lower winding segments112through vias118of the windings114. The vias118include metal and may be part of a via level of the integrated fluxgate device100. The windings114, including the lower winding segments112, the upper winding segments116and the vias118, are electrically isolated from the fluxgate core108by layers of dielectric material, not shown inFIG.1in order to more clearly depict the spatial relationship between the fluxgate core108, the lower winding segments112, the upper winding segments116and the vias118.

The fluxgate sensor106has a crack-resistant structure120at an end122of the fluxgate core108. In the instant example, the crack-resistant structure120includes a laterally rounded contour124of the fluxgate core108having corner radii126of at least 2 microns. In the instant example, the corner radii126are approximately equal to half the width110of the fluxgate core108at the end122, so that the fluxgate core108has a semicircular shape at the end122. In the instant example, the crack-resistant structure120includes a lower metal end structure128which extends under the end122of the fluxgate core108. In the instant example, the lower metal end structure128includes at least one of the lower winding segments112which extend under the end122of the fluxgate core108. In the instant example, the crack-resistant structure120includes an upper metal end structure130which extends over the end122of the fluxgate core108. In the instant example, the upper metal end structure130includes at least one of the upper winding segments116which extend over the end122of the fluxgate core108. Forming the lower metal end structure128and the upper metal end structure130of the crack-resistant structure120of the lower winding segments112and the upper winding segments116, respectively, may advantageously improve a sensitivity of the fluxgate sensor106. Forming the fluxgate core108with corner radii126approximately equal to half the width110of the fluxgate core108may advantageously provide increased crack resistance compared to smaller corner radii.

Each end122of the fluxgate core108may have a version of the crack resistant structure120. The crack-resistant structure120at a first end122may be different from the crack-resistant structure120at a second end122. The fluxgate sensor106may contain more than one fluxgate core108. For example, the fluxgate sensor106may be a differential sensor with two fluxgate cores108. Each end122of each fluxgate core108may have a version of the crack resistant structure120. Further, the integrated fluxgate device100may include more than one fluxgate sensor106, for example to measure magnetic field components along perpendicular axes. The crack-resistant structure120may be formed at each end122of each fluxgate core108in the integrated fluxgate device100.

FIG.2AthroughFIG.2Gdepict an example method of forming the structure ofFIG.1. Referring toFIG.2A, the substrate102of the integrated fluxgate device100may be, for example, part of a semiconductor wafer such as a silicon wafer, or may be part of a dielectric substrate such as ceramic or sapphire, containing additional integrated fluxgate devices. In the instant example, a first intra-metal dielectric (IMD) layer132is formed over the top surface104of the substrate102. The first IMD layer132may be, for example, 2 microns to 4 microns thick, and may include a main layer of silicon dioxide, and optionally an etch stop layer of silicon nitride, silicon carbide nitride or silicon carbide, and optionally a cap layer of silicon nitride or silicon carbide nitride. Silicon dioxide in the first IMD layer132may be formed by a plasma enhanced chemical vapor deposition (PECVD) process using tetraethyl orthosilicate (TEOS). Silicon nitride in the first IMD layer132may be formed by a PECVD process using bis(tertiary-butyl-amino) silane (BTBAS).

Trenches for the lower winding segments112are formed through the first IMD layer132using reactive ion etch (RIE) processes, for a damascene process of forming the lower winding segments112. The trenches may expose tops of vias at the top surface104of the substrate102. A metal liner of tantalum and/or tantalum nitride is formed over the first IMD layer132, extending into the trenches to provide a barrier for the lower winding segments112. A seed layer of copper is formed on the metal liner by a sputter process, and additional copper is formed on the seed layer by electroplating, filling the trenches with copper. Excess copper and the metal liner are removed from over a top surface of the first IMD layer132by a copper chemical mechanical polish (CMP) process, leaving the copper and metal liner in the trenches to form the lower winding segments112. The lower winding segments112extend past the area for the fluxgate core108ofFIG.1, outlined inFIG.2Aby a dashed border. Instances of the lower winding segments112extending under an end of the fluxgate core108are part of the lower metal end structure128of the crack-resistant structure120. Forming the lower metal end structure128concurrently with the lower winding segments112may advantageously reduce a fabrication cost of the integrated fluxgate device100.

Referring toFIG.2B, a lower ILD layer134is formed over the first IMD layer132and over the lower winding segments112ofFIG.2A. The lower ILD layer134may be, for example, 0.5 microns to 1 micron thick, and may include a main layer of silicon dioxide and optionally an etch stop layer. The lower ILD layer134includes a cap layer of silicon nitride to provide a lower barrier for the fluxgate core108ofFIG.1. The lower ILD layer134may be formed by PECVD processes, as described in reference toFIG.2A.

A layer of magnetic material136for the fluxgate core108ofFIG.1is formed over the lower ILD layer134. The layer of magnetic material136may include a stack of alternating sub-layers of iron nickel and aluminum nitride. The layer of magnetic material136may be, for example, 1 micron to 2 microns thick, to provide a desired sensitivity for the fluxgate sensor106.

An etch mask138is formed over the layer of magnetic material136to cover the area for the fluxgate core108. The etch mask138may include photoresist formed by a photolithographic process, and may optionally include a layer of anti-reflection material such as a bottom anti-reflection coat (BARC). The etch mask138has rounded corners with radii greater than 2 microns.

Referring toFIG.2C, an etch process removes the magnetic material from the layer of magnetic material136ofFIG.2Bin the area exposed by the etch mask138. The magnetic material remaining under the etch mask138forms the fluxgate core108. The etch process may be, for example, a wet etch process which is selective to the cap layer of silicon nitride at a top of the lower ILD layer134.

Referring toFIG.2D, the etch mask138ofFIG.2Cis removed, leaving the fluxgate core108in place over the lower ILD layer134. The etch mask138may be removed, for example, using an ash process.

Referring toFIG.2E, an upper ILD layer140is formed over the lower ILD layer134and over the fluxgate core108. The upper ILD layer140includes a layer of silicon nitride to provide an upper barrier over the fluxgate core108. The upper ILD layer140further includes a main layer of silicon dioxide over the layer of silicon nitride, 2 microns to 4 microns thick. The main layer of silicon dioxide is planarized, for example by an oxide CMP process, to provide a suitable surface for subsequently forming the upper winding segments116ofFIG.1by a damascene process. The upper ILD layer140includes a cap layer of silicon nitride over the main layer of silicon dioxide. The upper ILD layer140may be formed by PECVD processes, as described in reference toFIG.2A.

Referring toFIG.2F, the vias118are formed through the upper ILD layer140and through the lower ILD layer134to make electrical connections to the lower winding segments112ofFIG.2A. The vias118may be formed by a copper damascene process as described in reference toFIG.2A. Alternatively, the vias118may be formed by a tungsten damascene process, with a metal liner of titanium and titanium nitride, and fill layer of tungsten formed by a metal organic chemical vapor deposition (MOCVD) process using tungsten hexafluoride reduced by silane and hydrogen.

Referring toFIG.2G, a second IMD layer142is formed over the upper ILD layer140. The second IMD layer142may have a similar thickness, structure and composition to the first IMD layer132, and may be formed by similar processes, as described in reference toFIG.2A. Trenches for the upper winding segments116are formed through the second IMD layer142using RIE processes. The trenches for the upper winding segments116expose tops of the vias118ofFIG.2F. The upper winding segments116are formed in the trenches by a copper damascene process, as described in reference toFIG.2A. The upper winding segments116extend past the area for the fluxgate core108ofFIG.1, outlined inFIG.2Gby a dashed border. Instances of the upper winding segments116extending over an end of the fluxgate core108are part of the upper metal end structure130of the crack-resistant structure120. Forming the upper metal end structure130concurrently with the upper winding segments116may advantageously reduce the fabrication cost of the integrated fluxgate device100. Forming the lower metal end structure128ofFIG.1and the upper metal end structure130of copper may advantageously improve the crack resistance of the crack-resistant structure120, due to the high shear stress limit of copper compared to other commonly used interconnect metals.

Additional steps may be performed to complete fabrication of the integrated fluxgate device100. For example, a protective overcoat may be formed over the fluxgate sensor106. Bond pads may be formed in the protective overcoat to provide electrical connections to components in the integrated fluxgate device100.

FIG.3is an exploded view of another example integrated fluxgate device containing a fluxgate magnetometer sensor. The integrated fluxgate device300is formed on a substrate302. The substrate302may include a semiconductor material such as silicon. A top surface304of the substrate302includes dielectric material, possibly a top layer of an ILD layer of the integrated fluxgate device300. Vias may be exposed at the top surface304. The integrated fluxgate device300may include electronic circuits which are part of the fluxgate magnetometer sensor306, referred to herein as the fluxgate sensor306.

The fluxgate sensor306includes a fluxgate core308of thin film magnetic material. The fluxgate core308may have a thickness of 1 micron to 3 microns thick, and a width310of 10 microns to 500 microns. The thickness and the width310may be selected to provide a desired balance between sensitivity and cost, as described in reference toFIG.1. The fluxgate sensor306includes lower winding segments312of windings314around the fluxgate core308. The lower winding segments312include metal. The lower winding segments312are disposed under the fluxgate core308. In the instant example, the lower winding segments312do not extend to an end322of the fluxgate core308. The fluxgate sensor306further includes upper winding segments316of the windings314. The upper winding segments316also include metal. The upper winding segments316are disposed over the fluxgate core308. In the instant example, the upper winding segments316do not extend to the end322of the fluxgate core308. The upper winding segments316may be electrically coupled to the lower winding segments312through vias318of the windings314. The vias318include metal. The windings314, including the lower winding segments312, the upper winding segments316and the vias318, are electrically isolated from the fluxgate core308by layers of dielectric material, not shown inFIG.3in order to more clearly depict the spatial relationship between the fluxgate core308and the windings314.

The fluxgate sensor306has a crack-resistant structure320at an end322of the fluxgate core308. In the instant example, the crack-resistant structure320includes a laterally rounded contour324of the fluxgate core308having corner radii326of at least 2 microns. In the instant example, the corner radii326are less than half the width310of the fluxgate core308at the end322, which may advantageously reduce an area of the fluxgate core308, hence reducing an area of the integrated fluxgate device300and so possibly further reducing a fabrication cost of the integrated fluxgate device300.

In the instant example, the crack-resistant structure320includes a lower metal end structure328which extends under the end322of the fluxgate core308. In the instant example, the lower metal end structure328is separate from the lower winding segments312. The lower metal end structure328may be a single metal element, possibly with slots, as depicted inFIG.3. The metal in the lower metal end structure328occupies at least 50 percent of an area directly under the end322of the fluxgate core308, starting at the lower winding segments312, to provide effective crack resistance. The lower metal end structure328may be in an interconnect level containing the lower winding segments312, possibly reducing the fabrication cost.

In the instant example, the crack-resistant structure320includes an upper metal end structure330which extends over the end322of the fluxgate core308. In the instant example, the upper metal end structure330is separate from the upper winding segments316. The upper metal end structure330may be a single metal element, possibly with slots, as depicted inFIG.3. The metal in the upper metal end structure330occupies at least50percent of an area directly over the end322of the fluxgate core308, starting at the upper winding segments316, to provide further effective crack resistance. The upper metal end structure330may be in another interconnect level containing the upper winding segments316, possibly further reducing the fabrication cost.

FIG.4AthroughFIG.4Gdepict an example method of forming the structure ofFIG.3. Referring toFIG.4A, the substrate302of the integrated fluxgate device300may be, for example, part of a semiconductor wafer such as a silicon wafer, or may be part of a dielectric substrate such as ceramic or sapphire, containing additional integrated fluxgate devices. In the instant example, the lower winding segments312and the lower metal end structure328are formed over the top surface304of the substrate302by an etched aluminum process. An example etched aluminum process of forming the lower winding segments312and the lower metal end structure328starts with forming a layer of interconnect metal over the top surface304. The layer of interconnect metal may include, for example, an adhesion layer of titanium nitride, a layer of aluminum with a few percent copper, silicon and/or titanium, 1 micron to 3 microns thick, and an anti-reflection layer of titanium nitride. An etch mask of photoresist is formed over the layer of interconnect metal which covers areas for the lower winding segments312and the lower metal end structure328. An RIE process using chlorine radicals is used to remove the layer of interconnect where exposed by the etch mask. The etch mask is subsequently removed, for example by an ash process, leaving the lower winding segments312and the lower metal end structure328over the top surface304of the substrate302.

Referring toFIG.4B, a first IMD layer332is formed over the lower winding segments312and the lower metal end structure328, and over exposed areas of the top surface304of the substrate302. The first IMD layer332may include, for example, a conformal layer of silicon nitride to provide a diffusion barrier on the aluminum layer in the lower winding segments312and the lower metal end structure328, and a layer of silicon dioxide on the layer of silicon nitride. The layer of silicon dioxide may be thicker than the lower winding segments312and the lower metal end structure328, and subsequently planarized by an oxide CMP process. Silicon nitride and silicon dioxide in the first IMD layer332may be formed by PECVD processes.

Referring toFIG.4C, a lower ILD layer334is formed over the first IMD layer332ofFIG.4B. The lower ILD layer334may be formed as described in reference toFIG.2B. A layer of magnetic material336for the fluxgate core308ofFIG.3is formed over the lower ILD layer334. The layer of magnetic material336may have a similar structure and composition to the layer of magnetic material described in reference toFIG.2B. An etch mask338is formed over the layer of magnetic material336to cover the area for the fluxgate core308.

Referring toFIG.4D, an etch process removes the magnetic material from the layer of magnetic material336ofFIG.4Cin the area exposed by the etch mask338to form the fluxgate core308. The etch process may be a wet etch process. The etch mask338is subsequently removed.

Referring toFIG.4E, an upper ILD layer340is formed over the lower ILD layer334and over the fluxgate core308. The upper ILD layer340includes a layer of silicon nitride and a main layer of silicon dioxide over the layer of silicon nitride, as described in reference toFIG.2E. The main layer of silicon dioxide is planarized. The upper ILD layer340may include a cap layer of silicon nitride over the main layer of silicon dioxide. The upper ILD layer340may be formed by PECVD processes.

Referring toFIG.4F, the vias318are formed through the upper ILD layer340and through the lower ILD layer334to make electrical connections to the lower winding segments312ofFIG.4A. The vias318may be formed by a tungsten damascene process, with a metal liner of titanium and titanium nitride, and fill layer of tungsten formed by an MOCVD process using tungsten hexafluoride reduced by silane and hydrogen. A tungsten etchback process or a tungsten CMP process removes the metal liner and tungsten from over a top surface of the upper ILD layer340, leaving the vias318.

Referring toFIG.4G, the upper winding segments316and the upper metal end structure330are formed over the upper ILD layer340. The upper winding segments316make electrical connections to the vias318ofFIG.4F. The upper winding segments316and the upper metal end structure330may be formed by a similar process used for the lower winding segments312and the lower metal end structure328ofFIG.3, as described in reference toFIG.4A. A second IMD layer, not shown, may be formed over the upper winding segments316and the upper metal end structure330. A protective overcoat and bond pads may be subsequently formed to complete fabrication of the integrated fluxgate device300.

The structure ofFIG.1may be formed using the method ofFIG.4AthroughFIG.4G. The structure ofFIG.3may be formed by the method ofFIG.2AthroughFIG.2G. Alternatively, the structure ofFIG.1and/or the structure ofFIG.3may be formed using a masked plating process, in which a seed layer of metal is formed on an existing top surface of the integrated fluxgate device. A plating mask is formed which exposes areas for the lower winding segments and the lower metal end structure; the plating mask may include photoresist formed by a photolithographic process. The lower winding segments and the lower metal end structure are formed by electroplating metal such as copper on the seed layer in the areas exposed by the plating mask. The plating mask is subsequently removed, and the seed layer is removed where exposed by the lower winding segments and the lower metal end structure. The upper winding segments and the upper metal end structure may be formed by a similar process. The crack-resistant structures described herein may also be formed at other high stress locations around the fluxgate cores, in addition to the ends of the fluxgate cores.

While various embodiments of the present disclosure have been described above, it should be understood that they have been presented by way of example only and not limitation. Numerous changes to the disclosed embodiments can be made in accordance with the disclosure herein without departing from the spirit or scope of the invention. Thus, the breadth and scope of the present disclosure should not be limited by any of the above described embodiments. Rather, the scope of the disclosure should be defined in accordance with the following claims and their equivalents.