EUV pellicle frame with holes and method of forming

A method of forming an improved EUV mask and pellicle with airflow between the area enclosed by the mask and pellicle and the area outside the mask and pellicle and the resulting device are disclosed. Embodiments include forming a frame around a patterned area on an EUV mask; forming a membrane over the frame; and forming holes in the frame.

TECHNICAL FIELD

The present disclosure relates to extreme ultraviolet (EUV) masks. In particular, the present disclosure relates to the mounting of pellicles on EUV masks, particularly for the 7 nanometer (nm) technology node and beyond.

BACKGROUND

Two major issues for EUV lithography (EUVL) manufacture are low source power and defective pellicles. A pellicle is employed in deep ultraviolet lithography (DUVL) to block particles from the mask pattern surface. The pellicle is placed several millimeters (mm) from the pattern plane, such that particles on the pellicle are out of focus, and, therefore, cannot be imaged. An EUV pellicle must have EUV transmission of at least 90% for a single pass and 81% for a double pass, and must have an open area of at least 110 by 142 mm2. However, since most materials absorb EUV wavelengths, building an effective pellicle for an EUV mask is difficult. One attempt to build a pellicle involved etching a membrane onto a wafer. However, the resulting pellicle, a film having a diameter of 80 mm and a film thickness of 25 nm, only achieved 86% single pass transmission. Further, the membrane was very fragile, which increases cost.

Even if a pellicle were formed with the proper specifications, mounting the pellicle onto an EUV mask also poses problems. For example, as illustrated inFIG. 1, a membrane101and silicon frame103are etched on a wafer (not shown for illustrative convenience) and then transferred to EUV mask105having a pattern area107, such that the mask, membrane (the pellicle), and frame form a closed or semi-closed area. The membrane is thin, having a thickness109of tens of nanometers (nm), and has an area of 110 by 142 mm, and the silicon frame has a height111of at least several mm. If the air flow between the inside of the closed area and outside the closed area is not smooth and the air pressure difference on the two sides of the membrane is large, the thin membrane may be damaged. The mask is stored in normal air pressure, but when it is mounted into the EUV scanner, it must be vacuumed. Further, when the mask is shipped by air, there will also be air pressure changes.

A need therefore exists for methodology enabling fabrication of an EUV mask having a pellicle mounted thereto with sufficient air flow between the space enclosed between the mask and the pellicle and the space outside the mask and pellicle and for the resulting mask. Another need is to directly fabricate pellicle onto the EUV mask so the pellicle is not damaged during mounting on the EUV mask.

SUMMARY

An aspect of the present disclosure is a method of forming holes in a frame mounting a pellicle to an EUV mask.

Another aspect of the present disclosure is an EUV mask with a pellicle mounted thereto via a frame having holes therethrough.

According to the present disclosure, some technical effects may be achieved in part by a method including: forming a frame around a patterned area on an extreme ultraviolet (EUV) mask; forming a membrane over the frame; and forming holes in the frame.

Aspects of the present disclosure include forming the holes to a width of 1 to 10,000 micrometers (μm). Further aspects include forming holes in the membrane. Another aspect includes forming the holes in the frame and in the membrane by a litho-etch-litho-etch (LELE) process. Additional aspects include forming the frame, membrane, and holes by: forming a silicon nitride (SiN) layer on opposite surfaces of a silicon (Si) substrate; etching the SiN layer on the second surface, forming a pattern; etching the Si substrate through the pattern, forming an opening in the Si through to the SiN layer on the first surface and forming holes partially through the Si, wherein Si remaining after etching forms the frame, and a portion of the SiN layer on the first surface over the opening forms the membrane. Other aspects include the opening and the holes being tapered. Further aspects include forming a sacrificial layer over the EUV mask including over the patterned area; forming holes in the sacrificial layer, down to the EUV mask, between the frame and the patterned area; and forming pillars in the holes, prior to providing the membrane over the frame. Other aspects include forming a hole in the membrane down to the sacrificial layer, between the frame and the patterned area; and removing the sacrificial layer. Another aspect includes removing the sacrificial layer by ion etching. Additional aspects include forming the sacrificial layer of a material having an etch selectivity different from the pillars, the frame, and the membrane, such as of carbon (C), silicon dioxide (SiO2), SiN, or an organic material.

Another aspect of the present disclosure is a device including: a frame around a patterned area on an extreme ultraviolet (EUV) mask; a membrane over the frame; and holes in the frame.

Aspects include the holes having a width of 1 to 10,000 μm. Further aspects include holes in the membrane. Other aspects include: the frame including Si; and the membrane including a SiN layer. Additional aspects include the holes being tapered, and a tapered opening in the silicon over the patterned area. Another aspect includes pillars between the frame and the patterned area. Further aspects include the number of pillars ranging from 3 to 1000. Other aspects include the membrane including a layer of Si or SiN between two layers of ruthenium (Ru).

Another aspect of the present disclosure is a method including: forming a frame around a patterned area on an EUV mask; forming a sacrificial layer of C, SiO2, SiN, or an organic material over the EUV mask including over the patterned area; forming holes in the sacrificial layer, down to the EUV mask, between the frame and the patterned area; forming pillars in the holes; forming a pellicle over the frame, the pellicle comprising a Si or SiN layer between two Ru layers; forming a hole in the pellicle down to the sacrificial layer between the frame and the patterned area; and removing the sacrificial layer by ion etching through the hole; and forming additional holes in the pellicle and in the frame.

DETAILED DESCRIPTION

The present disclosure addresses and solves the current problem of insufficient air flow between the space enclosed between an EUV mask and a pellicle and the space outside the mask and pellicle attendant upon mounting a pellicle to an EUV mask via a solid frame. In accordance with embodiments of the present disclosure, holes are formed in the pellicle frame and in the pellicle. In addition, pillars may be formed for supporting the pellicle.

Methodology in accordance with embodiments of the present disclosure includes forming a frame around a patterned area on an EUV mask; forming a membrane over the frame; and forming holes in the frame.

Adverting toFIG. 2, an EUV mask with a pellicle and holes in the silicon frame is illustrated, in accordance with an exemplary embodiment. As illustrated, a membrane201is mounted to an EUV mask203with a silicon frame205. Holes207are etched into the silicon frame205. The size of the holes may range from 1 μm to 10 mm. Although the holes inFIG. 2are shown as rectangular, the shape of the holes may be rectangular, triangular, square, or another shape. The number of holes on the frame is limited only in that the frame support must remain intact. Holes may additionally be formed in the membrane to aid airflow. The holes may be formed by a lithography-etch-lithography-etch (LELE) process, such as by etching holes in the frame with a first etch and etching holes in the membrane with the second etch.

A one-time etching method for forming holes in the frame is illustrated inFIGS. 3A through 3E. Adverting toFIG. 3A, SiN layers301and303are formed on opposite sides of a silicon substrate, or wafer,305. A pattern is then etched in SiN layer303, as illustrated inFIG. 3B. Next, the silicon substrate is etched using an anisotropic etch through the pattern in SiN layer303, as illustrated inFIG. 3C. Holes307are thus formed partially through the silicon substrate, as well as diaphragm309, which forms an opening in the silicon corresponding to the pellicle. As shown, the holes and the diaphragm are tapered.FIG. 3Dillustrates the layout of silicon wafer305after etching the silicon inFIG. 3C, andFIG. 3Eillustrates a top view of the result of the anisotropic etch ofFIG. 3C. Specifically,FIG. 3Eshows a silicon frame305(with etched SiN layer303under the Si frame), holes307through the silicon frame, and a SiN pellicle311formed from SiN layer301over diaphragm309.

Adverting toFIGS. 4A through 4G, a method for forming an EUV mask with a pellicle etched directly on the EUV mask and holes in the silicon frame and pellicle is illustrated, in accordance with another exemplary embodiment. As illustrated inFIG. 4A, a conventional EUV mask401, formed of at least one pair of a multilayer403and a Ru layer405, is provided with a pattern407of tantalum nitride (TaN). Although shown as with a single pair of layers403and405, a typical EUV mask may include 40 pairs of multilayer403and Ru layer405. The EUV mask401includes an empty area409, a pattern area411, and another empty area413. The pattern area411may, for example, be 5 mm to 33 mm, and the pellicle may be 6 mm to 40 mm.

As illustrated inFIG. 4B, a sacrificial layer415of C is deposited over the pattern407and EUV mask401. The sacrificial layer415may be formed to a thickness of 0.1 to 50 mm. Alternatively, the sacrificial layer415may be formed of SiO2, SiN, or an organic material.

Holes are etched in the sacrificial layer415in empty areas409and413, and pillars417are deposited in the holes, as illustrated inFIG. 4C. The holes may be etched by an LE process. The pillars may be formed of Si, copper (Cu), or ceramic, or any material that has a different etch selectivity than the sacrificial layer415. The diameter of the pillars may range from tens of μm to mm, depending on the area of empty space409and413, and the number of pillars may range from 3 to 1000, or the size of the pillar may range from 1 to 10% of that of the empty area.

Adverting toFIG. 4D, a pellicle419is deposited over sacrificial layer415. Pellicle419is formed of a Si layer421, with Ru layers423and425on opposite sides thereof for protecting the Si layer. The Si layer421may be formed to a thickness of 10 to 60 nm, and Ru layers423and425may each be formed to a thickness of 1 to 5 nm, for example 2.5 nm. The main layer of the pellicle, layer421is formed of Si because of its transparency at EUV wavelengths. SiN can also be used in layer421.

A hole427is then etched through pellicle419, down to sacrificial layer415, in the empty area409or413, as illustrated inFIG. 4E. The hole may be etched depositing a resist (not shown for illustrative convenience) over pellicle419, patterning a hole in the resist, and lithographically etching the hole in the pellicle through the hole in the resist. As illustrated inFIG. 4F, next the sacrificial layer415is removed, for example by ion etching through hole427.

FIG. 4Gshows a top view of the EUV mask. As illustrated, the mask includes pattern areas411and empty area, or dummy fill area,409surrounded by a Si wall429formed in margin area431(at the outside of the mask, and outside the pellicle). Several pillars417(for example 3 to 1000) are formed in the empty area409to support the pellicle, and holes427are formed both in empty area409and in margin area431. The number of holes may range from 3 to 1000. If there is not enough empty area in the center of the mask, then the pillars417and holes427in the empty area may be eliminated, leaving Si wall429and holes427in the margin area.

Since the number of holes is small, and since the diameter of the holes is on a sub mm scale, the chance of particles entering the enclosed space through the holes and landing on the EUV mask is limited. Nonetheless, since the holes are formed in an empty area outside a pattern area, a rugged grating or static random access memory (SRAM) pattern may be employed under the holes (not shown for illustrative convenience) to attract any particles that do manage to enter the enclosed space.

The embodiments of the present disclosure can achieve several technical effects, such as improved airflow between a space enclosed by an EUV mask, a frame, and a pellicle and the space outside the mask and pellicle, thereby protecting the pellicle from varying pressures. The present disclosure enjoys industrial applicability in any of various types of semiconductor devices, particularly for EUV technologies below 7 nm.