Systems and methods for calibrating a temperature detection module

A determination is made if a temperature of a system has exceeded a hot threshold or a cold threshold. At room temperature, a first adjustment is determined for first nominal settings. The first nominal settings are for a first input to a first comparator. At room temperature, a second adjustment is determined for second nominal settings. The second nominal settings are for a first input to a second comparator. The temperature is monitored, during normal operation of the system, using a temperature dependent voltage with the first comparator adjusted with the first adjustment and second comparator adjusted with the second adjustment.

BACKGROUND OF THE DISCLOSURE

Field of the Disclosure

The present disclosure relates in general to semiconductor devices, and more specifically to systems and methods for calibrating a temperature detection module.

Description of the Related Art

Complementary Metal Oxide Semiconductor (CMOS) temperature sensor/detection circuits are incorporated on microprocessor chips for a number of reasons including detecting attempts to breach security features on the chips. For example, some attempts to breach security features and gain access to security keys include operating the chips in extreme hot or cold temperatures to cause system malfunctions and gain access to secure data. Accordingly, a temperature detection module on a chip is typically calibrated to remove system inaccuracies due to offsets and process variation. The calibration process typically requires operating the detection circuit at a high temperature and a low temperature, which requires additional test time and cost in producing the chip. Accordingly, it is desirable to provide a chip capable of detecting temperature extremes accurately without the added costs and time delay associated with operating the chip at high and low temperatures.

DETAILED DESCRIPTION

Embodiments of systems and method disclosed herein provide a processing device with a built-in temperature detection module to help prevent tampering with security features on the device. The temperature detection module is capable of being calibrated for high and low temperature accuracy while remaining at room temperature. The calibration procedure removes inaccuracies due to offsets and process variation that can arise when the device is manufactured, and eliminates the need to insert the device in a test chamber to calibrate the device at two different temperatures. Room temperature calibration is achieved by generating a number of room temperature reference voltages derived from a stable reference such as a bandgap voltage. Some of the room temperature reference voltages correspond to temperatures slightly higher than room temperature while some of the other room temperature reference voltages correspond to temperatures slightly lower than room temperature. The room temperature reference voltages are then used to find a trip point of a first comparator used to detect high temperature and a trip point of a second comparator used to detect low temperature. High and low temperature voltages for calibrating the comparators can then be determined using the corresponding trip point room temperature voltage(s) and the characteristic slope of a reference voltage that is proportional or inversely proportional to temperature.

FIG. 1is a block diagram of a processing device or system100including a processor module102, a memory module104, a temperature detection module106, and peripheral interfaces108coupled to communicate bi-directionally with one another using system bus110. Examples of processing device100may include, for instance, a System-On-Chip (SoC), an Application Specific Integrated Circuit (ASIC), a Digital Signal Processor (DSP), a Field-Programmable Gate Array (FPGA), a processor, a microprocessor, a controller, a microcontroller (MCU), a Graphics Processing Unit (GPU), or the like. Memory module104can be implemented, for example, as a Random Access Memory (RAM), a Static RAM (SRAM), a Magnetoresistive RAM (MRAM), a Nonvolatile RAM (NVRAM, such as “FLASH” memory, etc.), and/or a Dynamic RAM (DRAM) such as Synchronous DRAM (SDRAM), a Double Data Rate RAM, an Erasable Programmable ROM (EPROM), an Electrically Erasable Programmable ROM (EEPROM), etc. Additionally or alternatively, device100may include one or more mixed-signal or analog circuits, such as, for example, Analog-to-Digital Converter (ADCs), Digital-to-Analog Converter (DACs), Phased Locked Loop (PLLs), oscillators, filters, amplifiers, etc. Additionally or alternatively, device100may include one or more Micro-ElectroMechanical Systems (MEMS), Nano-ElectroMechanical Systems (NEMS), or the like. Peripheral interfaces108can be included to allow device100to communicate with external devices via standard interfaces such as USB, PCIe, DDR, SATA, HDMI, Ethernet and MIPI, for example.

FIG. 2is a more detailed block diagram of a temperature detection module106that can be used in the device100ofFIG. 1, according to one embodiment, that includes a voltage divider202, multiplexers (also referred to as coupling circuits)204,206,208, switches210,212, comparators214,216, and logic gate218. Voltage divider202receives a reference voltage VREF at a specified voltage level, and provides a set of cold temperature reference voltages VREF_COLD(0:N), a set of room temperature reference voltages VREF_ROOM(0:N), and a set of hot temperature reference voltages VREF_HOT(0:N). The value for N can be any suitable number for calibrating over the expected range of temperatures. For example, N can be 16, 32, 64, or another suitable number.

Multiplexer204is coupled to receive the VREF_COLD voltages and to output a selected one of the VREF_COLD voltages to a first input of comparator214based on the setting of switch210. Multiplexer206is coupled to receive the VREF_ROOM voltages and to output a selected one of the VREF_ROOM voltages to be coupled to a first input of comparator214or216based on the setting of switches210,212. Multiplexer208is coupled to receive the VREF_HOT voltages and to output a selected one of the VREF_HOT voltages to a first input of comparator214based on the setting of switch212. A second input to comparators214,216is a reference voltage that is inversely proportional to absolute temperature (VIPTAT).

During calibration, multiplexers204,208can be tri-stated. Test logic in processor102or other controller determines trip points of comparators214,216using two or more different values of VREF_ROOM. Testing both hot and cold branches of temperature detection module106removes errors due to variation in reference voltage VREF, comparators214,216, and in VIPTAT.

During test when calibrating the temperature detection module106, first and second switches210,212are set to allow the output of multiplexer206(i.e., a selected one of the VREF_ROOM voltages) to be provided to the non-inverting input to comparator214and to the inverting input of comparator216. A selection device (not shown can be used to select the output of comparator214or216, depending on whether the cold or hot branch of temperature detection module106is being calibrated.

When calibrating the cold branch of temperature detection module106, in a first iteration, a nominal or middle value of the VREF_ROOM voltages can be selected. The nominal voltage for VREF_ROOM for input to comparator214can be an estimate of the reference voltage at the cold or low threshold temperature. The nominal voltage for input to comparator216can be an estimate of the reference voltage at the hot or high threshold temperature.

If the selected VREF_ROOM voltage is less than the VIPTAT voltage, the output of comparator214will be LOW and the test logic selects one or more subsequent VREF_ROOM voltages that is greater than the previous value until the output of comparator214changes or trips from LOW to HIGH. Conversely, if the initial selected VREF_ROOM voltage is greater than the VIPTAT voltage, the output of comparator will be HIGH and the test logic selects one or more subsequent VREF_ROOM voltages that are less than the previous value until the output of comparator214changes or trips from HIGH to LOW. The VREF_ROOM voltage that causes comparator214to trip is used to select one of the VREF_COLD voltages to use during normal operation of temperature detection module106to determine when device100is being operated below a specified cold temperature limit or threshold.

During test when calibrating the hot branch of temperature detection module106, in a first iteration, a nominal or middle value of the VREF_ROOM voltages can be selected. If the selected VREF_ROOM voltage is less than or equal to the VIPTAT voltage, the output of comparator216will be HIGH and the test logic selects one or more subsequent VREF_ROOM voltages that is greater than the previous value until the output of comparator216changes or trips from HIGH to LOW. Conversely, if the initial selected VREF_ROOM voltage is greater than the VIPTAT voltage, the output of comparator will be LOW and the test logic selects one or more subsequent VREF_ROOM voltages that are less than the previous value until the output of comparator216changes or trips from LOW to HIGH. The VREF_ROOM voltage that causes comparator216to trip is used to select one of the VREF_HOT voltages to use during normal operation of temperature detection module106to determine when device100is being operated above a specified hot temperature limit or threshold.

Once the cold and hot branches are calibrated, information identifying the VREF_COLD and VREF_HOT to be used for temperature detection module106can be stored in a portion of non-volatile memory104(FIG. 1) or other suitable location, such as a fuse.

During normal operation, switches210and212are set to couple the output of multiplexers204,208to respective comparators214,216. If the output of either comparator214,216indicate device100is being operated above or below the specified temperature range, the output of logic gate218can provide a signal to processor102or other suitable component. Appropriate action can then be taken to thwart any attempt to breach security of device100. For example, a portion of the memory104can be erased if the logic gate218indicates that a temperature limit has been exceeded

Referring toFIGS. 2 and 3,FIG. 3is a graph of cold, hot, and room temperature calibration curves that can be used to calibrate the temperature detection module106ofFIG. 2. Curve302corresponds to a selected VREF_COLD voltage versus trip temperature (T-TRIP_COLD) that is determined by the point at which VREF_COLD and T-TRIP-COLD intersect a VIPTAT curve312.

Curve304corresponds to a selected VREF_ROOM_C voltage versus trip temperature (T-TRIP_ROOM_C) that is determined by the point at which VREF_ROOM_C and T-TRIP-ROOM_C intersect VIPTAT curve312.

Curve306corresponds to a selected VREF_ROOM voltage versus trip temperature (T-TRIP_ROOM) that is determined by the point at which VREF_ROOM and T-TRIP-ROOM intersect VIPTAT curve312.

Curve308corresponds to a selected VREF_ROOM_H voltage versus trip temperature (T-TRIP_ROOM_H) that is determined by the point at which VREF_ROOM_H and T-TRIP-ROOM_H intersect VIPTAT curve312.

Curve310corresponds to a selected VREF_HOT voltage versus trip temperature (T-TRIP_HOT) that is determined by the point at which VREF_HOT and T-TRIP-HOT intersect VIPTAT curve312.

As shown, VIPTAT curve312is a straight line having a negative slope, with higher voltage values for lower temperatures. Thus the value of VREF_COLD is higher than the value of VREF_ROOM, and the value of VREF_ROOM is higher than the value of VREF_HOT. Correspondingly, the value of T-TRIP_COLD is less than the value of T-TRIP_ROOM, and the value of T-TRIP_ROOM is less than the value of T-TRIP_HOT.

During test mode, a nominal value for VREF_ROOM is used initially, and then subsequent values of VREF_ROOM are used to determine trip points for comparators214,216. The voltage that trips comparator214is shown as VREF_ROOM_C. The voltage that trips comparator216is shown as VREF_ROOM_H. A first index or code corresponding to the position of VREF_ROOM_C relative to VREF_ROOM can be used to determine which of the VREF_COLD values to use to calibrate comparator214for normal operation. Similarly, an second index or code corresponding to the position of VREF_ROOM_H relative to VREF_ROOM can be used to determine which of the VREF_HOT values to use to calibrate comparator216for normal operation.

Note that, depending on the adjustments that are required to calibrate temperature detection module106, adjustment voltages can be higher or lower than the nominal value of VREF_ROOM. For example, instead of the values of VREF_ROOM_C and VREF_ROOM_H shown inFIG. 3, the value of VREF_ROOM_C may be lower than the value of VREF_ROOM and/or the value of VREF_ROOM_H. Similarly, the value of VREF_REF_ROOM_H may be higher than the value of VREF_ROOM and/or VREF_ROOM_C.

FIG. 4is a schematic diagram of a voltage divider202and band gap reference circuit402that can be used to supply reference voltages (e.g. VREF, VREF_ROOM, VREF_COLD, VREF_HOT and VIPTAT) for the temperature detection module106ofFIG. 2. Voltage divider202includes a plurality of resistors403-420coupled in series. A first terminal of resistor403is coupled to the output of bandgap circuit402. A terminal of resistor420at the end of the series of resistors403-420is coupled to ground. A set of voltages VREF_COLD(0:2) are tapped between respective resistors405,406and408. Further along voltage divider202, a set of voltages VREF_ROOM(0:2) are tapped between respective resistors410,412, and414. Still further along voltage divider202, a set of voltages VREF_HOT(0:2) are tapped between respective resistors416,418,420. Note that voltage divider202can include any suitable number of resistors or other resistive components to provide a desired or required number of voltages in each range. Further, taps for the voltages do not have to be taken from sequential resistors, but two or more resistors may be included between taps for the voltages.

Bandgap circuit402includes two parallel branches and amplifier432. A first branch includes resistors422,424and bipolar junction transistor426coupled in series between the output of bandgap circuit402and ground. A second branch includes resistor428and bipolar junction transistor430coupled in series between the output of bandgap circuit402and ground. The base-emitter voltage of transistor430is used to supply VIPTAT voltage and is also supplied at a first input to amplifier432. A second input to amplifier is coupled between resistors422and424. The output of amplifier432is the reference voltage VREF.

Note that voltages used in temperature detection module106can be generated using circuitry or devices other than a series of resistors403-420and bandgap circuit402.

By now it should be appreciated that, in some embodiments, there has been provided a semiconductor device (106) that can comprise a first comparator (214) having a first input that receives a temperature dependent voltage, an output to indicate if the circuit has a temperature that is below a low threshold temperature, and a second input having associated therewith a first nominal voltage. A second comparator (216) can have a first input that receives the temperature dependent voltage, an output to indicate if the circuit has a temperature that exceeds a high threshold temperature, and a second input having associated therewith a second nominal voltage. A source (202) of a plurality of voltages can be coupled to the voltage supply circuit having a plurality of outputs for providing a plurality of voltages based on a reference voltage (Vref). A test module (206,210,212) can run a test at room temperature with the first and second comparators using the source of the plurality of voltages to determine an adjustment to the first nominal voltage that is to be applied to the second input of the first comparator during normal operation of the circuit and a second output of the source of the plurality of voltages to determine an adjustment to the second nominal voltage that is to be applied to the second input of the second comparator during normal operation of the circuit.

In another aspect, a first coupling circuit (204) can couple an output of the source of the plurality of voltages that corresponds to a resulting voltage from the adjustment to the first nominal voltage.

In another aspect, the semiconductor device can further comprise a second coupling circuit (216) that couples an output of the source of the plurality of voltages that corresponds to a resulting voltage from the adjustment to the second nominal voltage.

In another aspect, the first coupling circuit comprises a first multiplexer coupled to the source of the plurality of voltages.

In another aspect, the temperature dependent voltage comprises a Vbe voltage.

In another aspect, the source of the plurality of voltages comprises a voltage divider having an upper voltage portion (405,406,408) from which is selected an output of the source of the plurality of voltages that corresponds to a resulting voltage from the adjustment to the first nominal voltage, a lower voltage portion (416,418,420) from which is selected an output of the source of the plurality of voltages that corresponds to a resulting voltage from the adjustment to the second nominal voltage; and a middle portion (410,412,414) for use in determining the adjustments to the first and second nominal voltages.

In another aspect, the test module can comprise a test multiplexer (206) coupled to the middle portion of the source of the plurality of voltages and operated under control of a processor that has access to a memory.

In another aspect, the nominal voltage for the second input of the first comparator is an estimate of the reference voltage at the low threshold temperature.

In another aspect, the nominal voltage for the second input of the second comparator is an estimate of the reference voltage at the high threshold temperature.

In another embodiment, a method of determining if a temperature of a system has exceeded a hot threshold or a cold threshold can comprise determining, at room temperature (202,206,210,214) a first adjustment to first nominal settings. The first nominal settings are for a first input to a first comparator (214). A second adjustment to second nominal settings is determined at room temperature (202,206,210,216). The second nominal settings are for a first input to a second comparator (216). During normal operation of the system, the temperature using a temperature dependent voltage (VIPT) is monitored with the first comparator adjusted with the first adjustment and second comparator adjusted with the second adjustment.

In another aspect, the determining the first adjustment can comprise coupling a test multiplexer (206) to the first comparator and to a source (202) of a plurality of voltages based on a reference voltage.

In another aspect, the determining the second adjustment can comprise coupling the test multiplexer to the second comparator and to the source of the plurality of voltages based on the reference voltage.

In another aspect, the monitoring the temperature can comprise coupling the first comparator to an output (202) that reflects the first adjustment of the source of the plurality of voltages.

In another aspect, the monitoring the temperature can comprise coupling the second comparator to an output (202) that reflects the second adjustment of the source of the plurality of voltages.

In another aspect, the monitoring the temperature can be further characterized by coupling outputs of the first and second comparators to a logic gate (218) that signals when the system has exceeded the hot threshold or the cold threshold.

In another aspect, the monitoring the temperature can comprise coupling a temperature dependent voltage (VIPT) to the first comparator and the second comparator.

In another aspect, the determining the first adjustment can comprise coupling the temperature dependent voltage to a second input of the first comparator.

In yet another embodiment, a system can comprise a processor (102), a memory (104) coupled to the processor, and a temperature detection module (106) coupled to the processor. The temperature detection module can comprise a voltage divider (202) having a plurality of outputs, a first comparator (214) having a first input coupled to a temperature dependent voltage (VIPT), an output indicating if the system is at a temperature below a low temperature threshold, and a second input having associated therewith a first nominal voltage. A second comparator (214) can have a first input coupled to the temperature dependent voltage, an output indicating if the system is at a temperature exceeding a high temperature threshold, and a second input having associated therewith a second nominal voltage. A calibration circuit (206,210,212) can be coupled to the voltage divider that selectively, under control of the processor, controllably couples an output of the voltage divider to the second input of the first comparator and the second input of the second comparator until the processor determines a first adjustment to the first nominal voltage and a second adjustment to the second nominal voltage. A first multiplexer (204) can be coupled to the voltage divider that, under the control of the processor, couples an output of the voltage of divider that is equal to the first nominal voltage adjusted according to the first adjustment. A second multiplexer (216) coupled to the voltage divider that, under the control of the processor, couples an output of the voltage of divider that is equal to the second nominal voltage adjusted according to the second adjustment.

In another aspect, the temperature detection module further comprises a logic gate (218) having a first input coupled to the output of the first comparator, a second input coupled to the output of the second comparator, and an output indicating if a temperature violation has occurred.

In another aspect, the controller can erase a portion of the memory if the logic gate indicates that a temperature violation has occurred.

Because the apparatus implementing the present disclosure is, for the most part, composed of electronic components and circuits known to those skilled in the art, circuit details will not be explained in any greater extent than that considered necessary as illustrated above, for the understanding and appreciation of the underlying concepts of the present disclosure and in order not to obfuscate or distract from the teachings of the present disclosure.