Driver circuit

A driver circuit for an electronic switch, the driver circuit having a first input for receiving a first control signal, and a second input for receiving a signal from a current sensor, the driver circuit further including a shut-off circuit for operating the electronic switch to cause an interruption to current flow in the event of a fault condition arising, such as current through the electronic switch exceeding a predetermined threshold, wherein operation of the shut-off circuit can be invoked by a predetermined event at the first input.

FIELD OF THE INVENTION

The present invention relates to a driver circuit, for example, for an electronic switch, and more particularly to a driver circuit which is adapted to perform a self test of protective features therein.

BACKGROUND OF THE INVENTION

Semiconductor switches, such as MOSFETs, are commonly used as “high-side” switches. In an example of such an arrangement the source of the N-channel MOSFET is connected to the high voltage side of a load and a drain of the N-channel MOSFET is connected to a voltage source and vice versa for P channel MOSFET's. In practice the load is typically connected between the N-channel MOSFET and a local ground either directly or via a low side switch. Therefore when the MOSFET high side switch is in a high impedance state the voltage occurring at either side of the load is effectively the ground voltage. This is recognised as a generally desirable feature. The load is typically supplied from a power supply which may be at a relatively high voltage, for example several hundred volts. In contrast, a control system which is responsible for instructing the high side switch to be turned on or off will generally operate at a significantly lower voltage of generally only a few volts or at most a few tens of volts. It is therefore necessary to provide an interface between the low voltage control system and the MOSFET switch. This interface can be regarded as an electronic switch driver circuit which generally requires an independent floating power supply.

The driver circuit can be used to provide enhanced protection against fault conditions. It is, for example, known to include a current measuring capability within the driver circuit and to use the driver circuit to automatically initiate opening of the semiconductor switch (that is placing the semiconductor switch in a high impedance state) in the event that excess current flow is detected. This safety feature is, in a well designed system, only invoked in response to a fault condition. Consequently this safety feature may not be used for a considerable period of time. It is therefore possible that a fault might develop in relation to this safety feature within the driver circuit, and that such a fault may remain dormant, that is not noticed, for a considerable period of time.

SUMMARY OF THE INVENTION

According to a first aspect of the present invention there is provided a driver circuit for an electronic switch, the driver circuit having a first input for receiving a first signal, the driver circuit further including a shut off circuit for operating the electronic switch to cause an interruption to the current flow through the electronic switch in the event of a fault condition, wherein operation of the shut off circuit can be invoked by a predetermined event at the first input.

It is thus possible to provide a driver circuit where operation of the shut off circuit can be tested without requiring any additional connections to the driver circuit. This is particularly advantageous in aerospace applications where reliability is paramount as each additional connection introduces a new failure mode and also incurs a weight penalty. Furthermore the avoidance of any additional connections means that the present invention can be retrofitted to existing installations without requiring additional wiring.

Advantageously operation of the shut off circuit is invoked in response to receipt of an instruction at the first input to switch the electronic switch into a low impendence state. This has the advantage that operation of the shut off circuit is tested each time it is desired to place the switch in a closed (low impedance) state. Alternatively the operation of the shut-off circuit can be tested at power-up. In such an arrangement the driver has an input for a signal that is used to derive a power supply within the driver circuit and a further input as a switch control signal.

Preferably the driver circuit further includes a second input for receiving data or a signal from a sensor that, in use, monitors the performance of the electronic switch or a load connected to the electronic switch. The sensor may, for example, detect under voltage or over voltage conditions, or other conditions that may cause or be indicative of a malfunction in the load. Preferably the sensor monitors the current flow to the load, and the driver circuit is arranged to switch the switch off so as to interrupt the current to the load in the event of excess current flow.

Advantageously, a fault simulating component or circuit simulates a fault condition at an input to the shut down circuit in response to the occurrence of the predetermined event at the first input.

Advantageously power for the driver circuit is derived from the switch control signal itself. When it is desired to switch the electronic switch on place it in a low impedance state) an oscillating signal, such as a sinusoid or a square wave, is generated by a controller and supplied to the first input of the driver circuit. This oscillating signal may pass through an isolation device, such as a transformer or a DC blocking capacitor and may then be rectified or used to drive a charge pump in order to charge a first capacitor to a sufficient voltage to turn the electronic switch on and also to provide power for the shut off circuit.

Preferably the shut off circuit comprises a comparator arranged to compare a signal from the current sensor with a predetermined reference value. Advantageously operation of the comparator is modified in response to occurrence of the predetermined event. Preferably a second capacitor, herein referred to as a self test capacitor, is connected between an input of the comparator and the first capacitor so as to simulate the signal conditions occurring at the input of the comparator that would correspond to an excess current flow during a first period following charging of the first capacitor. The self test capacitor functions as a fault simulator and ensures that the shut off circuit is tested each time the driver circuit is instructed to place the high side switch in a low impedance state. The self test capacitor may be provided solely to provide the self test function, or may serve a dual purpose within the driver circuit. In a preferred embodiment the current sensor is a resistor inserted in series with the high side switch and the load, and the self test capacitor discharges through the current sensing resistor such that the operational integrity of the current sensing resistor can also be checked.

Advantageously a controller is provided which has an input for monitoring a voltage occurring across the load and the controller is further responsive to the switch control signal for instructing the driver circuit to close the electronic switch or, preferably, the controller is the source of the switch control signal. The controller may then monitor the voltage occurring at the load in response to sending an instruction via the switch control signal to close the switch, and can determine that the switch off circuit is functioning correctly if the time delay between instructing the switch to close and the switch actually closing is greater than a first threshold period. The controller may also be adapted to check that the switch does indeed close before the expiry of a second threshold period and to signal a fault as having occurred if the switch does not close within the second time period.

Preferably the drive circuit is arranged to only temporarily interrupt the current flow to a load by opening the switch. A further controller, optionally having more “intelligence” can monitor the occurrence of the temporary interruptions and can make a decision as to whether to turn the supply to that load off by removing the “on” signal at the first input of the driver circuit.

According to a second aspect of the present invention there is provided a method of testing the operation of a shut off circuit within a driver circuit, wherein the driver circuit has an input for receiving an input signal, an output for controlling an output device, and a protection circuit for monitoring operation of the output device and placing it in a predetermined state in the event of a fault condition, and wherein the input is, in use, used to switch the controlled device between a first state and a second state, and wherein the occurrence of a predetermined event at the input causes a fault condition to be simulated such that the operation of the protection circuit can be tested.

DESCRIPTION OF PREFERRED EMBODIMENTS OF THE INVENTION

FIG. 1schematically illustrates a power system associated with a load. The load2is connected between supply rails V+and V−of a first power supply. The load is connected directly to the V−rail which, frequently, will be held at a local “ground” voltage. An electrically controllable switch4and a current sensor6, in this example a resistor, are connected in series between the V+rail and the load2. The electrically controllable switch4will typically be an N-channel MOSFET—although it should be appreciated that the present invention can be modified to work with P-channel MOSFETs. The switch is responsive to a driver circuit10. A first output O1of the driver circuit is connected to a gate terminal of the switch4. A first input terminal I1of the driver circuit10receives a control signal from a master controller12. A DC blocking capacitor14is interposed between the controller12and the driver circuit10so as to provide isolation between these components, thereby enabling the controller12to operate at a second power supply voltage defined by second power supply lines VL+and VL−.

The driver circuit10typically implements at least one safety function. The safety function may be under voltage or over voltage protection and/or over current protection. In the arrangement shown inFIG. 1the driver circuit10is arranged to perform over current protection. In order to achieve this a second input I2of the driver circuit10is connected to a node16formed between the electronic switch4and the resistor6and a further connection V1is connected to a node18formed between the current sensing resistor6and the load2. It can be seen that the voltage occurring at the input V1will vary between V−when the electronic switch is non-conducting and substantially V+, less the voltage drops occurring across the switch4and the resistor6, when the switch4is conducting. In order to achieve reliable circuit operation the driver circuit10is biased independently of the low voltage power supply VL+and VL−but similarly it is advantageous for the drive circuit10not to derive its power from the high voltage power supply V+and V−. In order to achieve this, and as will be described later, the driver circuit10derives its power from the switch control signal occurring at its input I1and the driver circuit10floats with respect to the supply voltages V+and V−.

In general, it is beneficial for the controller12to be able to determine that power has been supplied to the load2. To achieve this a monitor input M1of the controller12is responsive to the voltage occurring at the node18. However, rather than connect the input M1to the node18directly, the connection is made via a potential divider formed by resistors20and22which extend between the node18and the low voltage negative supply rail VL−. Suitable selection of the size of resistors20and22can ensure that the voltage occurring at the monitor input M1is always constrained to lie between VL−and VL+, being the operating voltage range of the controller12.

FIG. 2shows the driver circuit10in greater detail and also shows some of the interface circuitry of the controller12.

The driver circuit10comprises a charge pump formed from a first capacitor30having a first terminal thereof connected to a cathode of a diode32and to a supply rail31, and a second plate of a capacitor30is connected to a supply rail34which, in use, is connected to the V1terminal. An anode of the diode32is connected to a first plate of the blocking capacitor14A further diode, such as a zener diode,36is connected between the supply rail34and the anode of the diode32. The use of a zener diode enables operation of the charge pump (as would a normal diode) but also clamps the voltage on the first capacitor to stop it becoming too large. This charge pump arrangement, which for convenience will be generally designated40is driven with a substantially square wave signal from a pair of complimentary transistors42and44connected in a totem pole arrangement between first and second low voltage supply rails. In the context of an avionics environment, the positive supply rail may be a +12 volts or +28 volt DC supply rail and the negative supply rail may be the ground rail for the 28 volt DC supply. The transistors42and44have their gates connected to receive a common signal “KLC_OSC” generated by the controller12when it is desired to close the switch4. In use, when the KLC_OSC signal is initiated a square wave voltage occurring at a node46between the transistors42and44is supplied to the charge pump40, optionally via a current limiting resistor48. The diode32acts to rectify the positive going half cycles of the square waves thereby charging capacitor30such that the voltage occurring at the first plate of the capacitor30is greater than the voltage at the terminal V1. The voltage occurring at the first plate of capacitor30is supplied to a gate terminal50of the high side electronic switch4via a resistor52. With resistor48having a resistance of 100 Ohms, blocking capacitor14having a capacitance of 0.1 microfarad and the storage capacitor30also having a capacitance of 0.1 microfarad the turn on time for the switch4is approximately 650 microseconds when the KLC_OSC signal is switching at 15 kHz and the transistors42and44act to generate a square wave having a peak to peak voltage of 12 volts.

The over current protection for the switch4is provided by a shut-off circuit55, and a current sensing resistor6connected in series with the switch4and the load2. In order to prevent inadvertent operation of the current limiting circuit due to transients, the voltage occurring across the resistor6is filtered by an RC network which is in parallel with the resistor6comprising resistor60in series with capacitor62. The voltage occurring at a node63formed between the resistor60and the capacitor62is supplied to an inverting input of a comparator64. Resistors52,64and66are connected in series between the first plate of the capacitor30and the supply rail34and act to form a potential divider such that a reference voltage for the comparator34is available at a node67formed between the resistor64and66. This reference voltage is supplied to the non-inverting input of the comparator64. An output of the comparator is connected to the gate50of the switch4via a further resistor70. The comparator64is arranged to receive its supply voltage from the capacitor30and hence the positive supply input of the comparator64is connected to the first plate of the capacitor30and the negative supply input of the comparator64is connected to the bus34. The comparator may have an open collector output stage such that it's output is in a high impedance state when a fault (over current) condition does not exist.

In use, if an excess current condition occurs such that the voltage across the sensing resistor6exceeds a voltage threshold for a predetermined time, as set by the time constant of the resistor60and the capacitor62, then the voltage occurring at the inverting input of the comparator64will exceed the voltage occurring at the non-inverting input and the comparator64will sink current through its output65and the resistor70thereby turning off the FET4. Consequently the voltage across the current sensing resistor6will drop to zero and the RC network formed by resistor60and capacitor62will discharge towards a second threshold determined by resistor52, resistor64, resistor70and resistor66, and after this delay the comparator will switch allowing the field effect transistor to be turned back on. The comparator circuit exhibits hysteresis, thereby avoiding rapid switching between on and off states. The switching on and off of the power supply to the load is monitored by the controller12using its M1input as described hereinbefore. The controller12can then determine whether an over current condition has occurred.

It is desirable to be assured of the correct operation of the over current circuit and its ability to switch the field effect transistor off in the event of an over current condition occurring. In order to achieve this a further capacitor100which functions as a fault simulation or self test capacitor is connected between node63(and hence the inverting input of the comparator64) and the positive supply rail31as provided by the capacitor30. In use, when the positive supply rail31is energised by initiation of the charge pump the fault simulation (self test) capacitor100will pre-charge the capacitor62such that the voltage occurring at the inverting input of the comparator64exceeds the shutdown threshold voltage thereby keeping the field effect transistor turned off. In effect, the self test capacitor and the capacitor62initially act to form a capacitive potential divider. However the capacitor62can discharge via resistor60and the current measuring resistor6such that after a short period of time determined by the RC time constant of the capacitor62and its resistor60the capacitor62discharges sufficiently to switch the comparator64off thereby enabling the field effect transistor4to be turned on. However it will be apparent that the turning on of the field effect transistor64has been delayed with respect to the onset of the KLC_OLC signal compared to the switch on time if the self test capacitor100was not present.

In a preferred embodiment, the fault simulation capacitor has a value of approximately 200 picofarads, capacitor62has a value of 0.01 microfarads and resistor60has a value of 100 kilo Ohms. This has resulted in the self test circuit delaying the turn on time from the field effect transistor from 650 microseconds to approximately 1900 microseconds. This time delay is monitored by the controller12as shown inFIG. 1, thereby enabling the controller12to infer that the over current protection circuit is operating correctly. As schematically illustrated inFIG. 1a timer120can be implemented, either in hardware or software, to compare the time between switching on the control signal, i.e. enabling KLC_OSC to start oscillating, and monitoring the transition at the input M1indicative of the fact that the switch4has closed.

It is thus possible by the inclusion of a fault simulation/self test capacitor100to test the current limiting circuit to ensure that it does not have a dormant failure. The self test procedure is initiated automatically each time the charge pump is switched on and hence does not require any further control lines or signals to the driver circuit in addition to those which are routinely provided.

It will be appreciated that the self test capacitor100effectively appears in parallel with capacitor62when viewed from the current measuring resistor and consequently the inclusion of the self test capacitor lengthens the time that an excess current must flow for before the shut off feature is invoked. However, this can easily be accounted for by reducing the value of capacitor62or modifying the value of resistor60.

In the arrangement described with respect toFIGS. 1 and 2the power supply for the driver circuit10and the switch control signal were one and the same. However this need not necessarily be the case.FIG. 3shows a modified version ofFIG. 1in which the signal provided at the input I1is used solely to provide a power supply for the protection circuit. A further input I3is provided for control of the switch for the load2. The signal line between the controller12and the input I3could include a further DC blocking capacitor or could be a direct connection as shown.

FIG. 4illustrates a modified version of the driver circuit adapted to work with separate power supply and control lines. The I3terminal is connected to the gate50of the transistor4such that the gate can be held at a voltage sufficient to hold the transistor in either an off state, or an on state, dependent upon the designer's choice.

In use, at initial power up I1is asserted and I3is held in a high impedance state or driven sufficiently weakly such that the comparator64sinks current through its output65to hold the transistor4off. As a consequence, switching the transistor4into the conducting condition will be delayed compared to the normal time between the application of the switch control signal at the input I3and the transistor4becoming conducting. This delay can be detected and used to infer correct operation of the over current protection circuit.

The oscillating signal to the input I1can then be left permanently enabled such that the power for the protection circuit is permanently available. The power supply can also, where appropriate, be used to supply other protection circuits. As a result, when it is desired to switch the switch4on then a switch control signal is supplied to the input I3.

Although the circuit for generating the switch control signal has been described as using a direct connection to the controller the transmission of signals via an opto isolator is also possible as are other coupling methods. Once again, it should also be stressed that although this invention has been described in the context of controlling N channel MOSFETs, it can be modified to provide control for P channel MOSFETs.

Although the present invention has been described in the context of controlling a high side switch for a load, it can be used to provide protection circuit testing in other applications where turn on or operation of a device is monitored by a controller and where the inclusion of a small delay at turn on is acceptable.