Mechanisms for forming backside illuminated image sensor device structure

Embodiments of mechanisms of a backside illuminated image sensor device structure are provided. The method for manufacturing a backside illuminated image sensor device structure includes providing a substrate and forming a polysilicon layer over the substrate. The method further includes forming a buffer layer over the polysilicon layer and forming an etch stop layer over the buffer layer. The method further includes forming a hard mask layer over the etch stop layer and patterning the hard mask layer to form an opening in the hard mask layer. The method further includes performing an implant process through the opening of the hard mask layer to form a doped region in the substrate and removing the hard mask layer by a first removing process. The method further includes removing the etch stop layer by a second removing process and removing the buffer layer by a third removing process.

BACKGROUND

Integrated circuit (IC) technologies are constantly being improved. Such improvements frequently involve scaling down device geometries to achieve lower fabrication costs, higher device integration density, higher speeds, and better performance.

One of the IC devices is an image-sensor device. An image-sensor device includes a pixel grid for detecting light and recording the intensity (brightness) of the detected light. The pixel grid responds to the light by accumulating charges. The charges can be used (for example, by other circuitry) to provide color in some suitable applications, such as a digital camera.

Common types of pixel grids include a charge-coupled device (CCD) image sensor or complimentary metal-oxide-semiconductor (CMOS) image sensor device. One type of image sensor devices is a backside illuminated (BSI) image sensor device. BSI image sensor devices are used for sensing a volume of light projected towards the back surface of a substrate. BSI image sensor devices provide a high fill factor and reduced destructive interference, as compared to front-side illuminated (FSI) image sensor devices. In general, BSI technology provides higher sensitivity, lower cross-talk, and comparable quantum efficiency as compared to FSI image sensor devices.

However, although existing BSI image sensor devices and methods of fabricating these BSI image sensor devices have been generally adequate for their intended purposes, as device scaling-down continues, they have not been entirely satisfactory in all respects.

DETAILED DESCRIPTION

The making and using of the embodiments of the disclosure are discussed in detail below. It should be appreciated, however, that the embodiments can be embodied in a wide variety of specific contexts. The specific embodiments discussed are merely illustrative, and do not limit the scope of the disclosure.

Some variations of the embodiments are described. Throughout the various views and illustrative embodiments, like reference numbers are used to designate like elements.

Mechanisms for forming an integrated circuit (IC) device are provided in accordance with some embodiments of the disclosure. The integrated circuit device may be an integrated circuit (IC) chip that includes various passive and active microelectronic components, such as resistors, capacitors, inductors, diodes, metal-oxide-semiconductor field effect transistors (MOSFETs), complementary MOS (CMOS) transistors, bipolar junction transistors (BJTs), laterally diffused MOS (LDMOS) transistors, high power MOS transistors, fin-like field effect transistors (FinFETs), or other applicable components.

In some embodiments, the IC device includes a backside illuminated (BSI) image sensor device structure.FIGS. 1A to 1Jillustrate cross-section representations of various stages of manufacturing a BSI image sensor device structure100in accordance with some embodiments. However, it should be noted thatFIGS. 1A to 1Jhave been simplified for the sake of clarity to better understand the inventive concepts of the present disclosure. Additional features can be added in BSI image sensor device structure100, and some of the features described below can be replaced or eliminated. In addition, it should be noted that different embodiments may have different advantages than those described herein, and no particular advantage is necessarily required of any embodiment.

Referring toFIG. 1A, a substrate102is provided. In some embodiments, substrate102is a semiconductor substrate including silicon. Alternatively or additionally, substrate102may include elementary semiconductor materials (such as germanium and/or diamond), compound semiconductor materials (such as silicon carbide, gallium arsenic, gallium phosphide, indium phosphide, indium arsenide, and/or indium antimonide), or alloy semiconductor materials (such as SiGe, GaAsP, AlInAs, AlGaAs, GaInAs, GaInP, and/or GaInAsP.) Substrate102may be a p-type or an n-type substrate depending on the design requirements of BSI image sensor device structure100. In some embodiments, substrate102is a device wafer.

As shown inFIG. 1A, substrate102has a front side102aand a back side102b. Shallow trench isolations (STI)104are formed in front side102aof substrate102in accordance with some embodiments. In some embodiments, STI104are made of insulating materials, such as silicon dioxide. STI104may be formed by etching trenches in front side102aof substrates102and filling an insulating material into the trenches by chemical vapor deposition (CVD) afterwards.

Next, a polysilicon layer106is formed over front side102aof substrate102, as shown inFIG. 1Bin accordance with some embodiments. Polysilicon layer106may be formed by using applicable techniques including but not limited to CVD. In some embodiments, the thickness of polysilicon layer106is in a range from about 500 A to about 1500 A.

After polysilicon layer106is formed, a buffer layer108is formed over polysilicon layer106. Buffer layer108is used to release the stress of polysilicon layer106(discussed in more detail later). In some embodiments, buffer layer108is an oxide layer. In some embodiments, buffer layer108is made of silicon dioxide, silicon oxide, aluminum oxide, lanthanum oxide, hafnium oxide, zirconium oxide, hafnium oxynitride, or other applicable oxide-containing materials. In some embodiments, the thickness of buffer layer108is in a range from about 80 A to about 800 A. When buffer layer108is too thin, the stress can not be release. Acids used in subsequent processes may penetrate buffer layer108and permeate into polysilicon layer106. When buffer layer108is too large, pixel implant profile may be abnormal, resulting in pixel performance shift.

Buffer layer108may be formed by any applicable oxidation process, such as wet or dry thermal oxidation processes or by a CVD process. For example, tetraethyl-orthosilicate (TEOS) and oxygen may be used as precursor during the CVD process to form buffer layer108.

After buffer layer108is formed, an etch stop layer110is formed over buffer layer108over front side102aof substrate102, as shown inFIG. 1Din accordance with some embodiments. In some embodiments, etch stop layer110is a nitride layer. In some embodiments, etch stop layer110is made of silicon nitride. In some embodiments, the thickness of etch stop layer110is in a range from about 800 A to about 2400 A. Etch stop layer110may be formed by using applicable techniques including but not limited to CVD or physical vapor deposition (PVD).

Next, a hard mask layer112is formed over etch stop layer110in accordance with some embodiments. In some embodiments, hard mask layer112is made of silicon oxide. Hard mask layer112may be formed by using applicable techniques including but not limited to CVD or PVD.

Afterwards, hard mask layer112is patterned, as shown inFIG. 1Ein accordance with some embodiments. In some embodiments, hard mask layer112is patterned to remove portions of hard mask layer112and to form openings114in hard mask layer112by an etching process. In some embodiment, portions of etch stop layer110are also removed by the etching process. In some embodiments, an edge of opening114is substantially aligned with an edge of STI104.

After hard mask layer112is patterned, an implant process116is performed to form doped regions118in front side102aof substrate102, as shown inFIG. 1Fin accordance with some embodiments. More specifically, dopants are implanted in substrate102from opening114of hard mask layer112through portions of etch stop layer110, buffer layer108, and polysilicon layer106. In some embodiments, doped regions118are radiation-sensing regions, which are operable to sense or detect radiation waves projected toward doped regions118through back side102bof substrate102.

Implant process116may include multiple implant operations and may use different dopants, implant dosages, and implantation energies during the operations. In some embodiments, implant process116includes doping substrate102with a dopant having an opposite doping polarity from substrate102.

After doped regions118are formed, hard mask layer112is removed by a first removing process, as shown inFIG. 1Gin accordance with some embodiments. In some embodiments, the first removing process includes using a soluction containing acid. In some embodiments, the first removing process includes using a solution containing HF, and the concentration of HF is in a range from about 1% to about 50%.

Since the first removing process includes using a solution having a relatively high concentration of acid, buffer layer108is required. More specifically, during the first removing process, etch stop layer110is too thin to block all the acid from penetrating through etch stop layer110, and therefore polysilicon layer106and substrate102will be damaged if buffer layer108is not formed. As a result, buffer layer108is required to be formed over substrate102to protect polysilicon layer106and substrate102from being damaged by the acid (e.g. 20% of HF).

After hard mask layer112is removed, etch stop layer110is removed by a second removing process, as shown inFIG. 1Hin accordance with some embodiments. In some embodiments, the second removing process includes using a solution containing H3PO4, and the concentration of H3PO4is in a range from about 50% to about 100%.

During the second removing process, residues, such as nitride, tend to be formed. If buffer layer108is not formed between polysilicon layer106and etch stop layer110, these residues will attach to polysilicon layer106. However, if buffer layer108is formed between polysilicon layer106and etch stop layer110, buffer layer108can be seen as a protection layer for polysilicon layer106when the second removing process is performed, such that the residues will attach to buffer layer108instead of polysilicon layer106.

Afterwards, buffer layer108is removed by a third removing process, as shown inFIG. 1Iin accordance with some embodiments. In some embodiments, the third removing process includes using a solution containing HF, and the concentration of HF is in a range from about 1% to about 10%. In addition, residues formed during the second removing process are removed along with buffer layer108during the third removing process.

After hard mask layer112, etch stop layer110, and buffer layer108are removed, polysilicon layer106is patterned to form a gate structure109, as shown inFIG. 1Jin accordance with some embodiments. It should be noted that gate structure109may further include a gate dielectric layer (not shown). The gate dielectric layer may be made of a dielectric material, such as silicon oxide, a high-k dielectric material, or other applicable dielectric materials. Examples of high-k dielectric material may include, but are not limited to, HfO2, HfSiO, HfSiON, HfTaO, HfSiO, HfZrO, zirconium oxide, aluminum oxide, or hafnium dioxide-alumina (HfO2—Al2O3) alloy.

In addition, gate structure109may also include spacers on sidewalls of gate structure109. The spacers may be made of a dielectric material, such as silicon nitride, silicon oxynitride, or other applicable dielectric material.

A contact122coupled to gate structure109is formed in ILD layer120in accordance with some embodiments. Contact122may be made of any applicable conductive material, such as a highly-conductive, low-resistive metal, elemental metal, transition metal, or the like. In some embodiments, contact120is made of tungsten or copper.

Contact122may be formed through ILD layer120by using photolithography and etching techniques. Generally, these photolithography techniques involve depositing a photoresist material, which is masked, exposed, and developed to expose portions of ILD layer120which are designed to be removed. The remaining photoresist material protects the underlying material from subsequent processing steps, such as etching.

Contact122may further include a barrier layer (not shown) to prevent diffusion and provide better adhesion. The barrier layer may be made of titanium, titanium nitride, tantalum, tantalum nitride, or the like. The barrier layer may be formed by CVD, although other techniques could alternatively be used.

Conductive features126may be configured to connect various features or structures of BSI image sensor device100. For example, conductive features126are used to interconnect the various devices formed on substrate102. Conductive features126may be vertical interconnects, such as vias and/or contacts, and/or horizontal interconnects, such as conductive lines. In some embodiments, conductive features126are made of conductive materials, such as aluminum, aluminum alloy, copper, copper alloy, titanium, titanium nitride, tungsten, polysilion, or metal silicide.

In addition, a carrier substrate (not shown) may be disposed over front side102aof substrate102. For example, the carrier substrate may be a carrier wafer bonded to interconnect structure124. The carrier substrate may include silicon. Alternatively, the carrier substrate may include other applicable materials, such as glass. The carrier substrate can provide protection for the various features formed on front side102aof substrate102and mechanical strength and support during the processing of back side102bof substrate (102.

An antireflective layer128is formed over back side102bof substrate102, as shown inFIG. 1Jin accordance with some embodiments. In some embodiments, antireflective layer128is made of silicon nitride. In some embodiments, antireflective layer128is formed by a CVD process, such as a plasma enhanced CVD (PECVD) process.

After antireflective layer128is formed, a color filter layer130is formed over antireflective layer128over back side102bof substrate102, and microlens layer132is disposed over color filter layer130, as shown inFIG. 1Jin accordance with some embodiments. Color filter layer130may include more than one color filter. In some embodiments, color filter layer130includes color filters made of a dye-based (or pigment-based) polymer for filtering out a specific frequency band. In some embodiments, microlens layer132disposed on color filter layer130includes more than one microlens having a variety of shapes and sizes.

As described above, buffer layer108is formed between polysilicon layer106and etch stop layer110in accordance with some embodiments. Therefore, the stress between polysilicon layer106and etch stop layer110is reduced. More specifically, the stress formed between polysilicon layer106and etch stop layer110will be higher than the stress formed between polysilicon layer106and buffer layer108. Therefore, when buffer layer108is formed between polysilicon layer106and etch stop layer110, less stress will be induced. Therefore, if buffer layer108is not formed below etch stop layer110, the high concentration of acid (e.g. 20% of HF) used in the first removing process will penetrate etch stop layer110and reach polysilicon layer106and substrate102. As a result, polysilicon layer106will be damaged, and corrosion defects will occur on substrate102. Accordingly, the formation of buffer layer108reduces damaging and corrosion defects of polysilicon layer106and substrate102.

Moreover, if the acid used in the first removing process penetrates etch stop layer110and reaches polysilicon layer106and substrate102, the acid will remain in substrate102during the subsequent processes, including the second removing process and the third removing process. During these processes, the acid will also gradually dissolve portions of STI104(e.g. oxide in STI104), and therefore trenches will be formed at the edges, which have higher stress than the rest of the structure, of STI104. However, since buffer layer108is used as a stress-release layer during the first removing process in accordance with some embodiments, damaging of STI104is avoided.

Furthermore, buffer layer108is used as a protection layer for polysilicon layer106during the second removing process in accordance with some embodiments. During the second removing process, residues, such as nitride particles, are formed. If buffer layer108is not formed over polysilicon layer106, these residues will attach onto polysilicon layer106and will act as hard masks when polysilicon layer106is patterned. Therefore, some portions of polysilicon layer106, which has residues remaining thereon, will remain on substrate102after the patterning process. However, since buffer layer108is used as a protection layer for polysilicon layer106, the residues formed during the second removing process does not attach to polysilicon layer106but attach to buffer layer108. Therefore, the residues can be removed by the third removing process, and polysilicon layer106can be patterned as per the intended design.

Embodiments of mechanisms for a BSI image sensor device structure are provided. The BSI image sensor device structure includes a buffer layer formed between a polysilicon layer and an etch stop layer over a substrate. The buffer layer is used as a stress-release layer during a first removing process for removing a hard mask layer. Therefore, damaging of the polysilicon layer and corrosion defects of the substrate are avoided. In addition, the stress induced between the polysilicon layer and the etch stop layer are reduced. Moreover, patterning of the polysilicon layer is also improved.

In some embodiments, a method for manufacturing a backside illuminated image sensor device structure is provided. The method includes providing a substrate and forming a polysilicon layer over the substrate. The method further includes forming a buffer layer over the polysilicon layer and forming an etch stop layer over the buffer layer. The method further includes forming a hard mask layer over the etch stop layer and patterning the hard mask layer to form an opening in the hard mask layer. The method further includes performing an implant process through the opening of the hard mask layer to form a doped region in the substrate and removing the hard mask layer by a first removing process. The method further includes removing the etch stop layer by a second removing process and removing the buffer layer by a third removing process.

In some embodiments, a method for manufacturing a backside illuminated image sensor device structure is provided. The method includes providing a substrate having a front side and a back side and forming a polysilicon layer over the front side of the substrate. The method further includes forming a buffer layer over the polysilicon layer and forming an etch stop layer over the buffer layer. The method further includes forming a hard mask layer over the etch stop layer and patterning the hard mask layer. The method further includes performing an implant process from the front side of the substrate to form a radiation sensing region in the substrate and removing the hard mask layer by a first removing process. The method further includes removing the etch stop layer by a second removing process and removing the buffer layer by a third removing process.

In some embodiments, a method for manufacturing a backside illuminated image sensor device structure is provided. The method includes providing a substrate having a front side and a back side and forming a polysilicon layer over the front side of the substrate. The method further includes forming a buffer layer over the polysilicon layer and forming an etch stop layer over the buffer layer. The method further includes forming a hard mask layer over the etch stop layer and patterning the hard mask layer. The method further includes performing an implant process form the front side of the substrate to form a radiation sensing region in the substrate and removing the hard mask layer, the etch stop layer, and the buffer layer. The method further includes patterning the polysilicon layer to form a gate structure.