Electrical power converter with pre-charge mode of operation

An electrical converter includes first and second converter stages, an output filter, and a controller having a first mode for converting a three-phase AC signal into a DC signal. The first converter stage has a three-phase bridge rectifier connecting three phase terminals to an upper intermediate node and a lower intermediate node, and a phase selector having first switches connecting the terminals to a middle intermediate node. The second converter stage includes a switch node connected to the middle intermediate node and a pair of second switches connecting the switch node to one of the DC terminals. In a second mode, the first switches are operated while keeping the upper or lower intermediate node disconnected from all the phase terminals to allow a current to flow between the middle intermediate node and the output filter, allowing for stepwise increasing a voltage across the DC terminals during start-up.

TECHNICAL FIELD

The present disclosure relates to the field of electrical power conversion. In particular, the present disclosure relates to an electrical converter and a method for controlling the electrical converter.

INTRODUCTION

It is known from U.S. Pat. No. 5,784,269 to add a phase selection switching circuit to a three-phase rectifier for selecting the intermediate phase. The phase selection switching circuit is coupled to a current injection switching circuit of a buck-boost type to reduce harmonics associated with the three phase AC input power. The three-phase rectifier further comprises a boost circuit that increases the DC output voltage beyond the voltage provided by the three phase AC input.

Three-phase rectifiers of the above type find useful application in vehicle battery charging systems and gradient amplifiers of magnetic resonance imaging (MRI) apparatuses with typical output voltage ratings of between about 800-1000 V DC.

One drawback associated with the above rectifier is that the pre-charging, i.e. the stepping up of the output voltage at start-up is not straightforward. It is known to perform pre-charging using a resistive element connected through a relay. However, this solution requires a large volume and causes power losses in the resistive element.

SUMMARY

There is therefore a need in the art to provide an improved three-phase rectifier of the above type. In particular, there is a need to provide a three-phase rectifier enabling a smooth and safe pre-charge (start-up) procedure at limited additional cost.

According to a first aspect of the present disclosure, there is therefore provided an electrical converter for converting an AC signal having three phase voltages into a DC signal, or vice versa.

Electrical converters according to the present disclosure feature a first converter stage. The first converter stage is operable to convert the AC signal at three phase terminals to a first DC signal at an upper intermediate node and a lower intermediate node. The first converter stage can comprise a three-phase bridge converter/rectifier, e.g. comprising or consisting of three bridge legs whose midpoints are respectively connected to each of the three phase terminals (e.g. a three-bridge legs six-switch converter/rectifier). The first converter stage further comprises a phase selector operable to connect the three phase terminals to a middle intermediate node through first active (controllable) switches. The first switches are advantageously active semiconductor switches. The electrical converter further comprises a second converter stage arranged between the first converter stage and the output filter. The second converter stage comprises a switch node and a pair of second switches connecting the switch node to a respective one of the DC terminals. The middle intermediate node is connected to the switch node. The second switches advantageously are configured to form a current injection circuit connecting the middle intermediate node to the DC terminals, e.g. the second switches are operated through pulse width modulation. The current injection circuit is advantageously a buck-boost circuit. The electrical converter advantageously comprises an input filter, advantageously comprising a first inductor configured to filter a current through the middle intermediate node. The first inductor can connect the middle intermediate node to the switch node. An output filter comprising one or more capacitors is connected between the two DC terminals of the electrical converter.

The electrical converter comprises a controller which is configured to operate the electrical converter according to a first mode of operation, referred to as normal operation for converting the three-phase AC signal into the DC signal. During normal operation, the controller operates the first switches of the phase selector such that the phase terminal having an intermediate voltage between the highest voltage and the lowest voltage of the three phase voltages (i.e. having the smallest instantaneous absolute value of the three phase voltages) is connected to the middle intermediate node. Simultaneously, the three-phase bridge rectifier connects the phase terminal having the highest voltage to the upper intermediate node and the phase terminal having the lowest voltage to the lower intermediate node.

According to the present disclosure, the electrical converter is configured to disconnect the upper intermediate node and/or the lower intermediate node from all the phase terminals. This functionality can be obtained through a third switch configured to interrupt an electrical connection between the three-phase bridge converter/rectifier and the upper intermediate node or the lower intermediate node. The third switch is controlled by the controller and is kept closed in the first mode of operation (normal operation) to ensure the phase input having the highest voltage is applied to the upper intermediate node, and/or the phase input having the lowest voltage is applied to the lower intermediate node. Alternatively, the above functionality can be obtained by providing the three phase bridge rectifier with active or controllable switches allowing to (actively or controllably) disconnect the upper intermediate node and/or the lower intermediate node from all the phase terminals.

According to an aspect, the controller is implemented with a second mode of operation. During the second mode of operation, the controller is configured to control switching of the first switches and possibly the second switches so as to apply a phase current between the middle intermediate node and the output filter while keeping the upper or lower intermediate node disconnected from all phase terminals. During the second mode of operation, the first switches are advantageously operated (by the controller) such that the current is directed to charge the output filter capacitor(s).

Hence, in the second mode of operation the upper or lower intermediate node are kept disconnected from all phase terminals to (partially) disable operation of the three-phase bridge rectifier while the phase selector is controlled to allow for intermittently injecting a phase current to the output filter capacitor(s) so as to stepwise charge the capacitor(s) hence increasing the output voltage at the output terminals. The controller is advantageously configured to operate in the second mode of operation at start-up and to switch to the first mode of operation once a desired output voltage is achieved.

When a third switch is used, the third switch is kept open in the second mode of operation. The third switch can be provided as an active semiconductor switch, such as a MOSFET, or as a relay, both of which can be operated by the controller.

During the second mode of operation, the first switches are advantageously operated (by the controller) so as to apply a phase input having a falling/descending voltage higher than a voltage at the upper output terminal to the middle intermediate node. This phase input can be applied from the instant when the falling voltage falls below a predetermined threshold voltage above the instantaneous voltage of the upper output terminal. Alternatively, the first switches are advantageously operated (by the controller) so as to apply a phase input having a rising voltage less than a voltage at the lower output terminal to the middle intermediate node. This phase input can be applied from the instant when the rising voltage reaches a predetermined threshold voltage below the instantaneous voltage of the lower output terminal.

The electrical converter designs according to the present disclosure allow for a controlled pre-charge of the DC bus voltage with minimal added hardware and therefore allows for improved ease of operation and longer service life at minimal cost.

Advantageously, the output stage comprises a boost circuit connected to the upper intermediate node and the lower intermediate node in parallel with the output filter. The boost circuit advantageously comprises an upper boost circuit connected to the upper intermediate node, and a lower boost circuit connected to the lower intermediate voltage node. The upper and lower boost circuits are connected between a common node and an upper and lower output terminal, respectively. The upper and lower boost circuits can each comprise, or consist of, a bridge leg, each comprising an actively switchable semiconductor switch that is advantageously controlled by a pulse width modulation (PWM) control signal to control a current through the circuit, in particular the current through a corresponding inductor of the boost circuit. Therewith, in the first mode of operation, the upper boost circuit controls the current in the phase input with the highest voltage of the three-phase AC input voltage, and the lower boost circuit controls the current in the phase input with the lowest voltage of the three-phase AC input voltage. In addition, the current injection circuit controls the current in the phase input having a voltage between the highest voltage and the lowest voltage.

Advantageously, a current control loop is provided that generates appropriate pulse width modulated (PWM) control signals that control semiconductor switches of both (upper and lower) boost circuits and of the current injection circuit in order to control the current in each inductor or phase input. Advantageously, the pulse width modulated control signals that control semiconductor switches of the boost circuit (upper and lower boost circuit) and of the current injection circuit are interleaved in order to reduce the current stress (and thus potentially also the size) of the output filter capacitors, e.g. minimizing the ripple value and/or the RMS value of the output capacitor currents.

Advantageously, the electrical converter comprises an input filter. The input filter is operably coupled to, and may be considered as forming part of the boost circuit. The input filter advantageously comprises an inductor operably connected to each one of the upper intermediate node, the lower intermediate node and possibly the middle intermediate node.

The inductors can be connected in various ways. In one example, they are connected between the respective intermediate node and the boost circuit. In an alternative example, they are connected between the phase input terminals and the three-phase bridge rectifier.

The input filter can further comprise filter capacitors operably coupled to the inductors. The filter capacitors are advantageously connected between the phase input terminals and the above inductors. When the inductors are connected between the respective intermediate node and the boost circuit, the filter capacitors can be arranged either between the intermediate nodes and the above inductors, or between the phase input terminals and the three-phase bridge rectifier. When the inductors are connected between the phase input terminals and the three-phase bridge rectifier, the filter capacitors are connected between the phase input terminals and the inductors. The filter capacitors advantageously interconnect the upper intermediate node, the middle intermediate node, and the lower intermediate node. In each case, the filter capacitors are advantageously interconnected in a star configuration. When a star configuration is used, a star point is advantageously connected to a common node of the boost circuit, e.g. the node between the upper boost circuit and the lower boost circuit.

The upper boost circuit, the lower boost circuit and/or the current injection circuit advantageously comprise actively switchable semiconductor switches which are controlled through pulse width modulation. The pulse width modulated control signals are advantageously generated by current controllers for each of the upper boost circuit, the lower boost circuit, and the current injection circuit individually during normal operation.

Advantageously, the electrical converter comprises means for measuring one or more of: the three-phase AC input voltage, the inductor currents (of the first and possibly second and third inductors), the phase currents, and the DC output voltage. The measuring means can be coupled to the controller. The controller is advantageously configured to generate (PWM) control signals for the semiconductor switches of the electrical converter (e.g. of the phase selector and/or the boost circuits and/or the current injection circuit) based on these measurements and possibly based on provided set-values.

According to a second aspect of the present disclosure, there is provided a battery charging system, or a magnetic resonance imaging apparatus comprising the electrical converter of the first aspect.

According to a third aspect, there is provided a method of converting a three phase AC input into a DC output as set out in the appended claims. The method is advantageously implemented in the electrical converter as set out above.

An aspect of the present disclosure relates to an electrical converter, that, for example may be used for converting a three-phase AC voltage from an electrical grid, which may be a low voltage (e.g. 380-400 Vrms at 50 Hz frequency) grid, into a high DC output voltage (e.g. 800-1000 V).

DETAILED DESCRIPTION

FIG.1shows an electrical converter100, referred to as the DUTCH RECTIFIER, comprising an input converter stage11and an output converter stage12. Electrical converter100further comprises an input filter13, and an output filter15.

The electrical converter100is an AC-to-DC converter that has three phase inputs A, B, C which are connected to a three-phase voltage of a three-phase AC grid21, and two DC outputs P, N which for example may be connected to a DC load22such as, for example, a high voltage (e.g. 800 V) battery of an electric car.

The input converter stage11comprises three phase connections a, b, c that are connected to the three phase inputs A, B, C, and three outputs x, y, z. These outputs may be seen as an upper intermediate voltage node x, a lower intermediate voltage node y, and a middle intermediate voltage node z.

The input converter stage11comprises a three-phase bridge rectifier24consisting of three bridge legs16,17,18wherein each bridge leg comprises two passive semiconductor devices (diodes Daxand Dya, for leg16, Dbxand Dybfor leg17, Dcxand Dyc, for leg18) connected in the form of a half bridge configuration, and a phase selector25comprising three selector switches (Saza, Sbzb, and Sczc) which each comprise two anti-series connected actively switchable semiconductor devices. Each such switchable semiconductor device advantageously has an anti-parallel diode. In this example, Metal Oxide Field Effect Transistors (MOSFETs) are used for the actively switchable semiconductor devices, and each includes an internal anti-parallel body diode that may replace an external anti-parallel diode.

The output converter stage12comprises, or consists of, two stacked boost bridge legs19,20and one buck-boost bridge leg14. Each boost bridge leg (19,20) comprises a boost switch (Sxmfor the upper boost bridge leg19and Smyfor the lower boost bridge leg20) and boost diode (DxPfor the upper boost bridge leg19and DNyfor the lower boost bridge leg20) connected in a half-bridge configuration. The buck-boost bridge leg14comprises two buck-boost switches (SPz, and SzN) connected in a half-bridge configuration. The middle node r of the upper boost bridge leg19is connected to intermediate voltage node x via an upper boost inductor Lx, the middle node s of the lower boost bridge leg20is connected to intermediate voltage node y via a lower boost inductor Ly, and the middle node t of the buck-boost bridge leg14is connected to intermediate voltage node z via a middle buck-boost inductor Lz.

The common node m of the upper and lower boost bridge legs19,20is advantageously connected to the midpoint q of the output filter15which comprises two output filter capacitors CPm, CmNthat are connected in series between the upper output node P and the lower output node N and midpoint q forming the middle node between capacitors CPmand CmN.

The upper boost bridge leg19is connected between the upper output node P and the common node m (i.e. in parallel with the upper output filter capacitor CPm), and is arranged in a way that current can flow from the intermediate voltage node x to the upper output node P via the diode DxP, when the switch Sxmis open (not conducting, off state), and current can flow from the intermediate voltage node x to the common node m (or vice versa) via the switch Sxmwhen the switch Sxmis closed (conducting, on state). The boost switch (Sxm) of the boost bridge leg19is an actively switchable semiconductor device, for example a MOSFET.

The lower boost bridge leg20is connected between the common node m and the lower output node N (i.e. in parallel with the lower output filter capacitor CmN), and is arranged in a way that current can flow from the lower output node N to the intermediate voltage node y via the diode DNywhen the switch Smyis open (not conducting, off state), and current can flow from the common node m to the intermediate voltage node y (or vice versa) via the switch Smywhen the switch Smyis closed (conducting, on state). The boost switch (Smy) of the boost bridge leg20is an actively switchable semiconductor device, for example a MOSFET.

The buck-boost bridge leg14is connected between the upper output node P and the lower output node N (i.e. in parallel with the DC load22) and acts as a current injection circuit arranged such that current flows from the intermediate voltage node z to the upper output node P (or vice versa) when the switch SPzis closed (conducting, on state) while the switch SzNis open (not conducting, off state), and current flows from the intermediate voltage node z to the lower output node N (or vice versa) when the switch SzNis closed (conducting, on state) while the switch SPzis open (not conducting, off state). The buck-boost switches (SPz, SzN) of the buck-boost bridge leg14are actively switchable semiconductor devices, e.g. MOSFETs, which are controlled in a complementary way (i.e. the one is closed while the other is open and vice versa).

Advantageously, three high-frequency (HF) filter capacitors Cx, Cy, Cz, which are part of the input filter13, are interconnecting the intermediate voltage nodes x, y, z in the form of a star-connection. Generally, it is advantageous that the three capacitors Cx, Cy, Czhave substantially equal value in order to symmetrically load the AC grid.

According to an aspect of the present disclosure, the electrical converter100comprises a switching device23connected between the upper nodes of bridge rectifier24and the upper intermediate node x. Switching device23allows to interrupt the electrical connection between the bridge rectifier24and the upper intermediate node x. Switching device23is represented inFIG.1as a relay switch, but can alternatively be any suitable switching device, such as an active or at least controllable semiconductor switch, e.g. a MOSFET. The switching device23is advantageously operably connected to controller40.

According to an aspect of the present disclosure, the controller is configured to operate according to a first mode of operation, referred to as normal operation, and to a second mode of operation, referred to as start-up operation as will be further described herein.

The central control unit40advantageously controls all the controllable semiconductor devices (switches) of the electrical converter100, sending control signals to each switch via a communication interface50. In particular, semiconductor devices Saza, Sbzb, Sczc, Sxm, Smy, SPz, SzNare controlled by controller40. Furthermore, the control unit has measurement input ports (42,43,44,45), for receiving measurements of:42: the AC-grid phase voltages va, vb, vc;43: the inductor currents iLx, iLy, iLz,44: the DC bus voltage VpN;45: the DC bus mid-point voltage VmN=−VNm,
and an input port41to receive a set-value, which may be a requested DC output voltage V*PN. Controller operation allows particularly to accomplish the piece-wise sinusoidal shapes of inductor currents iLx, iLy, iLzduring normal operation.

The electrical converter100shown inFIG.1is unidirectional since the input stage11and the output converter stage12contain diodes, only allowing power to be drawn from the electrical AC grid21and provide this power at the output to a load22.FIG.5, on the other hand, shows an electrical converter200according to the present disclosure that is bidirectional. Electrical converter200differs from converter100in that the diodes (Dax, Dbx, Dcx, Dya, Dyb, Dyc) of the input stage11and the diodes (DxP, DNy) of the output converter stage12of the converter shown inFIG.1have been replaced with controllable semiconductor switches (Sxa, Sxb, Sxc, Say, Sby, Scy) in the input stage211and (SyN, SPx) in the output converter stage212respectively. The switching device23is provided as a semiconductor switch, e.g. MOSFET.

Normal Operation of the Electrical Converter

During normal operation, the switching device23is kept closed (conducting state) to apply the phase input having highest voltage by the bridge rectifier24to the upper intermediate node x.

Referring again toFIG.1, the bridge leg of bridge rectifier24that is connected with the phase input A, B, or C that has the highest voltage of the three-phase AC input voltage is switched in a way that the corresponding phase input A, B, or C is connected to the upper intermediate voltage node x. To achieve this, the bridge leg connects the corresponding phase connection a, b, or c with the node x via the upper diode (Dax, Dbx, Dcx) of the bridge leg, while the corresponding selector switch (Saza, Sbzb, Sczc) of the bridge leg is open (not conducting, off state). The bridge leg of the rectifier24that is connected with the phase input A, B, or C that has the lowest voltage of the three-phase AC input voltage is switched in a way that the corresponding phase input A, B, or C is connected to the lower intermediate voltage node y. To achieve this, the bridge leg connects the corresponding phase connection a, b, or c with the node y via the lower diode (Dya, Dyb, Dyc) of the bridge leg, while the corresponding selector switch (Saza, Sbzb, Sczc) of the bridge leg is open (not conducting, off state). The phase input A, B, or C that has a voltage between the highest voltage and the lowest voltage of the three-phase AC input voltage is connected by phase selector25to the middle intermediate voltage node z. To achieve this, the phase selector25connects the corresponding phase connection a, b, or c with the node z via the selector switch (Saza, Sbzb, Sczc) which is closed (conducting, on state).

In a three-phase AC grid with substantially balanced phase voltages, for example as shown inFIG.2A, the three-phase AC input voltage (shown inFIG.2A) is converted into three intermediate DC voltages (vxz, vzy, vxy; shown inFIG.2B) provided between the upper intermediate voltage node x, the lower intermediate voltage node y and the middle intermediate voltage node z. These DC voltages thus show piece-wise sinusoidal shapes. The conversion of the three-phase AC input voltage into three intermediate DC voltages is the result of the operation of the input stage11, as explained above. The switching states (switch on→S=1, switch off→S=0) of the selector switches (Saza, Sbzb, Sczc) are shown inFIG.2F. It can be seen that the switches are ‘on’ or ‘off’ continuously during whole particular 60° sectors within the period (360°) of the AC mains voltage. Also the diodes of the bridge rectifier24are ‘conducting’ or ‘not conducting’ during whole particular sectors, e.g. of 60°, within the period (360°) of the AC mains voltage. The combination of states of the switches and diodes is unique for every 60° sector of the three-phase AC input voltage and depends on the voltage value of the phase inputs (A, B, C). The sequence of the6unique states of the switches and diodes repeats itself every period (360°) of the AC mains voltage.

Seen from the viewpoint of the intermediate voltage nodes x, y, z towards the output terminals P, N, a conventional DC-DC boost circuit (upper boost circuit) is formed, comprising the HF filter capacitor Cx, the upper boost inductor Lx, the upper boost bridge leg19, and the upper output capacitor CPm. The input voltage of this upper boost circuit is the voltage vCx(shown inFIG.2C) across capacitor Cx, and the output voltage of this upper boost circuit is the voltage VPmacross the upper output capacitor CPm, having a voltage value that is substantially equal to half the total DC bus voltage (VPm≈VPN/2). The formed upper boost circuit may be operated by PWM modulation of the switch Sxmat a specified, possibly variable, switching frequency fsin order to control the current in the upper boost inductor Lx.

Seen from the viewpoint of the intermediate voltage nodes x, y, z towards the output terminals P, N, a conventional ‘inversed’ (negative input voltage and negative output voltage) DC-DC boost circuit (lower boost circuit) is formed, comprising the HF filter capacitor Cy, the lower boost inductor Ly, the lower boost bridge leg20, and the lower output capacitor CmN. The input voltage of this lower boost circuit is the voltage vCy(shown inFIG.2C) across capacitor Cyand the output voltage of this lower boost circuit is the voltage VNmacross the lower output capacitor CmN, having a voltage value that is substantially equal to minus half the total DC bus voltage (VNm≈−VPN/2). The formed lower boost circuit may be operated by PWM modulation of the switch Smyat a specified, possibly variable, switching frequency fsin order to control the current in the lower boost inductor Ly.

Seen from the viewpoint of the intermediate voltage nodes x, y, z towards the output terminals P, N, a conventional DC-DC buck-boost circuit (middle buck-boost circuit) is formed, comprising the HF filter capacitor Cz, the middle buck-boost inductor Lz, the buck-boost bridge leg14, and the series connection of the output capacitors CPm, CmN. This DC-DC buck-boost circuit may be seen as to be similar to a single-phase half-bridge voltage-source converter (VSC). The input voltage of this middle buck-boost circuit is the voltage vCz, (shown inFIG.2C) across capacitor Czand the output voltage of this middle buck-boost circuit is the output voltage VPNacross the series connection of the output capacitors CPm, CmN. The formed middle buck-boost circuit may be operated by PWM modulation of the switches SPz, SzNat a specified, possibly variable, switching frequency fsin order to control the current in the middle buck-boost inductor Lz.

FIG.2Gshows the state of the switch Sxmof the upper boost bridge leg19, the state of the switch Smyof the lower boost bridge leg20, and the state of the switch SPz(note that the state of the switch SzNis the complement of the state of the switch SPz) of the middle buck-boost bridge leg14. The switches Sxm, Smy, SPz, SzNare all PWM modulated as can be seen from the black-colored bars, indicating PWM modulation of the corresponding switch.

An example of the currents iLx, iLy, iLzin the inductors Lx, Ly, Lzis shown inFIG.2D. As can be seen, these currents are controlled to have piece-wise sinusoidal shapes and are transformed, i.e., as a result of the operation of the input stage11, into three sinusoidal AC phase currents ia, ib, iCwhich are shown inFIG.2E.

FIG.3shows a block diagram of an advantageous implementation of the central control unit40ofFIG.1during the first mode of operation referred to as normal operation. The electrical converter100is represented inFIG.3as a ‘single-wire’ equivalent circuit, wherein the annotations of the elements correspond with those given inFIG.1. Three slashes in a signal line indicate the bundling of three phase signals, and may represent the transition to a vector representation.

The goal of the control unit40is to control the output voltage VPNto a requested set-value V*PNthat is received from an external unit via input port41, and to balance the voltage across the two output capacitors CPmand CmN, for example by controlling the voltage across the lower output capacitor CmNto be substantially equal to half the DC bus voltage. Additionally, the current drawn from the phase inputs (a,b,c) needs to be shaped substantially sinusoidal and controlled substantially in phase with the corresponding phase voltage. As explained previously, this can also be achieved by controlling the inductor currents iLx, iLy, iLz, i.e., instead of directly controlling the phase currents ia, ib, ic, to have piece-wise sinusoidal shapes. In particular, the low-pass filtered values of the inductor currents are controlled while the high-frequency ripple of the inductor currents is filtered by the HF filter capacitors (Cx, Cy, Cz).

The control of the output voltage VPNis advantageously done using a cascaded control structure, comprising an outer voltage control loop60and inner current control loop70. The set-value of the output voltage is input to a comparator61via input port41, and is compared with the measured output voltage obtained from a measurement processing unit95(for example comprising a low-pass filter). The output of comparator61is the control-error signal of the output voltage, which is further input to a control element62(for example comprising a proportional-integral control block) that outputs the instantaneous set-values of the amplitudes of the phase currents. These amplitudes are input to multiplier63, and multiplied with signals that are obtained from calculation element64that outputs normalized instantaneous values of the phase voltages. The input of calculation element64are the measured phase voltages obtained from a measurement processing unit93(for example comprising a low-pass filter). The output of the multiplier63are set-values i*a, i*b, i*cfor the instantaneous, for example low-pass filtered, phase currents ia, ib, ic, and are shaped substantially sinusoidal and positioned substantially in phase with the corresponding phase voltages. The set-values i*a, i*b, i*care input to the current controller70after passing an addition element67and a selection element81whose functions are further detailed in the following text.

The current controller70is split into three individual current controllers71,74,77, wherein:individual current controller71is used for controlling the current in the middle buck-boost inductor Lz. This control is done by PWM modulation of the switches SPz, SzNof the middle buck-boost circuit containing middle buck-boost bridge leg14. As a result of the operation of the input stage11, therewith, controller71controls the current of the phase input A,B,C, that has a voltage between the highest voltage and the lowest voltage of the three-phase AC voltage;individual current controller74is used for controlling the current in the upper boost inductor Lx. This control is done by PWM modulation of the switch Sxmof the upper boost circuit containing upper boost bridge leg19. As a result of the operation of the input stage11, therewith, controller74controls the current of the phase input A,B,C, that has the highest voltage of the three-phase AC voltage;individual current controller77is used for controlling the current in the lower boost inductor Ly. This control is done by PWM modulation of the switch Smyof the lower boost circuit containing lower boost bridge leg20. As a result of the operation of the input stage11, therewith, controller77controls the current of the phase input A,B,C, that has the lowest voltage of the three-phase AC voltage.

Selector element81is used to send the set-values i*c, i*b, i*c(shown inFIG.2D) for the instantaneous phase currents to the correct individual current controller (71,74,77) depending on the voltage value of the phase inputs (A, B, C), resulting in inductor current set-values i*Lx, i*Ly, i*Lz(shown inFIG.2E) for each inductor current controller, wherein:the set-value of the phase current of the phase input A,B,C, that has the highest voltage of the three-phase AC voltage is sent to individual current controller74, resulting in set-value i*Lx;the set-value of the phase current of the phase input A,B,C, that has the lowest voltage of the three-phase AC voltage is sent to individual current controller77, resulting in set-value i*Ly;the set-value of the phase current of the phase input A,B,C, that a voltage between the highest voltage and the lowest voltage of the three-phase AC voltage is sent to individual current controller71, resulting in set-value i*Lz.

In each individual current controller the received set-value (i*Lx, i*Ly, i*Lz) for the instantaneous inductor current is input to a comparator, for example comparator72of individual current controller71, and compared with the measured inductor current obtained from a measurement processing unit94(for example comprising a low-pass filter). The output of the comparator is the control-error signal of the current, which is further input to a control element, for example control element73of individual current controller71, whose output is input to a PWM generation element, for example PWM generation element54of individual current controller71. The PWM generation element of the individual current controllers generate the PWM-modulated control signals for the controllable semiconductor switches of the PWM-controlled bridge legs, i.e. the upper boost bridge leg19of the upper boost circuit, the lower boost bridge leg20of the lower boost circuit, and the middle buck-boost bridge leg14of the middle buck-boost circuit. These PWM-modulated control signals are sent to the appropriate bridge legs via communication interface50.

The selector switches of the input stage11are either ‘on’ or ‘off’ during each 60° sector of the three-phase AC input voltage, depending on the voltage value of the phase inputs (A, B, C). The control signals for the selector switches are generated by switch-signal generators51,52,53.

DC bus mid-point balancing can be done by adding an offset value to the set-values i*a, i*b, i*cfor the instantaneous, for example low-pass filtered, phase currents ia, ib, ic, which are output by multiplier63. The offset value is obtained by comparing the measured DC bus midpoint voltage obtained from a measurement processing unit96(for example comprising a low-pass filter) with a set-value (for example VPN/2) using comparator65and feeding the error signal output by the comparator65into a control element66.

The phase currents ia, ib, icshown inFIG.2Eare obtained by controlling the electrical converter100using such control unit40and control method detailed in the foregoing text. Also shown inFIG.2Eare the set-values i*a, i*b, i*cfor the instantaneous, for example low-pass filtered, phase currents ia, ib, ic, as input to selector element81shown inFIG.3. As explained above, the phase currents ia, ib, icare indirectly controlled, i.e., they are the result of the controlling of the inductor currents iLx, iLy, iLz(shown inFIG.2D) and the operation of the input stage11. The set-points for the inductor currents (i*Lx, i*Ly, i*Lz) are derived from set-values i*a, i*b, i*cby selector element81based on the measured phase voltages.

FIGS.4A-4Cshow diagrams within five consecutive switching cycles (i.e., each having a switching period Tsequal to 1/fs, with fsthe switching frequency) of the bridge legs of the electrical converter100, for a time interval around ωt=45° which lies within the sector of the three-phase AC input voltage where 0 ωt≤60° (seeFIG.2). Within this sector, the selector switches and diodes of the input stage11are in the following switching states:Switch Saza=0 (off), diode Dax=1 (conducting), diode Dya=0 (blocking); phase connection a is connected with node x;Switch Sbzb=0 (off), diode Dbx=0 (blocking), diode Dyb=1 (conducting); phase connection b is connected with node y;Switch Sczc=1 (on), diode Dcx=0 (blocking), diode Dyc=0 (blocking); phase connection c is connected with node z;

The diagrams ofFIGS.4A-4Cshow voltages, currents, and switching signals on a milliseconds time axis.FIG.4Acorresponds with the operation of the upper boost circuit, showing the corresponding inductor current iLx(and the set-value i*Lxof this current), the inductor voltage vLx, and the control signal Sxmof the switch of the PWM-modulated upper boost bridge leg19.FIG.4Bcorresponds with the operation of the lower boost circuit, showing the corresponding inductor current iLy(and the set-value i*Lyof this current), the inductor voltage vLy, and the control signal Smyof the switch of the PWM-modulated lower boost bridge leg20.FIG.4Ccorresponds with the operation of the middle buck-boost circuit, showing the corresponding inductor current iLz(and the set-value i*Lzof this current), the inductor voltage vLz, and the control signal SPzof the upper switch of the PWM-modulated bridge leg14. Note that the control signal SzNof the lower switch of the PWM-modulated bridge leg14is the complement of the control signal SPz.

In order to minimize the Total Harmonic Distortion (THD) of the AC input current of the electrical converter, the high-frequency ripple of phase currents ia, ib, icis advantageously minimized.

An advantage of the electrical converter100is that the half-switching-period volt-seconds product/area of the upper boost inductor and of the lower boost inductor are smaller than the volt-seconds products/areas of the boost inductors of a conventional six-switch boost-type PFC rectifier. This is because the voltages applied to these inductors are smaller than in the case of a conventional six-switch boost-type PFC rectifier. For the middle buck-boost inductor, the applied voltages are not necessarily smaller but the value of the current flowing in the inductor is smaller than the value of the currents flowing in inductors of a conventional six-switch boost-type PFC rectifier. As a result, smaller inductors with less magnetic energy storage are feasible, resulting in a higher power-to-volume ratio of the electrical three-phase AC-to-DC converter100that is provided by the present disclosure.

Start-Up (Pre-Charge) Operation of the Electrical Converter

At start-up, it is important for the service life of the electrical components to gradually step up the output voltage VPN. According to the present disclosure, a dedicated mode of operation is implemented in the controller40. Referring toFIG.5, switching device23is opened to interrupt conduction between the upper nodes of the bridge rectifier24and the upper intermediate node x. No current flows through inductor Lx. The phase selector25is now operated to apply at the middle intermediate node z a phase input voltage which is slightly higher than the (instantaneous) output voltage VPNacross the output terminals P, N. By so doing, a phase current flows through inductor Lzand further to the upper output terminal P due to the conduction of the (internal) anti-parallel diode DzPconnected to switch SPzbetween switch node t and terminal P. The current path is indicated by the arrows inFIG.5and hence goes from middle intermediate node z through switch node t through the anti-parallel diode DzPand through the capacitors CPm, CmNof the output filter15and back to lower intermediate node y.

It will be convenient to note that neither one of switches SPzand SyNneed to be operated and these switches may remain in the non-conductive state (open). Alternatively, switches SPzand SyNmay be actively operated by controller40such that SPzis conducting while SyNis kept open, or vice versa, depending on the switching scheme that is utilized, as will be described further below. By so doing, losses are reduced compared to the case of operating exclusively through the anti-parallel diode DzP.

Referring toFIG.6, the phase selector25is advantageously operated to connect a phase input A, B, C that has a falling (descending) voltage to the middle intermediate node z, when this falling voltage has a level above the instantaneous voltage potential at terminal P. The time instants t1when to connect the phase input having a falling voltage to middle intermediate node z can be suitably selected as the instant at which the phase voltage va, vb, vcfalls below a threshold value above the voltage potential at P (VPN), e.g. between 5 V and 10 V above the instantaneous value of the voltage potential at P. In a second alternative, t1is selected as a predetermined time, e.g. between 1 μs and 10 μs prior to t2, wherein t2is the time instant when the falling phase voltage attains/crosses the value of the voltage potential at P. The second alternative can be implemented by predicting the time instant t2, e.g. based on data of the previous cycle(s) and/or based on measurements of the phase input voltages and output voltage.

Each time a switch Saza, Sbzb, and Sczcof the phase selector25is operated to connect the falling phase voltage to the middle intermediate node, a current pulse flows through the inductor Lzand the output filter, thereby charging the capacitors CPm, CmNand increasing VPNa further step. It will be convenient to note that by appropriately selecting the time instant t1it is possible to control a magnitude of the current pulse, and thus the dynamics of the pre-charge of the output stage.

At time instant t2, the falling phase voltage attains/crosses the value of the voltage potential at P corresponding to a maximum of the current pulse. Thereafter, the current magnitude through the inductor Lzdiminishes until becoming zero at time instant t3. At t3, the diode DzPswitches to non-conducting state, and, in case switch SPzis actively controlled during the pre-charge operation, controller40controls switch SPzto switch to non-conducting state. This prevents the current to become negative and discharge the capacitors of the output filter.

Controller40is configured to operate switches Saza, Sbzb, and Sczcof the phase selector25to selectively connect the appropriate phase input to the middle intermediate node as described above. That is, the appropriate switch Saza, Sbzb, and Sczcis switched to conducting state at time instant t1and disconnected at time instant t3or thereafter. Where the phase selector switches Saza, Sbzb, and Sczcare formed by two semiconductor switches (FET) placed in anti-series, each having an anti-parallel diode, e.g. to obtain current-bidirectionality, it is possible to operate only one of the two FET-switches, while the other one is conducting through the anti-parallel diode. By so doing, the respective anti-parallel diode automatically turns to non-conducting state when the current becomes negative. As a result, switching of SPzat t3becomes less critical. The electrical converter advantageously comprises voltage measurement sensors for measuring the phase voltages at the input terminals A, B, C and which are operably coupled to the controller40for using the sensed voltage levels when selecting the time instants t1.

An alternative embodiment for the start-up operation according to the present disclosure is now described in relation toFIG.7, presenting electrical converter400which differs from electrical converter100or200in the position of the switch23. Switch23between the upper nodes of the rectifier bridges16,17,18and the upper intermediate node x is dispensed with and replaced by switch43between the lower nodes of the rectifier bridges16,17,18and the lower intermediate node y. Such an arrangement allows to obtain a stepwise pre-charging of the DC bus voltage VPNthrough a reverse current flow scheme, as indicated by the arrows inFIG.7.

During start-up mode of operation, the controller40operates switch43(or switch23in case ofFIG.1) to be in open (non-conducting) state. Rectifier bridge24ensures that the highest phase voltage at the input terminals A, B, C is applied to the upper intermediate node x, resulting in the output node P to be at a high potential. Controller40then operates the switches of the phase selector25to allow for a return current path now that the lower rectifier bridge switches Dya, Dyb, Dycare disconnected from the lower intermediate nodes. By so doing, an electric current can be made to flow through the output filter15as indicated inFIG.8charging the capacitors CPmand CmN. The current flow is hence from the upper intermediate node through node r and DxP, to the output filter15and through the (anti-parallel diode of) lower switch SzNto switch node t and back to middle intermediate node z, from where the current is delivered back to the input terminals by appropriate switching of phase selector25. During this operation, switch SPzof the buck-boost circuit is left in open state (non-conducting) and switch SzNcan be in open or closed state. If left open, the current path will flow through the anti-parallel diode coupled to SzN.

An advantageous switching scheme of the switches of phase selector25of converter400is graphically shown inFIG.8. The phase selector25is advantageously operated to connect a phase input A, B, C that has a rising (increasing) voltage to the middle intermediate node z, when this rising voltage has a level below the instantaneous voltage potential at terminal N. The time instants t1when to connect the phase input having a rising voltage to middle intermediate node z can be suitably selected as the instant at which the phase voltage va, vb, vcrises above a threshold value below the instantaneous voltage potential at N, e.g. between 5 V and 10 V below the instantaneous potential at N. In a second alternative, t1is selected as a predetermined time, e.g. between 1 μs and 10 μs prior to t2, wherein t2is the time instant when the rising phase voltage attains/crosses the value of the voltage potential at N. The second alternative can be implemented by predicting the time instant t2, e.g. based on data of the previous cycle(s) and/or based on measurements of the phase input voltages and output voltage. At time instant t3, the current becomes zero again and the anti-parallel diode coupled to SzNswitches to non-conducting state. If SzNis actively switched, it is turned off at t3. Also, starting from t3, the phase selector switch that is in conducting state during t1-t3can be switched to non-conducting state. Where the phase selector switches Saza, Sbzb, and Sczcare formed by two semiconductor switches (FET) placed in anti-series, each having an anti-parallel diode, e.g. to obtain current-bidirectionality, it is possible to operate only one of the two FET-switches, while the other one is conducting through the anti-parallel diode. By so doing, the respective anti-parallel diode automatically turns to non-conducting state when the current becomes negative. As a result, switching of SzNat t3becomes less critical.

InFIG.9, an electrical converter300is shown which differs from converter100in that the input filter13is placed before (instead of after) input stage11, i.e. the input filter13is connected between the phase input terminals A, B, C and the input stage11. The input stage11connects the phase input terminals A, B, C to the intermediate nodes x, y, z via the corresponding inductor La, Lb, Lcof the input filter13. Capacitors Ca, Cb, Ccare arranged between the phase input terminals and the inductors. The capacitors are connected in a star configuration, advantageously with the star point connected to a midpoint of the output filter15, just like in the previous examples. Alternatively, the capacitors Ca, Cb, Cccan be arranged in a delta configuration across the three phase input lines. It will be convenient to note that in the example ofFIG.9, the voltage signal at the three intermediate nodes x, y, z is somewhat different as compared to the previous examples (FIGS.1,5and7), since the voltages at switch nodes r, s and t are identical to the voltages at the intermediate nodes x, y, z. As a result, high frequency currents will be flowing through the input stage11, whereas in the previous examples (FIGS.1,5andFIG.7) the high frequency currents only occur in the output converter stage downstream of the input filter13.

In either electrical converters100,300and400, diodes may be replaced by actively switchable semiconductor devices to allow for bidirectional power flow of the electrical converter.

In either electrical converters100-400, the HF capacitors Cx, Cy, CZ(or Ca, Cb, Ccin case ofFIG.9) are connected in a star configuration. The voltage in the star point connection can be controlled by controlling the voltage at the common node m.

Referring again toFIG.1, one advantage of aspects of the present disclosure, is that no inrush current limiter, e.g. a resistor, need be provided in parallel with switch23. This reduces losses, prevents bulkiness, and increases service life.

FIG.10A-Dshow different variants of the input stage11, which may be used in the electrical converters100-400described above.

Referring toFIG.100andFIG.10D, it will be convenient to note that in the converter stages of, the functionality of the switch23can be taken up by active (bidirectional) switches in the bridge legs16-18. Thyristors Thyax, Thybx, Thycxin the upper bridge legs input stage11inFIG.100and alternatively thyristors Thyya, Thyyb, Thyycin the input stage ofFIG.10Dcan be controlled by controller40during the second mode of operation to keep the upper intermediate node x or the lower intermediate node y disconnected from all three phase terminals A, B, C, thereby obtaining switch23, and avoiding the need for an additional hardware switch23as inFIG.1. In a further alternative, a (current-)bidirectional active switch can be used instead of Thyristors Thyax, Thybx, Thycxand/or thyristors Thyya, Thyyb, Thyyc, such as a pair of anti-series connected MOSFETs, each having an anti-parallel diode.

Referring toFIG.11, a variant of the electrical converter100ofFIG.1is shown. Electrical converter500differs from the converter100ofFIG.1in that a single boost circuit19, rather than two stacked boost circuits19,20are used. Boost circuit19now comprises switch Sxyconnected between the nodes r and s. The output filter15can comprise a single capacitor CPNwith no middle node. Other variants are possible, wherein the boost circuit19is omitted as well.

Referring toFIG.12, the electrical converter100(and which may alternatively be the electrical converter200,300or400) can comprise a connection terminal n for connecting the neutral conductor of the three-phase AC grid. In some applications, such as for example the charging of electric vehicles, it is often required that the amplitude of the sinusoidal current drawn from each phase of the three-phase grid can be independently controlled in order to be able to decrease the loading of a certain phase such that other consumer devices are still able to draw power from that particular phase during the charging of the vehicle's battery while not overloading the phase. In this case, the connection terminal n is advantageously connected to the neutral conductor of the three-phase grid, allowing a return current substantially equal to the sum of the three phase currents to flow back to the neutral conductor of the grid. In an advantageous aspect, the three phase currents can be fully independently controlled by providing a common node connected to the neutral conductor of the input.

The neutral connection terminal n is advantageously connected to the star-point of the AC capacitors Cx, Cy, CZand to the common node m of the stacked boost bridges19,20(and thus also to the midpoint of the output filter15). This results in a fully symmetrical converter structure. In this case, the voltage at the star-point and at the common node is equal to the voltage of the neutral conductor of the grid. A connection between common node m and midpoint q of the output filter15can or cannot be present.

It will be convenient to note that electrical converters according to the present disclosure can be contemplated comprising both switch23between the upper nodes of the bridge rectifier and the upper intermediate node x and switch43between the lower nodes of the bridge rectifier and the lower intermediate node y. During pre-charge operation, the controller may allow to alternate between pre-charging the DC bus based by opening switch23(switch43closed) and pre-charging the DC bus by opening switch43(switch23closed).

Referring toFIG.13, in case the switching device23cannot be kept in conductive state (closed) when the converter is turned off, it may be convenient to add a buffer circuit26across the three phase bridge rectifier24. The buffer circuit26comprises a capacitor possibly in parallel with a resistor and acts to capture (and dissipate) energy stored in the inductances of any input filter and of the power mains. This avoids damage when the converter would need to shut down, for example when it would go to error mode due to an overvoltage or overtemperature. The buffer circuit can comprise a capacitor in series with a Zener diode connected between the upper and lower nodes of the bridge rectifier24. A diode can additionally be placed in anti-series with the Zener diode to reduce reactive power consumption of the capacitor during normal operation. Alternatively a surge arrestor can be provided instead of the Zener diode and the capacitor.

Referring toFIG.14, a battery charging system700comprises a power supply unit704. The power supply unit704is coupled to an interface702, e.g. comprising a switch device, which allows to connect the power supply unit704to a battery703. The power supply unit704comprises any one of the electrical converters100,200,400as described hereinabove coupled to a DC-DC converter701. DC-DC converter is coupled between the DC terminals P, N of the electrical converter100and the DC terminals P′, N′ of the power supply704. The DC-DC converter701can be an isolated DC-DC converter. The DC-DC converter can comprise a transformer effecting galvanic isolation, particularly in case of wired power transfer between power supply unit704and the battery703. The DC-DC converter can comprise a pair of coils which are inductively coupled through air, such as in case of wireless power transfer. In some cases, the interface702can comprise a plug and socket, e.g. in wired power transfer. Alternatively, the plug and socket can be provided at the input (e.g., at nodes A, B, C).