Snubber circuit and power supply device

A snubber circuit connected to a switching circuit, wherein the switching circuit including a higher side switch element connected between a high potential node and a switch node, a lower side switch element connected between the switch node and a reference potential node, and a bypass capacitor connected between the high potential node and the reference potential node, the snubber circuit comprising: a snubber capacitor; a diode; and a coil, wherein a negative electrode of the snubber capacitor is connected to the reference potential node, an anode of the diode is connected to the switch node and a cathode of the diode is connected to a positive electrode of the snubber capacitor, and one end of the coil is connected to the positive electrode of the snubber capacitor and the other end of the coil is connected to the high potential node.

CROSS-REFERENCE TO RELATED APPLICATION

The present application claims priority from Japanese Application JP2020-072502, the content of which is hereby incorporated by reference into this application.

BACKGROUND

Field

The following disclosure relates to a snubber circuit.

The snubber circuit is added to suppress a surge voltage applied to a switch element. On the other hand, losses that occur in the snubber circuit are also problematic. JP 2012-39810 A discloses a discharge blocking snubber for reducing a loss in a snubber circuit.

SUMMARY

However, even with such a discharge blocking snubber, there is still room for loss reduction. One aspect of the present disclosure has an object to provide a snubber circuit capable of reducing a loss as compared to the related art.

In order to solve the above problem, a snubber circuit according to one aspect of the present disclosure is a snubber circuit connected to a switching circuit, the switching circuit being provided with a high potential node, a switch node, and a reference potential node, the switching circuit including a higher side switch element connected between the high potential node and the switch node, a lower side switch element connected between the switch node and the reference potential node, and a bypass capacitor connected between the high potential node and the reference potential node, the snubber circuit including a snubber capacitor, a diode, and a coil, wherein a negative electrode of the snubber capacitor is connected to the reference potential node, an anode of the diode is connected to the switch node and a cathode of the diode is connected to a positive electrode of the snubber capacitor, and one end of the coil is connected to the positive electrode of the snubber capacitor and the other end of the coil is connected to the high potential node.

Additionally, in order to solve the above problem, a snubber circuit according to one aspect of the present disclosure is a snubber circuit connected to a high potential node, a switch node, and a reference potential node, the snubber circuit including a snubber capacitor, a diode, and a coil, wherein a negative electrode of the snubber capacitor is connected to the reference potential node, an anode of the diode is connected to the switch node and a cathode of the diode is connected to a positive electrode of the snubber capacitor, and one end of the coil is connected to the positive electrode of the snubber capacitor and the other end of the coil is connected to the high potential node.

According to one aspect of the present disclosure, it is possible to reduce the loss in the snubber circuit as compared to the related art.

DESCRIPTION OF EMBODIMENTS

First Embodiment

A snubber circuit1according to a first embodiment suppresses a surge voltage generated in a power supply circuit10as well as suppresses losses generated in the snubber circuit1. These contents are described below usingFIG. 1toFIG. 4. A configuration of the power supply circuit10will be described usingFIG. 1. Operations of the power supply circuit10and snubber circuit1will be described usingFIG. 2toFIG. 4.

In each embodiment hereinafter, components having the same functions as those of components described in the first embodiment are denoted by the same reference signs, and descriptions thereof will not be repeated. For the sake of brevity, a “high-voltage power supply HV1” is also simply referred to as “HV1”, for example. Also, note that each numerical value described below is merely an example.

Overview of Configuration of Power Supply Circuit10

The power supply circuit10is a bidirectional DC-DC converter that can bidirectionally transmit electric power between a high-voltage power supply HV1and a low-voltage power supply LV1. The power supply circuit10is provided with a switching circuit5and the snubber circuit1. The snubber circuit1is connected to the switching circuit5.

Configuration of High-Voltage Portion of Power Supply Circuit10

A high-voltage portion is provided with HV1, a capacitor HC1, and a bypass capacitor BC1. HV1has a voltage of 400 V on a positive electrode side, and a voltage of 0 V on a negative electrode side. An electrostatic capacitance of HC1is 1 mF. BC1is a film capacitor having an electrostatic capacitance of 1 μF. In the first embodiment, 0 V is set as a reference potential. The node of 0 V is referred to as a reference potential node. Further, a potential higher than the reference potential is referred to as a high potential. Then, a node having the high potential is referred to as a high potential node. The high potential described herein is, for example, a voltage of 10 V to 1200 V. A 400 V node determined by the voltage of HV1is an example of the high potential node.

BC1is located at a position closer to a switch portion described below than HC1. BC1is connected between the high potential node and the reference potential node.

Configuration of Low-Voltage Portion of Power Supply Circuit10

A low-voltage portion is provided with LV1, a capacitor LC1, and a coil CO1. LV1has a voltage of 200 V on a positive (+) electrode side, and a voltage of 0 V on a negative (−) electrode side. An electrostatic capacitance of LC1is 1 μF. An inductance of CO1is 1 mH and an average current of CO1is 12 A.

Configuration of Switch Portion of Power Supply Circuit10

The switch portion has a half-bridge structure by a higher side switch element HS1and a lower side switch element LS1. A connection point between HS1and LS1is a switch node. One end of CO1is connected to the switch node. HS1is connected between the high potential node and the switch node. LS1is connected between the switch node and the reference potential node.

Gate terminals of HS1and LS1are connected to a control circuit9described later. A voltage at the switch node is switched between 400 V and 0 V by switching HS1or LS1.

Both HS1and LS1are cascode GaN-HEMTs with a drain withstand voltage of 650 V and an on-resistance of 50 mΩ. In the example ofFIG. 1, the circuit symbol of the MOSFET is used to represent the cascade GaN-HEMT. HS1and LS1may be replaced by other switch elements depending on the type of the power supply circuit. Note that the definition of the switch element herein is as follows.

“Switch element”: An element capable of changing voltage of the switch node. Examples of switch element include a rectifying element, a transistor element, and a magnetic element (e.g., transformer winding and coil).

Configuration of Switch Circuit5of Power Supply Circuit10

A configuration in which BC1is added to the switch portion including HS1and LS1is the switching circuit5.

Configuration of Snubber Circuit1of Power Supply Circuit10

The snubber circuit1includes a snubber capacitor SC1, a diode SD1, and a coil SL1.

SC1is a multilayer ceramic capacitor having a withstand voltage of 630 V and an electrostatic capacitance of 4.7 nF. A negative electrode of SC1(lower side inFIG. 1) is connected to the reference potential node.

SD1is a Fast Recovery Diode (FRD) having a withstand voltage of 600 V, a VF of 1 V at the start of conduction, and a resistance of 0.13Ω in a conductive state. An anode of SD1is connected to the switch node. A cathode of SD1is connected to a positive electrode of SC1(upper side inFIG. 1).

SL1is a chip coil having an inductance of 470 nH and a resistance of 70 mΩ. One end of SL1is connected to the positive electrode of SC1. The other end of SL1is connected to the high potential node.

Description of Operation of Power Supply Circuit10

The power supply circuit10operates in the same manner as a general bidirectional DC/DC converter. Power is transferred bi-directionally by controlling on and off of HS1or LS1. When LS1is turned off, a surge voltage is generated between the reference potential node and the switch node. In other words, a surge voltage is generated at LS1.

The operation of the snubber circuit1will be described usingFIG. 2toFIG. 4.

FIG. 2is a diagram illustrating current paths in the snubber circuit1inFIG. 1. InFIG. 2, the same circuit diagram as inFIG. 1is illustrated, but some reference signs used inFIG. 1are omitted.

FIG. 3illustrates a waveform of each portion of the snubber circuit1based on a common time axis (horizontal axis). Each waveform inFIG. 3illustrates:LS1V (voltage of LS1): voltage of the switch node with reference to the reference potential node;SC1V (voltage of SC1): a voltage of the positive electrode with reference to the negative electrode;SL1V (voltage of SL1): a terminal voltage on the SC1side with reference to a terminal on the high potential node side;SD1I (current of SD1): a current flowing from the anode to the cathode;SL1I (current of SL1): a current flowing from the terminal on the SC1side to the terminal on the high potential node side; andSC1I (current of SC1): a current flowing from positive electrode to negative electrode.

Method of Operating Snubber Circuit1

In the operation of the snubber circuit1, following three processes are executed in this order.

First process: generate a surge voltage between the reference potential node and the switch node;

Second process: charge the surge voltage to SC1via SD1;

Third process: the voltage of SC1charged is discharged to the high potential node via SL1.

First Process: Generate Surge Voltage

In the first process, LS1is switched from on to off. A timing of the switch is a point in time of “1.47 E-5 sec” inFIG. 3. This switch generates a surge voltage at the switch node based on the reference potential node. In a case that the snubber circuit1is not connected to the power supply circuit10, a surge voltage 480 V is generated with respect to a steady voltage 400 V (not illustrated). In the first embodiment, the surge voltage is suppressed to 410 V because the snubber circuit1is connected to the power supply circuit10(see LS1V inFIG. 3).

Second Process: Charge Surge Voltage to SC1

The reduced surge voltage (480 V−410 V=70 V) as described above is absorbed into SC1via SD1. In other words, the surge voltage charges SC1. A timing of the charging is immediately after (approximately at the same time as) the first process. A timing of the charging is a point in time of “1.475 E-5 sec” inFIG. 3. Flow of SD1I and SC1I, and an increase in SC1V (charge of SC1) can be confirmed.

A charging path for SC1is illustrated by an arrow AR1inFIG. 2. AR1includes a path to return to BC1from BC1via HS1, SD1, and SC1.

Third Process: Discharge Voltage of SC1to High Potential Node

The charged voltage of SC1changes from a steady state (400 V) to 410 V (see SC1V inFIG. 3). A timing of the discharge start of SC1is a point in time of “1.48 E-5 sec” inFIG. 3. The voltage of SC1is slowly discharged to the high potential node by SL1over a period of “1.48 E-5 to 1.53 E-5 sec.” In the case of the power supply circuit10, the voltage of SC1charges BC1connected to the high potential node.

A discharging path for SC1is illustrated by an arrow AR2inFIG. 2. AR2includes a path to return to SC1from SC1via SL1and BC1.

The discharge current of SC1is smoothed by SL1to slowly charge BC1. Thus, loss of the snubber circuit1can be reduced.

Improvements 1 and 2 for Operating Snubber Circuit1

In the first embodiment, a plurality of preferred improvements are applied. These preferred improvements will be described below.

Improvement 1: Inductance of Discharging Path of SC1is Greater than Inductance of Charging Path of SC1

In the example of the first embodiment, the inductance of the path AR1(hereinafter, referred to as L1) is designed to be as small as 50 nH. For this reason, the surge voltage is rapidly absorbed by SC1, and thus, can be effectively suppressed. On the other hand, the inductance of the path AR2(hereinafter, referred to as L2) is designed to be large as much as 500 nH. For this reason, the discharge of SC1is performed gently, and thus, the loss can be reduced. Designing L2to be large and L1to be small leads to both the suppressed surge voltage and the reduced loss of the snubber circuit. Specifically, L2is preferably two times L1or more, and more preferably 10 times or more. In the first embodiment, L2is designed to be 10 times L1.

Improvement 2: Resonance Frequency of SL1V by Turning on LS1is 10 MHz or Less

Here, a problem of the surge voltage of SL1rather than LS1is picked up.

When LS1is turned on (point in time of “1.99 E-5 sec” inFIG. 4), a resonance is generated in SL1V due to a surge voltage being applied to SL1. This phenomenon causes a loss in SL1of the snubber circuit1. In the improvement 2, loss reduction due to the voltage resonance of SL1is performed.

FIG. 4is a graph of SL1V with the time axis inFIG. 3being enlarged. A period T1inFIG. 4indicates a period 3.00 E-7 sec of a voltage amplitude of SL1V. In other words, the resonance frequency of SL1V is 3.3 MHz.

Note that the “resonance frequency” of SL1V herein refers to a frequency (3.3 MHz) of a component that indicates the highest voltage amplitude at the period T1among the frequency components included in SL1V. In the example ofFIG. 4, a high frequency component (e.g., a component of 50 MHz) included in the period T1has a small voltage amplitude. Thus, 50 MHz is not applicable to the definition of the resonance frequency herein.

The frequency component of SL1V indicating the highest voltage amplitude has a large effect, on the loss of SL1. Thus, reducing the resonance frequency defined as above is effective for reducing the SL1loss.

By suppressing the resonance frequency to 10 MHz or less, the SL1loss (core loss and eddy current loss) can be reduced. By setting the resonance frequency to be 10 MHz or less, a small coil using ferrite can be used. The resonance frequency is determined by the inductance of AR2and the electrostatic capacitance of SC1. By appropriately adjusting these two values, the resonance frequency can be set to 10 MHz or less.

Second Embodiment

FIG. 5is a diagram illustrating a power supply device100provided with the power supply circuit10. The power supply circuit10is provided with the snubber circuit1, the switching circuit5, and the control circuit9. The control circuit9controls ON/OFF switching of the elements provided in the power supply circuit10. In particular, the control circuit9controls the ON/OFF switching of HS1and LS1. Application examples of the power supply circuit10include inverter circuits and totem-pole power factor correction (PFC) circuits. The power supply device100suppresses the surge voltage by the snubber circuit1and also reduces the losses.

Supplement

A snubber circuit according to a first aspect of the present disclosure is a snubber circuit connected to a switching circuit, the switching circuit being provided with a high potential node, a switch node, and a reference potential node, the switching circuit including a higher side switch element connected between the high potential node and the switch node, a lower side switch element connected between the switch node and the reference potential node, and a bypass capacitor connected between the high potential node and the reference potential node, the snubber circuit including a snubber capacitor, a diode, and a coil, wherein a negative electrode of the snubber capacitor is connected to the reference potential node, an anode of the diode is connected to the switch node and a cathode of the diode is connected to a positive electrode of the snubber capacitor, and one end of the coil is connected to the positive electrode of the snubber capacitor and the other end of the coil is connected to the high potential node.

According to the above configuration, the surge voltage generated in the lower side switch element charges the snubber capacitor. The snubber capacitor is charged in a path including the bypass capacitor, the higher side switch element, and the diode. This charged voltage is smoothed by the coil and is used for regeneration for the bypass capacitor (slowly charging the bypass capacitor). Thus, the loss of the snubber circuit can be reduced.

In the snubber circuit according a second aspect of the present disclosure, an inductance of a path including the snubber capacitor, the coil, and the bypass capacitor is larger than inductance of a path including the bypass capacitor, the higher side switch element, the diode, and the snubber capacitor.

According to the above configuration, the surge voltage can charge the snubber capacitor at high speed in the path having the smaller inductance. That is, the surge voltage can be quickly absorbed by the snubber capacitor. The voltage of the snubber capacitor charged by absorption of the surge voltage can be smoothed by a large inductance and be used for slow regeneration for the bypass capacitor.

In the snubber circuit according to a third aspect of the present disclosure, after the lower side switch element is turned on, a resonance frequency of a voltage applied to the coil is 10 MHz or less.

According to the above configuration, the loss occurring in the coil can be reduced.

A power supply device according to a fourth aspect of the present disclosure includes the snubber circuit according to one aspect of the present disclosure.

According to the above configuration, a power supply device with reduced loss can be provided by using the snubber circuit with reduced loss.

A snubber circuit according to a fifth aspect of the present disclosure is a snubber circuit connected to a high potential node, a switch node, and a reference potential node, the snubber circuit including a snubber capacitor, a diode, and a coil, wherein a negative electrode of the snubber capacitor is connected to the reference potential node, an anode of the diode is connected to the switch node and a cathode of the diode is connected to a positive electrode of the snubber capacitor, and one end of the coil is connected to the positive electrode of the snubber capacitor and the other end of the coil is connected to the high potential node.

According to the above configuration, the surge voltage generated between the high potential node and the switch node is absorbed by the snubber capacitor via the diode (the snubber capacitor is charged). This charged voltage is smoothed using the coil and slowly discharged to the nigh potential node. Thus, the loss of the snubber circuit can be reduced.

SUPPLEMENTARY INFORMATION

An aspect of the present disclosure is not limited to each of the embodiments described above. It is possible to make various modifications within the scope indicated in the claims. An embodiment obtained by appropriately combining technical elements each disclosed in different embodiments falls also within the technical scope of an aspect of the present disclosure. Furthermore, technical elements disclosed in the respective embodiments may be combined to provide a new technical feature.