MEMS SENSOR AND MANUFACTURING METHOD THEREOF

The present disclosure provides a MEMS sensor. The MEMS sensor includes: a semiconductor substrate having a first surface and a second surface opposite to the first surface, and including a cavity; a membrane on the first surface to seal the cavity; a first region of a first conductivity type formed at a bottom of the cavity; and a second region of a second conductivity type formed on the membrane, facing the first region and separated from the first region by the cavity.

TECHNICAL FIELD

The present disclosure relates to a micro-electro-mechanical system (MEMS) sensor and a method of manufacturing a MEMS sensor.

BACKGROUND

Patent publication 1 discloses a MEMS sensor having a cavity and a movable portion closing the cavity. Based on the movement of the movable portion produced by a change in a pressure inside the cavity, a pressure produced on the MEMS sensor is detected.

PRIOR ART DOCUMENT

Patent Publication

DETAILED DESCRIPTION OF THE EMBODIMENTS

FIG.1shows a schematic plan view of a MEMS sensor1according to a first embodiment of the present disclosure.FIG.2shows a schematic section diagram of the MEMS sensor1according to the first embodiment of the present disclosure and is a cross section along II-II ofFIG.1.

The MEMS sensor1is, for example, an electrostatic capacitive sensor. The MEMS sensor1can be applied to various sensors such as air pressure sensors and pressure sensors. The MEMS sensor1includes a semiconductor substrate2. In this embodiment, the semiconductor substrate2is a p-type (second conductivity type) semiconductor substrate2. In this embodiment, the semiconductor substrate2is a silicon substrate. The semiconductor substrate2has a first surface3and a second surface4opposite to the first surface3. The first surface3and the second surface4of the semiconductor substrate2can also be respectively referred to as a front surface and a back surface of the semiconductor substrate2. Moreover, the semiconductor substrate2has an end surface5. In this embodiment, the semiconductor substrate2is quadrilateral in shape in a plan view. The end surface5includes four end surfaces5formed on four sides of the semiconductor substrate2in the plan view. The end surface5of the semiconductor substrate2can also be referred to as a side surface of the semiconductor substrate2, or can be referred to as a third surface. Moreover, a thickness of the semiconductor substrate2is, for example, 100 μm or more and 775 μm or less.

The semiconductor substrate2has a cavity6, a membrane7formed on the first surface3, and a fixing portion8. The cavity6is a cavity formed on an inside of the semiconductor substrate2. The membrane7is, for example, film-like, and is disposed at an opening of the cavity6to seal the cavity6. The fixing portion8is a part supporting the membrane7. In this embodiment, a part other than the cavity6and the film7in the semiconductor substrate2is the fixing portion8.

As shown inFIG.1, the cavity6is formed to be substantially quadrilateral in shape in the plan view. In the plan view, the cavity6has a first side6A, a second side6B, a third side6C and a fourth side6D. A depth D of the cavity6is, for example, 0.5 μm or more and 20 μm or less. The depth D of the cavity6can also be a distance from an opposite surface7aof the membrane7to a bottom6eof the cavity6.

The membrane7has a fixed thickness. The thickness of the membrane7is, for example, 1 μm or more and 30 μm or less. Preferably, the thickness of the membrane7is, for example, 7 μm. The membrane7has the opposite surface7afacing the bottom6eof the cavity6. The membrane7is deformable relative to the cavity6. An interface line between the membrane7and the fixing portion8is substantially quadrilateral in shape in the plan view, and is aligned with the four sides6A to6D of the cavity6in the plan view. The cavity6is sealed by the membrane7, and thus an inside of the cavity6is kept vacuum. The membrane7is deformed in a thickness direction of the semiconductor substrate2relative to a change in a difference of atmospheric pressure around the vacuum environment.

The semiconductor substrate2includes an n-type (first conductivity type) first region11, a p-type (second conductivity type) second region12, and a p-type third region61. The second region12faces the first region11in the thickness direction of the semiconductor substrate2, and is separated from the first region11by the cavity6. The third region61is formed by a p-type region other than the first region11and the second region12in the semiconductor substrate2. In this embodiment, the p-type third region61is formed over an entirety of the semiconductor substrate2from the first surface3to the second surface4in the thickness direction. The first region11is selectively formed on a surface layer portion of the third region61to surround the cavity6, and thus the second region12is selectively formed on a surface layer portion of the first region11in a region further inside than the first region11.

The first region11includes a first portion11aforming the bottom6eof the cavity6, and a second portion11bforming a side6fof the cavity6. The first portion11ais formed as quadrilateral in shape in the plan view, and the second portion11bis formed around an entirety of a peripheral portion of the first portion11aand formed as a loop in the plan view. The second portion11bextends from the peripheral portion of the first portion11ato the first surface3. A lower surface (an end surface on a side of the second surface4) of the first portion11aand a lower surface (an end surface on a side of the second surface4) of the second portion11bare a same surface along a horizontal direction of the second surface4. The first portion11aand the second portion11bare both formed by an n-type diffusion layer. An n-type impurity concentration of the first portion11aand the second portion11bcan be between about 1.0×1015cm−3and about 1.0×1019cm−3.

The second region12is a surface which is formed from the opposite surface7ato the first surface3in the thickness direction of the membrane7and exposed through the opposite surface7aand the first surface3. The second region12extends over an entirety of the membrane7from a center of the membrane7to a periphery of the membrane7(an interface14between the membrane7and the fixing portion8) along a horizontal direction of the first surface3. A periphery of the second region12is surrounded by the second portion11bof the first region11. In other words, the second portion11bof the first region11surrounds the periphery of the second region12. An outer periphery of the second region12is connected with the second portion11b. As shown inFIG.1, an interface13between the second region12and the second portion11bis closer to the outside (the side of the four end surfaces5) than the interface14(that is, an outer periphery of the cavity6) between the membrane7and the fixing portion8.

Accordingly, the second region12has a pull-out portion62pulled further outside in the horizontal direction than the four sides6A to6D of the cavity6. The pull-out portion62is formed as a loop along a full periphery of the four sides6A to6D, as shown inFIG.1. A portion of the pull-out portion62protrudes closer to the bottom6eof the cavity6along the side6fof the cavity6than the opposite surface7a, and forms an upper end of the side6fof the cavity6.

The second region12is formed by a p-type diffusion layer. The second region12is formed globally over the membrane7. A p-type impurity concentration of the second region12can be between about 1.0×1015cm−3and about 1.0×1021cm−3.

The third region61includes a first portion61aformed on the second surface4of the semiconductor substrate2, and a second portion61bformed on the end surface5of the semiconductor substrate2. The first portion61ais formed as quadrilateral in shape in the plan view, and the second portion61bis formed as a loop around the entirety of the peripheral portion of the first portion61ain the plan view and surrounds the first region11. The second portion61bextends from the second surface4to the first surface3. A lower surface of the first portion61aand a lower surface of the second portion61bare formed as a same surface, and form the second surface4.

Referring toFIG.2, an insulation layer15is formed on the first surface3of the semiconductor substrate2. The insulation layer15can include, for example, silicon oxide (SiO2) or silicon nitride (SiN). The insulation layer15covers the membrane7and the fixing portion8. More specifically, the insulation layer15integrally covers an entirety of the first surface3.

Referring toFIG.1, the MEMS sensor1further includes metal terminals16and17, and contacts18and19. The metal terminals16and17include a first metal terminal16and a second metal terminal17. The metal terminals16and17are formed on the insulation layer15. In the plan view, the metal terminals16and17are arranged to be separated along the end surface5of the semiconductor substrate2. The contacts18and19include a first contact18and a second contact19. One end of the first contact18is connected to the second portion11bof the first region11on the first surface3through a contact hole20(referring toFIG.2) formed at the insulation layer15. The other end of the first contact18is connected to the first metal terminal16. One end of the second contact19is connected to the second region12on the first surface3through a contact hole21(referring toFIG.2) formed at the insulation layer15. The other end of the second contact19is connected to the second metal terminal17.

Moreover, although not shown, a passivation film can also be formed on the insulation layer15to cover the first and second metal terminals16and17and the first and second contacts18and19.

As described above, the MEMS sensor1is an electrostatic capacitive sensor. When a bias voltage is applied to the first and second metal terminals16and17, the bias voltage is applied to the first contact18and the second contact19. Accordingly, a potential difference between the first portion11aof the first region11and the second region12becomes constant, and the first region11and the second region12having different conductivity types from each other function as electrode portions.

FIG.3AtoFIG.3Hshow diagrams of a part of a manufacturing process of the MEMS sensor1according to the first embodiment of the present disclosure.

To manufacture the MEMS sensor1, for example, as shown inFIG.3A, a semiconductor substrate2including a silicon substrate is prepared. The semiconductor substrate2is p-type semiconductor wafer.

An n-type impurity is selectively introduced into the first surface3of the semiconductor substrate2. Accordingly, an n-type first diffusion layer31is formed on the first surface3of the semiconductor substrate2(forming of a first diffusion layer).

Next, multiple holes32recessed from the first surface3are formed in the first diffusion layer31(forming of holes), as shown inFIG.3B. The forming of the multiple holes32is implemented by, for example, deep dig etching (Bosch method). In the Bosch method, an area of a cross section perpendicular to a depth direction of the multiple holes32formed is constant.

Next, as shown inFIG.3, by means of chemical vapor deposition (CVD), a protection film35is formed on the first surface3, sidewalls33of the multiple holes32, and bottom walls34of the multiple holes32(forming of a protective film). Accordingly, the first surface3, the sidewalls33of the multiple holes32and the bottom walls34of the multiple holes32are covered by the protective film35. The protective film35is, for example, silicon oxide.

Next, the protective film35is removed from the bottom walls34of the multiple holes32(removing of the protective film). Accordingly, a state of exposing the bottom walls34through the protective film35is formed on an inside of the multiple holes32.

Next, as shown inFIG.3D, the first diffusion layer31is isotropically etched. The etching is performed by an etching gas acting on the semiconductor material around the bottom walls34of the multiple holes32through the multiple holes32(etching). Accordingly, a connecting cavity36is formed below the multiple holes32(forming of a connecting cavity).

Next, as shown inFIG.3E, the protective film35is entirely removed by means of etching. That is to say, the protective film35is removed from the sidewalls33of the multiple holes32(removing of a second protective film). The etching can be, for example, etching that selectively removes silicon oxide.

Next, as shown inFIG.3F, the multiple holes32are closed (closing of holes). More specifically, by means of thermal migration, the multiple holes32are closed by partially moving the semiconductor material, that is, Si, of the first diffusion layer31around the multiple holes32. Accordingly, a cavity6surrounded by the first diffusion layer31is formed, and thereby a membrane7sealing the cavity6is formed (forming of a cavity). The membrane7is merely a portion formed by Si, and is configured to form integrally with the fixing portion8that similarly includes Si without any connecting portion.

By implementing isotropic etching before thermal processing (thermal migration), the depth D (referring toFIG.2) of the formed cavity6can become a desired depth and the thickness of the membrane7can become a desired thickness.

Moreover, processes shown inFIG.3CtoFIG.3Ecan be omitted, and thermal migration is performed on the multiple holes32formed by the forming of holes inFIG.3B. More specifically, by means of heat migration, the plurality of holes32are closed by partially moving the semiconductor material, that is, Si, of the first diffusion layer31around the multiple holes32, and the cavity6surrounded by the first diffusion layer31is formed (forming of a cavity).

Next, as shown inFIG.3G, a p-type impurity is selectively introduced into the membrane7. Accordingly, a p-type second diffusion layer37is formed on the membrane7in a way opposite to the first diffusion layer31at the bottom6eof the cavity6(forming of a second diffusion layer). The second diffusion layer37becomes the second region12. A remaining region not introduced with the p-type impurity in the first diffusion layer31becomes the first region11.

Next, as shown inFIG.3H, the insulation layer15is formed on the first surface3of the semiconductor substrate2by means of, for example, CVD. Next, the metal terminals16and17and the contacts18and19are formed on the insulation layer15by means of, for example, sputtering and patterning. Then, the MEMS sensor1can be obtained by cutting the semiconductor substrate2into individual chip sizes.

Referring toFIG.0.1andFIG.2, in the MEMS sensor1, the p-type second region12formed on the membrane7faces the first portion11aof the n-type first region11formed at the bottom6eof the cavity6and is separated from the first portion11aby the cavity6. When the membrane7receives a pressure from the first surface3, the membrane7is deformed in a thickness direction of the semiconductor substrate2due to a pressure difference produced between an inside and an outside of the cavity6. A distance between the first portion11aand the second region12changes as the membrane7is deformed, and an electrostatic capacitance between the first portion11aand the second region12also changes. For example, when a bias voltage is applied to the first contact18and the second contact19, a potential difference between the first portion11aof the first region11and the second region12becomes constant, and the first region11and the second region12of different conductivity types from each other function as electrode portions. A pressure generated on the MEMS sensor1can be detected based on the change in the electrostatic capacitance between the first region11and the second region12serving as electrode portions.

Moreover, since the cavity6is sealed by the membrane7, the inside of the cavity6can be kept vacuum so that water does not exist in the cavity. Thus, attaching between the first region11and the second region12functioning as electrode portions can be prevented. Moreover, since alien substances such as water do not seep into the cavity6, a dielectric constant in the cavity6is also kept constant. Accordingly, a pressure generated on the MEMS sensor1can be detected with a good precision.

Moreover, the electrostatic capacitive MEMS sensor1consumes a less amount of power in contribution to a limited on-time to the electrode portions. A pressure can be detected with a good precision by using the electrostatic capacitive MEMS sensor1with less power consumption.

Moreover, the n-type first region11including a diffusion layer is formed on the p-type semiconductor substrate2. Because the first region11is separated from the semiconductor substrate2, a potential of the first region11can be separately kept constant from the semiconductor substrate2, and the first region11can be specified to have an appropriate concentration so as to function as an electrode portion.

FIG.4shows a schematic section diagram of a MEMS sensor201according to a second embodiment of the present disclosure. In the second embodiment, only items different from those of the first embodiment are described, and constituting elements the same as those of the first embodiment are represented by the same denotations and associated details thereof omitted for brevity.

The MEMS sensor201includes a first region211in substitution for the first region11(referring toFIG.2). The first region211includes a quadrilateral first portion211aforming the bottom6eof the cavity6in the plan view, and a loop-like second portion211bforming the side6fof the cavity6. The second portion11bis exposed through the first surface3. The third region61is formed by a p-type region other than the first region111and the second region12in the semiconductor substrate2. The first region111is selectively formed on a surface layer portion of the third region61to surround the cavity6, and thus the second region12is selectively formed on a surface layer portion of the first region111in a region closer inside than the first region111.

The first portion211aand the second portion211bare both formed by an n-type diffusion layer. A concentration of the n-type impurity of the first portion211ais a first concentration. A concentration of the n-type impurity of the second portion211bis a second concentration. The second concentration is less than the first concentration. The first concentration can be between about 1.0×1016cm−3and about 1.0×1021cm−3. The second concentration can be between about 1.0×1015cm−3and about 1.0×1019cm−3.

The first portion211ais formed throughout an entirety of the bottom6eof the cavity6. The first portion211ais further formed on a lower end of the side of of the cavity6. An interface212between the first portion211aand the second portion211bis closer to the membrane7than a surface facing the opposite surface7aof the membrane7in the bottom6eof the cavity6and separated by the cavity6(that is, a bottom surface of the cavity6). An outer periphery213of the first portion211ais closer to an outside (a side of the four end surfaces5) than an outer periphery214of the second portion211b. In other words, the outer periphery213of the first portion211acan be a pull-out portion further pulled outward toward a horizontal direction than the outer periphery214of the second portion211b.

FIG.5AtoFIG.5Jshow diagrams of a part of a manufacturing process of the MEMS sensor201according to the second embodiment of the present disclosure.

To manufacture the MEMS sensor201, for example, as shown inFIG.5A, a base substrate40including a silicon substrate is prepared. The base substrate40is p-type (second conductivity type) semiconductor wafer. The base substrate40has a front surface41. An n-type (first conductivity type) impurity is selectively introduced into the front surface41of the base substrate40. Accordingly, a first concentration diffusion layer51A having a first concentration is formed on the front surface41of the base substrate40. The first concentration can be between about 1.0×1016cm−3and about 1.0×1021cm−3.

Next, as shown inFIG.5B, a p-type epitaxial layer42is formed by epitaxially growing the p-type silicon on the front surface41formed with the first concentration diffusion layer51A to cover the first concentration diffusion layer51.

Next, as shown inFIG.5C, an n-type impurity is selectively introduced into a front surface43of the epitaxial layer42to form a second concentration diffusion layer51B having a second concentration. The second concentration is less than the first concentration. The second concentration can be between about 1.0×1015cm−3and about 1.0×1019cm−3.

Accordingly, the n-type second concentration diffusion layer51B is formed on the first surface3of the semiconductor substrate2, and the first concentration diffusion layer51A facing the second concentration diffusion layer51B is formed on the second surface4. The first concentration diffusion layer51A and the second concentration diffusion layer51B are included in the n-type first diffusion layer51(forming of a diffusion layer).

Next, multiple holes52recessed from the first surface3are formed in the second concentration diffusion layer51B (forming of holes), as shown inFIG.5D. Bottom walls54of the multiple holes52are located in the second concentration diffusion layer51B. The multiple holes52are formed by means of, for example, deep dig etching (Bosch method). In the Bosch method, an area of a cross section perpendicular to a depth direction of the multiple holes52formed is constant.

Next, as shown inFIG.5E, by means of CVD, a protective film55is formed on the first surface3, sidewalls53of the multiple holes52, and the bottom walls54of the multiple holes52(forming of a protective film). Accordingly, the first surface3, the sidewalls53of the multiple holes52and the bottom walls54of the multiple holes52are covered by the protective film35. The protective film55is, for example, silicon oxide.

Next, the protective film55is removed from the bottom walls54of the multiple holes52(removing of the protective film). Accordingly, a state of exposing the bottom walls54through the protective film55is formed on an inside of the multiple holes52.

Next, as shown inFIG.5F, the second concentration diffusion layer51B and the first concentration diffusion layer51A are isotropically etched. The etching is performed by an etching gas acting on the semiconductor material around the bottom walls54of the multiple holes52through the multiple holes52(etching). Accordingly, a connecting cavity56is formed below the multiple holes52(forming of a connecting cavity). A bottom56aof the connecting cavity56is closer to the second surface4than an interface44between the first concentration diffusion layer51A and the second concentration diffusion layer51B.

Next, as shown inFIG.5G, the protective film55is entirely removed by means of etching. That is to say, the protective film55is removed from the sidewalls53of the multiple holes52(removing of a second protective film). The etching can, for example, selectively remove silicon oxide.

Next, as shown inFIG.5H, the multiple holes52are closed (closing of holes). More specifically, by means of thermal migration, the multiple holes52are closed by partially moving the semiconductor material, that is, Si, serving as the first concentration diffusion layer51A around the multiple holes52. Accordingly, a cavity6surrounded by the first diffusion layer51is formed, and thereby a membrane7sealing the cavity6is formed (forming of a cavity). The membrane7is merely a portion formed by Si, and is configured to be integrally formed with the fixing portion8which similarly includes Si without any connecting portion. Moreover, in the cavity6formed, the first concentration diffusion layer51A is formed at the bottom6eand the second concentration diffusion layer51B is formed on the top6gand the side6f.

By implementing isotropic etching before thermal processing (thermal migration), the depth (a distance from the opposite surface7aof the membrane7to the bottom6eof the cavity6) of the formed cavity6can become a desired depth and the thickness of the membrane7can become a desired thickness.

Next, as shown inFIG.5I, a p-type impurity is selectively introduced into the membrane7. Accordingly, a p-type second diffusion layer57is formed to be opposite to the first concentration diffusion layer51A at the bottom6eof the cavity6on the membrane7(forming of a second diffusion layer). The second diffusion layer57becomes the second region12. The first concentration diffusion layer51A becomes the first region211aof the first region211. A remaining region not introduced with the p-type impurity in the second concentration diffusion layer51B becomes the second portion211bof the first region211.

Next, as shown inFIG.5J, the insulation layer15is formed on the first surface3of the semiconductor substrate2by means of, for example, CVD. Next, the metal terminals16and17and the contacts18and19are formed on the insulation layer15by means of, for example, sputtering and patterning. Then, the MEMS sensor201can be obtained by cutting the semiconductor substrate2into individual chip sizes.

When a bias voltage is applied to the first contact18and the second contact19, the first portion211afunctions as an electrode portion. Due to a higher concentration of the n-type impurity, a resistance of the first portion211acan be reduced. Accordingly, compared to the MEMS sensor1of the first embodiment, power consumption can be reduced.

On the other hand, the second portion211bhaving a lower concentration of the n-type impurity serves as a conduction path that electrically connects the first portion211awith the first contact18.

FIG.6shows a schematic plan view of a MEMS sensor301according to a third embodiment of the present disclosure. In the third embodiment, only items different from those of the first embodiment are described, and constituting elements the same as those of the first embodiment are represented by the same denotations and associated details thereof omitted for brevity.

In the MEMS sensor301, the semiconductor substrate2is not a p-type (second conductivity type) semiconductor substrate, but is an n-type (first conductivity type) semiconductor substrate. In a region including the bottom6eof the cavity6, a first region311formed by an n-type semiconductor material of the semiconductor substrate2is used in substitution for the first region11including a diffusion layer.

Various embodiments of the present disclosure are as described above; however, the present disclosure may also be implemented in other configurations.

For example, a configuration in which the conductivity types of the individual semiconductor parts of the semiconductor device301are swapped can also be adopted. For example, in the MEMS sensors1,201and301, a p-type part may be n-type, and an n-type part may be p-type. A MEMS sensor351shown inFIG.7is a MEMS sensor formed by swapping the conductivity types of the MEMS sensor301of the third embodiment of the present disclosure.

The features given in the notes below can be extracted from the detailed description and the drawings of the present application.

a semiconductor substrate (2) having a first surface (3) and a second surface (4) opposite to the first surface, and including a cavity (6);

a membrane (7) on the first surface (3) to seal the cavity (6);

a first region (11,211and311) of a first conductivity type, formed at a bottom (6e) of the cavity (6); and

a second region (12) of a second conductivity type, formed on the membrane (7), facing the first region (11,211and311) and separated from the first region (11,211and311) by the cavity (6).

According to the configuration, the second region (12) of the second conductivity type formed on the membrane (7) faces the first region (11,21and311) of the first conductivity type formed at the bottom (6e) of the cavity (6) and is separated from the first region (11,211and311) by the cavity (6). When the membrane (7) receives a pressure from the first surface (3), the membrane (7) is deformed in a thickness direction of the semiconductor substrate (2) due to a pressure difference generated between an inside and an outside of the cavity (6). A distance between the first region (11,211and311) and the second region (12) changes as the membrane (7) is deformed, and an electrostatic capacitance between the first region (11,211and311) and the second region (12) also changes. Since the cavity (6) is sealed by the membrane (7), the inside of the cavity (6) is kept vacuum to prevent humidity such as moisture from seeping to the inside of the cavity (6). Thus, attaching between the first region (11,211and311) and the second region (12) caused by such as moisture can be prevented. By using the first region (11,211and311) and the second region (12) in different conductivity types as electrode portions, a change in the pressure can be well detected based on the change in the electrostatic capacitance between the electrode portions.

The MEMS sensor (1,201) according to note 1-1, wherein the semiconductor substrate (2) is of the second conductivity type, and the first region (11,211and311) includes a region formed at the bottom (6e) of the cavity (6) and a side (6f) of the cavity (6).

The MEMS sensor (1) according to note 1-2, wherein in the first region (11), a concentration of a portion (11a) forming the bottom of (6e) the cavity (6) is equal to a concentration of a portion (11b) forming the side (6f) of the cavity (6).

The MEMS sensor (2) according to note 1-2, wherein the first region (211) includes a first portion (211a) with a first concentration forming the bottom (6e) of the cavity (6), and a second portion (211b) with a lower concentration than the first concentration formed on the side (6f) of the cavity (6).

The MEMS sensor (1,201) according to any one of note 1-2 to note 1-4, wherein a portion (11b,211b) forming the side (6f) of the cavity (6) in the first region (11,211) surrounds the second region (12).

The MEMS sensor (1,201) according to any one of note 1—to note 1-5, wherein the second region (12) is exposed through the first surface (3), and the first region (11,211) is exposed through the first surface (3).

The MEMS sensor (1,201) according to note 1-6, further comprising:

a first contact (18) connected to the first region (11,211) on the first surface (3); and

a second contact (19) connected to the second region (12) on the first surface (3).

The MEMS sensor (301,351) according to note 1-1, wherein the semiconductor substrate (2) is of the first conductivity type.

A method of manufacturing a MEMS sensor (1,201), comprising:

forming a first diffusion layer (31,51) of a first conductivity type by introducing an impurity of the first conductivity type into a first surface (3) of a semiconductor substrate (2), wherein the semiconductor substrate (2) has the first surface (3) and a second surface (4) opposite to the first surface (3);

forming a cavity (6) disposed within and surrounded by the first diffusion layer (31,51), and forming a membrane (7) sealing the cavity (6); and

forming a second diffusion layer (37,57) of a second conductivity type opposite to the first diffusion layer (31,51) at a bottom (6e) of the cavity (6) by introducing an impurity of the second conductivity type into the membrane (7).

The method of manufacturing the MEMS sensor (1,201) according to note 1-9, wherein the forming of the cavity includes:

forming a plurality of holes (32,52) recessed from the first surface (3) in the first diffusion layer (31,51);

forming a connecting cavity (35,56) below the plurality of holes (32,52) by isotropically etching the first diffusion layer (31,51) through the plurality of holes (32,52); and

closing the plurality of holes (32,52) and sealing the connecting cavity (36,56) by partially moving a semiconductor material of the first diffusion layer (31,51) around the plurality of holes (32,52) to form the membrane (7), and thereby forming the cavity (6).

The method of manufacturing the MEMS sensor (1,201) according to note 1-10, further comprising:

forming a protective film (35,55) on sidewalls (33,53) and bottom walls (34,54) of the plurality of holes (32,52);

removing the protective film (35,55) from the bottom walls (34,54) of the plurality of holes (32,52); and

etching the plurality of holes (32,52) to form the connecting cavity (36,56).

The method of manufacturing the MEMS sensor (1,201) according to note 1-11, after the etching, further comprising removing a second protective film to remove the protective film (35,55) from the sidewalls (33,53) of the plurality of holes (32,52).

The method of manufacturing the MEMS sensor according to any one of note 1-9 to note 1-12, wherein the forming of the first diffusion layer includes:

selectively introducing impurities of a first conductivity type into a front surface of a base substrate (40) of a second conductivity type to form a first concentration diffusion layer (51A) having a first concentration;

forming an epitaxial layer (42) of the second conductivity type to cover the first concentration diffusion layer (51A); and

introducing impurities of the first conductivity type into a front surface (43) of the epitaxial layer (42) to form a second concentration diffusion layer (51B) having a second concentration lower than the first concentration, and wherein the forming of the cavity includes:

forming the first concentration diffusion layer (51A) at a bottom (6e); and

forming the cavity (6) having the second concentration diffusion layer (51B) at a top (6g) and a side (6f).

The method of manufacturing the MEMS sensor (201) according to note 1-13, wherein the forming of the cavity includes:

forming a plurality of holes (52) having bottom walls (54) in the second concentration diffusion layer (51B) by recessing the first surface (3) of the second concentration diffusion layer (51B);

forming a connecting cavity (56) below the plurality of holes (52) and having a bottom (56e) closer to the second surface (4) than an interface between the first concentration diffusion layer (51A) and the second concentration diffusion layer (51B) by isotropically etching the second concentration diffusion layer (51B) and the first concentration diffusion layer (51A) through the plurality of holes (52); and

closing the plurality of holes (52) and sealing the connecting cavity (56) by partially moving a semiconductor material of the first diffusion layer (51) around the plurality of holes (52) to form the membrane (7), and thereby forming the cavity (6).

The method of manufacturing the MEMS sensor (1) according to note 1-9, wherein the forming of the cavity includes:

forming a plurality of holes (52) recessed from the first surface (3) in the first diffusion layer (31); and

closing the plurality of holes (32) and thereby forming the cavity (6) by partially moving the semiconductor material of the first diffusion layer (31) around the plurality of holes (32).