Method of making a thermistor

A method of making a thermistor comprising the steps of making a layer of thermistor ceramic material comprised substantially of Mn.sub.2 O.sub.3, NiO, Co.sub.3 O.sub.4, Al.sub.2 O.sub.3, CuO, or Fe.sub.2 O.sub.3, having upper and lower surfaces. A first dielectric material comprised of low K Al.sub.2 O.sub.3 or the like is placed on the upper and lower surfaces of the layer, and then is cut into a plurality of elongated strips. The layer is created by blading a slurrey of the ceramic material to create a plurality of uncured sheets; placing the sheets in superimposed position, and then making the monolithic layers from the sheets by applying heat and pressure thereto, and then firing the monolithic layer with heat of increased magnitude. The strips are encapsulated in an envelope of the dielectric material, and terminal connections comprised of silver, Ni, Sn and Pb are imposed thereon. A thermistor chip or strip comprising an elongated ceramic thermistor body with an outside surface and opposite ends. A dielectric envelope encapsulates the outer surface of the body for the ends, and conductive terminal caps are formed on the end of the body. The thermistor is comprised of the materials outlined in the method of making the same.

BACKGROUND OF THE INVENTION 
The present invention relates to a negative temperature coefficient (i.e. 
"N.T.C.") thermistor for use in temperature measurement, control, and 
compensation of electronic elements or circuits. 
A typical N.T.C. thermistor is shown in U.S. Pat. No. 4,786,888. This 
patent discloses a thermistor element produced through sintering ceramic 
in the form of a chip. It is sandwiched by a pair of electrodes and 
enclosed in an envelope made of glass. In this regard, the device only 
operates to secure or stabilize the thermal or chemical properties of the 
thermistor element when the thermistor is used for measuring temperature. 
A thermistor of the above type has many drawbacks requiring relatively 
complex production processes, low production capacities, poor yields, and 
unnecessary diffusive boundary layers. In addition, such thermistor 
elements require leads which require connections to external devices. This 
makes difficult the assembly of the thermistor element onto a circuit 
board. 
A less difficult way to build a surface mounted thermistor element which 
would secure the thermal, chemical and solderability properties would be 
enveloping the thermistor element in a low K dielectric material. This low 
K dielectric material, which is low fire and acid resistant, would accept 
silver electrodes that are compatible with nickel, and Sn/Pb plating. This 
eliminates the need for complex production processes, poor yields, and 
unnecessary diffusive boundary layers. 
Therefore, a principal object of this invention is to provide a surface 
mount thermistor element that would maintain thermal, chemical, and 
solderability properties, and which is more reliable. 
A further object of this invention is to provide a method of making a 
thermistor which is economical and efficient, and which will not be 
detrimental to the resulting product. 
A further object of the present invention is to provide a negative 
temperature coefficient ceramic material that can be plated with nickel 
and tin (Sn)/lead (Pb) plating for surface mount applications. 
A still further object of this invention is to provide a negative 
temperature coefficient thermistor with production processing steps which 
has an envelope of low K insulating dielectric for enclosing the 
thermistor for surface mount applications. 
A still further object of the present invention is to provide a thermistor 
of the above type suitable for soldering directly onto a printed circuit 
board for surface mount applications. 
A still further object of the present invention is to provide a thermistor 
which is stable in operation at higher operating temperatures for surface 
mount applications. 
A still further object of the present invention is to provide a method of 
producing thermistors in high volumes and with excellent yields. 
These and other objects will be apparent to those skilled in the art. 
SUMMARY OF THE INVENTION 
The N.T.C. thermistor of this invention comprises: (1) a sintered 
thermistor ceramic chip, (2) an insulating low K dielectric for enclosing 
the thermistor chip to be coupled after sintering to the ceramic chip, (3) 
and a pair of external electrodes, silver plateable, on the exterior 
surface of the ceramic chip and the insulating low K dielectric. 
Specifically, the insulating ceramic envelope is made of an oxide or 
different variety of oxide ceramic materials. Furthermore, the external 
electrodes are made out of plateable silver. 
In a preferred form, a sintered ceramic wafer has a low K Al.sub.2 O.sub.3 
or ceramic oxide loaded (sprayable rheology) sprayed onto the top and 
bottom surfaces of the wafer. The material is dried and fired in a 
continuous furnace. Specifically, the material dried in an infrared or 
convection oven and sintered in an infrared or convection furnace. 
Atmospheric conditions during firing are in either an oxidizing or neutral 
atmosphere. 
Once the low K dielectric has been vitrified onto the N.T.C. ceramic wafer, 
the wafer is cut into strips or chips. The strips and chips are either 
sprayed or dipped in a sprayable or dippable rheology to encapsulate the 
remaining uncovered areas of the strips or chips. The strips or chips are 
fired in a continuous infrared or convection kiln. Strips are cut into 
individual ceramic chips. 
The above devices in chip form, are dipped in a dippable silver rheology to 
encapsulate the N.T.C. thermistor chip surfaces which are not encapsulated 
with a low K dielectric. 
The above devices in a negative temperature coefficient thermistor chip 
form, are then provided with terminals by being plated with a nickel (Ni) 
barrier, followed by a tin (Sn)/lead (Pb) plating onto the surface of the 
nickel. The parts with silver termination are dried in an infrared or 
convection oven and are fired in a continuous infrared or convection 
furnace. The silver termination provides a conductive path through the 
thermistor ceramic chip. The external termination and plating on the 
thermistor chip will allow the thermistor chip to be mounted directly onto 
a printed circuit board. 
The essence of this invention is to provide a nickel barrier over silver 
using conventional plating techniques without adversely affecting the 
thermistor ceramic material and its inherent electrical properties.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT 
FIG. 1 shows a ceramic wafer or layer 10 with dielectric layers 12 affixed 
to the upper and lower surfaces thereof. The wafer 10 is a negative 
temperature coefficient ceramic material made from materials such as 
Mn.sub.2 O.sub.3, NiO, Co.sub.3 O.sub.4, Al.sub.2 O.sub.3, CuO, and 
Fe.sub.2 O.sub.3. The dielectric layers 12 are comprised of a material 
such as a low K Al.sub.2 O.sub.3 or ceramic oxide loaded dielectric. A low 
K Al.sub.2 O.sub.3 or ceramic oxide loaded dielectric is used because they 
are acid resistant which protects the thermistor wafer 10 from acid during 
the plating process. 
The layer 10 is created by adding Mn.sub.2 O.sub.3, NiO, Co.sub.3 O.sub.4, 
Al.sub.2 O.sub.3, CuO, or Fe.sub.2 O.sub.3 to a slurry of organic binder, 
plasticizer, lubricant, solvent and dispersant. Uncured sheets of this 
material each having a thickness of 100 .mu.m are prepared by the 
conventional doctor blade method. The uncured sheets are stacked together 
and are made into monolithic form by applying pressures thereto between 
3,000-30,000 p.s.i., and under temperatures between 30.degree.-70.degree. 
C., for a period between 1 second to 9 minutes. The resulting monolithic 
form, layer 10, is then fired at a rate between 10.degree.-60.degree. 
C./hr to a temperature of 1000.degree. C.-1300.degree. C. for about 1 hour 
to 42 hours and controlled cool down rate of 20.degree.-100.degree. C./hr 
to become a sintered negative coefficient thermistor. With this process, 
the layer 10 comprises a monolithic sintered thermistor body. 
After the layer 10 is so created, the dielectric layers 12 are applied to 
the top and bottom surfaces thereof with sprayable rheology. Layers 12 
comprised of low K Al.sub.2 O.sub.3 or ceramic oxide loaded dielectric are 
then dried in an infrared or convection oven at a temperature of 
75.degree. C.-200.degree. C. for 5 minutes to 1 hour. They are then fired 
in an infrared or convection furnace to a temperature of 700.degree. 
C.-900.degree. C. for 5 minutes to 1 hour. The resulting device of FIG. 1 
can then be cut into individual strips 14 or into chips 14A (see FIGS. 2 
and 3). 
The uncoated sides of the strips 14 or chips 14A can then be sprayed or 
dipped with the same material comprising layers 12 to create dielectric 
layer 16. After this has been done, the strips 14 or chips 14A units are 
then dried in an infrared or convection oven to a temperature of 
75.degree. C.-200.degree. C. for 5 minutes to 1 hour, and then fired in an 
infrared or convection furnace to a temperature of 700.degree. 
C.-950.degree. C. for 5 minutes to 1 hour. This procedure produces for 
strips 14 and chips 14A a vitrified dielectric envelope 18 of low K 
Al.sub.2 O.sub.3 or ceramic loaded dielectric on four sides of the 
thermistor body. Chips 14A can be cut from the elongated strips 14. 
Terminal caps 20 are then created on the ends of the strips 14 or the chips 
14A. The ends are first dipped in plateable silver termination material 22 
so that the ends of the wafer layer 10 are in direct contact therewith. 
The silver termination material 22 has an undried band width of 45 .mu.m 
to 800 .mu.m and are prepared by the doctor blade method. After the silver 
termination 22 has been so applied, the strips 14 or the chips 14A are 
dried in an infrared or convection oven at a temperature of 
100.degree.-300.degree. C. for 5-35 minutes. They are then fired in an 
infrared or convection furnace at a temperature of 500.degree.-700.degree. 
C. for 5 to 25 minutes. 
The silver termination material 22 is then plated with a barrier layer 24 
comprised of Ni having a thickness of 100-500 .mu. inches. Layers 25A and 
25B are then imposed on the layer 24 by plating. Layer 25A is comprised of 
Sn and layer 25B is copprised of Pb. Layers 25A and 25B have a total 
thickness of 100-500 .mu. inches. 
The strip 14 shown in FIG. 4 completely encapsulated in envelope 18 is 
identified by the numeral 26. The completed chip 14A completely 
encapsulated in envelope 18, as shown in FIG. 5, is identified by the 
numeral 28. The terminal caps described heretofore can be applied to 
either the strips 26 or the chips 28. 
The completed strips 26 or chips 28 can be directly soldered to the circuit 
board 30 as shown in FIG. 6. 
By using the above mentioned materials and processes, a thermistor is 
created which has a smaller variance in resistance and has ideal soldering 
characteristics for mounting on printed circuit boards. This invention 
enables the production of thermistors having good quality, stability, and 
a higher yield rate. 
It is therefore seen that the device and method of this invention achieve 
all of their stated objectives.