Substrate interconnections for packaged semiconductor device

A “universal” substrate for a semiconductor device is formed of a non-conductive substrate material. A uniform array of conductive pillars is formed in the substrate material. The pillars extend from a top surface of the substrate material to a bottom surface of the substrate material. A die flag may be formed on the top surface of the substrate material. Pillars underneath the die flag are connected to pillars beyond a perimeter of the die flag with wires. Power and ground rings may be formed by connecting rows of pillars that surround the die flag.

BACKGROUND

The present invention relates to integrated circuit (IC) packaging, and more particularly, to substrates for semiconductor packages.

Substrates that include an array of interconnections (e.g., copper pillars) and used for semiconductor packaging are known, such as from U.S. Pat. No. 9,437,492 assigned to Freescale Semiconductor, Inc. In assembling a semiconductor device, a semiconductor die is mounted on and attached to a set of the pillars and then electrically connected to other ones of the pillars with bond wires. The die and bond wires are then encapsulated with a plastic material to form a packaged device. Unfortunately, the pillars beneath the die or the pillars upon which the die is mounted are not able to be used because they are covered by the die. It would be advantageous to be able to make use of these pillars.

DETAILED DESCRIPTION

Detailed illustrative embodiments of the present invention are disclosed herein. However, specific structural and functional details disclosed herein are merely representative for purposes of describing example embodiments of the present invention. The present invention may be embodied in many alternate forms and should not be construed as limited to only the embodiments set forth herein. Further, the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of example embodiments of the invention.

In one embodiment, the present invention is a substrate for a semiconductor device comprising a non-conductive substrate material, a uniform array of conductive pillars formed in the substrate material, and a die flag formed on a top surface of the substrate material. The pillars extend from the top surface of the substrate material to a bottom surface of the substrate material.

In another embodiment, the present invention is a packaged semiconductor device. The packaged semiconductor device comprises a non-conductive substrate including a uniform array of conductive pillars extending from a top surface of the substrate to a bottom surface of the substrate; a first electrical connector connecting pillars located under a die footprint to first selected ones of the pillars outside of the die footprint; a semiconductor die having a bottom, non-active surface attached to the top surface of the substrate; and a second electrical connector connecting a first set of pads on a top, active surface of the die to the first selected ones of the pillars outside of the die footprint such that the pillars located under the die footprint are in electrical contact with the first set of pads on the die.

In yet another embodiment the present invention provides a method for making connections between pillars on a semiconductor device substrate. The method comprises: connecting pillars under a die footprint to pillars outside the die footprint; and connecting pads on a die to the pillars outside the die footprint such that the pillars under the die footprint are in electrical contact with the pads on the die. The pillars are formed in a non-conductive substrate material and form a uniform array within the substrate material.

Referring now toFIG. 1, a top plan view of a partially assembled semiconductor device100in accordance with an embodiment of the present invention is shown. The device100comprises a substrate102that comprises a non-conductive substrate material104and an array of conductive vias or pillars106formed in the substrate material104. The substrate102comprises a “universal” substrate that can be used to package semiconductor dies of varying sizes and with varying numbers of die bonding pads. In one embodiment, the conductive pillars106are made of copper, and the non-conducting substrate material104is made of bismaleimide triazine (BT), polyimide tape, or any suitable dielectric material, including glass or ceramics. Those skilled in the art will understand that the conductive pillars106may be made of other suitable conducting metals or non-metals and/or that the non-conducting substrate material104may be made of other suitable non-conducting materials. The pillars104extend from a top surface of the substrate102to a bottom surface of the substrate102.

A die108is affixed to the top surface of the substrate102using a non-conductive epoxy or a die attach film (DAF), as is known in the art. In some embodiments, a die flag may be formed on the top surface of the substrate102for receiving the die108, and then the die108would be attached to the die flag with a nonconductive epoxy. The die108has a top, active surface that includes a plurality of die bonding pads (not shown in this embodiment) that allow for connection of the die internal circuitry with external circuitry. The semiconductor die108may comprise any type of integrated circuit, such as an application specific IC (ASIC), a microprocessor, a sensor, etc., and the present invention is not limited by the type of die.

The device100further includes a plurality of bond wires110, which in this embodiment are attached (bonded) to the row of pillars106adjacent to and surrounding the die108. The combination of these pillars and the bond wires110form a ring around the die108that may be used as a power or ground ring. Thus, in this embodiment, the pillars106adjacent to and surrounding the die108are interconnected in a daisy-chain fashion in order to form a ground ring. The bond wires110are attached to the pillars106using a wire bonding process, and preferably the bond wires have a low loop profile.

FIG. 2is a top plan view of a partially assembled semiconductor device120according to another embodiment of the present invention. The device120comprises the substrate102and the die108mounted on and affixed to the substrate102with nonconductive epoxy. The die108is shown in outline and there are a plurality of the pillars122that are located beneath the die108. In this embodiment, in order to use the pillars122beneath the die108, a plurality of bond wires124are wire bonded between the pillars122beneath the die108and respective ones of the pillars106that are not beneath the die108. As illustrated in the drawing, the pillars122beneath the die108may be connected to more than one of the pillars106with more than one of the bond wires124. In a presently preferred embodiment, the bond wires124are attached to the pillars at the top surface of the substrate102before the die108is mounted thereon. The bond wires124have a low loop profile. In other embodiments, the bond wires124may be attached to the bottom side of the substrate102either before or after the die108is mounted on the substrate102top side. Thus, in this manner, the pillars122beneath the die108are in electrical contact with the pillars106outside of the die footprint. After die attach, a second wire bonding process is performed to connect die bonding pads to respective ones of the pillars106.

FIGS. 3A and 3Bshow a cross-sectional side view and a bottom plan view of a portion of a packaged semiconductor device130in accordance with an embodiment of the present invention. The packaged semiconductor device130comprises the substrate102including an array of conductive pillars106that extend from a top surface of the substrate102to a bottom surface of the substrate102. The die108is mounted and affixed to the top surface of the substrate102with a die attach adhesive132. In alternative embodiments, a die flag may be formed on the top surface of the substrate102for receive the die108.

The die108is electrically connected to the pillars106with bond wires, as shown. In this embodiment, first bond wires134connect selected ones of the die bonding pads to pillars in the row immediately adjacent to and surrounding the die108; second bond wires136connect selected ones of the die bonding pads to the second row of pillars surrounding the die108, and third bond wires138connected selected ones of the die bonding pads to other ones of the pillars outside of the first and second rows of pillars surround the die108. The first bond wires134are used for ground wires, the second bond wires136are used for power wires, and the third bond wires138are used for signal wires.

Referring now toFIG. 3Bas well asFIG. 3A, the device130also includes a ground pad140, a power ring142, and signal pads144formed on the bottom side of the substrate102. The ground pad140and the power ring142may be formed using solder or a film tape, and the signal pads144may be formed using solder or solder balls. The ground pad140is electrically connected to the pillars beneath the die108as well as the first row of pillars surrounding the die108. The power ring142is electrically connected to the second row of pillars surrounding the die108, and the signal pads144are electrically connected to the pillars106that are connected to the die bonding pads with the bond wires138(used to transmit/receive signals from/to the die108). The top surface of the substrate102, the die108and the bond wires134,136and138are encapsulated with a plastic material or mold compound146to protect the die, the bond wires and the connections therebetween from damage.

FIGS. 4A and 4Bshow a cross-sectional side view and a bottom plan view of a portion of a packaged semiconductor device150in accordance with an embodiment of the present invention. The packaged semiconductor device150is similar to the packaged semiconductor device130ofFIGS. 3A and 3Bexcept that it is modified to accommodate two dies. Referring toFIG. 4A, the device150comprises the substrate102having pillars106, and first and second dies152,154. The first and second dies152,154may be any kind of dies, such as a microprocessor and a sensor, or a processor and a memory, as are known in the art.

The first and second dies152,154are attached to a top surface of the substrate102with a die attach material such as nonconductive epoxy or a double-sided tape, e.g., a DAF, and are disposed in a side-by-side arrangement with a space extending therebetween. Bonding pads on the dies152,154are electrically connected to respective ones of the pillars106with bond wires. More particularly, in the embodiment shown, first bond wires134are used to electrically connect the dies152,154to a ground connection, second bond wires136are used to connect the dies152,154to a voltage source, and third bond wires138are used to connect the dies152,154to signal pins.

Referring now toFIG. 4Bas well asFIG. 4A, the device150includes a pair of ground pads156and158that are formed on the bottom side of the substrate102beneath the dies152,156respectively. A power ring160also is formed on the bottom side of the substrate102that surrounds the ground pads156,158, and includes an arm162that extends between the ground pads156,158. The power ring160is outside of a footprint of the dies152,156. The arm162may be either connected at both ends to the power ring160, connected at one end (as shown), or spaced from the power ring160at both ends. The bottom side of the substrate102also includes signal pads164. The signal pads164are formed on the pillars106on the bottom side of the substrate102. The ground pads156and158and the power ring160may be formed using solder or a film tape, and the signal pads164may be formed using solder or solder balls. The ground pads156,158are electrically connected to the pillars beneath the dies152,154as well as the at least one row of pillars adjacent to one of the dies152,154, and then to the dies152,154with the first bond wires. The power ring160is electrically connected to another row of pillars surrounding the dies152,154using the second bond wires136. The signal pads144are electrically connected to the pillars106that are connected to the die bonding pads with the third bond wires138(used to transmit/receive signals from/to the dies152,154). The top surface of the substrate102, the dies152,154and the bond wires134,136and138are encapsulated with a plastic material or mold compound146to protect the dies, the bond wires and the connections therebetween from damage.

In one embodiment, a routing tape including conductive vias and a metal routing layer may be attached to the bottom surface of the substrate102. First, solder balls are attached to selected ones of the pillars106and then the routing tape is attached to the bottom side of the substrate102such that the conductive pillars106by way of the solder balls are electrically connected with the conductive vias of the routing tape. The tape includes internal traces that enable electrical interconnection between conductive pillars106outside of the die footprint with conductive pillars beneath the die108. The routing tape preferably is sized and shaped to have the same (X and Y) dimensions as the finally assembled device such that solder balls of a uniform size can be applied to the bottom of the tape (and in contact with the conductive vias) for the package I/Os.

FIG. 5is a top plan view of a partially assembled semiconductor device170, which comprises the substrate102including the non-conductive substrate material104and the array of conductive pillars106formed in the substrate material104. A semiconductor die172is mounted on and attached to the substrate102using a die attach adhesive or DAF. In this embodiment, the device170further comprises an array of conductive traces including a plurality of vertical traces174and a plurality of horizontal traces176formed on the top surface of the substrate102. The traces174and176may comprise copper and be formed by electroplating, and are located between the rows and columns of the array of pillars106.

The vertical and horizontal traces174,176provide for many options for connecting bonding pads on the die172to the conductive pillars106, including the pillars106that are beneath the footprint of the die172. For example, two adjacent die bonding pads are connected with first bond wires178to one of the horizontal traces179, and then a second bond wire180is connected between the horizontal trace179and one of the conductive pillars181. In another example, a bond wire could connect from a die bonding pad to one of the traces (either horizontal or vertical) that extends from outside of the die footprint to underneath the die172. Another bond wire, connected before die attach, could then be used to connect the trace to one of the conductive pillars underneath the die. In this manner, the present invention allows the conductive pillars beneath the die footprint to be used.

The present invention thus provides not only the structure for providing connections from the die bonding pads to the conductive pillars beneath the footprint of the die, but also a method therefor. The method comprises: connecting pillars under a die footprint to pillars outside the die footprint, for example, using first bond wires; and connecting pads on the die to the pillars outside the die footprint using second bond wires such that the pillars under the die footprint are in electrical contact with the pads on the die.

The method may further comprises forming a conductive ring on either the top or bottom surface of the substrate and in contact with the pillars for use as a power ring; and forming a conductive pad on either the top or bottom surface of the substrate and in contact with the pillars for use a ground pad.

FIGS. 6A and 6Bare top plans views of a partially assembled semiconductor device190according to yet another embodiment of the present invention. The device190comprises a substrate102including vertical and horizontal conductive traces174and176, like the device170(FIG. 5). The device190further comprises a die flag192that is sized and shaped to receive the die172, as shown inFIG. 6B. The die flag192comprises a conductive tape or paste that functions to electrically short the conductive pillars106and the vertical and horizontal traces that are beneath the die footprint. After the die172is attached to the die flag192, a bond wire194can be connected between a die bond pad and one of the traces such as horizontal trace196. The horizontal trace196extends beneath the die172and therefore is in electrical contact with the die flag192and therefore with the conductive pillars106shorted to the die flag192. In this manner, the invention allows the conductive pillars beneath the die footprint to be used.

Although the invention has been described in the context of IC packages having a single die and a single electrical connector, it will be understood that the invention can be implemented in the context of IC packages having any suitable numbers of dies and any suitable numbers of electrical connectors.

It will be understood that various changes in the details, materials, and arrangements of the parts which have been described and illustrated in order to explain embodiments of this invention may be made by those skilled in the art without departing from embodiments of the invention encompassed by the following claims.