Solar cell and method for manufacturing same

A solar cell is provided with: an n-type region formed over a substrate; a p-type region formed over the substrate and the n-type region; and mark sets for judging positional deviation between the n-type region and the p-type region. The mark sets respectively include first marks, and second marks, which are formed within the first marks.

BACKGROUND

1. Technical Field

The present disclosure relates to a solar cell, and a method of manufacturing the same.

2. Related Art

In a solar cell, it is important to improve the photoelectric conversion efficiency. In consideration of such a situation, a back-contact type solar cell having a p-type semiconductor region and a p-side electrode, and an n-type semiconductor region and an n-side electrode formed over a back surface side of the solar cell is proposed (for example, JP 2009-200267 A). In the back-contact type solar cell, because no electrode exists on a light receiving surface side, a light receiving area for the solar light can be widened, and an amount of generation of power can consequently be increased.

In a solar cell of the back-contact type as described above or the like, there may be cases where a plurality of patterned thin film layers are stacked. In this case, the patterned layers must be aligned, and an alignment or positional deviation judging method suitable for the solar cell is desired.

SUMMARY

According to one aspect of the present disclosure, there is provided a solar cell comprising: a first patterned layer formed over a semiconductor substrate; a second patterned layer formed over at least one of the semiconductor substrate and the first patterned layer; and a mark set configured to judge a positional deviation between the first patterned layer and the second patterned layer, wherein the mark set includes: a first mark formed by providing a recess on the first patterned layer or by leaving the first patterned layer with an island shape; and a second mark formed by providing a recess on the second patterned layer or by leaving the second patterned layer with an island shape, and formed to fit within the first mark.

According to another aspect of the present disclosure, there is provided a method of manufacturing a solar cell having a mark set for judging a positional deviation between a first patterned layer and a second patterned layer, comprising: a first step in which the first patterned layer is formed over a semiconductor substrate, and a first mark included in the mark set is formed by providing a recess on the first patterned layer or by leaving the first patterned layer with an island shape; a second step in which the second patterned layer is formed over at least one of the semiconductor substrate and the first patterned layer, and a second mark included in the mark set is formed by providing a recess on the second patterned layer or by leaving the second patterned layer with an island shape; and a third step in which the positional deviation is judged by checking whether or not the second mark is positioned within the first mark without being placed out of the first mark.

ADVANTAGEOUS EFFECTS

According to various aspects of the present disclosure, in a solar cell having a plurality of patterned layers, the patterned layers can be efficiently aligned with each other.

DETAILED DESCRIPTION

A preferred embodiment of the present disclosure will now be described in detail with reference to the drawings.

The present disclosure is not limited to the below-described embodiment. Furthermore, the drawings referred to in the embodiment are schematically described, and the size, ratio or the like of the constituent elements drawn in the drawings may differ from those of the actual structures. The specific size, ratio, or the like should be determined based on the following description.

In the present specification, a description such as “a second object (such as, for example, an insulating layer) is formed over an entire region of a first object (for example, a semiconductor substrate)” is not intended to describe only a case where the first and second objects are formed in direct contact with each other, unless otherwise specified. That is, such a description includes a case where there is another object between the first and second objects. The description of “formed over an entire region” includes a case where the region can substantially be considered as the entire region (for example, a case where the object is formed over 95% of the first object).

In the present specification, a “planar view” refers to a planar shape (x-y plane) when the structure is viewed in a direction perpendicular to a light receiving surface. An “outline” of each mark forming the mark set refers to a line separating the mark and the outer environment in the planar view. Moreover, the description “a second mark fits within a first mark” refers to a state where the second mark exists in the first mark in the planar view and the outline of the first mark and the outline of the second mark are not in contact with each other.

A structure of a solar cell10will now be described in detail with reference toFIGS. 1-6.

FIG. 1is a plan view of the solar cell10viewed from a back surface side.FIG. 2is a diagram showing a part of a cross section along an A1-A1line ofFIG. 1, and shows a cross section in which the solar cell10is cut in the thickness direction along a width direction of finger portions41and51.FIGS. 3-5are diagrams showing a mark set70in an enlarged manner (FIGS. 3 and 5being plan views andFIG. 4being a cross sectional view).FIGS. 6 and 7are diagrams showing a mark set80in an enlarged manner (FIG. 6being a plan view andFIG. 7being a cross sectional view).

The solar cell10comprises a photoelectric conversion unit20that receives solar light and generates carriers, and an n-side electrode40and a p-side electrode50formed over a back surface side of the photoelectric conversion unit20. In the solar cell10, for example, the carriers generated at the photoelectric conversion unit20are collected respectively by the n-side electrode40and the p-side electrode50. Here, a “back surface” of the photoelectric conversion unit20refers to a surface on a side opposite to a “light receiving surface” which is a surface in which the solar light enters from the outside of the solar cell10. In other words, a surface over which the n-side electrode40and the p-side electrode50are formed is the back surface.

The photoelectric conversion unit20comprises a substrate21which is made of a semiconductor material such as, for example, crystalline silicon (c-Si), gallium arsenide (GaAs), indium phosphide (InP), or the like. As the substrate21, a crystalline silicon substrate is preferable, and an n-type monocrystalline silicon substrate is particularly preferable.

Over a light receiving surface21aof the substrate21, an i-type amorphous semiconductor layer22, an n-type amorphous semiconductor layer23, and a protection layer24are sequentially formed. These layers are formed, for example, over the entire region other than an end edge region over the light receiving surface21a.

The i-type amorphous semiconductor layer22and the n-type amorphous semiconductor layer23function as a passivation layer. As the i-type amorphous semiconductor layer22, a thin film layer formed of i-type amorphous germanium or i-type amorphous silicon may be exemplified. Preferably, the i-type amorphous semiconductor layer22is an i-type amorphous silicon layer and has a thickness of about 0.1 nm-25 nm. As the n-type amorphous silicon layer23, a thin film layer formed of amorphous silicon carbide, amorphous silicon germanium, or amorphous silicon doped with phosphorous (P) or the like may be exemplified. Preferably, the n-type amorphous semiconductor layer23is an amorphous silicon layer doped with phosphorous (P) or the like and has a thickness of about 2 nm-50 nm.

The protection layer24has a function to protect the passivation layer and also to prevent reflection of the solar light. The protection layer24is preferably formed of a material having a high light transmission characteristic. More specifically, a metal compound layer such as silicon oxide (SiO or SiO2), silicon nitride (SiN), SiON, or the like is preferable, and a SiN layer is particularly preferable. A thickness of the protection layer24can be suitably changed in consideration of the reflection prevention characteristic or the like, and is, for example, about 80 nm-1 μm.

Over the back surface21bof the substrate21, an n-type region25and a p-type region26are formed, respectively. The n-type region25and the p-type region26are preferably formed in a stripe shape extending in one direction (y direction), covering a wide area over the back surface21b, for example, from the viewpoint of the photoelectric conversion characteristic or the like. More specifically, the n-type region25and the p-type region26are preferably placed in an alternating manner, and formed without a gap therebetween (the direction in which the n-type region25and the p-type region26are alternately placed being the x direction). The region between the n-type region25and an overlap region26* is insulated by an insulating layer31.

As will be described in detail later, in the configuration exemplified inFIG. 2, in order to alternately place the n-type region25and the p-type region26and form the regions without a gap therebetween, it is necessary to align the n-type region25which is a first patterned layer and the p-type region26which is a second patterned layer. Alternatively, the order of layering of the n-type region25and the p-type region26may be reversed.

The n-type region25is an amorphous semiconductor layer formed directly over the back surface21b. The n-type region25has a layered structure in which an i-type amorphous semiconductor layer27and an n-type amorphous semiconductor layer28are sequentially formed. Alternatively, the n-type region25may be formed with only the n-type amorphous semiconductor layer28, but from the viewpoint of the passivation characteristic, it is preferable to provide the i-type amorphous semiconductor layer27. The i-type amorphous semiconductor layer27and the n-type amorphous semiconductor layer28can be formed, for example, with a similar composition and a similar thickness to those of the i-type amorphous semiconductor layer22and the n-type amorphous semiconductor layer23, respectively.

The p-type region26is an amorphous semiconductor layer formed directly over the back surface21band the insulating layer31. The p-type region26has a layered structure in which an i-type amorphous semiconductor layer29and a p-type amorphous semiconductor layer30are sequentially formed. Similar to the n-type region25, alternatively, the p-type region26may be formed with only the p-type amorphous semiconductor layer30, but from the viewpoint of the passivation characteristic, provision of the i-type amorphous semiconductor layer29is preferable. The i-type amorphous semiconductor layer29may be formed, for example, with a similar composition and a similar thickness to those of the i-type amorphous semiconductor layer27. As the p-type amorphous semiconductor layer30, an amorphous silicon layer doped with boron (B) or the like is preferable. A thickness of the p-type amorphous semiconductor layer30is preferably about 2 nm-50 nm.

The insulating layer31is formed over a part of the n-type amorphous semiconductor layer28of the n-type region25in a predetermined pattern. More specifically, in a region where the n-type amorphous semiconductor layer28and the p-type amorphous semiconductor layer30are overlapped (hereinafter referred to as an “overlap region26*”), the insulating layer31is formed only between the n-type amorphous semiconductor layer28and the p-type amorphous semiconductor layer30. The insulating layer31is formed from a metal compound having a superior insulating characteristic. Preferable metal compounds include SiO2, SiN, SiON, alumina (Al2O2), aluminum nitride (AlN), or the like. A thickness of the insulating layer31is preferably about 30 nm-500 nm.

As described above, the solar cell10includes the n-side electrode40and the p-side electrode50which are electrode layers. The n-side electrode40is an electrode that collects carriers (electrons) from the n-type region25of the photoelectric conversion unit20, and is provided in a pattern corresponding to the n-type region25. The p-side electrode50is an electrode that collects carriers (holes) from the p-type region26of the photoelectric conversion unit20, and is provided in a pattern corresponding to the p-type region26. Between the n-side electrode40and the p-side electrode50, a separation groove60for preventing electrical contact therebetween is formed.

As will be described in detail later, in the configuration exemplified inFIG. 2, when the pattern of the n-side electrode40is formed over the n-type region25and the pattern of the p-side electrode50is formed over the p-type region26, an alignment between the p-type region26which is the second patterned layer and the electrode layer which is a third patterned layer is necessary. In the present embodiment, a contact region of the n-type region25and the n-side electrode40is formed by patterning the p-type region26, and the n-side electrode40and the p-side electrode50are formed by patterning a transparent conductive layer32. Because of this, it is only necessary to align both of the n-side electrode40and the p-side electrode50with respect to the p-type region26.

The n-side electrode40and the p-side electrode50include a plurality of finger portions41and51, and bus bar portions42and52connecting corresponding finger portions, respectively. The finger portions41and51have a comb shape interdigitating with each other with the separation groove60therebetween in the planar view. In addition, the n-side electrode40and the p-side electrode50have a multilayer structure in which transparent conductive layers43and53and metal layers44and54are sequentially formed, respectively.

Each of the transparent conductive layers43and53is formed from a transparent conductive oxide (hereinafter referred to as “TCO”) in which a metal oxide such as indium oxide (In2O3), zinc oxide (ZnO) or the like having a polycrystalline structure is doped with tin (Sn), antimony (Sb), or the like. A thickness of each of the transparent conductive layers43and53is preferably about 30 nm-500 nm.

The metal layers44and54are preferably formed from a metal having a high electrical conductivity and a high reflectance of light. More specifically, metals such as copper (Cu), silver (Ag), aluminum (Al), nickel (Ni), or the like and alloys of one or more of these metals may be exemplified. In consideration also of the material cost, of these materials, Cu is particularly preferable. Thicknesses of the metal layers44and54are preferably about 50 nm-1 μm.

The solar cell10further includes mark sets70and80for judging a positional deviation of the plurality of patterned layers. In the solar cell10, the mark set70is provided in a region where the bus bar portion42is formed, and the mark set80is provided in a region where the bus bar portion52is formed. The mark sets70and80are positioned at diagonal positions of the back surface21b. By providing the mark sets in this manner, it becomes possible to judge the positional deviation (so-called shift) in xy directions, and also, it becomes possible to judge positional deviation due to rotation and the positional deviation due to non-linear distortion of the substrate21, by providing the plurality of mark sets on the same surface.

As shown inFIGS. 3 and 4, the mark set70includes a first mark71formed by providing a recess in the n-type region25which is the first patterned layer, and a second mark72formed by leaving the p-type region26which is the second patterned layer with an island shape and in a manner to fit within the first mark71. In other words, the mark set70is provided within the n-type region25. The second mark72is formed directly over the back surface21b, distanced from the surrounding n-type region25. The mark set70further includes a third mark73formed by leaving the electrode layer which is the third patterned layer (the transparent conductive layer43and the metal layer44) in an island shape and in a manner to fit within the second mark72. Because the transparent conductive layer43and the metal layer44have the same pattern in the planar view, for example, alternatively, the third mark73only on the transparent conductive layer43may be used.

The mark set70is provided on an opening of the bus bar portion42. On an outer side of the first mark71, a region in which the electrode layer is not formed is present, and a ring-shaped n-type region25is exposed in this region. With this structure, it is possible to prevent contact of the electrode layer with the substrate21even when the electrode layer is slightly deviated from the target layering position.

The marks in the mark set70have a circular shape in the planar view, and differ from each other only in the size thereof. When a circular shape is employed for the marks in the planar view in this manner, for example, in a case where the p-type region26is shifted in the x and y directions from the target layering placement, a portion is created where a gap D1 to be described later becomes the shortest (refer toFIG. 5). With this configuration, a degree of positional deviation (amount of deviation) and direction of deviation can be easily checked. The shape of the marks is not limited to a circular shape, and may alternatively be other shapes such as a polygon shape including a quadrangular shape, an elliptical shape, a cross shape, or the like, as will be described later.

In the configuration exemplified inFIG. 3, the centers of the marks of the mark set70are made to coincide with each other. The gap D1 between an outline71L of the first mark71and an outline72L of the second mark72is uniform over the entire perimeter of the second mark72. In addition, a gap D2 between the outline72L of the second mark72and an outline73L of the third mark73is also uniform over the entire perimeter of the third mark73. Normally, a center of the first mark71is set as a target of alignment of the patterned layers. In other words, the solar cell10having the mark set70shown inFIG. 3(when the mark set80also has the configuration shown inFIG. 6) has the n-type region25, the p-type region26, and the electrode layer which are aligned at a target precision.

On the other hand, as shown inFIG. 5, there may be a case where the centers of the marks do not coincide with each other. In the configuration exemplified inFIG. 5, the center of the second mark72is shifted in the y direction from the center of the first mark71, and the gap D1 between the outlines71L and72L is not uniform. In other words, the solar cell10having the mark set70shown inFIG. 5has the p-type region26which is deviated in the y direction from the target layering placement with respect to the n-type region25.

Here, the gap D1 between the outlines71L and72L preferably defines a tolerable value for the positional deviation between the n-type region25and the p-type region26. Similarly, the gap D2 between the outlines72L and73L preferably defines a tolerable value for the positional deviation between the p-type region26and the electrode layer. In this case, for example, contact between the outlines71L and72L indicates that there is a positional deviation between the n-type region25and the p-type region26exceeding the tolerable value. The tolerable value for the positional deviation (that is, gaps D1 and D2) is determined in consideration of, for example, the performance and yield of the solar cell10. The tolerable value is not limited to a particular value, but for the case of the solar cell10of the back-contact type, the tolerable value is preferably about a few μm to a few tens of μm.

As shown inFIGS. 6 and 7, the mark set80includes a first mark81formed by leaving the n-type region25, which is the first patterned layer, with an island shape, and a second mark82formed by leaving the p-type region26, which is the second patterned layer, with an island shape and in a manner to fit within the first mark81. Between the n-type region25and the p-type region26, the insulating layer31formed in the same pattern as the p-type region26is present. The first mark81is surrounded by the p-type region26in its entire perimeter and is formed directly over the back surface21bdistanced from the p-type region26. In other words, the mark set80is provided within the p-type region26. In addition, the mark set80includes a third mark83formed by leaving the electrode layer (the transparent conductive layer53and the metal layer54), which is the third patterned layer, with an island shape and in a manner to fit within the second mark82.

In the mark set80also, the marks have a circular shape in the planar view, and the centers of the marks coincide with each other. In addition, a gap between outlines81L and82L is set to D1 and a gap between outlines82L and83L is set to D2.

Alternative configurations of the mark set70and the placement thereof will now be described with reference toFIGS. 8-12. Marks shown inFIGS. 8-10have the layered structure shown inFIG. 4, and differ from each other only in the shape in the planar view (inFIGS. 8 and 9, only the first mark71and the second mark72are shown). Here, for the purpose of the explanation, the elements forming the same layers are assigned the same reference numerals, and will not be described again.

A mark set70pshown inFIG. 8includes a first mark71and a second mark72having a quadrangle shape in the planar view. The marks are, for example, squares in the planar view. A gap between an outline71L of the first mark71and an outline72L of the second mark72is uniform over the entire perimeter of the second mark72in a state where the centers of the marks coincide. With the use of the first mark71and the second mark72having quadrangular shapes in the planar view, it becomes easier to judge the positional deviation due to rotation, compared to a case where marks having a circular shape in the planar view are used.

A mark set70qshown inFIG. 9includes a first mark71and a second mark72having shapes different from each other in the planar view. In the mark set70q, the gaps between the outlines71L and72L differ in one direction (y direction) passing through a center of the first mark71and a second direction which is orthogonal to the one direction (x direction). More specifically, the first mark71has a rectangular shape in the planar view, the second mark72has a circular shape in the planar view, and the first mark71extends longer in the y direction. In a state where the centers of the marks coincide, a gap D3 in the y direction is wider than a gap D4 in the x direction. In this case, the tolerable value for the positional deviation between the n-type region25and the p-type region26differs depending on the direction, and is set larger in the y direction than in the x direction.

Similar to the mark set70q, a mark set70rshown inFIG. 10includes a first mark71, a second mark72, and a third mark73having shapes different from each other in the planar view. The first mark71and the third mark73have an elliptical shape in the planar view. However, the major axis directions of the ellipses are orthogonal to each other, with the major axis direction of the first mark71being parallel to the y direction and the major axis direction of the third mark73being parallel to the x direction. The second mark72has a circular shape in the planar view. In other words, the tolerable value for the positional deviation between the n-type region25and the p-type region26, and the tolerable value for the positional deviation between the p-type region26and the electrode layer are set to be larger in the y direction than in the x direction.

In the solar cell10, preferably, the alignment precision is set higher in the x direction along which the n-type region25and the p-type region26are alternately placed than in the y direction. That is, in the solar cell10, because the degree of positional deviation that can be tolerated differs depending on the direction over the back surface21b, it is preferable to employ different lengths of the marks corresponding to the directions. With such a configuration, an efficient alignment suited for the solar cell10can be achieved.

In an example configuration shown inFIG. 11, a mark set group91is formed by placing a plurality of mark sets70on a concentric circle around a center circle90. The center circle90is a mark formed as an index mark when the mark set group91is to be formed, and formed, for example, by machining the back surface21bwith laser or the like. In the mark set group91, a plurality of mark sets70are placed on the concentric circle with equal spacing, and each mark set has the same size. By placing the plurality of mark sets70on the concentric circle in this manner, for example, it is possible to judge the positional deviation due to rotation, in addition to the positional deviation due to shift, without the need for checking the mark set80.

In an example configuration shown inFIG. 12, a plurality of mark sets70a-70jare placed on a concentric circle around the mark set70, to form a mark set group92. The mark sets70a-70einclude a first mark71and a second mark72, and are used for judging positional deviation between the n-type region25and the p-type region26. On the other hand, the mark sets70f-70jinclude a first mark71xand a third mark73, and are used for judging the positional deviation between the n-type region25and the electrode layer. The first mark71xhas a form in which an island made of the n-type region25is formed in a recess provided on the n-type region25. With such a configuration, in a case where three or more patterned layers are layered, it is possible to easily judge in which layer the positional deviation exists.

In the mark sets70a-70e, gaps between the outline71L of the first mark71and the outline72L of the second mark72differ from each other. The gaps are set to be widest for the mark set70a, and to become narrower toward the mark set70e, and to zero, for example, for the mark set70e. With such a configuration, the amount of deviation and the direction of deviation of alignment can be quickly judged. For example, when the outlines71L and72L contact each other at the mark set70d(with a gap of d) and the outlines71L and72L do not contact each other in the mark set70c(with a gap of c), the amount of deviation can be immediately known to be greater than or equal to d and less than c. Similarly, in the mark sets70f-70j, the gaps between the outlines71Lx and72L are set to differ from each other.

The forms exemplified inFIGS. 8-12can be applied also to the mark set80. In addition, in the above, a configuration is described in which the second and third patterned layers are left in the island shape to form the second and third marks, but alternatively, recesses may be provided on the second and third patterned layers to form the second and third marks.

A method of manufacturing the solar cell10having the above-described structure will now be described with reference toFIGS. 13-25. Here, a configuration is described in which an amorphous silicon layer is employed as the amorphous semiconductor layer such as the i-type amorphous semiconductor layer22, and SiN layers are employed as the protection layer24and the insulating layer31.

InFIGS. 13-25(except forFIGS. 20 and 21), cross sections corresponding to an A2-A2line cross section, an A1-A1line cross section, and an A3-A3line cross section during the manufacture of the solar cell10are shown.

As shown inFIG. 13, the i-type amorphous semiconductor layer22, the n-type amorphous semiconductor layer23, and the protection layer24are sequentially formed over the light receiving surface21aof the substrate21, and the n-type region25(the i-type amorphous semiconductor layer27and the n-type amorphous semiconductor layer28) and the insulating layer31are sequentially formed over the back surface21b. In this process, for example, a clean substrate21is placed in a vacuum chamber, and the layers are formed through CVD or sputtering. In addition, in this process, for example, the n-type region25and the insulating layer31are formed over the entire region other than an end edge region over the back surface21b.

For the formation of the i-type amorphous semiconductor layers22and27through CVD, for example, material gas in which silane gas (SiH4) is diluted with hydrogen (H2) is used. In addition, for the formation of the n-type amorphous semiconductor layers23and28, for example, material gas in which phosphine (PH3) is added to silane gas (SiH4) and the resulting gas is diluted with hydrogen (H2) is used. By changing the hydrogen dilution ratio of the silane gas, it is possible to change the film characteristics of the i-type amorphous semiconductor layers22and27and the n-type amorphous semiconductor layers23and28. In addition, by changing a mixture concentration of phosphine (PH3), it is possible to change a doping concentration of the n-type amorphous semiconductor layers23and28. For the formation of the protection layer24and the insulating layer31through CVD, for example, mixture gas of SiH4/ammonia (NH3) or SiH4/nitrogen (N2) is used as the material gas.

Next, as shown inFIG. 14, the n-type region25and the insulating layer31formed over the back surface21bare patterned. The patterning is executed by, for example, forming a target resist pattern over the insulating layer31, and etching and removing a region which is not covered by the resist film and which is exposed. The insulating layer31can be etched, for example, using a hydrogen fluoride (HF) etchant. After the etching of the insulating layer31is completed, the resist film is removed, and the n-type region25which is exposed is etched using the patterned insulating layer31as a mask. The n-type region25can be etched, for example, using an alkaline etchant such as sodium hydroxide (NaOH) etchant (for example, NaOH etchant of 1 wt %).

With this process, the first patterned layer (patterned n-type region25), the first mark71of the mark set70, and the first mark81of the mark set80are formed. At this point, the insulating layer31formed in the same pattern as the n-type region25exists over the n-type region25. In the mark set70formed in the n-type region25, the first mark71is formed by etching and removing a part of the n-type region25and the insulating layer31to provide the recess. On the other hand, in the mark set80formed in the p-type region26, the n-type region25and the insulating layer31are left in an island shape to form the first mark81.

Then, as shown inFIG. 15, the p-type region26(the i-type amorphous semiconductor layer29and the p-type amorphous semiconductor layer30) is formed over the entire region other than an end edge region over the back surface21b. The p-type region26is formed directly over the patterned insulating layer31and the back surface21b. Similar to the n-type region25, the p-type region26can be formed through CVD. However, for the formation of the p-type amorphous semiconductor layer30through CVD, for example, diborane (B2H6) is used as the doping gas in place of phosphine (PH3).

Next, as shown inFIGS. 16-19, a part of the p-type region formed over the insulating layer31and a part of the insulating layer31are removed. With this process, a part of the n-type region25is exposed, to forma contact region between the n-type region25and the n-side electrode40. In this step, first, the above-described part of the p-type region26is etched and removed, but for this process, the n-type region25and the p-type region26must be aligned.

First, a resist pattern101shown inFIG. 17is created. As a method of patterning, various methods may be employed such as, for example, printing, photolithography, imprinting, direct drawing, and printing, photolithography, and imprinting in which a mask pattern is transferred. From the viewpoint of mass productivity, of these methods, printing, photolithography, and imprinting in which the mask pattern is transferred are desirable. In this description, the printing is employed.

As shown inFIG. 16, after a resist film100is formed over the entire region of the p-type region26, the resist pattern101is formed thereover through printing. For the resist film100, for example, a printing resist composition may be used. For a mask110, for example, a mask having a protection section111corresponding to the above-described contact region may be employed. In other words, in the mask110, an opening pattern112for forming the pattern of the p-type region26, an opening pattern113for forming the second mark72, and an opening pattern114for forming the second mark82are formed.

The mask110is placed such that the opening pattern113is positioned within the first mark without being placed out of the first mark71, and such that the opening pattern114is positioned within the first mark81without being placed out of the first mark81. In this process, for example, a step may be provided in which the mask110is placed such that an outline of the opening pattern113and the outline71L of the first mark71do not contact each other, while actually checking the outlines. However, from the viewpoint of the productivity or the like, it is preferable to check the placement of the first mark71and the second mark72afterwards. Therefore, in this process, the placement of the mask110is adjusted using coordinate data of the first mark71and coordinate data of the opening pattern113.

Next, as shown inFIG. 18, using the created resist pattern101, the above-described part of the p-type region26is etched and removed with an alkaline etchant such as the NaOH etchant. When the etching is executed as designed, the second mark72is formed within the first mark71and the second mark82is formed within the first mark81. Because the p-type region26is normally more difficult to etch than the n-type region25, for example, an etchant of a higher concentration (for example, NaOH etchant of 10 wt %) than the NaOH etchant used for etching the n-type region25is used.

Then, as shown inFIG. 19, for example, the resist pattern101is removed, and the insulating layer31is etched and removed using the patterned p-type region26as a mask. With this process, the insulating layer31remains only in a region between the n-type region25and the p-type region26. In the mark set80also, the insulating layer31is patterned in the same shape as the p-type region26.

Then, it is checked whether or not the second mark72is positioned within the first mark71without being placed out of the first mark71, to judge the positional deviation between the n-type region25and the p-type region26. Similar judgment is also executed for the second mark82. More specifically, presence or absence of contact of outlines of the marks is measured, and the positional deviation is judged. In other words, the gap between the outlines of the marks is set as the tolerable value for the positional deviation.

In this process, as shown inFIG. 20, even when the second mark72is significantly shifted from the center of the first mark71, if it is confirmed that the outlines71L and72L do not contact each other and the outlines81L and82L do not contact each other, it is judged that the positional deviation between the n-type region25and the p-type region26is within the tolerable value. On the other hand, as shown inFIG. 21, for example, when the outlines71L and72L contact each other, the positional deviation is judged to be exceeding the tolerable value. When the positional deviation between the n-type region25and the p-type region26is judged as being within the tolerable value, the process proceeds to an electrode forming step, and, when the positional deviation is judged to exceed the tolerable value, for example, the product is appropriately handled as a deficient product.

The measurement of the mark placement may be, for example, automatically executed by image processing using an optical microscope. Alternatively, the mark placement may be observed by human eyes using the optical microscope. In this measurement, not only the presence or absence of the contact between the outlines of the marks may be checked, but also, the amount of deviation and direction of deviation may be checked. For example, the amount of deviation or direction of deviation of the second mark72with respect to the first mark71may be measured, and the measured value may be fed back to the placement process of the mask110. Alternatively, in this process, a gap between outlines of the marks may be measured, and the positional deviation may be judged as being within the tolerable value when the measured value is greater than or equal to a threshold which is determined in advance.

The photoelectric conversion unit20can be manufactured through the process as described above. The n-side electrode40is then formed over the n-type region25of the photoelectric conversion unit20and the p-side electrode50is formed over the p-type region26, to manufacture the solar cell10. The n-side electrode40and the p-side electrode50are formed, for example, through a method exemplified below.

First, as shown inFIG. 22, a transparent conductive layer32made of TCO is formed to cover the entire region over the n-type region25, the p-type region26, the first marks71and81, and the second marks72and82. The transparent conductive layer32may be formed, for example, through sputtering or CVD. In the transparent conductive layer32, the separation groove60is formed in a later step, to separate the transparent conductive layer32into transparent conductive layers43and53. In this process, the p-type region26and the transparent conductive layers43and53for forming the electrode layer must be aligned.

Next, a resist pattern103shown inFIG. 24is created. As the method of patterning, similar to the resist pattern101, various methods may be used such as, for example, printing, photolithography, imprinting, direct drawing, and printing, photolithography, and imprinting in which a mask pattern is transferred. From the viewpoint of the mass productivity, printing, photolithography, and imprinting in which the mask pattern is transferred are desired. In this description, an example configuration is described which uses the printing.

As shown inFIG. 23, after a resist film102is formed over the entire region of the transparent conductive layer32, the resist pattern103is formed thereover through printing. For the resist film102, similar to the resist film100, a printing resist composition may be used. For a mask115, a mask in which a protection section116corresponding to the separation groove60is provided is used. In the mask115, an opening pattern117which is a pattern for forming the pattern of the p-type region26, an opening pattern118which is a pattern for forming the second mark72, and an opening119which is a pattern for forming the second mark72are formed.

The mask115is placed such that the opening pattern118is positioned within the second mark72without being placed out of the second mark72, and such that the opening pattern119is positioned within the second mark82without being placed out of the second mark82. In this process, for example, a step may be provided to place the mask115so that an outline of the opening pattern118and the outline72L of the second mark72do not contact each other while actually checking the outlines. However, similar to the patterning process of the p-type region26, from the viewpoint of the improvement in the productivity or the like, it is preferable to adjust the placement of the mask115using the coordinate data of the second mark72or the like.

Next, as shown inFIG. 25, using the created resist pattern103, a part of the transparent conductive layer32is etched and removed with an alkaline etchant such as hydrogen chloride (HCl) etchant or oxalic acid etchant. With this process, the separation groove60is formed, the third mark73is formed within the second mark72, and the third mark83is formed within the second mark82.

Then, similar to the case of the second marks72and82, it is checked whether or not the third marks73and83are positioned within the second marks72and82without being placed out of the second marks72and82. With this process, presence or absence of the positional deviation between the p-type region26and the electrode layer is judged. Alternatively, the positional deviation judgment between the p-type region26and the electrode layer may be executed after the metal layers44and54are formed.

Finally, the metal layers44and54are respectively formed over the transparent electrode layers43and53. The metal layers44and54may be formed through electroplating. In this case, it is preferable to form a seed layer for the plating in the same pattern as and over the transparent conductive layers43and53. When a Cu-plated layer is to be formed as the metal layers44and54, the seed layer is also preferably a Cu layer. Through the electroplating, the metal layers44and54(Cu-plated layers) are formed over the Cu seed layer. The electroplating may be executed, for example, by applying a current of the same size through a Cu seed layer for forming the n-side electrode40and a Cu seed layer for forming the p-side electrode50. Over a surface of the Cu-plated layer, preferably, a protection layer for preventing oxidation of Cu and for preventing reduction of conductivity, such as, for example, a Sn-plated layer, is formed.

In the above-described exemplary manufacturing process, a plurality of steps for judging the positional deviation have been provided, but alternatively, the positional deviation judgment for the n-type region25, the p-type region26, and the electrode layer may be collectively executed after all of the layers have been formed. Moreover, in addition to or in place of the mark set70in which three marks are overlapped, as exemplified inFIG. 12, a mark set having the first mark and the second mark, and a mark set having the first mark and the third mark, may be formed. Similar to the above, in this case also, the positional deviation judgment may be collectively executed after all of the layers have been formed.

In addition, in the above-described exemplary manufacturing process, a mark set is exemplified in which the gap between the outlines of the marks are equal in a state where the centers of the marks coincide with each other, but alternatively, as exemplified inFIGS. 9 and 10, a mark set having different gaps may be formed. For example, the first mark and the second mark may be formed in shapes different from each other such that the gaps between the outlines of the marks differ from each other in one direction passing through the center and another direction orthogonal to the one direction, in a state where the center of the first mark and the center of the second mark coincide with each other in the planar view.

Alternatively, a plurality of mark sets may be formed in at least one of the n-type region25and the p-type region26. The plurality of mark sets may be placed, for example, on a concentric circle, as exemplified inFIG. 11. Moreover, a plurality of mark sets may be formed having different gaps between the outlines of the marks.

As described, by judging the positional deviation of or aligning the n-type region25, the p-type region26, and the electrode layer using the mark sets70and80, or the like, the solar cell10can be manufactured with a high efficiency. For example, positional deviation judgment which is stricter than necessary may be inhibited while maintaining the performance of the solar cell10, to consequently improve the yield. In particular, in the case when the precision of alignment differs depending on the directions, the lengths of the mark may be changed depending on the directions, to further improve the yield.

The positional deviation judgment using the mark sets70and80is executed by a simple method of, for example, measuring presence or absence of contact between the outline71L of the first mark71and the outline72L of the second mark72. Therefore, the analysis is easy, and can be achieved by observation with human eyes using the optical microscope. In addition to the observation with human eyes, the contact between the outline73L of the third mark73formed by leaving the electrode layer (the transparent electrode layer43and the metal layer44) with the island shape and the outline72L of the second mark72can be easily judged by measuring a resistance value between the electrode layer of the third mark73and the electrode layer at an outer periphery of the second mark72.

In addition to the above, the amount of deviation and direction of deviation of the patterned layers can be measured using the mark sets70and80. In particular, by employing a circular shape, in the planar view, for the marks, the measurement of the amount of deviation and the direction deviation can be facilitated. Furthermore, with the use of a plurality of mark sets having different gaps between the outlines of the marks, more detailed and accurate judgment can be executed with a simple method.