Method for power management for computer system

The invention provides a method for power management for a computer system. In one embodiment, the computer system comprises a system controller, a chipset, and a battery coupled to the chipset via a system management bus. First, a timer of the chipset is used to calculate an accumulated time value. When the accumulated time value exceeds a threshold value, the chipset is directed to send a system control interrupt to the system controller. After the system controller receives the system control interrupt, the system controller is triggered to detect a power level supplied by the battery via the system management bus.

CROSS REFERENCE TO RELATED APPLICATIONS

This Application claims priority of Taiwan Patent Application No. TW97111970, filed on Apr. 2, 2008, the entirety of which is incorporated by reference herein.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The invention relates to computer systems, and more particularly to power management for computer systems.

2. Description of the Related Art

A computer system, such as a handheld device or a notebook, operates according to power supplied by batteries. Because a battery has a limited amount of power, a computer system cannot operate when the power of the battery is exhausted. The computer system therefore must know a power level of the battery. When the power level of the battery is lower than a threshold value, the computer system must remind a user of the reduced power level, thus directing the user to replace the battery with a new one.

Referring toFIG. 1, a block diagram of a conventional computer system100is shown. The computer system100comprises a system controller102, such as CPU, a south bridge chipset104, an embedded controller106, a system management bus110, a battery108, and other device112. The system controller102is a core of the computer system100and controls other component devices of the computer system100. The embedded controller106is connected to the battery108and the other device112via the system management bus110. The embedded controller106controls all devices connected to the system management bus110and reports a status of all devices connected to the system management bus110to the south bridge chipset104. In one embodiment, the other device112is a fan or a keyboard.

When a power level of the battery108is reduced, the embedded controller106must reports reduction of the power level of the battery108to the system controller102via the south bridge chipset104. Referring toFIG. 2, a flowchart of a method200for power management for the conventional computer system100is shown. The embedded controller106first detects whether a power level supplied by the battery108has decreased (step202). If so, the embedded controller106triggers the south bridge chipset104to send a system control interrupt to the system controller102(step204). In one embodiment, the embedded controller106enables a status bit of a general purpose register of the south bridge chipset104, thus triggering the south bridge chipset104to send the system control interrupt to the system controller102.

When the system controller102receives the system control interrupt corresponding to the embedded controller106, the system controller102queries the embedded controller106about a status of the devices connected to the system management bus110to generate further instructions to the devices. In one embodiment, the system controller102executes an operating system code to check data stored in a register120of the embedded controller106(step206). The system controller102then determines occurrence of an event about a power level of the battery108according to the data stored in the register120of the embedded controller106(step208). The system controller102then executes a basic input/output system (BIOS) code to detect the power level supplied by the battery108(step210). Finally, the system controller102executes an operating system code to update data about the power level of the battery108(step212).

Although the computer system100timely updates data about a power level of the battery108, the computer system100still has deficiencies. First, the computer system100has an embedded controller106for controlling the system management bus110. Because the computer system100may be a handheld device with a small size, the embedded controller106, which occupies a large area of a printed circuit board of the computer system100, hinders size reduction of the computer system100. In addition, a computer system100requiring the embedded controller106has a higher cost than one that does not require the embedded controller106. A computer system without the aforementioned deficiencies is therefore required.

BRIEF SUMMARY OF THE INVENTION

The invention provides a method for power management for a computer system. In one embodiment, the computer system comprises a system controller, a chipset, and a battery coupled to the chipset via a system management bus. First, a timer of the chipset is used to calculate an accumulated time value. When the accumulated time value exceeds a threshold value, the chipset is directed to send a system control interrupt to the system controller. After the system controller receives the system control interrupt, the system controller is triggered to detect a power level supplied by the battery via the system management bus.

The invention provides a computer system. In one embodiment, the computer system comprises a battery, a chipset connected to the battery via a system management bus, and a system controller coupled to the chipset. The chipset calculates an accumulated time value with a timer thereof, and sends a system control interrupt to the system controller when the accumulated time value exceeds a threshold value. The system controller detects a power level supplied by the battery via the system management bus when the system controller receives the system control interrupt.

DETAILED DESCRIPTION OF THE INVENTION

Referring toFIG. 3, a block diagram of a computer system300with a battery308as a power supply according to the invention is shown. The computer system300may be a handheld device or a notebook, for example. In one embodiment, the computer system300comprises a system controller302, a chipset304, a system management bus310, the battery308, and other device312. The system controller302is a core of the computer system300and controls other component devices of the computer system300. In one embodiment, the system controller302can be a central processor unit (CPU). The battery308provides power for operating all the component devices of the computer system300. In one embodiment, the chipset304can be a south bridge chipset. The south bridge chipset304is connected to the battery308and the other device312via the system management bus310. In one embodiment, a system-management-bus clock pin and a system-management-bus data pin of the south bridge chipset304are respectively coupled to a system-management-bus clock pin and a system-management-bus data pin of the battery308via the system management bus310. In addition, the south bridge chipset304has a timer314capable of calculating an accumulated time value according to an elapsing time period. In another embodiment, the chipset304can be a combination of a north bridge chipset and a south bridge chipset. In one embodiment, the system controller302executes a basic input/output system (BIOS) code to detect a power level of the battery308, and reports the power level of the battery308to an operating system.

Referring toFIG. 4, a flowchart of a method400for power management for the computer system300according to the invention is shown. The timer314of the south bridge chipset304first calculates an accumulated time value (step402). When the accumulated time value calculated by the timer314exceeds a threshold value (step404), the south bridge chipset304sends a system control interrupt to a system controller302(step406), and the timer314then clears the accumulated time value to zero. In one embodiment, the threshold value is equal to a minute. Because the timer314calculates the accumulated time value to indicate an elapsing time period, the south bridge chipset304sends a system control interrupt to the system controller302whenever the elapsing time period is equal to the threshold value. In detail, the south bridge chipset304sends a system control interrupt to notice an operating system executed by the system controller302.

When the system controller302receives a system control interrupt from the south bridge chipset304, the system controller302detects a power level of the battery308via the system management bus310(step408). In one embodiment, the system controller302executes a BIOS code to detect the power level supplied by the battery308. When the system controller302has obtained the power level of the battery308, the system controller302executes an operating system code to update data about the power level of the battery308(step410). In one embodiment, the operating system code shows the power level of the battery308on a screen of the computer system300as a reference for a user of the computer system300.

Referring toFIG. 5, a schematic diagram of a screenshot of the screen showing the power level of the battery308is shown. When a predetermined time interval has passed, the timer314triggers the south bridge chipset304to send a system control interrupt to the system controller302, and then the system controller302updates the power level data shown on a screen of the computer system300according to the trigger of the system control interrupt. The user of the computer system300therefore always knows a power level status of the battery308. The user can therefore timely replace the battery308when the power level of the battery308is reduced, and the computer system300is assured of sufficient power supply.

The computer system300is capable of providing real-time information about a power level supplied by a battery. Compared to the conventional computer system100shown inFIG. 1, the computer system300does not require an embedded controller106, and hardware cost of the computer system300therefore is reduced. In addition, because an embedded controller106is removed from a printed circuit board of the computer system300, the computer system300can reduce its size, which benefits further miniaturization of the computer system300, such as a handheld device or a notebook. Furthermore, the system controller302detects a power level of the battery308via the system management bus310regularly. The computer system300is therefore superior to the conventional computer system100.