English:
[0001] Isolation circuits are for data and/or power transfer across a galvanic isolation barrier to interconnect electrical systems powered by different supply sources that do not share a common ground connection. Transformer isolation approaches involve switching circuits and magnetic fields, and the resulting electromagnetic interference (EMI) may be undesirable in certain applications. In addition, transformer isolation typically requires an additional transformer component and these solutions require significant circuit area and are costly. Capacitive coupling or AC coupling can be used to provide isolation for data transmission, but capacitor-based isolation solutions often involve parasitic capacitance that absorbs signal energy and leads to poor power efficiency. In addition, high voltage breakdown voltage ratings are costly to implement using capacitive coupling due to the need for thick layers of surface dielectric. Optical isolation avoids the EMI and circuit area problems associated with transformer isolation by transferring electrical power/signals between galvanically isolated circuits using light via a photon emitter (e.g., a light-emitting diode or LED) ,a receiver or sensor such as a Photo- Voltaic diode (PVD) and an optical coupling material. Optical coupling devices or optocouplers typically stack an LED source above a PV diode with glass or other transparent material in between to transmit photon energy vertically downward to the top of the PVD sensor. Moreover, high breakdown voltage isolation ratings can be achieved only by increasing the distance between the LED and the PVD, resulting in sometimes unacceptable vertical device heights. Some high isolation voltage optocouplers use a reflective dome that reflects light from the LED to the photodiode, which are positioned side-by-side for upward transmission by the LED and downward reception by the photodiode. In these conventional optocoupler approaches, the photon path is perpendicular to the surface of the silicon devices. LED light sources typically provide light signals at or near infrared wavelengths, and optocouplers generally suffer from poor power efficiency (e.g., current transfer ratio or CTR representing the ratio of the input current to the output current). In addition Common Mode Transient Isolation (CMTI) suffers in vertical constructions due to the capacitive coupling between emitter and detector. Accordingly, conventional optical isolation techniques do not provide adequate solutions for many power transfer applications.
[0003] FIG. 1 is a sectional side elevation view of an optical isolation integrated circuit including an LED light source and a lateral photo receptor diode sensor with a semiconductor structure having a plurality of laterally spaced p-n junctions throughout an extended effective junction distance in an internal cavity of a molded package structure providing an optical path for electrical isolation according to an embodiment.
[0004] FIG. 2 is a sectional side elevation view of another optical isolation IC embodiment with an LED light source and a lateral photodiode sensor, including a reflective coating formed on a concave surface of the package cavity.
[0005] FIG. 3 is a sectional side elevation view of another optical isolation IC embodiment with a glass or plastic optical transmission medium position between the LED light source and the lateral photodiode sensor.
[0006] FIG. 4 is a sectional side elevation view of another optical isolation IC embodiment with a light sensor including two vertically stacked lateral photodiode semiconductor structures individually including a plurality of p-n junctions to form a lateral multistage photovoltaic (LMSPV) light sensor.
[0007] FIG. 5 is a partial sectional side elevation view of optical reception in the light sensor of FIG. 4.
[0008] FIG. 6 is a sectional side elevation view of another optical isolation IC embodiment with a light sensor including four vertically stacked lateral photo diode semiconductor structures individually including a single extended p-n junction.
[0009] FIG. 7 is a partial sectional side elevation view of optical reception in the light sensor of FIG. 6.
[0010] FIG. 8 is a sectional side elevation view of another example isolation circuit including an infrared or near infrared light source with a parabolic focusing mirror and a photo diode semiconductor structure including a single extended p-n junction.
[0011] FIG. 9 is a partial schematic optical isolation system including a top plan view of an example of a lateral extended junction photodiode semiconductor structure with example output current taps.
[0012] FIG. 10 is a graph of collected tap current as a function of the effective junction distance in the semiconductor structure of FIG. 9.
[0013] FIG. 11 is a graph of an example absorption depth curve as a function of photon wavelength for silicon.
[0014] FIG. 12 is a simplified schematic diagram of an example isolated low dropout (LDO) regulator including an LMSPV pv bias generator array.
[0015] FIG. 13 is a simplified schematic diagram of an example solid state relay (SSR) including an LMSPV pv bias generator array.
[0016] FIG. 14 is a simplified schematic diagram of an example isolated latching SSR including an LMSPV light sensor.
[0017] FIGS. 15 and 16 are partial schematic sectional side elevation and sectional top plan views of an elongated isolation circuit including a light source and an LMSPV light sensor. Connected by an optical fiber.
[0018] FIG. 17 is a partial schematic sectional top plan view of an optical isolation system including a light source IC and LMSPV light sensor coupled by an optical fiber.
[0019] FIG. 18 is a partial schematic top plan view of an example LDO regulator including an LMSPV light sensor with a black polymer optical barrier formed between the LMSPV light sensor and other circuitry that can be used in the system of FIG. 17.
[0020] FIG. 19 is a partial schematic top plan view of an example LDO regulator with multiple LMSPV light sensor channels separated by a black polymer barrier.
[0021] FIG. 20 is a partial schematic top plan view of an example LDO regulator with multiple LMSPV light sensor channels separated by a black polymer barrier and individually including curved trenches filled with reflective material around the LMSPV light sensor channels.
[0022] FIG. 21 is a partial schematic top plan view of an example LMSPV light sensor semiconductor structure showing further details of several example interconnected semiconductor structures individually including multiple n-doped regions in a p-doped region to form multiple laterally spaced p-n junctions.
[0023] FIG. 22 is a partial schematic diagram of an example photon sensor including a lateral light sensor semiconductor structure with a multiple p-n junctions disposed along an extended effective junction distance, and a quench circuit to provide a photon multiplier circuit.
[0024] FIG. 23 is a partial schematic diagram of another example photon sensor including a lateral light sensor semiconductor structure with a single p-n junction disposed along an extended effective junction distance, and a quench circuit to provide a photon multiplier circuit.
[0025] In the drawings, like reference numerals refer to like elements throughout, and the various features are not necessarily drawn to scale. In the following discussion and in the claims, the terms "including", "includes", "having", "has", "with", or variants thereof are intended to be inclusive in a manner similar to the term "comprising", and thus should be interpreted to mean "including, but not limited to... " Also, the terms "couple", "coupled" or "couples" is intended to include indirect or direct electrical or mechanical connection or combinations thereof. For example, if a first device couples to or is coupled with a second device, that connection may be through a direct electrical connection, or through an indirect electrical connection via one or more intervening devices and connections.
[0026] Referring initially to FIG. 1, lateral photovoltaic sensors and systems are disclosed with one or more semiconductor structures that include a lateral sensor face to receive photons from a light source. The semiconductor structures include an extended lateral junction region with an effective junction distance greater than an absorption depth for the semiconductor material that corresponds to the wavelength of the received light signal. Various embodiments provide optical isolation devices and systems including a light source and such a lateral light sensor with a spacing distance between the light source and the light receiver to establish a high level of breakdown or isolation voltage rating of the device. In addition, the extended effective junction distance facilitates high current transfer ratios between the source current in the electrical current generated by the light sensor, and provides a solution for higher-efficiency power transfer through a galvanic isolation barrier. Various examples include sensor circuits with optical boundaries around the sensor channel to mitigate cross talk and enable internal reflections for high-efficiency transfer of power and/or data signals between the source and the sensor. Multichannel data transmission implementations are possible, as well as single or multichannel power transfer embodiments. Disclosed examples can also be used for photon sensors, such as photon multipliers and other detector circuits. In various examples, the extended lateral length of the p-n junction facilitates high photon capture probabilities to achieve high efficiency. Certain examples include a single extended p-n junction in the semiconductor structure. Other examples provide multiple p-n junctions laterally disposed across an extended effective junction distance. In certain examples, moreover, multiple extended junction semiconductor structures are interconnected to form a lateral multistage photovoltaic (LMSPV) light sensor to provide a variety of different output currents and/or voltages for power transfer applications. The LMSPV structures can also be used for data transfer applications. The disclosed examples advantageously facilitate the use of optical isolation to avoid or mitigate the above described shortcomings of magnetic and capacitive isolation techniques and apparatus for power and/or data transfer, while facilitating higher efficiency than was possible with previous optocouplers and optical isolation devices. In certain implementations, bias and quench circuits are combined with the extended junction semiconductor structures to form a photon detector with integrated amplification or as is commonly referred to as a silicon photon multiplier (SiPM) device.
[0027] FIG. 1 shows an optical isolation integrated circuit (IC) 100 including a molded structure 102 with one or more electrical conductor structures 104 to form an integrated circuit package that includes an LED light source 108 and a lateral light sensor 106. A light signal travels through a cavity 110 of an integrated circuit package structure 102 along an optical path 114 from a lateral signal output face 107a of the light source 108 to a lateral sensor face 107b of the light sensor 106. In one example, the light source 108 is an LED fabricated in a first GaAs semiconductor die or other circuit structure 105, although lasers, silicon based photon emitters or other optical sources can be used in other embodiments. The sensor 106 includes a semiconductor structure formed by a p-doped region 101 and one or more n-doped regions 103 to form a plurality of laterally spaced p-n junctions throughout an extended effective junction distance D. In illustrated examples, the light sensor 106 is fabricated as a second device or circuit structure with a vertical front side forming the lateral sensor face 107b that faces the optical path 114 to receive the light signal. The light sensor 106 provides one or more p-n junctions along the extended effective junction distance D, schematically represented as a diode 111 in FIG. 1. The circuit structures 105 and 106 individually include bond pads 122 connected by bond wires 124 to corresponding electrical conductors 104a, 104b of a lead frame structure. The conductors 104a and 104b in one example are IC pins or pads that can be soldered to a host printed circuit board (PCB, not shown). In one example, an external circuit (not shown) provides an electrical signal to the light source 108 via a pair of input conductors 104a, and the light source 108 generates the light signal along the optical path 114 in response to the received electrical signal. In this example, the IC 100 also include bond pads 122 that are electrically connected by corresponding bond wires 124 to a second pair of leadframe electrical conductors 104b schematically shown in FIG. 1 to provide an electrical output signal from the light sensor 106. The conductors 104b in the illustrated examples provide pads or pins of the IC 100 that can be soldered to a host PCB to deliver an electrical signal from the sensor 106 that is isolated from the source signal at the conductors 104a. The isolation voltage rating or breakdown voltage of the isolator IC 100 in this example is set by a spacing distance or gap distance 116 separating the circuit structures 105 and 106 across a galvanic isolation boundary.
[0028] The signal output face 107a and the sensor face 107b lie in generally parallel planes, spaced from one another by the distance 116 in the cavity 110. In other possible examples, the faces 107 need not be parallel. Any relative configuration can be used in which the sensor face 107b at least partially faces the light source 108 so as to receive the light signal. The sensor face 107b allows light to enter the structure 106 to generate an output electrical signal corresponding to the intensity of the light signal. The sensor circuit 106 may include further interface circuitry (not shown) to operate on the sensor signal. As shown in FIG. 1, significant portions of the faces 107a and 107b are exposed within the cavity 110, although not a strict requirement of all possible embodiments. In the example of FIG. 1, the light source 108 and the light sensor 106 are spaced from one another in the internal cavity 110 of the molded package structure 102 to provide electrical isolation therebetween. The cavity 110 in this example provides the optical path 114 free of solids (i.e., solid-free). In other examples (e.g., FIGS. 3 and 4 below), glass or other optically transmissive solid structures can be provided between the light source 108 and the light sensor 106. The cavity 110 in one example is sealed, and includes air or other optically transmissive gas, which may advantageously have a lower dielectric constant than glass or other transparent solid materials, thereby reducing capacitive coupling between the optical source 108 and sensor 106. In the example of FIG. 1, the cavity 110 includes a concave upper surface 112, although not a strict requirement of all possible implementations. The cavity 110 can be formed in one example using deposited sacrificial sublimation material during formation of the molded structure 102, followed by evaporation or sublimation through a port 118 to create the solid-free cavity 110. The port 118 can then be closed by a tape or other closure structure 120 to form a seal of the cavity 110. The isolation gap or spacing 116 in certain examples is controlled by mechanical features on one of the dies or circuit structures 105, 106, such as oxide bumps (not shown) extending between the dies 105 and 106 to set the gap distance 116. The gap 116 is controlled in some examples by mixing filler material of a particular size with the sacrificial material used in forming the cavity 110. In the illustrated examples, the interior surface of the package structure 102 includes a concave portion, which can be provided by forming a sacrificial material during fabrication as a drop or one or more drops, such as using a printing process. This deposited sacrificial material thus forms a partially convex structure, and the material is later sublimated or evaporated after formation of the molded package structure material 102, leaving a concave inner surface. As shown in dashed line 113 in FIG. 1, the concave shape of the cavity inner surface can extend beyond the edges of the dies 105 and 106 to allow some light transfer out of the upper portion of the LED light source 105 and into the upper portion of the sensor die 106.
[0029] The IC 100 in one example is an optical isolation circuit to transfer data or power from an electrical circuit connected to the light source 108 to an electrical circuit (not shown) connected to the sensor 106. The light source 108 generates a light signal of a given wavelength λ along the optical path 114. In one example, the light source is a lateral LED providing the signal at a wavelength λ of about 950 nm. Any other suitable light source wavelength λ can be used. As used herein, a light signal of a given wavelength λ means the designated wavelength and possibly other wavelengths near the designated value, such as within a few percent of the designated value or any suitable wavelength tolerance associated with LEDs or other light sources used for optical isolation devices. In one example, the source 108 provides a long wavelength signal with an energy just above the bandgap energy of silicon to maximize the absorption depth in the semiconductor structure 101, 103 of the light sensor 106. A wavelength λ with an energy level less than the bandgap energy of silicon will interact weakly with the silicon, whereas a λ with an energy level greater or much greater than the bandgap of silicon will be strongly absorbed, but the energy portion greater than the bandgap is wasted as electrons quickly thermalize down. In certain examples, the lateral device is optimal for wavelengths at the bandgap energy where the silicon length can be increased to obtain maximum capture.
[0030] The light sensor 106 is designed for operation in receiving and capturing laterally received photons of the given wavelength λ. The light sensor 106 in the example of FIG. 1 includes a semiconductor structure having a top T and a bottom B, as well as a front side at least partially facing the optical path 114 to provide the sensor face 107b to receive the light signal from the source 108. The semiconductor structure further includes a back side spaced from the front side, and lateral sides extending vertically between the top T and bottom B, and horizontally between the front and back sides. In the illustrated examples, the semiconductor structure is generally rectangular, with generally parallel front and back sides, and the top and bottom are generally planar and parallel to one another. In addition, the illustrated example provides generally planar lateral sides. However, other semiconductor structure shapes can be used. Any suitable semiconductor structure can be used. In certain examples, the semiconductor structure is silicon (Si). In other examples, gallium arsenide (GaAs) or other suitable semiconductor materials can be used.
[0031] The semiconductor structure includes a p-doped portion 101 with boron or other p-type dopants. The p-doped portion 101 extends along at least a portion of the bottom B in certain implementations, as shown in FIG. 1. In one example, the semiconductor structure is fabricated beginning with a p-doped silicon substrate to form the portion 101. The p-type portion is electrically connected out the bottom B to a package electrical connector 104b. In other examples, p-type dopants are introduced into a semiconductor substrate by implantation and/or diffusion to form the p-doped portion 101. The semiconductor structure also includes one or more n-doped portions 103 including phosphorus or other n-type dopants at least partially adjacent to the p-doped portion 101. The n-doped portion electrically connect out the top T to electrical connections 122 and 124 to another package electrical connector (not shown). The n-doped portion or portions 103 form at least one p-n junction in the semiconductor structure. The resulting p-n junction or junctions extend by an effective junction distance D between the front side and the back side of the semiconductor structure. The effective junction distance D in certain examples is greater than a constant K times an absorption depth for the semiconductor structure that corresponds to the given wavelength λ, where K is greater than unity.
[0032] As used herein, the absorption depth for the semiconductor structure 101, 103 is a distance value (e.g., extending from the sensor face 107b to the right into the semiconductor structure in FIG. 1) for which the incident radiation intensity is reduced by 1/e or approx. 36%. At this distance, the amount of photon energy absorbed by silicon 101, 103 through the creation of electron/hole pairs would be approximately 64% of the given wavelength λ received at the lateral sensor face 107b. In one example, K is greater than or equal to 5. In other examples, K is greater than or equal to 10. In further implementations, K is greater than or equal to 20. The junction distance D can be any suitable size within the practical physical limitations of a given end-use application, e.g., where K is less than 1000. The n-doped portion in one example extends along at least a portion of the top T, although not a requirement of all possible implementations. The extended effective p-n junction distance D facilitates absorption of a high percentage of the incident photons received at the lateral sensor face 107b. For example, as illustrated and described further below in connection with FIGS. 9 and 10, photon capture and resulting carrier generation is highly probable at or near the entrance at the sensor face 107b of the semiconductor structure, and the probability of photon capture decreases with increasing distance from the front of the semiconductor structure. In disclosed lateral devices, the lateral dimension is the planar (horizontal) distance of a standard thickness silicon wafer. In many manufacturing processes, a silicon wafer is background to about 10 mils thick, and the standard vertical photovoltaic sensor would only have a path length of about 254 microns. Of this path length, moreover, only the top 20 microns or so is useful for photon capture. A long junction could be constructed by building a very thick, multi -junction piece of vertical silicon and laying the assembled die stack on its side.
[0033] Making the semiconductor structure to include one or more n-doped portions 103 extending or distributed throughout substantially all of the effective p-n junction distance D facilitates high efficiency photon capture probability by making D large relative to the absorption depth corresponding to a particular semiconductor material and the corresponding given wavelength λ. For example, high-efficiency LED light sources 108 can be used to transmit photons at a wavelength λ of approximately 950 nm. Using a silicon semiconductor structure with suitably doped p and n portions 101 and 103, approximately 64% of the received photon energy is absorbed in the first 80 um of travel for the 950 nm source. The inventor has appreciated that high absorption percentage is achieved for K greater than or equal to 5, and further improvement is achieved by using K greater than or equal to 10. Moreover, near complete (e.g., close to 100%) absorption can be achieved for K greater than or equal to 20. In the example of FIG. 1, the effective p-n junction distance D is implemented by creating multiple p-n junctions via corresponding n-doped regions 103 implanted and/or diffused in the top of the p-doped portion 101. Although the example of FIG. 1 shows five such n-doped regions 103 to create p-n junctions throughout substantially all of the distance D, a large number of n-doped regions 103 can be used to create a corresponding large number of p-n junctions. Although the illustrated n-doped regions 103 are substantially uniformly spaced between the front and back the lateral semiconductor structure, uniform spacing is not a strict requirement of all possible implementations, and multiple spacings and feature sizes can be used in various embodiments.
[0034] The resulting structure 101, 103 provides multiple p-n junctions along a generally straight corridor to facilitate high collection probability. In various embodiments, multiple such semiconductor structures can be employed (e.g., FIG. 4), and the corresponding optical corridors can be electrically isolated. Interconnection circuitry can be provided in the IC 100 in order to connect the resulting p-n extended junction cells in any desired series and/or parallel configurations. The individual semiconductor structures, moreover, can include upper and lower (e.g., top and bottom) reflective materials or structures 109 to provide internal reflection to facilitate capture of most of the received photon energy, and to optically isolate each channel from adjacent optical circuits. This multichannel concept, moreover, can be extended to use in power transfer as well as data transfer applications, where the optical isolation of different channels facilitates minimization of cross talk for communications applications. As shown in FIG. 1, moreover, and optically reflective material 109 can be provided at the back side of the semiconductor structure 101, 103 in order to cause any photons encountered at the backside to be reflected back towards the sensor face 107b, thereby further improving collection efficiency. Similarly, optically reflective material can be provided on the lateral sides (not shown) of the semiconductor structure 101, 103 in certain embodiments, and order to further enhance the probability of a given incident photon being collected by the sensor structure.
[0035] As previously mentioned, multiple semiconductor structures 101, 103 can be included in certain examples, and these cells can be stacked or otherwise interconnected in any suitable series and/or parallel fashion to achieve a desired output voltage and/or current. In certain examples (e.g., FIGS. 6-8 and 23), a single, extended p-n junction is provided in the individual semiconductor structures 101, 103 to create a single p-n junction having a junction distance D by using a single n-doped portion 103. In other examples (e.g., FIGS. 1-5, and 12-22), each semiconductor structure 101, 103 includes a plurality of n-doped portions 103 including n-type dopants to form a plurality of p-n junctions throughout substantially the entire effective junction distance D between the front and back sides. The resulting light sensor 106 can be used for data and/or power transfer in certain applications. In addition, the extended junction lateral sensor structure 106 can also be used in photon multiplier applications, for example, in photon detector systems that discussed further below in connection with FIGS. 22 and 23. Unlike conventional optocouplers, the extended junction devices and systems of the present disclosure facilitate high current transfer ratios (CTR) in power supply applications, thus facilitating high-efficiency biasing of circuits separated by a galvanic isolation barrier. Moreover, the distance 114 in FIG. 1 can be sized according to any desired breakdown voltage or isolation voltage rating for a given application. This isolation level adjustability, moreover, does not involve increase in the vertical height of the IC 100, as was the case with conventional vertically oriented optocouplers.
[0036] In operation of the light sensor 106, incident photons received laterally through the sensor face 107b are absorbed at or near the extended p-n junction formed by the doped regions 101 and 103. In one form of operation, the sensor 106 and the corresponding extended p-n junction thereof operates as a photodiode in photovoltaic mode to generate carriers and corresponding current flow to generate electrical output signal for use in power supply biasing and/or for data transfer. In particular, once a photon of sufficient energy is received, an electron/hole pair is created through an inner photoelectric effect in the semiconductor structure 101, 103. If the absorption occurs at or near the depletion region of the extended p-n junction, carriers move away from the junction according to an electric field of the depletion region, with holes moving toward the anode (p-doped region 101) and electrons move toward the cathode (n-doped region or regions 103). This carrier movement generates current flow, which can be used to generate electrical signal to an associated circuit connected to the sensor 106. For example, a low dropout (LDO) regulator or other power supply circuit can use the photo generated current to supply power to an external circuit connected to the sensor 106. In other examples, the electrical current flow generated by the sensor 106 can be used as a received data signal by an external circuit connected to the sensor. As discussed below in connection with FIGS. 22 and 23, a generated signal from the sensor circuit 106 can be used to indicate detection of an individual received photon, for example, in silicon photon multiplier circuits.
[0037] FIG. 2 shows another example isolation IC embodiment 100 with an LED light source 108 and an extended junction lateral light sensor 106 as described above. In this example, the interior surface of the cavity 110 includes a reflective coating 200 that reflects light from the light source 108 toward the light sensor 106, for example, along an optical path 202. The reflective coating material 200 in one example is deposited over a convex sacrificial sublimation material prior to the molding process that creates the molded package structure material 102. Sublimation of the sacrificial material layer after the molding process leaves the cavity 110 defined at least in part by the concave surface of the remaining reflective material layer 200. Any suitable non-conductive material 200 can be used which facilitates reflection of all or part of the light signal generated by the light source 108 toward the light sensor 106. As shown in FIG. 2, the light signal from the source 108 can travel through the cavity 110 along the optical path 114 directly to the sensing face 107b of the sensor die 106, and/or the signal can also travel along a reflected path 202 via the reflective coating 200 on the concave surface 112. In other possible examples, the concave surface 112 of the cavity 112 and any corresponding reflective coating 200 can be laterally extended to expose at least a portion of the top of the light sensor semiconductor structure, thereby allowing reflected photons to enter the top of the semiconductor structure for potential capture in the sensor 106.
[0038] FIG. 3 shows another non-limiting example isolation IC 100 with a light source 108 and a light sensor 106 as described above. In this example, an optically transmissive structure 300 is disposed between the faces 107a and 107b of the light source 108 and the light sensor 106 along the optical path 114. Any suitable material 300 can be used, such as glass, polymer, etc.
[0039] Referring also to FIGS. 4 and 5, FIG. 4 shows another optical isolation IC embodiment 100. In this example, the light sensor 106 includes a plurality of series-connected diodes, each including p and n doped portions of a corresponding semiconductor structure 401, 402 asdescribed above. The light sensor 111 in this example includes two series connected photo diodes formed by two (e.g., lower and upper) substrates or dies 401 and 402, although any number 2 or more such stacked dies can be used. In one example, the dies 401, 402 each include an upper reflective coating material, for example formed by an oxide layer 502 and an upper passivation layer 504 on the top T of the corresponding semiconductor structure. Reflective silver bearing epoxy is used on the bottom B of each of the semiconductor structures in order to form a bottom reflective surface to contain photons within the individual semiconductor structures, and to bond the upper semiconductor structure/die 402 to the lower die 401. In this example, the light sensor structure 106 also includes a base die 400 with a semiconductor substrate including any desired amplifiers, filters or other interface circuits (not shown), with the lower sensor die 401 being mounted to the top of the base die 400 using an optically reflective silver bearing epoxy for attachment and also for photon reflection in the die 401. The dies 401 and 402 are back-ground in one example to have a smaller vertical height than the base die 400. In one example, the stacked dies 401 and 402 each include metallization structures to provide an upper electrical connection to the n-doped portions 103, and the silver bearing epoxy used to join the dies 401 and 402 together can provide an electrical connection from the n-doped portions of the lower die 401 to the p-doped portion of the upper die 402 to effectively connect the corresponding diodes in series with one another. In one example, the individual dies 401 and 402 each generate a voltage signal of approximately 0.5 V, and the stacked dies 401 and 402 can be interconnected in series to provide a higher output voltage signal to an external circuit (e.g., 1.0 V). Embodiments having more than 2 stacked dies can be interconnected in any desired series and/or parallel configuration to achieve a desired output signal level in response to the light signal from the light source 108.
[0040] FIGS. 6 and 7 show another isolation IC example 100 using multiple stacked diodes in the optical sensor 106. The second circuit structure 106 in FIG. 6 is a multi-die structure with vertical diodes that individually include a single p-doped portion and a single extended n-doped portion. As with the above-described embodiments, this example provides an extended lateral p-n junction structure with an effective junction distance D that is longer than the absorption depth for the semiconductor structure that corresponds to the given wavelength λ. The sensor structure in FIGS. 6 and 7 includes four stacked dies 601, 602, 603 and 604 formed on a base die 600, although any number of dies can be used. FIG. 7 shows several example light travel paths in the various dies 601-604.
[0041] Referring now to FIGS. 8-10, FIG. 8 shows an example optical isolation circuit 800, including an LED light source 108 equipped with a parabolic reflector mirror structure 802. In one example, the light source 108 is an OSRAM SFH-4441 940 nm LED rated at 50 mW at 100 mA. An optical coupler structure 804 is provided between the LED/mirror components 108, 802 and the sensor face 107b of a semiconductor structure including a single p-doped portion 101 and a single extended length n-doped portion 103 as previously described. In this example, K is approximately 7. This example includes a reflective coating material 109, such as an oxide, on the top T of the semiconductor structure, as well as a reflective material 109 (e.g., reflective epoxy) on the bottom B to facilitate photon reflection as shown in simplified form in FIG. 8 for enhanced capture probability. The semiconductor structure 101, 103 is mounted via the epoxy 109 to a pedestal 808, and the source and sensor structures are mounted to a base 806 in a spaced relationship to define the spacing or gap distance 116 to set the isolation level of the isolation circuit 800. In certain examples, electrical connections (not shown) are made to the n and p regions at the top side T.
[0042] FIG. 9 shows a top view of the semiconductor structure 101, 103 taken along line 9-9 in FIG. 8. The structure includes one or more conductive taps 904 connected to corresponding areas of the n-doped portion 103 to collect photo-generated current based on capture of photons entering the sensor face 107b.
[0043] FIG. 10 provides a graph 1000 showing a curve 1002 representing tap current at the tap locations 904 in FIG. 9 in μa as a function of the distance from the sensor face 107b. As previously discussed, the probability of photon capture, and hence the magnitude of the photon-generated tap current, is highest at or near the sensor face 107b, and decays with increased distance in the semiconductor structure. In this example, approximately 64% of the total generated tap current is generated throughout an initial distance 902 from the sensor face 107b, corresponding to the absorption distance for the given semiconductor material and the given wavelength λ.
[0044] FIG. 11 shows a graph 1100 including an example absorption depth curve 1102 as a function of wavelength λ (μιη) for a silicon semiconductor structure 101, 103. In this example, the depth for 64% absorption of incoming photons at a photon wavelength of 940nm is approximately 95um. Using this principle, a given light sensor 106 can be designed with a sufficient effective junction distance D to achieve a desired collection efficiency target for a given light source wavelength λ and semiconductor material.
[0045] Referring also to FIGS. 12-21, a variety of different circuit structures and devices can be created using the extended junction light sensors 106. As mentioned above, certain examples include potentially large numbers of individual sensor cells, each including a semiconductor structure with a p-doped portion and one or more n-doped portions to create a cell having a lateral sensor face 107b and an extended effective junction distance D that is longer than the absorption depth of the corresponding semiconductor material for a given light source wavelength λ. The combination of multiple lateral cells interconnected in a series and/or parallel configuration is referred to herein as a multistage photovoltaic (LMSPV) sensor structure 106.
[0046] FIG. 12 illustrates an example isolated low dropout (LDO) regulator device 1200 including a sensor structure implemented on an integrated circuit die or packaged multi-die device 1201. In this example, the sensor circuit 106 is formed as an LMSPV structure to receive light from a lateral sensor face 107b as previously described. The n and p-doped portions of the LMSPV 106 are electrically connected to a switching circuit 1202 to electrically interconnect the p-n junctions of the plurality of semiconductor structures 101, 103 of the LMSPV 106. In one example, the switching circuit 1202 is programmable or otherwise configurable to allow changes to the series and/or parallel interconnections such that the device 1201 will provide an output signal (e.g., output voltage VO in FIG. 12) having configurable voltage and current values. An electrical signal provided from the LMSPV 106 through the switching circuit 1202 is delivered to an LDO regulator circuit 1204. The regulator circuit 1204 provides the output signal VO to drive a load (not shown). The device 1200 advantageously provides high current transfer ratio between a matched light source (not shown) and the LMSPV light sensor 106 to implement a higher efficiency power supply with optical isolation across a galvanic isolation barrier.
[0047] FIG. 13 illustrates an isolated solid state relay (SSR) device 1300 including an LMSPV 106 with a sensor face 107b to receive a light signal pulsed on or off to selectively turn on power to a load. In one example, the device 1300 is packaged in a single integrated circuit die or packaged multi-die structure 1301, including the LMSPV 106, a series/parallel switching circuit 1202 as described above, application-specific analog circuits 1302 for implementing hot-swap functionality, and a power switch 1304. In one example, the device 1300 is used for an isolated power switch. The device 1300 advantageously facilitates provision of on or off control signaling through the LMSPV 106 from a signal source electrically isolated from the secondary side of the power supply circuit.
[0048] FIG. 14 shows an isolated latching SSR device 1400 packaged in a single integrated circuit die or packaged multi-die structure 1401 with multiple LMSPV circuits 106 and corresponding lateral sensor faces 107b, as well as upper and lower holdup capacitors 1402, and gate drive circuit 1404 and a DC or AC power switch 1304 to control a load. The device 1401 receives the light at the sensor faces 107b from an LED light source 105, 108 as previously described. The holdup capacitors 1402 provide latching of an output signal obtained from the LMSPV structures 106 to allow a received light signal to actuate and latch the power switch 1304.
[0049] FIGS. 15-17 illustrate optically isolated power supply solutions using the example LDO regulator device 1200 of FIG. 12 in combination with an optical ribbon or fiber 1508. FIGS. 15 and 16 respectively show side and top views of an isolated power supply device 1500 packaged in a molded compound material 1502. A source side circuit 1501 includes a lead frame structure with leads 1504 and 1506, such as pins or pads that can be soldered to a host printed circuit board (not shown), with a light source (e.g., side or lateral emitting LED) 105, 108 and optically coupling material 804 connected to an input side of the optical ribbon or fiber 1508. The output end of the optical ribbon or fiber 1508 is connected via a corresponding optical coupling material 804 to the lateral sensor face 107b of an LMSPV structure 106. The power supply device 1500 also includes a load or output side circuit 1511 including an LDO regulator device 1200 as described above in connection with FIG. 12. The regulator device 1200 in this example is mounted to an output side lead frame structure including leads 1510 and 1512 to provide an electrical output signal (e.g., output voltage or current) to a driven load circuit connected to the host printed circuit board. The device 1500 in FIGS. 15 and 16 advantageously provides an optical power supply isolation solution in a single device, and advantageously uses the high current transfer ratio and high efficiency advantages of the LMSPV structure or structures 106 to transfer power across a galvanic isolation barrier without the space, cost, and electromagnetic interference shortcomings of transformer isolation techniques for power transfer.
[0050] FIG. 17 shows another optical isolation system 1700 for power transfer between two separate systems. In this example, the source side circuitry 1501 is packaged in a first integrated circuit die or packaged multi-die structure 1701 including a lead frame structure with leads 1504 and 1506. An optical fiber or ribbon 1508 connects the first structure 1701 to a second IC die or packaged multi-die structure 1702 that includes the second lead frame structure with leads 1510 and 1512 and the regulator device 1200 described above. The optical isolation system 1700 provides an integrated solution to bias or power a load across an isolation barrier by simple connection of an optical ribbon or fiber 1508 between the die structure 1701 and 1702.
[0051] FIG. 18 shows another example of a load side circuit 1511 implementing an LDO regulator system 1800. The load site circuit 1511 in this example includes a regulator structure 1200 with an LMSPV structure 106, as well as a switching circuit 1202 and a regulator circuit 1204 as described above. The circuits and structures 106, 1202 and 1204 in this example are fabricated on a single semiconductor die 1200. This example further includes an optical isolation barrier structure 1802. In one example, the optical isolation barrier structure 1802 includes black polymer or other light blocking material formed in trenches of the semiconductor die. In one example, the LMSPV semiconductor structures 106, including the p and n-doped portions 101 and 103 are formed in a silicon structure, along with the switching circuitry 1202 and the regulator circuitry 1204. A trench is formed to separate the LMSPV structures 106 from the switching circuit 1202, and the trench is filled with black polymer. Thereafter, the die is back-ground to expose the polymer in the trench. The resulting structure is held together by the polymer, and the polymer forms an optical barrier to isolate the LMSPV structure 106 from the switching circuit 1202 and LDO circuit 1204.
[0052] Referring now to FIGS. 19 and 20, the optical isolation technique and the barrier structure 1802 of FIG. 18 can be used in other embodiments in which it is desirable to optically isolate different channels or different circuits. FIG. 19 shows another regulator system 1900 including multiple optical channels. Each channel in this example includes an LMSPV stack structure 106 that receives a light signal through a corresponding optical fiber or ribbon 1508. Black polymer-filled trench isolation structures 1802 are formed in this example along the upper and lower edges of each of the LMSPV sensor structures 106. This effectively prevents optical cross talk between the LMSPV sections or cells 106, and also prevents optical interference with the switching circuit 1202 and/or the LDO regulator circuitry 1204 formed in the device 1200.
[0053] FIG. 20 shows a further example including the black polymer-filled optical isolation structures 1802 described above to confine optical signals within the two illustrated LMSPV portions 106. In this example, a reflective material -filled structure 2002 is formed around the LMSPV portions 106 of each of the optical channels. As previously discussed, the use of reflective materials enhances the capture efficiency of the LMSPV structure 106 by facilitating further opportunity for photon capture within the semiconductor material and the extended p-n junction. In one implementation, the reflector structures 2002 include straight portions throughout most of the length of the LMSPV structures 106, and the backsides of the LMSPV structures include arcuate portions, such as parabola shaped portions. In one example, the structures 2002 are formed by a selective deep etch process similar to that used in forming the optical isolation structures 1802. A deep trench is formed in the semiconductor structures after fabrication of the LMSPV components 106, and the trenches are filled with optically reflective material, such as glass. The die is then back-ground to expose the glass, leaving an enhanced LMSPV structure 106 with a reflective structure 2002 laterally surrounding three sides of the semiconductor structure and the extended p-n junction thereof. Between the adjacent optical channels, moreover, the black polymer-filled structures 1802 provide optical isolation to mitigate or avoid optical cross talk between the optical channels. As previously discussed, moreover, reflective material can be added to the top and bottom of the individual LMSPV structures 106, for example, reflective epoxy on the bottom B and an oxide layer or material formed on the top side T (e.g., 109 in FIG. 1).
[0054] Referring now to FIGS. 21-23, a unique construction of a Silicon photo multiplier device (SiPMD) is shown. The present disclosure provides SiPMDs which are not used in the conventional manner with photons entering the top surface of the silicon array. Instead, like the example devices described above, the SiPMD devices have photons entering at the side or edge into an extended collection distance. The SiPMD multiplies a single input photon into an avalanche of electrons in the PN cell of the array where the electron-hole pair is generated. In the example of FIG. 21, each array cell is isolated from the next cell so the avalanche does not propagate across the entire structure. The avalanche occurs because the cell is operated near its avalanche breakdown, so that one photon is enough to cause avalanche current flow. This creates high gain amplification in each cell making this a sensitive detector. Once tripped into avalanche, the cell needs to be reset, so there is a series quenching resistor R for each cell as shown in FIGS. 22 and 23. The quench circuit resistor R allows the cell voltage to drop enough to allow it to exit from avalanche. All these cells and quench resistors are in parallel, so the combined output current is representative of photon density times a very large gain factor, and the circuit uses a bias to operate. Moreover, the lateral construction enhances the sensitivity of the detector.
[0055] FIG. 21 illustrates an example LMSPV array structure 2100 including multiple light sensor semiconductor structures formed in an array. The LMSPV structure 2100 includes a lateral sensor face 107b and a matrix or array of a large number of individual P-N cells having an extended affective junction distance D as described above. In this example, the individual cells of the array includes a single n-doped portion 103 formed in an isolated p-doped region 101 to create an array of individual of p-n junctions disposed substantially throughout the extended affective junction distance D. FIG. 21 further illustrates a breakout view of a portion of two columns and several rows of the array cells in one example. In addition, as described below in connection with FIGS. 22 and 23, the LMSPV structure 2100 can also be employed in photon sensor applications.
[0056] As schematically shown in FIGS. 22 and 23, the LMSPV structures 106 can be employed in photon sensing systems and circuits, whether an array with multiple cells or a single semiconductor structure 106 having a p-doped portion 101 and one or more n-doped portions 103 to form an extended junction. FIG. 22 shows an example photon detector circuit 2200 with a semiconductor structure 101, 103 including multiple n-doped portions 103 disposed within a p-doped portion 101 as described above. The structure forms an extended junction light sensor 106 with a lateral sensor face 107b to receive photons along an optical path 114, where the sensor structure 106 has an effective junction distance D that is a constant K times the absorption depth for the semiconductor structure corresponding to a given wavelength λ of the incoming light signal. A circuit 2300 in FIG. 23 shows a similar arrangement using an extended junction light sensor circuit 106 having a single n-doped portion 103. The light sensors in the detector circuits 2200 and 2300 in FIGS. 22 and 23 include an equivalent parasitic capacitor, diode and resistor in each diode cell of the array that form a quenching circuit with a capacitor C coupled in parallel with the sensor circuit diode 111 between the p-doped portion 101 and the n-doped portions 103, as well as a resistor R coupled between a bias voltage VBIAS and the n-doped portions 103. The resulting structure forms a quench circuit to detect a small number of photons, or even reception of a single photon in the lateral sensor structure 106. In operation, the application of a bias voltage to the resistor R charges the capacitor C while the sensor circuit diode 111 is reverse biased. The bias voltage VBIAS is set to a level corresponding to the specifics of the sensor circuit diode 111 in order to charge the capacitor C (while the diode 111 does not conduct) to a level just below the avalanche rating of the diode 111. With the parasitic capacitor C charged, the circuit 2200 is ready to receive one or more photons along the optical path 114 at the sensor face 107b. Successful capture of an incident photon in the sensor structure 106 causes the p-n junction to conduct an avalanche current to discharge the parasitic capacitor C. Once the parasitic capacitor C discharges to a level below the avalanche threshold of the diode 111, the diode 111 discontinues conduction, and the parasitic resistor R again charges the capacitor C. The discharge/charge of the parasitic capacitor C creates a signal representing capture of the photon by the detector circuit 2200, 2300. A current sense threshold comparison can be used to create a detector output signal based on this increased current flow. A sense resistor RS is connected from the + input of comparator 2202 to a circuit ground reference to establish a voltage signal in response to the received current spike. In FIGS. 22 and 23, the p-doped portion 101 is connected to a non-inverting (+) input of a voltage comparator 2202 to receive the signal voltage. The comparator 2202 compares the signal voltage with a threshold voltage VTH to generate a detector output signal DETECT OUT in response to the current spike. As the current signal generated by discharge/charge of the capacitor C is much greater than the carrier current generated in the sensor structure 106 by creation of an electron/hole pair, the circuitry 2200, 2300 provides a photon multiplier circuit which can be employed in photon detection or other useful applications. Because the detector array can detect individual photons, it is also possible to use a low efficiency emitter for the photon source. This allows use of standard silicon with a forward biased silicon PN junctions emitter for low intensity IR radiation instead of a GaAs LED. Reverse biased avalanche or zener junctions can also be used to emit low intensity visible light.
[0058] The above examples are merely illustrative of several possible embodiments of various aspects of the present disclosure, wherein equivalent alterations and/or modifications will occur to others skilled in the art upon reading and understanding this specification and the annexed drawings. Modifications are possible in the described embodiments, and other embodiments are possible, within the scope of the claims.

中文:
[0001]隔离电路用于跨越电隔离屏障的数据和/或电力传送以互连由并不共享共用接地连接的不同电源供电的电气系统。变压器隔离方法涉及开关电路和磁场,并且所引起的电磁干扰(EMI)在某些应用中可能是不期望的。另外,变压器隔离通常需要额外的变压器组件并且这些解决方案需要大量的电路面积并且是昂贵的。电容耦合或交流耦合可用于提供用于数据发射的隔离,但是基于电容器的隔离解决方案通常涉及吸收信号能量并且引起不佳电力效率的寄生电容。另外,由于厚层的表面介电质的需要,使用电容耦合实施高压崩溃电压额定值是昂贵的。光学隔离避免了与变压器隔离相关联的EMI和电路面积问题,方法是使用光经由光子发射器(例如,发光二极管或LED)、接收器或例如光伏二极管(PVD)的传感器和光学耦合材料在电隔离电路之间传送电力/信号。光学耦合装置或光耦合器通常在PV二极管上方堆叠LED光源,具有在两者之间的玻璃或其它透明材料以将光子能量垂直地向下发射到PVD传感器的顶部。此外,高崩溃电压隔离额定值可以仅通过增大LED与PVD之间的距离获得,引起有时不可接受的垂直装置高度。一些高隔离电压光耦合器使用将光从LED反射到光电二极管的反射拱顶,所述反射拱顶是并排放置的以用于通过LED的向上发射和通过光电二极管的向下接收。在这些常规的光电耦合器方法中,光子路径垂直于硅装置的表面。LED光源通常在红外波长处或附近提供光信号,并且光耦合器通常遭受不佳电力效率(例如,电流传送比或表示输入电流与输出电流的比率的CTR)。另外,由于发射器与检测器之间的电容耦合,在垂直构造中遭受普通模式瞬态隔离(CMTI)。相应地,常规的光学隔离技术并不提供用于许多电力传送应用的足够的解决方案。
[0003]图1是根据实施例的光学隔离集成电路的截面侧视图,所述光学隔离集成电路包含LED光源和横向光受体二极管传感器,所述横向光受体二极管传感器具有半导体结构,所述半导体结构具有在模制封装结构的内部腔室中贯穿延伸有效p-n结距离的多个横向地间隔开的p-n结提供用于电隔离的光学路径。
[0004]图2是具有LED光源和横向光电二极管传感器的另一光学隔离IC实施例的截面侧视图,包含形成于封装腔室的凹形表面上的反射涂层。
[0005]图3是具有放置在LED光源与横向光电二极管传感器之间的玻璃或塑料光传输介质的另一光学隔离IC实施例的截面侧视图。
[0006]图4是具有包含两个垂直堆叠的横向光电二极管半导体结构的光传感器的另一光学隔离IC实施例的截面侧视图,所述半导体结构单独地包含多个p-n结以形成横向多级光伏(LMSPV)光传感器。
[0007]图5是图4的光传感器中的光学接收的部分截面侧视图。
[0008]图6是具有包含四个垂直堆叠的横向光电二极管半导体结构的光传感器的另一光学隔离IC实施例的截面侧视图,所述半导体结构单独地包含单个延伸p-n结。
[0009]图7是图6的光传感器中的光学接收的部分截面侧视图。
[0010]图8是包含具有抛物线形聚焦镜子和光电二极管半导体结构的红外或近红外光源的另一实例隔离电路的截面侧视图,所述半导体结构包含单个延伸p-n结。
[0011]图9是包含具有实例输出电流分支的横向延伸结光电二极管半导体结构的实例的顶部平面图的部分示意性光学隔离系统。
[0012]图10是作为图9的半导体结构中的有效结距离的函数的所收集的分支电流的曲线图。
[0013]图11是作为硅的光子波长的函数的实例吸收深度曲线的曲线图。
[0014]图12是包含LMSPV pv偏压产生器阵列的实例隔离低跌落电压(LDO)调节器的简化示意图。
[0015]图13是包含LMSPV pv偏压产生器阵列的实例固态继电器(SSR)的简化示意图。
[0016]图14是包含LMSPV光传感器的实例隔离闭锁SSR的简化示意图。
[0017]图15和16是包含光源和LMSPV光传感器的延长的隔离电路的部分示意性截面侧视图和截面俯视平面图。通过光纤连接。
[0018]图17是包含通过光纤耦合的光源IC和LMSPV光传感器的光学隔离系统的部分示意性截面俯视平面图。
[0019]图18是包含LMSPV光传感器的实例LDO调节器的部分示意性俯视平面图,所述LMSPV光传感器具有形成在LMSPV光传感器与可以用于图17的系统中的其它电路之间的黑色聚合物光学屏障。
[0020]图19是具有通过黑色聚合物屏障分隔开的多个LMSPV光传感器通道的实例LDO调节器的部分示意性俯视平面图。
[0021]图20是具有多个LMSPV光传感器通道的实例LDO调节器的部分示意性俯视平面图,所述多个LMSPV光传感器通道通过黑色聚合物屏障分隔开并且单独地包含在LMSPV光传感器通道周围填充有反射材料的弯曲沟槽。
[0022]图21是示出在p掺杂区中单独地包含多个n掺杂区以形成多个横向地间隔开的p-n结的若干实例互连半导体结构的另外细节的实例LMSPV光传感器半导体结构的部分示意性俯视平面图。
[0023]图22是包含横向光传感器半导体结构的实例光子传感器的部分示意图,所述横向光传感器半导体结构具有沿延伸有效p-n结距离安置的多个p-n结,以及猝灭电路以提供光子倍增器电路。
[0024]图23是包含横向光传感器半导体结构的另一实例光子传感器的部分示意图,所述横向光传感器半导体结构具有沿延伸有效p-n结距离安置的单个p-n结,以及猝灭电路以提供光子倍增器电路。
[0025]在图式中,相同参考数字贯穿全文指代相同元件,且各种特征不必按比例绘制。在以下论述和权利要求书中,术语“包含(including、includes)”、“具有(having、has)”、“带有(with)”或其变化形式意图以类似于术语“包括(comprising)”的方式是包含性的,并且因此应被解译为意味着“包含,但不限于......”。并且,术语“耦合(couple、coupled或couples)”意图包含间接或直接电气或机械连接或其组合。举例来说,如果第一装置耦合到第二装置或与第二装置耦合,那么所述连接可以是通过直接电气连接或通过经由一或多个介入装置和连接的间接电气连接。
[0026]首先参考图1,公开了具有包含横向传感器表面以从光源接收光子的一或多个半导体结构的横向光伏传感器和系统。半导体结构包含延伸横向结区,所述延伸横向结区具有大于对应于所接收的光信号的波长的半导体材料的吸收深度的有效结距离。各种实施例提供了光学隔离装置和系统,所述光学隔离装置和系统包含光源和具有光源与光接收器之间的间隔距离的此类横向光传感器以形成装置的高水平的崩溃或隔离电压额定值。另外,延伸有效结距离有助于光传感器所产生的电流中的源电流之间的高电流传送比率,并且提供穿过电隔离屏障的更高效率的电力传送的解决方案。各种实例包含具有在传感器通道周围的光学边界的传感器电路以减少串扰并且使得内部反射能够用于在来源与传感器之间的电力和/或数据信号的高效传送。多通道数据发射实施方案以及单通道或多通道电力传送实施例是可能的。所公开的实例也可以用于光子传感器,例如,光子倍增器和其它检测器电路。在各种实例中,p-n结的延伸横向长度有助于高光子俘获概率以获得高效率。某些实例包含半导体结构中的单个延伸p-n结。其它实例提供跨越延伸有效结距离横向地安置的多个p-n结。在某些实例中,此外,多个延伸结半导体结构互连以形成横向多级光伏(LMSPV)光传感器以提供多种不同输出电流和/或电压用于电力传送应用。LMSPV结构也可以用于数据传送应用。所公开的实例有利地促进光学隔离的使用以避免或减少上文所描述的用于电力和/或数据传送的磁性和电容隔离技术和设备的缺点,同时与通过先前光耦合器和光学隔离装置可能的相比有助于更高的效率。在某些实施方案中,偏压电路和猝灭电路与延伸结半导体结构组合以形成具有集成放大的或如同通常被称为硅光子倍增器(SiPM)装置的光子检测器。
[0027]图1示出了光学隔离集成电路(IC)100,所述集成电路包含具有一或多个电导体结构104的模制结构102以形成包含LED光源108和横向光传感器106的集成电路封装。光信号沿从光源108的横向信号输出表面107a到光传感器106的横向传感器表面107b的光学路径114行进穿过集成电路封装结构102的腔室110。在一个实例中,光源108是在第一GaAs半导体裸片或其它电路结构105中制造的LED,然而激光器、硅基光子发射器或其它光源可以用于其它实施例。传感器106包含通过p掺杂区101和一或多个n掺杂区103形成的半导体结构以形成贯穿延伸有效结距离D的多个横向地间隔开的p-n结。在所说明的实例中,光传感器106被制造为第二装置或电路结构,具有形成面向光学路径114以接收光信号的横向传感器表面107b的垂直前侧。光传感器106提供沿延伸有效结距离D的一或多个p-n结,在图1中示意性地表示为二极管111。电路结构105和106单独地包含通过接合线124连接到引线框结构的对应的电导体104a、104b的接合垫122。在一个实例中导体104a和104b是可以焊接到主机印刷电路板(PCB,未示出)的IC引脚或衬垫。在一个实例中,外部电路(未示出)经由一对输入导体104a将电信号提供到光源108,并且光源108响应于接收到的电信号沿光学路径114产生光信号。在此实例中,IC 100也包含通过对应的接合线124电连接到在图1中示意性地示出的第二对引线框电导体104b的接合垫122以提供来自光传感器106的电输出信号。所说明的实例中的导体104b提供可以焊接到主机PCB的IC 100的衬垫或引脚以从传感器106传递与在导体104a处的源信号隔离的电信号。在此实例中隔离器IC 100的隔离电压额定值或崩溃电压通过跨越电隔离边界分隔电路结构105和106的间隔距离或间隙距离116设置。
[0028]信号输出表面107a和传感器表面107b位于大体上平行的平面中,通过腔室110中的距离116彼此间隔开。在其它可能的实例中,表面107不必是平行的。可以使用任何相对配置,其中传感器表面107b至少部分面向光源108以便接收光信号。传感器表面107b允许光进入结构106以产生对应于光信号的强度的输出电信号。传感器电路106可进一步包含接口电路(未示出)以在传感器信号上操作。如图1中所示,表面107a和107b的大部分暴露在腔室110内,然而不是全部可能实施例的严格的要求。在图1的实例中,光源108和光传感器106在模制封装结构102的内部腔室110中彼此间隔开以在其间提供电隔离。在此实例中腔室110提供不含固体的(即,无固体的)光学路径114。在其它实例中(例如,下文的图3和4),玻璃或其它光学地透射性的固体结构可以提供在光源108与光传感器106之间。在一个实例中腔室110是密封的,并且包含空气或其它光学地透射性的气体,其可有利地具有与玻璃或其它透明的固体材料相比更低的介电常数,由此减少光源108与传感器106之间的电容耦合。在图1的实例中,腔室110包含凹形的上表面112,然而不是全部可能实施方案的严格的要求。在一个实例中在模制结构102的形成期间可以使用沉积的牺牲升华材料形成腔室110,随后是穿过端口118蒸发或升华以形成无固体的腔室110。端口118可以随后通过胶带或其它闭合结构120关闭以形成腔室110的密封。在某些实例中的隔离间隙或间隔116受到裸片或电路结构105、106中的一个上的机械特征的控制,例如,在裸片105和106之间延伸的氧化物凸块(未示出)以设置间隙距离116。在一些实例中间隙116通过混合特定大小的填充物材料与用于形成腔室110的牺牲材料受到控制。在所说明的实例中,封装结构102的内部表面包含凹形部分,其可以通过在制造期间作为一个滴或一或多个滴形成牺牲材料提供,例如,使用打印过程。此沉积牺牲材料因此形成部分凸形结构,并且在模制封装结构材料102的形成之后材料稍后升华或蒸发,留下凹形内部表面。如在图1中以虚线113所示,腔室内部表面的凹形形状可以延伸超出裸片105和106的边缘以允许一些光从LED光源105的上部部分传送出来并且进入到传感器裸片106的上部部分中。
[0029]在一个实例中IC 100是光学隔离电路以将来自连接到光源108的电路的数据或电力传送到连接到传感器106的电路(未示出)。光源108沿光学路径114产生给定波长λ的光信号。在一个实例中,光源是提供在约950nm的波长λ处的信号的横向LED。可使用任何其它合适的光源波长λ。如本文中所使用,给定波长λ的光信号意味着指定波长和在指定值附近的可能地其它波长,例如在指定值的百分之几内或与LED或用于光学隔离装置的其它光源相关联的任何合适的波长容限。在一个实例中,来源108提供具有恰好在硅的带隙能量上方的能量的长波长信号以最大化光传感器106的半导体结构101、103中的吸收深度。具有小于硅的带隙能量的能级的波长λ将微弱地与硅相互作用,然而具有大于硅的带隙或比硅的带隙大的多的能级的λ将被强有力的吸收,但是大于带隙的能量部分随着电子快速地热化下来而被浪费。在某些实例中,横向装置对于在其中硅长度可以增大以获得最大俘获的带隙能量处的波长是最优的。
[0030]光传感器106被设计用于在接收和俘获给定波长λ的横向地接收的光子中的操作。在图1的实例中的光传感器106包含半导体结构,所述半导体结构具有顶部T和底部B以及至少部分面向光学路径114的前侧以提供传感器表面107b以从来源108接收光信号。半导体结构进一步包含与前侧间隔开的后侧,以及垂直地在顶部T与底部B之间且水平地在前侧与后侧之间延伸的横向侧。在所说明的实例中,半导体结构是大体上矩形的,具有大体上平行的前侧和后侧,并且顶部和底部是大体上平面的并且彼此平行。另外,所说明的实例提供大体上平面的横向侧。然而,可使用其它半导体结构形状。可以使用任何合适的半导体结构。在某些实例中,半导体结构是硅(Si)。在其它实例中,可使用砷化镓(GaAs)或其它合适的半导体材料。
[0031]半导体结构包含具有硼或其它p型掺杂剂的p掺杂部分101。在某些实施方案中p掺杂部分101沿着底部B的至少一部分延伸,如图1中所示。在一个实例中,半导体结构的制造从p掺杂硅衬底形成部分101开始。p型部分从底部B电连接出来到封装电连接器104b。在其它实例中,p型掺杂剂通过植入和/或扩散以形成p掺杂部分101被引入到半导体衬底。半导体结构还包含一或多个n掺杂部分103(包含磷)或至少部分邻近于p掺杂部分101的其它n型掺杂剂。n掺杂部分从顶部T电连接出来到电连接122和124到另一封装电连接器(未示出)。n掺杂部分103在半导体结构中形成至少一个p-n结。所得的p-n结通过半导体结构的前侧与后侧之间的有效的结距离D延伸。在某些实例中有效结距离D大于常数K乘以对应于给定波长λ的半导体结构的吸收深度,其中K大于一。
[0032]如本文中所使用,半导体结构101、103的吸收深度是距离值(例如,从传感器表面107b向右延伸到图1中的半导体结构中),其中入射辐射强度以1/e或近似36%减小。在此距离,通过电子/空穴对的形成通过硅101、103吸收的光子能量的量将近似地是在横向传感器表面107b处接收的给定波长λ的64%。在一个实例中,K大于或等于5。在其它实例中,K大于或等于10。在进一步的实施方案中,K大于或等于20。结距离D可以是给定最终用途应用的实际物理限制内的任何合适的大小,例如,其中K小于1000。在一个实例中n掺杂部分沿着顶部T的至少一部分延伸,然而不是全部可能实施方案的要求。延伸有效p-n结距离D有助于在横向传感器表面107b处接收的高百分比的入射光子的吸收。举例来说,如下文结合图9和10所说明和进一步描述,光子俘获和所引起的载波产生在半导体结构的传感器表面107b处的入口处或附近是高度可能的,并且光子俘获的概率随着距离半导体结构的前方的距离的增大而减小。在所公开的横向装置中,横向尺寸是标准厚度硅晶片的平面(水平)距离。在许多制造过程中,硅晶片是到约10密耳厚的背景,并且标准垂直光伏传感器将仅具有约254微米的路径长度。此外,在此路径长度,仅顶部20微米左右可用于光子俘获。长结可通过建造垂直硅的非常厚的多结件并且在其侧面上放置组装好的裸片堆叠而构建。然而,与横向装置构造相比这将是非常不标准且不切实际的方法。
[0033]将半导体结构制造为包含延伸或分布贯穿基本上全部的有效p-n结距离D的一或多个n掺杂部分103有助于通过使D相对于对应于特定半导体材料的吸收深度和对应的给定波长λ较大的高效率光子俘获概率。举例来说,高效LED光源108可用于在近似地950nm的波长λ下发射光子。使用具有合适掺杂p部分101和n部分103的硅半导体结构,近似地64%的接收到的光子能量在950nm来源的行进的第一80um中被吸收。发明人已经理解针对大于或等于5的K获得高吸收百分比,并且通过使用大于或等于10的K获得进一步的改进。此外,针对大于或等于20的K可以获得接近彻底的(例如,接近100%)吸收。在图1的实例中,通过经由在p掺杂部分101的顶部中植入和/或扩散的对应的n掺杂区103形成多个p-n结实施有效的p-n结距离D。虽然图1的实例示出了五个此类n掺杂区103以形成贯穿基本上全部的距离D的p-n结,但是大量的n掺杂区103可用于形成对应的大量的p-n结。虽然在横向半导体结构的前方和后方之间所说明的n掺杂区103基本上均匀地间隔开,但是均匀间隔并不是全部可能实施方案的严格的要求,并且多个间隔和特征大小可以用于各种实施例。
[0034]所得的结构101、103提供沿大体上平直的廊道的多个p-n结以促进高收集概率。在各种实施例中,可采用多个此类半导体结构(例如,图4),并且对应的光学廊道可以是电隔离的。互连电路可以提供于IC 100中以便以任何所期望的串联和/或并联配置连接所得的p-n延伸结单元。此外,个体半导体结构可包含上部和下部(例如,顶部和底部)反射材料或结构109以提供内部反射以促进大部分的接收到的光子能量的俘获,并且光学地隔离每个通道与邻近光学电路。此外,此多通道概念可以延伸到在电力传送以及数据传送应用中使用,其中不同通道的光学隔离有助于通信应用的串扰的最小化。此外,如图1中所示,并且光学反射材料109可以提供在半导体结构101、103的后侧以便引起在后侧遇到的任何光子朝向传感器表面107b反射回来,由此进一步改进收集效率。类似地,在某些实施例中,光学反射材料可以提供在半导体结构101、103的横向侧(未示出)上,并且排序以进一步增强通过传感器结构收集的给定入射光子的概率。
[0035]如先前所提及,在某些实例中可以包含多个半导体结构101、103,并且这些单元可以任何合适的串联和/或并联方式堆叠或以其它方式互连以获得所期望的输出电压和/或电流。在某些实例中(例如,图6到8和23),在个体半导体结构101、103中提供单个延伸的p-n结以通过使用单个n掺杂部分103形成具有结距离D的单个p-n结。在其它实例中(例如,图1到5和12到22),每个半导体结构101、103包含多个n掺杂部分103(包含n型掺杂剂)以形成基本上贯穿前侧与后侧之间的整个有效结距离D的多个p-n结。在某些应用中,所得的光传感器106可用于数据和/或电力传送。另外,延伸结横向传感器结构106也可以用于光子倍增器应用中,例如,在下文结合图22和23进一步论述的光子检测器系统中。不同于常规的光耦合器,本发明的延伸结装置和系统促进电力供应应用中的高电流传送比率(CTR),因此有助于通过电隔离屏障分隔开的电路的高效施加偏压。此外,可以根据用于给定应用的任何所期望的崩溃电压或隔离电压额定值设定图1中的距离114的大小。此外,此隔离水平可调节性并不涉及如同常规的经垂直定向的光耦合器的情况的IC 100的垂直高度的增大。
[0036]在光传感器106的操作中,横向地穿过传感器表面107b接收的入射光子在通过掺杂区101和103形成的延伸p-n结处或附近被吸收。在操作的一个形式中,传感器106及其对应的延伸p-n结充当光伏模式中的光电二极管以产生载波和对应的电流流动以产生电输出信号以用于电力供应施加偏压和/或用于数据传送。具体地说,一旦接收到足够能量的光子,则通过半导体结构101、103中的内部光电效应形成电子/空穴对。如果吸收发生在延伸p-n结的耗尽区处或附近,那么根据耗尽区的电场载波从结移走,其中空穴朝向阳极(p掺杂区101)移动并且电子朝向阴极(n掺杂区103)移动。此载波移动产生电流流动,其可用于产生电信号到连接到传感器106的相关联的电路。举例来说,低跌落电压(LDO)调节器或其它电力供应电路可以使用光产生电流以将电力供应到连接到传感器106的外部电路。在其它实例中,通过传感器106产生的电流流动可以用作通过连接到传感器的外部电路接收到的数据信号。如下文结合图22和23所论述,从传感器电路106所产生的信号可用于指示个体接收到的光子的检测,例如,在硅光子倍增器电路中。
[0037]图2示出了具有如上文所描述的LED光源108和延伸结横向光传感器106的另一实例隔离IC实施例100。在此实例中,腔室110的内部表面包含朝向光传感器106反射来自光源108的光的反射涂层200,例如,沿光学路径202。在一个实例中在形成模制封装结构材料102的模制过程之前反射涂层材料200沉积在凸形牺牲升华材料之上。在模制过程之后牺牲材料层的升华留下至少部分通过剩余的反射材料层200的凹形表面限定的腔室110。可使用有助于通过光源108产生的全部或部分的光信号朝向光传感器106的反射的任何合适的非导电材料200。如图2中所示,来自来源108的光信号可以沿光学路径114行进穿过腔室110直接地到传感器裸片106的感测表面107b,和/或信号也可以经由凹形表面112上的反射涂层200沿反射路径202行进。在其它可能的实例中,腔室112的凹形表面112和任何对应的反射涂层200可以横向地延伸以暴露光传感器半导体结构的顶部的至少一部分,由此允许反射光子进入半导体结构的顶部以用于在传感器106中的潜在的俘获。
[0038]图3示出了具有如上文所描述的光源108和光传感器106的另一非限制性实例隔离IC 100。在此实例中,光透射结构300沿光学路径114安置在光源108的表面107a与光传感器106的表面107b之间。可使用任何合适的材料300,例如,玻璃、聚合物等。
[0039]还参考图4和5,图4示出了另一光学隔离IC实施例100。在此实例中,光传感器106包含多个串联连接的二极管,每个二极管包含如上文所描述的对应的半导体结构401、402的p和n掺杂部分。在此实例中光传感器111包含通过两个(例如,下部和上部)衬底或裸片401和402形成的两个串联连接的光电二极管,然而可使用任何数量2或更多的此类堆叠裸片。在一个实例中,裸片401、402各自包含上部反射涂层材料,例如,通过在对应的半导体结构的顶部T上的氧化层502和上部钝化层504形成。在半导体结构中的每一个的底部B上使用含反射银的环氧树脂以便形成底部反射表面以在个体半导体结构内含有光子,并且将上部半导体结构/裸片402接合到下部裸片401。在此实例中,光传感器结构106还包含具有半导体衬底的底座裸片400,所述半导体衬底包含任何所期望的放大器、滤光器或其它接口电路(未示出),具有使用含光学反射银的环氧树脂安装到底座裸片400的顶部的下部传感器裸片401以用于附接并且还用于裸片401中的光子反射。在一个实例中裸片401和402是回接地的以具有与底座裸片400相比较小的垂直高度。在一个实例中,堆叠裸片401和402各自包含金属化物结构以提供到n掺杂部分103的上部电气连接,并且用于将裸片401和402接合在一起的含银环氧树脂可以提供从下部裸片401的n掺杂部分到上部裸片402的p掺杂部分的电气连接以有效地连接彼此串联的对应的二极管。在一个实例中,个体裸片401和402各自产生近似地0.5V的电压信号,并且堆叠裸片401和402可以串联互连以提供到外部电路的更高的输出电压信号(例如,1.0V)。具有大于2个堆叠裸片的实施例可以任何所期望的串联和/或并联配置互连,以响应于来自光源108的光信号获得所期望的输出信号水平。
[0040]图6和7示出在光学传感器106中使用多个堆叠二极管的另一隔离IC实例100。在图6中的第二电路结构106是具有单独地包含单个p掺杂部分和单个延伸n掺杂部分的垂直二极管的多裸片结构。如同上文所描述的实施例,此实例提供具有长于对应于给定波长λ的半导体结构的吸收深度的有效结距离D的延伸横向p-n结结构。图6和7中的传感器结构包含形成在底座裸片600上的四个堆叠裸片601、602、603和604,然而可使用任何数目的裸片。图7示出了在各种裸片601到604中的若干实例光行进路径。
[0041]现在参考图8到10,图8示出了实例光学隔离电路800,其包含配备有抛物线形反射器镜子结构802的LED光源108。在一个实例中,光源108是在50mW在100mA下额定的OSRAMSFH-4441 940nm LED。光耦合器结构804提供在LED/镜子组件108、802与包含如先前所描述的单个p掺杂部分101和单个延伸长度n掺杂部分103的半导体结构的传感器表面107b之间。在此实例中,K近似地是7。此实例包含在半导体结构的顶部T上的反射涂层材料109,例如,氧化物,以及在底部B上的反射材料109(例如,反射环氧树脂)以促进如图8中的简化形式中所示的光子反射以用于提高俘获概率。半导体结构101、103经由环氧树脂109安装到基座808,并且来源和传感器结构以间隔开的关系安装到底座806以界定间隔或间隙距离116以设置隔离电路800的隔离水平。在某些实例中,在顶部侧T对n和p区进行电连接(未示出)。
[0042]图9示出了沿图8中的线9-9获取的半导体结构101、103的俯视图。结构包含连接到n掺杂部分103的对应的区域的一或多个导电分支904以基于进入传感器表面107b的光子的俘获收集光产生的电流。
[0043]图10提供了示出表示在图9中的分支位置904处的以μa计的分支电流作为距离传感器表面107b的距离的函数的曲线1002的曲线图1000。如先前所论述,光子俘获的概率以及因此光子产生分支电流的幅值在传感器表面107b处或附近最高,并且随着在半导体结构中的增大的距离而衰减。在此实例中,近似地64%的总产生的分支电流贯穿距离传感器表面107b的初始距离902产生,对应于给定半导体材料和给定波长λ的吸收距离。
[0044]图11示出了包含实例吸收深度曲线1102作为硅半导体结构101、103的波长λ(μm)的函数的曲线图1100。在此实例中,在940nm的光子波长处的传入光子的64%的吸收的深度近似地是95um。使用此原理,给定光传感器106可以设计有足够的有效结距离D以获得用于给定光源波长λ和半导体材料的所期望的收集效率目标。
[0045]还参考图12到21,可以使用延伸结光传感器106形成多种不同电路结构和装置。如上文所提及,某些实例包含潜在地大量的个体传感器单元,各自包含具有p掺杂部分和一或多个n掺杂部分的半导体结构以形成具有横向传感器表面107b和长于给定光源波长λ的对应的半导体材料的吸收深度的延伸有效结距离D的单元。在串联和/或并联配置中互连的多个横向单元的组合在本文中被称作多级光伏(LMSPV)传感器结构106。
[0046]图12说明包含在集成电路裸片或封装多裸片装置1201上实施的传感器结构的实例隔离式低跌落电压(LDO)调节器装置1200。在此实例中,传感器电路106形成为LMSPV结构以如先前描述从横向传感器表面107b接收光。LMSPV 106的n和p掺杂部分电连接到开关电路1202以电互连LMSPV 106的多个半导体结构101、103的p-n结。在一个实例中,开关电路1202是可编程或以其它方式可配置的以允许变为串联和/或并联互连,使得装置1201将提供具有可配置电压和电流值的输出信号(例如,在图12中的输出电压VO)。从LMSPV 106提供的电信号穿过开关电路1202传递到LDO调节器电路1204。调节器电路1204提供输出信号VO以驱动负载(未示出)。装置1200在匹配光源(未示出)与LMSPV光传感器106之间有利地提供高电流传送比以实施具有跨越电隔离屏障的光学隔离的更高效率的电力供应。
[0047]图13说明包含具有传感器表面107b的LMSPV 106的隔离式固态继电器(SSR)装置1300以接收光信号脉冲开启或关闭以选择性地开启负载的电力。在一个实例中,装置1300封装在单个集成电路裸片或封装多裸片结构1301中,包含LMSPV 106、如上文所描述的串联/并联开关电路1202、用于实施热交换功能性的应用特定的模拟电路1302,以及电力开关1304。在一个实例中,装置1300用于隔离式电力开关。装置1300有利地有助于从与电力供应电路的次级侧电隔离的信号源穿过LMSPV 106供应开启或关闭控制信令。
[0048]图14示出了隔离式闭锁SSR装置1400,所述装置封装在单个集成电路裸片或具有多个LMSPV电路106和对应的横向传感器表面107b以及上部和下部容纳电容器1402及栅极驱动电路1404和直流或交流电力开关1304以控制负载的封装多裸片结构1401中。如先前所描述装置1401从LED光源105、108在传感器表面107b接收光。容纳电容器1402提供从LMSPV结构106获得的输出信号的闭锁以允许接收光信号以致动和闭锁电力开关1304。
[0049]图15到17说明使用图12的实例LDO调节器装置1200结合光学带或光纤1508的光学隔离电力供应解决方案。图15和16相应地示出封装在模制化合物材料1502中的隔离式电力供应装置1500的侧视图和俯视图。来源侧电路1501包含具有引线1504和1506的引线框结构,例如,可以焊接到主机印刷电路板(未示出)的引脚或衬垫,具有光源(例如,侧面或横向发射LED)105、108和连接到光学带或光纤1508的输入侧的光学耦合材料804。光学带或光纤1508的输出端经由对应的光学耦合材料804连接到LMSPV结构106的横向传感器表面107b。电力供应装置1500还包含负载或输出侧电路1511,所述电路包含如上文结合图12所描述的LDO调节器装置1200。在此实例中调节器装置1200安装到包含引线1510和1512的输出侧引线框结构以提供电输出信号(例如,输出电压或电流)到连接到主机印刷电路板的驱动负载电路。图15和16中的装置1500在单个装置中有利地提供光学电力供应隔离解决方案,并且有利地使用LMSPV结构或结构106的高电流传送比和高效率优点以跨越电隔离屏障传送电力而没有用于电力传送的变压器隔离技术的空间、成本和电磁干扰缺点。
[0050]图17示出了用于在两个单独的系统之间的电力传送的另一光学隔离系统1700。在此实例中,来源侧电路1501封装在第一集成电路裸片或包含具有引线1504和1506的引线框结构的封装多裸片结构1701中。光纤或带1508将第一结构1701连接到第二IC裸片或包含具有引线1510和1512的第二引线框结构和上文所描述的调节器装置1200的封装多裸片结构1702。光学隔离系统1700提供集成解决方案以跨越隔离屏障通过裸片结构1701和1702之间的光学带或光纤1508的简单连接向负载施加偏压或供电。
[0051]图18示出了实施LDO调节器系统1800的负载侧电路1511的另一实例。在此实例中负载侧电路1511包含具有LMSPV结构106的调节器结构1200以及如上文所描述的开关电路1202和调节器电路1204。在此实例中电路以及结构106、1202和1204是在单个半导体裸片1200上制造的。此实例进一步包含光学隔离屏障结构1802。在一个实例中,光学隔离屏障结构1802包含黑色聚合物或形成于半导体裸片的沟槽中的其它光阻挡材料。在一个实例中,包含p掺杂部分101和n掺杂部分103的LMSPV半导体结构106连同开关电路1202和调节器电路1204一起形成硅结构中。沟槽经形成为分离LMSPV结构106与开关电路1202,并且沟槽填充有黑色聚合物。之后,裸片回接地以暴露沟槽中的聚合物。所得的结构通过聚合物固持在一起,并且聚合物形成光学屏障以隔离LMSPV结构106与开关电路1202和LDO电路1204。
[0052]现在参考图19和20,光学隔离技术和图18的屏障结构1802可以用于其中期望光学地隔离不同通道或不同电路的其它实施例。图19示出了包含多个光学通道的另一调节器系统1900。在此实例中每个通道包含通过对应的光纤或带1508接收光信号的LMSPV堆叠结构106。在此实例黑色聚合物填充沟槽隔离结构1802沿LMSPV传感器结构106中的每一个的上部和下部边缘形成。这有效地防止了LMSPV区段或单元106之间的光学串扰,并且还防止了与形成于装置1200中的开关电路1202和/或LDO调节器电路1204的光学干涉。
[0053]图20示出了包含上文所描述的黑色聚合物填充光学隔离结构1802以限制两个所说明的LMSPV部分106内的光信号的另一实例。在此实例中,反射材料填充结构2002形成在光学通道中的每一个的LMSPV部分106周围。如先前所论述,反射材料的使用通过有助于在半导体材料和延伸p-n结内的光子俘获的进一步机会而提高了LMSPV结构106的俘获效率。在一个实施方案中,反射器结构2002包含贯穿LMSPV结构106的大部分的长度的平直部分,并且LMSPV结构的后侧包含弓形部分,例如,抛物线形部分。在一个实例中,结构2002通过类似于在形成光学隔离结构1802中使用的过程的选择性深度蚀刻过程形成。在LMSPV组件106的制造之后深沟槽形成于半导体结构中,并且沟槽填充有光学反射材料,例如,玻璃。裸片随后回接地以暴露玻璃,留下具有横向地围绕半导体结构的三个侧面及其延伸p-n结的反射结构2002的增强型LMSPV结构106。此外,在邻近光学通道之间,黑色聚合物填充结构1802提供光学隔离以缓解或避免光学通道之间的光学串扰。此外,如先前所论述,反射材料可以被添加到个体LMSPV结构106的顶部和底部,例如,在底部B上的反射环氧树脂和形成在顶部侧T上的氧化层或材料(例如,图1中的109)。
[0054]现在参考图21到23,示出了硅光倍增器装置(SiPMD)的独特构造。本发明提供了不以其中光子进入硅阵列的顶部表面的常规的方式使用的SiPMD。替代地,如同上文所描述的实例装置,SiPMD装置具有在侧面或边缘进入到延伸收集距离中的光子。SiPMD倍增单个输入光子到阵列的PN小区中的电子的雪崩中,其中产生电子-空穴对。在图21的实例中,每个阵列单元与下一个单元隔离,因此雪崩并不跨越整个结构传播。雪崩的发生是因为单元在其雪崩崩溃附近操作,因此一个光子足以引起雪崩电流流动。这在每个单元中形成高增益放大形成此敏感检测器。一旦跳脱到雪崩中,则单元需要重置,因此存在用于如图22和23中所示的每个单元的串联猝灭电阻器R。猝灭电阻器R允许单元电压降低的足以允许它从雪崩中离开。所有这些单元和猝灭电阻器是并联的,因此组合的输出电流表示为光子密度乘以非常大的增益因数,并且电路使用偏压来操作。此外,横向构造提高了检测器的灵敏度。
[0055]图21说明包含形成于阵列中的多个光传感器半导体结构的实例LMSPV阵列结构2100。LMSPV结构2100包含如上文所描述的横向传感器表面107b和具有延伸影响结距离D的大量个体P-N单元的矩阵或阵列。在此实例中,阵列的个体单元包含形成于隔离p掺杂区101中的单个n掺杂部分103以形成基本上贯穿延伸影响结距离D安置的p-n结的个体的阵列。图21进一步说明在一个实例中阵列单元的两个列和若干行的一部分的剖面视图。另外,如下文结合图22和23所述,也可以在光子传感器应用中采用LMSPV结构2100。
[0056]如图22和23中示意性地示出,LMSPV结构106可以用于光子感测系统和电路中,不论具有多个单元的阵列还是具有p掺杂部分101和一或多个n掺杂部分103的单个半导体结构106以形成延伸结。图22示出了具有如上文所描述的包含安置在p掺杂部分101内的多个n掺杂部分103的半导体结构101、103的实例光子检测器电路2200。结构形成具有横向传感器表面107b的延伸结光传感器106以沿光学路径114接收光子,其中传感器结构106具有有效结距离D,所述距离是常数K乘以对应于入射光信号的给定波长λ的半导体结构的吸收深度。图23中的电路2300示出了使用具有单个n掺杂部分103的延伸结光传感器电路106的类似布置。图22和23中的检测器电路2200和2300中的光传感器包含在阵列的每个二极管单元中的等效寄生电容器、二极管和电阻器,它们与在p掺杂部分101与n掺杂部分103之间的传感器电路二极管111并联耦合的电容器C形成猝灭电路,以及耦合在偏压电压VBIAS与n掺杂部分103之间的电阻器R。所得结构形成猝灭电路以检测少量光子,或甚至接收横向传感器结构106中的单个光子。在操作中,将偏压电压应用到电阻器R为电容器C充电,同时传感器电路二极管111是逆向施加偏压的。偏压电压VBIAS被设置到对应于传感器电路二极管111的特性的水平以便将电容器C充电(同时二极管111并不导电)到恰好低于二极管111的雪崩额定值的水平。通过寄生电容器C充电,电路2200准备好在传感器表面107b处沿光学路径114接收一或多个光子。传感器结构106中的入射光子的成功俘获使得p-n结传导雪崩电流以使寄生电容器C放电。一旦寄生电容器C放电到低于二极管111的雪崩阈值的水平,则二极管111中断导电,并且寄生电阻器R再次为电容器C充电。寄生电容器C的放电/充电形成表示通过检测器电路2200、2300的光子的俘获的信号。电流感测阈值比较可用于基于此增大的电流流动形成检测器输出信号。感测电阻器RS从比较器2202的+输入端连接到接地电路参考以响应于接收到的电流尖峰建立电压信号。在图22和23中,p掺杂部分101连接到电压比较器2202的非反相(+)输入端以接收信号电压。比较器2202比较信号电压与阈值电压VTH以响应于电流尖峰产生检测器输出信号DETECT OUT。因为通过电容器C的放电/充电所产生的电流信号与在传感器结构106中通过电子/空穴对的形成产生的载波电流相比大的多,所以电路2200、2300提供可以用于光子检测或其它有用的应用的光子倍增器电路。因为检测器阵列可以检测个体光子,所以它也可能使用低效率发射器用于光子来源。这允许替代于GaAsLED的具有正向施加偏压的硅PN结发射器用于低强度IR辐射的标准的硅的使用。逆向施加偏压的雪崩或齐纳结也可以用于发射低强度可见光。
[0058]上述实例仅说明本发明的各种方面的若干可能的实施例,其中在阅读和理解本说明书和附图之后所属领域的其它技术人员将构想出等效变化和/或修改。在权利要求书的范围内,对所描述的实施例的修改是可能的,并且其它实施例是可能的。