English:
[0001] For high performance semiconductor testers, sometimes referred to as automated test equipment or ATE, tester signals up to several gigahertz are funneled from test electronics through relatively large circuit boards known as device interface boards (DIB's) to the leads of one or more very compact devices-under-test or DUT's. The DUT's often are designed to include very high frequency analog signals to be included with high performance digital signals. These very high frequency analog signals include, for example, cellular telephone radio frequency signals, global positioning radio signals, wireless communication radio signals, etc. In today's high performance systems-on-a-chip (SOC), there are often several hundreds signal paths between the DUT and the tester electronics. In order to preserve fidelity for such high- frequency signals, the signal paths are constructed to provide a closely matched impedance (normally fifty ohms). Providing a closely matched impedance with a large number of signal paths is difficult.
[0002] The DIB is mounted on the automatic test equipment such that the electronic signals that are to be exchanged between the test electronics commonly referred to as a test head and the DUT are transferred through cables that connect to the DIB from the bottom side or tester side either directly with pogo pins or with the OSP, SMA, SMP or other high-speed connectors. The DUT is connected with a socket, which is mounted on the top side or DUT side of the DIB. The SMA coaxial connectors (Subminiature A originally designed by Bendix Scintilla Corporation), the OSP coaxial connectors (Omni-Spectra push- on originally designed by M/A Corn of Lowell, MA), and the SMP coaxial connectors (originally invented by the Gilbert company) are commonly produced by companies such as Tyco Electronics Corporation, Berwyn, PA.
[0004] As DIB's have increased in size, they require more thickness to realize the same stability. Additionally, multisite testing requirements (multiple DUT's are tested simultaneously) to reduce cost of test increase the wiring requirements of the DIB. This is forces additional layers to be provided for routing all the wiring traces for all the signal channels. Currently the DIB requires up to twenty signal layers (approximately 5.08mm) and in the future, at least thirty signal layers will be required, increasing the thickness by a factor of at least 1.5. As more layers are required the thickness of the DIB increases. As the numbers of signals is increasing, more of the connectors such as the pogo pins are needed. This creates more mechanical pressure on DIB, thus requiring a thicker printed circuit board so that the increase pressure can be sustained without damage to the printed circuit board.
[0005] FIG. 1 is a simplified block diagram of an automatic test equipment 100. The automatic test equipment 100 includes a tester mainframe 102 that is in communication with a test head 108. The test head 108 is connected to an DD3 106. Signals from the test head 108 may be routed to the DEB 106 through cable assemblies. In operation, the DEB 106 is electrically connected to a device under test (DUT) 104 for testing the DUT 104. For example, the automated test equipment (ATE) system 100 is for testing integrated circuits, and the DUT 104 may be a semiconductor device including integrated circuits that perform digital and analog functions. Examples of high performance analog functions are cellular telephone transmitters and receivers, digital wireless transmitters and receivers, radio frequency identification transmitters and receivers. Thus, signals from the test head 108 are routed through the DIB 106 to the DUT.
[0006] The tester mainframe 102 includes circuitry for generating test stimulus signals that are transferred through the test head 108 and the DIB 106 to the DUT 104 and evaluating test response signals received from the DUT 104 through the DIB 106 and the test head 108. The DUT 104 may be a packaged silicon DIB including an integrated circuit to be tested. The DIB 106 may also be connected to a probe interface card with the DUT 104 being a semiconductor wafer including integrated circuits to be tested that is mounted to the probe interface card.
[0007] FIG. 2 is a diagram of a cross-sectional view of a DIB printed circuit board 200. DEB printed circuit board 200 has a DUT socket 205 that is connected by compression connectors such as spring or pogo pin contacts207 and 209 to metal wiring traces on the surface of the DIB printed circuit board 200. In the case where the DUT is an integrated circuit that performs digital and analog functions, the digital signals 230 are often segregated from the analog signals 235, especially for very high Radio Frequency (RF) signals. The analog signals 235 are transferred from the DUT through the pin 209 of the socket to a via 215. The via 215 is a hole drilled and plated in the DIB printed circuit board 200. The via 215 is connected to a metal wiring trace 220 that is connected to the coaxial connector 210. The coaxial connector 210 may be OSP, SMA, SMP or other high-speed connectors. The analog signals 235 are transferred between the coaxial connector 210 and the test head 108 of FIG. 1. The electronic components 226 are placed in contact with the wiring traces 220 to provide compensation and termination circuitry necessary to insure the signal fidelity of the analog signals 235.
[0008] As noted above, the increased circuit complexity and the growth in wiring density has increased the thickness of the DIB printed circuit board. As the DIB printed circuit board has increased in thickness, the performance has typically dropped for highspeed signals. One of the major detriments to the performance is the via 215. It is known in the art that vias have poor high-speed performance, since they represent an impedance discontinuity for GHz frequency analog signals 235. A long via 215 causes a problem for certain matching techniques, since components/circuitry 226 is too far away from DUT socket 205. It is difficult to place matching electronic components 225 in a more desirable location on the top side of the DIB printed circuit board 200, between the DUT socket 205 and the DIB printed circuit board 200, because there is insufficient space under the DUT socket 205 due to the increased RF pin count of the DUT.
[0009] Refer now to FIG. 3 A for an example of a DIB printed circuit board 201 used for measuring the performance of very high frequency analog signals 235. In this example, the DIB printed circuit board 201 has an SMA coaxial connector 210 connected to the via 245. The via 245 is connected to the metal wiring trace 220 that is connected for this evaluation to a 50n resistor 240 that is connected to a ground reference point 222. Is The SMA coaxial connector 210 has a shield that is placed in the vias 250. The vias 250 are also connected internally within the DIB printed circuit board 201 to the ground reference point.
[0010] In this example, the DIB printed circuit board 201 is constructed to be approximately 5.08mm thick. This representative of the thickness employed for DIB printed circuit board 201 at the current time. As the complexity of integrated circuits increases, this thickness will be greater. The SMA connector is connected with the 50n terminating resistor 240 after the via 245 that is approximately 5.08mm (0.2") in length.
[0011] FIG. 3B is a plot of the reflection of a signal passed through the SMA coaxial connector 210 through the via 245 to the 5 On terminating resistor 240, for the example of FIG 3 A. In the example of FIG. 3 A, there is a - 1 Od 13 signal reflection 260 at 2 GHz. With the 5.08 mm length via 245, ten percent of 30 the delivered power is reflected 260. The reflection 260 of this magnitude results in a loss of power and causes more difficulty in matching and compensation of the analog signals 235 to maintain signal fidelity.
[0012] Therefore, what is needed is a DIB printed circuit board constructed to provide a low loss in the wiring path of very high speed analog signals to maintain high signal quality and fidelity.
[0013] In one embodiment, a device interface board is provided which includes a printed circuit board with a DUT interface structure, such as socket, associated with a DUT side of the printed circuit board. A high frequency connector and electronic component are mounted in a cavity formed in a back side of the printed circuit board. A signal via through the printed circuit board couples the high frequency connector and electronic component with the DUT interface structure. An encapsulating structure may be provided, which covers the cavity while allowing a cable to connect to the high frequency connector.
[0015] FIG. 2 is a diagram of a cross-sectional view of a DIB printed circuit board.
[0016] FIG. 3 A is a diagram of an example of DIB printed circuit board used for measuring the performance of very high frequency analog signals.
[0017] FIG. 3B is a plot of the forward reflection of a signal passed through the SMA coaxial connector through the via 30 to a 50Ω terminating resistor of FIG. 3 A.
[0018] FIG. 4 is a diagram of a cross-sectional view of an embodiment of a DEB printed circuit board.
[0019] FIG. 5 A is a diagram of a cross-sectional view of another embodiment of a DEB printed circuit board incorporating 5 an encapsulating structure.
[0020] FIG. 5B shows a perspective view of one example of an encapsulating structure.
[0021] FIG. 6A is a diagram of a cross-sectional view of the embodiment of a DIB printed circuit board of Fig 5. illustrating another implementation of the structure of the encapsulating structure.
[0022] FIG. 6B shows a perspective view of a second example of an encapsulating structure.
[0023] As described in FIG. 1, the automatic test equipment 100 includes a tester mainframe 102 that is in communication with a test head 108. The test head 108 is connected to a DEB 106. Signals from the test head 108 are routed to the DIB 106 through cable assemblies. In operation, the DIB 106 is electrically connected to a device under test (DUT) 104 for testing the DUT 104. In FIG. 2, the electronic components 226 are placed in contact with the wiring traces 220 to provide impedance matching, compensation, and termination circuitry necessary to insure the signal fidelity of the analog signals 235, however, the long via 215 causes a problem for certain matching techniques, since components/circuitry is too far away from DUT socket 205. Therefore, in one embodiment, an automatic test equipment system includes a test head 108 and DIB 106. The test head 108 incorporates electronic circuitry for generating test stimulus signals for transfer to at least one device-under-test 104 and for receiving and evaluating test response signals from the at least one device-under-test 104. The DEB 106 is placed between the test head 108 and the at least one device-under-test 104 to prevent signal degradation of very high frequency signals.
[0024] FIG. 4 is a diagram of one embodiment of a cross-sectional view of a device interface (DEB) printed circuit board 300. The device interface board includes a printed circuit board 300 having a first thickness 355. The DEB printed circuit board 300 has a DUT socket 305 in contact with to metal wiring traces on the top surface 300t of the DIB printed circuit board 300 through spring or pogo pin contacts 307 and 309. As described above, where the DUT is an integrated circuit that performs digital and analog functions, the digital signals 330 are often segregated from the analog signals 335, especially for very high RF frequencies. The analog signals 335 are transferred from the DUT through the pins 309 of the DUT socket 305 to a via 315.
[0025] A cavity 350 that is formed in a back side or tester side 300b (tester side), of the DEB printed circuit board 300 decreases the thickness of the printed circuit board 300 under the cavity to a second thickness 360, which may be for example, one half of the thickness 355 of the DIB printedlO circuit board 300. In one example embodiment, a 20 layer DIB printed circuit board 300 is 5.08mm and the cavity is 2.54mm.
[0026] The cavity 350 is located in close proximity to the DUT socket 305. A connector 310 and electronics components 320 are mounted within the cavity 350 for transferring the very high frequency signals 335 between the test head 108 and the DUT 104 of FIG. 1. A via 315 is drilled and plated in the printed circuit board 300 within the cavity 350 to connect the connector 310 and electronic components 325 to the DUT socket 305 and thus to the device-under-test. The via 315 may be formed prior to or after formation of the cavity 350. The electronic components 325 are placed in contact with the wiring traces 320 to provide impedance matching, compensation, and termination circuitry necessary to insure the signal fidelity of the analog signals 335. The electronic components 325 are
[0027] One advantage of locating the electronic components 326 in the cavity 350 along with the connector in some embodiments is that the electronic components may be more easily accessed during DEB fabrication, test, and rework. The electronic components 226 of FIG. 2 are placed beneath the DUT socket 205 between the DUT socket 205 and the board 200. As such, the electronic components 226 are not easily accessed for adjustment, change, or replacement.
[0028] The electronic components 326 in the embodiment of FIG. 4, however, are easily accessed during fabrication, or maintenance, to allow proper impedance matching, compensation, and termination circuitry to ensure the fidelity of the test signals.
[0030] In other embodiments, the cavity 350 is formed in the back side 300b of the printed circuit board 300 by laying up multiple layer preimpregnated laminate stacks 302 until the printed circuit board 300 has achieved the second thickness 360 that is a fractional part the first thickness 355 or the final thickness of the printed circuit board 300. Multiple laminate layers 304 are formed to have openings in the cavity region 350. The laminate layers with the cavity 350 are added until sufficient laminate layers 304 are accumulated that the printed circuit board achieves the first thickness 355. Generally the laminate layers 302 have a material that has a stable, suitable dielectric constant for extremely high RF applications. The laminate layers 304 may have the dielectric constant similar to that of the laminate layer 302 or a material that is a standard combination of thermoplastic or thermosetting polymers reinforced with nonconductive fibers such as fiber glass reinforced epoxy.
[0031] FIG. 5A is a diagram of a cross-sectional view of some embodiments of a DIB printed circuit board incorporating an encapsulating structure. The DIB printed circuit board 300 further includes an encapsulating structure 375 which may cover the cavity 350 while allowing a cable to be connected to the connector 310. The encapsulating structure 375 may form an isolating enclosure for the connector 310 and electronic components 325 mounted within the cavity 350. The encapsulating structure 375 may be inserted in the DIB printed circuit board 300 and connected to a ground reference point 385 through a ground plane metal layer 380 within the multiple laminate layer 302. In some embodiments, the encapsulating structure 375 is conducting and effectively forms a "Faraday cage" to electrically isolate the connector 310, metal wiring trace 320, and the components 325 from external interfering electronic noise, while allowing connection of a signal cable through.
[0032] FIG. 5B shows a perspective view of one example of an encapsulating structure 375. The encapsulating structure 375 has an opening 370. The opening 370 will allow a cable (or the end of the connector 310) to pass through it. Thus a cable may be connected to the connector 310. The cable connects the DIB printed circuit board 300 to the test head 108 of FIG. 1 for transfer of the very high frequency RF signals 325 from the DUT socket 305 to the test head 108. Pins 376 are attached to the corners of the»sides 377 of encapsulating structure 375. The encapsulating structure 375 is placed within the cavity 350 with the sides 377 of the encapsulating structure 375 touching sides of the cavity and the pins 376 are placed plated ground vias extending through the multiple laminate layer 302 to contact the ground plane 380. The length of the pins 376 is approximately the thickness 360 of the multiple laminate layer 302.
[0033] FIG. 6A is a diagram of a cross-sectional view of the embodiment of a DIB printed circuit board 300 of Fig 5 A illustrating another of the encapsulating structure 375. The basic structure of the encapsulating structure 375 is fundamentally as shown in FIG. 5A, except the encapsulating structure 375 does not include the pins 376 but slides within the sides of the cavity 350. The sides of the cavity 350 have a metallic layer 395 formed on its surface extending onto the bottom surface of the DIB printed circuit board 300. The encapsulating structure 375 is placed within the cavity 350 with the sides 377 of the encapsulating structure 375 touching the conductive metallic layer 395. The sides 377 of the encapsulating structure 375 are adhered to the metallic layer 395 by soldering or brazing 400 the sides 377 of the encapsulating structure 375 to the metallic layer 395. The metallic layer 395 is affixed to the ground vias 390a and 390b. The metallic layer 395 affixed to the vias 390a and 390b forms the connection to the ground reference point 385. The ground vias 390a and 390b is in contact with the ground plane 380 that is connected to the ground reference point 385. As in FIG. 5A, the encapsulating structure 375 effectively forms a "Faraday cage" to electrically isolate the connector 310, metal wiring trace 320, and the components 325 from external interfering electronic noise.
[0034] FIG. 6B shows a perspective view of a second example of an encapsulating structure 375. As shown in FIG. 6A, the encapsulating structure 375 may have an opening 370. The opening 370 will allow a cable to pass through it to be connected to the connector 310. The cable connects the DIB printed circuit board 300 to the test head 108 of FIG. 1 for transfer of the very high frequency RF signals 325 from the DUT socket 305 to the test head 108. In various embodiments, the encapsulating structure 375 may be a lid or other conductive covering device.
[0035] It should be noted that the various embodiments of the DIB printed circuit board 300 of Figs. 4, 5, and 6A are shown with a single cavity 350 formed within the DIB printed circuit board 300. It is in keeping with the intent of this invention that multiple cavities 300 may be formed within the printed circuit board 300 dependent upon the number of high frequency signals and number of sites 335 being transferred from the test head 108 and the DUT 104 of FIG. 1. Further, the cavity 350 may have one or more connectors 310, one or more metal wiring traces 320, and one or more sets of the electronic components 325. Therefore the encapsulating structure 375 may have multiple openings 370 to allow multiple cables to connect to the connectors 310.
[0036] Thus, as discussed above, a cavity is formed in a back side 300b of the printed circuit board which decreases the thickness of the printed circuit board to a second thickness. It has been observed by the present inventor that in thinner printed circuit board (approximately 2.54mm) there is less than -30dB signal reflection at 2 GHz, in the example of FIG. 3 A. This is less than one percent (1%) of the delivered power that gets reflected at the SMA coaxial connector 210, as compared to -lOdB signal reflection 260 at 2 GHz, illustrated in FIG. 3B.
[0037] Referring to FIG. 4, in some embodiments, depending on the relative depth of the cavity 350, the cavity 350 may be positioned with respect to the DUT socket 305 so that the structural integrity of the printed circuit board 300 under and/or adjacent to the DUT socket 305 is not weakened to the extent that it causes fatigue and/or damage to the printed circuit board 300. Thus, in some embodiments, the cavity 350 may be offset to the side of the DUT socket 305 and thus not directly opposite the DUT socket 305. Other placement and geometry is possible to maintain a sufficient structural support for insertion and removal of DUT's to/from the DUT socket 305. If multiple cavities 350 are located on a printed circuit board 300, they may be spaced apart from each other so as to leave a lattice, or other support geometry of thicker portions of the printed circuit board 300 sufficient for structural support below and/or adjacent to the DUT socket 305, to inhibit stress failure during insertion and removal of DUT's. In other embodiments, the encapsulating structure 375, such as a rigid lid, and/or a rigid conductive covering material structure, adds structural support at the cavity 350 to allow more flexibility in the locations of one or more cavities 350.
[0038] It should be noted that the DUT socket 305 of Figs. 4, 5 A, and 6A connected to the device interface printed circuit board 300, is exemplary. Other embodiments may have other DUT interface structure, i.e. other DUT connection devices, such as a wafer probing apparatus, or other direct attach wafer testing device, or other interface device, associated with the device interface printed circuit board 300 which may be constructed in accordance with the description above.
[0039] While this invention has been particularly shown and described with reference to the embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made without departing from the spirit and scope of the invention.

中文:
[0001]对于高性能半导体测试器(有时称为自动测试设备或ATE)而言,高达数千兆赫的测试器信号从测试电子器件通过称为设备接口板(DIB)的相对大型电路板汇集到一个或多个非常紧凑的被测设备或DUT的引线上。DUT通常设计为包括要和高性能数字信号一起包括的甚高频模拟信号。这些甚高频模拟信号包括例如移动电话射频信号、全球定位无线电信号、无线通信无线电信号等。在当今的高性能片上系统(SOC)中,DUT和测试器电子器件之间通常有数百条信号通道。为了保持此类高频信号的保真性,信号通道被构造成能提供准确匹配的阻抗(通常为50欧姆)。难以在存在大量信号通道的情况下提供准确匹配阻抗。
[0002]DIB安装在自动测试设备上,使得要在通常称为测试头的测试电子器件与DUT之间交换的电子信号通过直接利用弹簧针或者利用OSP、SMA、SMP或其他高速连接器从底面或测试器侧连接到DIB的电缆传送。DUT通过安装在DIB的顶面或DUT侧的插座连接。SMA同轴连接器(由Bendix Scintilla公司原创设计的A型超微连接器)、OSP同轴连接器(由M/A Corn of Lowell,MA原创设计的Omni-Spectra插入式连接器)以及SMP同轴连接器(由Gilbert公司原创发明)常常由例如Tyco Electronics公司(Berwyn,PA)等公司制造。
[0004]由于DIB的尺寸增大,所以它们需要更大厚度来实现相同稳定性。另外,可降低测试成本的多点测试要求(同时测试多个DUT)会增加DIB的布线要求。这就迫使提供额外的层用于安排所有信号通道的所有布线迹线。当前DIB需要多达二十个信号层(大约5.08mm)并且在将来会需要至少三十个信号层,使得厚度按至少1.5的系数增大。由于需要更多层,DIB的厚度会增大。由于信号数量的增加,需要更多连接器,例如弹簧针。这样会对DIB产生更大机械压力,因此需要更厚的印刷电路板以承受更大压力而不会损坏印刷电路板。
[0005]图1为自动测试设备100的简化框图。自动测试设备100包括与测试头108通信的测试器主机102。测试头108连接到DIB 106。来自测试头108的信号可通过电缆组件路由到DIB 106。在操作中,DIB 106电连接到被测设备(DUT)104以便测试DUT 104。例如,自动测试设备(ATE)系统100用于测试集成电路,DUT 104可为包括执行数字和模拟功能的集成电路的半导体器件。高性能模拟功能的实例为移动电话发射器和接收器、数字无线发射器和接收器、射频识别发射器和接收器。这样,来自测试头108的信号通过DIB 106路由到DUT。
[0006]测试器主机102包括用于生成测试激励信号和评估测试响应信号的电路,该激励信号通过测试头108和DIB 106传送到DUT 104,该测试响应信号通过DIB 106和测试头108从DUT 104接收。DUT 104可为包括待测集成电路的封装硅DIB。DIB 106也可连接到探针接口卡,而DUT 104为包括安装到该探针接口卡的待测集成电路的半导体晶片。
[0007]图2为DIB印刷电路板200的横截面视图的示意图。DIB印刷电路板200具有DUT插座205,其通过例如弹簧或弹簧针触点207和209等压缩连接器连接到DIB印刷电路板200表面上的金属布线迹线。在DUT为执行数字和模拟功能的集成电路的情况下,数字信号230常常与模拟信号235分离,尤其是对甚高射频(RF)信号而言。模拟信号235通过插座的引脚209从DUT传送到通路215。通路215为在DIB印刷电路板200中钻出并电镀的洞。通路215连接到金属布线迹线220,该金属布线迹线连接至同轴连接器210。同轴连接器210可为OSP、SMA、SMP或其他高速连接器。模拟信号235在同轴连接器210和图1的测试头108之间传送。电子元件226被布置成与布线迹线220接触,以提供确保模拟信号235的信号保真性所需的补偿电路和终端电路。
[0008]如上所述,电路复杂性的增大和布线密度的增长使得DIB印刷电路板的厚度增大。由于DIB印刷电路板的厚度增大,导致性能在高速信号下通常会下降。性能的一个主要不利因素为通路215。本领域中已知的是,由于通路代表GHz频率模拟信号235的阻抗中断,因此通路的高速性能欠佳。由于元件/电路226距DUT插座205太远,因此对于某些匹配技术,长的通路215会导致问题。难以将匹配电子元件225布置在DIB印刷电路板200顶面上更理想位置(DUT插座205和DIB印刷电路板200之间),这是因为DUT的RF引脚数增加导致DUT插座205下没有足够的空间。
[0009]现在参见图3A,其示出用于测量甚高频模拟信号235性能的DIB印刷电路板201的实例。在本实例中,DIB印刷电路板201具有连接到通路245的SMA同轴连接器210。通路245连接到金属布线迹线220,其为了此评估而连接到50n电阻器240,该电阻器连接到接地基准点222。SMA同轴连接器210具有布置在通路250中的护罩。通路250还在DIB印刷电路板201内以内部方式连接到接地基准点。
[0010]在本实例中,DIB印刷电路板201被构造成约5.08mm厚。这代表当前DIB印刷电路板201所采用的厚度。随着集成电路复杂性的增大,该厚度将更大。SMA连接器与长约5.08mm(0.2′′)的通路245后面的50n终端电阻器240连接在一起。
[0011]图3B为图3A的实例中从SMA同轴连接器210通过通路245到达50n终端电阻器240的信号反射图。在图3A的实例中,在2GHz处存在-10d13的信号反射260。在使用5.08mm长的通路245的情况下,30输出功率的百分之十被反射260。此量级的反射260导致功率损耗并导致更难以匹配和补偿模拟信号235以保持信号保真性。
[0012]因此,需要的是被构造成能在甚高速模拟信号的布线通道中形成低损耗以保持高信号质量和保真性的DIB印刷电路板。
[0013]在一个实施例中,提供了一种设备接口板,其包括具有DUT接口结构(例如插座)的印刷电路板,所述DUT接口结构与所述印刷电路板的DUT侧相连。高频连接器和电子元件安装在该印刷电路板背面形成的腔体内。通过该印刷电路板的信号通路将高频连接器和电子元件与DUT接口结构连接在一起。可提供包封结构,其包覆腔体,同时允许电缆连接到高频连接器。
[0015]图2为DIB印刷电路板的横截面视图的示意图。
[0016]图3A为用于测量甚高频模拟信号性能的DIB印刷电路板实例的示意图。
[0017]图3B为图3A中从SMA同轴连接器通过通路30到达50Ω终端电阻器的信号的前向反射图。
[0018]图4为DIB印刷电路板的实施例的横截面视图的示意图。
[0019]图5A为采用5包封结构的DIB印刷电路板的另一个实施例的横截面视图的示意图。
[0020]图5B示出包封结构的一个实例的透视图。
[0021]图6A为图5的DIB印刷电路板实施例的横截面视图的示意图,其中示出包封结构的另一种实施方式。
[0022]图6B示出包封结构的第二个实例的透视图。
[0023]如图1所述,自动测试设备100包括与测试头108通信的测试器主机102。测试头108连接到DIB 106。来自测试头108的信号通过电缆组件路由到DIB 106。在操作中,DIB 106电连接到被测设备(DUT)104以便测试DUT 104。在图2中,电子元件226被布置成与布线迹线220接触以提供确保模拟信号235的信号保真性所需的阻抗匹配电路、补偿电路和终端电路,然而,由于元件/电路距DUT插座205太远,对于某些匹配技术,长的通路215会导致问题。因此,在一个实施例中,自动测试设备系统包括测试头108和DIB 106。测试头108采用电子电路以用于生成传送到至少一个被测设备104的测试激励信号,以及用于接收和评估来自至少一个被测设备104的测试响应信号。DIB 106布置在测试头108和至少一个被测设备104之间,以抑制甚高频信号的衰减。
[0024]图4为设备接口(DIB)印刷电路板300的横截面视图的一个实施例的示意图。设备接口板包括具有第一厚度355的印刷电路板300。DIB印刷电路板300具有DUT插座305,其通过弹簧或弹簧针触点307和309接触DIB印刷电路板300的顶部表面300t上的金属布线迹线。如上所述,在DUT为执行数字和模拟功能的集成电路的情况下,数字信号330常常与模拟信号335分离,尤其是对甚高RF频率而言。模拟信号335通过DUT插座305的引脚309从DUT传送至通路315。
[0025]在DIB印刷电路板300的背面或测试器侧300b(测试器侧)形成的腔体350使腔体下的印刷电路板300的厚度减小为第二厚度360,其可为例如DIB印刷10电路板300的厚度355的一半。在一个实例实施例中,20层DIB印刷电路板300为5.08mm厚并且腔体为2.54mm厚。
[0026]腔体350设置为紧邻DUT插座305。连接器310和电子元件320安装在腔体350内,以用于在图1的测试头108和DUT 104之间传送甚高频信号335。在腔体350内的印刷电路板300上钻出并电镀通路315,以将连接器310和电子元件325连接到DUT插座305并从而连接到被测设备。通路315可在腔体350形成之前或之后形成。电子元件325被布置成接触布线迹线320,以提供确保模拟信号335的信号保真性所需的阻抗匹配电路、补偿电路和终端电路。电子元件325为平衡/不平衡变压器(BalUns)、电感器、电容器和/或电阻器等,其调节测试信号以确保信号保真性。
[0027]在一些实施例中将电子元件326与连接器一起设置在腔体350内的一个优点为电子元件在DIB制造、测试和再加工期间可更易触及。图2的电子元件226被布置在DUT插座205和板200之间的DUT插座205下方。这样,电子元件226就不易于触及以进行调整、改变或更换。
[0028]然而,图4的实施例中的电子元件326在制造或维护期间易于触及,以允许提供适合的阻抗匹配电路、补偿电路和终端电路从而确保测试信号的保真度。
[0030]在其他实施例中,通过层叠多层预浸渍层合叠堆302直到印刷电路板300达到第二厚度360(该厚度为第一厚度355的一部分或印刷电路板300的最终厚度),在印刷电路板300的背面300b上形成腔体350。形成多重层合层304以在腔体区域350中提供开口。在腔体350内添加层合层直到累积了足够多的层合层304以使印刷电路板达到第一厚度355。一般来说,层合层302的材料具有用于极高RF应用的稳定、合适的介电常数。层合层304可具有与层合层302相似的介电常数,或材料为用绝缘纤维强化的热塑性或热固性聚合物(例如纤维玻璃强化的环氧树脂)的标准组合。
[0031]图5A为采用包封结构的DIB印刷电路板的一些实施例的横截面视图的示意图。DIB印刷电路板300还包括包封结构375,其可包覆腔体350,同时允许电缆连接到连接器310。包封结构375可为安装在腔体350内的连接器310和电子元件325形成隔离封装件。包封结构375可插入DIB印刷电路板300中并通过多重层合层302内的接地平面金属层380连接到接地基准点385。在一些实施例中,包封结构375会导电并有效地形成“法拉第笼”以将连接器310、金属布线迹线320、以及元件325与外部干扰电子噪声电隔离,同时允许信号电缆接头穿过。
[0032]图5B示出包封结构375的一个实例的透视图。包封结构375具有开口370。开口370将允许电缆(或连接器310的末端)从中穿过。这样电缆就可连接到连接器310。此电缆将DIB印刷电路板300连接到图1的测试头108,以将来自DUT插座305的甚高频RF信号325传送到测试头108。引脚376附接到包封结构375的侧面377的拐角处。包封结构375被布置在腔体350内,使得包封结构375的侧面377接触腔体的侧面,并且引脚376被布置成贯穿多重层合层302的电镀接地通路以接触接地平面380。引脚376的长度为约多重层合层302的厚度360。
[0033]图6A为图5A的DIB印刷电路板300的实施例的横截面视图的示意图,其中示出包封结构375的另一种实施方式。包封结构375的基本结构基本如图5A所示,不同的是包封结构375不包括引脚376,而是在腔体350的侧面内滑动。腔体350的侧面具有在其表面上形成的金属层395,其延伸到DIB印刷电路板300的底部表面上。包封结构375被布置在腔体350内,使得包封结构375的侧面377接触导电性金属层395。通过将包封结构375的侧面377焊接或硬钎焊400到金属层395,使包封结构375的侧面377粘附到金属层395上。金属层395固定到接地通路390a和390b。固定到通路390a和390b的金属层395形成到接地基准点385的连接。接地通路390a和390b接触连接到接地基准点385的接地平面380。如图5A所示,包封结构375有效地形成“法拉第笼”以将连接器310、金属布线迹线320、以及元件325与外部干扰电子噪声电隔离。
[0034]图6B示出包封结构375的第二实例的透视图。如图6A所示,包封结构375可具有开口370。开口370将允许电缆从中穿过以连接到连接器310。此电缆将DIB印刷电路板300连接到图1的测试头108,以将来自DUT插座305的甚高频RF信号325传送到测试头108。在各种实施例中,包封结构375可为封盖或其他导电性包覆装置。
[0035]应该指出的是,图4、图5和图6A的DIB印刷电路板300的各种实施例中示为在DIB印刷电路板300内形成单一腔体350。与本发明的目的一致的是,可根据从图1的测试头108和DUT 104传送的高频信号的数量和点335的数量在印刷电路板300内形成多个腔体350。另外,腔体350可具有一个或多个连接器310、一条或多条金属布线迹线320、以及一组或多组电子元件325。因此,包封结构375可具有多个开口370以允许多条电缆连接到连接器310。
[0036]这样,如上所述,在印刷电路板的背面300b形成腔体,其将印刷电路板的厚度减小为第二厚度。本发明的发明人已观察到,在图3A的实例中,在较薄(约2.54mm)的印刷电路板中,2GHz处的信号反射小于-30dB。与图3B中示出的2GHz处的-10dB信号反射260相比较,这小于SMA同轴连接器210处反射的输出功率的百分之一(1%)。
[0037]参见图4,在一些实施例中,根据腔体350的相对深度,腔体350可相对于DUT插座305设置,使得在DUT插座305下面或与之相邻的印刷电路板300的结构完整性不会减弱到使印刷电路板300疲劳和/或损坏的程度。因此,在一些实施例中,腔体350可偏移到DUT插座305侧并从而不与DUT插座305直接相对。其他布置和几何形状可以保持足够的结构支承以便在DUT插座305中插入DUT和从中取出DUT。如果在印刷电路板300上设置多个腔体350,它们可相互间隔开从而留出格子或印刷电路板300较厚部分形成的其他支承几何形状,其足以在DUT插座305下方或相邻位置提供结构支承,以在DUT的插入和取出期间抑制应力失效。在其他实施例中,包封结构375(例如刚性封盖和/或刚性导电性包覆材料结构)在腔体350处增加结构支承以允许在一个或多个腔体350的位置具有更高柔性。
[0038]应该指出的是,连接到设备接口印刷电路板300的图4、图5A和6A的DUT插座305是示例性的。其他实施例可具有其他DUT接口结构,即其他DUT连接装置(例如晶片探测装置)、或其他直接附连晶片测试装置、或其他接口装置,其与可根据上述说明构造的设备接口印刷电路板300相连。
[0039]虽然已经结合其实施例部分地示出和描述了本发明,但本领域的技术人员将会理解,在不脱离本发明精神和范围的前提下,可以在形式和细节上进行各种修改。