English:
[0001] This application is a continuation-in-part application of (A) U.S. patent application serial number 11/046,518, filed January 28, 2005, entitled "Molecular Memory Devices and Methods" and (B) U.S. patent application serial number 10/834,630, filed April 29, 2004, entitled "Systems, Tools and Methods for Production of Molecular Memory", the disclosures of which are hereby incorporated by reference in their entirety.
[0003] Advances in semiconductor processing and device design have resulted in computing devices being incorporated in a seemingly endless variety of tools and machines, ranging from conventional programmable computers to communication equipment and entertainment devices. Irrespective of its end purpose, a computing device typically includes a central processing unit (CPU), random access memory (RAM), and an addressing and communication mechanism enabling data exchange between the CPU and the RAM. In a computing device, data is stored, communicated and manipulated in the form of signals (e.g., voltage, current, optical and the like). The CPU contains circuitry for logically manipulating the signals, whereas the memory contains circuitry for storing the signals before, during and after the CPU's manipulation of those signals.
[0005] Today, memory devices implement hundreds of megabits of storage in a single integrated circuit. These devices include volatile memory (e.g., dynamic random access memory (DRAM) and static random access memory (SRAM)), non-volatile memory (e.g., electrically erasable programmable read only memory (EEPROM), flash EPROM, ferroelectric DRAM), and the like. Memory manufacturing systems and processes continue to push the limits of fine-geometry patterning and fabrication technology.
[0006] Performance of the memory components of a computing device is becoming an increasingly important determinant of overall system performance. Larger quantities of memory enable a greater variety of applications and functions to be implemented by the computing device and may reduce or eliminate the need for separate mass storage devices. Higher speed memory supports higher CPU processing frequencies, making the computing devices more useful for complex or real-time tasks. Denser memory devices support a growing variety of battery-powered electronic devices, such as laptop computers, PDAs, multifunction cellular telephones, and the like. At the same time, many of these applications benefit from reduced power consumption.
[0007] In many cases, improvements in semiconductor processing technology have led to the manufacture of denser, larger, faster and more power efficient memory devices. In many cases, the solid-state electronic behavior of the devices improves as the devices become smaller. Unfortunately, conventional memory, such as silicon-based DRAM memory, has reached a point where continued reduction in the size of conventional semiconductor memory cells is expected to adversely affect at least some of these important parameters and add undesirably to costs.
[0008] One reason for the reduced speed and increased power consumption at smaller dimensions is that memory cells usually implement a capacitor for each stored bit of information. A capacitor is a charge storage device formed by conductive plates that are separated by an insulator. As capacitors become smaller the quantity of charge that can be stored is reduced. To serve as a reliable storage device in a memory cell, a capacitor needs sufficient capacity to hold a signal at a level that can be reliably detected as data. Moreover, conventional capacitors lose their stored charge over time through the switch or transistor that is attached to each memory location. Transistors are inherently "leaky" devices and some of the charge stored in a capacitor dissipates or leaks over time. Memory cells based on smaller capacitors are more sensitive to leakage problems because they simply have less charge that can be lost before the stored data becomes irretrievable. They are also subject to reduced reliability.
[0009] To overcome the transient nature of capacitive storage, memory devices use refresh circuitry that frequently reads out a stored signal, amplifies it to a higher level, and stores it back into the capacitor. As the physical area allotted to the capacitor is decreased, it becomes increasingly difficult to maintain the same charge storage capacity in the smaller available area. Unless the leakages can be reduced in conjunction with the reduced storage capacity, the rate at which the capacitor must be refreshed increases. In turn, higher capacitor refresh rates reduce the percentage of time that a memory cell is available for reading and writing data. Moreover, a greater percentage of the total power consumption of the memory device is then used to refresh the memory. Even when the device is in a dormant or inactive state, traditional DRAM requires continuous refreshing and therefore continuous power consumption. Accordingly, researchers are actively seeking new ways of storing data signals that overcome the problems associated with smaller lithographic features and complex capacitor geometries in conventional capacitor- based memory cells.
[0010] Memory cell designers have attempted to maintain low refresh rates in smaller memory cells by boosting the amount of capacitance that can be formed in a given amount of chip area. Boosting capacitance often involves increasing the surface area of the capacitor's charge holding material, which is very difficult to do when the overall size of the capacitor is shrinking. While designers have had some success at controlling surface area by forming the charge holding material into three-dimensional trench and stacked capacitor designs, it is unlikely that these techniques alone can be relied on to create sufficient capacitances in smaller cells. The solid-state electronic behaviors upon which cell performance is predicated begin to break down as the dimensions of various cell features become smaller such that a capacitor can no longer store sufficient charge for sufficient time to be useful in a memory cell.
[0012] Widespread use of molecules in electronic devices (e.g., switches, capacitors, conductors, and the like) depends on the development of attachment chemistries and processes that achieve high yield at reasonable throughputs and costs. To date, however, equipment vendors and tool development engineers have not developed efficient tools and processes for applying attachment chemistries that can be used in molecular electronic device manufacture. For widespread use, molecular scale components require repeatable processes that are able to attach desired chemical species to substrates, other device structures, and each other. In addition, robust processes for forming molecular structures are needed to enable new types of components (e.g., micron or sub-micron size electrochemical cells for charge storage) to be implemented in conjunction with semiconductor components.
[0013] It is desirable for molecular device manufacturing techniques to be compatible with existing semiconductor industry processes and to use existing semiconductor industry tools or improvements thereof. However, molecular device processing is sensitive to many variables and conditions that do not have the same impact on semiconductor processing. For example, water is present throughout most semiconductor manufacturing processes as a cleaning fluid and in the form of ambient humidity. Water, however, can have destructive effects on some molecular processes because water molecules interfere with the attachment chemistry or destroy the active molecules. Similarly, thin native oxide layers and ultra-low contaminant levels are tolerable in semiconductor processes because the bulk effects of these aberrant features are minimal in comparison to the overall device function. In contrast, when devices are manufactured with molecular-scale features, these molecular-scale defects can become significant.
[0019] Another aspect of the invention involves a memory array that comprises an array of memory elements. At least some of the memory elements comprise a switching device coupled to a micron or sub-micron size electrochemical cell. The electrochemical cell includes a working electrode; a counter electrode; an auxiliary counter electrode; an electrolyte that contacts the working electrode, the counter electrode, and the auxiliary counter electrode; and redox-active molecules electrically coupled to at least one of the electrodes.
[0020] Another aspect of the invention involves a computing device that comprises a central processing unit coupled to a molecular memory that includes an array of memory elements. At least some of the memory elements comprise a switching device coupled to a micron or sub-micron size electrochemical cell. The electrochemical cell includes a working electrode; a counter electrode; an auxiliary counter electrode; an electrolyte that contacts the working electrode, the counter electrode, and the auxiliary counter electrode; and redox-active molecules electrically coupled to at least one of the electrodes.
[0021] Another aspect of the invention involves a molecular storage device that comprises a micron or sub-micron size electrochemical cell. The electrochemical cell includes a working electrode electrically coupled to a layer of chemisorbed storage molecules; a counter electrode electrically coupled to a layer of chemisorbed redox-active molecules; and an electrolyte that contacts the working electrode and the counter electrode.
[0022] Another aspect of the invention involves a memory element that comprises a switching device coupled to a micron or sub-micron size electrochemical cell. The electrochemical cell includes a working electrode electrically coupled to a layer of chemisorbed storage molecules; a counter electrode electrically coupled to a layer of chemisorbed redox- active molecules; and an electrolyte that contacts the working electrode and the counter electrode.
[0023] Another aspect of the invention involves a memory array that comprises an array of memory elements. At least some of the memory elements comprise a switching device coupled to a micron or sub-micron size electrochemical cell. The electrochemical cell includes a working electrode electrically coupled to a layer of chemisorbed storage molecules; a counter electrode electrically coupled to a layer of chemisorbed redox-active molecules; and an electrolyte that contacts the working electrode and the counter electrode.
[0024] Another aspect of the invention involves a computing device that comprises a central processing unit coupled to a molecular memory that includes an array of memory elements. At least some of the memory elements comprise a switching device coupled to a micron or sub-micron size electrochemical cell. The electrochemical cell includes a working electrode electrically coupled to a layer of chemisorbed storage molecules; a counter electrode electrically coupled to a layer of chemisorbed redox-active molecules; and an electrolyte that contacts the working electrode and the counter electrode.
[0029] Another aspect of the invention involves an apparatus that includes a coating unit configured to deposit redox-active molecules on a partially fabricated semiconductor wafer; an enclosed chamber that contains the coating unit; one or more gas sensors that monitor one or more gases in the enclosed chamber; and a control system that manages the operation of the coating unit.
[0030] Another aspect of the invention involves an apparatus that includes a heating unit configured to anneal a partially fabricated semiconductor wafer at temperatures between 350 and 450 0C; an enclosed chamber that contains the heating unit; one or more gas sensors that monitor one or more gases in the enclosed chamber; and a control system that manages the operation of the heating unit.
[0032] Another aspect of the invention involves an apparatus that includes a coating unit configured to deposit an electrolyte on a partially fabricated semiconductor wafer; an enclosed chamber that contains the coating unit; one or more gas sensors that monitor one or more gases in the enclosed chamber; and a control system that manages the operation of the coating unit.
[0033] Another aspect of the invention involves a method of making an array of molecular storage devices on a partially fabricated semiconductor wafer by forming an array of working electrodes; forming one or more auxiliary counter electrodes for the array of molecular storage devices; attaching storage molecules to the working electrodes; forming one or more electrolytes for the array of molecular storage devices; and forming one or more counter electrodes for the array of molecular storage devices.
[0034] Another aspect of the invention involves a method that comprises depositing redox-active molecules on the surface of a partially fabricated semiconductor wafer in a first monitored gas ambient; chemically attaching some of the. redox-active molecules to a plurality of working electrode surfaces on the wafer in a second monitored gas ambient; removing chemically unattached redox-active molecules from the wafer; forming an electrolyte on the wafer; and depositing a conductor on the electrolyte.
[0039] Figure 4 is a schematic cross-section of a molecular storage device configured as an electrochemical cell having a working electrode, a counter electrode, and an auxiliary counter electrode in accordance with another embodiment of the present invention.
[0040] Figure 5 is a schematic cross-section of a trench or "molehole" molecular storage device and its incorporation in a memory element component in accordance with one embodiment of the present invention.
[0041] Figure 6 is a schematic block diagram of a molecular memory incorporating a molecular memory array.
[0042] Figure 7 is a schematic block diagram of a system on a chip (SOC) with embedded molecular memory in accordance with one embodiment of the present invention.
[0044] Figure 9 is a flowchart representing a method of reading from a molecular memory in accordance with one embodiment of the present invention.
[0046] Figure 11 is a flowchart representing a method of writing to a molecular memory in accordance with one embodiment of the present invention.
[0047] Figure 12 depicts an exemplary current- voltage voltammogram curve for a storage molecule having multiple distinct oxidation states.
[0052] Figures 17a and 17b are schematic diagrams of top and side views, respectively, of a thermal processing unit in accordance with one embodiment of the present invention.
[0054] Figure 19 depicts an exemplary current- voltage curve for storage molecules with poor attachment to an electrode surface.
[0059] Figures 24a-24d illustrate a portion of a molecular electronic device at various stages of processing in accordance with one embodiment of the present invention.
[0065] Figures 30a, 30b and 30c schematically depict a variety of polymer configurations. Figure 30c depicts Z-dimension linear polymers of independently selected redox-active molecules 3000 with independently selected linkers 3010 on the electrode 3015. n is an integer of 0 or more, with from 1 to 8 being preferred, and the attachment moieties are not depicted. Figure 30b depicts Z-dimension linear polymers as in Figure 30a with cross-linking 3015. As described below, branched Z-dimension polymers are also contemplated, with 1 or multiple branch points. Figure 30c depicts X-Y dimension linear redox-active molecule polymers with multiple attachment moieties 3020; also contemplated are surfaces comprising different linear polymers of redox-active molecules, again, with either homopolymers or heteropolymers being useful. Branched redox-active molecule polymers, with optional cross- linking, are also possible.
[0071] Moreover, in the following description, numerous specific details are set forth to provide a thorough understanding of the present invention. However, it will be apparent to one of ordinary skill in the art that the invention may be practiced without these particular details. In other instances, methods, procedures, components, and systems that are well-known to those of ordinary skill in the art are not described in detail to avoid obscuring aspects of the present invention.
[0076] The terms "different and distinguishable" when referring to two or more oxidation states means that the net charge on the entity (atom, molecule, aggregate, subunit, etc.) can exist in at least two different states. The states are said to be "distinguishable" when the difference between the states is greater than the thermal energy.
[0079] The term "fixed electrode" is intended to reflect the fact that the electrode is essentially stable and unmovable with respect to the storage medium. That is, the electrode and storage medium are arranged in an essentially fixed geometric relationship with each other. It is of course recognized that the relationship alters somewhat due to expansion and contraction of the medium with thermal changes or due to changes in conformation of the molecules comprising the electrode and/or the storage medium. Nevertheless, the overall spatial arrangement remains essentially invariant. This term is intended to exclude systems in which the electrode is a movable "probe" (e.g., a writing or recording "head", an atomic force microscope (AFM) tip, a scanning tunneling microscope STM tip, etc.).
[0080] The term "working electrode" is used to refer to an electrode that is used to set or read the state of a storage medium and/or storage molecule.
[0085] The term "electrically coupled" when used with reference to a storage molecule (or, more generally, a redox-active molecule) and/or storage medium and electrode refers to an association between that storage medium or molecule and the electrode such that electrons move from the storage medium/molecule to the electrode or from the electrode to the storage medium/molecule and thereby alter the oxidation state of the storage medium/molecule. Electrical coupling can include direct covalent linkage between the storage medium/molecule and the electrode, indirect covalent coupling (e.g., via a linker), direct or indirect ionic bonding between the storage medium/molecule and the electrode, or other bonding (e.g., hydrophobic bonding). In addition, no actual bonding may be required and the storage medium/molecule may simply be contacted with the electrode surface. There also need not necessarily be any contact between the electrode and the storage medium/molecule where the electrode is sufficiently close to the storage medium/molecule to permit electron tunneling between the medium/molecule and the electrode.
[0086] The term "redox-active unit", "redox-active molecule" (ReAM) or "redox-active subunit" refers to a molecule or component of a molecule that is capable of being oxidized or reduced by the application of a suitable voltage.
[0088] The terms "storage molecule" and "memory molecule" refer to a molecule having one or more oxidation states that can be used for the storage of information (e.g., a molecule comprising one or more redox-active subunits). Preferred storage molecules have two or more different and distinguishable non-neutral oxidation states.
[0092] The term "molecular storage device" (MSD) refers to a micron or sub-micron size electrochemical cell that includes two or more electrodes and an electrolyte, with redox- active molecules electrically coupled to at least one of the electrodes.
[0097] The terms "read" and "interrogate" refer to the determination of the state(s) of one or more memory elements.
[00100] A "voltage source" is any source (e.g., molecule, device, circuit, etc.) capable of applying a voltage to a target (e.g., an electrode).
[00101] The phrase "output of an integrated circuit" refers to a voltage or signal produced by one or more integrated circuit(s) and/or one or more components of an integrated circuit.
[00111] Working electrode 103 may comprise, for example, aluminum, gold, silver, tungsten or other available conductor, such as copper, platinum, titanium nitride or polysilicon. Other suitable materials include: Ti, Ta, TaN, conducting oxides (e.g., IrO, RuO, OsO, RhO), and the like, or combinations thereof. In some embodiments, working electrode 103 is formed at the same time as other structures such as bond pads and interconnects for an integrated circuit. Processes and materials for forming plugs 101 and electrodes 103 are widely available in the semiconductor processing industry. In many integrated circuit processes, metal pads will be coated with insulating layer 105, which serves to protect and/or passivate working electrode 103. Insulating layer 105 may be implemented as a deposited oxide, silicon nitride, or the like. Layer 105 is patterned to expose a portion of working electrode 103, which may, in certain processes, be performed in the same operation used to expose portions of bonding pads of the integrated circuit. The exposed portion of working electrode 103 defines an "active area" for the attachment of storage molecules. In some embodiments, the structure is manufactured up through the formation and patterning of oxide 105 using industry standard process flows.
[00112] A thin layer 107 of storage molecules is formed on the active area of working electrode 103 and becomes attached and electrically coupled thereto. Layer 107 may range in thickness from 1 to 100 nanometers in particular examples. In some embodiments, layer 107 is a layer of chemisorbed molecules. In some embodiments, layer 107 is a self-assembled monolayer (SAM). In other embodiments, layer 107 may also be formed by, for example, selective deposition or other suitable processes, including in situ polymerization, as described below and in U. S. S.N. 10/800,147, hereby incorporated by reference.. The attachment site for the molecules may be lithographically defined by patterning layer 105 over the conductive material as indicated. As a representative example only, an extensive library of porphyrins (~150 compounds) with specific linker components that are designed to form a covalent bond with a substrate (thereby forming a layer of chemisorbed species) is available as potential storage molecules for use in layer 107. Presently, these molecules comprise a number of different architectures, including, but not limited to, redox active moieties (ReAMs) in a variety of configurations, including monomeric and polymeric ReAMs, derivatives and polymers thereof, as further described below.
[00117] Like the working electrode 103 in Figure 1, the working electrodes 201 in these electrochemical cells can be built on top of and electrically coupled to an electrode or bond pad of an underlying semiconductor device. For example, conductive vias and/or plugs 211, 213, 215, etc. may reach down through the passivation and planarization layers (e.g., insulator 219) to make electrical contact with an access transistor (803, shown in Figure 8) or other active device.
[00118] Like the working electrode 103 in Figure 1, the working electrodes 201 in these electrochemical cells are electrically coupled to a thin layer of storage molecules 205. In some embodiments, the layer of storage molecules 205 is a chemisorbed layer.
[00120] In addition, the counter electrodes 203 in these electrochemical cells are electrically coupled to a layer of redox-active molecules 205. In some embodiments, the layer of redox-active molecules 205 on the counter electrodes 203 is a chemisorbed layer. In some embodiments, the counter electrodes 203 have the same layer of molecules 205 attached as the working electrodes 201 (e.g., in a chemisorbed layer). In other embodiments, the counter electrodes 203 have a different layer of fast redox-active molecules attached (not shown in Figure 2) than those present on the working electrodes 201. In other embodiments, the counter electrodes 203 do not have any redox-active molecules attached (not shown in Figure 2), and instead use the redox chemistry of the counter electrode material itself (e.g., copper). In Figure 2a, the layer of chemisorbed storage molecules on the working electrodes 201 and the layer of chemisorbed redox-active molecules on the counter electrodes 203 are coplanar with each other, as are the working and counter electrodes 201 and 203, respectively.
[00121] As shown in Figure 2b, in some embodiments, the distance between the counter electrodes 203 and the adjacent working electrodes 201 can be reduced by depositing, patterning, and etching a layer of conductive material 221 (e.g., doped polysilicon, nanocrystalline doped silicon, Cu, Ti5 Ta, TiN, TaN, TiW, or W) over the surface containing the working electrodes 201 and counter electrodes 203 (e.g., doped polysilicon, nanocrystaline doped silicon, Cu, Ti, Ta, TiN, TaN, TiW, or W). Molecules 205 can then be deposited, attached, and electrically coupled to material 221, which becomes the new surface for the working electrodes 201 and the counter electrodes 203. In this embodiment, the layer of chemisorbed storage molecules on the working electrodes 201 and the layer of chemisorbed redox-active molecules on the counter electrodes 203 remain substantially coplanar with each other, as do the working and counter electrodes 201 and 203, respectively.
[00122] In both embodiments shown in Figure 2a and Figure 2b, the separation between the working electrodes 201 and the adjacent counter electrodes 203 is determined by the lithography used, rather than by the thickness of the electrolyte. Depending on the lithography and electrolyte used, these embodiments can reduce the impact of the electrical impedance of the electrolyte 207, which can limit the overall speed of the reaction at the working electrodes 201.
[00123] Figures 3a and 3b are schematic cross-sections of molecular storage devices in an array of molecular storage devices that are configured as electrochemical cells having a working electrode (WE) 301, a counter electrode 309, and one or more auxiliary counter electrodes (ACE) 303 in accordance with one embodiment of the present invention.
[00124] The working electrodes 301 in these electrochemical cells can be built on top of and electrically coupled to an electrode or bond pad of an underlying semiconductor device. For example, conductive vias and/or plugs 311, 313, 315, etc. may reach down through the passivation and planarization layers (e.g., insulator 319) to make electrical contact with an access transistor (803, shown in Figure 8) or other active device.
[00125] The working electrodes 301 in these electrochemical cells are electrically coupled to a thin layer of storage molecules 305. In some embodiments, the layer of storage molecules 305 is a chemisorbed layer.
[00127] In addition, the electrochemical cells in this embodiment have one or more auxiliary counter electrodes 303. The main purpose of the auxiliary counter electrodes 303 is to increase the speed of the oxidation/reduction reaction at the working electrodes 301 beyond the speed possible when just counter electrode 309 alone is used. The auxiliary counter electrodes 303 reduce the impact of the electrical impedance of the electrolyte 307 and/or low current density of the counter electrode 309, which can limit the overall speed of the reaction at the working electrodes 301. The auxiliary counter electrodes 303 are typically located closer to the working electrodes 301 than the counter electrode 309. In some embodiments, the auxiliary counter electrodes 303 have the same layer of molecules 305 attached as the working electrodes 301 (e.g., in a chemisorbed layer). In other embodiments, the auxiliary counter electrodes 303 have a different layer of fast redox-active molecules attached (not shown in Figure 3) than those present on the working electrodes 301. In other embodiments, the auxiliary counter electrodes 303 do not have any redox-active molecules attached (not shown in Figure 3), and instead use the redox chemistry of the auxiliary counter electrode material itself (e.g., copper). In some embodiments, the auxiliary counter electrodes 303 are biased so that more current can be supplied to the reaction at the working electrodes 301. In some embodiments, the bias to the auxiliary counter electrodes 303 is supplied by conducting lines 317 (which extend out of the plane of Figure 3).
[00128] As shown in Figure 3b, in some embodiments, the distance between the attached counter electrodes 303 and the adjacent working electrodes 301 can be reduced by depositing, patterning, and etching a layer of conductive material 321 (e.g., doped polysilicon, nanocrystalline doped silicon, Cu, Ti, Ta, TiN, TaN, TiW, or W) over the surface containing the working electrodes 301 and auxiliary counter electrodes 303 (e.g., doped polysilicon, nanocrystaline doped silicon, Cu, Ti, Ta, TiN, TaN, TiW, or W). Molecules 305 can then be deposited, attached, and electrically coupled to material 321, which becomes the new surface for the working electrodes 301 and the auxiliary counter electrodes 303.
[00129] Figure 4 is a schematic cross-section of a molecular storage device configured as an electrochemical cell having a working electrode, a counter electrode, and an auxiliary counter electrode in accordance with another embodiment of the present invention.
[00130] In this embodiment, working electrode 403 is formed on another conductor 401. Conductor 401 is part of a series of conductors that make electrical contact with an access transistor 803 or other active device. Working electrode 403 and conductor 401 are surrounded by insulators (e.g., SiO2) 405 and 402, respectively. Insulating layer 406 (e.g., SiO2) separates the working electrode 403 from the auxiliary counter electrode 407. Conductors 400 and 404 are used to bias the auxiliary counter electrode 407. Layers of redox-active molecules 409 (e.g., chemisorbed layers) are attached to the working electrode 403 and the auxiliary counter electrode 407. In this embodiment, electrolyte 410 and counter electrode 411 are not common to multiple electrochemical cells. Rather, each electrochemical cell has its own electrolyte and its own counter electrode. Insulating layer 408 (e.g., SiO2) is used to form a well for electrolyte 410. Counter electrode 411 is encapsulated by sealing layer 412 (e.g., a polymer or an insulator such as SiN, Siθχ and the like). A method for making this embodiment is discussed in more detail below with respect to Figure 27.
[00131] The embodiment of a molecular storage device shown in Figure 4 provides yet another structure that places one or more auxiliary counter electrodes 407 in close proximity to a working electrode 403. Those of ordinary skill in the art will appreciate that the structures shown in Figures 3 and 4 are merely exemplary of the many ways that an auxiliary counter electrode can be incorporated into an electrochemical cell in a molecular storage device.
[00132] Figure 5 is a schematic cross-section of a trench or "molehole" molecular storage device and its incorporation in a memory cell component in accordance with one embodiment of the present invention.
[00134] The architecture shown in Figure 5 can be formed in a manner that avoids the possibility of metal being deposited onto the molecular layer 507, thereby preventing damage. The inside of the trench forms the working and counter electrode surfaces, and molecules form one or more layers of chemisorbed species on the inside of the trench. Thus, the number of molecules can be increased by increasing the depth of the trench. Note that the relative heights of the working electrode 502 and the counter electrode 511 are not drawn to scale in Figure 5. The height of the counter electrode 511 is typically greater than the height of the working electrode 502. In addition, rather than having the working electrode 502 formed in a heavily- doped region of the semiconductor substrate, the working electrode 502 can be formed by etching trenches or moleholes in metal-insulator-metal sandwich layers. These sandwich layers can be deposited on the semiconductor substrate or on some other surface created during back end of line (BEOL) processing of the semiconductor wafer. The height of each layer of metal determines the height of the trench, thereby allowing easy adjustment of the effective area of the two electrodes. Because the vertical dimension is used, many more molecules are available. This allows greatly enhanced sensitivity for a given cross-sectional area of the semiconductor wafer (the wafer being represented in Figure 5 by substrate 501). In addition, the design of Figure 5 easily accomplishes any variation in the relative sizes of each electrode.
[00135] In some embodiments, each counter electrode 511 is connected to the gate 515 of a, preferably p-channel, MOS transistor whereas the working electrode 502 is connected to a fixed potential, herein denoted as gnd 515. The voltage on the gate 517 will, thereby, be modulated by the oxidation state of the molecular layer 507, such that the state of molecular layer 507 can be determined by measuring the applied voltage on the source node 519 at which current begins to flow, or alternately by measuring the amount of current which flows when a fixed high potential is applied at node 519. When installed in a completed memory cell, this component would be written by the application of a write voltage to node 517 and read by means of the application of a probe voltage to node 519, thereby allowing for a non-destructive read mechanism.
[00138] Figure 6 is a schematic block diagram of a molecular memory 600 incorporating a molecular memory array 601. In some embodiments, molecular memory array 601 comprises an array of 2N rows and 2M columns. Each of the 2N rows is associated with a word line 607, while each of the 2M columns is associated with a bit line 609. In a typical application the word lines 607 and bit lines 609 will cross over or under each other. The location at which a word line and bit line cross is sometimes called an "intersection," even though the word line and bit line are not connected to each other. A molecular memory cell 800 (Figure 8) is typically located at or near the intersection of each row and column. Molecular memory array 601 may include any number of molecular memory cells 800 arranged in any fashion that meets the needs of a particular application.
[00139] Memory 600 is operated by receiving an address into address register 619, which sends an N-bit row address into row address decoder 603 and an M-bit column address into column address decoder 605. Row address decoder 603 generates a signal on one word line 607. Word lines 607 may include word line driver circuitry 615 that drives a high current signal onto word lines 607. Because word lines 607 tend to be long, thin conductors that stretch across much of the chip surface, it requires significant current and large power switches to drive a word line signal. As a result, line driver circuits 615 are often provided with power supply 617 in addition to power supply circuits (not shown) that provide operating power for the other logic. Word line drivers 615, therefore, tend to involve large components. The high speed switching of large currents tends to create noise, stress the limits of power supplies and power regulators, and stress isolation structures.
[00140] In a conventional memory array there are often more columns (bit lines) than rows (word lines) because during refresh operations, each word line is activated to refresh all storage elements coupled to that word line. Accordingly, the fewer the number of rows, the less time it takes to refresh all of the rows. In some embodiments, molecular memory cell 800 can be configured to exhibit significantly longer data retention than typical capacitors, on the order of tens, hundreds, or thousands of seconds. Hence, the refresh cycle can be performed much less frequently (e.g., up to orders of magnitude less frequently) or omitted altogether. Accordingly, refresh considerations that actually affect the physical layout of a memory array can be relaxed and arrays of various geometries can be implemented. For example, molecular memory array 601 can readily be manufactured with a larger number of word lines 607, which will make each word line shorter. As a result, word line driver circuits 615 can be made smaller or eliminated because less current is required to drive each word line at a high speed. Alternatively or in addition, shorter word lines 607 can be driven faster to improve read/write access times. As yet another alternative, each row of memory locations can be provided with multiple word lines to provide a mechanism for storing multiple states of information in each memory location.
[00141] Sense amplifiers 611 are coupled to each bit line 609 and operate to detect signals on bit lines 609 that indicate the state of a memory cell 800 coupled to that bit line, and amplify that state to an appropriate logic level signal. In one embodiment, sense amplifiers 611 may be implemented with substantially conventional designs as such conventional designs will operate to detect and amplify signals from a molecular memory cell 800. Alternatively, unlike conventional capacitors, some molecular storage devices provide very distinct signals indicating their state.
[00142] Read/write logic 613 includes circuitry for placing the memory 600 in a read or write state. In a read state, data from molecular array 601 is placed on bit lines 609 (with or without, but typically with the operation of sense amplifiers 611), and captured by buffers/latches in read/write logic 613. Column address decoder 605 will select which bit lines 609 are active in a particular read operation. In a write operation, read/write logic 613 drives data signals onto the selected bit lines 609 such that when a word line is activated, that data overwrites any data already stored in the addressed memory element(s) 800.
[00143] A refresh operation is substantially similar to a read operation, however, the word lines 607 are driven by refresh circuitry (not shown) rather than by externally applied addresses. In a refresh operation, sense amplifiers 611, if used, drive the bit lines 609 to signal levels indicating the current state of the memory elements 800 and that value is automatically written back to the memory elements 800. Unlike a read operation, the state of bit lines 609 is not coupled to read/write logic 613 during a refresh. The refresh operation is only required if the charge retention time of the molecules used is less than the operational life of the device used, for example, on the order of 10 years for flash memory.
[00144] Figure 7 is a schematic block diagram of a system on a chip (SOC) with embedded molecular memory in accordance with one embodiment of the present invention.
[00145] SOC 700 comprises a central processing unit 701 and molecular memory 703. A memory bus 705 couples CPU 701 and molecular memory 703 to exchange address, data, and control signals. Optionally, SOC 700 may also contain conventional memory 707 coupled to memory bus 705. Conventional memory 707 may include random access memory (e.g., DRAM, SRAM, SDRAM and the like), or read only memory (e.g., ROM, EPROM, EEPROM and the like). SOC 700 can include a memory controller (not shown) in addition to a memory bus 705 for coupling the CPU 701 to the molecular memory 703 and any other memory devices included in the SOC 700. SOC 700 may include one or more input/output (I/O) interfaces 709 that enable CPU 701 to communicate with external devices and systems. I/O interface 709 may be implemented by serial ports, parallel ports, radio frequency ports, optical ports, infrared ports and the like. Further, interface 709 may be configured to communicate using any available protocol, including packet-based protocols. As is well known in the art, a SOC can be incorporated and used in a wide variety of computing devices, including, without limitation, laptop computers, personal digital assistants (PDAs), cell phones, digital cameras and camcorders, embedded computers, and the like. Molecular memory 600 by itself or molecular memory 703 embedded in a SOC 700 can be readily incorporated and used in such computing devices, too.
[00146] Figure 8 is a schematic circuit diagram of a memory cell 800 in accordance with one embodiment of the present invention. Memory cell 800 is akin to a widely used one transistor one capacitor (ITlC) memory cell design. However, cell 800 differs in that a molecular storage device 801, is employed rather than a conventional capacitor. In some embodiments, the molecular storage device 801 is implemented as a structure formed subsequent to and above a semiconductor substrate having active devices formed therein. In other embodiments, the molecular storage device 801 is implemented as a micron to nanometer sized hole or trench in a semiconductor substrate having active devices formed therein. The molecular storage device 801 is fabricated using processing techniques that are compatible with the semiconductor substrate and previously formed active devices in the semiconductor substrate. In some embodiments, the molecular storage device 801 includes an electrochemical cell having two or more electrode surfaces separated by an electrolyte. Storage molecules (e.g., molecules having one or more oxidation states that can be used for storing information) are coupled to an electrode surface within the electrochemical cell. Examples of storage molecules include monomeric porphyrins, ferrocene-derivatived porphyrins, trimeric porphyrins, porphyrin polymers or triple-decker sandwich porphyrins, among other compounds. Examples of suitable storage molecules are described in greater detail below.
[00147] Figure 9 is a flowchart representing a method of reading from a molecular memory in accordance with one embodiment of the present invention.
[00148] When a word line 607 is activated, access transistor 803 is placed in a conductive state thereby coupling (902) molecular storage device 801 to its associated bit line 609. In many cases, the signal generated by molecular storage device 801 is not sufficient to drive conventional logic devices. A sense amplifier 805 detects the signal generated by molecular storage device 801 and amplifies that signal to an appropriate logic level (i.e., a signal compatible with other system logic). For example, using porphyrin storage molecules, it is possible to construct molecular storage devices 801 with stable oxidation states at +0.55V, +0.48V, +0.39V, +0.17V, -0.05V and -0.18V (vs. Ag/Ag+). More or fewer stable oxidation states may be provided in a given embodiment. The storage molecules can be placed in a selected one of these oxidation states by application of an appropriate voltage to bit line 609, while activating an appropriate word line 607. Once the molecular storage device 801 is placed in the desired oxidation state, it will remain in that oxidation state for tens, hundreds, thousands or an indefinite number of seconds in particular embodiments.
[00149] During reading, a word line 607 is activated and the molecular storage device 801 drives the bit line 609 to a voltage that indicates its oxidation state. In some embodiments, the bit line is precharged to a predetermined potential, then coupled to the electrochemical cell and monitored (904) for changes in potential indicative of the oxidation state of the storage molecules in the electrochemical cell. This is done in a manner very similar to a read operation in a conventional memory. When the access transistor 803 is activated (i.e., placed in a conductive state, forming a closed circuit), the molecular storage device (MSD) 801 is connected to the bit line 609. For example, if the bit line is precharged to a value that is more negative than the oxidation potential of the molecule (with reference to the top metal of the MSD or counter electrode), and that molecule is in an oxidized state, current will flow from the molecule to the bit line (and electrons will flow from the bit line to the molecule). This will result in an accumulation of charge on the bit line, where the magnitude of the charge is determined by the number of molecules in the MSD and the oxidation state of each molecule (Q=nFN, Faraday's Law). The appearance of that charge will change the voltage on the bit line 609 (V=Q/C), and that change in voltage can be distinguished by a voltage-sensing amplifier, as conventionally used in the art.
[00151] One advantage of molecular storage devices 801 is that molecular storage can be adapted to store multiple bits of data at each location by selection of the storage molecules. Figure 10 is an exemplary cyclic voltammogram that illustrates a current- voltage characteristic of a three-state (two oxidized states plus ground state) monomeric porphyrin storage molecule. The peaks and valleys correspond to distinct oxidation states that can be used for storing information. In the example of Figure 10, two peaks (plus the unoxidized state) correspond to three distinct states and therefore a molecular storage device 801 that is capable of storing three states of information. Each oxidation state can be set or written to sequentially, in order. The magnitude of the charge read at OV reflects the number of states oxidized, which can then be translated into the bit pattern written.
[00152] Figure 11 is a flowchart representing a method of writing to a molecular memory in accordance with one embodiment of the present invention.
[00153] In order to write a state into the molecular storage device 801, the bit line 609 is coupled (1102) to the molecular storage device 801 and a voltage is applied (1104) to the bit line 609 to create the desired oxidation state of the storage molecules. Typically, the voltage applied to the bit line 609 will be somewhat more positive than the Ey2 of the molecule used in the MSD 801 to compensate for resistive and capacitive losses in the writing circuitry. The losses associated with the writing circuitry are measurable and consistent, and so can be readily compensated.
[00154] In the specific example of Figure 10, the bias potential denoted by the horizontal axis represents the potential on the working electrode relative to the applied potential at the counter (or reference) electrode (e.g., I l l, 309, 411, or 511), given a specific reaction at the counter electrode. Thus, the location of the curve along the horizontal axis is determined by the electrochemical reaction which takes place at the counter electrode. This reference voltage is determined by the chemical equilibrium potential, as conventionally illustrated by the Nernst equation. Conventionally, this is defined as OV, and all voltages are referenced to this potential. It should be noted that the chemical composition of the counter electrode and electrolyte determines this voltage and that the voltage is adjustable over a wide range (e.g, by choice of reactant and reactant concentrations at the counter electrode). In the example of Figure 10, a 500 mV signal on the working electrode, as thus defined, is insufficient to cause oxidation, whereas an 800 mv signal is sufficient to cause oxidation of the first discrete oxidation state. To write a second state to the same storage device 801, the bias potential on the working electrode (e.g., Ill, 309, 411, or 511) is set at or above 1100 mV. An 800 mV signal is insufficient to cause oxidation of the second state, whereas an 1100 mV signal is sufficient to cause oxidation of the second discrete oxidation state. Hence, the first and second bits can be written sequentially.
[00155] After a write operation, the storage molecules will tend to remain at their oxidation state. In essence, the electrons added, or removed, by the write process are tightly bound to the storage molecules As a result, charge stored in storage molecules is slower to leak away as compared to charge stored in a conventional capacitor. Once the storage molecules are written to a given oxidation state, they can be read by either voltage-mode sense amplifiers or current-mode sense amplifiers.
[00156] As shown in Figure 10, one characteristic of storage molecules is that, as a linear voltage ramp is applied to molecular storage device 801, the current magnitude will vary distinctively as the oxidation state of the storage molecules changes and charge is thereby removed from or absorbed by the molecules. Each peak in the current-voltage curve shown in Figure 10 corresponds to a particular transition between specific oxidation states. If the storage molecules are already in a particular oxidation state, little or no current will pass when a "read voltage" that would otherwise result in a transition to that particular state is applied to the device. For example, the molecular storage device 801 can be read by applying zero volts between the counter electrode (e.g., I l l, 309, 411, or 511) and the working electrode (e.g., 103, 301, 403, or 502) and measuring the amount of charge produced. A relatively large amount of charge (i.e., the current integrated over time) indicates a second logic state (e.g., State 2 in Figure 10); a relatively low amount of charge indicates a first logic state (e.g., State 1 in Figure 10); and little or no charge indicates the fully reduced state (e.g., State 0 in Figure 10). Thus, by applying a known potential to the device and evaluating the sign and total quantity of charge removed from or absorbed by the molecules, the original oxidation state of the molecules can be uniquely discerned. Similarly, the oxidation state of the storage molecules after a write is determined by the magnitude of the write voltage coupled to the bit line 609.
[00157] This reading methodology is partially or wholly destructive in that application of a potential during reading will alter the oxidation state of at least some storage molecules in molecular storage device 801. Accordingly, in some embodiments, a read operation is followed by a write back to the molecular storage device 801 to restore the oxidation state of the storage molecules.
[00158] Figure 12 depicts an exemplary current- voltage voltammogram curve for a storage molecule having multiple distinct oxidation states. Each oxidation state is indicated by a peak in the curve. Molecular storage offers expansion in information density because storage molecules can be designed with a number of distinct oxidation states, hi this way, the information density of a memory array increases. By implementing read/write logic, sense amplification mechanisms and the like that support molecular storage, these multiple oxidation states can be put to use in practical memory devices.
[00161] In Figure 14a, the cell current (ICELL) is coupled to an integrator 1401. Cell current may be directly from a bit line 609, or may instead be pre-amplified. A pre-amplifier may be included within the integrator 1401 or provided separately. The integrator 1401 develops an analog signal indicative of the oxidation state of the molecular memory cell. Logic encoder 1403 receives the analog signal from the integrator and maps it to logic signals, which may include level shifting, inverting, or processing with other combinatorial logic to meet the needs of a particular application.
[00165] In this embodiment, a nine bit row address is supplied by an external device on the RA input to row pre-decoder 1503'. Row pre-decoder 1503' partially decodes the row address and supplies the partially decoded output to each of row decoders 1503. A row decoder 1503 is supplied for each bank whereas the row pre-decoder 1503' is typically shared amongst all of the banks. Row pre-decoder 1503' enables row decoders 1503 to be smaller and generally faster because they are processing addresses that are partially decoded. In the particular embodiment of Figure 15, row decoders 1503 include word line driver circuitry for each word line. Column addresses are provided to the CA input pin to a column address pre-decoder 1505'. Column address pre-decoder 1505' supplies pre-decoded addresses to column decoder 1505, which generates the completely decoded column addresses.
[00166] In this embodiment, each molecular memory array 1501 includes 512 word lines 1507. A particular bank is selected for reading and/or writing by an appropriate signal placed on one of the DBLA lines shown in the upper portion of Figure 15, which activates the bit line addressed by the column decoder 1505. A bit line reference voltage VBLREF is supplied to each of the sense amplifier modules 1511. The bit line reference voltage can be used for voltage-mode sense amplification, or used to drive serial or parallel current-mode sense amplification.
[00168] In this embodiment, data buffers 1503 serve to drive data signals onto bit lines during write operations, and to read data signals from bit lines during read operations. Logic encoder 1405 for encoding multiple bits of data may be included in data buffer module 1503. Write data is received on the Do inputs and read data output is placed on the Q-Q outputs. Although the implementation of Figure 15 is generalized, it is apparent that DRAM circuit techniques and functional components can be adapted to operate a molecular memory. This, in turn, permits existing circuit techniques to be leveraged into high-density molecular storage devices.
[00170] Figure 16 illustrates an integrated processing tool having multiple functional modules coupled by robotic substrate transport mechanisms. An integrated tool approach allows the ambient environment to be carefully monitored and regulated to control contaminant levels, humidity levels, temperature, and the like. For example, ambient conditioning unit 1605 desirably comprises dehumidification to maintain a constant low humidity level, temperature controls, and mechanical, chemical and/or electrofiltration to remove particles above about 0.1 micrometers in size. Optionally, ambient conditioning unit 1605 may use desiccants and particle agglomeration mechanisms to further improve and control ambient environmental conditions.
[00171] The configuration and arrangement of processing modules of the integrated tool 1600 in Figure 16 is for purposes of illustration only as any available tool configuration may be used. Alternatively, process modules may be provided separately in a non-integrated environment with multiple independent processing stations. A non-integrated tool may require that each of the tools be placed in a similarly controlled environment and that the transport between process locations be performed using sealed, environmentally controlled carriers.
[00174] Transport mechanism 1602 moves substrates between process modules as well as into and out of process modules. Coater 1603 comprises a spin coating module in a particular implementation, although sprayers, vapor coaters, dipping and the like may be used in particular applications. In a particular implementation of the present invention, the coater 1603 may be coupled to a supply 1604 of a solution containing active device molecules, although other mechanisms such as vapor deposition can be used to dispense the active molecules. As stated previously, the coater 1603 may be maintained in a low humidity, ultrapure environment maintained by ambient conditioning unit 1605 and ambient gasses 1606 to prevent contamination. Other equipment also lends itself to environmental control for etching operations, chemical vapor deposition processes and the like. It is desirable in many applications to provide fresh chemicals from supply 1604 for each substrate being coated. This avoids depletion of the chemicals and lowers the risks of contamination associated with reusing chemicals.
[00176] Figures 17a and 17b are schematic diagrams of top and side views, respectively, of a thermal processing unit in accordance with one embodiment of the present invention. The thermal processing unit 1700 can either be a thermal processing module 1607 in an integrated molecular attachment processing tool 1600 or it can be a separate stand-alone unit.
[00177] Thermal processing unit 1700 has an outer container 1708 that encloses a bake plate 1716 and a cool plate 1714. In some embodiments, both the bake plate 1716 and the cool plate 1714 are enclosed within an inner container 1712 to minimize leakage of air into the heating and cooling areas. The entry door 1702 is sealed (e.g., with an O-ring) and resembles a vacuum load lock to prevent air from getting into the system. In some embodiments, a gas supply system 1720 provides an inert gas stream (e.g., Ar or N2) to purge the ambient surrounding each plate. A gas monitoring and collection system 1706 typically includes water sensor 1722, oxygen sensor 1724, and a vacuum pump 1726. An external computer (e.g., 2000) controls power, temperature profiles, ambient gases, and water and oxygen monitoring. The computer also controls mechanical functions of the unit (e.g., operating entry door 1702, shuttle arms 1704, and bake shutter 1710 with computer-controlled pneumatics 1718).
[00180] Returning to the discussion of Figure 16, transfer mechanism 1602 transfers substrates from thermal processing module 1607 to rinse module 1609. Rinse module 1609 comprises a spin rinser in a particular implementation that sprays a rinsing solution from supply 1611 onto the substrate surface while the substrate spins. The rinsing solution comprises, for example, solvents such as ethers (tetrahydrofuran) or nitriles (acetonitrile) and the like. The rinsing solution is selected to remove molecules that did not chemically attach, thereby leaving the active device areas (e.g., 2401, Figure 24) populated with molecules while clearing other device areas. After rinsing, substrates may be returned to thermal processing unit 1607 for drying.
[00181] Optionally, one or more metrology modules 1613 may be included to evaluate the quality of the attached active device molecules. Metrology module 1613 may involve visual observation and qualification of processed substrates, and/or may include electrical characterization of processed substrates. Figure 18 is a schematic illustration of storage molecules with poor chemisorption to an electrode surface. As shown in Figure 18, poorly attached redox-active molecules may exhibit poor alignment, distribution, and attachment. While these features are difficult to observe visually, they are electrically apparent. Figure 19 depicts an exemplary current-voltage curve for storage molecules with poor attachment to an electrode surface. By comparison of Figure 19 with Figure 12, for example, it is apparent that poor attachment is readily detectible. Alternative metrology methods such as ellipsometry or other photonic methods to detect the presence of a well formed layer of chemisorbed species may be incorporated into the cluster tool. In many cases, this type of metrology can be used to detect process aberrations before the substrates have exited the processing tool. It may be desirable to incorporate a rework module (not shown) that will strip off the poorly attached molecules and reactivate the surface of the active areas (e.g., 2401) of a malformed substrate. In this manner, unacceptable process variations and failures can be detected and corrected automatically or semi-automatically before the substrates have been removed from the processing tool.
[00187] Figure 21 illustrates an electrolyte processing tool 2100 that would typically be used subsequent to the attachment tool 1600. Alternatively, the electrolyte processing tool 2100 can be integrated with the attachment tool 1600 or coupled to the attachment tool 1600 so that substrates can be automatically transferred (e.g., by robotic transfer mechanisms) between the tools. In some embodiments, electrolyte formation involves application of a conformal layer of electrolyte solution or gel to cover the active device molecules. The electrolyte supply 2104 is maintained in an environmentally controlled storage container so that it can be delivered through coater 2103 with consistent temperature, concentration and uniformity. Example materials that are suitable electrolyte components include polyethylene oxide, propylene carbonate, ethylene carbonate and the like. The spin speed and spin speed profile of coater 2103 are adjusted based on the viscosity and flow characteristics of the electrolyte to provide suitable coverage and final thickness of the electrolyte for a particular application. See the discussion below of Figure 25 and Table 2 for additional details regarding electrolyte materials and processing conditions.
[00188] Transfer mechanism 2102 moves substrates from coater 2103 to thermal processing module 2107, which includes, for example, hot plates, convection heating, infrared heaters, microwave heating, or other suitable controlled thermal mechanism(s) for heating and/or cooling the substrates. Thermal processing is used to drive off solvents or carrier liquids to increase the viscosity of a gel electrolyte. Thermal processing may also polymerize or partially polymerize a gel electrolyte to improve mechanical stability in certain applications. Thermal processing may be performed in the ambient atmosphere provided by ambient conditioning unit 2105, or alternatively provided by ambient process gasses supplied directly to thermal processing module 2107. A typical thermal treatment cycle would involve soaking the substrates at 65 degrees Celsius for about one minute.
[00189] Optionally, metrology unit 2113 may be used to physically, optically, or electronically characterize partially processed substrates while they remain in the protected environment of the electrolyte formation tool 2100. Tests performed by metrology unit 2113 can be similar to those performed by metrology unit 1613 described in reference to Figure 16. Integrated rework units (not shown) may be included to rework product determined to be unacceptable by metrology unit 2113.
[00190] Figure 22 is a block diagram illustrating an electrolyte processing tool control system in accordance with one embodiment of the present invention. The aspects of Figure 22 that are analogous to those in Figure 20 are not described again here. The memory 2206 in control system 2200 stores the following programs, modules and data structures, or a subset or superset thereof: • an operating system 2216, as described above;
[00200] Thus, it is valuable in both single-substrate and batch process tools to incorporate a method to recover the solution after molecular attachment to the surface and rework the solutions to make them usable for further processing on subsequent wafers. As part of this recycling effort, chemical purification methods to ensure high quality and non-competing chemical reactions to the surface of attachments have already been developed and are being scaled to required volumes for large-scale manufacturing. Thus, a simple collection strategy on these tools, such as effluent collection on the spinner single wafer tool or tank storage of used solution in the bulk process tools, can be used. The collected solutions are sent back to the laboratory for purification and re-dissolution of the molecules to the correct solution concentration. Quality assurance programs (purity, ionic strength, etc.) are used for process control and reproducibility considerations.
[00201] Figures 24a-24d illustrate a portion of a molecular electronic device at various stages of processing in accordance with one embodiment of the present invention.
[00204] In Figure 24a, an active area 2401 has been defined using micron or sub-micron scale technology such as photolithography, self-aligned etching, and the like. A first device component 2403 comprises a type of material to which active devices molecules (e.g., porphyrins) will attach in a subsequent chemisorption process. A second device component 2405 comprises a type of material to which active device molecules will not attach.
[00205] In some embodiments, the active area 2401 includes a plurality of attachment sites that are oxidized to form a thin oxide layer. This oxide layer may be a native oxide formed when the surface of material 2403 is exposed to oxygen. The oxygen atoms bond to the potential attachment sites, which will prevent or inhibit bonding of active device molecules. As shown in Figure 24b, in some embodiments, the active area 2401 is treated in a passivation process to replace some or all of the oxygen atoms with hydrogen atoms. Passivation might be accomplished by soaking substrates in a hydrogen or forming gas atmosphere at a moderate temperature for a period of time sufficient to displace the oxygen with hydrogen. In other embodiments, the thin oxide layer is maintained and molecules are subsequently attached to the thin oxide layer.
[00208] The activated surface of Figure 24c or the passivated surface of Figure 24b is coated with a solution containing the active device molecules. In a specific embodiment, the solution comprises alcohol-linked porphyrin molecules that are applied by spin coating, spray coating, vapor phase coating, or a similar process. The active area may be exposed to heat, electromagnetic energy, radiation, or other actinic energy to encourage attachment of the active device molecules.
[00209] To inhibit deactivation of the activated surface, the atmosphere of the processing environment before during and after the chemical attachment processes is carefully controlled. Although a conventional photoresist or HMDS (Hexamethyldisilazane,) spin coating tool may be used to apply the active device molecule solution, the tool is modified to enclose the workpiece in a low humidity environment that is substantially free of chemical species that would bond to attachment locations. These species include hydrogen, oxygen, most metal atoms, and water, although the particular species that must be filtered will vary in each application in a predictable manner based on the particular active device molecules and materials being used.
[00210] Figure 25 is a flowchart representing a method of making an array of molecular storage devices in accordance with one embodiment of the present invention. This method may be used, for example, to make the molecular storage devices shown in Figure 2.
[00211] Conventional BEOL semiconductor processing methods are used to form (2502) an array of working electrodes (e.g., 301) and, in some embodiments, auxiliary counter electrodes (e.g., 303) on a partially processed semiconductor wafer (e.g., a wafer that already has the transistors formed in the substrate and one or more levels of interconnect fabricated). Exemplary working electrode and/or auxiliary counter electrode materials include, without limitation, tungsten, titanium, tantalum, aluminum, doped polycrystalline or nanocrystalline silicon, copper, oxides of the foregoing elements, titanium nitride, tantalum nitride, tungsten nitride, and titanium tungsten. In addition, insulators (e.g., 319) and conductors that make electrical connections to the working electrodes (e.g., 311, 313, and 315) and, in some embodiments, to the auxiliary counter electrodes (e.g., 317) are also prepared using well-known BEOL semiconductor processing methods that need not be described in detail.
[00212] In some embodiments, chemical mechanical polishing (CMP) is used to prepare an array of smooth working electrode and auxiliary counter electrode surfaces (e.g., Figure 3a). In some embodiments, a layer of conductive material (e.g., 321) is deposited, patterned, and etched over the surface containing the working electrodes 301 and auxiliary counter electrodes 303 to create new surfaces for these electrodes that are closer together (e.g., Figure 3b).
[00215] In some embodiments, the molecules are contained in a liquid carrier solvent that is sprayed onto the wafer (e.g., using coater 1603 or a stand alone coater that is enclosed in a controlled processing ambient). The wafer is then heated to evaporate the liquid and leave the molecules on the wafer surface. Exemplary solvents include, without limitation, xylene, cyclohexanone, diglyme, tetrahydrofuran, chlorobenzene, and dichlorobenzene. Heating is typically done between 60 and 120 °C, depending on the solvent used. Exemplary processing ambients include vacuum or an inert gas such as argon or nitrogen. In some embodiments, sensors are used to monitor water and oxygen in the processing ambient. An exemplary stand¬ alone coater is a modified Brewer Science Cee 100 spin coater (www.brewerscience.com/cee/products/ceelOO.html)) that is contained in an airtight enclosure that includes water and oxygen sensors. During deposition, the ambient water concentration is typically less than 1 ppm and the ambient oxygen concentration is typically less than 1 ppm.
[00216] In some embodiments, the molecules are contained in a low boiling point solvent (e.g., xylene, cyclohexanone, diglyme, chlorobenzene, or dichlorobenzene) that is sprayed with an atomizer onto the wafer (e.g., using coater 1603 or a stand alone coater that is enclosed in a controlled processing ambient). The use of an atomizer promotes evaporation of the solvent during deposition so that little or no subsequent heating is needed to remove the solvent. An exemplary atomizer is a Spraying Systems Co. No. 1/8JJAU Air Atomizing Nozzle (e.g., see http://service.spray.com/Literature_PDFs/b553_humidification.pdf). Argon or nitrogen is typically used to produce the aerosol. Control of the processing ambient during aerosol deposition is the same as that described above for spray deposition.
[00219] The active device molecules (e.g., 305) are chemically attached (2508) to the electrode surfaces (e.g., 301 and 303).
[00227] After deposition, the wafer is heated (e.g., in thermal processing unit 2107 or in a stand-alone unit 1700) in a controlled environment (e.g., with less than 1 ppm water and less than 1 ppm oxygen) to remove the solvent. A wide variety of heat sources can be used, including, without limitation, a hot plate, an oven, an IR heat lamp (e.g., in the coater), and a microwave oven. Table 2 provides exemplary electrolytes and processing conditions.
[00231] Many techniques can be used to deposit the counter electrode, including, without limitation, physical vapor deposition (sputtering), chemical vapor deposition, plasma-enhanced chemical vapor deposition, and thermal or electron beam evaporation. However, whichever deposition technique is used, the amount of radiation and other energy incident on the wafer should be reduced, particularly ultraviolet radiation. Such radiation may be strongly absorbed by the storage molecules, wήicή, in turn, may induce unwanted reactions and/or decomposition of the molecules. Deposition techniques like sputtering and plasma-enhanced CVD generate radiation at the excitation wavelengths of the carrier gas molecules used to support the plasma. These wavelengths are specific to the gas used, and each gas (e.g., Ar, Kr5 Xe, and He) has a distinct spectrum. These deposition techniques typically use Ar as the carrier gas. When ionized, Ar emits ultraviolet radiation at wavelengths that can damage the molecules. One way to reduce or eliminate this damaging radiation is to use other gases, such as xenon, that emit radiation at wavelengths that are not as strongly absorbed by the molecules. The amount of potentially harmful energy deposited on the wafer during deposition can also be reduced by: protecting the wafer(s) with a shutter when the sputtering targets are being cleaned with a plasma; using low deposition rates; and cooling the wafers.
[00233] Figure 26 is a flowchart and Figures 27a-27i are schematic cross sections illustrating a method of making molecular storage devices with auxiliary counter electrodes in accordance with one embodiment of the present invention. Processing steps analogous to those already described will not be described in detail again here.
[00234] Working electrode 2703 is formed (2602) over conductive vias and/or plugs 2701 that reach down through passivation and planarization layers (e.g., 2702) to make electrical contact with an access transistor (803) or other active device. In some embodiments, the working electrode 2703 is formed by depositing, patterning and etching a conductive film over the plugs 2701 and 2700 and insulating layers 2702, which have been previously made by conventional BEOL processing (Figure 27a). A portion 2704 of the conductive film can also be used to make an electrical connection for biasing the auxiliary counter electrode 2707 (not present in Figure 27a).
[00239] Redox-active molecules 2709 are deposited and chemically attached (2606) to the working electrode 2703 and the auxiliary counter electrode 2707, thereby electrically coupling the molecules 2709 to the electrodes (Figure 27f). In some embodiments, a selective chemisorption process is used to attach the molecules 2709 to the working electrode 2703 and the auxiliary counter electrode 2707. In some embodiments, the molecules 2709 form one or more layers of chemisorbed species on the working electrode 2703 and the auxiliary counter electrode 2707. In some embodiments, the molecules 2709 form SAMs on the working electrode 2703 and the auxiliary counter electrode 2707. In some embodiments, the molecules 2709 electrically coupled to the working electrode 2703 are the same as the molecules 2709 electrically coupled to the auxiliary counter electrode 2707. In some embodiments, the molecules 2709 electrically coupled to the working electrode 2703 are different from the molecules 2709 electrically coupled to the auxiliary counter electrode 2707.
[00240] An electrolyte 2710 is formed (2608) (Figure 27g), for example, by depositing and planarizing a layer containing an ionic conductor.
[00241] A counter electrode 2711 is formed (2610) (Figure 27h), for example, by depositing, patterning, and etching a conducting layer on top of electrolyte 2710.
[00243] There are a wide variety of suitable storage molecules for use in the present invention that are based on redox active moieties or redox active molecules. By "redox active moiety" or "redox active molecule" or "ReAM" herein is meant a moiety that is capable of being oxidized or reduced by the application of a suitable voltage.
[00244] In some embodiments, the redox active moiety has at least two or more distinguishable non-neutral oxidation states, with at least 3, 4, 5, 6, 7, 8 or higher oxidation states being useful, particularly in storing multiple bits per molecule. In some embodiments, particularly when mixtures of different ReAMs are used at each storage location, the individual ReAMs may have only a single non-neutral oxidation state, but the collection of different moieties at each location provides the multiple oxidation states for the storage density. Furthermore, in the case of ReAM polymers, the use of heteropolymers of different monomers with fewer oxidation states can also result in a plurality of oxidation states.
[00245] Alternatively, in some embodiments, storage devices with high charge densities are useful, in which multiple charges (e.g., electrons) are read at the same voltage; for example, the oxidation of the storage molecule at a particular voltage may result in the loss of 2 or 3 electrons instead of one. Thus ReAMs can be designed to have fewer oxidation states but give up more electrons at each state, leading to higher charge density on the surface.
[00246] In general, as described below, there are several types of ReAMs useful in the present invention based on polydentate proligands, including macrocyclic and non-macrocyclic moieties. A number of suitable proligands and complexes, as well as suitable substituents, are outlined in U.S. Patent Nos. 6,212,093; 6,728,129; 6,451,942; 6,777,516; 6,381,169; 6,208,553; 6,657,884; 6,272,038; 6,484,394; and U.S.S.N.s 10/040,059; 10/682,868; 10/445,977; 10/834,630; 10/135,220; 10/723,315; 10/456,321; 10/376,865; all of which are expressly incorporated by reference, in particular for the structures and descriptions thereof depicted therein.
[00248] In addition, a single ReAM may have two or more redox active subunits. For example, as shown in Figure 29 A, there are two redox active subunits, a porphyrin (shown in Figure 29 in the absence of a metal) and a ferrocene (both of which can be optionally substituted with independently selected substituents at any position, as described below and depicted in Figure 29B), usually, but optionally, attached via a linker, L. Similarly, sandwich coordination compounds are considered a single ReAM. This is to be distinguished from the case where these ReAMs are polymerized as monomers; for example, Figure 29C depicts a polymerized version of Figure 29B, wherein h is an integer of 2 or more. In addition, the metal ions/complexes of the invention may be associated with a counterion, not generally depicted herein.
[00255] As is true for the compounds outlined herein, and as will be appreciated by those in the art, each unsaturated position, whether carbon or heteroatom, can include one or more substitution groups as defined herein, depending on the desired valency of the system.
[00256] In one preferred embodiment, the redox-active molecule may be a metallocene as shown in the formula of Fig. 28A where L is a linker, M is a metal (e.g., Fe, Ru, Os, Co, Ni, Ti, Nb, Mn, Re, V, Cr, W), S1 and S2 are substituents independently selected from the group consisting of aryl, phenyl, cycloalkyl, alkyl, halogen, alkoxy, alkylthio, perfluoroalkyl, perfluoroaryl, pyridyl, cyano, thiocyanato, nitro, amino, alkylamino, acyl, sulfoxyl, sulfonyl, imido, amido, and carbamoyl.
[00265] The design of compounds with predicted redox potentials is well known to those of ordinary skill in the art. In general, the oxidation potentials of redox-active units or subunits are well known to those of skill in the art and can be looked up (see, e.g., Handbook of Electrochemistry of the Elements; Porphyrin Handbook). Moreover, in general, the effects of various substituents on the redox potentials of a molecule are generally additive. Thus, a theoretical oxidation potential can be readily predicted for any potential data storage molecule. The actual oxidation potential, particularly the oxidation potential of the information storage molecule(s) or the information storage medium can be measured according to standard methods. Typically the oxidation potential is predicted by comparison of the experimentally determined oxidation potential of a base molecule and that of a base molecule bearing one substituent in order to determine the shift in potential due to that particular substituent. The sum of such substituent-dependent potential shifts for the respective substituents then gives the predicted oxidation potential.
[00276] As a general rule, ReAMs comprising non-macrocyclic chelators are bound to metal ions to form non-macrocyclic chelate compounds, since the presence of the metal allows for multiple proligands to bind together to give multiple oxidation states.
[00282] The memory elements of the invention may also comprise polymers of the ReAMs as outlined above; for example, porphyrin polymers (including polymers of porphyrin complexes), macrocycle complex polymers, ReAMs comprising two redox active subunits, etc. can be utilized. The polymers can be homopolymers or heteropolymers, and can include any number of different mixtures (admixtures) of monomeric ReAMs, wherein "monomer" can also include ReAMs comprising two or more subunits (e.g. a sandwich coordination compound, a porphyrin derivative substituted with one or more ferrocenes, etc.). ReAM polymers are described in U.S. S.N. 10/800,147, entitled Procedure for Preparing Redox-Active Polymers on Surfaces, Bocian, Liu and Lindsey, assigned to the Regents of the University of California, which is expressly incorporated by reference in its entirety.
[00283] The configuration of the polymers on the electrode can vary. In some embodiments, the polymers are linear in the Z dimension (the direction perpendicular to the substrate surface, as is depicted in Figure 30A), and can be optionally crosslinked (Figure 30B). Branched polymers in the Z dimension are also contemplated, and can be optionally crosslinked as well. Linear polymers in the X-Y-dimension (Figure 30C), or branched and/or crosslinked polymers are also included. In addition, mixtures of polymers can be used in any of these configurations.
[00284] In some embodiments, configurations (including selection of linkers) that control orientation and spacing of the ReAMs, whether polymeric or monomeric, are preferred, as generally higher densities of the ReAMs can be achieved, as well as better electron transfer and electron transfer rates. Linker length can contribute to the rate and retention of charge
[00285] In general, the polymerization embodiments rely on the use of substitutents that will result in both attachment to the electrode surface as well as polymerization to additional ReAMs. As described in U.S.S.N. 10/800,147, entitled "Procedure for Preparing Redox-Active Polymers on Surfaces," by Bocian, Liu and Lindsey, assigned to the Regents of the University of California, there are two general methods for the synthesis of these ReAMs: "in situ" polymerization on the surface, and prepolymerization followed by addition to the surface using one or more attachment moieties, described in detail in U.S.S.N. 10/800,147, expressly incorporated by reference in its entirety, and with particular respect herein as to the "one-step" and "two-step" polymerization/attachment steps.
[00286] Many of the compounds described herein utilize substituents, generally depicted herein as "R". Suitable R groups include, but are not limited to, hydrogen, alkyl, alcohol, aryl, amino, amido, nitro, ethers, esters, aldehydes, sulfonyl, silicon moieties, halogens,cyano, acyl, sulfur containing moieties, phosphorus containing moieties, amido, imido, carbamoyl, linkers, attachment moieties and other ReAMs (e.g. subunits). It should be noted that some positions may allow two substitution groups, R and R', in which case the R and R' groups may be either the same or different, and it is generally preferred that one of the substitution groups be hydrogen.
[00291] By "amino groups" or grammatical equivalents herein is meant -NH2, -NHR and -NR2 groups, with R being as defined herein.
[00292] By "nitro group" herein is meant an -NO2 group.
[00298] By "alcohol" herein is meant -OH groups, and alkyl alcohols -ROH.
[00300] By "ethylene glycol" herein is meant a -(O-CH2-CH2)n- group, although each carbon atom of the ethylene group may also be singly or doubly substituted, i.e. -(O-CR2- CR2)n-, with R as described above. Ethylene glycol derivatives with other heteroatoms in place of oxygen (i.e. -(N-CH2-CH2)n- or -(S-CH2-CH2)n-, or with substitution groups) are also preferred.
[00301] As depicted herein, attachment moieties (depicted herein as "Z") are used to attach the ReAMs of the invention to the electrodes. "Molecules bearing an attachment group" include molecules wherein the attachment group is an intrinsic component of the molecule, molecules derivatized to add an attachment group, and molecules derivatized so they bear a linker comprising an attachment group.
[00304] Linkers are used in a variety of configurations in the present invention, including to link attachment moieties to the ReAMs of the invention, for linking together redox a active subunits of ReAMs, and in polymerization of ReAMs. Linkers are used In order to achieve fast writing and/or erasing at low voltages and a small cell size, the scaling of the linkers for use in the present invention can be optimized. Optimum linker size can be calculated theoretically (see U.S. S.N 60/473,782, hereby expressly incorporated). Alternatively linkers (and in fact, the suitability of ReAMs as well) can be evaluated empirically simply by coupling the ReAM to the surface as described herein and in the cited references, and performing voltammetry to evaluate the electrochemical properties of the attached polymer.
[00305] The foregoing description, for purpose of explanation, has been described with reference to specific embodiments. However, the illustrative discussions above are not intended to be exhaustive or to limit the invention to the precise forms disclosed. Many modifications and variations are possible in view of the above teachings. The embodiments were chosen and described in order to best explain the principles of the invention and its practical applications, to thereby enable others skilled in the art to best utilize the invention and various embodiments with various modifications as are suited to the particular use contemplated.

中文:
[0001]本申请是(A)提交于2005年1月28日的名称为“MolecularMemory Devices and Methods”的美国专利申请号11/046,518和(B)提交于2004年4月29日的名称为“Systems,Tools and Methods forProduction of Molecular Memory”的美国专利申请号10/834,630的部分继续申请,其全部内容在此引入作为参考。
[0003]半导体加工和装置设计的进步导致计算装置被掺入无穷类型的从常规的可编程计算机到通讯设备和娱乐装置的工具和设备中。不论其最终目的如何,计算装置一般都包括中央处理器(CPU)、随机存取存储器(RAM)和使CPU与RAM之间能够进行数据交换的访问与通信机构。在计算装置中,数据以信号(例如,电压、电流和光等等)的形式进行存储、通讯和处理。CPU包含逻辑处理上述信号的线路,同时存储器包含在CPU处理那些信号之前、期间和之后用于存储这些信号的线路。
[0005]当今,存储装置在单个集成电路中实现了数百兆位的存储。这些装置包括易失性存储器(例如,动态随机存储器(DRAM)和静态随机存储器(SRAM))和非易失性存储器(例如,电可擦可编程只读存储器(EEPROM)、可擦EPROM、铁电DRAM)等。存储器生产系统和工艺还持续推动了精细几何布图和制作工艺的限度。
[0006]计算装置存储器部件的性能已经成为决定总体系统性能的愈加重要的因素。更大容量的存储器使得更多种类的应用和功能能够通过计算装置得到实现,并且可以降低或者消除对分离的大量存储装置的需求。更高的存储速度保证了更高的CPU处理频率,使得计算装置更适用于复杂的任务或者实时任务。密集的储存装置支撑着增多种类的电池供电电子装置,比如便携式计算机、PDA和多功能移动电话等。同时,许多上述应用都受益于降低的能量消耗。
[0007]在多种情形中,半导体加工工艺的改进导致能够制造更密集、更大、更快和更高能量效率的储存装置。在多种情形中,所述装置的固态电子性能由于所述装置变得更小而得到改进。不幸地,比如硅基DRAM存储器的常规内存已经达到了临界点,常规半导体存储器单元尺寸的继续降低预计将会不利地影响一些重要参数和不合意地增加成本。
[0008]在较小尺寸时速度降低和能量消耗增加的原因之一是存储单元通常要为每个存储信息单位提供电容器。电容器是由导电板形成的电荷存储装置,所述导电板通过绝缘体隔开。当电容器较小时,其能够存储的电荷数量也会降低。为了在存储单元中充当可靠的存储装置,电容器需要具有容纳一定水平的信号的充分容量,该水平的信号可以被可靠地检测为数据。此外,常规的电容器会随时间经连接到每个存储位置的开关或者晶体管而损失它们存储的电荷。晶体管是固有地具有“渗漏”作用的装置,一些存储在电容器中的电荷随时间将会被消散或者泄漏。基于较小电容器的存储单元对渗漏问题更为敏感,因为它们仅仅具有较少的在存储数据不可恢复之前可以失去的电荷。这还会导致它们的可靠性降低。
[0009]为了克服电容存储的瞬时性质,存储装置可以利用通常读出存储信号、将其放大至较高水平和将其存储回电容器的更新电路。由于分配给电容器的物理面积被降低,因此在较小可用面积时愈加难以保持相同的电荷存储容量。除非与降低存储容量相联系的渗漏可以得到降低,否则必须增加电容器的更新频率。然而,较高的电容器刷新速率将会降低存储单元用于读取和写入数据的时间百分比。此外,此时存储器总能量消耗中更高的百分比部分将用于刷新存储器。即使当所述装置处于休眠状态或者待用状态时,常规的DRAM也需要持续刷新,由此将持续进行能量消耗。据此,研究人员开始积极寻求克服常规的基于电容器的存储单元中与较小的平版印刷特征和复杂的电容器几何结构相联系的问题的存储数据信号的新方法。
[0010]存储单元设计者试图通过提高可以在定量基片面积中形成的容量值,在较小的存储单元中保持低刷新速率。提高电容量通常包括增加电容器的电荷容纳材料的表面积,但是当电容器的总体尺寸被缩小时这是很难实现的。虽然设计者通过将电荷容纳材料形成为三维槽和叠层电容器设计,在控制表面积上取得了某些成功,但是为了在较小的单元中形成充分的电容量,仅仅这些技术未必可靠。当各种单元零件的尺寸变小时,预期基于单元性能的固体电子元件的行为开始衰减,使得电容器不能再存储充分的电荷达充分的时间,以满足存储单元的应用需要。
[0012]分子在电子装置(比如开关、电容器和导体等等)中能否得到广泛应用取决于连接化学过程和以合理生产率和成本实现高产率的工艺的开发。然而,迄今为止,设备供应商和工具开发设计者都没有开发出用于应用连接化学的有效工具和工艺,其中所述化学过程可以用于分子电子装置的制造中。对于广泛应用,分子级部件需要能够将期望的化学物质连接到基质、其它装置结构以及彼此连接的可重复工艺。此外,为了使新型部件(例如,用于电荷存储的微米或者亚微米尺寸的电化学电池)能够与半导体部件结合起来,需要形成分子结构的稳固工艺。
[0013]对于分子装置制造工艺,可以合意地使其与现有半导体工业工艺兼容,并且可以合意地应用现有半导体工业工具或者其改进。然而,分子装置工艺对于多种对半导体加工具有不同影响的变量和条件都是灵敏的。例如,在差不多整个半导体制造工艺中,水作为清洗液并且以环境湿度的形式存在。然而,由于水分子妨碍连接化学或者破坏活性分子,因此水会对一些分子工艺具有破坏性作用。类似地,在半导体加工工艺中,稀薄的自然形成的氧化层和极低的杂质含量也是可以容忍的,因为这些异常特征的总作用与总体设备功能相比是极小的。相比之下,当装置采用分子级零件进行构造时,这些分子级缺陷会变得显著。
[0019]本发明的另一方面涉及包括一系列存储元件的存储器阵列。至少一些存储元件包括与微米或者亚微米尺寸的电化学电池相连接的开关装置。所述电化学电池包括工作电极;反电极;辅助反电极;连接工作电极、反电极和辅助反电极的电解质;和与至少一个电极电连接的氧化还原活性分子。
[0020]本发明的另一方面涉及计算装置,其包括与包括一系列存储元件的分子存储器相连接的中央处理器。至少一些存储元件包括与微米或者亚微米尺寸的电化学电池相连接的开关装置。所述电化学电池包括工作电极;反电极;辅助反电极;连接工作电极、反电极和辅助反电极的电解质;和与至少一个电极电连接的氧化还原活性分子。
[0021]本发明的另一方面涉及包括微米或者亚微米尺寸的电化学电池的分子存储装置。所述电化学电池包括与化学吸附的存储分子层电连接的工作电极;与化学吸附的氧化还原活性分子层电相连接的反电极;和连接所述工作电极和反电极的电解质。
[0022]本发明的另一方面涉及包括与微米或者亚微米尺寸的电化学电池相连接的开关装置的存储元件。所述电化学电池包括与化学吸附存储分子层电连接的工作电极;与化学吸附的氧化还原活性分子层电连接的反电极;和连接所述工作电极和反电极的电解质。
[0023]本发明的另一方面涉及包括一系列存储元件的存储器阵列。至少一些存储元件包括与微米或者亚微米尺寸的电化学电池相连接的开关装置。所述电化学电池包括与化学吸附存储分子层电相连接的工作电极;与化学吸附氧化还原活性分子层电相连接的反电极;和连接所述工作电极和反电极的电解质。
[0024]本发明的另一方面涉及计算装置,其包括与包括一系列存储元件的分子存储器相连接的中央处理器。至少一些存储元件包括与微米或者亚微米尺寸的电化学电池相连接的开关装置。所述电化学电池包括与化学吸附的存储分子层电相连接的工作电极;与化学吸附的氧化还原活性分子层电相连接的反电极;和连接所述工作电极和反电极的电解质。
[0029]本发明的另一方面涉及一种装置,其包括涂覆元件,它被构造成用于将氧化还原活性分子沉积在单元制造的半导体片上;包含所述涂覆元件的封闭室;一个或多个气体传感器,用于监测封闭室内的一种或多种气体;和控制系统,它管理涂覆元件的操作。
[0030]本发明的另一方面涉及一种装置,其包括加热元件,它被构造成用于使单独制造的半导体片退火至350~450°C;包含所述加热元件的封闭室;一个或多个气体传感器,用于监测封闭室内的一种或多种气体;和控制系统,它管理加热元件的操作。
[0032]本发明的另一方面涉及一种装置,其包括涂布元件,它被构造成用于将电解质沉积在单独制造的半导体片上;包含所述涂布元件的封闭室;一个或多个气体传感器,它监控封闭室内的一种或多种气体;和控制系统,它管理涂布元件的操作。
[0033]本发明的另一方面涉及一种在单独制造的半导体片上形成一系列分子存储装置的方法,通过:形成一系列工作电极;形成一个或多个用于所述系列分子存储装置的辅助反电极;将存储分子连接到工作电极上;形成一种或多种用于所述系列分子存储装置的电解质;和形成一个或多个用于所述系列分子存储装置的反电极。
[0034]本发明的另一方面涉及一种方法,其包括在第一监测的气体环境下,将氧化还原活性分子沉积在单独制造的半导体片的表面;在第二监测的气体环境下,将一些氧化还原活性分子化学连接到半导体片上的许多工作电极的表面上;将未连接的氧化还原活性分子从半导体片上除去;在半导体片上形成电解质;和将导体沉积在电解质上。
[0039]图4是根据本发明另一实施方案的分子存储装置的示意性剖面图,其中所述分子存储装置被构造成具有工作电极、反电极和辅助反电极的电化学电池。
[0040]图5为根据本发明一种实施方案的槽或者“暗沟孔”分子存储装置及其掺入存储元件组成中的示意性剖面图。
[0041]图6是掺入了分子存储器阵列的分子存储器的示意性方框图。
[0042]图7是根据本发明一种实施方案的在具有嵌入的分子存储器的芯片上的系统的示意性方框图。
[0044]图9是根据本发明一种实施方案的表示从分子存储器读取数据的方法的流程图。
[0046]图11是根据本发明一种实施方案的表示向分子存储器写入数据的方法的流程图。
[0047]图12描绘了具有多重不同氧化态的存储分子的例证性电流-电压伏安图。
[0052]图17a和17b分别为根据本发明一种实施方案的热处理单元的顶视示意图和侧视示意图。
[0054]图19表示与电极表面连接差的存储分子的例证性电流-电压曲线。
[0059]图24a~24d图解说明了在根据本发明的一种实施方案的各种加工阶段的分子电子装置的一部分。
[0065]图30a、30b和30c示意地描绘了多种聚合物构造。图30a描绘了在电极3015上,独立选择的氧化还原活性分子3000与独立选择的连接物3010的Z-方向线性聚合物,n为0或者更大的整数,优选1~8,并且连接部分未描绘出来。图30b描绘了具有交联3015的如图30a中所示的Z-方向线性聚合物。如下所述,还可以考虑枝状的具有一个或者多个分枝点的Z-方向聚合物。图30c描绘了具有多个连接部分3020的X-Y方向线性氧化还原活性分子聚合物;还考虑了包括不同氧化还原活性分子的线性聚合物的表面,同样可以使用均聚物或者杂聚物。分枝的氧化还原活性分子聚合物还可以具有任选的交联。
[0071]此外,为了彻底了解本发明,在以下说明书中阐述了许多细节。然而,很显然对于本领域熟练的技术人员而言,即使没有这些细节,本发明也可以被实践。为了防止使本发明的方面含糊不清,在此未对其它本领域熟练技术人员熟知的其它情形、方法、工艺、部件和系统进行详述。
[0076]当涉及两个或者更多个氧化态时,“不同的和可区分的”是指实体(原子、分子、聚合体、亚基等等)上的净电荷可以以至少两种状态存在。当状态之间的差异大于热能时,所述状态是“可区分的”。
[0079]术语“固定的电极”意图用来反映以下事实,相对于存储介质,电极基本上是稳定的和不可移动的。也就是说,电极和存储介质以彼此基本上固定的几何关系进行布置。应当承认,由于介质随温度变化的收缩或者由于包括电极和/或存储介质的分子构造的变化,上述相对关系会发生某些改变。尽管如此,其总体空间布置仍然基本上是恒定的。该术语意图将其中电极为可活动的“探针”(例如,写或者记录“头”、原子力显微镜(AFM)尖、扫描隧道显微镜STM尖等)的系统排除在外。
[0080]术语“工作电极”是指用于设置或者读取存储介质和/或存储分子状态的电极。
[0085]当参考存储分子(或者,更一般而言,氧化还原活性分子)和/或存储介质和电极使用时,术语“电连接”是指所述存储介质或者分子与电极之间的连接,从而使得电子从存储介质/分子移动到电极或者从电极移动到存储介质/分子,并且由此改变所述存储介质/分子的氧化态。电连接可以包括存储介质/分子和电极之间的直接共价键、间接共价连接(例如,经连接物连接)、存储介质/分子和电极之间的直接或者间接离子键或者其它键(例如,疏水键合)。此外,实际上可以不需要进行键合,和所述存储介质/分子可以简单地连接电极表面。同样,在电极和存储介质/分子之间也不必存在任何连接,电极可以充分接近于存储介质/分子,从而使得介质/分子和电极之间存在电子通道。
[0086]术语“氧化还原活性单位”、“氧化还原活性分子”(ReAM)或者“氧化还原活性亚基”是指通过施加适宜的电压,能够得到氧化或者还原的分子或者分子的组成部分。
[0088]术语“存储分子”和“记忆分子”是指可以用于存储信息的具有一种或者多种氧化态的分子(例如,包括一个或者多个氧化还原活性亚基的分子)。优选存储分子具有两种或者更多种不同的和可区分的非中性氧化态。
[0092]术语“分子存储装置”(MSD)是指包括两个或者更多个电极和电解质,同时氧化还原活性分子电连接至至少一个电极上的微米或者亚微米尺寸的电化学电池。
[0097]术语“读取”和“查询”是指确定一种或者多种存储元件的状态。
[00100]“电压电源”是任何能够向目标(例如,电极)施加电压的电源(例如,分子、装置、电路等)。
[00101]措词“集成电路的输出”是指由一个或者多个集成电路和/或一个或者多个集成电路部件产生的电压或者信号。
[00111]工作电极103可以含有,例如铝、金、银、钨或者其它可利用的导体(比如铜、铂、氮化钛或者多晶体硅)。其它适宜的材料包括:Ti、Ta、TaN和导电氧化物(例如,IrO、RuO、OsO、RhO)等或者其组合。在一些实施方案中,将工作电极103同时形成为其它结构,比如用于集成电路的接合衬垫和互相连接器。形成塞101和电极103的工艺和材料是半导体加工工业广泛利用的工艺和材料。在许多集成电路工艺中,都对金属衬垫涂覆绝缘层105,以用来保护和/或钝化工作电极103。绝缘层105可以被实施为沉积的氧化物或者氮化物等。将层105图案化,从而暴露一部分工作电极103,在某些工艺中,这可以通过以与暴露一部分集成电路接合衬垫的操作相同的操作进行。工作电极103的暴露部分被确定为用于连接存储分子的“有源区域”。在一些实施方案中,所述结构通过使用工业标准工艺流程形成氧化物105并将其图案化而得到制造。
[00112]存储分子的薄层107是在工作电极103的活性区域上形成的并且被附着和电连接至那里。在具体实施例中,层107的厚度可以为1~100纳米。在一些实施方案中,层107为化学吸附的分子层。在一些实施方案中,层107为自组装的单层(SAM)。在其它实施方案中,层107还可以通过例如选择性沉积或者其它适宜的工艺(包括原位聚合)形成,如下所述和如U.S.S.N.10/800,147中所述,其全文在此引入作为参考。分子的连接位点可以通过在如上所述的导电材料上由图案化层105以平板印刷方式限定。仅仅作为代表性实施例,被设计以与基质形成共价健(从而形成化学吸附的物质层)的具有特定连接子组件的广泛卟啉库(~150种化合物)可以作为用于层107中的可能存储分子。目前,这些分子包括许多不同的构造,包括但不限于多种构造的氧化还原部分(ReAMs)(包括单体和聚合ReAMs)、其衍生物及其聚合物,如下进一步所述。
[00117]同图1中的工作电极103一样,这些电化学电池中的工作电极201都可以被建立并且电连接在下面的半导体装置的电极或者接合垫片上。例如,导电通路和/或塞211、213、215等可以向下延伸穿过钝化层和平面化层(例如,绝缘体219),从而与存取晶体管(803,示于图8中)或者其它活性装置形成电连接。
[00118]同图1中的工作电极103相同,这些电化学电池中的工作电极201都电连接至存储分子205的薄层。在一些实施方案中,存储分子层205为化学吸附层。
[00120]此外,这些电化学电池中的反电极203与氧化还原活性分子层205电相连接。在一些实施方案中,反电极203上的氧化还原活性分子层205为化学吸附层。在一些实施方案中,反电极203与工作电极连接了相同的分子层205(例如,为化学吸附层)。在其它实施方案中,同存在于工作电极201上的氧化还原活性分子层相比,反电极203连接了不同的紧固氧化还原活性分子层(图2中未显示)。在其它实施方案中,反电极203没有连接任何氧化还原活性分子(图2中未显示),而是代之以利用反电极材料自身(例如,铜)的氧化还原化学。在图2a中,工作电极201上的化学吸附的存储分子层和反电极203上的化学吸附的氧化还原活性分子层彼此共平面,分别如工作和反电极201和203一样。
[00121]如图2b所示,在一些实施方案中,反电极203和相邻工作电极201之间的距离可以通过将导电材料层221(例如,掺杂多晶体硅、纳米晶体掺杂硅、Cu、Ti、Ta、TiN、TaN、TiW或者W)沉积、图案化和蚀刻在含有工作电极201和反电极203(例如,掺杂多晶体硅,纳米晶体掺杂硅、Cu、Ti、Ta、TiN、TaN、TiW或者W)的表面上而得到降低。然后,可以将分子205沉积、附着和电连接至材料221,这将形成工作电极201和反电极203的新表面。在此实施方案中,工作电极201上的化学吸附的存储分子层和反电极203上的化学吸附的氧化还原活性分子层仍然基本上彼此共平面,分别如工作和反电极201和203一样。
[00122]在示于图2a和图2b的两个实施方案中,工作电极201和相邻的反电极203之间的间隔通过使用的光刻法进行确定,而不是通过电解质的厚度进行确定。取决于所应用的光刻法和电解质,这些实施方案可以降低电解质207的电阻抗的影响,所述电阻抗的影响会限制工作电极201处的总体反应速度。
[00123]图3a和3b为根据本发明一种实施方案的一系列分子存储装置中分子存储装置的示意性剖面图,所述的一系列分子存储装置被构造为具有工作电极(WE)301、反电极309和一个或多个辅助反电极(ACE)303的电化学电池。
[00124]这些电化学电池中的工作电极301可以被建立并且电连接在下面的半导体装置的电极或者接合垫片上。例如,导电通路和/或塞311、313、315等可以向下延伸穿过钝化和平面化层(例如,绝缘体319),从而与存取晶体管(803,示于图8中)或者其它活性装置形成电连接。
[00125]这些电化学电池中的工作电极301都电连接在存储分子薄层305上。在一些实施方案中,存储分子层305为化学吸附层。
[00127]此外,此实施方案中的电化学电池具有一个或者多个辅助反电极303。辅助反电极303的主要目的是提高工作电极301处氧化/还原反应的速度,使其高于仅仅使用反电极309时的速度。辅助反电极303可以降低电解质307的电阻抗的影响和/或降低反电极309的电流密度,所述电阻抗和/或电流密度会限制工作电极301处的总体反应速度。辅助反电极303一般定位于比反电极309更接近工作电极301的位置。在一些实施方案中,辅助反电极303与工作电极301连接了相同的分子层305(例如,为化学吸附层)。在其它实施方案中,同存在于工作电极301上的氧化还原活性分子层相比,辅助反电极303连接了不同的紧固的氧化还原活性分子层(图3中未显示)。在其它实施方案中,辅助反电极303没有连接任何氧化还原活性分子(图3中未显示),而是代之以利用辅助反电极材料自身(例如,铜)的氧化还原化学性质。在一些实施方案中,对辅助反电极施加偏压,从而向工作电极301处的反应提供更强的电流。在一些实施方案中,施加给辅助反电极303的偏压是通过导线317(其从图3的平面伸出)提供的。
[00128]如图3b所示,在一些实施方案中,附着反电极303和相邻的工作电极301之间的距离可以通过将导电材料层321(例如,掺杂多晶体硅、纳米晶体掺杂硅、Cu、Ti、Ta、TiN、TaN、TiW或者W)沉积、图案化和蚀刻在含有工作电极301和辅助反电极303(例如,掺杂多晶体硅、纳米晶体掺杂硅、Cu、Ti、Ta、TiN、TaN、TiW或者W)的表面上而得到降低。然后,可以将分子305沉积、附着和电连接至材料321,这将形成工作电极301和辅助反电极303的新表面。
[00129]图4是根据本发明另一实施方案的分子存储装置的示意性剖面图,其中所述分子存储装置被构造成具有工作电极、反电极和辅助反电极的电化学电池。
[00130]在此实施方案中,工作电极403形成在另一导体401上。导体401是与存取晶体管或者其它活性装置形成电连接的系列导体的一部分。工作电极403和导体401周围分别环绕有绝缘体(例如,SiO2)405和402。绝缘层406(例如,SiO2)将工作电极403与辅助反电极407分离开来。导体400和404用于向辅助反电极407施加偏压。氧化还原活性分子层409(例如,化学吸附层)连接在工作电极403和辅助反电极407上。在此实施方案中,电解质410和反电极411并非为多个电化学电池所共有。相反地,每个电化学电池都具有其固有的电解质和固有的反电极。绝缘层408(例如,SiO2)用于形成容纳电解质410的槽。反电极411通过防水层412(例如,聚合物或者绝缘体,比如SiN和SiOx等)得到密封。以下根据图27对制造此实施方案的方法进行了更为详尽的描述。
[00131]示于图4中的分子存储装置实施方案提供了另一种结构,其中将一个或者多个辅助反电极407紧靠工作电极403进行放置。本领域熟练的技术人员应当理解,示于图3和4中的结构仅仅是可以将辅助反电极结合入分子存储装置电化学电池中的多种方式中的例证性结构。
[00132]图5为根据本发明一种实施方案的槽或者“暗沟孔”分子存储装置及其掺入存储单元组件中的示意性剖面图。
[00134]示于图5中的构造可以以防止金属可能沉积在分子层507上,从而防止该分子层507受到损坏的方式形成。槽的内侧形成工作电极和反电极的表面,以及分子在所述槽的内表面上形成一层或者多层化学吸附物质层。由此,通过增加槽的深度,分子数目可以得到增加。应当指出,在图5中没有按比例绘出工作电极502和反电极511的相对高度。反电极511的高度典型地大于工作电极502的高度。此外,可以通过蚀刻金属-绝缘体-金属夹层中的槽或者暗沟孔而形成工作电极502,而不是在半导体基质的大量掺杂区域中形成工作电极502。这些夹层可以沉积在半导体基质上或者半导体片的后线端(BEOL)加工期间所形成的其它表面上。各个金属层的高度决定槽的高度,由此使得所述两种电极的有效面积易于调节。因为使用的是垂直尺度,因此可以使用更多的分子。这使得给定横截面积的半导体片(该片在图5中油基质501表示)的灵敏度得到大大增强。此外,图5的设计易于以各个电极的相对尺寸实现任何变化。
[00135]在一些实施方案中,每个反电极511都连接到MOS晶体管的栅极515上,优选为p-通道MOS晶体管的栅极515上,而工作电极502连接在固定电位上,在此表示为地线515。由此,栅极517上的电压将通过分子层507的氧化态得到调节,从而分子层507的状态可以通过测量在电流开始流动处的源节点519上施加的电压,或者可替代地通过测量当固定的高电位被施加在节点519处时所流动的电流值而得到确定。当安装在完全的存储单元中时,此组件将通过向节点517施加写入电压而得到写入和通过向节点519施加试探电压得到读取,从而允许一种非破坏性的读取机制。
[00138]图6是含有分子存储器阵列601的分子存储器600的示意性方框图。在一些实施方案中,分子存储器阵列601包括2N行和2M列的陈列。2N行中的每一个都与字线607相连,同时2M列中每一个都与位线609相连。在一般应用中,字线607和位线609将彼此跨越或者交迭。字线和位线跨越的位置有时被称为“交叉”,虽然字线和位线并没有彼此连接。分子存储单元800(图8)一般位于或者定位于各个行与列的交叉点附近。分子存储器阵列601可以包括许多以满足具体应用需要的方式布置的分子存储单元800。
[00139]存储器600通过将地址接收入地址寄存器619中而得到运行,其将N-位行地址传送到行地址解码器603中和将M-位列地址传送到列地址解码器605中。行地址解码器603在一个字线607上形成信号。字线607可以包括将强电流信号驱动到字线607上的字线驱动电路615。因为字线607倾向于形成为铺设穿过大部分基片表面的长而薄的导体,因此需要将显著的电流和大功率的开关来驱动字线的信号。由此,除了为其它逻辑线路提供运转功率的电源电路(未显示)之外,线驱动电路615通常还装配有电源617。由此,字线驱动器615倾向于形成大的部件。强大电流的高速开关易于形成噪音、使电源和电源调节器的极限受迫以及使分离结构受迫。
[00140]在常规的存储器阵列中,往往存在比行(字线)数目更多的列(位线),因为在刷新操作期间,每个字线都得到活化,以刷新所有与该字线连接的存储元件。因此,行的数目越少,刷新所有行所需要的时间就越少。在一些实施方案中,可以对分子存储单元800进行装配,从而使其显示出比一般电容器显著更长的数据保持时间,长约数十、数百或者数千秒。由此,刷新循环进行的频率可以得到降低(例如,频率可以数量级的降低)或者完全省去。据此,实际上影响存储器阵列物理布局的刷新考虑事项可以得到放宽以及多种几何结构的阵列可以被实施。例如,分子存储器阵列601可以使用更多的字线607容易地得到制造,这会使得每个字线的长度更短。从而,由于以高速驱动每个字线需要较小的电流,因此可以将字线驱动电路615制造的较小或者将其消除。可替代地或者另外,较短的字线607可以被更快地驱动,从而可以提高读/写存取次数。在另一替代方案中,可以给每行存储位置装配多重字线,以提供用于在每个存储位置中存储多个信息状态的装置。
[00141]读出放大器611与每个位线609连接并且运行以检测位线609上的信号,其表明连接至位线上的存储单元800的状态并且将此状态放大为适当的逻辑电平信号。在一种实施方案中,读出放大器611可以用基本上常规的设计实现,所述常规设计将会运行用来检测和放大来自分子存储单元800的信号。另外,与常规电容器不同,一些分子存储装置提供了指示其状态的非常明显的信号。
[00142]读/写逻辑613包括用于将存储器置于读或者写状态的电路。在读取状态中,来自分子阵列601的数据被置于位线609上(有或者没有,但是典型地有读出放大器611的操作),并且通过读/写逻辑613中的缓冲器/锁存器进行捕获。在具体的读操作中,列地址解码器605将选择活性的位线609。在写操作中,读/写逻辑613将数据信号驱动到选定的位线609上,从而使得当字线得到激活时,这些数据可以覆盖已经存储到编址存储元件800中的任何数据。
[00143]刷新操作基本上与读操作相似,但是,字线607通过刷新电路(未显示)进行驱动,而不是通过外加地址进行驱动。在刷新操作中,读出放大器611(如果使用)将位线609驱动至表明存储元件800当前状态的信号电平,并且该值将自动写回存储元件800。与读操作不同,在刷新期间,位线609的状态没有与读/写逻辑613联系在一起。如果所应用的分子的电荷保留时间低于所应用的装置的使用年限(闪速存储器的使用期限为10年左右),那么仅仅需要刷新操作。
[00144]图7是根据本发明一种实施方案的在具有嵌入的分子存储器的基片(SOC)上的系统的示意性方框图。
[00145]SOC 700包括中央处理器701和分子存储器703。存储总线705将CPU 701和分子存储器703相连接,从而交换地址、数据和控制信号。任选地,SOC 700还可以包含与存储总线705相连接的常规存储器707。常规存储器707可以包括随机存取存储器(例如,DRAM、SRAM和SDRAM等)或者只读存储器(例如,ROM、EPROM和EEPROM等)。除了存储总线705之外,SOC 700可以包括存储控制器(未显示),用于将CPU 701连接至分子存储器703和其它任何包含在SOC 700内的存储装置。SOC 700可以包括一个或多个能够使CPU 701与外部装置和系统通讯的输入/输出(I/O)界面709。I/O界面709可以通过串行端口、并行端口、射频端口、光学端口和红外端口等得到实现。此外,可以对界面709进行构造,从而使其进行传送任何可用的记录(包括基于数据包的记录)。众所周知,在本领域中,SOC可以被包含在和用于多种计算装置中,这些计算装置包括但不限于便携式计算机、个人数字助理(PDAs)、手机、数码相机和摄像机和嵌入式计算机等。分子存储器600自身或者嵌入SOC 700内的分子存储器703也可以被容易地包含在和用于上述计算装置中。
[00146]图8是根据本发明一种实施方案的存储单元800的示意电路图。存储单元800类似于广泛应用的一晶体管一电容器(1T1C)的存储单元设计。然而,存储单元800的不同之处在于其使用的是分子存储装置801,而不是常规的电容器。在一些实施方案中,分子存储装置801是以一种在其中形成具有活性装置的半导体基质之后并且在该半导体基质之上形成的结构形成被实施的。在其它实施方案中,分子存储装置801是以在其中形成具有活性装置的半导体基质中的微米至纳米尺寸的孔或者槽的形式被实施的。所述分子存储装置801是使用与所述半导体基质和事先在半导体基质内形成的活性装置相兼容的处理技术进行制造。在一些实施方案中,所述分子存储装置801包括具有两个或者更多个通过电解质隔离的电极表面的电化学电池。存储分子(例如,可以用于存储信息的具有一个或多个氧化态的分子)与电化学电池内的电极表面相连接。存储分子的实例包括单体卟啉、二茂铁衍生的卟啉、三聚卟啉、卟啉聚合物或者三层构造夹层卟啉以及其它化合物。适宜的存储分子的实例将在以下进行更为详尽的描述。
[00147]图9是根据本发明一种实施方案的表示从分子存储器读取数据的方法的流程图。
[00148]当字线607被激活时,存取晶体管803就处于导电状态,从而将分子存储装置801连接(902)至其相应的位线609。在多数情形中,由分子存储装置801产生的信号并不足以驱动常规的逻辑装置。读出放大器805检测由分子存储装置801产生的信号并且将该信号放大至适当的逻辑电平(即,与其它系统逻辑相适合的信号)。例如,使用卟啉存储分子时,可以构造具有稳定氧化态的分子存储装置,氧化态为+0.55V、+0.48V、+0.39V、+0.17V、-0.05V和-0.18V(相对于Ag/Ag+)。在给定的实施方案中,可以提供更高或者更低的稳定氧化态。通过向位线609施加适当的电压,同时活化适当的字线607,可以将存储分子置于这些氧化态中的一种选定的氧化态。一旦分子存储装置处于期望的氧化态,在特定的实施方案中,就可以将此氧化态保持数十秒、数百秒、数千秒或者无穷长时间。
[00149]在读取期间,字线607被活化,和分子存储装置801将位线609驱动至表明其氧化态的电压。在一些实施方案中,将位线预加压至预定的电位,然后将其连接至电化学电池,并且对表现电化学电池中存储分子氧化态的电位变化进行监控(904)。这以与常规存储器中读操作非常类似的方式进行。当存取晶体管803得到激活(即,处于导电状态,形成闭合电路)时,分子存储装置(MSD)801将连接位线609。例如,如果位线被预加压至比分子氧化电位更负的值(相对于MSD或者反电极的顶部金属),并且当分子处于氧化状态时,电流将从分子流动至位线(以及电子从位线流动至分子)。这将导致在位线上产生电荷积聚,其中电荷数量通过MSD中的分子数目和各个分子的氧化态进行确定(Q=nFN,法拉第定律)。上述电荷的出现将改变位线609上的电压(V=Q/C),以及此电压的改变可以通过电压信号读出放大器进行识别,如本领域所通用的。
[00151]分子存储装置801的一个优点在于,通过选择存储分子,分子存储可以适于在各个位置存储多位数据。图10是表示三态(两个氧化态加上基态)单体卟啉存储分子的伏安特性的例证性循环伏安曲线。峰值和谷值对应于可以用于存储信息的不同氧化态。在图10的实施例中,两个峰值(加上未氧化态)对应于三个不同态,因此分子存储装置801能够存储三态信息。每个氧化态都可以得到顺序地依次设置或者写入。在0V时读取的电荷数量反映了氧化的状态的数目,其随后可以被转化为写入的位图。
[00152]图11是根据本发明一种实施方案的表示向分子存储器写入的方法的流程图。
[00153]为了将状态写入分子存储装置801中,将位线609连接(1102)至分子存储装置801和将电压施加(1104)给位线609,从而形成存储分子的期望氧化态。一般,施加给位线609的电压要比用于MSD801中的分子的E1/2正一些,以用于补偿写入电路中的阻抗和电容损失。与写入电路相关的损失是可测量的并且为常量,因此可以容易地得到补偿。
[00154]在图10的具体实施例中,由水平轴表示的偏压电位表示工作电极相对于反(或者参比)电极(例如,111、309、411或者511)外加电位的电位,其使得在反电极处发生特定反应。由此,曲线沿水平轴的定位由发生在反电极处的电化学反应决定。该参比电压由化学平衡电位确定,通常如能斯特方程所表示。通常将此电位定义为0V,所有的电压都参比于该电位。应当指出,反电极和电解质的化学组成决定着该电压,并且该电压可以在宽调节范围内进行调节(例如,通过选择反电极处的反应物和反应物的浓度进行调节)。在图10的实施例中,工作电极上500mV信号(如上所定义)不足以引起第一分离的氧化态的氧化,然而800mv信号足以引起第一分离氧化态的氧化。为了将第二态写入相同的存储装置801,将工作电极(例如,111、309、411或者511)上的偏压电位设置为1100mV或者更高。800mV信号不足以引起第二分离的氧化态的氧化,然而1100mV信号足以引起第二分离的氧化态的氧化。由此,第一和第二字节可以得到顺序写入。
[00155]在写操作之后,所示存储分子倾向于保持它们的氧化态。实质上,通过写过程得到或者失去的电子都紧密键合在存储分子上。因此,同存储在常规电容器内的电荷相比,存储在存储分子内的电荷的渗漏速度将会降低。一旦存储分子被写入至给定氧化态,那么它们就可以通过电压式读出放大器或者电流式读出放大器进行读取。
[00156]如图10所示,存储分子的一个特征在于,当将线性电压降施加给分子存储装置801时,由于存储分子氧化态发生变化,电流值将会不同,并且电荷将由此从分子上失去或者被吸附到分子上。在示于图10中的电流-电压曲线中,每个峰值都对应于具体氧化态之间的一个具体跃迁。如果存储分子已经位于具体的氧化态,那么当将在另外情形下会导致向此具体氧化态跃迁的“读取电压”施加于该装置时,将几乎没有电流通过。例如,分子存储装置801可以通过在反电极(例如,111、309、411或者511)和工作电极(例如,103、301、403或者502)之间施加0伏电压和测量产生的电荷量而得到读取。相对大量的电荷(即,电流随时间的累积)表示第二逻辑状态(例如,图10中状态2);相对少量的电荷表示第一逻辑状态(例如,图10中状态1);和几乎没有电荷表示完全还原态(例如,图10中状态0)。由此,通过向装置施加已知的电位并且评估信号和从分子上除去或者被分子吸收的电荷总量,分子的初始氧化态可以得到唯一地识别。类似地,在写操作之后存储分子的氧化态由与位线609相连的写入电压的大小确定。
[00157]这种读取方法是部分地或者完全地破坏性的,原因在于在读取期间施加电势将改变分子存储装置801中至少一部分存储分子的氧化态。据此,在一些实施方案中,在读操作之后写回到分子存储装置801,从而恢复存储分子的氧化态。
[00158]图12表明了具有多重不同氧化态的存储分子的例证性电流-电压伏安曲线。各个氧化态由曲线中的一个峰表示。因为可以将存储分子设计成具有许多不同的氧化态,因此分子存储提供了扩大的信息密度,由此,存储器阵列的信息密度可以得到提高。通过提供读/写逻辑、支持分子存储的读出放大装置等,这些多重氧化态可以用于现实存储装置中。
[00161]在图14a中,电池电流(ICELL)与积分器1401相连接。电池电流可以直接来自于位线609,或者可以代之以被预放大。预放大器可以包括在积分器1401中或者单独进行提供。积分器1401发展了指示分子存储单元的氧化态的模拟信号。逻辑编码器1403接收来自积分器的模拟信号并且将其映射为逻辑信号,其可以包括平移、翻转或者用其它的组合逻辑进行处理,从而满足具体应用的需要。
[00165]在此实施方案中,九字节行地址被RA上的外部装置提供给行预解码器1503′。行预解码器1503′部分地解码行地址,并且将部分解码的行地址输出到各个行解码器1503。为每组提供了行解码器1503,然而行预解码器1503′一般为所有组共用。由于行预解码器1503′的存在,使得行解码器1503较小并且通常速度较快,因为它们处理的是部分得到解码的地址。在图15的具体实施方案中,行解码器包括各个字线的字线驱动电路。列地址被提供至CA引出线,从而提供至列地址预解码器1505′。列地址预解码器1505′向列解码器1505提供预解码的地址,列解码器1505产生完全解码的列地址。
[00166]在此实施方案中,每个分子存储器阵列1501都包括512个字线1507。通过位于一个示于图15上部的DBLA线上的适当信号,对用于读和/或写的具体组进行选择,所述信号激活通过列译码器1505编址的位线。将位线参比电压VBLREF提供给每个读出放大器模块1511。位线参比电压可以用于电压式读出放大或者用于驱动串联或者并联的电流式读出放大。
[00168]在此实施方案中,数据缓冲器1503用于在写操作期间将数据信号驱动到位线上,和用于在读操作期间从位线上读取数据信号。用于编码多位数据的逻辑编码器1405可以包括在数据缓冲器模块1503中。在D输入端接收写入数据并且读出数据输出端位于Q-Q输出端。虽然图15的设备是笼统性的,但是显然DRAM电路技术和功能组件可以适用于操作分子存储器。这反过来也使得现有电路技术可以被传动到高密分子存储装置。
[00170]图16图解说明了具有通过机械基质传送机构连接的多功能组件的集成处理工具。集成工具方法需要对周围环境进行小心地监控和调节,从而控制杂质含量、湿度和温度等。例如,环境调节元件1605期望地包括去湿作用(从而保持恒定低湿度)、温度控制、和机械、化学和/或电滤作用(从而除去大小在约0.1微米以上的颗粒)。任选地,环境调节元件1605可以使用干燥剂和颗粒团聚机构,从而进一步改良和控制周围的环境条件。
[00171]图16中的集成工具1600处理模块的构造和布置仅仅是用于例证性地说明的目的进行提供,可以使用任何可用的工具构造。另外,工艺模块可以单独地提供于具有多个独立处理站位的非集成环境中。非集成工具会要求每个工具都处于类似控制的条件下,并且各工艺位置之间的传送需要使用密封、环境控制载体进行。
[00174]传送机构1602在工艺模块之间移动基质,以及将其移入和移出工艺模块。在具体设备中涂布器1603包括旋涂模块,在具体应用中还可以使用喷雾器、蒸气涂布器和浸渍器等。在本发明的具体设备中,涂布器1603可以连接在含有活性装置分子的溶液供给源1604上,虽然其它装置(比如汽相淀积)也可以用于分配活性分子。如先前所述,可以将涂布器1603保持在通过环境调节单元1605和周围气体1606保持的低湿度、超纯环境中,从而防止其受到污染。其它设备同样有助于浸蚀操作和化学蒸汽淀积工艺等的环境保护。在多种应用中,可以合宜地由供给源1604向各个进行涂覆的基质提供新鲜化学品。这可以避免化学品的损耗和降低与重复利用化学品相联系的污染危险。
[00176]图17a和17b分别为根据本发明一种实施方案的热处理单元的顶视示意图和侧视示意图。热处理单元1700或者可以为集成分子附着处理工具1600中的热处理模块1607,或者其可以为分离的独立单元。
[00177]热处理单元1700具有包括烘烤板1716和冷却板1714的外部容器1708。在一些实施方案中,烘烤板1716和冷却板1714都被围入内部容器1712中,从而使泄漏入加热和冷却区域的空气最少。入口门1702被密封(例如,用O形环密封)并且其类似于真空负载锁,从而防止空气进入该系统之中。在一些实施方案中,供气系统1720提供惰性气体流(例如,Ar或者N2)以清除每个板周围的气体环境。气体监控和收集系统1706一般包括水传感器1722、氧传感器1724和真空泵1726。外置电脑(例如,2000)控制能量、温度分布、周围气体和水以及氧气的监控。所述电脑还控制该单元的机械功能(例如,用计算机控制的气动装置1718操作入口门1702、穿梭支臂1704和烘烤闸板1710)。
[00180]返回图16的讨论中,传送机构1602将基质从热处理模块1607运送到清洗模块1609。清洗模块1609将自旋清洗器安装在具体设备中,当基质自旋时,该设备将清洗液从供给源1611喷雾至基质表面。所述清洗液包括,例如,比如醚(四氢呋喃)或者腈(乙腈)等的溶剂。对清洗液进行选择,从而将未能化学连接的分子除去,由此将留下聚集了分子的活性装置区域(例如,图24中2401),同时清除其它装置区域。在清洗之后,可以将基质返回到热处理单元1607以进行干燥。
[00181]任选地可以将一个或者多个测量学模块1613加入其中,从而测定附着的活性装置分子的数量。测量模块1613可以包括对处理基质的直观观察和鉴定,和/或可以包括对处理的基质的电学表征。图18是不良吸附到电极表面的存储分子的示意图。如图18所示,不良连接的氧化还原活性分子可以显示出不良排列、分布和连接。虽然这些特征难以进行视觉观察,但是它们在电学检测中是明显的。图19表示不良连接到电极表面的存储分子的例证性电流-电压曲线。通过对比图19和图12,例如,很显然不良连接可以被容易地发现。可以将其它测量学方法(比如椭圆偏光法或者其它检测存在良好形成的化学吸附物质层的光学方法)结合到群集工具中。在多种情形中,在基质离开处理工具之前,这类测量学方法可以用于检测工艺偏差。可以合宜地包含再制模块(未显示),该模块将剥离不良附着的分子并且再激活残缺基质活性区域(例如,2401)的表面。按照如此方式,在基质被从处理工具上除去之前,不合格的工艺变化和故障可以得到检测和自动更正或者半自动更正。
[00187]图21图解说明了一般用于附着工具1600之后的电解质处理工具2100。另外,所述电解质处理工具2100可以与附着工具1600结合起来或者连接至附着工具1600上,从而使得基质可以在所述工具之间得到自动传送(例如,通过机械传送机构)。在一些实施方案中,电解质的形成涉及应用电解质溶液或者凝胶共形层以覆盖活性装置分子。电解质源2104被保持在环境控制的存储容器中,从而使得电解质可以以稳定的温度、浓度和均匀性递送穿过涂布器2103。适宜的电解质组分的实例物质包括聚环氧乙烷、碳酸亚丙基酯和碳酸亚乙基酯等。基于电解质的粘度和流动特性,对涂布器2103的自旋速度和自旋速度分布图进行调节,从而提供用于具体应用的电解质的适宜覆盖厚度和最终厚度。关于电解质材料和处理条件的额外的细节,参见以下图25和表2所述。
[00188]传送结构2102将基质从涂布器2103移动到热处理模块2107,所述热处理模块2107包括,例如加热板、对流加热、红外加热器、微波加热或者其它用于加热和/或冷却基质的适宜控制加热装置。热处理用于分离溶剂或者载液,从而增加凝胶电解质的粘度。热处理还可以聚合或者部分聚合凝胶电解质,从而改良在某些应用中的机械稳定性。热处理可以在由环境调节单元2105提供的环境气氛中进行,或者由直接提供给热处理模块2107的环境处理气体提供的环境气氛中进行。一般的热处理循环包括在65摄氏度下将基质浸泡约一分钟。
[00189]任选地可以使用测量学单元2114来以物理、视觉或者电子方式表征部分处理的基质,同时这些基质仍然保持在电解质形成工具2100的保护环境中。通过测量学单元2113进行的测试可以以类似于根据图16所述的通过测量学单元1613进行的那些测试。可以包含有集成的再制单元(未显示),从而再制通过测量学单元2113确定的不合格的产品。
[00190]图22是说明根据本发明一种实施方案的电解质处理工具控制系统的方框图。对图22类似于图20的那些方面,在此没有进行描述。在控制系统2200中存储器2206存储以下程序、模块和数据结构,或者其亚集或者超集:
[00200]由此,在单基质和批处理工具中都包含在分子附着到表面之后回收溶液和再制溶液使得它们可以用于随后基片的其它处理工艺中的方法是很有价值的。作为此循环研究的一部分,确保高质量的化学提纯方法和与附着表面进行的非竞争性化学反应已经得到了研究,并且正在按照大规模生产所需的容积进行调节。由此,可以对这些工具应用简单组合的策略,比如在旋转器单片工具上收集废液或者将已经应用的溶液槽储在大体积处理工具中。将收集的溶液返还实验室,从而将分子纯化和再溶解至恰当的溶液浓度。基于工艺控制和可重复性考虑,应用质量保证程序(纯度、离子强度等)。
[00201]图24a~24d图解说明了根据本发明一种实施方案的处于多种处理阶段的部分分子电子装置。
[00204]在图24a中,活性区域2401已经通过应用微米或者亚微米尺寸的工艺(比如照相平版印刷术、自对准蚀刻等等)得到了限定。第一装置部件2403含有一种物质,在随后的化学吸附工艺中活性装置分子(例如,卟啉)将附着在该物质上。第二装置部件2405含有一种活性装置分子将不会附着的物质。
[00205]在一些实施方案中,活性区域2401包括许多氧化形成薄氧化物层的附着位点。所述氧化物层可以是材料表面2403暴露于氧气时自然形成的氧化物。氧原子键合在潜在的附着位点,这将会防止或者抑制活性装置分子的键合。如图24b所示,在一些实施方案中,在钝化工艺中对活性区域2401进行处理,从而将一些或者全部氧原子替换为氢原子。所述钝化可以通过在适当温度下将基质放入氢气或者合成气体气氛下达一段足以将氧置换为氢的时间而得到实现。在其它实施方案中,薄氧化物层得到保持并且随后将分子附着于薄氧化层上。
[00208]图24c的激活表面或者图24b的钝化表面都涂覆有含有活性装置分子的溶液。在一种具体的实施方案中,所述溶液包括通过旋涂、喷涂、蒸气相涂覆或者类似工艺施加的醇连接的卟啉分子。可以使活性区域暴露于热、电磁能、辐射或者其它光化辐射能量,从而促使活性装置分子的附着。
[00209]为了抑制激活的表面的失活,对化学附着工艺之前、期间和之后的处理环境气氛进行小心地控制。虽然常规的光致抗蚀剂或者HMDS(六甲基二硅氮烷)旋涂工具可以用于施加活性装置分子溶液,但是可以对所述工具进行改进,从而将工件封闭在基本上不含会键合至附着位置的化学物质的低湿度环境中。所述物质包括氢气、氧气、大多数金属原子和水,不过基于所应用的具体活性装置分子和材料,在每种应用中必须被过滤的特定物质将会以可预期的方式变化。
[00210]图25是表示根据本发明一种实施方案的制造系列分子存储装置的方法流程图。这种方法可以,例如,用于制造图2中所示的分子存储装置。
[00211]将常规的BEOL半导体加工方法用于形成(2502)一系列工作电极(例如,301)和用于在一些实施方案中的在部分加工的半导体片(例如,已经具有在基质中形成的晶体管和制造了一个或者多个互连平面的基片)上形成辅助反电极(例如,303)。例证性的工作电极和/或辅助反电极材料包括但不限于,钨、钛、钽、铝、掺杂的多晶或者纳米晶体硅、铜、上述元素的氧化物、氮化钛、氮化钽、氮化钨和钛钨。此外,绝缘体(例如,319)和与工作电极(例如,311、313和315)以及在一些实施方案中与辅助反电极(例如,317)形成电连接的导体也可以应用众所周知的BEOL半导体加工方法进行制备,对该方法不必进行详述。
[00212]在一些实施方案中,将化学机械抛光(CMP)用于制备一系列的稳定的工作电极和辅助的反电极表面(例如,图3a)。在一些实施方案中,将导电材料层(例如,321)沉积、布图和蚀刻在含有工作电极301和辅助反电极303的表面之上,从而形成使得这些电极彼此更接近的新表面(例如,图3b)。
[00215]在一些实施方案中,将分子包含于喷雾至基片上的液体载体溶剂中(例如,使用涂布器1603或者密闭在受控工艺环境中的独立涂布器)。然后对所述基片进行加热,从而将液体蒸发和将分子留在基片表面上。例证性的溶剂包括但不限于,二甲苯、环己酮、二甘醇二甲醚、四氢呋喃、氯苯和二氯代苯。取决于所应用的溶剂,一般加热至60~120摄氏度。示范性的加工环境包括真空或者惰性气体(比如氩气或者氮气)。在一些实施方案中,应用传感器来监测加工环境中的水和氧气。例证性的独立涂布器是经改进的Brewer Science Cee100自旋涂布器(www.brewerscience.com/cee/products/cee100.html)),其包含在含有水传感器和氧传感器的密封壳内。在沉积期间,环境水浓度一般低于1ppm,并且环境氧浓度一般低于1ppm。
[00216]在一些实施方案中,所述分子被包含在用喷雾器喷雾至基片上(例如,使用涂布器1603或者密闭在受控工艺环境中的独立涂布器)的低沸点溶剂(例如,二甲苯、环己酮、二甘醇二甲醚、氯苯或者二氯代苯)。喷雾器的使用有助于沉积过程中溶剂的蒸发,从而随后几乎不需要加热除去溶剂。例证性的喷雾器为Spraying Systems Co.No.1/8JJAUAir Atomizing Nozzle(例如,参见http://service.spray.com/Literature_PDFs/b553_humidification.pdf)。氩气或者氮气一般用于产生气雾剂。在气雾剂沉积期间,对工艺环境的控制与如上所述的喷雾剂沉积相同。
[00219]所述活性装置分子(例如,305)都化学附着(2508)在电极表面(例如,301和303)上。
[00227]在沉积之后,在受控环境(例如,水小于1ppm和氧小于1ppm)中对基片进行加热(例如,在热处理单元2107或者在独立单元1700中),从而除去溶剂。可以使用多种加热源,包括但不限于,加热板、烘箱、IR加热灯(例如,在涂布器中)和微波炉。表2提供了例证性的电解质和加工条件。
[00231]多种工艺可以用于沉积反电极,包括但不限于物理蒸汽沉积(溅射)、化学蒸汽淀积、等离子增强的化学蒸汽淀积和热或者电子束蒸发。然而,不论应用何种沉积工艺,入射到基片上的辐射值和其它能量都应当被减少,特别是紫外辐射。上述辐射会被存储分子强烈吸收,这反过来会诱发不必要的反应和/或分子裂解。比如溅射和等离子体增强CVD的沉积工艺在用于承载等离子体的载气分子的激发波长处产生辐射。这些波长对于所应用的气体而言是特定的,并且每种气体(例如,Ar、Kr、Xe和He)都具有特征光谱。这些沉积工艺一般使用Ar作为载气。当进行离子化时,Ar发射出可以破坏分子的波长的紫外辐射。一种降低或者消除这种破坏性辐射的方法是使用发射辐射为不被分子强烈吸收的波长的其它气体,比如氙气。在沉积期间,沉积在基片上的潜在不利的能量值还可以通过以下方式降低:当溅射目标在用等离子体进行净化时,用闸板保护基片;应用低沉积速率;和冷却基片。
[00233]图26是表示根据本发明一种实施方案的制造具有辅助反电极的一系列分子存储装置的方法流程图,图27a~27i为图解说明该方法的截面示意图。所述加工步骤与上述类似,在此将不再对其进行详述。
[00234]工作电极2703在导电通孔和/或塞2701之上形成(2602),所述导电通孔和/或塞2701向下延伸穿过钝化和平面化层(例如,2702),从而与存取晶体管(803)或者其它活性装置形成电连接。在一些实施方案中,所述工作电极2703通过在塞2701和2700以及绝缘层2702之上沉积、布图和蚀刻导电薄膜而形成,所述塞2701和2700以及绝缘层2702预先通过常规BEOL工艺形成(图27a)。一部分导电薄膜2704还可以用来形成用于偏置辅助反电极2707(在图27a不存在)的电连接。
[00239]将氧化还原活性分子2709沉积和化学附着(2606)至工作电极2703和辅助反电极2707上,从而将分子2709电连接至电极(图27f)。在一些实施方案中,选择性的化学吸附工艺被用于将分子2709附着到工作电极2703和辅助反电极2707上。在一些实施方案中,分子2709在工作电极2703和辅助反电极2707上形成一层或者多层化学吸附的物质层。在一些实施方案中,分子2709在工作电极2703和辅助反电极2707上形成SAMs。在一些实施方案中,电连接至工作电极2703的分子2709与电连接至辅助反电极2707的分子2709相同。在一些实施方案中,电连接至工作电极2703的分子2709与电连接至辅助反电极2707的分子2709不同。
[00240]所述电解质2710可以通过,例如沉积并且平面化含有离子型导体的层而得到形成(2608)(图27g)。
[00241]反电极2711可以通过,例如在电解质2710顶部上沉积、布图和蚀刻导电层而得到形成(2610)(图27h)。
[00243]存在多种用于本发明的适宜的存储分子,它们都以氧化还原活性部分或者氧化还原活性分子为基础。“氧化还原部分”或者“氧化还原分子”或者“ReAM”在此是指能够通过施加适当电压被氧化或者还原的部分。
[00244]在一些实施方案中,所述氧化还原活性部分具有至少两个或者更多个可区分的非中性氧化态,具有至少3、4、5、6、7、8或者更高氧化态是有用的,特别是用于每分子存储多位。在一些实施方案中,特别是在每个存储位置使用不同ReAMs的混合物时,单个ReAMs可以仅仅具有单个非中性氧化态,但是在各个位置处不同部分的集合提供了用于所述存储密度的多重氧化态。此外,在ReAM聚合物的情形中,应用具有少量氧化态的不同单体的杂聚物也可以导致产生许多氧化态。
[00245]另外,在一些实施方案中,使用了高电荷密度的存储装置,其中多个电荷(例如,电子)在相同电压下被读取;例如,在特定电压下氧化存储分子可以导致其失去2个或者3个电子,而不是1个电子。由此,可以对ReAMs进行设计,使其具有较少氧化态,但是在每个氧化态上需要失去更多个电子,从而产生更大的表面电荷密度。
[00246]通常,如下所述,存在几种可用于本发明的基于多齿前配体的ReAMs,包括大环和非大环部分。许多适宜的前配体和配合物以及适宜的取代基都公开于以下文献中:美国专利6,212,093;6,728,129;6,451,942;6,777,516;6,381,169;6,208,553;6,657,884;6,272,038;6,484,394;和U.S.S.N.s 10/040,059;10/682,868;10/445,977;10/834,630;10/135,220;10/723,315;10/456,321;10/376,865;其全部内容在此引入作为参考,尤其是其中所表明的结构及其说明。
[00248]此外,单个ReAM可以具有两个或者更多个氧化还原活性亚基。例如,如图29A所示,其中存在两个氧化还原活性亚基,卟啉(示于图29中,不存在金属)和二茂铁(它们都可以任选地被独立选择的取代基在任何位置取代,如下所述并且描绘在图29B中),通常但是任选地,它们经连接物L进行连接。类似地,可以将夹层配位化合物看作是单个ReAM。这与由单体聚合的ReAMs的情形不同;例如,图29C表明了图29B的聚合形式,其中h为2或者更大的整数。此外,本发明的金属离子/配合物可以连接有平衡离子,在此通常未描绘。
[00255]对于在此所述的化合物确定的以及本领域技术人员应当理解的是,取决于所述系统的期望原子价,每个不饱和位置(无论是碳或者杂原子)都可以包括一个或者多个在此限定的取代基。
[00256]在一种优选的实施方案中,氧化还原活性分子可以为如图28A结构式所示的茂金属,其中L为连接物,M为金属(例如,Fe、Ru、Os Co、Ni、Ti、Nb、Mn、Re、V、Cr、W),S1和S2为独立地选自以下的取代基:芳基、苯基、环烷基、烷基、卤素、烷氧基、烷硫基、全氟烷基、全氟芳基、吡啶基、氰基、氰硫基、硝基、氨基、烷基氨基、酰基、磺基、磺酰基、亚氨基、酰氨基和氨基甲酰基。
[00265]具有预期氧化还原电势的化合物的设计是本领域熟练技术人员所熟知的。通常,氧化还原活性单元或者亚基的氧化电势是本领域熟练技术人员所熟知的,并且可以对其进行查阅(参见,例如,Handbook of Electrochemistry of the Elements;PorphyrinHandbook)。此外,一般而言,多种取代基对分子氧化还原电势的影响通常是辅助性的。由此,对于任何可能的数据存储分子,其理论氧化电势可以得到轻易预测。实际氧化电势,特别是信息存储分子或者信息存储介质的氧化电势可以根据标准方法进行测量。一般氧化电势通过以下方法进行预测:比较试验确定的骨架分子的氧化电势和带有一种取代基的骨架分子的氧化电势,从而确定由于具体取代基而引起的电位漂移,对依赖于取代基的相应取代基的电位漂移进行加合,由此给出预测的氧化电势。
[00276]通常,包含非大环螯合剂的ReAMs连接到金属离子上,从而形成非大环螯合物,因此金属的存在允许多个前配体相连接,从而形成多重氧化态。
[00282]本发明存储元件还可以包括如上所述ReAMs的聚合物;例如,可以使用卟啉聚合物(包括卟啉配合物的聚合物)、大环配合物聚合物和含有两个氧化还原活性亚基的ReAMs等。所述聚合物可以为均聚物或者杂聚物,并且可以包括单体ReAMs的多种不同混合物,其中“单体”还可以包括含有两个或者更多个亚基的ReAMs(例如,夹层配位化合物、被一个或者多个二茂铁取代的卟啉衍生物等)。ReAM聚合物描述于美国申请顺序号10/800,147中,标题为Procedure forPreparing Redox-Active Polymers on Surfaces,Bocian,Liu和Lindsey,受让人为Regents of the University of California,其全部内容在此引入作为参考。
[00283]电极上聚合物的构造可以不同。在一些实施方案中,聚合物在Z方向上为线性(该方向垂直于基质表面,如图30A中所示),并且任选可以是交联的(图30B)。还可以预期Z方向上的支链聚合物,并且任选它也可以是交联的。还包括在X-Y方向(图30C)的线性聚合物或者支链聚合物和/或交联聚合物。此外,在上述任何构造中还可以应用聚合物混合物。
[00284]在一些实施方案中,优选控制ReAMs的方向和距离(不论是聚合物还是单体)的构造(包括连接物的选择),由此通常可以获得ReAMs的更高密度以及更佳电子转移和电子转移速率。连接物的长度可以对电荷的速率和保持有贡献。
[00285]通常,聚合作用实施方案有赖于取代基的使用,这将导致附着至电极表面以及聚合至其它ReAMs上。如美国申请顺序号10/800,147所述,其标题为"Procedure for Preparing Redox-ActivePolymers on Surfaces,"Bocian、Liu和Lindsey,受让人为Regents of theUniversity of California,存在两种合成这些ReAMs的一般方法:在表面上原位“聚合”,和预聚合,随后利用一种或者多种连接部分加成到表面上,详述于美国申请顺序号10/800,147中,其全文在此引入作为参考,并且在此特别称作为“一步”和“两步”聚合/连接步骤。
[00286]在此描述的多种化合物都带有取代基,在本文中通常表示为“R”。适宜的R基团包括但不限于,氢、烷基、醇、芳基、氨基、酰胺基、硝基、醚、酯、醛、磺酰基、硅部分、卤素、氰基、酰基、含硫部分、含磷部分、酰胺基、亚氨基、氨基甲酰基、连接物、连接部分以及其它ReAMs(例如亚基)。应当指出,一些位置上可以存在两个取代基R和R′,在这种情形中,R和R′可以相同或者不同,并且通常优选其中一个取代基为氢。
[00291]在此应用的“氨基”或者其语法等价用语是指-NH2、-NHR和-NR2基团,其中R如在此所定义。
[00292]在此应用的“硝基”是指-NO2基团。
[00298]在此应用的“醇”是指-OH基团和烷基醇-ROH。
[00300]在此应用的“乙二醇”是指-(O-CH2-CH2)n-基团,不过亚乙基的每个碳原子还可以被单取代或者双取代,即-(O-CR2-CR2)n-,其中R如上所述。还优选其它杂原子代替了氧的乙二醇衍生物(即-(N-CH2-CH2)n-或者-(S-CH2-CH2)n-,或者带有取代基)。
[00301]如本文中所述,连接部分(在此表示为“Z”)用于将本发明的ReAMs连接至电极上。“带有连接基团的分子”包括其中连接基团为分子固有组成部分的分子、与连接分子加成的衍生分子、和带有含有连接基团的连接物的衍生分子。
[00304]连接物可以用于本发明多种构造中(包括将附着部分连接至本发明ReAMs上),将ReAMs的氧化还原活性亚基相连接,以及用于ReAMs聚合反应中。为了实现在低压和小电池尺寸下的快速写和/或删除操作,应用了连接物,可以对用于本发明的连接物尺度进行最优化。最优的连接物尺寸可以通过理论计算得到(参见,U.S.S.N60/473,782,在此引入作为参考)。其它连接物(和事实上也与ReAMs相适合的连接物)可以仅仅凭经验通过以下方法进行测定,如本文以及引用的参考文献所述将ReAM连接至表面,和进行伏安测量法,从而测定连接聚合物的表面性能。
[00305]基于说明的目的,已经参考具体实施方案对上述说明书部分进行了描述。然而,上述例证性说明并非意指本发明全部内容和将本发明限制为具体公开形式。根据上述教导,可以进行多种变型和变体。为了最佳说明本发明原理及其实际应用,对实施方案进行了上述选择和描述,从而使得使得本领域熟练技术人员能够最佳应用本发明以及具有适用于预期具体应用的多种变型的多种实施方案。