Office Action 2: Final Rejection (2025-01-31)
Rejection types: 102 - Lack of Novelty

CLAIMS:
AMENDMENTS TO THE CLAIMS:

This listing of claims will replace all prior versions, and listings, of claims in the application:

LISTING OF CLAIMS:


1\. (Currently Amended) A device for processing a pilot control signal the device comprising:
a voltage doubler;
and a comparator,
 the pilot control signal having at least two modes: a continuous mode in which the pilot control signal comprises a continuous signal or an alternating mode in which the pilot control signal comprises an alternating PWM signal, and
 the comparator outputs a binary detection signal based on an input of the pilot control signal to the voltage doubler, astate of the binary detection signal being an indication of the mode of the pilot control signal.

2\. (Previously Presented) The device as claimed in claim 1, in which the pilot control signal is as defined by the standard IEC 61851.

3\. (Previously Presented) The device as claimed in claim 1, in which the voltage doubler is a Greinacher voltage doubler.

4\. (Previously Presented) The device as claimed in claim 3, in which the Greinacher voltage doubler comprises a first capacitor, of which a first terminal is connected to an input of the voltage doubler and of the device capable of receiving the pilot control signal, a first diode, of which the anode is connected to ground (Gnd) and the cathode is connected to a second terminal of the first capacitor, a second diode, of which the anode is connected to the cathode of the first diode and the cathode is connected to an output of the voltage doubler, a second capacitor, of which a first terminal is connected to the output of the voltage doubler and a second terminal is connected to ground, and a resistor, of which a first terminal is connected to the output of the voltage doubler and a second terminal is connected to ground.

5\. (Previously Presented) The device as claimed in claim 1, in which the comparator comprises a Zener diode, of which the cathode is connected to the output of the voltage doubler and to the input of the comparator.

6\. (Currently Amended) device for processinq a pilot control signal having at least two modes: a continuous mode in which the pilot control signal comprises a continuous signal or an alternatinq mode in which the pilot control signal comprises an alternating PWM signal, and capable of generating a binary detection signal, the state of which is an indication of the mode, the device comprising:
a voltage doubler and a comparator,
 the comparator further comprising:
a Zener diode, the cathode of which is connected to the output of the voltage doubler and to the input of the comparator, and

a first transistor of NPN type, the base of which is connected to the anode of the Zener diode and the emitter is connected to ground, and a second transistor of PNP type, of the base of which is connected to the collector of the first transistor, the emitter is connected to a supply voltage and the collector is connected to the output of the comparator and of the device and generates the detection signal.

7\. (Currently Amended) An application of waking up a computer for an electric vehicle, when the electric vehicle is connected to an active charging station using a device for processing a pilot control signal having at least two modes: a continuous mode in which the pilot control signal comprises a continuous signal or an alternating mode in which the pilot control signal comprises an alternating PWM signal, and capable of generating a binary detection signal, the state of which is an indication of the mode, the device comprising a voltage doubler and a comparator.

OFFICE ACTION:
DETAILED ACTION
Response to Amendment
1.	Applicant's amendment filed on 01/23/25 has been received and entered in the case. Claims 6 and 7 are allowable over all of the prior art of record for the reasons indicated in the previous office action. However, because no arguments have been set forth by applicant against the previously applied prior art rejections based on Nakahara et al and Jinno et al, claims 1-5 remain rejected based on these two references, for the reasons set forth in the previous office action.
Claim Objections
2.	Claim 1 is objected to because of the following informalities:
On the first line of claim 1, a comma should be inserted after the word signal. Also in claim 1, the word --and-- should be inserted at the end of line 3, and note that the word and at the beginning of line 4 should be deleted.
Appropriate correction is required.
Claim Rejections - 35 USC § 102
3.	The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-4 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Nakahara et al, U.S. Patent No. 5,229,818.
As to claim 1, Nakahara et al discloses, in figure 4,
a device (the combination of the voltage doubler constituted by capacitors C4 and C5, diodes D2 and D3, and resistor R4, together with comparator 16) for processing a pilot control signal (as indicated in the previous office action, the pilot control signal is just intended use because it is not an integral component of the claimed device, i.e., the pilot control signal is just what is received by the claimed device, and therefore all of the recitations regarding the pilot control signal are similarly just intended use and as such cannot be relied upon to distinguish over Nakahara et al), the device comprising
a voltage doubler (the voltage doubler formed by the combination of capacitors C4 and C5, diodes D2 and D3, and resistor R4); and
a comparator (comparator 16),
the pilot control signal having at least two modes: a continuous mode in which the pilot control signal comprises a continuous signal or an alternating mode in which the pilot control signal comprises an alternating PWM signal (as indicated above, all of the recitations in claim 1 regarding the pilot control signal are just intended use and as such cannot be relied upon to distinguish over Nakahara et al), and
the comparator outputs a binary detection signal (note that the output of comparator 16 is a binary detection signal) based on an input of the pilot control signal to the voltage doubler (as indicated above, all of the recitations in claim 1 regarding the pilot control signal are just intended use and as such cannot be relied upon to distinguish over Nakahara et al), a state of the binary detection signal being an indication of the mode of the pilot control signal (again, all of the recitations in claim 1 regarding the pilot control signal are just intended use and as such cannot be relied upon to distinguish over Nakahara et al).
As to claim 2, as noted above, the claimed pilot control signal and any details regarding this signal are just intended use and as such cannot be relied upon to distinguish over Nakahara et al.
As to claim 3, as indicated in the previous office action, Nakahara et al's voltage doubler is a Greinacher voltage doubler.
As to claim 4, as indicated in the previous office action, the claimed first capacitor reads on capacitor C5, the claimed first diode reads on diode D3, the claimed second diode reads on diode D2, the claimed second capacitor reads on capacitor C4, and the claimed resistor reads on resistor R4.
4.	Claims 1-3 and 5 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Jinno et al, U. S. Patent Application Publication No. 2002/0008629.
As to claim 1, Jinno et al discloses, in figure 46,
a device (the combination of the voltage doubler constituted by capacitor C341, capacitor C342, diode D341 and diode D342, together with comparator N1) for processing a pilot control signal (as indicated in the previous office action, the pilot control signal is just intended use because it is not an integral component of the claimed device but rather the signal that is received by the claimed device, and therefore all of the recitations regarding the pilot control signal are similarly just intended use and as such cannot be relied upon to distinguish over Jinno et al), the device comprising
a voltage doubler (the voltage doubler formed by the combination of capacitor C341, capacitor C342, diode D341 and diode D342); and
a comparator (comparator N1),
the pilot control signal having at least two modes: a continuous mode in which the pilot control signal comprises a continuous signal or an alternating mode in which the pilot control signal comprises an alternating PWM signal (as indicated above, all of the recitations in claim 1 regarding the pilot control signal are just intended use and as such cannot be relied upon to distinguish over Jinno et al), and
the comparator outputs a binary detection signal (note that the output of comparator N1 is a binary detection signal) based on an input of the pilot control signal to the voltage doubler (as indicated above, all of the recitations in claim 1 regarding the pilot control signal are just intended use and as such cannot be relied upon to distinguish over Jinno et al), a state of the binary detection signal being an indication of the mode of the pilot control signal (as indicated above, all of the recitations in claim 1 regarding the pilot control signal are just intended use and as such cannot be relied upon to distinguish over Jinno et al).
As to claim 2, as indicated above, the claimed pilot control signal and any details regarding this signal are just intended use and as such cannot be relied upon to distinguish over Nakahara et al.
As to claim 3, as noted in the previous office action, Jinno et al's voltage doubler is a Greinacher voltage doubler.
As to claim 5, as noted in the previous office action, the cathode of zener diode D343 is connected to the output of Jinno et al's voltage doubler and to the input of the comparator N1.
Allowable Subject Matter
5.	Claims 6 and 7 are allowed.
The following is a statement of reasons for the indication of allowable subject matter: claims 6 and 7 are allowed for the reasons indicated in the previous office action.
Action is Final
6.	THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Conclusion
7.

APPLICANT REBUTTAL: REMARKS/ARGUMENTS Claims 1-7 are pending. Claims 1-5 stand rejected. Applicant acknowledges with appreciation the indication that claims 6 and 7 are allowed. In this response claim 1 is amended to address the informality objection below. No new matter is added. Objection to the Claims Claim 1 is objected to for informalities. Applicant herein amends claim 1 in accordance with the Examiner's helpful suggestions. Withdrawal of the objection is respectfully requested. Examiner's Response to Applicant's Previous Amendment and Examiner Interview Applicant acknowledges with appreciation the courtesies extended to Applicant's representative during the telephone interview of January 31, 2025. During that interview, applicant's representative pointed out that, contrary to the statement set forth in the Final Office Action at page 2, paragraph 1, applicant did indeed provide arguments against the previously applied prior art. The Examiner readily acknowledged the oversight and stated that, upon filing of a formal response to the Final Office Action, the Examiner would fully consider applicant's traversal of the 35 U.S.C. 102(a)(1) rejection of claims 1-4 as anticipated by Nakahara et al. (U.S. Patent No. 5,229,818), and the 35 U.S.C. 102(a)(1) rejection of claims 1-3 and 5 as anticipated by Jinno et al. (U.S. Patent Application Publication No. 2002/0008629). In view of Applicant's previous arguments, withdrawal of these rejections and allowance of claims 1-5 are respectfully requested. Applicant further submits that, if Applicant's previous arguments are found to be persuasive, resulting in the withdrawal of the aforementioned rejections, any new rejection(s) based on not previously applied prior art must be set forth in a Non-final Office Action. In view of the amendments and remarks set forth above, applicant submits that this application is in condition for allowance which action is respectfully requested. The Director is hereby authorized to charge any fees that may be due, and to credit any overpayment to Deposit Account No. 02-4800. Respectfully submitted, BUCHANAN INGERSOLL & ROONEY PC Date February 24, 2025 By: /Jacques L. Etkowicz/ Jacques L. Etkowicz Registration No. 41738 Customer No. 23122T 610 407 0700

NEXT OFFICE ACTION: REASONS FOR ALLOWANCE
The following is an examiner’s statement of reasons for allowance: the previous prior art rejections under 35 USC 102(a)(1) based on Nakahara et al and Jinno et al are now withdrawn by the examiner in view of applicant’s arguments set forth in the remarks filed on 01/23/25, which arguments are deemed to be persuasive by the examiner, i.e., the examiner fully agrees with applicant’s arguments regarding the claimed pilot control signal not being merely intended use, and therefore the anticipation rejections of claims 1-5 based on Nakahara et al and Jinno et al are no longer applicable against these claims.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee.  Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”

CITED REFERENCE SUMMARIES: Ref US5229818: Claims:
1. An image forming apparatus comprising:a recording member on which a latent image is formable; a charging voltage generating portion, which is positioned in contact with said recording member, for applying a charging voltage which contains a first AC component to said recording member; application means for applying a voltage, which contains a second AC component having a frequency which is different from that of said first AC component, to said recording member; a control circuit for detecting an AC output value of said charging voltage generating portion and for controlling said AC output value to a predetermined value; and `an erroneous operation preventing circuit for preventing operation of said control circuit in accordance with said second AC component.
2. An image forming apparatus according to claim 1, wherein said erroneous operation preventing circuit cuts off the frequency of said second AC component.
3. An image forming apparatus according to claim 1, wherein said application means comprises a developing unit for developing a latent image formed on said recording member, and wherein said application means applies to said recording member an electric field formed by superimposing a DC bias with an AC bias.
4. An image forming apparatus according to claim 1, wherein said charging voltage generating portion includes a charging roller.
5. An image forming apparatus according to claim 2, wherein said erroneous operation preventing circuit includes frequency characteristics capable of changing said AC output value in accordance with a change in the first AC component.
6. An image forming apparatus comprising:a recording member on which a latent image is formable; a charging voltage generating portion, which is positioned in contact with said recording member, for applying a charging voltage which contains a first AC component to said recording member, said charging voltage generating portion including an electric current value control circuit for controlling an AC current value of said charging voltage generating portion to a predetermined value; a controller by which said electrical current value control circuit is controlled in such a manner that the value of said AC current contained in said changing current is changed in accordance with a change of the first AC component; and an erroneous operation preventing circuit for preventing operation of said electric current value control circuit due to introduction of the first AC component.
7. An image forming apparatus according to claim 6, wherein said controller comprises a filter circuit having frequency characteristics capable of changing said AC current value in accordance with the change in frequency of the first AC component.
8. An image forming apparatus comprising:a recording member on which a latent image is formable; a charging voltage generating portion, which is positioned in contact with said recording member, for applying a charging voltage which contains a first AC component to said recording member, said charging voltage generating portion including an electric current value control circuit for controlling an AC current value of said charging voltage generating portion to a predetermined value; and a controller by which said electric current value control circuit is controlled in such a manner that the value of said AC current contained in said charging current is changed in accordance with a change of the first AC component, said controller comprising a frequency-voltage converter for controlling said electric current value control circuit by converting the frequency of said AC component into voltage.
9. An image forming apparatus according to claim 7, further comprising application means for applying a second AC component, having a frequency which is different from that of the first AC component, to said recording member, wherein said filter circuit has frequency characteristics capable of preventing the introduction of said second AC component into said electric current value control circuit.
10. An image forming apparatus comprising:a recording member on which a latent image is formed; a charging voltage generating portion, which is positioned in contact with said recording member, for applying a charging voltage containing a first AC component to said recording member, said charging voltage generating portion including a control circuit for detecting an AC current value of said charging voltage generating portion and for controlling said AC current value to a predetermined value; application means for applying a second AC component, having a frequency which is different from that of the first AC component, to said recording member; and control means for preventing operation of said control circuit in accordance with said second AC component and for changing said predetermined value for said AC current value in accordance with a change in the frequency of said first AC component.
11. An image forming apparatus according to claim 10, wherein said control means comprises a filter circuit for cutting the frequency of said second AC component and having frequency characteristics capable of changing said predetermined value for said AC current value in accordance with the change in said frequency.
12. An image forming apparatus according to claim 10, wherein said application means comprises a developing unit for developing a latent image formed on said recording member, and wherein said application means applies to said recording member an electric field formed by superimposing a DC bias with an AC bias.
13. An image forming apparatus according to claim 10, wherein said charging voltage generating portion includes a charging roller.