Office Action 1: Non-Final Rejection (2024-10-23)
Rejection types: 102 - Lack of Novelty, 103 - Obviousness

CLAIMS:
AMENDMENTS TO THE CLAIMS

Please amend the claims as follows:

1-11. (Canceled) 210

12\. (New) A film formation method comprising:
providing a substrate including, on a surface of the substrate, a first region in which a first material is exposed and a second region in which a second material different from the first material is exposed;
supplying, to the surface of the substrate, vapor of a solution that contains a raw material of a self-assembled monolayer and a solvent by which the raw material is dissolved, and selectively forming the self-assembled monolayer in the first region; and
forming a desired target film in the second region by using the self-assembled monolayer formed in the first region.

13\. (New) The film formation method of Claim 12, wherein the supplying the vapor of the solution to the surface of the substrate includes controlling a temperature of the substrate to be higher than a temperature of the solution.

14\. (New) The film formation method of Claim 13, wherein the supplying the vapor of the solution to the surface of the substrate includes controlling a temperature of a portion of an inner wall surface of a first processing container that is in contact with the vapor to be higher than the temperature of the solution, the first processing container accommodating the substrate.

15\. (New) The film formation method of Claim 14, wherein the supplying the vapor of the solution to the surface of the substrate includes generating the vapor inside a second processing container accommodating the solution and sending the generated vapor from the second processing container to the first processing container accommodating the substrate.

16\. (New) The film formation method of Claim 15, wherein the generating the vapor of the solution includes bubbling the solution inside the second processing container.

17\. (New) The film formation method of Claim 16, wherein the solvent contained in the solution is has a boiling point of 40 degrees C to 120 degrees C.

18\. (New) The film formation method of Claim 17, wherein a time duration during which the vapor of the solution is supplied to the surface of the substrate is 60 seconds to 300 seconds.

19\. (New) The film formation method of Claim 18, wherein the selectively forming the self- assembled monolayer in the first region includes supplying the vapor of the solution to the surface of the substrate to deposit the raw material on the surface, and removing the raw material deposited on the surface and unreacted on the surface.

20\. (New) The film formation method of Claim 19, wherein the first material in the first region is a metal or a semiconductor, wherein the second material in the second region is an insulating material, and wherein the raw material of the self-assembled monolayer is a thiol-based compound.

21\. (New) The film formation method of Claim 12, wherein the supplying the vapor of the solution to the surface of the substrate includes controlling a temperature of a portion of an inner wall surface of a first processing container that is in contact with the vapor to be higher than a temperature of the solution, the first processing container accommodating the substrate.

22\. (New) The film formation method of Claim 12, wherein the substrate is accommodated in a first processing container, wherein the supplying the vapor of the solution to the surface of the substrate includes generating the vapor inside a second processing container accommodating the solution and sending the generated vapor from the second processing container to the first processing container.

23\. (New) The film formation method of Claim 22, wherein the generating the vapor of the solution includes bubbling the solution inside the second processing container.

24\. (New) The film formation method of Claim 12, wherein the solvent contained in the solution is has a boiling point of 40 degrees C to 120 degrees C.

25\. (New) The film formation method of Claim 12, wherein a time duration during which the vapor of the solution is supplied to the surface of the substrate is 60 seconds to 300 seconds.

26\. (New) The film formation method of Claim 12, wherein the selectively forming the self- assembled monolayer in the first region includes supplying the vapor of the solution to the surface of the substrate to deposit the raw material on the surface, and removing the raw material deposited on the surface and unreacted on the surface.

27\. (New) The film formation method of Claim 12, wherein the first material in the first region is a metal or a semiconductor, wherein the second material in the second region is an insulating material, and
wherein the raw material of the self-assembled monolayer is a thiol-based compound.

28\. (New) The film formation method of Claim 12, wherein the first material in the first region is an insulating material, wherein the second material in the second region is a metal or a semiconductor, and
wherein the raw material of the self-assembled monolayer is a silane-based compound.

29\. (New) A film formation apparatus for forming a desired target film on a substrate including, on a surface of the substrate, a first region in which a first material is exposed and a second region in which a second material different from the first material is exposed, the film formation apparatus comprising: a first processor configured to supply, to the surface of the substrate, vapor of a solution that contains a raw material of a self-assembled monolayer and a solvent by which the raw material is dissolved, and selectively form the self-assembled monolayer in the first region;
a second processor configured to form the desired target film in the second region by using the self-assembled monolayer formed by the first processor;
a transporter configured to transport the substrate with respect to the first processor and the second processor; and
a controller configured to control the first processor, the second processor, and the transporter.
4 5 6 7 8

OFFICE ACTION:
DETAILED ACTION
Notice of Pre-AIA  or AIA  Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA  35 U.S.C. 102 and 103 (or as subject to pre-AIA  35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA  to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 12, 26 and 28 are rejected under 35 U.S.C. 102(a)(1)/102(a)(2) as being anticipated by Chakraborty et al. (US 2018/0053659).
In re claim 12, Chakraborty et al. teach a film formation method comprising:
providing a substrate 300 including, on a surface of the substrate 300, a first region 304 in which a first material (e.g. silicon oxide, silicon nitride or silicon oxynitride, [0016]) is exposed and a second region 302 in which a second material (e.g. silicon, [0016]) different from the first material is exposed (Fig. 3A);
supplying, to the surface of the substrate 300, vapor of a solution ([0018]) that contains a raw material (i.e. a precursor of a self-assembled monolayer 306, [0020]) of a self-assembled monolayer 306 ([0021]) and a solvent ([0019]) by which the raw material is dissolved, and selectively forming the self-assembled monolayer 306 in the first region 304 (Fig. 3B); and
forming a desired target film 308 (i.e. a low-k dielectric) in the second region 302 by using the self-assembled monolayer 306 formed in the first region 304 (Figs. 3C and 3D).
PNG
media_image1.png
328
404
media_image1.png
Greyscale
PNG
media_image2.png
324
412
media_image2.png
Greyscale
In re claim 26, Chakraborty et al. teach that the selectively forming the self- assembled monolayer 306 in the first region 304 includes supplying the vapor of the solution ([0018]) to the surface of the substrate 300 to deposit the raw material 306 on the surface, and removing the raw material (i.e. the precursor of a self-assembled monolayer 306, [0020], evolving from Fig.3C to Fig. 3D) deposited on the surface and unreacted on the surface.
In re claim 28, Chakraborty et al. teach that the first material (e.g. silicon oxide, silicon nitride or silicon oxynitride, [0016]) in the first region 304 is an insulating material, wherein the second material (e.g. silicon, [0016]) in the second region 302 is a semiconductor, and wherein the raw material of the self-assembled monolayer 306 is a silane-based compound (e.g. organosilanes, [0018]).
Claim(s) 12-16, 21-23, 26, 27 and 29 are rejected under 35 U.S.C. 102(a)(1)/102(a)(2) as being anticipated  by Visser et al. (US 2017/0062210).
In re claim 12, Visser et al. teach a film formation method comprising:
providing a substrate 600 including, on a surface of the substrate 600, a first region 602 in which a first material (i.e. a metal, such as copper, [0021]) is exposed and a second region 604 in which a second material (e.g. silicon oxide, [0022]) different from the first material is exposed (Fig. 6A);
supplying, to the surface of the substrate 600, vapor of a solution 608 (i.e. a vapor precursor, [0036]) that contains a raw material of a self-assembled monolayer 610 and a solvent ([0036]) by which the raw material is dissolved (Fig. 6D), and
selectively forming the self-assembled monolayer in the first region; and forming a desired target film 612 in the second region 604 by using the self-assembled monolayer 610 formed in the first region 602 (Figs. 6F and 6G).
PNG
media_image3.png
120
368
media_image3.png
Greyscale
PNG
media_image4.png
126
356
media_image4.png
Greyscale
PNG
media_image5.png
132
340
media_image5.png
Greyscale
PNG
media_image6.png
142
344
media_image6.png
Greyscale
In re claim 13, Visser et al. teach that the supplying the vapor of the solution 608 to the surface of the substrate 600 includes controlling a temperature of the substrate (e.g. 350 °C, [0037]) to be higher than a temperature of the solution (i.e. 200°C, [0036]).  .
In re claims 14 and 21, Visser et al. teach the supplying the vapor of the solution to the surface of the substrate 600 includes controlling a temperature (e.g. 350°C, [0037]) of a portion of an inner wall surface of a first processing container 402 (i.e. a process chamber, [0036]) that is in contact with the vapor to be higher than the temperature of the solution (i.e. 200°C, [0036]), the first processing container 402 accommodating the substrate 410 (Fig. 4, the substrate 410 is equivalent to the substrate 600 in Fig. 6A).
In re claims 15 and 22, Visser et al. teach the supplying the vapor of the solution 608 to the surface of the substrate 600 includes generating the vapor inside a second processing container (i.e. an ampoule, [0036]) accommodating the solution and sending the generated vapor from the second processing container to the first processing container 402 accommodating the substrate 410 (Fig. 4) or 600 (Fig. 6A).
In re claims 16 and 23, Visser et al. imply that the generating the vapor of the solution includes bubbling the solution inside the second processing container (i.e. ampoule, [0036]), because as the solution is being heated for forming the vapor, it would generate bubble as the result of the heating, which is a natural consequence of the heating.
In re claim 26, Visser et al. teach that the selectively forming the self- assembled monolayer 610 in the first region 602 (Fig. 6E) includes supplying the vapor of the solution 608 (Fig. 6D) to the surface of the substrate 600 to deposit the raw material 610 on the surface, and removing the raw material 610 deposited on the surface and unreacted on the surface (compare Fig. 6F and Fig. 6G).
In re claim 27, Visser et al. teach that the first material (e.g. copper, [0021]) in the first region is a metal, wherein the second material (e.g. silicon oxide, [0022]) in the second region 604 is an insulating material, and wherein the raw material of the self-assembled monolayer 608 is a thiol-based compound (e.g. methanethiol, [0033]).
In re claim 29, Visser et al. teach a film formation apparatus (Fig. 4) for forming a desired target film 612 on a substrate 600 (Fig. 6G, 600 = 602+604) including, on a surface of the substrate 600, a first region 602 in which a first material (e.g. copper, [0021]) is exposed and a second region 604 in which a second material (e.g. silicon oxide, [0022]) different from the first material is exposed, the film formation apparatus (Fig. 4) comprising: a first processor 462 (i.e. a gas supply apparatus, [0036]) configured to supply, to the surface of the substrate 410 (Fig. 4) or 600 (Fig. 6a), vapor of a solution 608 (Fig. 6D) that contains a raw material of a self-assembled monolayer 610 (Fig. 6E) and a solvent ([0019]) by which the raw material is dissolved, and selectively form the self-assembled monolayer 610 in the first region 602 (Fig. 6E); a second processor 402 (i.e. a process chamber, Fig. 4) configured to form the desired target film 612 in the second region 604 (Figs. 6F and 6G) by using the self-assembled monolayer 610 formed by the first processor 462; a transporter (i.e. a transfer tool for transferring the substrate into and out of the process chamber, not shown, [0069]) configured to transport the substrate 410 with respect to the first processor 462 and the second processor 402; and a controller 450 (Fig. 4) configured to control the first processor 462, the second processor 402, and the transporter.
PNG
media_image7.png
456
652
media_image7.png
Greyscale
Claim(s) 12, 13 and 27 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Lee et al. (US 2020/0020580).
In re claim 12, Lee et al. teach a film formation method comprising:
providing a substrate 100 including, on a surface of the substrate 100, a first region 110 in which a first material (i.e. a metal, [0022]) is exposed and a second region 120 in which a second material (i.e. a low-k dielectric, [0022]) different from the first material is exposed (Fig. 1A);
supplying, to the surface of the substrate 100, vapor of a solution 130 that contains a raw material (i.e. a precursor of a self-assembled monolayer 140, such as a silane compound or a thiol compound, [0023]) of a self-assembled monolayer 140 and a solvent ([0023]) by which the raw material is dissolved (Fig. 1B), and selectively forming the self-assembled monolayer 140 in the first region 110 (Fig. 1C); and
forming a desired target film 150 in the second region 120 by using the self-assembled monolayer 140 formed in the first region 110 (Fig. 1D).
PNG
media_image8.png
248
372
media_image8.png
Greyscale
PNG
media_image9.png
328
424
media_image9.png
Greyscale
PNG
media_image10.png
406
444
media_image10.png
Greyscale
PNG
media_image11.png
366
484
media_image11.png
Greyscale
In re claim 13, Lee et al. imply that the supplying the vapor of the solution to the surface of the substrate 100 includes controlling a temperature of the substrate 100 to be higher than a temperature of the solution, because the substrate 100 was heated up to 100 °C ~150 °C ([0025]) from a lower temperature of the substrate on which the solution was applied.
In re claim 27, Lee et al. teach that the first material in the first region 110 is a metal ([0022]), wherein the second material in the second region 120 is an insulating material ( i.e. a low-k dielectric, [0022]), and wherein the raw material of the self-assembled monolayer 140 is a thiol-based compound ([0023]).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA  35 U.S.C. 102 and 103 (or as subject to pre-AIA  35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA  to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 17-20, 24 and 25 are rejected under 35 U.S.C. 103 as being unpatentable over Visser et al. (US 2017/0062210).
In re claims 17 and 24, Visser et al. do not explicitly teach that the solvent contained in the solution is has a boiling point of 40 degrees C to 120 degrees C.   However, one of the ordinary skill in the art, before the effect filing date of the claimed invention was made, would have recognized that the boiling point is a solvent dependent; and it is obvious to the ordinary skill in the art to properly choosing a desired solvent having a boiling point as claimed in a consideration of dissolving the raw material for supplying the vapor of the solution to form the self-assembled monolayer.  In such a situation, the applicant must show that the particular range is critical, generally by showing that the claimed range achieves unexpected results relative to the prior art range.  See M.P.E.P. 2144.05, III
In re claims 18 and 25, the selection of a time duration for supplying the vapor of the solution is obvious because it is a matter of determining optimum process condition by routine experimentation with a limited number of species.  In re Jones, 162 USPQ 224 (CCPA 1955)(the selection of optimum ranges within prior art general conditions is obvious) and In re Boesch, 205 USPQ 215 (CCPA 1980)(discovery of optimum value of result effective variable in a known process is obvious).   In such a situation, the applicant must show that the particular range is critical, generally by showing that the claimed range achieves unexpected results relative to the prior art range.  See M.P.E.P. 2144.05, III
In re claim 19, Visser et al. teach that the selectively forming the self- assembled monolayer 610 in the first region 602 (Fig. 6E) includes supplying the vapor of the solution 608 (Fig. 6D) to the surface of the substrate 600 to deposit the raw material 610 on the surface, and removing the raw material 610 deposited on the surface and unreacted on the surface (compare Fig. 6F and Fig. 6G).
In re claim 20, Visser et al. teach that the first material (e.g. copper, [0021]) in the first region is a metal, wherein the second material (e.g. silicon oxide, [0022]) in the second region 604 is an insulating material, and wherein the raw material of the self-assembled monolayer 608 is a thiol-based compound (e.g. methanethiol, [0033]).


NEXT OFFICE ACTION: DETAILED ACTION
Notice of Pre-AIA  or AIA  Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Examiner’s Amendment
2.	An examiner's amendment to the record appears below.  Should the changes and/or additions be unacceptable to applicant, an amendment may be filed as provided by 37 CFR 1.312.  To ensure consideration of such an amendment, it MUST be submitted no later than the payment of the issue fee.
Authorization for this examiner's amendment was given in a telephone interview with Rose Moller-Jacobs (Reg. No. 72,727) on Feb. 14, 2025.
3.	The application has been amended as follows:
Amend claims 12 and 29, including [deletion] and insertion as follows:
12. (Currently Amended) A film formation method comprising:
providing a substrate including, on a surface of the substrate, a first region in which a first material is exposed and a second region in which a second material different from the first material is exposed;
supplying, to the surface of the substrate, vapor of a solution that contains a raw material of a self-assembled monolayer and a solvent by which the raw material is dissolved, and selectively forming the self-assembled monolayer in the first region; and
forming a [desired] target film in the second region by using the self-assembled monolayer formed in the first region,
wherein the selectively forming the self-assembled monolayer in the first region includes supplying the vapor of the solution to the surface of the substrate to deposit the raw material on the surface, and removing the raw material deposited on the surface and unreacted raw material on the surface, and
wherein the removing the raw material deposited on the surface and unreacted raw material on the surface includes supplying, to the surface, the solvent that is heated to a temperature within a range of 65 degrees C [or higher] to 85 degrees C.
29. (Currently Amended) A film formation apparatus for forming a [desired] target film on a substrate including, on a surface of the substrate, a first region in which a first material is exposed and a second region in which a second material different from the first material is exposed, the film formation apparatus comprising:
a first processor configured to supply, to the surface of the substrate, vapor of a solution that contains a raw material of a self-assembled monolayer and a solvent by which the raw material is dissolved, and selectively form the self-assembled monolayer in the first region;
a second processor configured to form the [desired] target film in the second region by using the self-assembled monolayer formed by the first processor;
a transporter configured to transport the substrate with respect to the first processor and the second processor; and
a controller configured to control the first processor, the second processor, and the transporter,
wherein the first processor includes a processing container configured to accommodate the solution and a nozzle configured to supply the solvent to the surface of the substrate, and
wherein the controller is configured to control the first processor so as to supply the vapor of the solution to the surface of the substrate to deposit the raw material on the surface, and remove the raw material deposited on the surface and unreacted raw material on the surface by using the solvent that is heated to a temperature within a range of 65 degrees C [or higher] to 85 degrees C in the processing container.
Allowable Subject Matter
4.	Claims 12-18, 20-25 and 27-29 are allowed.
5.	The following is an examiner’s statement of reasons for allowance:
In re claim 12, the current invention is deemed to be directed to a nonobvious improvement over the invention published in US 2018/0053659.   The improvement comprises: the selectively forming the self-assembled monolayer in the first region includes supplying the vapor of the solution to the surface of the substrate to deposit the raw material on the surface, and removing the raw material deposited on the surface and unreacted raw material on the surface, and wherein the removing the raw material deposited on the surface and unreacted raw material on the surface includes supplying, to the surface, the solvent that is heated to a temperature within a range of 65 degrees C to 85 degrees C.
In re claim 29, the current invention is deemed to be directed to a nonobvious improvement over the invention published in US 2018/0053659.   The improvement comprises: the controller is configured to control the first processor so as to supply the vapor of the solution to the surface of the substrate to deposit the raw material on the surface, and remove the raw material deposited on the surface and unreacted raw material on the surface by using the solvent that is heated to a temperature within a range of 65 degrees C to 85 degrees C in the processing container.
Response to Arguments
6.	Applicant’s arguments and amendments, submitted on 1/9/25 and 2/14/25, respectively, have been fully considered and are persuasive.  The rejections, as set forth in the previous office action, have been withdrawn.   The current application is thus allowed.
7.	Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee.  Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
8.

CITED REFERENCE SUMMARIES: Ref US20180053659A1: Claims:
A method of selectively depositing a low-k dielectric layer atop a substrate having an exposed silicon surface and an exposed silicon-containing surface, comprising: (a) growing an organosilane based self-assembled monolayer atop the exposed silicon-containing surface, wherein the organosilane based self-assembled monolayer is thermally stable at a first temperature of greater than about 300 degrees Celsius; and (b) selectively depositing a low-k dielectric layer atop the exposed silicon surface of the substrate, wherein the organosilane based self-assembled monolayer inhibits deposition of the low-k dielectric layer atop the silicon-containing surface.
(a) growing an organosilane based self-assembled monolayer atop the exposed silicon-containing surface, wherein the organosilane based self-assembled monolayer is thermally stable at a first temperature of greater than about 300 degrees Celsius; and
(b) selectively depositing a low-k dielectric layer atop the exposed silicon surface of the substrate, wherein the organosilane based self-assembled monolayer inhibits deposition of the low-k dielectric layer atop the silicon-containing surface.
The method of claim 1 , wherein the first temperature is about 300 to about 500 degrees Celsius.
The method of claim 1 , wherein the silicon-containing surface comprises silicon oxide (SiO2), silicon nitride (SiN), or silicon oxynitride (SiON).
The method of claim 1 , wherein growing the organosilane based self-assembled monolayer comprises exposing the substrate to a solution comprising an organosilane and a solvent.
The method of claim 4 , wherein the organosilane comprises a C-8 to C-30 alkyl chain.
The method of claim 4 , wherein the substrate is rinsed with the solvent after growing the organosilane based self-assembled monolayer.
The method of claim 4 , wherein the solution comprises the solvent having about 1 millimol to about 10 millimol of organosilane.
The method of claim 1 , further comprising heating the substrate to a temperature of about 500 to about 1000 degrees Celsius to remove the organosilane based self-assembled monolayer.
A method of selectively depositing a layer atop a substrate having an exposed metal surface and an exposed silicon-containing surface, comprising: (a) growing a first self-assembled monolayer atop the exposed metal surface; (b) growing a second self-assembled monolayer atop the exposed silicon-containing surface, wherein the second self-assembled monolayer is organosilane based; (c) heating the substrate to a temperature of about 200 to about 300 degrees Celsius to remove the first self-assembled monolayer from atop the exposed metal surface; (d) selectively depositing a layer atop the exposed metal surface, wherein the layer is a low-k dielectric layer or a metal layer; and (e) heating the substrate to a temperature of about 500 to about 1000 degrees Celsius to remove the second self-assembled monolayer from atop the exposed silicon-containing surface.
(a) growing a first self-assembled monolayer atop the exposed metal surface;
(b) growing a second self-assembled monolayer atop the exposed silicon-containing surface, wherein the second self-assembled monolayer is organosilane based;
(c) heating the substrate to a temperature of about 200 to about 300 degrees Celsius to remove the first self-assembled monolayer from atop the exposed metal surface;
(d) selectively depositing a layer atop the exposed metal surface, wherein the layer is a low-k dielectric layer or a metal layer; and
(e) heating the substrate to a temperature of about 500 to about 1000 degrees Celsius to remove the second self-assembled monolayer from atop the exposed silicon-containing surface.
The method of claim 9 , wherein depositing the first self-assembled monolayer comprises exposing the substrate to a first solution comprising a solvent and a self-assembled monolayer precursor.
The method of claim 10 , wherein the self-assembled monolayer precursor comprises C-8 to C-30 chain alkyl thiols, organophosphonic acids, or sulfonic acids.
The method of claim 10 , wherein the first solution comprises the solvent having about 1 millimol to about 10 millimol of self-assembled monolayer precursor.
The method of claim 10 , wherein depositing the second self-assembled monolayer comprises exposing the substrate to a second solution comprising an organosilane and a solvent.
The method of claim 13 , wherein the organosilane comprises C-8 to C-30 alkyl chains.
The method of claim 13 , wherein the second solution comprises the solvent having about 1 millimol to about 10 millimol of organosilane.
The method of claim 1 , wherein the low-k dielectric layer has a low-k value in an amount of about 2.5 to about 3.5.
The method of claim 9 , wherein the low-k dielectric layer has a low-k value in an amount of about 2.5 to about 3.5.
A semiconductor substrate comprising: a first layer comprising a silicon-containing surface and a silicon surface; and a second layer comprising an organosilane based self-assembled monolayer and a low-k dielectric layer, wherein the organosilane based self-assembled monolayer is disposed atop the silicon-containing surface and the low-k dielectric layer is disposed atop the silicon surface, and wherein the organosilane based self-assembled monolayer is thermally stable at a first temperature of greater than about 300 degrees Celsius.
a first layer comprising a silicon-containing surface and a silicon surface; and
a second layer comprising an organosilane based self-assembled monolayer and a low-k dielectric layer, wherein the organosilane based self-assembled monolayer is disposed atop the silicon-containing surface and the low-k dielectric layer is disposed atop the silicon surface, and wherein the organosilane based self-assembled monolayer is thermally stable at a first temperature of greater than about 300 degrees Celsius.
The semiconductor substrate of claim 18 , wherein the organosilane based self-assembled monolayer comprises a C-8 to C-30 alkyl chain.
The semiconductor substrate of claim 18 , wherein the low-k dielectric layer has a low-k value in an amount of about 2.5 to about 3.5.
Ref US20200020580A1: Claims:
A method for forming a semiconductor structure, the method comprising: providing a substrate including a metal portion and a low-k dielectric portion formed thereon, wherein the metal portion adjoins the low-k dielectric portion; preparing a self-assembled monolayer (SAM) solution comprising: at least one blocking compound configured to adhere to one of the metal portion and the low-k dielectric portion; and a multi-solvent system comprising an alcohol and an ester, wherein the alcohol has 1 to 6 carbon atoms and the ester has 1 to 6 carbon atoms; applying the SAM solution over surfaces of the metal portion and the low-k dielectric portion; heating the substrate to remove the multi-solvent system of the SAM solution over the surfaces of the metal portion and the low-k dielectric portion to form a blocking layer on one of the metal portion and the low-k dielectric portion; selectively depositing a material layer on the other one of the metal portion and the low-k dielectric portion using the blocking layer as a stencil, wherein the material layer comprises a metal material or a dielectric material; and removing the blocking layer from the substrate.
providing a substrate including a metal portion and a low-k dielectric portion formed thereon, wherein the metal portion adjoins the low-k dielectric portion;
preparing a self-assembled monolayer (SAM) solution comprising: at least one blocking compound configured to adhere to one of the metal portion and the low-k dielectric portion; and a multi-solvent system comprising an alcohol and an ester, wherein the alcohol has 1 to 6 carbon atoms and the ester has 1 to 6 carbon atoms;
at least one blocking compound configured to adhere to one of the metal portion and the low-k dielectric portion; and
a multi-solvent system comprising an alcohol and an ester, wherein the alcohol has 1 to 6 carbon atoms and the ester has 1 to 6 carbon atoms;
applying the SAM solution over surfaces of the metal portion and the low-k dielectric portion;
heating the substrate to remove the multi-solvent system of the SAM solution over the surfaces of the metal portion and the low-k dielectric portion to form a blocking layer on one of the metal portion and the low-k dielectric portion;
selectively depositing a material layer on the other one of the metal portion and the low-k dielectric portion using the blocking layer as a stencil, wherein the material layer comprises a metal material or a dielectric material; and
removing the blocking layer from the substrate.
The method of claim 1 , wherein preparing the SAM solution comprises dispersing the at least one blocking compound in the multi-solvent system comprising glycol ether and glycol ether ester.
The method of claim 1 , wherein preparing the SAM solution comprises dispersing the at least one blocking compound in the multi-solvent system comprising propylene glycol monomethyl ether (PGME) and propylene glycol monomethyl ether acetate (PGMEA).
The method of claim 1 , wherein preparing the SAM solution comprises dispersing the at least one blocking compound in the multi-solvent system with a dielectric constant that is in a range substantially from 10 to 12.
The method of claim 1 , wherein the at least one blocking compound comprises a tail group comprising an alkyl chain having 10 to 18 carbon atoms.
The method of claim 1 , wherein the SAM solution further comprises an additive, and the additive comprises a stabilizer, a surfactant or a dispersant.
The method of claim 1 , wherein preparing the SAM solution comprises dispersing the at least one blocking compound in the multi-solvent system containing the alcohol substantially in a range from about 10 weight percent (wt. %) to about 90 wt. % and the ester substantially in a range from about 10 wt. % to about 90 wt. %.
The method of claim 1 , wherein a concentration of the at least one blocking compound in the SAM solution is in a range substantially from 1 mM to 5 mM.
The method of claim 1 , wherein depositing the material layer comprises depositing the material layer to a thickness substantially equal to or greater than 50 â«.
The method of claim 1 , wherein when the at least one blocking compound comprises at least one of a thiol compound and a phosphonic acid compound, the blocking layer is formed on the metal portion and the material layer is formed on the low-k dielectric portion, and the material layer is formed from the dielectric material.
The method of claim 1 , wherein when the at least one blocking compound comprises a silane compound, the blocking layer is formed on the low-k dielectric portion and the material layer is formed on the metal portion.
A method of forming a semiconductor structure, the method comprising: providing a substrate; forming a first inter-layer dielectric (ILD) layer on the substrate; forming a first opening through the first ILD layer to expose a portion of the substrate; filling the first opening with a first metal material, thereby forming a first metal portion; preparing a SAM solution comprising: at least one blocking compound configured to adhere to the first metal portion, wherein the at least one blocking compound comprises one or both of a thiol compound and a phosphonic acid compound, and a chemical structure of the at least one of blocking compound has a head group and a tail group; and a multi-solvent system comprising an alcohol and an ester, wherein the alcohol has 1 to 6 carbon atoms and the ester has 1 to 6 carbon atoms; applying the SAM solution over a surface of the first metal portion and a surface of the first ILD layer; heating the substrate to remove the multi-solvent system of the SAM solution over the surface of the first metal portion and the surface of the first ILD layer to form a first blocking layer on the first metal portion; selectively depositing a first dielectric layer on the first ILD layer using the first blocking layer as a stencil; removing the first blocking layer on the first metal portion; forming a second ILD layer on the first dielectric layer and the first metal portion; forming a second opening through the second ILD layer to expose the surface of the first metal portion; and filling the second opening with a second metal material, thereby forming a second metal portion electrically connected to the first metal portion.
providing a substrate;
forming a first inter-layer dielectric (ILD) layer on the substrate;
forming a first opening through the first ILD layer to expose a portion of the substrate;
filling the first opening with a first metal material, thereby forming a first metal portion;
preparing a SAM solution comprising: at least one blocking compound configured to adhere to the first metal portion, wherein the at least one blocking compound comprises one or both of a thiol compound and a phosphonic acid compound, and a chemical structure of the at least one of blocking compound has a head group and a tail group; and a multi-solvent system comprising an alcohol and an ester, wherein the alcohol has 1 to 6 carbon atoms and the ester has 1 to 6 carbon atoms;
at least one blocking compound configured to adhere to the first metal portion, wherein the at least one blocking compound comprises one or both of a thiol compound and a phosphonic acid compound, and a chemical structure of the at least one of blocking compound has a head group and a tail group; and
applying the SAM solution over a surface of the first metal portion and a surface of the first ILD layer;
heating the substrate to remove the multi-solvent system of the SAM solution over the surface of the first metal portion and the surface of the first ILD layer to form a first blocking layer on the first metal portion;
selectively depositing a first dielectric layer on the first ILD layer using the first blocking layer as a stencil;
removing the first blocking layer on the first metal portion;
forming a second ILD layer on the first dielectric layer and the first metal portion;
forming a second opening through the second ILD layer to expose the surface of the first metal portion; and
filling the second opening with a second metal material, thereby forming a second metal portion electrically connected to the first metal portion.
The method of claim 12 , wherein forming the second opening further comprises: forming a third opening adjacent to the second opening and through the second ILD layer, thereby exposing a portion of the first dielectric layer; and etching the portion of the first dielectric layer, thereby exposing a portion of the first ILD layer, and wherein filling the second opening with the second metal material, further comprises: depositing a seed layer into the second opening and the third opening; and filling the second opening and the third opening with the second metal material, thereby forming the second metal portion and a third metal portion.
forming a third opening adjacent to the second opening and through the second ILD layer, thereby exposing a portion of the first dielectric layer; and
etching the portion of the first dielectric layer, thereby exposing a portion of the first ILD layer, and wherein filling the second opening with the second metal material, further comprises:
depositing a seed layer into the second opening and the third opening; and
filling the second opening and the third opening with the second metal material, thereby forming the second metal portion and a third metal portion.
The method of claim 13 , wherein after forming the second metal portion and the third metal portion, the method further comprises: applying the SAM solution over a surface of the second ILD layer, a surface of the second metal portion and a surface of the third metal portion; heating the substrate to remove the multi-solvent system of the SAM solution over the surface of the second ILD layer, the surface of the second metal portion and the surface of the third metal portion, so as to form a second blocking layer on the second metal portion and the third metal portion, wherein the second blocking layer is formed of the at least one blocking compound; selectively depositing a second dielectric layer on the second ILD layer using the second blocking layer as a stencil; and removing the second blocking layer on the second metal portion and the third metal portion.
applying the SAM solution over a surface of the second ILD layer, a surface of the second metal portion and a surface of the third metal portion;
heating the substrate to remove the multi-solvent system of the SAM solution over the surface of the second ILD layer, the surface of the second metal portion and the surface of the third metal portion, so as to form a second blocking layer on the second metal portion and the third metal portion, wherein the second blocking layer is formed of the at least one blocking compound;
selectively depositing a second dielectric layer on the second ILD layer using the second blocking layer as a stencil; and
removing the second blocking layer on the second metal portion and the third metal portion.
The method of claim 14 , wherein each of depositing the first dielectric layer and depositing the second dielectric layer comprises depositing a metal oxide layer on the first ILD or the second ILD.
The method of claim 14 , further comprising: forming a third ILD layer on the second dielectric layer, the second metal portion and the third metal portion; forming a fourth opening through the third ILD layer to expose the surface of the second metal portion; and filling the fourth opening with a third metal material, thereby forming a fourth metal portion electrically connected to the second metal portion.
forming a third ILD layer on the second dielectric layer, the second metal portion and the third metal portion;
forming a fourth opening through the third ILD layer to expose the surface of the second metal portion; and
filling the fourth opening with a third metal material, thereby forming a fourth metal portion electrically connected to the second metal portion.
The method of claim 14 , wherein each of removing the first blocking layer and removing the second blocking layer comprises: applying an acid onto the first blocking layer or the second blocking layer; and/or heating the substrate.
applying an acid onto the first blocking layer or the second blocking layer; and/or
heating the substrate.
A method of forming a semiconductor structure, the method comprising: providing a substrate; forming a first inter-layer dielectric (ILD) layer on the substrate; forming a first opening through the first ILD layer to expose a portion of the substrate; filling the first opening with a first metal material, thereby forming a first metal portion; planarizing a surface of the first metal portion and a surface of the first ILD layer; pre-cleaning the surface of the first metal portion and the surface of the first ILD layer; preparing a SAM solution comprising: a phosphonic acid compound configured to adhere to the first metal portion; propylene glycol monomethyl ether (PGME); and propylene glycol monomethyl ether acetate (PGMEA), wherein a mixture of PGME and PGMEA has a dielectric constant that is in a range substantially from 10 to 12; applying the SAM solution over the surface of the first ILD layer and the surface of the first metal portion; vaporizing PGME and PGMEA of the SAM solution on the first ILD layer and the first metal portion to form a SAM on the first metal portion; selectively depositing a metal oxide layer on the first ILD layer by using the SAM as a stencil; applying an acid over the SAM layer and the metal oxide layer to remove the SAM layer on the first metal portion; forming a second ILD layer on the metal oxide layer and the first metal portion; forming a second o
[Truncated to input limit]