Office Action 5: Notice of Allowance (2025-03-05)

CLAIMS:
AMENDMENTS TO THE CLAIMS

Please AMEND claims 1, 7, 8, and 13 as shown below.Please CANCEL claims 2 and 14 without prejudice or disclaimer of their subject matter.The following list of claims replaces any prior listing of claims:

1\. (Currently Amended) A chip package structure comprising:
a glass substrate comprising a plurality of glass layers, wherein a first surface of the glass substrate has solder joints and a second surface of the glass substrate has substrate solder balls;
a plurality of routing layers , wherein each routing layer is distributed between two adjacent glass layers in the glass substrate and the solder joints are electrically connected to the substrate solder balls by using each outing layer; and
a plurality of dies, wherein a gap is defined between vertically adjacent dies of the plurality of dies, each die has chip solder ballsand; is located on the first surface of the glass substrate, and the solder joints are bonded to the chip solder balls.

2\. (Canceled).

3\. (Previously Presented) The chip package structure according to claim 1, wherein the first surface of the glass substrate has a groove, some dies of the plurality of dies are located in the groove, and other dies of the plurality of dies are located outside the groove.

4\. (Previously Presented) The chip package structure according to claim 3, wherein the groove comprises a groove bottom and n steps, the n steps are located on two sides of the groove bottom, n is a positive integer, some dies of the plurality of dies in the groove are located on the groove bottom, and the other dies of the plurality of dies are located on an upper surface of an fi step in the n steps, wherein i is set to a value from 1 to n.

5\. (Previously Presented) The chip package structure according to claim 4, wherein each step comprises a first sub-step and a second sub-step, the first sub-step and the second sub-step are respectively located on the two sides of the groove bottom in opposite positions and one end of each die on the upper surface of the ithstep islocated on an upper surface of the first sub-step, and the other end of each die is located on an upper surface of the second sub-step.

6\. (Previously Presented) The chip package structure according to claim 3, wherein one end of each die outside the groove is located on a first side of the groove, the other end of each die is located on a second side of the groove, and the first side and the second side of the groove are in opposite positions.

7\. Currently Amended) A method comprising:
distributing a plurality of routing layers in a glass substrate comprising a plurality of glass layers, wherein each routing layer is distributed between two adjacent glass layers;
disposing solder joints on a first surface of the glass substrate;
disposing substrate solder balls on a second surface of the glass substrate, wherein the solder joints are electrically connected to the substrate solder balls by using each routing layer;

Response to Office Action of November 25, 2024 disposing chip solder balls on a surface of each die of a plurality of dies;
fastening the plurality of dies to the first surface of the glass substrate, wherein a gap is defined between vertically adjacent dies of the plurality of dies; and
bonding the solder joints to the chip solder balls.

8\. (Currently Amended) The method according to claim 7, wherein the glass substrate comprises m glass layers, m is a positive integer greater than 1, and distributing each \_routing layer in the glass substrate further comprises:
distributing a copper layer on a surface of a k\* glass layer;
performing circuit printing on the copper layer to form each outing layer on the surface of the kth glass layer; and
fastening a (k+1)th glass layer to a surfaceof each routing layer to obtain the glass substrate wherein k is set to a value from 1 to m-1.

9\. (Previously Presented) The method according to claim 7, wherein the first surface of the glass substrate has a groove and the fastening of the plurality of dies to the first surface of the glass substrate further comprises:
fastening some dies of the plurality of dies in the groove; and fastening other dies of the plurality of dies outside the groove.

10\. (Previously Presented) The method according to claim 9, wherein the groove comprises a groove bottom and n steps, the n steps are located on two sides of the groove bottom, n is a positive integer, and fastening some dies of the plurality of dies in the groove further comprises:
fastening some dies of the plurality of dies on the groove bottom; and
fastening the other dies of the plurality of dies to an upper surface of an ith step in the n steps, wherein i is set to a value from 1 to n.

11\. (Previously Presented) The method according to claim 10, wherein each step comprises a first sub-step and a second sub-step, the first sub-step and the second sub-step are respectively located on the two sides of the groove bottom in opposite positions, fastening the other dies of the plurality of dies to the upper surface of the ith step in the n steps further comprises:
fastening one end of each die to an upper surface of the first sub-step of the ith step in the n steps; and
fastening the other end of each die to an upper surface of the second sub-step of the ithstep.

12\. (Previously Presented) The method according to claim 9, wherein the fastening of the other dies of the plurality of dies outside the groove comprises:
fastening one end of the die to a first side of the groove; and
fastening the other end of the die to a second side of the groove, wherein the first side and the second side of the groove are in opposite positions.

13\. (Currently Amended) An electronic device comprising a chip package structure, and the chip package structure comprises:

a glass substrate comprising a plurality of glass layers, wherein a first surface of the glass substrate has solder joints and a second surface of the glass substrate has substrate solder balls;
a plurality of routing layers , wherein each routing layer is distributed between two adjacent glass layers in the glass substrate and the solder joints are electrically connected to the substrate solder balls by using each routing layer; and
a plurality of dies, wherein a gap is defined between vertically adjacent dies of the plurality of dies, each die has chip solder balls;andis located on the first surface of the glass substrate, and the solder joints are bonded to the chip solder balls.

14\. (Canceled).

15\. (Previously Presented) The electronic device according to claim 13, wherein the first surface of the glass substrate has a groove, some dies of the plurality of dies are located in the groove, and other dies of the plurality of dies are located outside the groove.

16\. (Previously Presented) The electronic device according to claim 15, wherein the groove comprises a groove bottom and n steps, the n steps are located on two sides of the groove bottom, n is a positive integer, and some dies of the plurality of dies in the groove are located on the groove bottom, and the other dies of the plurality of dies are located on an upper surface of an fi step in the n steps, wherein i is set to a value from 1 to n.

17\. (Previously Presented) The electronic device according to claim 16, wherein each step comprises a first sub-step and a second sub-step, and the first sub-step and the second sub-step are

respectively located on the two sides of the groove bottom in opposite positions, one end of each die on the upper surface of the fi step is located on an upper surface of the first sub-step, and the other end of each die is located on an upper surface of the second sub-step.

18\. (Previously Presented) The electronic device according to claim 15, wherein the one end of each die outside the groove is located on a first side of the groove, the other end of each die is located on a second side of the groove, and the first side of the groove and the second side of the groove are in opposite positions.

OFFICE ACTION:
DETAILED ACTION
Notice of Pre-AIA  or AIA  Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Allowable Subject Matter
Claims 1, 3-13, and 15-18 are allowed.
The following is an examiner’s statement of reasons for allowance:
The arguments and amendments filed on 1/15/25 placed the claims in condition for allowance (see the remarks’ pages 1-3.)
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee.  Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion

APPLICANT REBUTTAL: REMARKS
Favorable reconsideration of this Application, in light of the following discussion, is respectfully requested. Claims 1-18 were previously presented. Claims 1, 7, 8, and 13 are amended. Claims 2 and 14 are canceled without prejudice or disclaimer. Accordingly, claims 1, 3-13, and 15-18 are pending in the present Application. Applicant submits that upon entry of the present Response, claims 1, 3-13, and 15-18 are in condition for allowance. Moreover, the Applicant submits that no new matter has been introduced by the foregoing amendments.
Allowable Subject Matter
The Office Action objected to claims 4, 5, 10, 11, 16, and 17 for depending upon a rejected base claim but indicated that they would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Applicant acknowledges with appreciation the indication of allowable subject matter.
Re
jections under 35 U.S.C.
§
112(b)
The Office Action rejected claims 1-18 under 35 U.S.C. § 112(b) or 35 U.S.C. § 112, second paragraph as indefinite. Applicant hereby amends these claims so that no further rejection on that basis is anticipated. If, however, the Examiner disagrees, the Examiner is invited to telephone the undersigned who will be happy to work with the Examiner in a joint effort to derive mutually acceptable language.
Re
jection under 35 U.S.C.
§
112(a)
The Office Action rejected claims 1-18 were rejected under 35 U.S.C. § 112(a) or 35 U.S.C. § 112, first paragraph as failing to comply with the written description requirement. Applicant hereby deletes the "specific distance" subject matter cited by the Examiner and respectfully requests withdrawal of these rejection.
Prior Art Rejections
The Office Action rejected claims 1, 7, and 13 under 35 U.S.C. § 102(a)(1) as anticipated by Pub. No. US2016/0167951 to Goida et al. ("Goida").
The Office Action rejected claims 2, 8, and 14 under 35 U.S.C. § 103 as unpatentable over God in view of Pub. No. US2018/0277395 to Masukawa et al. ("Masukawa").
The Office Action rejected claims 3, 6, 9, 12, 15, and 18 under 35 U.S.C. § 103 as unpatentable over Goida in view of Pub. No. US2004/0154164 to Kang ("Kang").
Claim 1, as amended, recites: "a plurality of routing layers, wherein each routing layer is distributed between two adjacent glass layers" (emphasis added). Similar subject matter appears in claims 7 and 13. Paragraph [0065], for example, provides support by disclosing that "a plurality of routing layers 2 may alternatively be distributed between two adjacent glass layers 15. For example, two or more routing layers 2 are stacked and located between two adjacent glass layers 15." This is a modified version of subject matter from claims 2 and 14.
The Office Action conceded that Goida did not disclose this subject matter. To remedy this deficiency, the Examiner cited paragraph [0039] of Masukawa for a glass substrate. Masukawa actually discloses a ceramic substrate 101 and a green sheet laminate 280. Masukawa does not suggest or teach a plurality of routing layers, wherein each routing layer is distributed between two adjacent glass layers, so Masukawa does not remedy Goida's deficiencies.
The other references of record do not remedy Goida's deficiencies. Accordingly, claims 1, 7, and 13 are allowable over the references of record. Claims 2, 3, and 6 depend upon claim 1. Claims 8, 9, and 12 depend upon claim 7. Claims 14, 15, and 18 depend upon claim 13. Thus, claims 2, 3, 6, 8, 9, 12, 14, 15, and 18 are allowable due to their respective dependencies upon allowable claims. Therefore, Applicant respectfully requests withdrawal of these rejections.
CONCLUSION