Office Action 1: Non-Final Rejection (2023-11-08)
Rejection types: 102 - Lack of Novelty, 103 - Obviousness

CLAIMS:
Claims

What is claimed is:

1\. A method for forming a wide band gap semiconductor device, the method comprising:
forming a gate insulation layer on a wide band gap semiconductor substrate; and
annealing the gate insulation layer using at least a first reactive gas species and at least a second reactive gas species, wherein the first reactive gas species differs from the second reactive gas species.

2\. The method of claim 1, wherein annealing the gate insulation layer comprises at least a first annealing process and at least a second annealing process, wherein the second annealing process is performed after the first annealing process, wherein the first annealing process is performed in a reactive gas atmosphere comprising at least 0.lvol% of the first reactive gas species and at most O.lvol% of the second reactive gas species, and wherein the second annealing process is performed in a reactive gas atmosphere comprising at least 0.lvol% of the second reactive gas species and at most 0.lvol% of the first reactive gas species.

3\. The method of claim 1, wherein annealing the gate insulation layer is performed in a reactive gas atmosphere comprising at least 0.lvol% of the first reactive gas species and at least 0.lvol% of the second reactive gas species at the same time.

4\. The method of claim 1, wherein the first reactive gas species is one of nitric oxide, nitrous oxide, hydrogen, ammonia, hydrogen peroxide, nitric acid, water vapor, phosphoryl chloride, and oxygen, and wherein the second reactive gas species is another one of nitric oxide, nitrous oxide, hydrogen, ammonia, hydrogen peroxide, nitric acid, water vapor, phosphoryl chloride, and oxygen.

5\. The method of claim 1, wherein the first reactive gas species is diluted with an inert gas during the annealing of the gate insulation layer so that a volume percent of the first reactive gas species is at least lvol% and at most 50vol%, and wherein the first reactive gas species is nitric oxide.
6\. The method of claim 1, wherein the second reactive gas species is diluted with an inert gas during the annealing of the gate insulation layer so that a volume percent of the second reactive gas species is at least 0.lvol% and at most lOvol%, and wherein the second reactive gas species is ammonia.

7\. The method of claim 1, further comprising:
after the annealing of the gate insulation layer using at least the first reactive gas species and at least the second reactive gas species, annealing the gate insulation layer in an inert gas atmosphere.

8\. The method of claim 7, wherein the annealing of the gate insulation layer in the inert gas atmosphere comprises:
heating the gate insulation layer in the inert gas atmosphere at a temperature lower than 12000C to reduce a hydrogen concentration within the gate insulation layer.

9\. The method of claim 8, wherein the first reactive gas species and/or the second reactive gas species comprises at least one of nitric oxide and ammonia, and wherein a volume percent of the first reactive gas species and/or the second reactive gas species is at least 0.lvol%.

10\. The method of claim 8, wherein the first reactive gas species and/or the second reactive gas species comprises at least 5vol% nitric oxide, wherein the inert gas species comprises at least 90% nitrogen, and wherein a duration of the annealing in the inert gas species is shorter than a duration of the annealing in the first reactive gas species and/or the second reactive gas species.

11\. The method of claim 8, wherein the inert gas atmosphere has a concentration of oxygen of at most 0.5vol%.

12\. The method of claim 8, wherein a duration of each annealing of the gate insulation layer is at least 10 minutes and at most 600 minutes.

13\. The method of claim 8, wherein an annealing temperature of each annealing of the gate insulation layer is at least 6000C and at most 12000C.

14\. The method of claim 1, further comprising: before the annealing of the gate insulation layer using at least the first reactive gas species and at least the second reactive gas species, heating the gate insulation layer in an inert gas atmosphere at a temperature of at least 9500C.

15\. The method of claim 1, further comprising:
after the annealing of the gate insulation layer using at least the first reactive gas species and at least the second reactive gas species, forming a gate electrode on the gate insulation layer.

16\. The method of claim 15, wherein the gate electrode is a gate trench electrode that extends from a surface of the wide band gap semiconductor substrate into the wide band gap semiconductor substrate.

17\. The method of claim 1, wherein the wide band gap semiconductor substrate is a silicon carbide substrate.

18\. The method of claim 1, wherein the gate insulation layer is a silicon dioxide layer.

19\. A method for forming a wide band gap semiconductor device, the method comprising:
forming a gate insulation layer on a wide band gap semiconductor substrate; and
annealing the gate insulation layer using at least a first reactive gas species and at least a second reactive gas species, wherein the first reactive gas species differs from the second reactive gas species, wherein the annealing of the gate insulation layer is performed in a reactive gas atmosphere comprising at least 0.lvol% of the first reactive gas species and at least 0.lvol% of the second reactive gas species at the same time, wherein a duration of each annealing of the gate insulation layer is at least 10 minutes and at most 600 minutes.

OFFICE ACTION:
DETAILED ACTION
Notice of Pre-AIA  or AIA  Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claim 19 is objected to because of the following informalities: Claim 19 recites the limitations “wherein a duration of each annealing of the gate insulation layer is at least 10 minutes and at most 600 minutes” However there is only a recitation of one annealing performed. It is believed that the word “each” should be removed in order to correct this informality.  Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 3, 4, 7, 8, 11, 13, 15, and 17-19 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US 20160126092 (Makifuchi et al).
Concerning claim 1, Makifuchi discloses a method for forming a wide band gap semiconductor device (Fig. 7), the method comprising: forming a gate insulation layer (18) on a wide band gap semiconductor substrate (7) ([0063] and [0068]); and annealing the gate insulation layer using at least a first reactive gas species and at least a second reactive gas species, wherein the first reactive gas species differs from the second reactive gas species ([0068], note that the a POA (post oxidation anneal) is done in an atmosphere including H2 and H2O with H2  being the first reactive gas species and H2O being the second reactive gas species).
Continuing to claim 3, Makifuchi discloses wherein annealing the gate insulation layer is performed in a reactive gas atmosphere comprising at least 0.1 vol% of the first reactive gas species and at least 0.1 vol% of the second reactive gas species at the same time ([0068], note that the concentration of H2O is set to be 73% with the remaining being H2).
Considering claim 4, Makifuchi discloses wherein the first reactive gas species is one of nitric oxide, nitrous oxide, hydrogen, ammonia, hydrogen peroxide, nitric acid, water vapor, phosphoryl chloride, and oxygen ([0068], H2  being the first reactive gas species), and wherein the second reactive gas species is another one of nitric oxide, nitrous oxide, hydrogen, ammonia, hydrogen peroxide, nitric acid, water vapor, phosphoryl chloride, and oxygen ([0068], H2O being the second reactive gas species).
Referring to claim 7, Makifuchi discloses after the annealing of the gate insulation layer using at least the first reactive gas species and at least the second reactive gas species, annealing the gate insulation layer in an inert gas atmosphere ([0068], note that a heating is done after the POA in a nitrogen (inert) atmosphere).
Regarding claim 8, Makifuchi discloses wherein the annealing of the gate insulation layer in the inert gas atmosphere comprises: heating the gate insulation layer in the inert gas atmosphere at a temperature lower than 1200°C to reduce a hydrogen concentration within the gate insulation layer ([0068], note that the heating is done directly after the POA which is completed at 1000 ºC with no recitation of the temperature being increased and therefore the examiner is interpreting that the temperature of the heating is done at 1000 ºC).
Pertaining to claim 11, Makifuchi discloses wherein the inert gas atmosphere has a concentration of oxygen of at most 0.5vol% ([0068], note that a heating is done after the POA in a nitrogen (inert) atmosphere which the examiner interprets to mean 100 vol% which would make the concentration of oxygen 0 vol%).
As to claim 13, Makifuchi discloses wherein an annealing temperature of each annealing of the gate insulation layer is at least 600°C and at most 1200°C ([0068], note that the heating is done directly after the POA which is completed at 1000 ºC with no recitation of the temperature being increased and therefore the examiner is interpreting that the temperature of the heating is done at 1000 ºC).
Concerning claim 15, Makifuchi discloses further comprising: after the annealing of the gate insulation layer using at least the first reactive gas species and at least the second reactive gas species, forming a gate electrode (19) on the gate insulation layer (Fig. 7 and [0071]).
Continuing to claim 17, Makifuchi discloses wherein the wide band gap semiconductor substrate is a silicon carbide substrate ([0063]).
Considering claim 18, Makifuchi discloses wherein the gate insulation layer is a silicon dioxide layer ([0068]).
Referring to claim 19, Makifuchi discloses a method for forming a wide band gap semiconductor device (Fig. 7), the method comprising: forming a gate insulation layer (18) on a wide band gap semiconductor substrate (7) ([0063] and [0068]); and annealing the gate insulation layer using at least a first reactive gas species and at least a second reactive gas species, wherein the first reactive gas species differs from the second reactive gas species ([0068], note that the a POA (post oxidation anneal) is done in an atmosphere including H2 and H2O with H2  being the first reactive gas species and H2O being the second reactive gas species), wherein annealing the gate insulation layer is performed in a reactive gas atmosphere comprising at least 0.1 vol% of the first reactive gas species and at least 0.1 vol% of the second reactive gas species at the same time ([0068], note that the concentration of H2O is set to be 73% with the remaining being H2), wherein a duration of each annealing of the gate insulation layer is at least 10 minutes and at most 600 minutes ([0068], note that the POA (post oxidation anneal) is performed for 30 minutes).
Claim(s) 1,  3, and 18 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US 9945030 (DesOrmeaux et al).
Regarding claim 1, DesOrmeaux discloses a method for forming a wide band gap semiconductor device (Fig. 10), the method comprising: forming a gate insulation layer (col. 5 lines 1-5) on a wide band gap semiconductor substrate (col. 4 lines 35-41, note that a GaN substrate is disclosed as one of the substrate materials which the examiner is relying on being the wide and gap semiconductor substrate); and annealing the gate insulation layer using at least a first reactive gas species and at least a second reactive gas species, wherein the first reactive gas species differs from the second reactive gas species (col. 5 lines 10-23, note that the atmosphere for the annealing is disclosed to be comprise 1% to 10% by volume hydrogen gas and 90% to 99% by volume nitrogen gas, inert gas, or a mixture of both, and the atmosphere comprising 0.001% to 100% by volume hydrogen with hydrogen being the second reactive gas species and nitrogen being the first reactive gas species).
Pertaining to claim 3, DesOrmeaux discloses wherein annealing the gate insulation layer is performed in a reactive gas atmosphere comprising at least 0.1 vol% of the first reactive gas species and at least 0.1 vol% of the second reactive gas species at the same time (col. 5 lines 10-23, note that the atmosphere for the annealing is disclosed to be comprise 1% to 10% by volume hydrogen gas and 90% to 99% by volume nitrogen gas, inert gas, or a mixture of both, with hydrogen being the second reactive gas species and nitrogen being the first reactive gas species).
As to claim 18,  DesOrmeaux discloses wherein the gate insulation layer is a silicon dioxide layer (col. 5 lines 1-5).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 2, 7, and  8 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 9945030 (DesOrmeaux et al) as applied to claim 1 above, and further in view of US 20160126092 (Makifuchi et al).
As to claim 2, DesOrmeaux discloses wherein annealing the gate insulation layer comprises at least a first annealing process (col. 5 lines 10-23, note that the atmosphere for the annealing is disclosed to be comprise 1% to 10% by volume hydrogen gas and 90% to 99% by volume nitrogen gas, inert gas, or a mixture of both, with hydrogen being the second reactive gas species and nitrogen being the first reactive gas species),  . . . . wherein the first annealing process is performed in a reactive gas atmosphere comprising at least 0.1 vol% of the first reactive gas species and at most 0.1 vol% of the second reactive gas species (col. 5 lines 10-23, note that the atmosphere for the annealing is disclosed to be comprise 1% to 10% by volume hydrogen gas and 90% to 99% by volume nitrogen gas, inert gas, or a mixture of both, with hydrogen being the second reactive gas species and nitrogen being the first reactive gas species).
DesOrmeaux does not disclose  at least a second annealing process wherein the second annealing process is performed after the first annealing process and wherein the second annealing process is performed in a reactive gas atmosphere comprising at least 0.l vol% of the second reactive gas species and at most 0.1vol% of the first reactive gas species. However Makifuchi discloses a method for forming a wide band gap semiconductor device (Fig. 7), the method comprising: forming a gate insulation layer (18) on a wide band gap semiconductor substrate (7) ([0063] and [0068]); and annealing the gate insulation layer using at least a first reactive gas species and at least a second reactive gas species, wherein the first reactive gas species differs from the second reactive gas species, at least a second annealing process wherein the second annealing process is performed after the first annealing process and wherein the second annealing process is performed in a reactive gas atmosphere comprising at least 0.l vol% of the second reactive gas species and at most 0.1vol% of the first reactive gas species ([0068], the heating is performed in a Hydrogen atmosphere in which no other gases are disclosed as being supplied so the vol% of the reactive gas atmosphere is 100% Hydrogen and therefore has at least 0.1 vol% of the first reactive gas and at most 0.1 vol% of the second reactive gas with the vol % of the second gas being 0%). Makifuchi also discloses that this process can reduce interface state density in silicon carbide semiconductor devices ([0003]). Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to perform a second annealing after the first anneal such that the second annealing process is performed in a reactive gas atmosphere comprising at least 0.l vol% of the second reactive gas species and at most 0.1vol% of the first reactive gas species as disclosed by Makifuchi in order to reduce interface state density in silicon carbide semiconductor devices.
Concerning claim 7, DesOrmeaux discloses  . . . . annealing of the gate insulation layer using at least the first reactive gas species and at least the second reactive gas species (col. 5 lines 10-23).
DesOrmeaux does not disclose after the annealing of the gate insulation layer using at least the first reactive gas species and at least the second reactive gas species,  annealing the gate insulation layer in an inert gas atmosphere.
However, Makifuchi discloses a method for forming a wide band gap semiconductor device (Fig. 7), the method comprising: forming a gate insulation layer (18) on a wide band gap semiconductor substrate (7) ([0063] and [0068]); and annealing the gate insulation layer using at least a first reactive gas species and at least a second reactive gas species, wherein the first reactive gas species differs from the second reactive gas species, and after the annealing of the gate insulation layer using at least the first reactive gas species and at least the second reactive gas species,  annealing the gate insulation layer in an inert gas atmosphere. ([0068], note that a heating is done after the POA in a nitrogen (inert) atmosphere). Makifuchi also discloses that this process can reduce interface state density in silicon carbide semiconductor devices ([0003]). Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to perform a second annealing after the first anneal such that the second annealing process is performed in a reactive gas atmosphere comprising at least 0.l vol% of the second reactive gas species and at most 0.1vol% of the first reactive gas species as disclosed by Makifuchi in order to reduce interface state density in silicon carbide semiconductor devices.
Continuing to claim 8, DesOrmeaux in view of Makifuchi discloses wherein the annealing of the gate insulation layer in the inert gas atmosphere comprises: heating the gate insulation layer in the inert gas atmosphere at a temperature lower than 1200°C to reduce a hydrogen concentration within the gate insulation layer (Makifuchi [0068], note that the heating is done directly after the POA which is completed at 1000 ºC with no recitation of the temperature being increased and therefore the examiner is interpreting that the temperature of the heating is done at 1000 ºC).
Claim(s) 5, 6, and 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 9945030 (DesOrmeaux et al) in view of US 20160126092 (Makifuchi et al) as applied to claim 1 above, and further in view of US 20140302687 (Ashihara et al).
Considering claim 5, DesOrmeaux in view of Makifuchi discloses wherein the first reactive gas species is diluted with an inert gas during the annealing of the gate insulation layer so that a volume percent of the first reactive gas species is at least 1vol% and at most 50vol% (DesOrmeaux col. 5 lines 10-23, note that the atmosphere for the annealing is disclosed to be comprise 1% to 10% by volume hydrogen gas and 90% to 99% by volume nitrogen gas, inert gas, or a mixture of both, with hydrogen being the second reactive gas species and nitrogen being the first reactive gas species),
DesOrmeaux in view of Makifuchi does not disclose wherein the first reactive gas species is nitric oxide. However, Ashihara discloses performing an annealing treatment on a silicon oxide insulating film in order to improve the quality of the film and using nitric oxide and ammonia as reaction gases for that annealing treatment ([0066]). Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to use nitric oxide as the first reactive species because it is known in the art to be a good reactive species for use in an annealing treatment on silicon oxide insulating layers to improve the quality of the film.
Referring to claim 6, DesOrmeaux in view of Makifuchi discloses wherein the second reactive gas species is diluted with an inert gas during the annealing of the gate insulation layer so that a volume percent of the second reactive gas species is at least 0.1vol% and at most 10vol% (col. 5 lines 10-23, note that the atmosphere for the annealing is disclosed to be comprise 1% to 10% by volume hydrogen gas and 90% to 99% by volume nitrogen gas, inert gas, or a mixture of both, with hydrogen being the second reactive gas species and nitrogen being the first reactive gas species)
DesOrmeaux in view of Makifuchi does not disclose wherein the second reactive gas species is ammonia. However, Ashihara discloses performing an annealing treatment on a silicon oxide insulating film in order to improve the quality of the film and using nitric oxide and ammonia as reaction gases for that annealing treatment ([0066]). Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to use ammonia as the second reactive species because it is known in the art to be a good reactive species for use in an annealing treatment on silicon oxide insulating layers to improve the quality of the film.
Regarding claim 9, DesOrmeaux in view of Makifuchi discloses. . . . wherein a volume percent of the first reactive gas species and/or the second reactive gas species is at least 0.1vol% (col. 5 lines 10-23, note that the atmosphere for the annealing is disclosed to be comprise 1% to 10% by volume hydrogen gas and 90% to 99% by volume nitrogen gas, inert gas, or a mixture of both, with hydrogen being the second reactive gas species and nitrogen being the first reactive gas species).
DesOrmeaux in view of Makifuchi does not disclose  wherein the first reactive gas species and/or the second reactive gas species comprises at least one of nitric oxide and ammonia. However, Ashihara discloses performing an annealing treatment on a silicon oxide insulating film in order to improve the quality of the film and using nitric oxide and ammonia as reaction gases for that annealing treatment ([0066]). Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to use nitric oxide  or ammonia as the first reactive or second reactive species because they are known in the art to be good reactive species for use in an annealing treatment on silicon oxide insulating layers to improve the quality of the film.
Claim(s) 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 9945030 (DesOrmeaux et al) in view of US 20160126092 (Makifuchi et al) as applied to claim 8 above, and further in view of US 20080026553 (Chua et al).
Pertaining to claim 10, DesOrmeaux in view of Makifuchi discloses wherein the inert gas species comprises at least 90% nitrogen (Makifuchi [0068], note that a heating is done after the POA in a nitrogen (inert) atmosphere).
DesOrmeaux in view of Makifuchi does not disclose  wherein the first reactive gas species and/or the second reactive gas species comprises at least 5 vol% nitric oxide and wherein a duration of the annealing in the inert gas species is shorter than a duration of the annealing in the first reactive gas species and/or the second reactive gas species. However, Chua discloses performing an annealing treatment on a silicon oxide insulating film and using nitric oxide and ammonia as reaction gases for that annealing treatment ([0047]). The selection of a known material based on its suitability for its intended use supported a prima facie obviousness determination in Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945). See MPEP 2144.07.  Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to use nitric oxide or ammonia as the first or second reactive species gas because they are known in the art to be good reactive species for use in an annealing treatment on silicon oxide insulating layers.
Additionally, Chua discloses an annealing treatment performed on the silicon oxide insulating layer in an inert atmosphere (note that the chamber is purged with Nitrogen and then an annealing treatment follows the purge and therefore the annealing is done in the purged nitrogen atmosphere) for a duration of 1 second to about 180 seconds ([0044] and [0046]). Chua discloses that process will increase quality and uniformity of the insulating layer ([0007]). Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to perform the annealing in an inert comprising nitrogen for the duration as disclosed by Chua in order to improve quality and uniformity of the insulating layer.
Claim(s) 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 20160126092 (Makifuchi et al) as applied to claim 1 above, and further in view of US 20080026553 (Chua et al).
As to claim 14, Makifuchi discloses . . . .annealing of the gate insulation layer using at least the first reactive gas species and at least the second reactive gas species ([0068]).
Makifuchi does not disclose before the annealing of the gate insulation layer using at least the first reactive gas species and at least the second reactive gas species heating the gate insulation layer in an inert gas atmosphere at a temperature of at least 950°C.
However, Chua discloses an annealing treatment performed on the silicon oxide insulating layer before a reactive annealing of the silicon oxide layer in an inert atmosphere (note that the chamber is purged with Nitrogen and then an annealing treatment follows the purge and therefore the annealing is done in the purged nitrogen atmosphere) at a temperature between 800 and 1200 degrees Celsius ([0044] and [0046]). Chua discloses that process will increase quality and uniformity of the insulating layer ([0007]). Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to perform the annealing in an inert comprising nitrogen for the duration as disclosed by Chua in order to improve quality and uniformity of the insulating layer.
Claim(s) 14 is/are rejected under 35 U.S.C. 103 as being unpatentable US 9945030 (DesOrmeaux et al) as applied to claim 1 above, and further in view of US 20080026553 (Chua et al).
As to claim 14, DesOrmeaux discloses . . . .annealing of the gate insulation layer using at least the first reactive gas species and at least the second reactive gas species (col. 5 lines 10-23).
DesOrmeaux does not disclose before the annealing of the gate insulation layer using at least the first reactive gas species and at least the second reactive gas species heating the gate insulation layer in an inert gas atmosphere at a temperature of at least 950°C.
However, Chua discloses an annealing treatment performed on the silicon oxide insulating layer before a reactive annealing of the silicon oxide layer in an inert atmosphere (note that the chamber is purged with Nitrogen and then an annealing treatment follows the purge and therefore the annealing is done in the purged nitrogen atmosphere) at a temperature between 800 and 1200 degrees Celsius ([0044] and [0046]). Chua discloses that process will increase quality and uniformity of the insulating layer ([0007]). Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to perform the annealing in an inert comprising nitrogen for the duration as disclosed by Chua in order to improve quality and uniformity of the insulating layer.
Claim(s) 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 20160126092 (Makifuchi et al) in view of US 20150214047 (Hama et al).
Considering claim 16, Makifuchi discloses forming a gate electrode on a silicon carbide substrate with a treated gate insulating film formed over the substrate.
Makifuchi does not disclose wherein the gate electrode is a gate trench electrode that extends from a surface of the wide band gap semiconductor substrate into the wide band gap semiconductor substrate. Hama discloses forming a gate insulating film on a silicon carbide substrate and performing an annealing process. A trench gate electrode is formed in the substrate. (Fig. 23). In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966) (The court held that the configuration of the claimed disposable plastic nursing container was a matter of choice which a person of ordinary skill in the art would have found obvious absent persuasive evidence that the particular configuration of the claimed container was significant.). See MPEP 2144.04 IV B. Therefore absent evidence that configuration of the gate is significant it would have been an obvious change in shape based on device design as disclosed by Hama.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US 20150259796 discloses treatments to a gate insulating layer ([0032]).


NEXT OFFICE ACTION: DETAILED ACTION
Notice of Pre-AIA  or AIA  Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 4, 8, 11-13, 15, 17, and 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 9945030 (DesOrmeaux et al) in view of US 20160126092 (Makifuchi et al).
Regarding claim 1, DesOrmeaux discloses a method for forming a wide band gap semiconductor device (Fig. 10), the method comprising: forming a gate insulation layer (col. 5 lines 1-5) on a wide band gap semiconductor substrate (col. 4 lines 35-41, note that a GaN substrate is disclosed as one of the substrate materials which the examiner is relying on being the wide and gap semiconductor substrate); performing a first annealing process during which the gate insulation layer is annealed using at least a first reactive gas species  (col. 5 lines 10-23, note that the atmosphere for the annealing is disclosed to be comprise 1% to 10% by volume hydrogen gas and 90% to 99% by volume nitrogen gas, inert gas, or a mixture of both, and the atmosphere comprising 0.001% to 100% by volume hydrogen with hydrogen being the second reactive gas species and nitrogen being the first reactive gas species) . . . a second reactive species (col. 5 lines 10-23, note that the atmosphere for the annealing is disclosed to be comprise 1% to 10% by volume hydrogen gas and 90% to 99% by volume nitrogen gas, inert gas, or a mixture of both, and the atmosphere comprising 0.001% to 100% by volume hydrogen with hydrogen being the second reactive gas species and nitrogen being the first reactive gas species), wherein the first annealing process is performed in a reactive gas atmosphere comprising at least 0.1 vol% of the first reactive gas species and at most 0.1 vol% of the second reactive gas species  (col. 5 lines 10-23, note that the atmosphere for the annealing is disclosed to be comprise 1% to 10% by volume hydrogen gas and 90% to 99% by volume nitrogen gas, inert gas, or a mixture of both, and the atmosphere comprising 0.001% to 100% by volume hydrogen with hydrogen being the second reactive gas species and nitrogen being the first reactive gas species).
DesOrmeaux does not disclose performing a second annealing process separate from the first annealing process and during which the gate insulation layer is annealed using at least a second reactive gas species and annealing the gate insulation layer in an inert gas atmosphere . . .wherein the second annealing process is performed in a reactive gas atmosphere comprising at least 0.1 vol;% of the second reactive species and at most 0.1 vol % of the first reactive species. However, Makifuchi discloses a method for forming a wide band gap semiconductor device (Fig. 7), the method comprising: forming a gate insulation layer (18) on a wide band gap semiconductor substrate (7) ([0054], [0063] and [0068]); and annealing the gate insulation layer using at least a first reactive gas species and at least a second reactive gas species, wherein the first reactive gas species differs from the second reactive gas species, performing a first annealing process ([0068], H2O being the first reactive gas species) at least a second annealing process wherein the second annealing process is performed after the first annealing process and wherein the second annealing process is performed in a reactive gas atmosphere comprising at least 0.l vol% of the second reactive gas species and at most 0.1vol% of the first reactive gas species ([0063] and [0068], a first annealing process is performed in a first atmosphere, and then another heating is performed in a Hydrogen atmosphere in which no other gases are disclosed as being supplied (this second heating is considered by examiner to be a separate annealing process because it is annealing process that is performed under different parameters i.e. a different reactive gas) so the vol% of the reactive gas atmosphere is 100% Hydrogen and therefore has at least 0.1 vol% of the first reactive gas and at most 0.1 vol% of the second reactive gas with the vol % of the second gas being 0% ), and after the annealing forming a gate electrode (19) on the gate insulation layer (Fig. 7 and [0071]). Makifuchi also discloses that this process can reduce interface state density in silicon carbide semiconductor devices ([0003]). Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the gate insulation formation process of DesOrmeaux to include a second annealing process separate from the first annealing process and during which the gate insulation layer is annealed using at least a second reactive gas species and annealing the gate insulation layer in an inert gas atmosphere, wherein the second annealing process is performed in a reactive gas atmosphere comprising at least 0.1 vol;% of the second reactive species and at most 0.1 vol % of the first reactive species as disclosed by Makifuchi in order to reduce interface state density in silicon carbide semiconductor devices.
Considering claim 4, DesOrmeaux in view of Makifuchi discloses wherein the first reactive gas species is one of nitric oxide, nitrous oxide, hydrogen, ammonia, hydrogen peroxide, nitric acid, water vapor, phosphoryl chloride, and oxygen (Makifuchi [0068], H2O being the first reactive gas species), and wherein the second reactive gas species is another one of nitric oxide, nitrous oxide, hydrogen, ammonia, hydrogen peroxide, nitric acid, water vapor, phosphoryl chloride, and oxygen (Makifuchi [0068], H2 being the second reactive gas species).
Continuing to claim 8, DesOrmeaux in view of Makifuchi discloses wherein the annealing of the gate insulation layer in the inert gas atmosphere comprises: heating the gate insulation layer in the inert gas atmosphere at a temperature lower than 1200°C to reduce a hydrogen concentration within the gate insulation layer (Makifuchi [0068], note that the heating is done directly after the POA which is completed at 1000 ºC with no recitation of the temperature being increased and therefore the examiner is interpreting that the temperature of the heating is done at 1000 ºC).
Pertaining to claim 11, DesOrmeaux in view of Makifuchi discloses wherein the inert gas atmosphere has a concentration of oxygen of at most 0.5vol% (Makifuchi [0068], note that a heating is done after the POA in a nitrogen (inert) atmosphere which the examiner interprets to mean 100 vol% which would make the concentration of oxygen 0 vol%).
According to claim 12, DesOrmeaux in view of Makifuchi discloses wherein a duration of each annealing of the gate insulation is at least 10 minutes and at most 600 minutes (Makifuchi [0054]).
As to claim 13, DesOrmeaux in view of Makifuchi discloses wherein an annealing temperature of each annealing of the gate insulation layer is at least 600°C and at most 1200°C (Makifuchi [0068], note that the heating is done directly after the POA which is completed at 1000 ºC with no recitation of the temperature being increased and therefore the examiner is interpreting that the temperature of the heating is done at 1000 ºC).
Considering claim 15, DesOrmeaux in view of Makifuchi discloses after the gate insulation layer is annealed, forming a gate electrode (Makifuchi 19)on the gate insulation layer (Fig. 7 and [0071]).
Referring to claim 17, DesOrmeaux in view of Makifuchi disclose wherein the wide band gap semiconductor substrate is a silicon carbide substrate (Makifuchi [0063]).
Considering claim 18, Makifuchi discloses wherein the gate insulation layer is a silicon dioxide layer (DesOrmeaux col. 5 lines 1-5 and Makifuchi [0068]).
Claim(s) 5, 6, and 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 9945030 (DesOrmeaux et al) in view of US 20160126092 (Makifuchi et al) as applied to claim 1 above, and further in view of US 20140302687 (Ashihara et al).
Considering claim 5, DesOrmeaux in view of Makifuchi discloses wherein the first reactive gas species is diluted with an inert gas during the annealing of the gate insulation layer so that a volume percent of the first reactive gas species is at least 1vol% and at most 50 vol% (DesOrmeaux col. 5 lines 10-23, note that the atmosphere for the annealing is disclosed to be comprise 1% to 10% by volume hydrogen gas and 90% to 99% by volume nitrogen gas, inert gas, or a mixture of both, with hydrogen being the second reactive gas species and nitrogen being the first reactive gas species),
DesOrmeaux in view of Makifuchi does not disclose wherein the first reactive gas species is nitric oxide. However, Ashihara discloses performing an annealing treatment on a silicon oxide insulating film in order to improve the quality of the film and using nitric oxide and ammonia as reaction gases for that annealing treatment ([0066]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to use nitric oxide as the first reactive species because it is known in the art to be a good reactive species for use in an annealing treatment on silicon oxide insulating layers to improve the quality of the film.
Referring to claim 6, DesOrmeaux in view of Makifuchi discloses wherein the second reactive gas species is diluted with an inert gas during the annealing of the gate insulation layer so that a volume percent of the second reactive gas species is at least 0.1vol% and at most 10vol% (col. 5 lines 10-23, note that the atmosphere for the annealing is disclosed to be comprise 1% to 10% by volume hydrogen gas and 90% to 99% by volume nitrogen gas, inert gas, or a mixture of both, with hydrogen being the second reactive gas species and nitrogen being the first reactive gas species)
DesOrmeaux in view of Makifuchi does not disclose wherein the second reactive gas species is ammonia. However, Ashihara discloses performing an annealing treatment on a silicon oxide insulating film in order to improve the quality of the film and using nitric oxide and ammonia as reaction gases for that annealing treatment ([0066]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to use ammonia as the second reactive species because it is known in the art to be a good reactive species for use in an annealing treatment on silicon oxide insulating layers to improve the quality of the film.
Regarding claim 9, DesOrmeaux in view of Makifuchi discloses. . . . wherein a volume percent of the first reactive gas species and/or the second reactive gas species is at least 0.1vol% (col. 5 lines 10-23, note that the atmosphere for the annealing is disclosed to be comprise 1% to 10% by volume hydrogen gas and 90% to 99% by volume nitrogen gas, inert gas, or a mixture of both, with hydrogen being the second reactive gas species and nitrogen being the first reactive gas species).
DesOrmeaux in view of Makifuchi does not disclose  wherein the first reactive gas species and/or the second reactive gas species comprises at least one of nitric oxide and ammonia. However, Ashihara discloses performing an annealing treatment on a silicon oxide insulating film in order to improve the quality of the film and using nitric oxide and ammonia as reaction gases for that annealing treatment ([0066]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to use nitric oxide  or ammonia as the first reactive or second reactive species because they are known in the art to be good reactive species for use in an annealing treatment on silicon oxide insulating layers to improve the quality of the film.
Claim(s) 10 and 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 9945030 (DesOrmeaux et al) in view of US 20160126092 (Makifuchi et al) as applied to claim 1 above, and further in view of US 20080026553 (Chua et al).
Pertaining to claim 10, DesOrmeaux in view of Makifuchi discloses wherein the inert gas atmosphere comprises at least 90% nitrogen (Makifuchi [0068], note that a heating is done after the POA in a nitrogen (inert) atmosphere).
DesOrmeaux in view of Makifuchi does not disclose  wherein the first reactive gas species and/or the second reactive gas species comprises at least 5 vol% nitric oxide and wherein a duration of the annealing in the inert gas atmosphere is shorter than a duration of the annealing in the first reactive gas species and/or the second reactive gas species. However, Chua discloses performing an annealing treatment on a silicon oxide insulating film and using nitric oxide and ammonia as reaction gases for that annealing treatment ([0047]). The selection of a known material based on its suitability for its intended use supported a prima facie obviousness determination in Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945). See MPEP 2144.07.  Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to use nitric oxide or ammonia as the first or second reactive species gas because they are known in the art to be good reactive species for use in an annealing treatment on silicon oxide insulating layers.
Additionally, Chua discloses an annealing treatment performed on the silicon oxide insulating layer in an inert atmosphere (note that the chamber is purged with Nitrogen and then an annealing treatment follows the purge and therefore the annealing is done in the purged nitrogen atmosphere) for a duration of 1 second to about 180 seconds ([0044] and [0046]). Chua discloses that process will increase quality and uniformity of the insulating layer ([0007]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to perform the annealing in an inert comprising nitrogen for the duration as disclosed by Chua in order to improve quality and uniformity of the insulating layer.
As to claim 14, DesOrmeaux in view of Makifuchi the gate insulation layer is annealed.
DesOrmeaux in view of Makifuchi does not disclose before the gate insulation layer is annealed heating the gate insulation layer in an inert gas atmosphere at a temperature of at least 950°C.
However, Chua discloses an annealing treatment performed on the silicon oxide insulating layer before a reactive annealing of the silicon oxide layer in an inert atmosphere (note that the chamber is purged with Nitrogen and then an annealing treatment follows the purge and therefore the annealing is done in the purged nitrogen atmosphere) at a temperature between 800 and 1200 degrees Celsius ([0044] and [0046]). Chua discloses that process will increase quality and uniformity of the insulating layer ([0007]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to perform the annealing in an inert comprising nitrogen for the duration as disclosed by Chua in order to improve quality and uniformity of the insulating layer.
Claim(s) 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 9945030 (DesOrmeaux et al) in view of US 20160126092 (Makifuchi et al) as applied to claim 1 above, and further in view of US 20150214047 (Hama et al).
Considering claim 16, DesOrmeaux in view of Makifuchi  discloses forming a gate electrode on a silicon carbide substrate with a treated gate insulating film formed over the substrate.
DesOrmeaux in view of Makifuchi does not disclose wherein the gate electrode is a gate trench electrode that extends from a surface of the wide band gap semiconductor substrate into the wide band gap semiconductor substrate. Hama discloses forming a gate insulating film on a silicon carbide substrate and performing an annealing process. A trench gate electrode is formed in the substrate. (Fig. 23). In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966) (The court held that the configuration of the claimed disposable plastic nursing container was a matter of choice which a person of ordinary skill in the art would have found obvious absent persuasive evidence that the particular configuration of the claimed container was significant.). See MPEP 2144.04 IV B. Therefore, absent evidence that configuration of the gate is significant it would have been an obvious change in shape based on device design as disclosed by Hama.
Claim(s) 20-24, 26, and 27 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 9945030 (DesOrmeaux et al) in view of US 20160126092 (Makifuchi et al) and US 20150214047 (Hama et al).
Pertaining to claim 20, DesOrmeaux discloses a method for forming a wide band gap semiconductor device (Fig. 10), the method comprising: forming a gate insulation layer (col. 5 lines 1-5) on a wide band gap semiconductor substrate (col. 4 lines 35-41, note that a GaN substrate is disclosed as one of the substrate materials which the examiner is relying on being the wide and gap semiconductor substrate); annealing the gate insulation layer in a  reactive gas atmosphere that comprises at least a reactive gas species in an annealing tool (col. 5 lines 10-23, note that the atmosphere for the annealing is disclosed to be comprise 1% to 10% by volume hydrogen gas and 90% to 99% by volume nitrogen gas, inert gas, or a mixture of both, and the atmosphere comprising 0.001% to 100% by volume hydrogen with hydrogen being the second reactive gas species and nitrogen being the first reactive gas species)
DesOrmeaux does not disclose after annealing the gate insulation layer in the reactive gas atmosphere, annealing the gate insulation layer in an inert gas atmosphere without exposing the gate insulation layer to the atmosphere outside the annealing tool; and after annealing the gate insulation layer in the inert gas atmosphere, forming a gate electrode on the gate insulation layer, wherein the gate electrode is a gate trench electrode that extends from a surface of the wide band gap semiconductor substrate into the wide band gap semiconductor substrate, wherein the reactive gas species comprises at least one of nitric oxide and ammonia, wherein a volume percent of the reactive gas species is at least 0.1 vol%. However, Makifuchi discloses a method for forming a wide band gap semiconductor device (Fig. 7), the method comprising: forming a gate insulation layer (18) on a wide band gap semiconductor substrate (7) ([0023], [0063], [0068], and [0077]); and annealing the gate insulation layer using at least a first reactive gas species ([0023] and [0077], it is noted that the examiner is interpreting the formation of the gate insulation  and POA as the annealing step), annealing the gate insulation layer in an inert atmosphere ([0068], note that a heating is done after the POA in a nitrogen (inert) atmosphere), and after the annealing forming a gate electrode (19) on the gate insulation layer (Fig. 7 and [0071]). Makifuchi also discloses that this process can reduce interface state density in silicon carbide semiconductor devices ([0003]). Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the gate insulation formation process of DesOrmeaux to include the annealing the gate insulation in a nitric oxide atmosphere, annealing the gate insulation layer after the initial annealing in an inert atmosphere and forming a gate electrode on the gate insulation layer as disclosed by Makifuchi in order to reduce interface state density in silicon carbide semiconductor devices.
Additionally, Hama discloses forming a gate insulating film on a silicon carbide substrate and performing an annealing process. A trench gate electrode is formed in the substrate. (Fig. 23). In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966) (The court held that the configuration of the claimed disposable plastic nursing container was a matter of choice which a person of ordinary skill in the art would have found obvious absent persuasive evidence that the particular configuration of the claimed container was significant.). See MPEP 2144.04 IV B. Therefore, absent evidence that configuration of the gate is significant it would have been an obvious change in shape based on device design as disclosed by Hama.
Regarding claim 21, DesOrmeaux in view of Makifuchi and Hama disclose wherein the reactive gas species comprises at least 5 vol% nitric oxide and the inert gas atmosphere comprises at least 90 % nitrogen, and wherein a duration of the annealing in the inert gas atmosphere is shorter than a duration of the annealing in the reactive gas species (Makifuchi [0054] and [0077]).
Referring to claim 22, DesOrmeaux in view of Makifuchi and Hama disclose wherein the inert gas atmosphere has a concentration of oxygen of at most 0.5 vol% (Makifuchi [0068], note that a heating is done after the POA in a nitrogen (inert) atmosphere and there is no recitation of any other gases being present so the examiner is interpreting the vol% of Nitrogen to be 100%).
Regarding claim 23,  DesOrmeaux in view of Makifuchi and Hama disclose wherein a duration of the annealing of the gate insulation layer in the reactive gas atmosphere is at least 10 minutes and at most 600 minutes (Makifuchi [0054]).
As to claim 24, DesOrmeaux in view of Makifuchi and Hama disclose wherein an annealing temperature of the annealing of the gate insulation layer in the reactive gas atmosphere and/or in the inert gas atmosphere is at least 600 °C and at most 1200 °C (Makifuchi [0068], note that the heating is done directly after the POA which is completed at 1000 ºC with no recitation of the temperature being increased and therefore the examiner is interpreting that the temperature of the heating is done at 1000 ºC).
Concerning claim 26, DesOrmeaux in view of Makifuchi disclose wherein the wide band gap semiconductor substrate is a silicon carbide substrate (Makifuchi [0063]).
Considering claim 27, Makifuchi discloses wherein the gate insulation layer is a silicon dioxide layer (Makifuchi [0068]).
Claim(s) 25 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 9945030 (DesOrmeaux et al) in view of US 20160126092 (Makifuchi et al) and US 20150214047 (Hama et al), as applied to claim 20 above and further in view of US 20080026553 (Chua et al).
Regarding claim 25, DesOrmeaux in view of Makifuchi and Hama disclose the gate insulation layer is annealed.
DesOrmeaux in view of Makifuchi and Hama does not disclose before the gate insulation layer is annealed heating the gate insulation layer in an inert gas atmosphere at a temperature of at least 950°C.
Chua discloses an annealing treatment performed on the silicon oxide insulating layer in an inert atmosphere (note that the chamber is purged with Nitrogen and then an annealing treatment follows the purge and therefore the annealing is done in the purged nitrogen atmosphere) for a duration of 1 second to about 180 seconds ([0044] and [0046]). Chua discloses that process will increase quality and uniformity of the insulating layer ([0007]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to perform the annealing in an inert comprising nitrogen for the duration as disclosed by Chua in order to improve quality and uniformity of the insulating layer.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action.  Accordingly, THIS ACTION IS MADE FINAL.  See MPEP § 706.07(a).  Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action.  In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action.  In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.

CITED REFERENCE SUMMARIES: Ref US20160126092A1: Claims:
A silicon carbide semiconductor device, comprising: a silicon carbide semiconductor substrate; and a gate insulating film provided on the silicon carbide semiconductor substrate to form an interface therebetween and being comprised of at least one layer of one of an oxide film, a nitride film, and an oxynitride film, wherein a region that includes the interface of the silicon carbide semiconductor substrate and the gate insulating film has segregated therein hydrogen (H) or hydroxyl groups (OH), and has a width ranging from 0.5 nm to 10 nm.
a silicon carbide semiconductor substrate; and
a gate insulating film provided on the silicon carbide semiconductor substrate to form an interface therebetween and being comprised of at least one layer of one of an oxide film, a nitride film, and an oxynitride film,
wherein a region that includes the interface of the silicon carbide semiconductor substrate and the gate insulating film has segregated therein hydrogen (H) or hydroxyl groups (OH), and has a width ranging from 0.5 nm to 10 nm.
The silicon carbide semiconductor device according to claim 1 , wherein from 1Ã10 21 atoms/cm 3 to 1Ã10 22 atoms/cm 3 of the hydrogen (H) or hydroxyl groups (OH) are present in said region.
A method of manufacturing a silicon carbide semiconductor device, comprising: providing a silicon carbide semiconductor substrate; forming a gate insulating film on the silicon carbide semiconductor substrate that is at least one layer comprised of one of an oxide film, a nitride film, and an oxynitride film; and heat treating after the forming the gate insulating film, in an atmosphere that includes hydrogen (H 2 ) gas and water vapor (H 2 O) without including dry oxygen (O 2 ) gas.
providing a silicon carbide semiconductor substrate;
forming a gate insulating film on the silicon carbide semiconductor substrate that is at least one layer comprised of one of an oxide film, a nitride film, and an oxynitride film; and
heat treating after the forming the gate insulating film, in an atmosphere that includes hydrogen (H 2 ) gas and water vapor (H 2 O) without including dry oxygen (O 2 ) gas.
The manufacturing method according to claim 3 , further comprising cooling after the heat treating, wherein the atmosphere during at least one of heating in the heat treating and the cooling after the heat treating is one of hydrogen (H 2 ) gas and diluted hydrogen (H 2 ) gas.
The manufacturing method according to claim 3 , further comprising cooling after the heat treating, and before the cooling after the heat treating, switching the atmosphere to one of hydrogen (H 2 ) gas and diluted hydrogen (H 2 ) gas and maintaining the switched atmosphere for a predetermined period of time.
cooling after the heat treating, and
before the cooling after the heat treating, switching the atmosphere to one of hydrogen (H 2 ) gas and diluted hydrogen (H 2 ) gas and maintaining the switched atmosphere for a predetermined period of time.
The manufacturing method according to claim 3 , further comprising heat treating at a predetermined temperature in an atmosphere of one of hydrogen (H 2 ) gas and diluted hydrogen (H 2 ) gas, after the heat treating after the forming the gate insulating film.
The manufacturing method according to claim 3 , further comprising, after the heat treating after the forming the gate insulating film, heat treating at a predetermined temperature in an inert gas atmosphere comprised of at least one of nitrogen, helium, and argon.
The manufacturing method according to claim 3 , further comprising, including a gas that includes oxygen (O 2 ) without including water vapor (H 2 O) so that thermal oxidation takes place during the forming the gate insulating film.
The manufacturing method according to claim 3 , further comprising, during the forming the gate insulating film, thermal oxynitriding in a gas atmosphere that includes at least one of nitrous oxide and nitric oxide.
The manufacturing method according to claim 3 , further comprising, during the forming the gate insulating film, thermal oxidizing in a gas atmosphere that includes at least oxygen (O 2 ) and water vapor (H 2 O).
The manufacturing method according to claim 3 , wherein, during the forming the gate insulating film, depositing an insulating film comprised of one of an oxide film, a nitride film, and an oxynitride film.
Ref US9945030B2: [content unavailable]
Ref US20140302687A1: [content unavailable]
Ref US20080026553A1: [content unavailable]
Ref US20160126092: Claims:
1. A silicon carbide semiconductor device, comprising:
a silicon carbide semiconductor substrate; and a gate insulating film provided on the silicon carbide semiconductor substrate to form an interface therebetween and being comprised of at least one layer of one of an oxide film, a nitride film, and an oxynitride film, wherein a region that includes the interface of the silicon carbide semiconductor substrate and the gate insulating film has segregated therein hydrogen (H) or hydroxyl groups (OH), and has a width ranging from 0.5 nm to 10 nm.
2. The silicon carbide semiconductor device according to claim 1, wherein from 1×1021 atoms/cm3 to 1×1022 atoms/cm3 of the hydrogen (H) or hydroxyl groups (OH) are present in said region.
3. A method of manufacturing a silicon carbide semiconductor device, comprising:
providing a silicon carbide semiconductor substrate; forming a gate insulating film on the silicon carbide semiconductor substrate that is at least one layer comprised of one of an oxide film, a nitride film, and an oxynitride film; and heat treating after the forming the gate insulating film, in an atmosphere that includes hydrogen (H2) gas and water vapor (H2O) without including dry oxygen (O2) gas.
4. The manufacturing method according to claim 3, further comprising cooling after the heat treating, wherein the atmosphere during at least one of heating in the heat treating and the cooling after the heat treating is one of hydrogen (H2) gas and diluted hydrogen (H2) gas.
5. The manufacturing method according to claim 3, further comprising
cooling after the heat treating, and before the cooling after the heat treating, switching the atmosphere to one of hydrogen (H2) gas and diluted hydrogen (H2) gas and maintaining the switched atmosphere for a predetermined period of time.
6. The manufacturing method according to claim 3, further comprising heat treating at a predetermined temperature in an atmosphere of one of hydrogen (H2) gas and diluted hydrogen (H2) gas, after the heat treating after the forming the gate insulating film.
7. The manufacturing method according to claim 3, further comprising, after the heat treating after the forming the gate insulating film, heat treating at a predetermined temperature in an inert gas atmosphere comprised of at least one of nitrogen, helium, and argon.
8. The manufacturing method according to claim 3, further comprising, including a gas that includes oxygen (O2) without including water vapor (H2O) so that thermal oxidation takes place during the forming the gate insulating film.
9. The manufacturing method according to claim 3, further comprising, during the forming the gate insulating film, thermal oxynitriding in a gas atmosphere that includes at least one of nitrous oxide and nitric oxide.
10. The manufacturing method according to claim 3, further comprising, during the forming the gate insulating film, thermal oxidizing in a gas atmosphere that includes at least oxygen (O2) and water vapor (H2O).
11. The manufacturing method according to claim 3, wherein, during the forming the gate insulating film, depositing an insulating film comprised of one of an oxide film, a nitride film, and an oxynitride film.
Ref US20140302687: Claims:
1. A substrate processing apparatus comprising:
a reaction chamber configured to process a substrate; a vaporizer including:
a vaporization container supplied with a processing liquid including hydrogen peroxide or hydrogen peroxide and water;
a processing liquid supply unit configured to supply the processing liquid to the vaporization container; and
a heating unit configured to heat the vaporization container;
 a gas supply unit configured to supply a processing gas generated by the vaporizer into the reaction chamber; an exhaust unit configured to exhaust an inner atmosphere of the reaction chamber; and a control unit configured to control the heating unit and the processing liquid supply unit in a manner that the processing liquid supply unit supplies the processing liquid to the vaporization container while the heating unit heats the vaporization container.
2. The substrate processing apparatus according to claim 1, wherein the processing liquid supply unit comprises a processing liquid dropping nozzle configured to add the processing liquid in drops.
3. The substrate processing apparatus according to claim 1, wherein a film including a silazane bonding is disposed on the substrate.
4. The substrate processing apparatus according to claim 3, wherein the film including the silazane bonding is a polysilazane film.
5. The substrate processing apparatus according to claim 1, wherein the control unit is configured to control the heating unit to a temperature equal to or higher than a boiling point of the processing liquid.
6. The substrate processing apparatus according to claim 1, wherein the control unit is configured to control the exhaust unit to stop exhausting the inner atmosphere of the reaction chamber when the processing gas generated by the vaporizer is supplied into the reaction chamber.
7. A method of manufacturing a semiconductor device, comprising:
(a) loading a substrate into a reaction chamber; (b) heating a vaporization container of a vaporizer; (c) supplying a processing liquid including hydrogen peroxide or hydrogen peroxide and water into the vaporization container; and (d) supplying a processing gas generated by the vaporizer into the reaction chamber.
8. The method according to claim 7, wherein a film including a silazane bonding is formed on the substrate.
9. The method according to claim 8, wherein the film including the silazane bonding is a polysilazane film.
10. The method according to claim 7, wherein (b) comprises heating the vaporization container to a temperature equal to or higher than a boiling point of the processing liquid.
11. The method according to claim 7, wherein (d) comprises stopping exhausting an inner atmosphere of the reaction chamber.
12. A vaporizer comprising:
a processing liquid supply unit configured to supply a processing liquid including hydrogen peroxide or a mixed liquid of hydrogen peroxide and water to a vaporization container; a heating unit configured to heat the vaporization container; and an exhaust port configured to discharge a processing gas generated from the processing liquid.
13. The vaporizer according to claim 12, further comprising a temperature controller configured to control the heating unit to heat the vaporization container to a temperature equal to or higher than a boiling point of the processing liquid while the processing liquid supply unit supplies the processing liquid to the vaporization container.
14. The vaporizer according to claim 13, further comprising a thermal conductive member disposed at at least one of the inside and the outside of the vaporization container.
15. The vaporizer according to claim 13, further comprising a residual liquid prevention unit installed in the vaporization container.
Ref US20080026553: Claims:
1. A method for forming gate dielectric layers on a substrate, comprising:
forming a silicon oxide layer on a substrate; plasma treating the silicon oxide layer; depositing a silicon nitride layer on the silicon oxide layer by an ALD process; and thermal annealing the substrate.
2. The method of claim 1, wherein the step of plasma treating the silicon oxide layer further comprises:
flowing an inert gas into a plasma treatment chamber; and forming a plasma by the inert gas.
3. The method of claim 2, wherein the step of flowing the inert gas further comprises:
flowing the inert gas between about 50 sccm and about 750 sccm into the plasma treatment chamber.
4. The method of claim 2, wherein the step of forming a plasma further comprises:
applying a RF power between about 500 Watts and about 3000 Watts.
5. The method of claim 2, wherein the inert gas is selected from a group consisting of Ar, He, Ne, Xe, and the combination thereof.
6. The method of claim 2, wherein the inert gas is a nitrogen containing gas.
7. The method of claim 6, wherein the treated silicon oxide layer treated by the nitrogen containing gas has a nitrogen concentration between about 0.2 E15 atoms/cm2 to about 1 E15 atoms/cm2.
8. The method of claim 1, further comprising:
precleaning the substrate prior to forming the silicon oxide layer.
9. The method of claim 1, wherein the step of forming the silicon oxide layer, further comprises:
forming the silicon oxide layer with a thickness less than 15 Å.
10. The method of claim 1, wherein depositing the silicon nitride layer further comprises:
depositing the silicon nitride with a thickness less than 15 Å.
11. The method of claim 1, wherein the step of depositing the silicon nitride layer further comprises:
alternatively flowing a silicon containing gas and a nitrogen containing gas into an ALD chamber.
12. The method of claim 11, wherein the step of flowing further comprises:
flowing the silicon containing gas into the ALD chamber between about 5 sccm and about 500 sccm; and flowing the nitrogen containing gas into the ALD chamber between about 1000 sccm and about 5000 sccm.
13. The method of claim 11, wherein the nitrogen containing gas is at least one of NH3, N2, N2H4 or N2O.
14. The method of claim 11, wherein the silicon containing gas is at least one of SiH4, Si2H6, dichlorosilane (DCS), tetrachlorosilane (TCS) or hexachlorodisilane (HCD).
15. The method of claim 1, wherein the silicon oxide layer and the silicon nitride layer form a gate dielectric layer.
16. The method of claim 1, wherein the step of plasma treating the silicon oxide layer further comprises:
creating nucleation sites on the treated silicon oxide layer.
17. A method for forming gate dielectric layers on a substrate, comprising:
precleaning a substrate; forming a silicon oxide layer on the substrate; plasma treating the silicon oxide layer; depositing a silicon nitride layer on the silicon oxide layer by an ALD process; and thermal annealing the substrate, wherein the formed silicon oxide layer and the silicon nitride layer form a gate dielectric layer.
18. The method of claim 17, wherein the plasma treating the silicon oxide layer further comprises:
creating nucleation sites on the treated silicon oxide layer.
19. The method of claim 17, wherein the formed silicon oxide layer and the silicon nitride layer has a total thickness less than 30 Å.
20. A method for forming a gate structure, comprising:
precleaning a substrate; forming a silicon oxide layer on the substrate; plasma treating the silicon oxide layer; depositing a silicon nitride layer on the silicon oxide layer by an ALD process; thermal annealing the substrate, wherein the formed silicon oxide layer and the silicon nitride layer has a total thickness less than 30 Å and forms a gate dielectric; forming a gate electrode on the gate dielectric; and forming source and drain regions in the substrate proximate the gate electrode.
Ref US20150214047: Claims:
1. A method for manufacturing a semiconductor device, comprising the steps of:
(a1) preparing a silicon carbide substrate; (b1) forming a source/drain region in the silicon carbide substrate; (c1) forming a first insulating film over the top surface of the silicon carbide substrate; (d1) carrying out a first heat treatment accompanied by nitration on the first insulating film and the silicon carbide substrate in a first gas atmosphere; (e1) after the step (d1), carrying out a second heat treatment on the first insulating film and the silicon carbide substrate in a second gas atmosphere which is an inert gas, and (f1) after the step (e1), forming a gate electrode through the first insulating film over the silicon carbide substrate, wherein the gate electrode, the first insulating film and the source/drain region include a field effect transistor.
2. The method for manufacturing a semiconductor device according to claim 1 which further comprises the step of:
(e2) after the step (e1) and before the step (f1), exposing the first insulating film and the silicon carbide substrate to the atmosphere.
3. The method for manufacturing a semiconductor device according to claim 1,
wherein a third heat treatment is carried out on the silicon carbide substrate to form the first insulating film over the top surface of the silicon carbide substrate in the step (c1).
4. The method for manufacturing a semiconductor device according to claim 3,
wherein the third heat treatment is carried out in an atmosphere containing at least one selected from oxygen and vapor.
5. The method for manufacturing a semiconductor device according to claim 1,
wherein the first insulating film is formed by using an ALD or CVD method in the step (c1).
6. The method for manufacturing a semiconductor device according to claim 1, wherein the step (c1) has the substeps of:
(c2) carrying out a fourth heat treatment on the silicon carbide substrate to form a second insulating film over the top surface of the silicon carbide substrate, and (c3) forming a third insulating film over the second insulating film by using an ALD or CVD method to form the first insulating film including the second insulating film and the third insulating film.
7. The method for manufacturing a semiconductor device according to claim 6 which further comprises the step of:
(c4) after the step (c2) and before the step (c3), carrying out a fifth heat treatment accompanied by nitration on the second insulating film and the silicon carbide substrate in a third gas atmosphere.
8. The method for manufacturing a semiconductor device according to claim 1,
wherein the first gas contains at least one selected from dinitrogen monoxide, nitrogen monoxide and ammonia gases.
9. The method for manufacturing a semiconductor device according to claim 2,
wherein the first insulating film and the silicon carbide substrate having a temperature of 700° C. or lower are exposed to the atmosphere in the step (e2).
10. The method for manufacturing a semiconductor device according to claim 1,
wherein the second gas contains at least one selected from nitrogen, argon and helium gases.
11. The method for manufacturing a semiconductor device according to claim 1,
wherein the second heat treatment is carried out at 850° C. or higher.
12. The method for manufacturing a semiconductor device according to claim 1 which further comprises the step of:
(a2) after the step (a1) and before the step (b1), forming a groove in the main surface of the silicon carbide substrate,
wherein the gate electrode is formed in the groove in the step (f1).
Ref US20150259796: Claims:
1. A method of forming a thin film containing a doping element in a vacuum atmosphere, comprising:
supplying a source gas into a processing vessel being under the vacuum atmosphere through a source gas supply unit such that a source of the source gas is adsorbed onto a substrate in the processing vessel; repeating, a plurality of times, a sequence of operations of supplying a doping gas containing the doping element into the processing vessel through a doping gas supply unit, followed by sealing the doping gas inside the processing vessel, followed by vacuum-exhausting the processing vessel; supplying a reaction gas into the processing vessel through a reaction gas supply unit such that the reaction gas reacts with the source to produce a reaction product; and replacing an internal atmosphere of the processing vessel, the replacing being performed
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