Office Action 1: Non-Final Rejection (2025-03-14)
Rejection types: 102 - Lack of Novelty, 103 - Obviousness

CLAIMS:
LISTING OF CLAIMS:

The following Listing of Claims will replace all prior versions, and listings, of claims in the application.

1\. (Currently Amended) A planar light source comprising:
\[\[a\]\] one or more light sources each having a pair of electrodes onone face;
a light guide member covering the one or more light sources while the electrodes are exposed from the light guide member;
an insulating base;
 a wiring layer electrically connected to the electrodes and disposed on the insulating base;
a light reflective member interposed between the light guide member and the insulating base and defining, for each of the one or more light sources, a pair of first through holes at positions aligned with the electrodes on a one-to- one basis; and
for each of the one or more light sources, a pair of conducting members respectively disposed in the first through holes and electrically connecting the electrodes to the wiring layer.

2\. (Currently Amended) The planar light source according to claim 1, wherein the light reflective member is a first light reflective member, and
the planar light source further comprises a second light reflective member defining,for each of the one or more light sources, a second through hole at a position overlapping the first through holes in a plan view with the light source being disposed in the second through hole in the plan view.

3\. (Currently Amended) The planar light source according to claim 1, wherein for each of the one or more light sources:
a face of the wiring layer on a light reflective member side includes a pair of contact portions each facing a corresponding one of the first through holest\[\[,\]\] and each of the conducting members establishes electrical contact with a corresponding one of the contact portions.

4\. (Currently Amended) The planar lightsource according to claim 1, whereinfor each of the one or more light sources:
the wiring layer defines a pair of third through holes communicating with the first through holes ona one-to-one basisi\[\[,\]\] and each of the conductingmembers establishes electrical contact with the wiring layer at least on an inside of a corresponding one of the third through holes.

5\. (Currently Amended) The planar light source according to claim 4, wherein for each of the one or more light sources, each of the conducting members further establishes the electrical contact with the wiring layer on a face of the wiring layer opposite a face facing the light reflective member.

6\. (Currently Amended) The planar light source according to claim 1, whereinfor each of the one or more light sources, each of the conducting members includes a first conducting member disposed in a corresponding one of the first through holes and a secondconductingmember disposed between the first conductingmember and the wiring layer.

7\. (Currently Amended) The planar light source according to claim 1, further comprisingfor each of the one or more light sources, a light adjusting member disposed on the light guide member so as to oppose the light source via the light guide member.

8\. (Currently Amended) The planar light source according to claim 1, further comprising for each of the one or more light sources, a light reflecting member surrounding the light source.

9\. (Currently Amended) The planar light source according to claim l, wherein the one face of each of the one or more light sources has a region located between the pair of electrodes and facing the light reflective member.

10-21. (Canceled)1120

22\. (New) The planar light source according to claim 1, further comprising a light reflecting member that sections the light guide member such that each of the one or more light sources are surrounded by the light reflecting member.

23\. (New) The planar light source according to claim 1, wherein the wiring layer disposed on the insulating base is covered by a cover layer.

24\. (New) The planar light source according to claim 1, wherein an opening of each of the first through holes of each of the one or more light sources extends within an outline of the light source in the plan view.

25\. (New) The planar light source according to claim 1, wherein an opening of each of the first through holes of each of the one or more light sources has a shape that either substantially matches a shape of a corresponding one of the electrodes of the light source in the plan view, or extends within an outline of the corresponding one of the electrodes of the light source in the plan view.

Amendment dated December 15, 2024

26\. (New) The planar light source according to claim 1, wherein the light guide member has an upper face on which protrusions and/or indentations are formed.

OFFICE ACTION:
DETAILED ACTION
Notice of Pre-AIA  or AIA  Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA  35 U.S.C. 102 and 103 (or as subject to pre-AIA  35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA  to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1 is/are rejected under 35 U.S.C. 102 (a) (1) as being anticipated by Nakayama (US. Pub: 2011/0278618 A1) of record.
Regarding claim 1, Nakayama discloses (in at least fig. 4) a planar light source comprising: one or more light sources (11) each having a pair of electrodes (3) on one face; a light guide member (13) covering the one or more light sources (11) while the electrodes are exposed from the light guide member (13; see fig. 4); an insulating base (2); a wiring layer (12) electrically connected to the electrodes (3) and disposed on the insulating base (2); a light reflective member (6) interposed between the light guide member (13) and the insulating base (2) and defining, each of the one or more light sources (11), a pair of first through holes at positions aligned with the electrodes on a one-to-one basis (see fig. 4); and for each of the one or more light sources (11), a pair of conducting members (5) respectively disposed in the first through holes and electrically connecting the electrodes to the wiring layer (see fig. 4).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA  35 U.S.C. 102 and 103 (or as subject to pre-AIA  35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA  to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 2-9 and 22-26 is/are rejected under 35 U.S.C. 103 as being unpatentable over Nakayama (US. Pub: 2011/0278618 A1) of record in view of Chen (US. Pat: 6,531,328 A) of record.
Regarding claim 2, Nakayama discloses (in at least fig. 4) the light reflective member (6) is a first light reflective member (6a), and the planar light source further comprises a second light reflective member (6b) defining, for each of the one or more light sources (11), but is silent about a second through hole at a position overlapping the first through holes in a plan view with the light source being disposed in the second through hole in the plan view.
Chen discloses (in at least fig. 20) planar light source comprised of, in part, a second through hole (see fig. 20) at a position overlapping the first through holes in a plan view with the light source being disposed in the second through hole in the plan view (see fig. 20).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the planar light source of Nakayama with the second through hole of Chen at a position overlapping the first through holes in a plan view with the light source being disposed in the second through hole in the plan view, since it has been held that mere duplication of the essential working pats of a device involves only routine skill in the art.
Regarding claim 3, Nakayama discloses (in at least fig. 4) for each of the one or more light sources (11); a face of the wiring layer (12) on a light reflective member (6) side includes a pair of contact portions (3) each facing a corresponding one of the first through holes (see fig. 4); and each of the conducting members (5) establishes electrical contact with a corresponding one of the contact portions (3).
Regarding claim 4, Nakayama as modified by Chen discloses (in at least fig. 20 Chen) for each of the one or more light sources (3); the wiring layer defines a pair of third through holes (see fig. 20) communicating with the first through holes on a one-to-one basis (see fig. 20); and each of the conducting members (see fig. 20; i.e. the conducting members are formed in the through hole) establishes electrical contact with the wiring layer at least on an inside of a corresponding one of the third through holes (see fig. 20).
Regarding claim 5, Nakayama as modified by Chen discloses (in at least fig. 20 Chen) for each of the one or more light sources (3), each of the conducting members (see fig. 20) further establishes the electrical contact with the wiring layer on a face of the wiring layer opposite a face facing the light reflective member (see fig. 20).
Regarding claim 6, Nakayama as modified by Chen discloses (in at least fig. 20 Chen) for each of the one or more light sources (3), each of the conducting members includes a first conducting member disposed in a corresponding one of the first through holes (see fig. 20) and a second conducting member disposed between the first conducting member and the wiring layer (see fig. 20).
Regarding claim 7, Nakayama as modified by Chen discloses (in at least fig. 20 Chen) for each of the one or more light sources (3), but is silent about a light adjusting member disposed on the light guide member so as to oppose the light source via the light guide member.
However, it is well-known in the art to form a planar light source comprised of, in part, a light adjusting member disposed on the light guide member so as to oppose the light source via a light guide member. As evidence, Yamamoto et al. (US. Pub: 2018/0182840 A1) of record disclose (in at least fig. 1) a planar light source comprised of, in part, a light adjusting member (50) disposed on the light guide member (30A) so as to oppose the light source (20) via a light guide member (30A) to improve the contrast ratio of the display device ([0004]).
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the planar light source of Nakayama as modified by Chen for the benefit of adjusting the light thereby improving the contrast ratio of the device.
Regarding claim 8, Nakayama as modified by Chen discloses (in at least fig. 20 Chen) for each of the one or more light sources (3), a light reflecting member (16) surrounding the light source.
Regarding claim 9, Nakayama as modified by Chen discloses (in at least fig. 20 Chen) the one face of each of the one or more light sources (3) has a region located between the pair of electrodes and facing the light reflective member (16).
Regarding claim 22, Nakayama as modified by Chen discloses (in at least fig. 20 Chen) a light reflecting member (16) that sections the light guide member (5) such that each of the one or more light sources (3) are surrounded by the light reflecting member (16).
Regarding claim 23, Nakayama as modified by Chen discloses all the claimed limitations except for the wiring layer disposed on the insulating base is covered by a cover layer.
However, it is well-known in the art to form planar light source comprised of, in part, a wiring layer (38) disposed on the insulating base (37) that is covered by a cover layer (39) as evident by Watanabe et al. (US. Pub: 2020/0089056 A1) of record at least fig. 1.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to use the wiring layer teaching of Watanabe et al. in the device of Nakayama and Chen in order to provide to suitable protection to the wiring layer.
Regarding claim 24, Nakayama as modified by Chen discloses (in at least fig. 20 Chen) an opening of each of the first through holes of each of the one or more light sources (3) extends within an outline of the light source in the plan view (see fig. 20).
Regarding claim 25, Nakayama as modified by Chen discloses (in at least fig. 20 Chen) an opening of each of the first through holes of each of the one or more light sources (3) has a shape that either substantially matches a shape of a corresponding one of the electrodes of the light source in the plan view (see fig. 20), or extends within an outline of the corresponding one of the electrodes of the light source in the plan view (see fig. 20).
Regarding claim 26, Nakayama as modified by Chen discloses all the claimed limitations except for the light guide member has an upper face on which protrusions and/or indentations are formed.
However, it is well-known in the art to form planar light source comprised of, in part, a light guide member that has an upper face on which protrusions and/or indentations are formed in order to improve the brightness of the planar light source as evident by Watanabe et al. (US. Pub: 2019/0227382 A1) of record (at least fig. 14).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the planar light source of Nakayama and Chen with the light guide teaching of Watanabe et al. for the benefit of improving the brightness of the planar light source.
Conclusion


NEXT OFFICE ACTION: DETAILED ACTION
Notice of Pre-AIA  or AIA  Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA  as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-9, 22-27 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-19 of U.S. Patent No. 12,111,024 B2 in view of Chen (US. Pat: 6,531,328 A) of record.
Instant application # 18/888,086
U.S. Patent No. 12,111,024 B2
Chen (US. Pat: 6,531,328 A)
Claim 1 recites “A planar light source comprising: one or more light sources each having a pair of electrodes extending on one face of the one or more light sources within a perimeter of the one face of the one or more light sources in a plan view; a light guide member covering the one or more light sources while the electrodes are exposed from the light guide member; an insulating base having a first face and a second face, the second face opposite the first face and opposite the one or more light sources; a wiring layer electrically connected to the electrodes and disposed on the second face of the insulating base; a light reflective member interposed between the light guide member and the insulating base and defining, for each of the one or more light sources, a pair of first through holes at positions aligned with the electrodes on a one-to-one basis, an opening of each of the first through holes not running over an outline of the light source in the plan view; and for each of the one or more light sources, a pair of conducting members respectively disposed in the first through holes and electrically connecting the electrodes to the wiring layer.”
See claims 1 and 8;
Claim 2 recites “the light reflective member is a first light reflective member, and the planar light source further comprises a second light reflective member defining, for each of the one or more light sources, a second through hole at a position overlapping the first through holes in a plan view with the light source being disposed in the second through hole in the plan view.”
See claims 1 and 2;
Claim 3 recites “for each of the one or more light sources: a face of the wiring layer on a light reflective member side includes a pair of contact portions each facing a corresponding one of the first through holes; and each of the conducting members establishes electrical contact with a corresponding one of the contact portions.”
See claims 3 and 4;
Claim 4 recites “for each of the one or more light sources: the wiring layer defines a pair of third through holes communicating with the first through holes on a one-to-one basis; and each of the conducting members establishes electrical contact with the wiring layer at least on an inside of a corresponding one of the third through holes.”
Chen discloses (in at least fig. 20) for each of the one or more light sources (3); the wiring layer defines a pair of third through holes (see fig. 20) communicating with the first through holes on a one-to-one basis (see fig. 20); and each of the conducting members (see fig. 20; i.e. the conducting members are formed in the through hole) establishes electrical contact with the wiring layer at least on an inside of a corresponding one of the third through holes (see fig. 20).
Claim 5 recites “for each of the one or more light sources, each of the conducting members further establishes the electrical contact with the wiring layer on a face of the wiring layer opposite a face facing the light reflective member.”
Chen discloses (in at least fig. 20) for each of the one or more light sources (3), each of the conducting members (see fig. 20) further establishes the electrical contact with the wiring layer on a face of the wiring layer opposite a face facing the light reflective member (see fig. 20).
Claim 6 recites “for each of the one or more light sources, each of the conducting members includes a first conducting member disposed in a corresponding one of the first through holes and a second conducting member disposed between the first conducting member and the wiring layer.”
Chen discloses (in at least fig. 20) for each of the one or more light sources (3), each of the conducting members includes a first conducting member disposed in a corresponding one of the first through holes (see fig. 20) and a second conducting member disposed between the first conducting member and the wiring layer (see fig. 20).
Claim 7 recites “for each of the one or more light sources, a light adjusting member disposed on the light guide member so as to oppose the light source via the light guide member.”
See claim 5;
Claim 8 recites “for each of the one or more light sources, a light reflecting member surrounding the light source.”
See claim 6;
Claim 9 recites “the one face of each of the one or more light sources has a region located between the pair of electrodes and facing the light reflective member.”
See claim 7;
Claim 22 recites “a light reflecting member that sections the light guide member such that each of the one or more light sources are surrounded by the light reflecting member.”
Chen discloses (in at least fig. 20) a light reflecting member (16) that sections the light guide member (5) such that each of the one or more light sources (3) are surrounded by the light reflecting member (16).
Claim 23 recites “the wiring layer disposed on the second face of the insulating base is covered by a cover layer.”
U.S. Patent No. 12,111,024 B2 as modified by Chen discloses all the claimed limitations except for the wiring layer disposed on the insulating base is covered by a cover layer.
However, it is well-known in the art to form planar light source comprised of, in part, a wiring layer (38) disposed on the insulating base (37) that is covered by a cover layer (39) as evident by Watanabe et al. (US. Pub: 2020/0089056 A1) of record at least fig. 1.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to use the wiring layer teaching of Watanabe et al. in the device of U.S. Patent No. 12,111,024 B2 and Chen in order to provide to suitable protection to the wiring layer.
Claim 24 recites “an opening of each of the first through holes for each of the one or more light sources extends within an outline of the light source in the plan view.”
Chen discloses (in at least fig. 20) an opening of each of the first through holes of each of the one or more light sources (3) extends within an outline of the light source in the plan view (see fig. 20).
Claim 25 recites “an opening of each of the first through holes for each of the one or more light sources has a shape that either substantially matches a shape of a corresponding one of the electrodes of the light source in the plan view, or extends within an outline of the corresponding one of the electrodes of the light source in the plan view.”
Chen discloses (in at least fig. 20 Chen) an opening of each of the first through holes of each of the one or more light sources (3) has a shape that either substantially matches a shape of a corresponding one of the electrodes of the light source in the plan view (see fig. 20), or extends within an outline of the corresponding one of the electrodes of the light source in the plan view (see fig. 20).
Claim 26 recites “the light guide member has an upper face on which protrusions and/or indentations are formed.”
U.S. Patent No. 12,111,024 B2 as modified by Chen discloses all the claimed limitations except for the light guide member has an upper face on which protrusions and/or indentations are formed.
However, it is well-known in the art to form planar light source comprised of, in part, a light guide member that has an upper face on which protrusions and/or indentations are formed in order to improve the brightness of the planar light source as evident by Watanabe et al. (US. Pub: 2019/0227382 A1) of record (at least fig. 14).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the planar light source of U.S. Patent No. 12,111,024 B2 and Chen with the light guide teaching of Watanabe et al. for the benefit of improving the brightness of the planar light source.
Claim 27 recites “the light guide member has a lower face facing the light reflecting member except one or more light source positioning parts where respective ones of the one or more light sources are disposed.”
U.S. Patent No. 12,111,024 B2 as modified by Chen discloses “the light guide member has a lower face facing the light reflecting member except one or more light source positioning parts where respective ones of the one or more light sources are disposed.”
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-9, 22-27 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.

CITED REFERENCE SUMMARIES: Ref US8823021B2: Claims:
An LED module comprising: a flexible wiring substrate being provided at its surface with a plurality of power supply terminals, said flexible wiring substrate being provided with a patterned wiring, each of said power supply terminals comprising a first electrode pad and a second electrode pad, each of said power supply terminals being electrically connected to said patterned wiring, a plurality of surface mounting type LED packages which are mounted on said flexible wiring substrate, each of said surface mounting type LED chip comprising an LED chip and a mounting substrate, each of said mounting substrate being formed at its front surface with a recess, and being formed at its rear surface with an external connection electrode, said external connection electrode comprising a first connection electrode and a second connection electrode, each of said mounting substrate being mounted on said flexible wiring substrate such that said first connection electrode and said second connection electrode are electrically connected to said first electrode pad and said second electrode pad, respectively, said LED chip being disposed within said recess, said LED chip being configured to receive electrical current through said external connection electrode and said power supply terminal, and said LED module being formed by cutting an LED module wafer, said LED module wafer comprising an LED package wafer and a flexible wiring wafer, said LED package wafer comprising a plurality of said surface mounting type LED packages, said flexible wiring wafer being formed into said flexible wiring substrate when said flexible wiring wafer is cut, said flexible wiring wafer being directly coupled to said LED package wafer such that each of said patterned wiring being connected to each of said external connection electrode, said LED package wafer being formed with a groove which reaches a top surface of said flexible wiring substrate, and said groove surrounding each of said surface mounting type LED package so that said surface mounting type LED package is spaced from adjacent said surface mounting type LED package.
a flexible wiring substrate being provided at its surface with a plurality of power supply terminals,
said flexible wiring substrate being provided with a patterned wiring,
each of said power supply terminals comprising a first electrode pad and a second electrode pad,
each of said power supply terminals being electrically connected to said patterned wiring,
a plurality of surface mounting type LED packages which are mounted on said flexible wiring substrate,
each of said surface mounting type LED chip comprising an LED chip and a mounting substrate,
each of said mounting substrate being formed at its front surface with a recess, and being formed at its rear surface with an external connection electrode, said external connection electrode comprising a first connection electrode and a second connection electrode,
each of said mounting substrate being mounted on said flexible wiring substrate such that said first connection electrode and said second connection electrode are electrically connected to said first electrode pad and said second electrode pad, respectively,
said LED chip being disposed within said recess,
said LED chip being configured to receive electrical current through said external connection electrode and said power supply terminal,
said LED module being formed by cutting an LED module wafer,
said LED module wafer comprising an LED package wafer and a flexible wiring wafer,
said LED package wafer comprising a plurality of said surface mounting type LED packages,
said flexible wiring wafer being formed into said flexible wiring substrate when said flexible wiring wafer is cut,
said flexible wiring wafer being directly coupled to said LED package wafer such that each of said patterned wiring being connected to each of said external connection electrode,
said LED package wafer being formed with a groove which reaches a top surface of said flexible wiring substrate, and
said groove surrounding each of said surface mounting type LED package so that said surface mounting type LED package is spaced from adjacent said surface mounting type LED package.
The LED module as set forth in claim 1 , wherein said flexible wiring substrate is provided with an electrical insulation substrate, a first penetration wiring and a second penetration wiring, said electrical insulation substrate has flexibility, said patterned wiring being disposed in an internal portion of said electrical insulation substrate, said first penetration wiring being formed in said internal portion of said electrical insulation substrate so as to electrically connect said first connection electrode to said patterned wiring, said second penetration wiring being formed in said internal portion of said electrical insulation substrate so as to electrically connect said second connection electrode with said patterned wiring.
said flexible wiring substrate is provided with an electrical insulation substrate, a first penetration wiring and a second penetration wiring, said electrical insulation substrate has flexibility,
said patterned wiring being disposed in an internal portion of said electrical insulation substrate,
said first penetration wiring being formed in said internal portion of said electrical insulation substrate so as to electrically connect said first connection electrode to said patterned wiring,
said second penetration wiring being formed in said internal portion of said electrical insulation substrate so as to electrically connect said second connection electrode with said patterned wiring.
The LED module as set forth in claim 2 , wherein said patterned wiring comprises a first patterned circuit and a second patterned circuit, said first patterned circuit being spaced from said second patterned circuit, said first penetration wiring being spaced from said second patterned circuit, said first penetration wiring being formed in said electrical insulation substrate so as to electrically connect said first connection electrode to said first patterned circuit, said second penetration wiring being spaced from said first patterned circuit,
said patterned wiring comprises a first patterned circuit and a second patterned circuit,
said first patterned circuit being spaced from said second patterned circuit,
said first penetration wiring being spaced from said second patterned circuit,
said first penetration wiring being formed in said electrical insulation substrate so as to electrically connect said first connection electrode to said first patterned circuit,
said second penetration wiring being spaced from said first patterned circuit,
said second penetration wiring being formed in said electrically insulation substrate so as to electrically connect said second connection electrode to said second patterned circuit, said first penetration wiring being spaced from said second penetration wiring.
said first penetration wiring being spaced from said second penetration wiring.
The LED module as set forth in claim 1 , wherein said surface mounting type LED package further comprising a thermal via and a heat radiation layer, said heat radiation layer being disposed on said rear surface of said mounting substrate, said heat radiation layer has heat conductivity which is higher than heat conductivity of said mounting substrate, said thermal via being configured to thermally couple said LED chip to said heat radiation layer, said thermal via having heat conductivity which is higher than the heat conductivity of said mounting substrate, said flexible wiring substrate further comprising a first heat radiation pad and a second heat radiation pad, said first heat radiation pad is formed on said front surface of said flexible wiring substrate, said second heat radiation pad is formed on said rear surface of said flexible wiring substrate, said surface mounting type LED package being mounted on said flexible wiring substrate such that said first heat radiation pad is in contact with said heat radiation layer, said first heat radiation pad is aligned with said second heat radiation pad in a thickness direction of said flexible wiring substrate.
said surface mounting type LED package further comprising a thermal via and a heat radiation layer,
said heat radiation layer being disposed on said rear surface of said mounting substrate,
said heat radiation layer has heat conductivity which is higher than heat conductivity of said mounting substrate,
said thermal via being configured to thermally couple said LED chip to said heat radiation layer,
said thermal via having heat conductivity which is higher than the heat conductivity of said mounting substrate,
said flexible wiring substrate further comprising a first heat radiation pad and a second heat radiation pad,
said first heat radiation pad is formed on said front surface of said flexible wiring substrate,
said second heat radiation pad is formed on said rear surface of said flexible wiring substrate,
said surface mounting type LED package being mounted on said flexible wiring substrate such that said first heat radiation pad is in contact with said heat radiation layer,
said first heat radiation pad is aligned with said second heat radiation pad in a thickness direction of said flexible wiring substrate.
The lighting device using the LED module as set forth in claim 1 .
The LED module as set forth in claim 2 , wherein said first patterned circuit and said second patterned circuit are formed in said electrical insulation substrate such that said first patterned circuit is spaced from said second patterned circuit in a thickness direction of said flexible wiring substrate.
said first patterned circuit and said second patterned circuit are formed in said electrical insulation substrate such that said first patterned circuit is spaced from said second patterned circuit in a thickness direction of said flexible wiring substrate.
The LED module as set forth in claim 6 , wherein said flexible wiring substrate is provided at its rear surface with a plurality of external terminal, each of said external terminal comprising a first terminal electrode and a second terminal electrode, each of said first penetration wiring being configured to electrically connect said first terminal electrode to said first connection electrode, each of said second penetration wiring being configured to electrically connect said second terminal electrode to said second connection electrode.
said flexible wiring substrate is provided at its rear surface with a plurality of external terminal, each of said external terminal comprising a first terminal electrode and a second terminal electrode,
each of said first penetration wiring being configured to electrically connect said first terminal electrode to said first connection electrode,
each of said second penetration wiring being configured to electrically connect said second terminal electrode to said second connection electrode.
The LED module as set forth in claim 7 , wherein said first patterned circuit comprising a first lengthwise wiring and a plurality of first widthwise wiring which are transverse to said first lengthwise wiring, said second patterned circuit comprising a second lengthwise wiring and a plurality of second widthwise wiring which are transverse to said second lengthwise wiring.
said first patterned circuit comprising a first lengthwise wiring and a plurality of first widthwise wiring which are transverse to said first lengthwise wiring,
said second patterned circuit comprising a second lengthwise wiring and a plurality of second widthwise wiring which are transverse to said second lengthwise wiring.
The LED module as set forth in claim 8 , wherein said first patterned circuit is provided with a first intersection point at which said first lengthwise wiring intersects the first widthwise wiring, said second patterned circuit being provided with a second intersection point at which said second lengthwise wiring intersects the second lengthwise wiring, said first intersection point is displaced from said second intersection point.
said first patterned circuit is provided with a first intersection point at which said first lengthwise wiring intersects the first widthwise wiring,
said second patterned circuit being provided with a second intersection point at which said second lengthwise wiring intersects the second lengthwise wiring,
said first intersection point is displaced from said second intersection point.
The LED module as set forth in claim 1 , wherein said mounting substrate comprising a first base and a second base, said first base being made from a semiconductor substrate, said first base being formed with an opening which penetrates through said first base along a thickness direction of said first base so that said first base being shaped to have a frame shape, said second base being shaped to have a mount portion which is protruded forwardly, said mounting portion having a shape which corresponds to a shape of said opening of said first base, said first base being disposed on said second base such that said mount portion being inserted into said opening, said LED chip being mounted on said mount section, said second base being made of metal, and is provided at its surface with an electrical insulation film.
said mounting substrate comprising a first base and a second base,
said first base being made from a semiconductor substrate,
said first base being formed with an opening which penetrates through said first base along a thickness direction of said first base so that said first base being shaped to have a frame shape,
said second base being shaped to have a mount portion which is protruded forwardly,
said mounting portion having a shape which corresponds to a shape of said opening of said first base,
said first base being disposed on said second base such that said mount portion being inserted into said opening,
said LED chip being mounted on said mount section,
said second base being made of metal, and is provided at its surface with an electrical insulation film.
The LED module as set forth in claim 1 , wherein said mounting substrate comprising a base, a spacer, and a frame, both said spacer and said frame being made from a semiconductor substrate, said spacer being shaped to have an opening which penetrates through said spacer in a thickness direction of said spacer, said spacer being disposed on a front surface of said base, said frame being formed with an aperture, said frame being disposed on a front surface of said spacer such that said frame being spaced from said base, said base being cooperative with said spacer and said frame to form said recess, said base has heat conductivity which is higher than heat conductivity of said semiconductor substrate.
said mounting substrate comprising a base, a spacer, and a frame,
both said spacer and said frame being made from a semiconductor substrate,
said spacer being shaped to have an opening which penetrates through said spacer in a thickness direction of said spacer, said spacer being disposed on a front surface of said base,
said frame being formed with an aperture,
said frame being disposed on a front surface of said spacer such that said frame being spaced from said base,
said base being cooperative with said spacer and said frame to form said recess,
said base has heat conductivity which is higher than heat conductivity of said semiconductor substrate.
The LED module as set forth in claim 11 , wherein said base being made of metal, said base being provided at its surface with an electrical insulation film, said external connection electrode and said power supply terminal being electrically insulated from said base by said electrical insulation film.
said base being made of metal,
said base being provided at its surface with an electrical insulation film,
said external connection electrode and said power supply terminal being electrically insulated from said base by said electrical insulation film.
The LED module as set forth in claim 1 , wherein said mounting substrate comprising a base and a heat radiation plate, said heat radiation plate being disposed in said base such that said heat radiation plate penetrates through said base in a thickness direction of said base, said LED chip being located in an upper side of said heat radiation plate, said heat radiation plate being made of metal, said heat radiation plate is provided at its surface with an electrical insulation film, said base being made of a light-sensitive resin composition.
said mounting substrate comprising a base and a heat radiation plate,
said heat radiation plate being disposed in said base such that said heat radiation plate penetrates through said base in a thickness direction of said base,
said LED chip being located in an upper side of said heat radiation plate,
said heat radiation plate being made of metal,
said heat radiation plate is provided at its surface with an electrical insulation film,
said base being made of a light-sensitive resin composition.
The LED module as set forth in claim 13 , wherein said mounting substrate further comprising a spacer and a frame, said spacer being formed with an opening which penetrates through said spacer in a thickness direction of said spacer, said spacer being disposed on a front surface of said base, said frame being made of semiconductor, said frame being formed with an aperture, said frame being disposed on a front surface of said spacer such that said frame being spaced from said base, said base being cooperative with said spacer and said frame to form said recess, said spacer being made of a light-sensitive resin composition.
said mounting substrate further comprising a spacer and a frame,
said spacer being formed with an opening which penetrates through said spacer in a thickness direction of said spacer,
said spacer being disposed on a front surface of said base,
said frame being made of semiconductor,
said spacer being made of a light-sensitive resin composition.
The LED module as set forth in claim 1 , wherein each of said surface mounting type LED package further comprising a light detection element, said light detection element being configured to detect an amount of light which is emitted from said LED lamp.
each of said surface mounting type LED package further comprising a light detection element,
said light detection element being configured to detect an amount of light which is emitted from said LED lamp.
Method for manufacturing the LED module as set forth in claim 1 , comprising steps of: forming a plurality of said surface mounting type LED package on said LED package wafer; preparing said flexible wiring wafer which is cut into said flexible wiring substrate; forming said LED module wafer including said LED package wafer and said flexible wiring wafer by coupling said flexible wiring wafer with said LED package wafer directly such that each said patterned wiring is connected to each said external connection electrode; forming, on said LED package wafer, said groove which reaches the top surface of said flexible wiring substrate and is configured that each one of surface mounting type LED package is spaced from each the other of said surface mounting type LED package by said groove; and cutting said LED package wafer into a predetermined shape including a plurality of said surface mounting type LED package.
forming a plurality of said surface mounting type LED package on said LED package wafer;
preparing said flexible wiring wafer which is cut into said flexible wiring substrate;
forming said LED module wafer including said LED package wafer and said flexible wiring wafer by coupling said flexible wiring wafer with said LED package wafer directly such that each said patterned wiring is connected to each said external connection electrode;
forming, on said LED package
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