# Computer Architecture Lab/WS2008/Group2/ISA comparison

The three chosen processors are Zilog Z80, Motorola 68000, ARM7DI. You first have a quick overlook of each processor in separate and a comparison at the end.

## ARM7DI

The ARM is an enhanced Reduced Instruction Set Computer (RISC) and consists of such typical architecture features like a large uniform register file, a load/store architecture where data operations are performed on register contents only and not directly on memory contents. Moreover it consists of simple addressing modes where all load store addresses are determined from register contents and instruction fields only. To simplify the instruction decoding process, all ARM instructions have a fixed length. In addition to these basic RISC features, ARM CPUs also provide control over the ALU as well as over the shifter in most of the data processing instructions. Moreover auto-increment and auto-decrement addressing modes provide an optimization to program loops. Another enhancement in contrast to the basic RISC architecture is the ability to load and store multiple instructions to increase the data throughput, as well as conditional execution of many instructions to get a better execution throughput.
These general features of the ARM CPU series are shown more concrete on the ARM7D processor in the following section.

### Register Layout

The processor consist of 37 registers, where 31 are 32 bit wide general purpose registers and the remaining 6 are status registers. 16 general purpose registers and 2 status registers are available to the programmer.

### Instruction Set

Concerning the instructions it must be said that all ARM7DI instructions are conditionally executed depending on the values of the N, Z, C and V flags in the CPSR (Computed Program Status Register). The following list shows the meaning of these flags:
* zero (Z)
* carry / borrow / extend (C)
* overflow (V)
* negative / less than (N)
Nevertheless there is a condition which overules the above written. If the always (AL) condition is specified , the instruction will be executed irrespective of the set flags.
Two distinctive marks of the ARM7DI instruction set are that, it can also handle undefined instructions which are not available at this specific type of ARM cpu, but might be at another. This works in a way that the cpu offers the instruction to any available coprocessor and if the coprocessor is available but busy, the cpu waits until the coprocessor is able to deal with the offer again. If on the other hand there is no such coprocessor available which can deal with the instruction the cpu rises a trap which can be captured by the programmer who might want to emulate the missing instruction. The other distincitive mark is a branch feature called branch-link which does the following: If the link bit is set the PC(Programm Counter) is written to the register R14, where it is adjusted in way that it contains the correct return address of the function call.
| Assembler Mnemonic | Action |
| AND | operand1 AND operand2 |
| EOR | operand1 EOR operand2 |
| SUB | operand1 - operand2 |
| RSB | operand2 - operand1 |
| ADD | operand1 + operand2 |
| ADC | operand1 + operand2 + carry |
| SBC | operand1 - operand2 + carry - 1 |
| RSC | operand2 - operand1 + carry -1 |
| TST | as AND, but result is not written |
| TEQ | as AND, but result is not written |
| CMP | as SUB, but result is not written |
| CMN | as ADD, but result is not written |
| ORR | operand1 OR operand2 |
| MOV | operand2 (operand1 is ignored) |
| BIC | operand1 AND NOT operand2 (Bit clear) |
| MVN | NOT operand2 (operand1 is ignored) |
The table shows a summary of the most relevant data processing instructions of the ARM7DI. The instructions TST,TEQ,CMP,CMN are compare operations which only set status bits in the CPSR. The logical operations like AND, EOR, TST, TEQ, ORR, MOV, BIC and MVN are performed on every bit to produce the result.

## Motorola 68000

The 68000 is a 32bit CISC microprocessor. One important aspect of the design of the 68000 is its forward compatibility. Introduced in 1979 the 68000 is still in use, e.g. in the TI-89 and TI-92 series and Voyage 200 calculators of Texas Instruments.

### Registers and Address Bus

The address bus is implemented by 24 bit which allows to address up to 16 MB of physical memory. But the address storage and computation use 32 bits ignoring the high order byte. This means that the Motorola 68000 is a 32-bit microprocessor. The reason for this design is that Motorola wanted to force forward compatibility. The endianness of the 68000 family is big-endian. The CPU consists of 8 general purpose data registers and 8 address registers. One advantage of this amount of registers is that it is small enough to guarantee a small interrupt response time on the one hand, and it is also large enough to do calculations relatively fast on the other hand. Here the list of available registers:
* 8 data registers (32 bit)
* 8 address registers (32 bit)
* 1 status register (16 bit)
The last of the address registers is also used as stack pointer.

### Instruction Set

The Motorola 68000 is a complex instruction set computer (CISC). This means that one instruction can execute several low-level operations. The instruction set is called to be orthogonal. It means that instructions are divided into operation and address modes. Further nearly all address modes are available for almost all instructions. The instruction set consists of 56 instructions. The comparison, arithmetic and logic operations set the following bit flags in the status register:
* zero (Z)
* carry (C)
* overflow (V)
* extend (X)
* negative (N)
The extend-flag is set to the value of the carry-flag, but only for arithmetic operations, otherwise it is not affected. These instructions can be categorized into the following groups:
* Arithmetic
* Binary Coded Decimal Arithmetic
* Logic
* Shift
* Bit manipulation in memory
* Multiprocessing control
* Flowcontrol
* Branch, Decrement-and-branch
Very interesting here are the instructions for multiprocessing control, which can perform indivisible bus operation, as well as handling semaphores for processors sharing a single memory and even more.

## Zilog Z80

The Zilog Z80 is a very successful 8 bit CISC-microprocessor which is in use since the mid 70s. Its design is based on the Intel 8080, so that programs for the 8080 CPU would also run on the Z80. One of the most famous examples for usage of the microprocessor is the Nintendo Gameboy (it uses an adopted version of the Z80).

### Register Layout

There are six pairs of 8-bit general purpose registers, of which each pair consists of the register itself and a corresponding flag register. Each pair can either be used as 8-bit or 16-bit register. Two 8-bit accumulators serve for storing results of 8-bit arithmetic and logic operations. Both accumulator registers have a corresponding 8-bit flag register. Furthermore, there are 6 special purpose registers: two index registers (each 16-bit), a stack pointer (16-bit), a program counter (16-bit), an interrupt page address register (8-bit) and the memory refresh register (8-bit).

### Instruction Set

The Z80 has a set of 252 different instructions which are combined to 158 different instruction types. These instruction types are further categorized into the following groups:
* Load and Exchange
* Block Transfer and Search
* Arithmetic and Logical
* Rotate and Shift
* Bit Manipulation (Set, Reset, Test)
* Jump, Call and Return
* Input/Output
* Basic CPU Control
The load and exchange instructions serve to move data between and among registers and external memory. The block transfer and search instructions are rather complex instructions that would not be found in a RISC architecture. For example there exists a single instruction to move a whole block of memory between two locations. The groups of arithmetic and logical, and rotate and shift operations are quite commonly implemented. The group of bit manipulation instructions allows to test, set and reset any bit of the accumulator, the general purpose registers, or any external memory location with a single instruction. The jump, call and return instructions are used for program control flow. The rather mighty set of input/output instructions allows for data transfer between external memory, internal registers and I/O devices. The last group, the basic CPU control instructions, serve to control different modes of the CPU like certain interrupt handling.
As a consequence of being based on the Intel 8080, the Zilog Z80 has a von Neumann architecture, stores words in little endian format, and comprises the whole instruction set of the 8080 CPU. Also it originally did not implement pipelining.

## Comparison

Obviously the ARM processor is the only RISC processor. Nevertheless it can interact with a coprocessor, but has no instructions for synchronization like the Motorola 68000. The ARM tries to execute instructions with an operation code it does not understand by sending them to a coprocessor. Clearly the set of synchronization instruction of the Motorola is more complex than the instructions ARM executes. Also the Z80, has very powerful instructions like search. When concerning registers both CISC processors have a lot less registers than the ARM, even if you consider the duplicate registers in the Z80. Whereas the 68000 only uses 8 registers to react fast in case of an interrupt, the Z80 has them for compatibility to the 8080 family of Intel, even if they are duplicated.
Each processor complies with the requirements of a set of applications, even if it might was designed with other uses in mind. The ARM for embedded systems, the Motorola 68000 now for the TI200, but has been used in a lot of other applications like printers. And the Z80 was used in embedded systems as well as in desktop pcs.