# Proposed Electronic Calculator/Chapter 5

​5. Fundamental Circuit Elements.
The electronic part of the calculator will be somewhat elaborate, and it will certainly not be feasible to consider the influence of every component on every other. We shall avoid the necessity of doing this if we can arrange that each component only has an appreciable influence on a comparatively small number of others. Ideally we would like to be able to consider the circuit as built up from a number of circuit elements, each of which has an output which depends only on its inputs, and not at all on the circuit into which it is working. Besides this we would probably like the output to depend only on certain special characteristics of the inputs. In addition we would often be glad for the output to appear simultaneously with the inputs.
These requirements can usually be satisfied, to a fairly high accuracy, with electronic equipment working at comparatively low frequencies. At megacycle frequencies however various difficulties tend to arise. The input capacities of valves prevent us from ignoring the nature of the circuit into which we are working; limiting circuits do not work very satisfactorily: capacities and transit times are bound to cause delays between input and output. These difficulties may be best resolved by bending before the storm. The delays may be tolerated by accepting them and working out a time table which takes them into account. Indefiniteness in output may be tolerated by thinking in terms of ‘classes of outputs’. Thus instead of saying ‘The inputs A and B give rise to the output C‘, we shall say ‘Inputs belonging to classes P and Q give rise to an output in class R‘. The various classes must be quite distinct and must be far from overlapping, i.e. topologically speaking we might say that they must be a finite distance apart. If we do this we shall have made a very definite division of labour between the mathematicians and the engineers, which will enable both parties to carry on without serious doubts as to whether their assumptions are in agreement with those of the other party.
For the present we shall merely ignore the difficulties because we wish to illustrate the principles. We shall assume the circuit elements to have all the most agreeable properties. It may be added that this will only affect our circuits in so far as we assume instantaneous response, and that not very seriously. The questions of stable output only involve the mathematician to the extent of a few definitions.
​In the present section we shall only be concerned with what the circuit elements do. A discussion of how these effects can be obtained will be given in § 15. The circuit elements will be divided into valve-elements and delay elements.
(i) Delay line, with amplifier and clock gate. This is shown as a rectangle with an input and output lead
The arrow at the input end faces towards the rectangle and at the output end faces away. The name of the delay line, if any, will be written outside and the delay in pulse periods inside.
This circuit element delays the input by the appropriate number of pulse periods and also standardizes it, i.e. converts it into the nearest standard form by correcting amplitude shape and time.
(ii) The unit delay. This is represented by a triangle, thought of as a modified form of arrow
The input to output direction is indicated by the arrow. This delay element ideally provides a delay of one pulse period.
(iii) Limiting amplifier. Ideally this valve-element is intended to give no output for inputs of less than a certain standard value, and to give a standard pulse as output when the input exceeds a second standard value. Intermediate input values are supposed not to occur. If we combine this with a resistance network in which a number of input signals are combined the condition takes the form that if the input signals are s$_1$ s$_2$ . . . s$_n$ there will be zero output unless $\alpha _{1}s1+...+\alpha _{n}s_{n}\geq \beta _{1}$ and a standard or unit output if $\alpha _{1}s1+...+\alpha _{n}s_{n}\geq \beta _{2}$. This may be simplified by assuming that the inputs $s_{1}...s_{n}$ are always either 0 or 1 and the coefficients α$_1$ . . . α$_n$ either 1 or −∞ and also by requiring the integral parts of β$_1$ β$_2$ to be the same. We represent the valve element by a circle, and the inputs with a line and an arrow facing towards it, the outputs with lines and arrows facing away (Fig. 1). A coefficient −∞ (inhibitory coupling) is shown with a small circle cutting a large circle (Fig.2). The smallest total for which an output is obtained (i.e. integral part of β$_1$ or β$_2$ plus 1) is shown inside the circle, but is omitted if it is 1. This number we may call the threshold.
When we require coefficients α larger than 1 we may show more than one connection from one source. Negative coefficients may effectively be shown by means of the negation circuit which interchanges 0 and 1. Thus in the circuit of Fig.3 the valve element D will be stimulated (i.e. emit a standard pulse) if either A is stimulated or both B and C are not.
(iv) Trigger circuits. A trigger circuit, which is shown as an ellipse, differs from a limiting amplifier circuit in that once the inputs have reached the threshold so that it emits one pulse, it will continue to emit pulses until it receives an inhibitory stimulus. It is in fact equivalent to a limiting amplifier with a number of excitatory connections from itself with a delay of one unit. Thus for instance the two circuits shown in Fig. 4 are equivalent. We show ​the trigger circuits with a different notation partly to simplify the drawing and partly because they will in fact be made up from different circuits. There is also another practical difference. The output from a trigger circuit will be a D.C. voltage, so long as it is not disturbed one way or the other, whereas the output from a limiting amplifier with feedback is more or less pulsiform.
(v) Differentiator circuit and change circuit. We sometimes wish to indicate an output from a trigger circuit either at the beginning or the end of its stimulation. This would in fact be done with a capacity resistance ‘differentiator’ circuit. Such a circuit designed to produce a positive (excitatory) pulse at the beginning will be denoted by —(B)— and one at the end by —(E)—. These are understood to be respectively equivalent to the two circuits of Fig. 5. We may also occasionally wish to make connection to a trigger circuit in such a way that stimulus always changes the condition of the trigger circuit, either from stimulation to non-stimulation or vice-versa. This is indicated by a small square at the connection point thus
and is equivalent to Fig. 6.
(vi) The trigger limiter. Sometimes we wish a continuously varying voltage to initiate a train of pulses, the pulses to be synchronous with the clock and to start approximately when the continuous voltage reaches a certain value. All of the pulses that occur must be of the standard or unit size. There must definitely be no half-size pulses possible. The train of pulses may be stopped by pulses from some other source.
This valve element is indicated by a somewhat squat rectangle containing the letters TL. The continuous voltage input is shown as in an excitatory connection and the stopping pulse as an inhibitory connection, as in Fig. 7.
(vii) The adder and other examples. We may now illustrate the use of these circuit elements by means of some simple examples.
The simplest circuit perhaps is that for the logical ‘or’ (cf. p. 21). In the circuit of Fig. 8 there is an output pulse from the unnamed element if there is one from any one of A, B, C. We shall find it convenient in such cases to describe this element as A v B v C. The circuits of Fig. 9 are self explanatory in view of our treatment of A v B v C.
An adder network is shown in Fig. 10. It will add two numbers which enter along the leads shown on the left in binary from, with the least significant digit first, the output appearing on the right. An input signal from the top will inhibit any output. The method of operation is as follows. The three valve elements on the left all have stimulation from the same three sources, viz. the two inputs and one corresponding to the carry digit from the last figure, which was formed by the element with threshold 2. We can distinguish the four different possible totals 0, 1, 2, 3 according to which of the valve elements are stimulated. We wish to get an output pulse if the total is 1 or 3. This may be expressed as a pulse if the total is 3 or if it is 1 and not 2 or more. If we write T$_n$ to mean ‘the total is n or more’ the condition is T3 v (T1 & ~T2). Using our standard networks for A v B and for A & ~ B and observing that the three valve elements on the left of the adder are stimulated respectively in the cases T1, T2, T3 we finally obtain the circuit given.
​The adder will be shown as a single block as in Fig.11. The input with the inhibiting circle being of course that shown at the top in the complete diagram.