# Digital Circuits/7400 Series

This page refers to the popular 7400 series IC
The 7400 series is a popular set of logic ICs that can be ordered from many vendors, and used in many applications. 7400 chips are generally 14-pin or 16-pin DIP packages, although other form factors are available as well.
The power supply required is +5V. For most of the 7400 chips, pin 7 is the ground (GND) connection and pin 14 is the +5V power supply. There are exceptions like the 7490. 2.0V or higher signifies a logical "1"; 0.8V or lower signifies a logical "0".
Each chip has its name printed on top (for example, "74HC132"), describing its logic family and digital logic functionality.

## OR Gates, 7432

4 gates on this package, each with 2 input pins, 1 output pin. The output pin is high only when either one, or both, of the input pins are high.

## NOR Gates, 7402

4 gates on this package, each with 2 input pins, 1 output pin. The output pin is low only when either one, or both, of the input pins are high. The output pin is high only when both the input pins are low

## XOR Gates, 7486

4 gates on this package, each with 2 input pins, 1 output pin. The output pin is low when both input pins are equal (both high or both low), and it is high when one of the input pins is high and at the same time the other input pin is low. This is called the "odd but not even gate" meaning that an odd number of inputs need to be high in order for the output to be high. The XNOR gate is just the opposite; called the "even but not odd gate".

## AND Gates, 7408

4 gates on this package, each with 2 input pins, 1 output pin. The output pin is high only when all input pins are high at the same time.

## NOT gates, 7404

7404 is a NOT gate IC. It consists of six inverters which perform logical invert action, with single input and single output pin. The output of an inverter is the complement of its input logic state, i.e., when input is high its output is low and vice versa.

## Other AND Gates

7411 has 3 AND gates, each with 3 inputs and 1 output. 7421 has 2 AND gates, each with 4 inputs and 1 output.

## NAND Gates, 7400, 74132

4 gates on this package, each with 2 input pins, 1 output pin. The output pin is low only when all input pins are high at the same time.

## Other NAND Gates

7410 has 3 NAND gates, each with 3 inputs and 1 output. 7420 has 2 NAND gates, each with 4 inputs and 1 output. 7430 has 1 NAND gate, with 8 input pins, and 1 output pin.

## Flip Flops

7474 has two D flip flops. Pin 14 is the 5V power pin; pin 7 is GND. 5474(W) and 54L74(W) has some differences. Pin 4 is Vcc (+5 volts) and pin 11 is GND. 7473 has two JK flip flops.

## Design

When designing new digital circuits, we may sketch dozens of slightly different kinds of gates—different numbers of inputs, etc. Just about every kind of gate you can imagine has been manufactured somewhere. However, when it comes time to actually construct a circuit, we typically use only a few kinds of "common" chips rather than every possible chip. The Apollo Guidance Computer is an example of an entire computer out of only one kind of gate.
If our sketch includes a 4-input AND gate, you might think we would simply grab a 7421 off the shelf and wire it up. This is rare in actual practice. It is far more likely that we will do one of:
* draw it in a schematic capture application with a "7421" from a "7400 library", then download the design into a FPGA.
* implement it using some other more common Digital Circuits/Common Integrated Circuits, using Boolean algebra—then grab *that* chip off the shelf and wire it up.
* translate it into Boolean expression, then run it on a microprocessor.
Currently the most useful physical gates are:
* 74AC132–4 Schmitt 2-input NAND gates
* multiplexers
** 74AC153 dual 4:1 mux chip—can be wired as any logic gate with up to 3 inputs, including XOR.
** 74AC157 quad 2:1 mux chip
* 74AC595 SIPO shift register
* 74AC165 PISO shift register
Very wide gates (say, a 16-input NOR gate) are typically implemented as a handful of less complicated gates in a "tree" or "funnel".