OpenLLM-France/wikimedia huggingface dataset:
# Dichotomous Key/Spheniscidae
## Key to Spheniscidae

* 1: Yellow crest present on head.
* 2: Yellow crest absent.

## 1

* 3: Solid yellow stripe runs toward bill, almost touching it.
* 4: Solid yellow stripe does not approach bill.

## 2

* 7: Head and/or neck is partially yellow.
* 8: No yellow is present on head or neck.

## 3

* Eudyptes schlegeli (Royal Penguin): Some or all of head is white.
* 6: Head is entirely black.

## 4

* Eudyptes schlegeli (Royal Penguin): Part or all of head is white.
* 5: Head is entirely black.

## 5

* Eudyptes chrysolophus (Macaroni Penguin): When dry, some of crest is pointed well above the horizontal.
* Eudyptes filholi (Eastern Rockhopper Penguin): All of crest is more or less horizontal or below.

## 6

* 14: Penguins of New Zealand and surrounding islands
* 15: Penguins of the southern regions of the Atlantic and Indian Oceans.

## 7

* Megadyptes antipodes (Yellow-eyed Penguin): 80 centimeters or less in length.
* 9: Length is over 80 centimeters.

## 8

* Pygoscelis antarctica (Chinstrap Penguin): Face is white with a single thin black stripe resembling a chin-strap.
* 10: Face is alternating black and white, but not white with a single thin black stripe.

## 9

* Aptenodytes forsteri (Emperor Penguin): Head and neck only slightly yellow; Height is over 100 centimeters.
* Aptenodytes patagonicus (King Penguin): Head and neck have bright orange-yellow spots; Length is less than 100 centimeters.

## 10

* 11: Beak has spots of orange or red.
* 12: Beak is black, white, and/or gray

## 11

* Pygoscelis adeliae: Head completely black except for small white ring around eyes.
* 13: White coloration present above and/or around eyes.

## 12

unfinished
* ?Eudyptula albosignata?, White-flippered Penguin? subsp of E. minor?
* Eudyptula minor, Little Blue Penguin
* Spheniscus demersus, African Penguin
* Spheniscus humboldti, Humboldt Penguin
* Spheniscus magellanicus, Magellanic Penguin
* Spheniscus mendiculus, Galapagos Penguin

## 13

* Pygoscelis papua: Head black except for white splotch above eye; 75-90 centimeters in length; Birds of Antarctica.
* Spheniscus mendiculus: Head various coloration, but usually with a white stripe going from the edge of the eye and curving back around to the chin; 50 centimeters in length; Birds of the Galapagos Islands.

## 14

* Eudyptes pachyrhynchus: Pink skin absent at base of bill; Usually with whitish stripes on cheeks.
* Eudyptes robustus: Pink skin present at base of bill; No stripes on cheeks.

## 15

unfinished
* Eudyptes chrysocome:
* Eudyptes moseleyi:
# Dichotomous Key/Start
## 1

* 2: Membrane-bound nucleus absent; No true chromosomes, only plamids; Usually unicellular, though some cyanobacteria are multicellular; Lysosomes and peroxisomes absent; Endoplasmic reticulum, golgi apparatus, and mitochondria absent; cell size is 1 to 10 micrometers
* 3: Membrane-bound nucleus present; Multiple chromosomes present; usually multicellular; lysosomes and peroxisomes present; Endoplasmic reticulum, golgi apparatus, and mitochondria present; cell size is 10 to 100 micrometers

## 2

* Archaea: Cell membranes contain ether linkages; three RNA polymerases present.
* Bacteria: Cell membranes contain ester bonds and cell wall made of peptidoglycan; one RNA polymerase

## 3

* Animalia: Cell wall absent; Nutrients ingested; Movement possible with muscular contractions, cilia, flagella, or other organ
* 4: Cell wall present; Nutrients absorbed, though rarely carnivorous; Very limited movement

## 4

* Plantae: Chlorophyll present; Plant walls made of cellulose
* Fungi: Chlorophyll absent; Plant walls made of chitin
# Digital Circuits/Number Representations

Decimal Numbers A decimal number system is composed of ten digits from 0 to 9 and each digit has its own weight and quality. These are the numbers which have base 10. In decimal number system every digit has a weight multiplied by power of 10.
# Digital Circuits/Multiplexers-Demultiplexers

Multiplexers and Demultiplexers are devices that move signals from wire to wire, based on a given control signal.

## Multiplexers

Let's say that we have 2 inputs to a given circuit, and we only have one output. We would like the two inputs to "share" the output, and we therefore need to switch from one input to the other. We have inputs I1 and I2, output O, and a control wire, C. We can say that if C=1, then we connect I1 to O. However, if C=0, then we connect I2 to O. This is a multiplexer.
Generally, multiplexers are circuits behaving like a controlled rotary switch, i.e. any one of a number of inputs may be selected as output. In digital electronics, a multiplexer is a combination of logic gates resulting into circuits with two or more inputs (data inputs) and one output. The selection of the channel to be read into the output is controlled by supplying a specific digital word to a different set of inputs (select inputs). A typical 4 input channels (D3-D0) digital multi­plexer, and its corresponding truth table.
The active input channel is selected by supplying the appropriate code to select inputs (C1, C0).

### Input/Output Relationships
## Demultiplexers

Similar to the situation above, let's say we have a circuit with a single input (I), two outputs (O1 and O2), and a control wire, C. When C=1, we connect I to O1, and when C=0, we connect I to O2. This is a demultiplexer.
Beware the following rule: the not selected input is not left in high impedance but set to zero.
# Digital Circuits/Multipliers
## Signed / Unsigned Numbers

A signed integer is a 32-bit datum that encodes an integer in the range [-2147483648 to 2147483647]. An unsigned integer is a 32-bit datum that encodes a nonnegative integer in the range [0 to 4294967295]. The signed integer is represented in twos complement notation.

## Booth's Algorithm

P(A)*P(B)=P(AnB) iff P(A)<9

## Dadda Multiplier

This section of the Digital Circuits wikibook is a stub. You can help by expanding this section. If you add something, list yourself as a Contributor.
# Digital Circuits/NAND Logic

Like NOR gates, NAND gates are so-called "universal gates" that can be combined to form any other kind of logic gate. Today, integrated circuits are not constructed exclusively from a single type of gate. Instead, EDA tools are used to convert the description of a logical circuit to a netlist of complex gates (standard cells) or transistors (full custom approach)

## Standard gates constructions with a NAND gates combination
### NAND

This is a NAND gate: trivially, just a NAND gate is used to realise it:
| Desired Gate | NAND Construction |
| AB Q 001 011 101 110 ||

### NOT

A NOT gate is made by joining the inputs of a NAND gate. Since a NAND gate is equivalent to an AND gate followed by a NOT gate, joining the inputs of a NAND gate leaves only the NOT part.
| Desired Gate | NAND Construction |
| AQ 01 10 ||

### AND

An AND gate is made by following a NAND gate by a NOT gate as shown below. This gives a NOT NAND, i.e. AND.
| Desired Gate | NAND Construction |
| AB Q 000 010 100 111 ||

### OR

If the truth table for a NAND gate is examined, it can be seen that if any of the inputs are 0, then the output will be 1. However to be an OR gate, if any input is 1, the output must also be 1. Therefore, if the inputs are inverted, any high input will trigger a high output.
| Desired Gate | NAND Construction |
| AB Q 000 011 101 111 ||

### NOR

A NOR gate is simply an OR gate with an inverted output:
| Desired Gate | NAND Construction |
| AB Q 001 010 100 110 ||

### XOR

An XOR gate can be constructed from four NAND gates implementing the expression (A NAND N) NAND (B NAND N) where N = A NAND B. This construction entails a propagation delay three times that of a single NAND gate and uses four gates.
| Desired Gate | NAND Construction |
| AB Q 000 011 101 110 ||
Alternatively, an XOR gate is made by considering the disjunctive normal form $A\cdot {\overline {B}}+{\overline {A}}\cdot B$, noting from de Morgan's Law that a NAND gate is an inverted-input OR gate. This construction uses five gates instead of four.
| Desired Gate | NAND Construction |

### XNOR

An XNOR gate is made by considering the disjunctive normal form $A\cdot B+{\overline {A}}\cdot {\overline {B}}$, noting from de Morgan's Law that a NAND gate is an inverted-input OR gate. This construction entails a propagation delay three times that of a single NAND gate and uses five gates.
| Desired Gate | NAND Construction |
| AB Q 001 010 100 111 ||
Alternatively, the 4-gate version of the XOR gate can be used with an inverter. This construction has a propagation delay four times (instead of three times) that of a single NAND gate.
| Desired Gate | NAND Construction |

## See also

* NOR logic. Like NAND gates, NOR gates are also universal gates.
# Digital Circuits/NOR Logic

Like NAND gates, NOR gates are so-called "universal gates" that can be combined to form any other kind of logic gate. For example, the, Apollo Guidance Computer, was built exclusively from NOR gates, about 5,600 in total for the later versions. Today, contrary to popular belief, integrated circuits are not constructed exclusively from a single type of gate. Instead, EDA tools are used to convert the description of a logical circuit to a netlist of complex gates (standard cells) or transistors (full custom approach).

## Standard gates constructions with a NOR gates combination
### NOR

A NOR gate is trivially made:
| Desired Gate | NOR Construction |
| AB Q 001 010 100 110 ||

### NOT

This is made by joining the inputs of a NOR gate. As a NOR gate is equivalent to an OR gate leading to NOT gate, this automatically sees to the "OR" part of the NOR gate, eliminating it from consideration and leaving only the NOT part.
| Desired Gate | NOR Construction |
| AQ 01 10 ||

### OR

The OR gate is simply a NOR gate followed by a NOT gate.
| Desired Gate | NOR Construction |
| AB Q 000 011 101 111 ||

### AND

An AND gate gives a 1 output when both inputs are 1; a NOR gate gate gives a 1 output only when both inputs are 0. Therefore, an AND gate is made by inverting the inputs to a NOR gate.
| Desired Gate | NOR Construction |
| AB Q 000 010 100 111 ||

### NAND

A NAND gate is made using an AND gate in series with a NOT gate:
| Desired Gate | NOR Construction |
| AB Q 001 011 101 110 ||

### XNOR

An XNOR gate can be constructed from four NOR gates implementing the expression (A NOR N) NOR (B NOR N) where N = A NOR B. This construction entails a propagation delay three times that of a single NOR gate and uses four gates.
| Desired Gate | NOR Construction |
| AB Q 001 010 100 111 ||
Alternatively, an XNOR gate is made by considering the conjunctive normal form $(A+{\overline {B}})\cdot ({\overline {A}}+B)$, noting from de Morgan's Law that a NOR gate is an inverted-input AND gate. This construction uses five gates instead of four.
| Desired Gate | NOR Construction |

### XOR

An XOR gate is made by considering the conjunctive normal form $(A+B)\cdot ({\overline {A}}+{\overline {B}})$, noting from de Morgan's Law that a NOR gate is an inverted-input AND gate. This construction entails a propagation delay three times that of a single NOR gate and uses five gates.
| Desired Gate | NOR Construction |
| AB Q 000 011 101 110 ||
Alternatively, the 4-gate version of the XNOR gate can be used with an inverter. This construction has a propagation delay four times (instead of three times) that of a single NOR gate.
| Desired Gate | NOR Construction |

## See also

* NAND Logic. Like NOR gates, NAND gates are also universal gates.
Digital Circuits
# Digital Circuits/NOT gate
## Truth Table

| A | Q |
| 0 | 1 |
| 1 | 0 |
# Digital Circuits/NAND gate
## Truth Table

| A | B | Q |
| 0 | 0 | 1 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
# Digital Circuits/NOR gate
## Truth Table

| A | B | Q |
| 0 | 0 | 1 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 0 |
# Digital Circuits/OR gate
## Truth Table

| A | B | Q |
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 1 |
# Curriculum Design in Community Education

(This book is approximately 40% complete.)

## Team-Wide Mockups

Listed below are links to mockups from members of our team. They will be useful as we decide which online platform to use for our final product:
* Kelsay's WordPress Site
** WordPress Main Page
* Allie's WordPress Site
** WordPress Main Page
* Hellen's Wikispaces Site
** WikiSpaces Main Page

## Preface

A group of virtual interns are working together to complete this book, which will provide educational materials to teachers in primary education around the world. If you are a member of our team, please provide feedback on this self-service guide. This document can be used freely; please use proper attribution when necessary.
   Education is the key to a brighter future. Technology brings this to the forefront. By enabling people in more remote areas access to education through technology, we build a stronger and brighter global future. (Kelsay F.)
   Un pueblo educado es un pueblo libre. (Slogan of IHER in Honduras)

### Focus

This guide considers the basic question: What is the best way to design a curriculum that effectively makes use of online resources? This guide answers this basic question through the items in the Table of Contents.

### Readership

This wiki has been prepared for teachers in primary education who can benefit from online resources for curriculum design; many resources included in this guide can also be used to educate adults in basic skills. This guide covers a spectrum of academic disciplines, ranging from mathematics and science to literacy. This guide can be read on a cell phone and is designed for those users with basic computer skills.

## Table of Contents
### The Basics of Curriculum Design

* Basic Instructions for Curriculum Design

### Math

* Addition
* Subtraction
* Multiplication
* Division
* Problem solving and logic

### Science

* Basic biology
* Fun experiments

### Literacy

* Reading
* Writing
* Spelling

## Resources

* USAID
* U.S. State Department
* GNU Free Documentation License (This page describes the license under which this book is created.)
# Cut

Cut is a Unix command-line tool used to extract fields and the like from lines of input, available on many platforms.

## Options

Command-line options aka switches of cut:
* -clist: Display selected characters of lines.
* -flist: Display selected fields of lines, separated by tab by default.
* -dchar: Switch field separator from tab to char.
* -s: Do not display ("suppress") lines that contain no occurrence of the field separator.
Command-line options aka switches of some versions of cut:
* -b: Display selected bytes of lines.
* -n: Do not split multi-byte characters.

## Examples

Examples of cut use:
* cut -f1 file.txt
** Displays the 1st field of each line, using tab as the field separator.
* echo a:b | cut -d: -f2
** Displays the 2nd field of each line, using colon as the field separator.
* echo a b c | cut -d" " -f1,3
* echo a b c d e | cut -d" " -f1-3,5
* echo a b c | cut -d" " -f3,2,1
** Outputs "a b c", disregarding the reversed order after -f.
* echo a b c d | cut -d" " -f2-
** Outputs the 2nd and every later field, so "b c d".
* echo abcd | cut -c3,4
** Instead of fields, treats characters. Thus, outputs "cd".
* echo abcdefgh | cut -c1-3,6-8
** Outputs abcfgh
Examples of use of similar tools in cut's domain:
* echo a b|awk '{print $2}'
** Displays "b", separating fields by any number of tabs or spaces. Thus, for awk, "b" is the 2nd field, while for cut -d" ", "b" is the 3rd field.
* echo a b|awk '{print $2 $1}'
** Displays "ba", preserving the order of the fields as specified.
* echo a b|sed "s/ */ /g" |cut -f2 -d" "
** Displays "b". Uses sed to first compact a sequence of spaces into a single space.

## Limitations

Cut is subject to the following limitations:
* There is no way to specify "one or more spaces" or the like as the field delimiter.
* There is no way to change the order of the fields on the output.
Note: Some people find that awk or gawk is able to meet needs where cut is too limited.

## Versions

A version of GNU cut for MS Windows is available from GnuWin32 project, as well as from Cygwin.

## External links

* GNU Coreutils at gnu.org
* Unix cut(1) manual page at man.cat-v.org
* Wikipedia article on Cut.
# Curriculum Design in Community Education/Basic Instructions for Curriculum Design
### Basic Instructions for Curriculum Design

* List the educational goals of your curriculum.
** What do you want your students to know? Make sure to set clear and measurable goals. “Being familiar with literature” is not a clear or measurable goal. “Being able to calculate the angles of a right triangle” is a clear and measurable goal.
* Identify the tools necessary to achieve your objectives.
** A math course, for instance, requires the student to use paper, a pencil/pen, and perhaps a calculator or a different counting device. The vast majority of teachers of math use chalkboards or whiteboards to display exercises and explanations for the student's review.
** Are there any resources on the Internet that help you meet the goals outlined in the previous step?
* Assess the resources in your community.
** What is the quality of the resources you identified in the previous step?
** Does your classroom have computing devices?
** Do your students have access to cell phones that can access online material?
* Assess how useful your goals and tools can be for your students in their daily lives.
** Can your lessons be tied to local events to demonstrate the utility of the material?
** Can your lessons help students to get jobs in your community? If so, how?
# Curriculum Design and Technology Integration/The Deliberation Model & Hunkins Model of Curriculum Design

Wikibook CDT Chapter 2: Models, Frameworks and Tools of Curriculum Development and the role of media.
Elizzabeth Wilmes
Larry Hoskins
Mohammed Ousleti
Adrian Woodland

## Six Phase Deliberation Model

Six-Phase Deliberation Model. Phase One: Public Sharing. An Educational Group must come together. Discuss what needs to be accomplished. Phase Two: Highlighting Agreements and Disagreements. The educational group must highlight what they have in common and also what they differ in opinion. Phase Three: Explaining Positions. The members of the group will take the information from the previous phases and make clear the various positions. Phase Four: Highlighting Changes in Position. Educators make known any change in position. Why they changed their position. Phase Five: Negotiating Points of Agreement. Engages Participants in searching for solutions. Phase Six: Adopting a Decision. Individuals achieve consensus.
Hunkin's Decision-Making Model
# Circuit Theory/1Initial and Source

This first example is charging and discharging with a DC source.
# Circuit Theory/1Source Excitement

Phasors:
    Called the "Steady State Solution" solution
    Sometimes the "Steady State Solution" resulted in a complete solution, sometimes a partial solution.
    Full "Steady State Solutions" involved integrals and derivatives
    Partial "Steady State Solutions" involved non-homogeneous ODE differential equations
    The partial "Steady State Solution" is called the "Particular solution".
    The Laplace Solution is a complete solution that is identical to Phasor/Complex Frequency when eliminating operators in a differential equation (s or jω), but translates the driving function (current or voltage source) into the Laplace domain differently. The Laplace Solution can translate any driving function. Phasors can only translate sinusoidals. The Convolution Integral (coming up) is easier than either.
Now we are going to finish solving the some of the incomplete, particular "Steady State Solutions."
    The non-homogeneous ODE equation is turned homogeneous by setting the driving function (voltage or current source) to zero and then using either the "Method of undetermined coefficients" or "Variation of parameters" to find the overall solution. The method illustrated here is the "Method of undetermined coefficients".
    This is called the "Transient" or Homogeneous Solution.
    The Homogeneous Solution is found in the time domain, not phasor domain
    Reduce circuit to thevenin or norton equivalent and solve for a single component (or group or components)
    Add Particular + Homogeneous Solution, then evaluate constants.
Click on the numeric solutions to see where they came from. Clicking on particular solutions or non-diff-eq solutions will bounce back to phasor examples.
| Calculus | diff eq | LR Solution |
| ${\textstyle d \over dt}$ | $\textstyle \surd$ | $V_{s}(t)=120{\sqrt {2}}cos(377t+120^{\circ })$ $V_{s}(t)=R*i(t)+L*{d \over dt}i(t)$ $i_{S_{P}}(t)=15.9cos(377t+1.73)$ $i_{S_{H}}(t)=2.5781*e^{-{\frac {t}{0.001}}}$ |
| ${\textstyle d \over dt}$ | | $I_{s}(t)=120{\sqrt {2}}cos(377t+120^{\circ })$ $V_{s}(t)=R*i(t)+L*{d \over dt}i(t)$ $V_{s}=1814cos(377t+2.45)$ already solved ... no differential equation! |
| ${\textstyle \int }$ | | $V_{s}(t)=120{\sqrt {2}}cos(377t+120^{\circ })$ ${dI_{s}(t) \over dt}={\frac {1}{R}}{dV_{s} \over dt}+{\frac {V_{s}}{L}}$ $i_{s}(t)=48.1cos(377t+0.844)$ already solved ... no differential equation! |
| ${\textstyle \int }$ | $\textstyle \surd$ | $I_{s}(t)=120{\sqrt {2}}cos(377t+120^{\circ })$ ${dI_{s}(t) \over dt}={\frac {1}{R}}{dV_{s} \over dt}+{\frac {V_{s}}{L}}$ $V_{S_{P}}(t)=599\cos(377t+3.30)$ $V_{S_{H}}(t)=-258*e^{\frac {-t}{0.0001}}$ |
# C Sharp Programming/The .NET Framework
## The .NET Framework
### .NET Framework Overview

    An overview of the .NET class library used in C#.

### Console Programming

    Input and output using the console.

### Windows Forms

    GUI Programming with Windows Forms.

### Collections

    Effectively manage (add, find, iterate, remove, etc.) large sets of data.

### Threading

    Threading with the .NET class library

### Marshalling

    Communicating with unmanaged code
# C Sharp Programming/The .NET Framework/Collections
## Lists

A list is a dynamic array that resizes itself as needed, if more data is inserted than it can hold at the time of insertion. Items can be inserted at any index, deleted at any index and accessed at any index. The C# non-generic list class is the ArrayList, while the generic one is List<T>.
Many of the List class' methods and properties are demonstrated in the following example:
The terminal output is:

## LinkedLists

Items in a linked list can be accessed directly only one after the other. Of course an item at any index can be accessed, but the list must iterate to the item from the first one, which is much slower than accessing items by index in an array or a list. There is no non-generic linked list in C#, while the generic one is LinkedList<T>.

## Queues

A queue is a FIFO (first in - first out) collection. The item first pushed in the queue gets taken first with the pop function. Only the first item is accessible at any time, and items can only be put to the end. The non-generic queue class is called Queue, while the generic one is Queue<T>.

## Stacks

A stack is a LIFO (last in - first out) collection. The item pushed in first will be the last to be taken by pop. Only the last item is accessible at any time, and items can only be put at the top. The non-generic stack class is Stack, while the generic one is Stack<T>.

## Hashtables and dictionaries

A dictionary is a collection of values with keys. The values can be very complex, yet searching the keys is still fast. The non-generic class is Hashtable, while the generic one is Dictionary<TKey, TValue>.
# C Sharp Programming/Partial classes
## Partial Classes

As the name indicates, partial class definitions can be split up across multiple physical files. To the compiler, this does not make a difference, as all the fragments of the partial class are grouped and the compiler treats it as a single class. One common usage of partial classes is the separation of automatically-generated code from programmer-written code.
Below is an example of a partial class.
Listing 1: Entire class definition in one file (file1.cs)
Listing 2: Class split across multiple files
(file1.cs)
(file2.cs)