# Apple silicon

Apple silicon is a series of system on a chip (SoC) and system in a package (SiP) processors designed by Apple Inc., mainly using the ARM architecture. They are the basis of Mac, iPhone, iPad, Apple TV, Apple Watch, AirPods, AirTag, HomePod, and Apple Vision Pro devices.
Apple announced its plan to switch Mac computers from Intel processors to Apple silicon at WWDC 2020 on June 22, 2020. The first Macs built with the Apple M1 chip were unveiled on November 10, 2020. As of March 2025, the entire Mac lineup uses Apple chips.
Apple fully controls the integration of Apple silicon in the company's hardware and software products. Johny Srouji, the senior vice president for Apple's hardware technologies is in charge of the silicon design. Manufacturing of the chips is outsourced to semiconductor contract manufacturers such as TSMC.

## A series SoCs

The A series is a family of SoCs used in the iPhone, certain iPad models (including iPad Mini and entry-level iPad), and the Apple TV. A-series chips were also used in the discontinued iPod Touch line and the original HomePod. They integrate one or more ARM-based processing cores (CPU), a graphics processing unit (GPU), cache memory and other electronics necessary to provide mobile computing functions within a single physical package.
Evolution of Apple A series :
| | | A5 March 2, 2011 – October 4, 2016 | A5 March 2, 2011 – October 4, 2016 | A5 March 2, 2011 – October 4, 2016 | A5 March 2, 2011 – October 4, 2016 | | | | | | | | | | | | | |
| | | | | | | A5X March 7 – October 23, 2012 | A5X March 7 – October 23, 2012 | A5X March 7 – October 23, 2012 | A5X March 7 – October 23, 2012 | A5X March 7 – October 23, 2012 | A5X March 7 – October 23, 2012 |
| | | | | | | A5X March 7 – October 23, 2012 | A5X March 7 – October 23, 2012 | A5X March 7 – October 23, 2012 | A5X March 7 – October 23, 2012 | A5X March 7 – October 23, 2012 | A5X March 7 – October 23, 2012 | A6 September 12, 2012 – September 9, 2015 | A6 September 12, 2012 – September 9, 2015 | A6 September 12, 2012 – September 9, 2015 | A6 September 12, 2012 – September 9, 2015 | A6 September 12, 2012 – September 9, 2015 | A6 September 12, 2012 – September 9, 2015 | | | | | | |
| | | | | | | A6X October 23, 2012 – October 22, 2013 March 18 – October 16, 2014 | A6X October 23, 2012 – October 22, 2013 March 18 – October 16, 2014 | A6X October 23, 2012 – October 22, 2013 March 18 – October 16, 2014 | A6X October 23, 2012 – October 22, 2013 March 18 – October 16, 2014 | A6X October 23, 2012 – October 22, 2013 March 18 – October 16, 2014 | A6X October 23, 2012 – October 22, 2013 March 18 – October 16, 2014 |
| A7 September 10, 2013 – March 21, 2017 | A7 September 10, 2013 – March 21, 2017 | A7 September 10, 2013 – March 21, 2017 | A7 September 10, 2013 – March 21, 2017 | A7 September 10, 2013 – March 21, 2017 | A7 September 10, 2013 – March 21, 2017 | | | | | | |
| A8 September 9, 2014 – October 18, 2022 | A8 September 9, 2014 – October 18, 2022 | A8 September 9, 2014 – October 18, 2022 | A8 September 9, 2014 – October 18, 2022 | A8 September 9, 2014 – October 18, 2022 | A8 September 9, 2014 – October 18, 2022 | | | | | | |
| | | | | | | A8X October 16, 2014 – March 21, 2017 | A8X October 16, 2014 – March 21, 2017 | A8X October 16, 2014 – March 21, 2017 | A8X October 16, 2014 – March 21, 2017 | A8X October 16, 2014 – March 21, 2017 | A8X October 16, 2014 – March 21, 2017 |
| A9 September 9, 2015 – September 12, 2018 | A9 September 9, 2015 – September 12, 2018 | A9 September 9, 2015 – September 12, 2018 | A9 September 9, 2015 – September 12, 2018 | A9 September 9, 2015 – September 12, 2018 | A9 September 9, 2015 – September 12, 2018 | | | | | | |
| | | | | | | A9X November 9, 2015 – June 5, 2017 | A9X November 9, 2015 – June 5, 2017 | A9X November 9, 2015 – June 5, 2017 | A9X November 9, 2015 – June 5, 2017 | A9X November 9, 2015 – June 5, 2017 | A9X November 9, 2015 – June 5, 2017 |
| A10 Fusion September 7, 2016 – May 10, 2022 | A10 Fusion September 7, 2016 – May 10, 2022 | A10 Fusion September 7, 2016 – May 10, 2022 | A10 Fusion September 7, 2016 – May 10, 2022 | A10 Fusion September 7, 2016 – May 10, 2022 | A10 Fusion September 7, 2016 – May 10, 2022 | | | | | | |
| | | | | | | A10X Fusion June 5, 2017 – April 20, 2021 | A10X Fusion June 5, 2017 – April 20, 2021 | A10X Fusion June 5, 2017 – April 20, 2021 | A10X Fusion June 5, 2017 – April 20, 2021 | A10X Fusion June 5, 2017 – April 20, 2021 | A10X Fusion June 5, 2017 – April 20, 2021 |
| A11 Bionic September 12, 2017 – April 15, 2020 | A11 Bionic September 12, 2017 – April 15, 2020 | A11 Bionic September 12, 2017 – April 15, 2020 | A11 Bionic September 12, 2017 – April 15, 2020 | A11 Bionic September 12, 2017 – April 15, 2020 | A11 Bionic September 12, 2017 – April 15, 2020 | | | | | | |
| A12 Bionic September 12, 2018 – October 18, 2022 | A12 Bionic September 12, 2018 – October 18, 2022 | A12 Bionic September 12, 2018 – October 18, 2022 | A12 Bionic September 12, 2018 – October 18, 2022 | A12 Bionic September 12, 2018 – October 18, 2022 | A12 Bionic September 12, 2018 – October 18, 2022 | | | | | | | | | | | | | | | | | | |
| | | | | | | A12X Bionic October 30, 2018 – March 18, 2020 | A12X Bionic October 30, 2018 – March 18, 2020 | A12X Bionic October 30, 2018 – March 18, 2020 | A12X Bionic October 30, 2018 – March 18, 2020 | A12X Bionic October 30, 2018 – March 18, 2020 | A12X Bionic October 30, 2018 – March 18, 2020 |
| A13 Bionic September 10, 2019 – present | A13 Bionic September 10, 2019 – present | A13 Bionic September 10, 2019 – present | A13 Bionic September 10, 2019 – present | A13 Bionic September 10, 2019 – present | A13 Bionic September 10, 2019 – present | | | | |
| A13 Bionic September 10, 2019 – present | A13 Bionic September 10, 2019 – present | A13 Bionic September 10, 2019 – present | A13 Bionic September 10, 2019 – present | A13 Bionic September 10, 2019 – present | A13 Bionic September 10, 2019 – present | | | | | | | | | | | | | A12Z Bionic March 18, 2020 – April 20, 2021 | A12Z Bionic March 18, 2020 – April 20, 2021 | A12Z Bionic March 18, 2020 – April 20, 2021 | A12Z Bionic March 18, 2020 – April 20, 2021 | A12Z Bionic March 18, 2020 – April 20, 2021 | A12Z Bionic March 18, 2020 – April 20, 2021 |
| A14 Bionic September 15, 2020 – March 4, 2025 | A14 Bionic September 15, 2020 – March 4, 2025 | A14 Bionic September 15, 2020 – March 4, 2025 | A14 Bionic September 15, 2020 – March 4, 2025 | A14 Bionic September 15, 2020 – March 4, 2025 | A14 Bionic September 15, 2020 – March 4, 2025 | | | | |
| A15 Bionic September 14, 2021 – present | A15 Bionic September 14, 2021 – present | A15 Bionic September 14, 2021 – present | A15 Bionic September 14, 2021 – present | A15 Bionic September 14, 2021 – present | A15 Bionic September 14, 2021 – present | | | | | | | | | | | | |
| A16 Bionic September 7, 2022 – present | A16 Bionic September 7, 2022 – present | A16 Bionic September 7, 2022 – present | A16 Bionic September 7, 2022 – present | A16 Bionic September 7, 2022 – present | A16 Bionic September 7, 2022 – present | | | | | | | | | | | | |
| | | | | | | A17 Pro September 12, 2023 – present | A17 Pro September 12, 2023 – present | A17 Pro September 12, 2023 – present | A17 Pro September 12, 2023 – present | A17 Pro September 12, 2023 – present | A17 Pro September 12, 2023 – present |
| A18 September 9, 2024 – present | A18 September 9, 2024 – present | A18 September 9, 2024 – present | A18 September 9, 2024 – present | A18 September 9, 2024 – present | A18 September 9, 2024 – present | | | | | | | | | | | | | | | | | | |
| | | | | | | A18 Pro September 9, 2024 – present | A18 Pro September 9, 2024 – present | A18 Pro September 9, 2024 – present | A18 Pro September 9, 2024 – present | A18 Pro September 9, 2024 – present | A18 Pro September 9, 2024 – present |

### Apple A4

The Apple A4 is a PoP SoC manufactured by Samsung, the first SoC Apple designed in-house. It combines an ARM Cortex-A8 CPU – also used in Samsung's S5PC110A01 SoC – and a PowerVR SGX 535 graphics processor (GPU), all built on Samsung's 45-nanometer silicon chip fabrication process. The design emphasizes power efficiency. The A4 commercially debuted in 2010, in Apple's iPad tablet, and was later used in the iPhone 4 smartphone, the fourth-generation iPod Touch, and the 2nd-generation Apple TV.
The Cortex-A8 core used in the A4, dubbed Hummingbird, is thought to use performance improvements developed by Samsung in collaboration with chip designer Intrinsity, which was subsequently acquired by Apple It can run at far higher clock rates than other Cortex-A8 designs yet remains fully compatible with the design provided by ARM. The A4 runs at different speeds in different products: 1 GHz in the first iPads, 800 MHz in the iPhone 4 and fourth-generation iPod Touch, and an undisclosed speed in the 2nd-generation Apple TV.
The A4's SGX535 GPU could theoretically push 35 million polygons per second and 500 million pixels per second, although real-world performance may be considerably less. Other performance improvements include additional L2 cache.
The A4 processor package does not contain RAM, but supports PoP installation. The 1st-generation iPad, fourth-generation iPod Touch, and the 2nd-generation Apple TV have an A4 mounted with two low-power 128 MB DDR SDRAM chips (totaling 256 MB), while the iPhone 4 has two 256 MB packages for a total of 512 MB. The RAM is connected to the processor using ARM's 64-bit-wide AMBA 3 AXI bus. To give the iPad high graphics bandwidth, the width of the RAM data bus is double that used in previous ARM11- and ARM9-based Apple devices.

### Apple A5

The Apple A5 is an SoC manufactured by Samsung that replaced the A4. The chip commercially debuted with the release of Apple's iPad 2 tablet in March 2011, followed by its release in the iPhone 4S smartphone later that year. Compared to the A4, the A5 CPU "can do twice the work" and the GPU has "up to nine times the graphics performance", according to Apple.
The A5 contains a dual-core ARM Cortex-A9 CPU with ARM's advanced SIMD extension, marketed as NEON, and a dual core PowerVR SGX543MP2 GPU. This GPU can push between 70 and 80 million polygons/second and has a pixel fill rate of 2 billion pixels/second. The iPad 2's technical specifications page says the A5 is clocked at 1 GHz, though it can adjust its frequency to save battery life. The clock speed of the unit used in the iPhone 4S is 800 MHz. Like the A4, the A5 process size is 45 nm.
An updated 32 nm version of the A5 processor was used in the third-generation Apple TV, the fifth-generation iPod Touch, the iPad Mini, and the new version of iPad 2 (version iPad2,4). The chip in the Apple TV has one core locked. Markings on the square package indicate that it is named APL2498, and in software, the chip is called S5L8942. The 32 nm variant of the A5 provides around 15% better battery life during web browsing, 30% better when playing 3D games and about 20% better battery life during video playback.
In March 2013, Apple released an updated version of the 3rd-generation Apple TV (Rev A, model A1469) containing a smaller, single-core version of the A5 processor. Unlike the other A5 variants, this version of the A5 is not a PoP, having no stacked RAM. The chip is very small, just 6.1×6.2 mm, but as the decrease in size is not due to a decrease in feature size (it is still on a 32 nm fabrication process), this indicates that this A5 revision is of a new design. Markings tell that it is named APL7498, and in software, the chip is called S5L8947.

### Apple A5X

The Apple A5X is an SoC announced on March 7, 2012, at the launch of the third-generation iPad. It is a high-performance variant of the Apple A5; Apple claims it has twice the graphics performance of the A5. It was superseded in the fourth-generation iPad by the Apple A6X processor.
The A5X has a quad-core graphics unit (PowerVR SGX543MP4) instead of the previous dual-core as well as a quad-channel memory controller that provides a memory bandwidth of 12.8 GB/s, roughly three times more than in the A5. The added graphics cores and extra memory channels add up to a very large die size of 165 mm$^2$, for example twice the size of Nvidia Tegra 3. This is mainly due to the large PowerVR SGX543MP4 GPU. The clock frequency of the dual ARM Cortex-A9 cores have been shown to operate at the same 1 GHz frequency as in A5. The RAM in A5X is separate from the main CPU package.

### Apple A6

The Apple A6 is a PoP SoC introduced on September 12, 2012, at the launch of the iPhone 5, then a year later was inherited by its minor successor the iPhone 5C. Apple states that it is up to twice as fast and has up to twice the graphics power compared to its predecessor the Apple A5. It is 22% smaller and draws less power than the 45 nm A5.
The A6 is said to use a 1.3 GHz custom Apple-designed ARMv7 based dual-core CPU, called Swift, rather than a licensed CPU from ARM like in previous designs, and an integrated 266 MHz triple-core PowerVR SGX 543MP3 graphics processing unit (GPU). The Swift core in the A6 uses a new tweaked instruction set, ARMv7s, featuring some elements of the ARM Cortex-A15 such as support for the Advanced SIMD v2, and VFPv4. The A6 is manufactured by Samsung on a high-κ metal gate (HKMG) 32 nm process.

### Apple A6X

Apple A6X is an SoC introduced at the launch of the fourth-generation iPad on October 23, 2012. It is a high-performance variant of the Apple A6. Apple claims the A6X has twice the CPU performance and up to twice the graphics performance of its predecessor, the Apple A5X.
Like the A6, this SoC continues to use the dual-core Swift CPU, but it has a new quad core GPU, quad channel memory and slightly higher 1.4 GHz CPU clock rate. It uses an integrated quad-core PowerVR SGX 554MP4 graphics processing unit (GPU) running at 300 MHz and a quad-channel memory subsystem. Compared to the A6 the A6X is 30% larger, but it continues to be manufactured by Samsung on a high-κ metal gate (HKMG) 32 nm process.

### Apple A7

The Apple A7 is a 64-bit PoP SoC whose first appearance was in the iPhone 5S, which was introduced on September 10, 2013. The chip would also be used in the iPad Air, iPad Mini 2 and iPad Mini 3. Apple states that it is up to twice as fast and has up to twice the graphics power compared to its predecessor the Apple A6. The Apple A7 chip is the first 64-bit chip to be used in a smartphone and later a tablet computer.
The A7 features an Apple-designed 1.3–1.4 GHz 64-bit ARMv8-A dual-core CPU, called Cyclone, and an integrated PowerVR G6430 GPU in a four cluster configuration. The ARMv8-A architecture doubles the number of registers of the A7 compared to the A6. It now has 31 general-purpose registers that are each 64-bits wide and 32 floating-point/NEON registers that are each 128-bits wide. The A7 is manufactured by Samsung on a high-κ metal gate (HKMG) 28 nm process and the chip includes over 1 billion transistors on a die 102 mm$^2$ in size.

### Apple A8

The Apple A8 is a 64-bit PoP SoC manufactured by TSMC. Its first appearance was in the iPhone 6 and iPhone 6 Plus, which were introduced on September 9, 2014. A year later it would drive the iPad Mini 4. Apple states that it has 25% more CPU performance and 50% more graphics performance while drawing only 50% of the power compared to its predecessor, the Apple A7. On February 9, 2018, Apple released the HomePod, which is powered by an Apple A8 with 1 GB of RAM.
The A8 features an Apple-designed 1.4 GHz 64-bit ARMv8-A dual-core CPU, and an integrated custom PowerVR GX6450 GPU in a four cluster configuration. The GPU features custom shader cores and compiler. The A8 is manufactured on a 20 nm process by TSMC, which replaced Samsung as the manufacturer of Apple's mobile device processors. It contains 2 billion transistors. Despite that being double the number of transistors compared to the A7, its physical size has been reduced by 13% to 89 mm$^2$ (consistent with a shrink only, not known to be a new microarchitecture).

### Apple A8X

The Apple A8X is a 64-bit SoC introduced at the launch of the iPad Air 2 on October 16, 2014. It is a high performance variant of the Apple A8. Apple states that it has 40% more CPU performance and 2.5 times the graphics performance of its predecessor, the Apple A7.
Unlike the A8, this SoC uses a triple-core CPU, a new octa-core GPU, dual channel memory and slightly higher 1.5 GHz CPU clock rate. It uses an integrated custom octa-core PowerVR GXA6850 graphics processing unit (GPU) running at 450 MHz and a dual-channel memory subsystem. It is manufactured by TSMC on their 20 nm fabrication process, and consists of 3 billion transistors.

### Apple A9

The Apple A9 is a 64-bit ARM-based SoC that first appeared in the iPhone 6S and 6S Plus, which were introduced on September 9, 2015. Apple states that it has 70% more CPU performance and 90% more graphics performance compared to its predecessor, the Apple A8. It is dual sourced, a first for an Apple SoC; it is manufactured by Samsung on their 14 nm FinFET LPE process and by TSMC on their 16 nm FinFET process. It was subsequently included in the first-generation iPhone SE, and the iPad (5th generation). The Apple A9 was the last CPU that Apple manufactured through a contract with Samsung, as all A-series chips after are manufactured by TSMC.

### Apple A9X

The Apple A9X is a 64-bit SoC that was announced on September 9, 2015, and released on November 11, 2015, and first appeared in the iPad Pro. It offers 80% more CPU performance and two times the GPU performance of its predecessor, the Apple A8X. It is manufactured by TSMC using a 16 nm FinFET process.

### Apple A10 Fusion

The Apple A10 Fusion is a 64-bit ARM-based SoC that first appeared in the iPhone 7 and 7 Plus, which were introduced on September 7, 2016. The A10 is also featured in the sixth-generation iPad, seventh-generation iPad and seventh-generation iPod Touch. It has a new ARM big.LITTLE quad core design with two high performance cores, and two smaller highly efficient cores. It is 40% faster than the A9, with 50% faster graphics. It is manufactured by TSMC on their 16 nm FinFET process.

### Apple A10X Fusion

The Apple A10X Fusion is a 64-bit ARM-based SoC that first appeared in the 10.5″ iPad Pro and the second generation of the 12.9″ iPad Pro, which were both announced on June 5, 2017. It is a variant of the A10 and Apple claims that it has 30 percent faster CPU performance and 40 percent faster GPU performance than its predecessor, the A9X. On September 12, 2017, Apple announced that the Apple TV 4K would be powered by an A10X chip. It is made by TSMC on their 10 nm FinFET process.

### Apple A11 Bionic

The Apple A11 Bionic is a 64-bit ARM-based SoC that first appeared in the iPhone 8, iPhone 8 Plus, and iPhone X, which were introduced on September 12, 2017. It has two high-performance cores, which are 25% faster than the A10 Fusion, four high-efficiency cores, which are 70% faster than the energy-efficient cores in the A10, and for the first time an Apple-designed three-core GPU with 30% faster graphics performance than the A10. It is also the first A-series chip to feature Apple's "Neural Engine," which enhances artificial intelligence and machine learning processes.

### Apple A12 Bionic

The Apple A12 Bionic is a 64-bit ARM-based SoC that first appeared in the iPhone XS, XS Max and XR, which were introduced on September 12, 2018. It is also used in the third-generation iPad Air, fifth-generation iPad Mini, and the eighth-generation iPad. It has two high-performance cores, which are 15% faster than the A11 Bionic, and four high-efficiency cores, which have 50% lower power usage than the energy-efficient cores in the A11 Bionic. The A12 is manufactured by TSMC using a 7 nm FinFET process, the first to ship in a smartphone. It is also used in the 6th generation Apple TV.

### Apple A12X Bionic

The Apple A12X Bionic is a 64-bit ARM-based SoC that first appeared in the 11.0″ iPad Pro and the third generation of the 12.9″ iPad Pro, which were both announced on October 30, 2018. It offers 35% faster single-core and 90% faster multi-core CPU performance than its predecessor, the A10X. It has four high-performance cores and four high-efficiency cores. The A12X is manufactured by TSMC using a 7 nm FinFET process.

#### Apple A12Z Bionic

The Apple A12Z Bionic is an updated version of the A12X Bionic, first appearing in the fourth generation iPad Pro, which was announced on March 18, 2020. It adds an additional GPU core, compared to the A12X, for improved graphics performance. The A12Z is also used in the Developer Transition Kit prototype computer that helps developers prepare their software for Macs based on Apple silicon.

### Apple A13 Bionic

The Apple A13 Bionic is a 64-bit ARM-based SoC that first appeared in the iPhone 11, 11 Pro, and 11 Pro Max, which were introduced on September 10, 2019. It is also featured in the second-generation iPhone SE (released April 15, 2020), the 9th generation iPad (announced September 14, 2021) and in the Studio Display (announced March 8, 2022)
The entire A13 SoC features a total of 18 cores – a six-core CPU, four-core GPU, and an eight-core Neural Engine processor, which is dedicated to handling on-board machine learning processes; four of the six cores on the CPU are low-powered cores that are dedicated to handling less CPU-intensive operations, such as voice calls, browsing the Web, and sending messages, while two higher-performance cores are used only for more CPU-intensive processes, such as recording 4K video or playing a video game.

### Apple A14 Bionic

The Apple A14 Bionic is a 64-bit ARM-based SoC that first appeared in the fourth-generation iPad Air and iPhone 12, released on October 23, 2020. It is the first commercially available 5 nm chipset and it contains 11.8 billion transistors and a 16-core AI processor. It includes Samsung LPDDR4X DRAM, a 6-core CPU, and 4-Core GPU with real time machine learning capabilities. It was later used in the tenth-generation iPad, released on October 26, 2022.

### Apple A15 Bionic

The Apple A15 Bionic is a 64-bit ARM-based SoC that first appeared in the iPhone 13, unveiled on September 14, 2021. The A15 is built on a 5-nanometer manufacturing process with 15 billion transistors. It has 2 high-performance processing cores, 4 high-efficiency cores, a new 5-core graphics for iPhone 13 Pro series (4-core for iPhone 13 and 13 mini) processing unit, and a new 16-core Neural Engine capable of 15.8 trillion operations per second. It is also used in the third-generation iPhone SE, iPhone 14, iPhone 14 Plus and the sixth-generation iPad Mini.

### Apple A16 Bionic

The Apple A16 Bionic is a 64-bit ARM-based SoC that first appeared in the iPhone 14 Pro, unveiled on September 7, 2022. The A16 has 16 billion transistors and is built on TSMC's N4P fabrication process, being touted by Apple as the first 4 nm processor in a smartphone. However, N4 is an enhanced version of N5 technology, a de facto fourth-generation 5 nm manufacturing process. The chip has 2 high-performance processing cores, 4 high-efficiency cores and 5-core graphics for iPhone 14 Pro series. Memory is upgraded to LPDDR5 for 50% higher bandwidth and a 7% faster 16-core Neural Engine capable of 17 trillion operations per second. The chip was later used in the iPhone 15 and iPhone 15 Plus.

### Apple A17 Pro

The Apple A17 Pro is a 64-bit ARM-based SoC that first appeared in the iPhone 15 Pro, unveiled on September 12, 2023. It is Apple's first 3 nm SoC. The chip has 2 high-performance processing cores, 4 high-efficiency cores, a 6-core GPU for iPhone 15 Pro series, and a 16-core Neural Engine capable of 35 trillion operations per second. The GPU was described as their biggest redesign in the history of Apple GPUs, adding hardware accelerated ray tracing and mesh shading support.

### Apple A18

The Apple A18 is a 64-bit ARM-based SoC designed by Apple that first appeared in the iPhone 16 and iPhone 16 Plus.

#### Apple A18 Pro

The Apple A18 Pro is a 64-bit ARM-based SoC designed by Apple that first appeared in the iPhone 16 Pro.

### Comparison of A-series processors

| General | General | General | General | Semiconductor technology | Semiconductor technology | Semiconductor technology | Semiconductor technology | Computer architecture | Computer architecture | CPU | CPU | CPU | CPU | CPU | CPU | CPU | CPU | CPU | CPU | CPU | GPU | GPU | GPU | GPU | GPU | GPU | AI accelerator | AI accelerator | Memory technology | Memory technology | Memory technology | Memory technology | Memory technology | First release |
| Name | Codename | Part number | Image | Node | Manufacturer | Transistors count | Die size | CPU ISA | Bit width | Performance core | Performance core | Performance core | Efficiency core | Efficiency core | Efficiency core | Overall cores | Cache | Cache | Cache | Cache | Vendor | Cores | SIMD EU count | FP32 ALU count | Frequency | FP32 FLOPS | Cores | OPS | Memory bus width | Total channel Bit per channel | Memory type | Theoretical bandwidth | Available capacity | First release |
| Name | Codename | Part number | Image | Node | Manufacturer | Transistors count | Die size | CPU ISA | Bit width | Core name | Cores | Core speed | Core name | Cores | Core speed | Overall cores | L1 | L2 | L3 | SLC | Vendor | Cores | SIMD EU count | FP32 ALU count | Frequency | FP32 FLOPS | Cores | OPS | Memory bus width | Total channel Bit per channel | Memory type | Theoretical bandwidth | Available capacity | First release |
| | APL0098 | S5L8900 | | 90 nm | Samsung | | 72 mm$^2$ | ARMv6 | 32-bit | ARM11 | 1 | 412 MHz | — | — | — | Single-core | L1i: 16 KB L1d: 16 KB | — | — | — | PowerVR MBX Lite | 1 | 1 | 8 | 60 MHz – 103 MHz | 0.96 GFLOPS – 1.64 GFLOPS | — | — | 16-bit | 1 channel 16-bit/channel | LPDDR-266 (133.25 MHz) | 533 MB/s | 128 MB | June 29, 2007 |
| | APL0278 | S5L8720 | | 65 nm | Samsung | | 36 mm$^2$ | ARMv6 | 32-bit | ARM11 | 1 | 533 MHz | — | — | — | Single-core | L1i: 16 KB L1d: 16 KB | — | — | — | PowerVR MBX Lite | 1 | 1 | 8 | 103 MHz – 133 MHz | 1.64 GFLOPs – 2.12 GFLOPS | — | — | 32-bit | 1 channel 32-bit/channel | LPDDR-266 (133.25 MHz) | 1066 MB/s | 128 MB | July 11, 2008 |
| | APL0298 | S5L8920 | | 65 nm | Samsung | | 71.8 mm$^2$ | ARMv7 | 32-bit | Cortex-A8 | 1 | 600 MHz | — | — | — | Single-core | L1i: 32 KB L1d: 32 KB | 256 KB | — | — | PowerVR SGX535 | 1 | 2 | 16 | 200 MHz | 6.4 GFLOPS | — | — | 32-bit | 1 channel 32-bit/channel | LPDDR-400 (200 MHz) | 1.6 GB/s | 256 MB | June 19, 2009 |
| | APL2298 | S5L8922 | | 45 nm | Samsung | | 41.6 mm$^2$ | ARMv7 | 32-bit | Cortex-A8 | 1 | 600 MHz | — | — | — | Single-core | L1i: 32 KB L1d: 32 KB | 256 KB | — | — | PowerVR SGX535 | 1 | 2 | 16 | 200 MHz | 6.4 GFLOPS | — | — | 32-bit | 1 channel 32-bit/channel | LPDDR-400 (200 MHz) | 1.6 GB/s | 256 MB | September 9, 2009 |
| A4 | APL0398 | S5L8930 | | 45 nm | Samsung | | 53.3 mm$^2$ | ARMv7 | 32-bit | Cortex-A8 | 1 | 800 MHz | — | — | — | Single-core | L1i: 32 KB L1d: 32 KB | 512 KB | — | — | PowerVR SGX535 | 1 | 2 | 16 | 200 MHz – 250 MHz | 6.4 GFLOPS – 8.0 GFLOPS | — | — | 64-bit | 2 channels 32-bit/channel | LPDDR-400 (200 MHz) | 3.2 GB/s | 256 MB | April 3, 2010 |
| A4 | APL0398 | S5L8930 | | 45 nm | Samsung | | 53.3 mm$^2$ | ARMv7 | 32-bit | Cortex-A8 | 1 | 1.0 GHz | — | — | — | Single-core | L1i: 32 KB L1d: 32 KB | 512 KB | — | — | PowerVR SGX535 | 1 | 2 | 16 | 200 MHz – 250 MHz | 6.4 GFLOPS – 8.0 GFLOPS | — | — | 64-bit | 2 channels 32-bit/channel | LPDDR-400 (200 MHz) | 3.2 GB/s | 256 MB | April 3, 2010 |
| A4 | APL0398 | S5L8930 | | 45 nm | Samsung | | 53.3 mm$^2$ | ARMv7 | 32-bit | Cortex-A8 | 1 | 800 MHz | — | — | — | Single-core | L1i: 32 KB L1d: 32 KB | 512 KB | — | — | PowerVR SGX535 | 1 | 2 | 16 | 200 MHz – 250 MHz | 6.4 GFLOPS – 8.0 GFLOPS | — | — | 64-bit | 2 channels 32-bit/channel | LPDDR-400 (200 MHz) | 3.2 GB/s | 512 MB | April 3, 2010 |
| A5 | APL0498 | S5L8940 | | 45 nm | Samsung | | 122.2 mm$^2$ | ARMv7 | 32-bit | Cortex-A9 | 2 | 800 MHz | — | — | — | Dual-core | L1i: 32 KB L1d: 32 KB | 1 MB | — | — | PowerVR SGX543 | 2 | 4 | 32 | 200 MHz | 12.8 GFLOPS | — | — | 64-bit | 2 channels 32-bit/channel | LPDDR2-800 (400 MHz) | 6.4 GB/s | 512 MB | March 11, 2011 |
| A5 | APL0498 | S5L8940 | | 45 nm | Samsung | | 122.2 mm$^2$ | ARMv7 | 32-bit | Cortex-A9 | 2 | 1.0 GHz | — | — | — | Dual-core | L1i: 32 KB L1d: 32 KB | 1 MB | — | — | PowerVR SGX543 | 2 | 4 | 32 | 200 MHz | 12.8 GFLOPS | — | — | 64-bit | 2 channels 32-bit/channel | LPDDR2-800 (400 MHz) | 6.4 GB/s | 512 MB | March 11, 2011 |
| A5 | APL2498 | S5L8942 | | 32 nm Hκ MG | Samsung | | 69.6 mm$^2$ | ARMv7 | 32-bit | Cortex-A9 | 2 | 800 MHz | — | — | — | Dual-core | L1i: 32 KB L1d: 32 KB | 1 MB | — | — | PowerVR SGX543 | 2 | 4 | 32 | 200 MHz | 12.8 GFLOPS | — | — | 64-bit | 2 channels 32-bit/channel | LPDDR2-800 (400 MHz) | 6.4 GB/s | 512 MB | March 7, 2012 |
| A5 | APL2498 | S5L8942 | | 32 nm Hκ MG | Samsung | | 69.6 mm$^2$ | ARMv7 | 32-bit | Cortex-A9 | 2 | 1.0 GHz | — | — | — | Dual-core | L1i: 32 KB L1d: 32 KB | 1 MB | — | — | PowerVR SGX543 | 2 | 4 | 32 | 200 MHz | 12.8 GFLOPS | — | — | 64-bit | 2 channels 32-bit/channel | LPDDR2-800 (400 MHz) | 6.4 GB/s | 512 MB | March 7, 2012 |
| A5 | APL2498 | S5L8942 | | 32 nm Hκ MG | Samsung | | 69.6 mm$^2$ | ARMv7 | 32-bit | Cortex-A9 | 2 | 1.0 GHz | — | — | — | Dual-core | L1i: 32 KB L1d: 32 KB | 1 MB | — | — | PowerVR SGX543 | 2 | 4 | 32 | 200 MHz | 12.8 GFLOPS | — | — | 64-bit | 2 channels 32-bit/channel | LPDDR2-800 (400 MHz) | 6.4 GB/s | 512 MB | March 7, 2012 |
| A5 | APL7498 | S5L8947 | | 32 nm Hκ MG | Samsung | | 37.8 mm$^2$ | ARMv7 | 32-bit | Cortex-A9 | 1 | 1.0 GHz | — | — | — | Single-core | L1i: 32 KB L1d: 32 KB | 1 MB | — | — | PowerVR SGX543 | 2 | 4 | 32 | 200 MHz | 12.8 GFLOPS | — | — | 64-bit | 2 channels 32-bit/channel | LPDDR2-800 (400 MHz) | 6.4 GB/s | 512 MB | January 28, 2013 |
| A5X | APL5498 | S5L8945 | | 45 nm | Samsung | | 165 mm$^2$ | ARMv7 | 32-bit | Cortex-A9 | 2 | 1.0 GHz | — | — | — | Dual-core | L1i: 32 KB L1d: 32 KB | 1 MB | — | — | PowerVR SGX543 | 4 | 8 | 64 | 200 MHz | 25.6 GFLOPS | — | — | 128-bit | 4 channels 32-bit/channel | LPDDR2-800 (400 MHz) | 12.8 GB/s | 1 GB | March 16, 2012 |
| A6 | APL0598 | S5L8950 | | 32 nm Hκ MG | Samsung | | 96.71 mm$^2$ | ARMv7s | 32-bit | Swift | 2 | 1.3 GHz | — | — | — | Dual-core | L1i: 32 KB L1d: 32 KB | 1 MB | — | — | PowerVR SGX543 | 3 | 6 | 48 | 266 or 709 MHz | 25.5 or 68.0 GFLOPS | — | — | 64-bit | 2 channels 32-bit/channel | LPDDR2-1066 (533 MHz) | 8.5 GB/s | 1 GB | September 21, 2012 |
| A6X | APL5598 | S5L8955 | | 32 nm Hκ MG | Samsung | | 123 mm$^2$ | ARMv7s | 32-bit | Swift | 2 | 1.4 GHz | — | — | — | Dual-core | L1i: 32 KB L1d: 32 KB | 1 MB | — | — | PowerVR SGX554 | 4 | 16 | 128 | 300 MHz | 76.8 GFLOPS | — | — | 128-bit | 4 channels 32-bit/channel | LPDDR2-1066 (533 MHz) | 17.0 GB/s | 1 GB | November 2, 2012 |
| A7 | APL0698 | S5L8960 | | 28 nm Hκ MG | Samsung | 1 billion | 102 mm$^2$ | ARMv8.0-A | 64-bit | Cyclone | 2 | 1.3 GHz | — | — | — | Dual-core | L1i: 64 KB L1d: 64 KB | 1 MB | 4 MB (Inclusive) | — | PowerVR G6430 | 4 | 16 | 128 | 450 MHz | 115.2 GFLOPS | — | — | 64-bit | 1 channel 64-bit/channel | LPDDR3-1600 (800 MHz) | 12.8 GB/s | 1 GB | September 20, 2013 |
| A7 | APL5698 | S5L8965 | | 28 nm Hκ MG | Samsung | 1 billion | 102 mm$^2$ | ARMv8.0-A | 64-bit | Cyclone | 2 | 1.4 GHz | — | — | — | Dual-core | L1i: 64 KB L1d: 64 KB | 1 MB | 4 MB (Inclusive) | — | PowerVR G6430 | 4 | 16 | 128 | 450 MHz | 115.2 GFLOPS | — | — | 64-bit | 1 channel 64-bit/channel | LPDDR3-1600 (800 MHz) | 12.8 GB/s | 1 GB | November 1, 2013 |
| A8 | APL1011 | T7000 | | 20 nm Hκ MG | TSMC | 2 billion | 89 mm$^2$ | ARMv8.0-A | 64-bit | Typhoon | 2 | 1.1 GHz | — | — | — | Dual-core | L1i: 64 KB L1d: 64 KB | 1 MB | 4 MB (Inclusive) | — | PowerVR GX6450 | 4 | 16 | 128 | 533 MHz | 136.4 GFLOPS | — | — | 64-bit | 1 channel 64-bit/channel | LPDDR3-1600 (800 MHz) | 12.8 GB/s | 1 GB | September 19, 2014 |
| A8 | APL1011 | T7000 | | 20 nm Hκ MG | TSMC | 2 billion | 89 mm$^2$ | ARMv8.0-A | 64-bit | Typhoon | 2 | 1.4 GHz | — | — | — | Dual-core | L1i: 64 KB L1d: 64 KB | 1 MB | 4 MB (Inclusive) | — | PowerVR GX6450 | 4 | 16 | 128 | 533 MHz | 136.4 GFLOPS | — | — | 64-bit | 1 channel 64-bit/channel | LPDDR3-1600 (800 MHz) | 12.8 GB/s | 1 GB | September 19, 2014 |
| A8 | APL1011 | T7000 | | 20 nm Hκ MG | TSMC | 2 billion | 89 mm$^2$ | ARMv8.0-A | 64-bit | Typhoon | 2 | 1.5 GHz | — | — | — | Dual-core | L1i: 64 KB L1d: 64 KB | 1 MB | 4 MB (Inclusive) | — | PowerVR GX6450 | 4 | 16 | 128 | 533 MHz | 136.4 GFLOPS | — | — | 64-bit | 1 channel 64-bit/channel | LPDDR3-1600 (800 MHz) | 12.8 GB/s | 2 GB | September 19, 2014 |
| A8X | APL1021 | T7001 | | 20 nm Hκ MG | TSMC | 3 billion | 128 mm$^2$ | ARMv8.0-A | 64-bit | Typhoon | 3 | 1.5 GHz | — | — | — | 3-core | L1i: 64 KB L1d: 64 KB | 2 MB | 4 MB (Inclusive) | — | PowerVR GX6850 | 8 | 32 | 256 | 450 MHz | 230.4 GFLOPS | — | — | 128-bit | 2 channels 64-bit/channel | LPDDR3-1600 (800 MHz) | 25.6 GB/s | 2 GB | October 22, 2014 |
| A9 | APL0898 | S8000 | | 14 nm FinFET | Samsung | ≥ 2 billion | 96 mm$^2$ | ARMv8.0-A | 64-bit | Twister | 2 | 1.85 GHz | — | — | — | Dual-core | L1i: 64 KB L1d: 64 KB | 3 MB | 4 MB (Victim) | — | PowerVR GT7600 | 6 | 24 | 192 | 650 MHz | 249.6 GFLOPS | — | — | 64-bit | 1 channel 64-bit/channel | LPDDR4-3200 (1600 MHz) | 25.6 GB/s | 2 GB | September 25, 2015 |
| A9 | APL1022 | S8003 | | 16 nm FinFET | TSMC | ≥ 2 billion | 104.5 mm$^2$ | ARMv8.0-A | 64-bit | Twister | 2 | 1.85 GHz | — | — | — | Dual-core | L1i: 64 KB L1d: 64 KB | 3 MB | 4 MB (Victim) | — | PowerVR GT7600 | 6 | 24 | 192 | 650 MHz | 249.6 GFLOPS | — | — | 64-bit | 1 channel 64-bit/channel | LPDDR4-3200 (1600 MHz) | 25.6 GB/s | 2 GB | September 25, 2015 |
| A9X | APL1021 | S8001 | | 16 nm FinFET | TSMC | ≥ 3 billion | 143.9 mm$^2$ | ARMv8.0-A | 64-bit | Twister | 2 | 2.16 GHz | — | — | — | Dual-core | L1i: 64 KB L1d: 64 KB | 3 MB | — | — | PowerVR GT7850 | 12 | 48 | 384 | 650 MHz | 499.2 GFLOPS | — | — | 128-bit | 2 channels 64-bit/channel | LPDDR4-3200 (1600 MHz) | 25.6 GB/s | 2 GB | November 11, 2015 |
| A9X | APL1021 | S8001 | | 16 nm FinFET | TSMC | ≥ 3 billion | 143.9 mm$^2$ | ARMv8.0-A | 64-bit | Twister | 2 | 2.26 GHz | — | — | — | Dual-core | L1i: 64 KB L1d: 64 KB | 3 MB | — | — | PowerVR GT7850 | 12 | 48 | 384 | 650 MHz | 499.2 GFLOPS | — | — | 128-bit | 2 channels 64-bit/channel | LPDDR4-3200 (1600 MHz) | 51.2 GB/s | 4 GB | November 11, 2015 |
| A10 Fusion | APL1W24 | T8010 | | 16 nm FinFET | TSMC | 3.3 billion | 125 mm$^2$ | ARMv8.1-A | 64-bit | Hurricane | 2 | 1.64 GHz | Zephyr | 2 | 1.09 GHz | Quad-core | P-core: L1i: 64 KB L1d: 64 KB E-core: L1i: 32 KB L1d: 32 KB | P-core: 3 MB E-core: 1 MB | 4 MB | — | PowerVR GT7600 Plus | 6 | 24 | 192 | 900 MHz | 345.6 GFLOPS | — | — | 64-bit | 1 channel 64-bit/channel | LPDDR4-3200 (1600 MHz) | 25.6 GB/s | 2 GB | September 16, 2016 |
| A10 Fusion | APL1W24 | T8010 | | 16 nm FinFET | TSMC | 3.3 billion | 125 mm$^2$ | ARMv8.1-A | 64-bit | Hurricane | 2 | 2.34 GHz | Zephyr | 2 | 1.09 GHz | Quad-core | P-core: L1i: 64 KB L1d: 64 KB E-core: L1i: 32 KB L1d: 32 KB | P-core: 3 MB E-core: 1 MB | 4 MB | — | PowerVR GT7600 Plus | 6 | 24 | 192 | 900 MHz | 345.6 GFLOPS | — | — | 64-bit | 1 channel 64-bit/channel | LPDDR4-3200 (1600 MHz) | 25.6 GB/s | 2 GB | September 16, 2016 |
| A10 Fusion | APL1W24 | T8010 | | 16 nm FinFET | TSMC | 3.3 billion | 125 mm$^2$ | ARMv8.1-A | 64-bit | Hurricane | 2 | 2.34 GHz | Zephyr | 2 | 1.09 GHz | Quad-core | P-core: L1i: 64 KB L1d: 64 KB E-core: L1i: 32 KB L1d: 32 KB | P-core: 3 MB E-core: 1 MB | 4 MB | — | PowerVR GT7600 Plus | 6 | 24 | 192 | 900 MHz | 345.6 GFLOPS | — | — | 64-bit | 1 channel 64-bit/channel | LPDDR4-3200 (1600 MHz) | 25.6 GB/s | 3 GB | September 16, 2016 |
| A10X Fusion | APL1071 | T8011 | | 10 nm FinFET | TSMC | ≥ 4 billion | 96.4 mm$^2$ | ARMv8.1-A | 64-bit | Hurricane | 3 | 2.38 GHz | Zephyr | 3 | 1.30 GHz | 6-core | P-core: L1i: 64 KB L1d: 64 KB E-core: L1i: 32 KB L1d: 32 KB | P-core: 8 MB E-core: 1 MB | — | 4 MB | PowerVR GT7600 Plus | 12 | 48 | 384 | 1000 MHz | 768.0 GFLOPS | — | — | 128-bit | 2 channels 64-bit/channel | LPDDR4-3200 (1600 MHz) | 51.2 GB/s | 3 GB | June 13, 2017 |
| A10X Fusion | APL1071 | T8011 | | 10 nm FinFET | TSMC | ≥ 4 billion | 96.4 mm$^2$ | ARMv8.1-A | 64-bit | Hurricane | 3 | 2.38 GHz | Zephyr | 3 | 1.30 GHz | 6-core | P-core: L1i: 64 KB L1d: 64 KB E-core: L1i: 32 KB L1d: 32 KB | P-core: 8 MB E-core: 1 MB | — | 4 MB | PowerVR GT7600 Plus | 12 | 48 | 384 | 1000 MHz | 768.0 GFLOPS | — | — | 128-bit | 2 channels 64-bit/channel | LPDDR4-3200 (1600 MHz) | 51.2 GB/s | 4 GB | June 13, 2017 |
| A11 Bionic | APL1W72 | T8015 | | 10 nm FinFET | TSMC | 4.3 billion | 87.66 mm$^2$ | ARMv8.2-A | 64-bit | Monsoon | 2 | 2.39 GHz | Mistral | 4 | 1.19 GHz | 6-core | P-core: L1i: 64 KB L1d: 64 KB E-core: L1i: 32 KB L1d: 32 KB | P-core: 8 MB E-core: 1 MB | — | 4 MB | 1st generation Apple- designed | 3 | 12 | 192 | 1066 MHz | 409.3 GFLOPS | 2 | 600 billion OPS | 64-bit | 4 channels 16-bit/channel | LPDDR4X-4266 (2133 MHz) | 34.1 GB/s | 2 GB | September 22, 2017 |
| A11 Bionic | APL1W72 | T8015 | | 10 nm FinFET | TSMC | 4.3 billion | 87.66 mm$^2$ | ARMv8.2-A | 64-bit | Monsoon | 2 | 2.39 GHz | Mistral | 4 | 1.19 GHz | 6-core | P-core: L1i: 64 KB L1d: 64 KB E-core: L1i: 32 KB L1d: 32 KB | P-core: 8 MB E-core: 1 MB | — | 4 MB | 1st generation Apple- designed | 3 | 12 | 192 | 1066 MHz | 409.3 GFLOPS | 2 | 600 billion OPS | 64-bit | 4 channels 16-bit/channel | LPDDR4X-4266 (2133 MHz) | 34.1 GB/s | 3 GB | September 22, 2017 |
| A12 Bionic | APL1W81 | T8020 | | 7 nm (N7) FinFET | TSMC | 6.9 billion | 83.27 mm$^2$ | ARMv8.3-A | 64-bit | Vortex | 2 | 2.49 GHz | Tempest | 4 | 1.59 GHz | 6-core | P-core: L1i: 128 KB L1d: 128 KB E-core: L1i: 32 KB L1d: 32 KB | P-core: 8 MB E-core: 2 MB | — | 8 MB | 2nd generation Apple- designed (Apple G11P) | 4 | 16 | 256 | 1125 MHz | 576.0 GFLOPS | 8 | 5 TOPS | 64-bit | 4 channels 16-bit/channel | LPDDR4X-4266 (2133 MHz) | 34.1 GB/s | 3 GB | September 21, 2018 |
| A12 Bionic | APL1W81 | T8020 | | 7 nm (N7) FinFET | TSMC | 6.9 billion | 83.27 mm$^2$ | ARMv8.3-A | 64-bit | Vortex | 2 | 2.49 GHz | Tempest | 4 | 1.59 GHz | 6-core | P-core: L1i: 128 KB L1d: 128 KB E-core: L1i: 32 KB L1d: 32 KB | P-core: 8 MB E-core: 2 MB | — | 8 MB | 2nd generation Apple- designed (Apple G11P) | 4 | 16 | 256 | 1125 MHz | 576.0 GFLOPS | 8 | 5 TOPS | 64-bit | 4 channels 16-bit/channel | LPDDR4X-4266 (2133 MHz) | 34.1 GB/s | 4 GB | September 21, 2018 |
| A12X Bionic | APL1083 | T8027 | | 7 nm (N7) FinFET | TSMC | 10 billion | 135 mm$^2$ | ARMv8.3-A | 64-bit | Vortex | 4 | 2.49 GHz | Tempest | 4 | 1.59 GHz | 8-core | P-core: L1i: 128 KB L1d: 128 KB E-core: L1i: 32 KB L1d: 32 KB | P-core: 8 MB E-core: 2 MB | — | 8 MB | Second generation Apple- designed (Apple G11G) | 7 | 28 | 448 | 1125 MHz | 1.008 TFLOPS | 8 | 5 TOPS | 128-bit | 2 channels 64-bit/channel | LPDDR4X-4266 (2133 MHz) | 68.2 GB/s | 4 GB | November 7, 2018 |
| A12X Bionic | APL1083 | T8027 | | 7 nm (N7) FinFET | TSMC | 10 billion | 135 mm$^2$ | ARMv8.3-A | 64-bit | Vortex | 4 | 2.49 GHz | Tempest | 4 | 1.59 GHz | 8-core | P-core: L1i: 128 KB L1d: 128 KB E-core: L1i: 32 KB L1d: 32 KB | P-core: 8 MB E-core: 2 MB | — | 8 MB | Second generation Apple- designed (Apple G11G) | 7 | 28 | 448 | 1125 MHz | 1.008 TFLOPS | 8 | 5 TOPS | 128-bit | 2 channels 64-bit/channel | LPDDR4X-4266 (2133 MHz) | 68.2 GB/s | 6 GB | November 7, 2018 |
| A12Z Bionic | APL1083 | T8027 | | 7 nm (N7) FinFET | TSMC | 10 billion | 135 mm$^2$ | ARMv8.3-A | 64-bit | Vortex | 4 | 2.49 GHz | Tempest | 4 | 1.59 GHz | 8-core | P-core: L1i: 128 KB L1d: 128 KB E-core: L1i: 32 KB L1d: 32 KB | P-core: 8 MB E-core: 2 MB | — | 8 MB | Second generation Apple- designed (Apple G11G) | 8 | 32 | 512 | 1125 MHz | 1.152 TFLOPS | 8 | 5 TOPS | 128-bit | 2 channels 64-bit/channel | LPDDR4X-4266 (2133 MHz) | 68.2 GB/s | 6 GB | March 25, 2020 |
| A12Z Bionic | APL1083 | T8027 | | 7 nm (N7) FinFET | TSMC | 10 billion | 135 mm$^2$ | ARMv8.3-A | 64-bit | Vortex | 4 | 2.49 GHz | Tempest | 4 | 1.59 GHz | 8-core | P-core: L1i: 128 KB L1d: 128 KB E-core: L1i: 32 KB L1d: 32 KB | P-core: 8 MB E-core: 2 MB | — | 8 MB | Second generation Apple- designed (Apple G11G) | 8 | 32 | 512 | 1125 MHz | 1.152 TFLOPS | 8 | 5 TOPS | 128-bit | 2 channels 64-bit/channel | LPDDR4X-4266 (2133 MHz) | 68.2 GB/s | 16 GB | June 22, 2020 |
| A13 Bionic | APL1W85 | T8030 | | 7 nm (N7P) FinFET | TSMC | 8.5 billion | 98.48 mm$^2$ | ARMv8.4-A | 64-bit | Lightning | 2 | 2.66 GHz | Thunder | 4 | 1.72 GHz | 6-core | P-core: L1i: 128 KB L1d: 128 KB E-core: L1i: 96 KB L1d: 48 KB | P-core: 8 MB E-core: 4 MB | — | 16 MB | 3rd generation Apple- designed | 4 | 16 | 256 | 1350 MHz | 691.2 GFLOPS | 8 | 5.5 TOPS | 64-bit | 4 channels 16-bit/channel | LPDDR4X-4266 (2133 MHz) | 34.1 GB/s | 3 GB | September 20, 2019 |
| A13 Bionic | APL1W85 | T8030 | | 7 nm (N7P) FinFET | TSMC | 8.5 billion | 98.48 mm$^2$ | ARMv8.4-A | 64-bit | Lightning | 2 | 2.66 GHz | Thunder | 4 | 1.72 GHz | 6-core | P-core: L1i: 128 KB L1d: 128 KB E-core: L1i: 96 KB L1d: 48 KB | P-core: 8 MB E-core: 4 MB | — | 16 MB | 3rd generation Apple- designed | 4 | 16 | 256 | 1350 MHz | 691.2 GFLOPS | 8 | 5.5 TOPS | 64-bit | 4 channels 16-bit/channel | LPDDR4X-4266 (2133 MHz) | 34.1 GB/s | 4 GB | September 20, 2019 |
| A14 Bionic | APL1W01 | T8101 | | 5 nm (N5) FinFET | TSMC | 11.8 billion | 88 mm$^2$ | ARMv8.5-A | 64-bit | Firestorm | 2 | 3.00 GHz | Icestorm | 4 | 1.82 GHz | 6-core | P-core: L1i: 192 KB L1d: 128 KB E-core: L1i: 128 KB L1d: 64 KB | P-core: 8 MB E-core: 4 MB | — | 16 MB | 4th generation Apple- designed | 4 | 16 | 256 | 1462.5 MHz | 748.8 GFLOPS | 16 | 11 TOPS | 64-bit | 4 channels 16-bit/channel | LPDDR4X-4266 (2133 MHz) | 34.1 GB/s | 4 GB | October 23, 2020 |
| A14 Bionic | APL1W01 | T8101 | | 5 nm (N5) FinFET | TSMC | 11.8 billion | 88 mm$^2$ | ARMv8.5-A | 64-bit | Firestorm | 2 | 3.00 GHz | Icestorm | 4 | 1.82 GHz | 6-core | P-core: L1i: 192 KB L1d: 128 KB E-core: L1i: 128 KB L1d: 64 KB | P-core: 8 MB E-core: 4 MB | — | 16 MB | 4th generation Apple- designed | 4 | 16 | 256 | 1462.5 MHz | 748.8 GFLOPS | 16 | 11 TOPS | 64-bit | 4 channels 16-bit/channel | LPDDR4X-4266 (2133 MHz) | 34.1 GB/s | 4 GB | October 23, 2020 |
| A15 Bionic | APL1W07 | T8110 | | 5 nm (N5P) FinFET | TSMC | 15 billion | 108.01 mm$^2$ | ARMv8.6-A | 64-bit | Avalanche | 2 | 3.24 GHz | Blizzard | 4 | 2.02 GHz | 6-core | P-core: L1i: 192 KB L1d: 128 KB E-core: L1i: 128 KB L1d: 64 KB | P-core: 12 MB E-core: 4 MB | — | 32 MB | 5th generation Apple- designed | 4 | 16 | 512 | 1338 MHz | 1.370 TFLOPS | 16 | 15.8 TOPS | 64-bit | 4 channels 16-bit/channel | LPDDR4X-4266 (2133 MHz) | 34.1 GB/s | 4 GB | September 24, 2021 |
| A15 Bionic | APL1W07 | T8110 | | 5 nm (N5P) FinFET | TSMC | 15 billion | 108.01 mm$^2$ | ARMv8.6-A | 64-bit | Avalanche | 2 | 2.93 GHz | Blizzard | 4 | 2.02 GHz | 6-core | P-core: L1i: 192 KB L1d: 128 KB E-core: L1i: 128 KB L1d: 64 KB | P-core: 12 MB E-core: 4 MB | — | 32 MB | 5th generation Apple- designed | 5 | 20 | 640 | 1338 MHz | 1.713 TFLOPS | 16 | 15.8 TOPS | 64-bit | 4 channels 16-bit/channel | LPDDR4X-4266 (2133 MHz) | 34.1 GB/s | 4 GB | September 24, 2021 |
| A15 Bionic | APL1W07 | T8110 | | 5 nm (N5P) FinFET | TSMC | 15 billion | 108.01 mm$^2$ | ARMv8.6-A | 64-bit | Avalanche | 2 | 3.24 GHz | Blizzard | 4 | 2.02 GHz | 6-core | P-core: L1i: 192 KB L1d: 128 KB E-core: L1i: 128 KB L1d: 64 KB | P-core: 12 MB E-core: 4 MB | — | 32 MB | 5th generation Apple- designed | 5 | 20 | 640 | 1338 MHz | 1.713 TFLOPS | 16 | 15.8 TOPS | 64-bit | 4 channels 16-bit/channel | LPDDR4X-4266 (2133 MHz) | 34.1 GB/s | 6 GB | September 24, 2021 |
| A16 Bionic | APL1W10 | T8120 | | 4 nm (N4P) FinFET | TSMC | 16 billion | 112.75 mm$^2$ | ARMv8.6-A | 64-bit | Everest | 2 | 3.46 GHz | Sawtooth | 4 | 2.02 GHz | 6-core | P-core: L1i: 192 KB L1d: 128 KB E-core: L1i: 128 KB L1d: 64 KB | P-core: 16 MB E-core: 4 MB | — | 24 MB | 6th generation Apple- designed | 5 | 20 | 640 | 1398 MHz | 1.789 TFLOPS | 16 | 17 TOPS | 64-bit | 4 channels 16-bit/channel | LPDDR5-6400 (3200 MHz) | 51.2 GB/s | 6 GB | September 16, 2022 |
| A17 Pro | APL1V02 | T8130 | | 3 nm (N3B) FinFET | TSMC | 19 billion | 103.80 mm$^2$ | ARMv8.6-A | 64-bit | Everest (2nd generation) | 2 | 3.78 GHz | Sawtooth (2nd generation) | 4 | 2.11 GHz | 6-core | P-core: L1i: 192 KB L1d: 128 KB E-core: L1i: 128 KB L1d: 64 KB | P-core: 16 MB E-core: 4 MB | — | 24 MB | 7th generation Apple- designed | 6 | 24 | 768 | 1398 MHz | 2.147 TFLOPS | 16 | 35 TOPS | 64-bit | 4 channels 16-bit/channel | LPDDR5-6400 (3200 MHz) | 51.2 GB/s | 8 GB | September 22, 2023 |
| A18 | APL1V08 | | | 3 nm (N3E) FinFET | TSMC | | 90 mm$^2$ | ARMv9.2-A | 64-bit | Everest (3rd generation) | 2 | 4.05 GHz | Sawtooth (3rd generation) | 4 | 2.42 GHz | 6-core | | P-core: 8 MB E-core: 4 MB | | 12 MB | 8th generation Apple- designed | 5 | 20 | 640 | 1490 MHz | 1.907 TFLOPS | 16 | 35 TOPS | 64-bit | 4 channels 16-bit/channel | LPDDR5X-7500 (3750 MHz) | 60.0 GB/s | 8 GB | September 9, 2024 |
| A18 Pro | APL1V07 | T8140 | | 3 nm (N3E) FinFET | TSMC | | 105 mm$^2$ | ARMv9.2-A | 64-bit | Everest (3rd generation) | 2 | 4.05 GHz | Sawtooth (3rd generation) | 4 | 2.42 GHz | 6-core | | P-core: 16 MB E-core: 4 MB | | 24 MB | 8th generation Apple- designed | 6 | 24 | 768 | 1490 MHz | 2.289 TFLOPS | 16 | 35 TOPS | 64-bit | 4 channels 16-bit/channel | LPDDR5X-7500 (3750 MHz) | 60.0 GB/s | 8 GB | September 9, 2024 |
| Name | Codename | Part No. | Image | Node | Manufacturer | Transistors count | Die size | CPU ISA | Bit width | Core name | Cores | Core speed | Core name | Cores | Core speed | Overall cores | L1 | L2 | L3 | SLC | Vendor | Cores | SIMD EU count | FP32 ALU count | Frequency | FP32 FLOPS | Cores | OPS | Memory bus width | Total channel Bit per channel | Memory type | Theoretical bandwidth | Available capacity | First release |
| Name | Codename | Part No. | Image | Node | Manufacturer | Transistors count | Die size | CPU ISA | Bit width | Performance core | Performance core | Performance core | Efficiency core | Efficiency core | Efficiency core | Overall cores | Cache | Cache | Cache | Cache | | | | Vendor | Cores | SIMD EU count | FP32 ALU count | Frequency | FP32 FLOPS | Cores | OPS | Memory bus width | Total channel Bit per channel | Memory type | Theoretical bandwidth | Available capacity | First release |
| General | General | General | General | Semiconductor technology | Semiconductor technology | Semiconductor technology | Semiconductor technology | Computer architecture | Computer architecture | CPU | CPU | CPU | CPU | CPU | CPU | CPU | CPU | CPU | CPU | CPU | GPU | GPU | GPU | GPU | GPU | GPU | AI accelerator | AI accelerator | Memory technology | Memory technology | Memory technology | Memory technology | Memory technology | | | | | First release |

## M series SoCs

The Apple M series is a family of systems on a chip (SoC) used in Mac computers from November 2020 or later, iPad Pro tablets from April 2021 or later, iPad Air tablets from March 2022 or later, and Vision Pro. The M designation was previously used for Apple motion coprocessors.
Evolution of Apple M series :
| | | | | | | M1 Pro October 18, 2021 – January 17, 2023 | M1 Pro October 18, 2021 – January 17, 2023 | M1 Pro October 18, 2021 – January 17, 2023 | M1 Pro October 18, 2021 – January 17, 2023 | M1 Pro October 18, 2021 – January 17, 2023 | M1 Pro October 18, 2021 – January 17, 2023 |
| | | | | | | M1 Max October 18, 2021 – June 5, 2023 | M1 Max October 18, 2021 – June 5, 2023 | M1 Max October 18, 2021 – June 5, 2023 | M1 Max October 18, 2021 – June 5, 2023 | M1 Max October 18, 2021 – June 5, 2023 | M1 Max October 18, 2021 – June 5, 2023 |
| | | | | | | | | | | | | M1 Ultra March 8, 2022 – June 5, 2023 | M1 Ultra March 8, 2022 – June 5, 2023 | M1 Ultra March 8, 2022 – June 5, 2023 | M1 Ultra March 8, 2022 – June 5, 2023 | M1 Ultra March 8, 2022 – June 5, 2023 | M1 Ultra March 8, 2022 – June 5, 2023 |
| M2 June 6, 2022 – present | M2 June 6, 2022 – present | M2 June 6, 2022 – present | M2 June 6, 2022 – present | M2 June 6, 2022 – present | M2 June 6, 2022 – present | | |
| | | | | | | M2 Pro January 17, 2023 – October 29, 2024 | M2 Pro January 17, 2023 – October 29, 2024 | M2 Pro January 17, 2023 – October 29, 2024 | M2 Pro January 17, 2023 – October 29, 2024 | M2 Pro January 17, 2023 – October 29, 2024 | M2 Pro January 17, 2023 – October 29, 2024 |
| | | | | | | M2 Max January 17, 2023 – March 4, 2025 | M2 Max January 17, 2023 – March 4, 2025 | M2 Max January 17, 2023 – March 4, 2025 | M2 Max January 17, 2023 – March 4, 2025 | M2 Max January 17, 2023 – March 4, 2025 | M2 Max January 17, 2023 – March 4, 2025 |
| | | | | | | | | | | | | M2 Ultra June 5, 2023 – present | M2 Ultra June 5, 2023 – present | M2 Ultra June 5, 2023 – present | M2 Ultra June 5, 2023 – present | M2 Ultra June 5, 2023 – present | M2 Ultra June 5, 2023 – present |
| M3 October 30, 2023 – present | M3 October 30, 2023 – present | M3 October 30, 2023 – present | M3 October 30, 2023 – present | M3 October 30, 2023 – present | M3 October 30, 2023 – present | | |
| | | | | | | M3 Pro October 30, 2023 – October 30, 2024 | M3 Pro October 30, 2023 – October 30, 2024 | M3 Pro October 30, 2023 – October 30, 2024 | M3 Pro October 30, 2023 – October 30, 2024 | M3 Pro October 30, 2023 – October 30, 2024 | M3 Pro October 30, 2023 – October 30, 2024 |
| | | | | | | M3 Max October 30, 2023 – October 30, 2024 | M3 Max October 30, 2023 – October 30, 2024 | M3 Max October 30, 2023 – October 30, 2024 | M3 Max October 30, 2023 – October 30, 2024 | M3 Max October 30, 2023 – October 30, 2024 | M3 Max October 30, 2023 – October 30, 2024 |
| | | | | | | | | | | | | M3 Ultra March 12, 2025 – present | M3 Ultra March 12, 2025 – present | M3 Ultra March 12, 2025 – present | M3 Ultra March 12, 2025 – present | M3 Ultra March 12, 2025 – present | M3 Ultra March 12, 2025 – present |
| M4 May 7, 2024 – present | M4 May 7, 2024 – present | M4 May 7, 2024 – present | M4 May 7, 2024 – present | M4 May 7, 2024 – present | M4 May 7, 2024 – present | | |
| | | | | | | M4 Pro October 29, 2024 – present | M4 Pro October 29, 2024 – present | M4 Pro October 29, 2024 – present | M4 Pro October 29, 2024 – present | M4 Pro October 29, 2024 – present | M4 Pro October 29, 2024 – present |
| | | | | | | M4 Max October 30, 2024 – present | M4 Max October 30, 2024 – present | M4 Max October 30, 2024 – present | M4 Max October 30, 2024 – present | M4 Max October 30, 2024 – present | M4 Max October 30, 2024 – present |

### Apple M1

The M1, Apple's first system on a chip designed for use in Macs, is manufactured using TSMC's 5 nm process. Announced on November 10, 2020, it was first used in the MacBook Air, Mac mini and 13-inch MacBook Pro, and later used in the iMac, 5th-generation iPad Pro and 5th-generation iPad Air. It comes with 4 performance cores and 4 efficiency cores, for a total of 8 CPU cores. It comes with up to 8 GPU cores, with the entry level MacBook Air having only 7 GPU cores. The M1 has 16 billion transistors.

#### Apple M1 Pro

The M1 Pro is a more powerful version of the M1, with six to eight performance cores, two efficiency cores, 14 to 16 GPU cores, 16 Neural Engine cores, up to 32 GB unified RAM with up to 200 GB/s memory bandwidth, and more than double the transistors. It was announced on October 18, 2021, and is used in the 14- and 16-inch MacBook Pro. Apple claimed the CPU performance is about 70% faster than the M1, and that its GPU performance is about double. Apple claims the M1 Pro can deliver up to 20 streams of 4K or 7 streams of 8K ProRes video playback (up from 6 offered by Afterburner card for 2019 Mac Pro).

#### Apple M1 Max

The M1 Max is a larger version of the M1 Pro chip, with eight performance cores, two efficiency cores, 24 to 32 GPU cores, 16 Neural Engine cores, up to 64 GB unified RAM with up to 400 GB/s memory bandwidth, and more than double the number of transistors. It was announced on October 18, 2021, and is used in the 14- and 16-inch MacBook Pro, as well as the Mac Studio. Apple claims the M1 Max can deliver up to 30 streams of 4K (up from 23 offered by Afterburner card for 2019 Mac Pro) or 7 streams of 8K ProRes video playback.

#### Apple M1 Ultra

The M1 Ultra consists of two M1 Max dies connected together by a silicon interposer through Apple's UltraFusion interconnect. It has 114 billion transistors, 16 performance cores, 4 efficiency cores, 48 to 64 GPU cores and 32 Neural Engine cores; it can be configured with up to 128 GB unified RAM of 800 GB/s memory bandwidth. It was announced on March 8, 2022, as an optional upgrade for the Mac Studio. Apple claims the M1 Ultra can deliver up to 18 streams of 8K ProRes video playback.

### Apple M2

Apple announced the M2 SoC on June 6, 2022, at WWDC, along with a redesigned MacBook Air and a revised 13-inch MacBook Pro and later the sixth-generation iPad Pro and the sixth-generation iPad Air. The M2 is made with TSMC's "enhanced 5-nanometer technology" N5P process and contains 20 billion transistors, a 25% increase from the previous generation M1. The M2 can be configured with up to 24 gigabytes of RAM and 2 terabytes of storage. It has 8 CPU cores (4 performance and 4 efficiency) and up to 10 GPU cores. The M2 also increases the memory bandwidth to 100 GB/s. Apple claims CPU improvements up to 18% and GPU improvements up to 35% compared to the previous M1.

#### Apple M2 Pro

The M2 Pro is a more powerful version of the M2, with six to eight performance cores, four efficiency cores, 16 to 19 GPU cores, 16 Neural Engine cores, up to 32 GB unified RAM with up to 200 GB/s memory bandwidth, and double the transistors. It was announced on January 17, 2023, in a press release and it is used in the 14- and 16-inch 2023 MacBook Pro as well as the Mac Mini. Apple claims the CPU performance is 20 percent faster than the M1 Pro and the GPU is 30 percent faster than the M1 Pro.

#### Apple M2 Max

The M2 Max is a larger version of the M2 Pro, with eight performance cores, four efficiency cores, 30 to 38 GPU cores, 16 Neural Engine cores, up to 96 GB unified RAM with up to 400 GB/s memory bandwidth, and more than double the transistors. It was announced on January 17, 2023, in a press release and it is used in the 14- and 16-inch 2023 MacBook Pro, as well as the Mac Studio. Apple claims the CPU performance is 20 percent faster than M1 Max and the GPU is 30 percent faster than the M1 Max.

#### Apple M2 Ultra

The M2 Ultra consists of two M2 Max dies connected together by a silicon interposer through Apple's UltraFusion interconnect. It has 134 billion transistors, 16 performance cores, 8 efficiency cores, 60 to 76 GPU cores and 32 Neural Engine cores; it can be configured with up to 192 GB unified RAM of 800 GB/s memory bandwidth. It was announced on June 5, 2023, as an optional upgrade for the Mac Studio and the sole processor for the Mac Pro. Apple claims the M2 Ultra can deliver up to 22 streams of 8K ProRes video playback.

### Apple M3

Apple announced the M3 series of chips on October 30, 2023, along with the new MacBook Pro and iMac, and later used in the MacBook Air and the seventh-generation iPad Air. The M3 is based on the 3 nm process and contains 25 billion transistors, a 25% increase from the previous generation M2. It has 8 CPU cores (4 performance and 4 efficiency) and up to 10 GPU cores. Apple claims CPU improvements up to 35% and GPU improvements up to 65% compared to the M1.

#### Apple M3 Pro

The M3 Pro is a more powerful version of the M3, with five or six performance cores, six efficiency cores, 14 to 18 GPU cores, 16 Neural Engine cores, up to 36 GB unified RAM with 150 GB/s memory bandwidth, and 48% more transistors. It is used in the 14- and 16-inch MacBook Pro. Apple claims the CPU performance is 30 percent faster than the M1 Pro and the GPU is 40 percent faster than the M1 Pro.

#### Apple M3 Max

The M3 Max is a larger version of the M3 Pro, with ten or twelve performance cores, four efficiency cores, 30 to 40 GPU cores, 16 Neural Engine cores, up to 128 GB unified RAM with up to 400 GB/s memory bandwidth, and more than double the transistors. It is used in the 14- and 16-inch MacBook Pro. Apple claims the CPU performance is 80 percent faster than the M1 Max and the GPU is 50 percent faster than the M1 Max.

#### Apple M3 Ultra

The M3 Ultra consists of two M3 Max dies connected together by a silicon interposer through Apple's UltraFusion interconnect. It has 184 billion transistors, 20 or 24 performance cores, 8 efficiency cores, 60 to 80 GPU cores and 32 Neural Engine cores; it can be configured with up to 512 GB unified RAM of 800 GB/s memory bandwidth. It was announced on March 5, 2025, as an optional upgrade for the Mac Studio. Apple claims the M3 Ultra can deliver up to 22 streams of 8K ProRes video playback.

### Apple M4

Apple announced the M4 chip on May 7, 2024, along with the seventh-generation iPad Pro; it would later be used for the iMac, Mac Mini, MacBook Pro and MacBook Air. The M4 is based on a "second-generation 3-nanometer" process and contains 28 billion transistors. It has up to 10 CPU cores (3 or 4 performance and 4 or 6 efficiency) and up to 10 GPU cores. Apple claims the M4 has up to 1.5x faster CPU performance compared to the M2.

#### Apple M4 Pro

The M4 Pro is a more powerful version of the M4, with eight or ten performance cores, four efficiency cores, 16 to 20 GPU cores, 16 Neural Engine cores, and up to 64 GB unified RAM with 273 GB/s memory bandwidth. It is used in the 14- and 16-inch MacBook Pro as well as the Mac Mini. Apple claims the CPU performance is 1.9x faster than the M1 Pro and the GPU is 2x faster than the M1 Pro.

#### Apple M4 Max

The M4 Max is a larger version of the M4 Pro, with ten or twelve performance cores, four efficiency cores, 32 to 40 GPU cores, 16 Neural Engine cores, and up to 128 GB unified RAM with up to 546 GB/s memory bandwidth. It is used in the 14- and 16-inch MacBook Pro as well as the Mac Studio. Apple claims the CPU performance is 2.2x faster than the M1 Max and the GPU is 1.9x faster than the M1 Max.

### Comparison of M-series processors

| General | General | General | Semiconductor technology | Semiconductor technology | Semiconductor technology | Semiconductor technology | CPU | CPU | CPU | CPU | CPU | CPU | CPU | CPU | CPU | CPU | CPU | GPU | GPU | GPU | GPU | GPU | GPU | GPU | AI accelerator | AI accelerator | Media Engine | Media Engine | Media Engine | Media Engine | Media Engine | Memory technology | Memory technology | Memory technology | Memory technology | Memory technology | First release |
| Name | Codename and part no. | Image | Process | Transistor count | Die size | Transistor density | CPU ISA | Performance core | Performance core | Performance core | Efficiency core | Efficiency core | Efficiency core | Overall cores | Cache | Cache | Cache | Vendor | Cores | SIMD EU count | FP32 ALU count | Frequency | FP32 FLOPS (TFLOPS) | Hardware-accelerated ray tracing | Cores | OPS | Hardware Acceleration | Media Decode/Encode Engine | Media Decode/Encode Engine | Media Decode/Encode Engine | Media Decode/Encode Engine | Memory bus width | Total channel Bit per channel | Memory type | Theoretical bandwidth | Available capacity | First release |
| Name | Codename and part no. | Image | Process | Transistor count | Die size | Transistor density | CPU ISA | Core name | Cores | Core speed | Core name | Cores | Core speed | Overall cores | L1 | L2 | SLC | Vendor | Cores | SIMD EU count | FP32 ALU count | Frequency | FP32 FLOPS (TFLOPS) | Hardware-accelerated ray tracing | Cores | OPS | Hardware Acceleration | Video decode | Video encode | ProRes decode & encode | AV1 decode | Memory bus width | Total channel Bit per channel | Memory type | Theoretical bandwidth | Available capacity | First release |
| M1 | APL1102 T8103 | | TSMC N5 | 16 billion | 118.91 mm$^2$ | ~134 MTr/mm$^2$ | ARMv8.5-A | Firestorm | 4 | 3.20 GHz | Icestorm | 4 | 2.06 GHz | 8-core | P-core: L1i: 192 KB L1d: 128 KB E-core: L1i: 128 KB L1d: 64 KB | P-core: 12 MB E-core: 4 MB | 8 MB | 4th generation Apple-designed | 7 | 28 | 896 | 1278 MHz | 2.290 | No | 16 | 11 TOPS | H264, HEVC | 1 | 1 | — | — | 128-bit | 2 channels 64-bit/channel | LPDDR4X-4266 (2133 MHz) | 68.25 GB/s | 8 GB 16 GB | November 17, 2020 |
| M1 | APL1102 T8103 | | TSMC N5 | 16 billion | 118.91 mm$^2$ | ~134 MTr/mm$^2$ | ARMv8.5-A | Firestorm | 4 | 3.20 GHz | Icestorm | 4 | 2.06 GHz | 8-core | | P-core: 12 MB E-core: 4 MB | 8 MB | 4th generation Apple-designed | 8 | 32 | 1024 | 1278 MHz | 2.617 | No | 16 | 11 TOPS | H264, HEVC | 1 | 1 | — | — | 128-bit | 2 channels 64-bit/channel | LPDDR4X-4266 (2133 MHz) | 68.25 GB/s | 8 GB 16 GB | November 17, 2020 |
| M1 Pro | APL1103 T6000 | | TSMC N5 | 33.7 billion | ≈ 245 mm$^2$ | ~137 MTr/mm$^2$ | ARMv8.5-A | Firestorm | 6 | 3.23 GHz | Icestorm | 2 | 2.06 GHz | 8-core | | P-core: 24 MB E-core: 4 MB | 24 MB | 4th generation Apple-designed | 14 | 56 | 1792 | 1296 MHz | 4.644 | No | 16 | 11 TOPS | H264, HEVC, ProRes, ProRes RAW | 1 | 1 | 1 | — | 256-bit | 2 channels 128-bit/channel | LPDDR5-6400 (3200 MHz) | 204.8 GB/s | 16 GB 32 GB | October 26, 2021 |
| M1 Pro | APL1103 T6000 | | TSMC N5 | 33.7 billion | ≈ 245 mm$^2$ | ~137 MTr/mm$^2$ | ARMv8.5-A | Firestorm | 8 | 3.23 GHz | Icestorm | 2 | 2.06 GHz | 10-core | | P-core: 24 MB E-core: 4 MB | 24 MB | 4th generation Apple-designed | 14 | 56 | 1792 | 1296 MHz | 4.644 | No | 16 | 11 TOPS | H264, HEVC, ProRes, ProRes RAW | 1 | 1 | 1 | — | 256-bit | 2 channels 128-bit/channel | LPDDR5-6400 (3200 MHz) | 204.8 GB/s | 16 GB 32 GB | October 26, 2021 |
| M1 Pro | APL1103 T6000 | | TSMC N5 | 33.7 billion | ≈ 245 mm$^2$ | ~137 MTr/mm$^2$ | ARMv8.5-A | Firestorm | 8 | 3.23 GHz | Icestorm | 2 | 2.06 GHz | 10-core | | P-core: 24 MB E-core: 4 MB | 24 MB | 4th generation Apple-designed | 16 | 64 | 2048 | 1296 MHz | 5.308 | No | 16 | 11 TOPS | H264, HEVC, ProRes, ProRes RAW | 1 | 1 | 1 | — | 256-bit | 2 channels 128-bit/channel | LPDDR5-6400 (3200 MHz) | 204.8 GB/s | 16 GB 32 GB | October 26, 2021 |
| M1 Max | APL1105 T6001 | | TSMC N5 | 57 billion | ≈ 432 mm$^2$ | ~132 MTr/mm$^2$ | ARMv8.5-A | Firestorm | 8 | 3.23 GHz | Icestorm | 2 | 2.06 GHz | 10-core | | P-core: 24 MB E-core: 4 MB | 48 MB | 4th generation Apple-designed | 24 | 96 | 3072 | 1296 MHz | 7.962 | No | 16 | 11 TOPS | H264, HEVC, ProRes, ProRes RAW | 1 | 2 | 2 | — | 512-bit | 4 channels 128-bit/channel | LPDDR5-6400 (3200 MHz) | 409.6 GB/s | 32 GB 64 GB | October 26, 2021 |
| M1 Max | APL1105 T6001 | | TSMC N5 | 57 billion | ≈ 432 mm$^2$ | ~132 MTr/mm$^2$ | ARMv8.5-A | Firestorm | 8 | 3.23 GHz | Icestorm | 2 | 2.06 GHz | 10-core | | P-core: 24 MB E-core: 4 MB | 48 MB | 4th generation Apple-designed | 32 | 128 | 4096 | 1296 MHz | 10.616 | No | 16 | 11 TOPS | H264, HEVC, ProRes, ProRes RAW | 1 | 2 | 2 | — | 512-bit | 4 channels 128-bit/channel | LPDDR5-6400 (3200 MHz) | 409.6 GB/s | 32 GB 64 GB | October 26, 2021 |
| M1 Ultra | APL1W06 T6002 | | TSMC N5 | 114 billion | ≈ 864 mm$^2$ | ~132 MTr/mm$^2$ | ARMv8.5-A | Firestorm | 16 | 3.23 GHz | Icestorm | 4 | 2.06 GHz | 20-core | | P-core: 48 MB E-core: 8 MB | 96 MB | 4th generation Apple-designed | 48 | 192 | 6144 | 1296 MHz | 15.925 | No | 32 | 22 TOPS | H264, HEVC, ProRes, ProRes RAW | 2 | 4 | 4 | — | 1024-bit | 8 channels 128-bit/channel | LPDDR5-6400 (3200 MHz) | 819.2 GB/s | 64 GB 128 GB | March 18, 2022 |
| M1 Ultra | APL1W06 T6002 | | TSMC N5 | 114 billion | ≈ 864 mm$^2$ | ~132 MTr/mm$^2$ | ARMv8.5-A | Firestorm | 16 | 3.23 GHz | Icestorm | 4 | 2.06 GHz | 20-core | | P-core: 48 MB E-core: 8 MB | 96 MB | 4th generation Apple-designed | 64 | 256 | 8192 | 1296 MHz | 21.233 | No | 32 | 22 TOPS | H264, HEVC, ProRes, ProRes RAW | 2 | 4 | 4 | — | 1024-bit | 8 channels 128-bit/channel | LPDDR5-6400 (3200 MHz) | 819.2 GB/s | 64 GB 128 GB | March 18, 2022 |
| M2 | APL1109 T8112 | | TSMC N5P | 20 billion | 155.25 mm$^2$ | ~129 MTr/mm$^2$ | ARMv8.6-A | Avalanche | 4 | 3.50 GHz | Blizzard | 4 | 2.42 GHz | 8-core | | P-core: 16 MB E-core: 4 MB | 8 MB | 5th generation Apple-designed | 8 | 32 | 1024 | 1398 MHz | 2.863 | No | 16 | 15.8 TOPS | H264, HEVC, ProRes, ProRes RAW | 1 | 1 | 1 | — | 128-bit | 2 channels 64-bit/channel | LPDDR5-6400 (3200 MHz) | 102.4 GB/s | 8 GB 16 GB 24 GB | June 24, 2022 |
| M2 | APL1109 T8112 | | TSMC N5P | 20 billion | 155.25 mm$^2$ | ~129 MTr/mm$^2$ | ARMv8.6-A | Avalanche | 4 | 3.50 GHz | Blizzard | 4 | 2.42 GHz | 8-core | | P-core: 16 MB E-core: 4 MB | 8 MB | 5th generation Apple-designed | 9 | 36 | 1152 | 1398 MHz | 3.578 | No | 16 | 15.8 TOPS | H264, HEVC | 1 | 1 | — | — | 128-bit | 2 channels 64-bit/channel | LPDDR5-6400 (3200 MHz) | 102.4 GB/s | 8 GB 16 GB 24 GB | June 24, 2022 |
| M2 | APL1109 T8112 | | TSMC N5P | 20 billion | 155.25 mm$^2$ | ~129 MTr/mm$^2$ | ARMv8.6-A | Avalanche | 4 | 3.50 GHz | Blizzard | 4 | 2.42 GHz | 8-core | | P-core: 16 MB E-core: 4 MB | 8 MB | 5th generation Apple-designed | 10 | 40 | 1280 | 1398 MHz | 3.578 | No | 16 | 15.8 TOPS | H264, HEVC, ProRes, ProRes RAW | 1 | 1 | 1 | — | 128-bit | 2 channels 64-bit/channel | LPDDR5-6400 (3200 MHz) | 102.4 GB/s | 8 GB 16 GB 24 GB | June 24, 2022 |
| M2 Pro | APL1113 T6020 | | TSMC N5P | 40 billion | ~289 mm$^2$ | ~138 MTr/mm$^2$ | ARMv8.6-A | Avalanche | 6 | 3.50 GHz | Blizzard | 4 | 2.42 GHz | 10-core | | P-core: 32 MB E-core: 4 MB | 24 MB | 5th generation Apple-designed | 16 | 64 | 2048 | 1398 MHz | 5.726 | No | 16 | 15.8 TOPS | H264, HEVC, ProRes, ProRes RAW | 1 | 1 | 1 | — | 256-bit | 4 channels 64-bit/channel | LPDDR5-6400 (3200 MHz) | 204.8 GB/s | 16 GB 32 GB | January 24, 2023 |
| M2 Pro | APL1113 T6020 | | TSMC N5P | 40 billion | ~289 mm$^2$ | ~138 MTr/mm$^2$ | ARMv8.6-A | Avalanche | 8 | 3.50 GHz | Blizzard | 4 | 2.42 GHz | 12-core | | P-core: 32 MB E-core: 4 MB | 24 MB | 5th generation Apple-designed | 19 | 76 | 2432 | 1398 MHz | 6.799 | No | 16 | 15.8 TOPS | H264, HEVC, ProRes, ProRes RAW | 1 | 1 | 1 | — | 256-bit | 4 channels 64-bit/channel | LPDDR5-6400 (3200 MHz) | 204.8 GB/s | 16 GB 32 GB | January 24, 2023 |
| M2 Max | APL1111 T6021 | | TSMC N5P | 67 billion | | | ARMv8.6-A | Avalanche | 8 | 3.69 GHz | Blizzard | 4 | 2.42 GHz | 12-core | | P-core: 32 MB E-core: 4 MB | 48 MB | 5th generation Apple-designed | 30 | 120 | 3840 | 1398 MHz | 10.736 | No | 16 | 15.8 TOPS | H264, HEVC, ProRes, ProRes RAW | 1 | 2 | 2 | — | 512-bit | 4 channels 128-bit/channel | LPDDR5-6400 (3200 MHz) | 409.6 GB/s | 32 GB 64 GB 96 GB | January 24, 2023 |
| M2 Max | APL1111 T6021 | | TSMC N5P | 67 billion | | | ARMv8.6-A | Avalanche | 8 | 3.69 GHz | Blizzard | 4 | 2.42 GHz | 12-core | | P-core: 32 MB E-core: 4 MB | 48 MB | 5th generation Apple-designed | 38 | 152 | 4864 | 1398 MHz | 13.599 | No | 16 | 15.8 TOPS | H264, HEVC, ProRes, ProRes RAW | 1 | 2 | 2 | — | 512-bit | 4 channels 128-bit/channel | LPDDR5-6400 (3200 MHz) | 409.6 GB/s | 32 GB 64 GB 96 GB | January 24, 2023 |
| M2 Ultra | APL1W12 T6022 | | TSMC N5P | 134 billion | | | ARMv8.6-A | Avalanche | 16 | ~3.00 GHz -3.70 GHz | Blizzard | 8 | 2.42 GHz | 24-core | | P-core: 64 MB E-core: 8 MB | 96 MB | 5th generation Apple-designed | 60 | 240 | 7680 | 1398 MHz | 21.473 | No | 32 | 31.6 TOPS | H264, HEVC, ProRes, ProRes RAW | 2 | 4 | 4 | — | 1024-bit | 8 channels 128-bit/channel | LPDDR5-6400 (3200 MHz) | 819.2 GB/s | 64 GB 128 GB 192 GB | June 13, 2023 |
| M2 Ultra | APL1W12 T6022 | | TSMC N5P | 134 billion | | | ARMv8.6-A | Avalanche | 16 | ~3.00 GHz -3.70 GHz | Blizzard | 8 | 2.42 GHz | 24-core | | P-core: 64 MB E-core: 8 MB | 96 MB | 5th generation Apple-designed | 76 | 304 | 9728 | 1398 MHz | 27.199 | No | 32 | 31.6 TOPS | H264, HEVC, ProRes, ProRes RAW | 2 | 4 | 4 | — | 1024-bit | 8 channels 128-bit/channel | LPDDR5-6400 (3200 MHz) | 819.2 GB/s | 64 GB 128 GB 192 GB | June 13, 2023 |
| M3 | APL1201 T8122 | | TSMC N3B | 25 billion | | | ARMv8.6-A | — | 4 | 4.05 GHz | — | 4 | 2.75 GHz | 8-core | | P-core: 16 MB E-core: 4 MB | 8 MB | 7th generation Apple-designed | 8 | 128 | 1024 | 1380 MHz | 2.826 | Yes | 16 | 18 TOPS | H264, HEVC, ProRes, ProRes RAW | 1 | 1 | 1 | 1 | 128-bit | 2 channels 64-bit/channel | LPDDR5-6400 (3200 MHz) | 102.4 GB/s | 8 GB 16 GB 24 GB | November 7, 2023 |
| M3 | APL1201 T8122 | | TSMC N3B | 25 billion | | | ARMv8.6-A | — | 4 | 4.05 GHz | — | 4 | 2.75 GHz | 8-core | | P-core: 16 MB E-core: 4 MB | 8 MB | 7th generation Apple-designed | 10 | 160 | 1280 | 1380 MHz | 3.533 | Yes | 16 | 18 TOPS | H264, HEVC, ProRes, ProRes RAW | 1 | 1 | 1 | 1 | 128-bit | 2 channels 64-bit/channel | LPDDR5-6400 (3200 MHz) | 102.4 GB/s | 8 GB 16 GB 24 GB | November 7, 2023 |
| M3 Pro | APL1203 T6030 | | TSMC N3B | 37 billion | | | ARMv8.6-A | — | 5 | 4.05 GHz | — | 6 | 2.75 GHz | 11-core | | P-core: 16 MB E-core: 4 MB | 12 MB | 7th generation Apple-designed | 14 | 224 | 1792 | 1380 MHz | 4.946 | Yes | 16 | 18 TOPS | H264, HEVC, ProRes, ProRes RAW | 1 | 1 | 1 | 1 | 192-bit | 3 channels 64-bit/channel | LPDDR5-6400 (3200 MHz) | 153.6 GB/s | 18 GB 36 GB | November 7, 2023 |
| M3 Pro | APL1203 T6030 | | TSMC N3B | 37 billion | | | ARMv8.6-A | — | 6 | 4.05 GHz | — | 6 | 2.75 GHz | 12-core | | P-core: 16 MB E-core: 4 MB | 12 MB | 7th generation Apple-designed | 18 | 288 | 2304 | 1380 MHz | 6.359 | Yes | 16 | 18 TOPS | H264, HEVC, ProRes, ProRes RAW | 1 | 1 | 1 | 1 | 192-bit | 3 channels 64-bit/channel | LPDDR5-6400 (3200 MHz) | 153.6 GB/s | 18 GB 36 GB | November 7, 2023 |
| M3 Max | APL1204 T6034 | | TSMC N3B | 92 billion | | | ARMv8.6-A | — | 10 | 4.05 GHz | — | 4 | 2.75 GHz | 14-core | | P-core: 32 MB E-core: 4 MB | 48 MB | 7th generation Apple-designed | 30 | 480 | 3840 | 1380 MHz | 10.598 | Yes | 16 | 18 TOPS | H264, HEVC, ProRes, ProRes RAW | 1 | 2 | 2 | 1 | 384-bit | 3 channels 128-bit/channel | LPDDR5-6400 (3200 MHz) | 307.2 GB/s | 36 GB 96 GB | November 7, 2023 |
| M3 Max | APL1204 T6031 | | TSMC N3B | 92 billion | | | ARMv8.6-A | — | 12 | 4.05 GHz | — | 4 | 2.75 GHz | 16-core | | P-core: 32 MB E-core: 4 MB | 48 MB | 7th generation Apple-designed | 40 | 640 | 5120 | 1380 MHz | 14.131 | Yes | 16 | 18 TOPS | H264, HEVC, ProRes, ProRes RAW | 1 | 2 | 2 | 1 | 512-bit | 4 channels 128-bit/channel | LPDDR5-6400 (3200 MHz) | 409.6 GB/s | 48 GB 64 GB 128 GB | November 7, 2023 |
| M3 Ultra | T6032 | | TSMC N3B | 184 billion | | | ARMv8.6-A | — | 20 | | — | 8 | 2.75 GHz | 28-core | | P-core: 64 MB E-core: 8 MB | 96 MB | 7th generation Apple-designed | 60 | 960 | 7680 | | | Yes | 16 | 36 TOPS | H264, HEVC, ProRes, ProRes RAW | 2 | 4 | 4 | 2 | 1024-bit | 8 channels 128-bit/channel | LPDDR5-6400 (3200 MHz) | 819.2 GB/s | 96 GB 256 GB | March 12, 2025 |
| M3 Ultra | T6032 | | TSMC N3B | 184 billion | | | ARMv8.6-A | — | 24 | | — | 8 | 2.75 GHz | 32-core | | P-core: 64 MB E-core: 8 MB | 96 MB | 7th generation Apple-designed | 80 | 1280 | 10240 | | | Yes | 16 | 36 TOPS | H264, HEVC, ProRes, ProRes RAW | 2 | 4 | 4 | 2 | 1024-bit | 8 channels 128-bit/channel | LPDDR5-6400 (3200 MHz) | 819.2 GB/s | 96 GB 256 GB 512 GB | March 12, 2025 |
| M4 | APL1206 T8132 | | TSMC N3E | 28 billion | | | ARMv9 | — | 4 | 4.40 GHz | — | 4 | 2.85 GHz | 8-core | | P-core: 16 MB E-core: 4 MB | | | 8 | 128 | 1024 | 1470 MHz | | Yes | 16 | 38 TOPS | H264, HEVC, ProRes, ProRes RAW | 1 | 1 | 1 | 1 | 128-bit | 2 channels 64-bit/channel | LPDDR5X-7500 (3750 MHz) | 120 GB/s | 8 GB 16 GB 24 GB 32 GB | May 15, 2024 |
| M4 | APL1206 T8132 | | TSMC N3E | 28 billion | | | ARMv9 | — | 3 | 4.40 GHz | — | 6 | 2.85 GHz | 9-core | | P-core: 16 MB E-core: 4 MB | | | 10 | 160 | 1280 | 1470 MHz | 4.26 | Yes | 16 | 38 TOPS | H264, HEVC, ProRes, ProRes RAW | 1 | 1 | 1 | 1 | 128-bit | 2 channels 64-bit/channel | LPDDR5X-7500 (3750 MHz) | 120 GB/s | 8 GB 16 GB 24 GB 32 GB | May 15, 2024 |
| M4 | APL1206 T8132 | | TSMC N3E | 28 billion | | | ARMv9 | — | 4 | 4.40 GHz | — | 6 | 2.85 GHz | 10-core | | P-core: 16 MB E-core: 4 MB | | | 10 | 160 | 1280 | 1470 MHz | 4.26 | Yes | 16 | 38 TOPS | H264, HEVC, ProRes, ProRes RAW | 1 | 1 | 1 | 1 | 128-bit | 2 channels 64-bit/channel | LPDDR5X-7500 (3750 MHz) | 120 GB/s | 8 GB 16 GB 24 GB 32 GB | May 15, 2024 |
| M4 Pro | T6040 | | TSMC N3E | | | | ARMv9 | — | 8 | 4.51 GHz | — | 4 | | 12-core | | P-core: 2×16 MB E-core: 4 MB | | | 16 | 256 | 2048 | 1578 MHz | 6.82 | Yes | 16 | 38 TOPS | H264, HEVC, ProRes, ProRes RAW | | | | | 256-bit | | LPDDR5X-8533 (4266 MHz) | 273 GB/s | 24 GB 48 GB 64 GB | November 8, 2024 |
| M4 Pro | T6040 | | TSMC N3E | | | | ARMv9 | — | 10 | 4.51 GHz | — | 4 | | 14-core | | P-core: 2×16 MB E-core: 4 MB | | | 20 | 320 | 2560 | 1578 MHz | 8.52 | Yes | 16 | 38 TOPS | H264, HEVC, ProRes, ProRes RAW | | | | | 256-bit | | LPDDR5X-8533 (4266 MHz) | 273 GB/s | 24 GB 48 GB 64 GB | November 8, 2024 |
| M4 Max | T6041 | | TSMC N3E | | | | ARMv9 | — | 10 | | — | 4 | | 14-core | | | | | 32 | 512 | 4096 | | 13.64 | Yes | 16 | 38 TOPS | H264, HEVC, ProRes, ProRes RAW | | | | | 384-bit | | LPDDR5X-8533 (4266 MHz) | 409.6 GB/s | 36 GB | November 8, 2024 |
| M4 Max | T6041 | | TSMC N3E | | | | ARMv9 | — | 12 | | — | 4 | | 16-core | | | | | 40 | 640 | 5120 | | 17.04 | Yes | 16 | 38 TOPS | H264, HEVC, ProRes, ProRes RAW | | | | | 512-bit | | LPDDR5X-8533 (4266 MHz) | 546 GB/s | 48 GB 64 GB 128 GB | November 8, 2024 |
| Name | Codename and part no. | Image | Process | Transistor count | Die size | Transistor density | CPU ISA | Performance core | Performance core | Performance core | Efficiency core | Efficiency core | Efficiency core | Overall cores | Cache | Cache | Cache | Vendor | Cores | SIMD EU count | FP32 ALU count | Frequency | FP32 FLOPS (TFLOPS) | Hardware-accelerated ray tracing | Cores | OPS | Hardware Acceleration | Media Decode/Encode Engine | Media Decode/Encode Engine | Media Decode/Encode Engine | Media Decode/Encode Engine | Memory bus width | Total channel Bit per channel | Memory type | Theoretical bandwidth | Available capacity | First release |
| Name | Codename and part no. | Image | Process | Transistor count | Die size | Transistor density | CPU ISA | Core name | Cores | Core speed | Core name | Cores | Core speed | Overall cores | L1 | L2 | SLC | Vendor | Cores | SIMD EU count | FP32 ALU count | Frequency | FP32 FLOPS (TFLOPS) | Hardware-accelerated ray tracing | Cores | OPS | Hardware Acceleration | Video decode | Video encode | ProRes decode & encode | AV1 decode | Memory bus width | Total channel Bit per channel | Memory type | Theoretical bandwidth | Available capacity | First release |
| General | General | General | Semiconductor technology | Semiconductor technology | Semiconductor technology | Semiconductor technology | CPU | CPU | CPU | CPU | CPU | CPU | CPU | CPU | CPU | CPU | CPU | GPU | GPU | GPU | GPU | GPU | GPU | GPU | AI accelerator | AI accelerator | Media Engine | Media Engine | Media Engine | Media Engine | Media Engine | Memory technology | Memory technology | Memory technology | Memory technology | Memory technology | First release |

## R series SoCs

The R series is a family of low-latency system on a chips (SoCs) for real-time processing of sensor inputs.

### Apple R1

The Apple R1 was announced by Apple on June 5, 2023, at its Worldwide Developers Conference. It is used in the Apple Vision Pro headset. The Apple R1 is dedicated to the real time processing of sensor inputs and delivering extremely low-latency images to the displays.

## S series SiPs

Evolution of Apple S series :
| S1P September 7, 2016 – September 12, 2018 | S1P September 7, 2016 – September 12, 2018 | S1P September 7, 2016 – September 12, 2018 | S1P September 7, 2016 – September 12, 2018 | S1P September 7, 2016 – September 12, 2018 | S1P September 7, 2016 – September 12, 2018 |
| S3 September 12, 2017 – September 7, 2022 | S3 September 12, 2017 – September 7, 2022 | S3 September 12, 2017 – September 7, 2022 | S3 September 12, 2017 – September 7, 2022 | S3 September 12, 2017 – September 7, 2022 | S3 September 12, 2017 – September 7, 2022 |
| S4 September 12, 2018 – September 10, 2019 | S4 September 12, 2018 – September 10, 2019 | S4 September 12, 2018 – September 10, 2019 | S4 September 12, 2018 – September 10, 2019 | S4 September 12, 2018 – September 10, 2019 | S4 September 12, 2018 – September 10, 2019 |
| S5 September 10, 2019 – present | S5 September 10, 2019 – present | S5 September 10, 2019 – present | S5 September 10, 2019 – present | S5 September 10, 2019 – present | S5 September 10, 2019 – present |
| S6 September 15, 2020 – September 14, 2021 | S6 September 15, 2020 – September 14, 2021 | S6 September 15, 2020 – September 14, 2021 | S6 September 15, 2020 – September 14, 2021 | S6 September 15, 2020 – September 14, 2021 | S6 September 15, 2020 – September 14, 2021 |
| S7 September 14, 2021 – September 7, 2022 January 18, 2023 – present | S7 September 14, 2021 – September 7, 2022 January 18, 2023 – present | S7 September 14, 2021 – September 7, 2022 January 18, 2023 – present | S7 September 14, 2021 – September 7, 2022 January 18, 2023 – present | S7 September 14, 2021 – September 7, 2022 January 18, 2023 – present | S7 September 14, 2021 – September 7, 2022 January 18, 2023 – present |
| S8 September 7, 2022 – present | S8 September 7, 2022 – present | S8 September 7, 2022 – present | S8 September 7, 2022 – present | S8 September 7, 2022 – present | S8 September 7, 2022 – present |
| S9 September 12, 2023 – present | S9 September 12, 2023 – present | S9 September 12, 2023 – present | S9 September 12, 2023 – present | S9 September 12, 2023 – present | S9 September 12, 2023 – present |
| S10 September 9, 2024 – present | S10 September 9, 2024 – present | S10 September 9, 2024 – present | S10 September 9, 2024 – present | S10 September 9, 2024 – present | S10 September 9, 2024 – present |
The Apple S series is a family of systems in a package (SiP) used in the Apple Watch and HomePod. It uses a customized application processor that together with memory, storage and support processors for wireless connectivity, sensors, and I/O form a complete computer in a single package. They are designed by Apple and manufactured by contract manufacturers such as Samsung.

### Apple S1

The Apple S1 is an integrated computer. It includes memory, storage and support circuits like wireless modems and I/O controllers in a sealed integrated package. It was announced on September 9, 2014, as part of the "Wish we could say more" event. It was used in the first-generation Apple Watch.

#### Apple S1P

Used in Apple Watch Series 1. It has a dual-core processor identical to the S2, with the exception of the built-in GPS receiver. It contains the same dual-core CPU with the same new GPU capabilities as the S2, making it about 50% faster than the S1.

### Apple S2

Used in the Apple Watch Series 2. It has a dual-core processor and a built-in GPS receiver. The S2's two cores deliver 50% higher performance and the GPU delivers twice as much as the predecessor, and is similar in performance to the Apple S1P.

### Apple S3

Used in the Apple Watch Series 3. It has a dual-core processor that is 70% faster than the Apple S2 and a built-in GPS receiver. There is also an option for a cellular modem and an internal eSIM module. It also includes the W2 chip. The S3 also contains a barometric altimeter, the W2 wireless connectivity processor, and in some models UMTS (3G) and LTE (4G) cellular modems served by a built-in eSIM.

### Apple S4

Used in the Apple Watch Series 4. It introduced 64-bit ARMv8 cores to the Apple Watch through two Tempest cores, which are also found in the A12 as energy-efficient cores. Despite its small size, Tempest uses a 3-wide decode out-of-order superscalar design, which makes it much more powerful than preceding in-order cores.
The S4 contains a Neural Engine that is able to run Core ML. Third-party apps can use it starting from watchOS 6. The SiP also includes new accelerometer and gyroscope functionality that has twice the dynamic range in measurable values of its predecessor, as well as being able to sample data at 8 times the speed. It contains the W3 wireless chip, which supports Bluetooth 5. It also contains a new custom GPU, which can use the Metal API.

### Apple S5

Used in the Apple Watch Series 5, Watch SE, and HomePod mini. It adds a built-in magnetometer to the custom 64-bit dual-core processor and GPU of the S4.

### Apple S6

Used in the Apple Watch Series 6. It has a custom 64-bit dual-core processor that runs up to 20 percent faster than the S5. The dual-cores in the S6 are based on the A13 Bionic's energy-efficient "little" Thunder cores at 1.8 GHz. Like the S4 and S5, it also contains the W3 wireless chip. The S6 adds the new U1 ultrawide band chip, an always-on altimeter, and 5 GHz WiFi.

### Apple S7

Used in the Apple Watch Series 7 and second-generation HomePod. The S7 CPU has the same T8301 identifier and quoted performance as the S6. It is the second time utilizing the energy-efficient "little" Thunder cores of the A13 Bionic.

### Apple S8

Used in the Apple Watch SE (2nd generation), Watch Series 8, and Watch Ultra. The S8 CPU has the same T8301 identifier and quoted performance as the S6 and S7. It is the final CPU to utilize the energy-efficient "little" Thunder cores of the A13 Bionic.

### Apple S9

Used in the Apple Watch Series 9 and Watch Ultra 2. The S9 CPU has a new dual-core CPU with 60 percent more transistors than the S8, a new four-core Neural Engine and the new U2 ultra-wide band chip. The dual-cores in the S9 are based on the A16 Bionic's energy efficient "little" Sawtooth cores.

### Apple S10

Used in the Apple Watch Series 10. The S10 CPU is the second time utilizing the energy-efficient "little" Sawtooth cores of the A16 Bionic.

### Comparison of S-series processors

| Name | Model no. | Semiconductor technology | Die size | CPU ISA | CPU | CPU cache | GPU | Memory technology | Modem | First release |
| S1 | APL 0778 | 28 nm Hκ MG | 32 mm$^2$ | ARMv7k | 520 MHz single-core Cortex-A7 | L1d: 32 KB L2: 256 KB | PowerVR Series 5 | LPDDR3 | | April 24, 2015 |
| S1P | TBC | TBC | TBC | ARMv7k | 520 MHz dual-core Cortex-A7 | L1d: 32 KB | PowerVR Series 6 'Rogue' | LPDDR3 | | September 12, 2016 |
| S2 | TBC | TBC | TBC | ARMv7k | 520 MHz dual-core Cortex-A7 | L1d: 32 KB | PowerVR Series 6 'Rogue' | LPDDR3 | | September 12, 2016 |
| S3 | TBC | TBC | TBC | ARMv7k | Dual-core | TBC | TBC | LPDDR4 | Qualcomm MDM9635M Snapdragon X7 LTE | September 22, 2017 |
| S4 | TBC | 7 nm (TSMC N7) | TBC | ARMv8.3-A ILP32 | 1.59 GHz Dual-core Tempest | L1d: 32 KB L2: 2 MB | Apple G11M | TBC | TBC | September 21, 2018 |
| S5 | TBC | 7 nm (TSMC N7) | TBC | ARMv8.3-A ILP32 | 1.59 GHz Dual-core Tempest | L1d: 32 KB L2: 2 MB | Apple G11M | TBC | TBC | September 20, 2019 |
| S6 | TBC | 7 nm (TSMC N7P) | TBC | TBC | 1.8 GHz Dual-core Thunder | L1d: 48 KB L2: 4 MB | TBC | TBC | TBC | September 18, 2020 |
| S7 | TBC | 7 nm (TSMC N7P) | TBC | TBC | 1.8 GHz Dual-core Thunder | L1d: 48 KB L2: 4 MB | TBC | TBC | TBC | October 15, 2021 |
| S8 | TBC | 7 nm (TSMC N7P) | TBC | TBC | 1.8 GHz Dual-core Thunder | L1d: 48 KB L2: 4 MB | TBC | TBC | TBC | September 16, 2022 |
| S9 | TBC | 4 nm (TSMC N4P) | TBC | TBC | Dual-core Sawtooth | L1d: 64 KB L2: 4 MB | TBC | TBC | TBC | September 22, 2023 |
| S10 | TBC | 4 nm (TSMC N4P) | TBC | TBC | Dual-core Sawtooth | L1d: 64 KB L2: 4 MB | TBC | TBC | TBC | September 20, 2024 |

## Secure Enclaves

The T series operates as a secure enclave on Intel-based MacBook and iMac computers released from 2016 onwards. The chip processes and encrypts biometric information (Touch ID) and acts as a gatekeeper to the microphone and FaceTime HD camera, protecting them from hacking. The chip runs bridgeOS, a purported variant of watchOS. The functions of the T-series processor were built into the M-series CPUs, thus ending the need for the T series.

### Apple T1

The Apple T1 chip is an ARMv7 SoC (derived from the processor in the Apple Watch's S2) that drives the System Management Controller (SMC) and Touch ID sensor of the 2016 and 2017 MacBook Pro with Touch Bar.

### Apple T2

The Apple T2 security chip is a SoC first released in the iMac Pro. It is a 64-bit ARMv8 chip (a variant of the A10 Fusion, or T8010). It provides a secure enclave for encrypted keys, enables users to lock down the computer's boot process, handles system functions like the camera and audio control, and handles on-the-fly encryption and decryption for the solid-state drive. T2 also delivers "enhanced imaging processing" for the iMac Pro's FaceTime HD camera.

### Comparison of T-series processors

| Name | Model no. | Image | Semiconductor technology | Die size | CPU ISA | CPU | CPU cache | GPU | Memory technology | First release |
| Name | Model no. | Image | Semiconductor technology | Die size | CPU ISA | CPU | CPU cache | GPU | Memory bandwidth | First release |
| T1 | APL 1023 | | TBC | TBC | ARMv7 | | | TBD | | November 12, 2016 |
| T2 | APL 1027 | | TSMC 16 nm FinFET. | 104 mm$^2$ | ARMv8-A ARMv7-A | 2× Hurricane 2× Zephyr + Cortex-A7 | L1i: 64 KB L1d: 64 KB L2: 3 MB | 3× cores | LP-DDR4 | December 14, 2017 |

## Cellular Modems

The Apple C series is a family of cellular modem chips.

### Apple C1

Apple C1 is a cellular modem chip introduced in the iPhone 16e. It is built on the N4 process node by TSMC. It supports UMTS/HSPA+ and 5G (sub-6 GHz), but lacks DC-HSDPA and mmWave, which are supported by other iPhone 16 models. Apple claims that the C1 is more power efficient than previous iPhone modems and consumes 20–25% less power than the Qualcomm modems used in other iPhone 16 models.

## Ultra-Wideband

The Apple U series is a family of systems in a package (SiP) implementing ultra-wideband (UWB) radio.

### Apple U1

The Apple U1 is used in the iPhone 11 series through the iPhone 14 series (excluding the second and third generation iPhone SE); Apple Watch Series 6 through the Apple Watch Series 8 and Apple Watch Ultra (1st generation); HomePod (2nd generation) and HomePod Mini; AirTag trackers; and the charging case for AirPods Pro (2nd generation).

### Apple U2

The Apple U2 (referred to by Apple as its "Second-generation Ultra Wideband chip") is used in the iPhone 15 series, iPhone 16 series (excluding iPhone 16e), Apple Watch Series 9, Apple Watch Ultra 2 and Apple Watch Series 10.

### Comparison of U-series processors

| Name | Model no. | Image | CPU | Semiconductor technology | First release |
| U1 | TMK A75 | | Cortex-M4 ARMv7E-M | 16 nm FinFET (TSMC 16FF) | September 20, 2019 |
| U2 | | | | | September 22, 2023 |

## Connectivity (Bluetooth/Wi-Fi)

The Apple W series, starting with the W2, are a family of RF SoCs used for Bluetooth and Wi-Fi connectivity.

### Apple W2

The Apple W2, used in the Apple Watch Series 3, is integrated into the Apple S3 SiP. Apple claimed the chip makes Wi-Fi 85% faster and allows Bluetooth and Wi-Fi to use half the power of the W1 implementation.

### Apple W3

The Apple W3 is used in the Apple Watch Series 4, Series 5, Series 6, SE (1st generation), Series 7, Series 8, SE (2nd generation), Ultra, Series 9, Ultra 2, and Series 10. It is integrated into the Apple S4, S5, S6, S7, S8, S9, and S10 SiPs. It supports Bluetooth 5.0/5.3.

### Comparison of W-series processors

| Name | Model no. | Image | Semiconductor technology | Die size | Bluetooth certification | First release |
| Name | Model no. | Image | Semiconductor technology | Die size | Bluetooth certification | First release | W2 | 338S00348 | TBC | TBC | 4.2 | September 22, 2017 |
| W3 | 338S00464 | | 5.0/5.3 | September 21, 2018 | | | | | TBC | TBC |

## Bluetooth Audio

The Apple W1 and the H series are a family of SoCs with Bluetooth wireless connectivity and low-power audio processing for use in headphones and speakers.

### Apple W1

The Apple W1 is a SoC used in the 2016 AirPods and select Beats headphones. It maintains a Bluetooth Class 1 connection with a computer device and decodes the audio stream that is sent to it. Its die size is 14.3 mm$^2$.

### Apple H1

The Apple H1 chip was used in the second and third generation AirPods and the first generation AirPods Pro. It was also used in the Powerbeats Pro, the Beats Solo Pro, Beats Fit Pro, the 2020 Powerbeats, and AirPods Max. Specifically designed for headphones, it has Bluetooth 5.0, supports hands-free "Hey Siri" commands, and offers 30 percent lower latency than the W1 chip used in earlier AirPods.

### Apple H2

The Apple H2 chip was used in the fourth generation AirPods and second generation AirPods Pro. It has Bluetooth 5.3, and implements 48 kHz noise reduction in hardware. The 2022 version of the H2 operates only on the 2.4 GHz frequency, while the 2023 version adds support for audio transmission using a proprietary protocol in two specific frequency ranges of the 5 GHz band.

### Comparison of Bluetooth audio processors

| Name | Model no. | Bluetooth certification | First release |
| W1 | 343S00130 343S00131 | 4.2 | December 13, 2016 |
| H1 | 343S00289 (AirPods 2nd Generation) 343S00290 (AirPods 3rd Generation) 343S00404 (AirPods Max) H1 SiP (AirPods Pro) | 5.0 | March 20, 2019 |
| H2 | AirPods (4th generation) AirPods Pro (2nd generation) Apple Vision Pro | 5.3 | September 7, 2022 |

## Motion Coprocessors

The Apple M-series coprocessors are motion coprocessors used by Apple Inc. in their mobile devices. First released in 2013, their function is to collect sensor data from integrated accelerometers, gyroscopes and compasses and offload the collecting and processing of sensor data from the main central processing unit (CPU).
Only the M7 and M8 coprocessors were housed on separate chips; the M9, M10, and M11 coprocessors were embedded in their corresponding A-series chips. Beginning with the A12 Bionic chip in 2018, the motion coprocessors were fully integrated into the SoC. Apple eventually reused the M-series codename for their desktop SoCs.

### Comparison of M-series coprocessors

| Name | Model no. | Image | Semiconductor technology | CPU ISA | CPU | First release |
| Apple M7 | LPC18A1 | | 90 nm | ARMv7-M | 150 MHz Cortex-M3 | September 10, 2013 |
| Apple M8 | LPC18B1 | | 90 nm | ARMv7-M | 150 MHz Cortex-M3 | September 9, 2014 |

## Miscellaneous devices

This segment is about Apple-designed processors that are not easily sorted into another section.

### Early series

Apple first used Samsung-developed SoCs in early versions of the iPhone and iPod Touch. They combine in one package a single ARM-based processing core (CPU), a graphics processing unit (GPU), and other electronics necessary for mobile computing.
The APL0098 (also 8900B or S5L8900) is a package on package (PoP) system on a chip (SoC) that was introduced on June 29, 2007, at the launch of the original iPhone. It includes a 412 MHz single-core ARM11 CPU and a PowerVR MBX Lite GPU. It was manufactured by Samsung on a 90 nm process. The iPhone 3G and the first-generation iPod Touch also use it.
The APL0278 (also S5L8720) is a PoP SoC introduced on September 9, 2008, at the launch of the second-generation iPod Touch. It includes a 533 MHz single-core ARM11 CPU and a PowerVR MBX Lite GPU. It was manufactured by Samsung on a 65 nm process.
The APL0298 (also S5L8920) is a PoP SoC introduced on June 8, 2009, at the launch of the iPhone 3GS. It includes a 600 MHz single-core Cortex-A8 CPU and a PowerVR SGX535 GPU. It was manufactured by Samsung on a 65 nm process.
The APL2298 (also S5L8922) is a 45 nm die shrunk version of the iPhone 3GS SoC and was introduced on September 9, 2009, at the launch of the third-generation iPod Touch.

### Other

The Samsung S5L8747 is an ARM-based microcontroller used in Apple's Lightning Digital AV Adapter, a Lightning-to-HDMI adapter. This is a miniature computer with 256 MB RAM, running an XNU kernel loaded from the connected iPhone, iPod Touch, or iPad, then taking a serial signal from the iOS device translating that into a proper HDMI signal.
| Model no. | Image | First release | CPU ISA | Specs | Application | Utilizing devices | Operating system |
| 339S0196 | | September 2012 | Unknown ARM | 256 MB RAM | Lightning to HDMI conversion | Apple Digital AV Adapter | XNU |