# Massbus

The Massbus is a high-performance computer input/output bus designed in the 1970s by Digital Equipment Corporation (DEC). The architecture development was sponsored by Gordon Bell and John Levy was the principal architect.
The bus was used by Digital to interconnect its highest-performance computers with magnetic disk and magnetic tape storage equipment. The use of a common bus was intended to allow a single controller design to handle multiple peripheral models,$^{:7.0}$ and allowed the PDP-10, PDP-11, and VAX computer families to share a common set of peripherals. At the time there were multiple operating systems for each of the 16-bit, 32-bit, and 36-bit computer lines. The 18-bit PDP-15/40 connected to Massbus peripherals via a PDP-11 front end. An engineering goal was to reduce the need for a new driver per peripheral per operating system per computer family. Also, a major technical goal was to place any magnetic technology changes (data separators) into the storage device rather than in the CPU-attached controller. Thus the CPU I/O or memory bus to Massbus adapter needed no changes for multiple generations of storage technology.
A business objective was to provide a subsystem entry price well below that of IBM storage subsystems which used large and expensive controllers unique to each storage technology and processor architecture and were optimized for connecting large numbers of storage devices.
The first Massbus device was the RP04, based on Sperry Univac Information Storage Systems's (ISS) clone of the IBM 3330. Subsequently, DEC offered the RP05 and RP06, based on Memorex's 3330 clone. Memorex modified the IBM compatible interface to DEC requirements and moved the data separator electronics into the drive. DEC designed the rest which was mounted in the "bustle" attached to the drive. This set the pattern for future improvements of disk technology to double density 3330, CDC SMD drives, and then "Winchester" technology. Drives were supplied by ISS/Univac, Memorex, and Control Data. Multiple generations of tape technology and performance were also Massbus connected although the architecture was a Master Massbus drive and slave tape drives. DEC also developed the Massbus RS03/04, a head per track disk drive for high performance swapping. The last Massbus disk drive was the DEC designed RM80 as DEC shifted to internal development of large disks.

## Logical implementation

The bus is logically implemented as two separate sections:
* An asynchronous control bus used to access memory-mapped I/O registers in the individual storage devices,$^{:8.0}$ and
* A high-speed, synchronous data bus that is used to carry the actual data transfers between the storage devices and the host bus adapter.$^{:8.0}$ The data bus is 18 bits wide plus parity.$^{:34.0}$

## Massbus peripherals
### Disk

* RP04 88 MB Sperry Univac Information Storage Systems pack-loaded (removable) disk drive
* RP05/RP06 100/200 MB Memorex 677-51/677-01 pack-loaded (removable) disk drive
       The RP04 and RP06 disks were comparable to the 100 MB IBM 3330 Mod I and IBM's 200 MB Model 11 thereof. The 100 MB RP05 was designated as "high performance" compared to the RP04.
* RP20 - 1.2Gb (non-removable)
* RMxx disk drives:
** RM02/03/05/80
* RS03/RS04 head per track disks

### Tape

* TU45 9 track, capable of 800 BPI and 1600 BPI; 120,000 bytes/second
* TU78/TA78 6250 GCR The 1600/6250 BPI TU78 uses DEC's Massbus, whereas the TA78 uses the HSC50 controller.

## Massbus CPU interfaces

* RH11—To the PDP-11's Unibus
* RH750—To the VAX-11/75x bus