# List of 7400-series integrated circuits

The following is a list of 7400-series digital logic integrated circuits. In the mid-1960s, the original 7400-series integrated circuits were introduced by Texas Instruments with the prefix "SN" to create the name SN74xx. Due to the popularity of these parts, other manufacturers released pin-to-pin compatible logic devices and kept the 7400 sequence number as an aid to identification of compatible parts. However, other manufacturers use different prefixes and suffixes on their part numbers.

## Overview

Some TTL logic parts were made with an extended military-specification temperature range. These parts are prefixed with 54 instead of 74 in the part number.
A short-lived 64 prefix on Texas Instruments parts indicated an industrial temperature range; this prefix had been dropped from the TI literature by 1973. Most recent 7400-series parts are fabricated in CMOS or BiCMOS technology rather than TTL. Surface-mount parts with a single gate (often in a 5-pin or 6-pin package) are prefixed with 741G instead of 74.
Some manufacturers released some 4000-series equivalent CMOS circuits with a 74 prefix, for example, the 74HC4066 was a replacement for the 4066 with slightly different electrical characteristics (different power-supply voltage ratings, higher frequency capabilities, lower "on" resistances in analog switches, etc.). See List of 4000-series integrated circuits. Conversely, the 4000-series has "borrowed" from the 7400 series – such as the CD40193 and CD40161 being pin-for-pin functional replacements for 74C193 and 74C161.
Older TTL parts made by manufacturers such as Signetics, Motorola, Mullard and Siemens may have different numeric prefix and numbering series entirely, such as in the European FJ family FJH101 is an 8-input NAND gate like a 7430.
A few alphabetic characters to designate a specific logic subfamily may immediately follow the 74 or 54 in the part number, e.g., 74LS74 for low-power Schottky. Some CMOS parts such as 74HCT74 for high-speed CMOS with TTL-compatible input thresholds are functionally similar to the TTL part. Not all functions are available in all families. The generic descriptive feature of these alphabetic characters was diluted by various companies participating in the market at its peak and are not always consistent especially with more recent offerings. The National Semiconductor trademarks of the words FAST and FACT are usually cited in the descriptions from other companies when describing their own unique designations.
In a few instances, such as the 7478 and 74107, the same suffix in different families do not have completely equivalent logic functions.
Another extension to the series is the 7416xxx variant, representing mostly the 16-bit-wide counterpart of otherwise 8-bit-wide "base" chips with the same three ending digits. Thus e.g. a "7416373" would be the 16-bit-wide equivalent of a "74373". Some 7416xxx parts, however, do not have a direct counterpart from the standard 74xxx range but deliver new functionality instead, which needs making use of the 7416xxx series' higher pin count. For more details, refer primarily to the Texas Instruments documentation mentioned in the References section.
For CMOS (AC, HC, etc.) subfamilies, read "open drain" for "open collector" in the table below.
There are a few numeric suffixes that have multiple conflicting assignments, such as the 74453.

## Logic gates

Since there are numerous 7400-series parts, the following groups related parts to make it easier to pick a useful part number. This section only includes combinational logic gates.
For part numbers in this section, "x" is the 7400-series logic family, such as LS, ALS, HCT, AHCT, HC, AHC, LVC, ...

### Normal inputs / push–pull outputs

    ConfigurationBufferInverter Hex 1-input74x3474x04
    ConfigurationANDNANDORNORXORXNOR Quad 2-input74x0874x0074x3274x0274x8674x7266 Triple 3-Input74x1174x1074x407574x27n/an/a Dual 4-input74x2174x2074x407274x29n/an/a Single 8-inputn/a74x3074x407874x4078n/an/a

### Schmitt-trigger inputs / push–pull outputs

    ConfigurationBufferInverter Hex 1-input74x701474x14
    ConfigurationANDNANDORNOR Quad 2-input74x700174x13274x703274x7002 Dual 4-inputn/a74x13n/an/a

### Normal inputs / open-collector outputs

    ConfigurationBufferInverter Hex 1-input74x0774x05
    ConfigurationANDNANDORNORXORXNOR Quad 2-input74x0974x03n/a74x3374x13674x266 Triple 3-input74x1574x12n/an/an/an/a Dual 4-inputn/a74x22n/an/an/an/a

### Schmitt-trigger inputs / three-state outputs

    ConfigurationBuffer Inverter Octal 1-input74x241 74x244 74x240

### AND-OR-invert (AOI) logic gates

    NOTE: in past decades, a number of AND-OR-invert (AOI) parts were available in 7400 TTL families, but currently most are obsolete.
* SN5450 = dual 2-2 AOI gate, one is expandable (SN54 is military version of SN74)
* SN74LS51 = 2-2 AOI gate and 3-3 AOI gate
* SN54LS54 = single 2-3-3-2 AOI gate

## Larger footprints

Parts in this section have a pin count of 14 pins or more. The lower part numbers were established in the 1960s and 1970s, then higher part numbers were added incrementally over decades. IC manufacturers continue to make a core subset of this group, but many of these part numbers are considered obsolete and no longer manufactured. Older discontinued parts may be available from a limited number of sellers as new old stock (NOS), though some are much harder to find.
For the following table:
* Part number column – the "x" is a place holder for the logic subfamily name. For example, 74x00 in "LS" logic family would be "74LS00".
* Description column – simplified to make it easier to sort, thus isn't identical to datasheet title. The terms Schmitt trigger, open-collector/open-drain, three-state were moved to the input and output columns to make it easier to sort by those features.
* Input column – a blank cell means a normal input for the logic family type.
* Output column – a blank cell means a "totem pole" output, also known as a push–pull output, with the ability to drive ten standard inputs of the same logic subfamily (fan-out N$_O$ = 10). Outputs with higher output currents are often called drivers or buffers.
* Pins column – number of pins for the dual in-line package (DIP) version; a number in parentheses (round brackets) indicates that there is no known dual in-line package version of this IC.
| 74x00 – 74x99 Part number | Units | Description | Input | Output | Pins | Datasheet |
| 74x00 | 4 | quad 2-input NAND gate | | | 14 | SN74LS00 |
| 74x01 | 4 | quad 2-input NAND gate; different pinout for 74H01 | | open-collector | 14 | SN74LS01 |
| 74x02 | 4 | quad 2-input NOR gate | | | 14 | SN74LS02 |
| 74x03 | 4 | quad 2-input NAND gate | | open-collector | 14 | SN74LS03 |
| 74x04 | 6 | hex inverter gate | | | 14 | SN74LS04 |
| 74x05 | 6 | hex inverter gate | | open-collector | 14 | SN74LS05 |
| 74x06 | 6 | hex inverter gate | | open-collector 30 V / 40 mA | 14 | SN74LS06 |
| 74x07 | 6 | hex buffer gate | | open-collector 30 V / 40 mA | 14 | SN74LS07 |
| 74x08 | 4 | quad 2-input AND gate | | | 14 | SN74LS08 |
| 74x09 | 4 | quad 2-input AND gate | | open-collector | 14 | SN74LS09 |
| 74x10 | 3 | triple 3-input NAND gate | | | 14 | SN74LS10 |
| 74x11 | 3 | triple 3-input AND gate | | | 14 | SN74LS11 |
| 74x12 | 3 | triple 3-input NAND gate | | open-collector | 14 | SN74LS12 |
| 74x13 | 2 | dual 4-input NAND gate | Schmitt trigger | | 14 | SN74LS13 |
| 74x14 | 6 | hex inverter gate | Schmitt trigger | | 14 | SN74LS14 |
| 74x15 | 3 | triple 3-input AND gate | | open-collector | 14 | SN74LS15 |
| 74x16 | 6 | hex inverter gate | | open-collector 15 V / 40 mA | 14 | SN7416 |
| 74x17 | 6 | hex buffer gate | | open-collector 15 V / 40 mA | 14 | SN7417 |
| 74x18 | 2 | dual 4-input NAND gate | Schmitt trigger | | 14 | SN74LS18 |
| 74x19 | 6 | hex inverter gate | Schmitt trigger | | 14 | SN74LS19 |
| 74x20 | 2 | dual 4-input NAND gate | | | 14 | SN74LS20 |
| 74x21 | 2 | dual 4-input AND gate | | | 14 | SN74LS21 |
| 74x22 | 2 | dual 4-input NAND gate | | open-collector | 14 | SN74LS22 |
| 74x23 | 2 | dual 4-input NOR gate with strobe, one gate expandable with 74x60 | | | 16 | SN7423 |
| 74x24 | 4 | quad 2-input NAND gate | Schmitt trigger | | 14 | SN74LS24 |
| 74x25 | 2 | dual 4-input NOR gate with strobe | | | 14 | SN7425 |
| 74x26 | 4 | quad 2-input NAND gate | | open-collector 15 V | 14 | SN74LS26 |
| 74x27 | 3 | triple 3-input NOR gate | | | 14 | SN74LS27 |
| 74x28 | 4 | quad 2-input NOR gate | | driver N$_O$=30 | 14 | SN74LS28 |
| 74x29 | 2 | dual 4-input NOR gate | | | 14 | US7429A |
| 74x30 | 1 | single 8-input NAND gate | | | 14 | SN74LS30 |
| 74x31 | 6 | hex delay elements (two 6ns, two 23-32ns, two 45-48ns) | | | 16 | SN74LS31 |
| 74x32 | 4 | quad 2-input OR gate | | | 14 | SN74LS32 |
| 74x33 | 4 | quad 2-input NOR gate | | open-collector driver N$_O$=30 | 14 | SN74LS33 |
| 74x34 | 6 | hex buffer gate | | | 14 | MM74HC34 |
| 74x35 | 6 | hex buffer gate | | open-collector | 14 | SN74ALS35 |
| 74x36 | 4 | quad 2-input NOR gate (different pinout than 7402) | | | 14 | SN74HC36 |
| 74x37 | 4 | quad 2-input NAND gate | | driver N$_O$=30 | 14 | SN74LS37 |
| 74x38 | 4 | quad 2-input NAND gate | | open-collector driver N$_O$=30 | 14 | SN74LS38 |
| 74x39 | 4 | quad 2-input NAND gate (different pinout than 7438) | | open-collector 60 mA | 14 | SN7439 |
| 74x40 | 2 | dual 4-input NAND gate | | driver N$_O$=30 | 14 | SN74LS40 |
| 74x41 | 1 | BCD to decimal decoder / Nixie tube driver | | open-collector 70 V | 16 | DM7441A |
| 74x42 | 1 | BCD to decimal decoder | | | 16 | SN74LS42 |
| 74x43 | 1 | excess-3 to decimal decoder | | | 16 | SN7443A |
| 74x44 | 1 | Gray code to decimal decoder | | | 16 | SN7444A |
| 74x45 | 1 | BCD to decimal decoder/driver | | open-collector 30 V / 80 mA | 16 | SN7445 |
| 74x46 | 1 | BCD to 7-segment display decoder/driver | | open-collector 30 V | 16 | SN7446A |
| 74x47 | 1 | BCD to 7-segment decoder/driver | | open-collector 15 V | 16 | SN74LS47 |
| 74x48 | 1 | BCD to 7-segment decoder/driver | | open-collector, 2 kΩ pull-up | 16 | SN74LS48 |
| 74x49 | 1 | BCD to 7-segment decoder/driver | | open-collector | 14 | SN74LS49 |
| 74x50 | 2 | dual 2-2-input AND-OR-Invert gate, one gate expandable | | | 14 | SN7450 |
| 7451, 74H51, 74S51 | 2 | dual 2-2-input AND-OR-Invert (AOI) gate | | | 14 | SN7451 |
| 74L51, 74LS51 | 2 | 3-3-input AND-OR-Invert gate and 2-2-input AND-OR-Invert gate | | | 14 | SN74LS51 |
| 74x52 | 1 | 3-2-2-2-input AND-OR gate, expandable with 74x61 | | | 14 | SN74H52 |
| 7453 | 1 | 2-2-2-2-input AND-OR-Invert gate, expandable | | | 14 | SN7453 |
| 74H53 | 1 | 3-2-2-2-input AND-OR-Invert gate, expandable | | | 14 | SN74H53 |
| 7454 | 1 | 2-2-2-2-input AND-OR-Invert gate | | | 14 | SN7454 |
| 74H54 | 1 | 3-2-2-2-input AND-OR-Invert gate | | | 14 | SN74H54 |
| 74L54, 74LS54 | 1 | 3-3-2-2-input AND-OR-Invert gate | | | 14 | SN74LS54 |
| 74x55 | 1 | 4-4-input AND-OR-Invert gate, 74H55 is expandable | | | 14 | SN74LS55 |
| 74x56 | 1 | 50:1 frequency divider | | | 8 | SN74LS56 |
| 74x57 | 1 | 60:1 frequency divider | | | 8 | SN74LS57 |
| 74x58 | 2 | 3-3-input AND-OR gate and 2-2-input AND-OR gate | | | 14 | 74HC58 |
| 74x59 | 2 | dual 3-2-input AND-OR-Invert gate | | | 14 | US7459A |
| 74x60 | 2 | dual 4-input expander for 74x23, 74x50, 74x53, 74x55 | | | 14 | SN7460 |
| 74x61 | 3 | triple 3-input expander for 74x52 | | | 14 | SN74H61 |
| 74x62 | 1 | 3-3-2-2-input AND-OR expander for 74x50, 74x53, 74x55 | | | 14 | SN74H62 |
| 74x63 | 6 | hex current sensing interface gates | | | 14 | SN74LS63 |
| 74x64 | 1 | 4-3-2-2-input AND-OR-Invert gate | | | 14 | SN74S64 |
| 74x65 | 1 | 4-3-2-2 input AND-OR-Invert gate | | open-collector | 14 | SN74S65 |
| 74x67 | 1 | AND gated J-K master-slave flip-flop, asynchronous preset and clear (improved 74L72) | | | (16) | BL54L67Y |
| 74L68 | 2 | dual J-K flip-flop, asynchronous clear (improved 74L73) | | | (18) | BL54L68Y |
| 74LS68 | 2 | dual 4-bit decade counters | | | 16 | SN74LS68 |
| 74L69 | 2 | dual J-K flip-flop, asynchronous preset, common clock and clear | | | (18) | BL54L69Y |
| 74LS69 | 2 | dual 4-bit binary counters | | | 16 | SN74LS69 |
| 74x70 | 1 | AND-gated positive edge triggered J-K flip-flop, asynchronous preset and clear | | | 14 | SN7470 |
| 74H71 | 1 | AND-OR-gated J-K master-slave flip-flop, preset | | | 14 | SN74H71 |
| 74L71 | 1 | AND-gated R-S master-slave flip-flop, preset and clear | | | 14 | SN54L71 |
| 74x72 | 1 | AND gated J-K master-slave flip-flop, asynchronous preset and clear | | | 14 | SN7472 |
| 74x73 | 2 | dual J-K flip-flop, asynchronous clear | | | 14 | SN54LS73A |
| 74x74 | 2 | dual D positive edge triggered flip-flop, asynchronous preset and clear | | | 14 | SN74LS74A |
| 74x75 | 1 | 4-bit bistable latch, complementary outputs | | | 16 | SN74LS75 |
| 74x76 | 2 | dual J-K flip-flop, asynchronous preset and clear | | | 16 | SN74LS76A |
| 74x77 | 1 | 4-bit bistable latch | | | 14 | SN54LS77 |
| 74H78 | 2 | dual positive pulse triggered J-K flip-flop, preset, common clock and common clear | | | 14 | SN74H78 |
| 74L78 | 2 | dual positive pulse triggered J-K flip-flop, preset, common clock and common clear | | | 14 | SN54L78 |
| 74LS78 | 2 | dual negative edge triggered J-K flip-flop, preset, common clock and common clear | | | 14 | SN74LS78A |
| 74x79 | 2 | dual D positive edge triggered flip-flop, asynchronous preset and clear | | | 14 | MC7479 |
| 74x80 | 1 | gated full adder | | | 14 | SN7480 |
| 74x81 | 1 | 16-bit RAM | | | 14 | SN7481A |
| 74x82 | 1 | 2-bit binary full adder | | | 14 | SN7482 |
| 74x83 | 1 | 4-bit binary full adder | | | 16 | SN74LS83A |
| 74x84 | 1 | 16-bit RAM | | | 16 | SN7484A |
| 74x85 | 1 | 4-bit magnitude comparator | | | 16 | SN74LS85 |
| 74x86 | 4 | quad 2-input XOR gate | | | 14 | SN74LS86A |
| 74x87 | 1 | 4-bit true/complement/zero/one element | | | 14 | SN74H87 |
| 74x88 | 1 | 256-bit ROM (32x8) | | open-collector | 16 | SN7488A |
| 74x89 | 1 | 64-bit RAM (16x4), 4 data inputs, 4 inverted data outputs | | open-collector | 16 | SN7489 |
| 74x90 | 1 | decade counter (separate divide-by-2 and divide-by-5 sections) | | | 14 | SN74LS90 |
| 74x91 | 1 | 8-bit shift register, serial in, serial out, gated input | | | 14 | SN74LS91 |
| 74x92 | 1 | divide-by-12 counter (separate divide-by-2 and divide-by-6 sections) | | | 14 | SN74LS92 |
| 74x93 | 1 | 4-bit binary counter (separate divide-by-2 and divide-by-8 sections); different pinout for 74L93 | | | 14 | SN74LS93 |
| 74x94 | 1 | 4-bit shift register, dual asynchronous presets | | | 16 | SN7494 |
| 74x95 | 1 | 4-bit shift register, parallel in, parallel out, serial input; different pinout for 74L95 | | | 14 | SN74LS95B |
| 74x96 | 1 | 5-bit parallel-in/parallel-out shift register, asynchronous preset | | | 16 | SN74LS96 |
| 74x97 | 1 | synchronous 6-bit binary rate multiplier | | | 16 | SN7497 |
| 74x98 | 1 | 4-bit data selector/storage register | | | 16 | SN54L98 |
| 74x99 | 1 | 4-bit bidirectional universal shift register | | | 16 | SN54L99 |
| 74x100 – 74x199 Part number | Units | Description | Input | Output | Pins | Datasheet |
| 74x100 | 2 | dual 4-bit bistable latch | | | 24 | SN74100 |
| 74x101 | 1 | AND-OR-gated J-K negative-edge-triggered flip-flop, preset | | | 14 | SN74H101 |
| 74x102 | 1 | AND-gated J-K negative-edge-triggered flip-flop, preset and clear | | | 14 | SN74H102 |
| 74x103 | 2 | dual J-K negative-edge-triggered flip-flop, clear | | | 14 | SN74H103 |
| 74x104 | 1 | J-K master-slave flip-flop | | | 14 | SN74104 |
| 74x105 | 1 | J-K master-slave flip-flop, J2 and K2 inverted | | | 14 | SN74105 |
| 74x106 | 2 | dual J-K negative-edge-triggered flip-flop, preset and clear | | | 16 | SN74H106 |
| 74x107 | 2 | dual J-K flip-flop, clear | | | 14 | SN74LS107A |
| 74x108 | 2 | dual J-K negative-edge-triggered flip-flop, preset, common clear and common clock | | | 14 | SN74H108 |
| 74x109 | 2 | dual J-NotK positive-edge-triggered flip-flop, clear and preset | | | 16 | SN74LS109A |
| 74x110 | 1 | AND-gated J-K master-slave flip-flop, data lockout | | | 14 | SN74110 |
| 74x111 | 2 | dual J-K master-slave flip-flop, data lockout, reset, set | | | 16 | SN74111 |
| 74x112 | 2 | dual J-K negative-edge-triggered flip-flop, clear and preset | | | 16 | SN74LS112A |
| 74x113 | 2 | dual J-K negative-edge-triggered flip-flop, preset | | | 14 | SN74LS113A |
| 74x114 | 2 | dual J-K negative-edge-triggered flip-flop, preset, common clock and clear | | | 14 | SN74LS114A |
| 74x115 | 2 | dual J-K master-slave flip-flop, data lockout, reset | | | 14 | TL74115N |
| 74116, 74L116 | 2 | dual 4-bit latch, clear | | | 24 | SN74116$^{:1–123}$ |
| 74H116 | 1 | AND-gated J-K flip flop | ? | ? | 14 | MC74H116 |
| 74x117 | 1 | AND-gated J-K flip flop, one J and K input inverted | ? | ? | 14 | MC74H117 |
| 74x118 | 6 | hex set/reset latch, common reset | | | 16 | ITT74118 |
| 74119 | 6 | hex set/reset latch | | | 24 | TL74119N$^{:1–125}$ |
| 74H119 | 2 | dual J-K flip-flop, shared clear and clock inputs | ? | ? | 14 | MC74H119 |
| 74120 | 2 | dual pulse synchronizer/drivers | 15 kΩ pull-up | | 16 | SN74120 |
| 74H120 | 2 | dual J-K flip-flop, separate clock inputs | ? | ? | 14 | MC74H120 |
| 74x121 | 1 | monostable multivibrator | Schmitt trigger | | 14 | SN74121 |
| 74x122 | 1 | retriggerable monostable multivibrator, clear | | | 14 | SN74LS122 |
| 74x123 | 2 | dual retriggerable monostable multivibrator, clear | | | 16 | SN74LS123 |
| 74x124 | 2 | dual voltage-controlled oscillator | analog | | 16 | SN74S124 |
| 74x125 | 4 | quad bus buffer, negative enable | | three-state | 14 | SN74LS125A |
| 74x126 | 4 | quad bus buffer, positive enable | | three-state | 14 | SN74LS126A |
| 74x128 | 4 | quad 2-input NOR gate | | driver 50 Ω | 14 | SN74128 |
| 74x130 | 2 | retriggerable monostable multivibrator | | | 16 | SN74130 |
| 74131 | 4 | quad 2-input AND gate | | open-collector 15 V | 14 | ITT74131 |
| 74AS131, 74ALS131 | 1 | 3-to-8 line decoder/demultiplexer, address register, inverting outputs | | | 16 | SN74AS131 |
| 74x132 | 4 | quad 2-input NAND gate | Schmitt trigger | | 14 | SN74LS132 |
| 74x133 | 1 | single 13-input NAND gate | | | 16 | SN74ALS133 |
| 74x134 | 1 | single 12-input NAND gate | | three-state | 16 | SN74S134 |
| 74x135 | 4 | quad XOR/XNOR gate, two inputs to select logic type | | | 16 | SN74S135 |
| 74x136 | 4 | quad 2-input XOR gate | | open-collector | 14 | SN74LS136 |
| 74x137 | 1 | 3-to-8 line decoder/demultiplexer, address latch, inverting outputs | | | 16 | SN74LS137 |
| 74x138 | 1 | 3-to-8 line decoder/demultiplexer, inverting outputs | | | 16 | SN74LS138 |
| 74x139 | 2 | dual 2-to-4 line decoder/demultiplexer, inverting outputs | | | 16 | SN74LS139A |
| 74x140 | 2 | dual 4-input NAND gate | | driver 50 Ω | 14 | SN74S140 |
| 74x141 | 1 | BCD to decimal decoder/driver for cold-cathode indicator / Nixie tube | | open-collector 60 V | 16 | DM74141 |
| 74x142 | 1 | decade counter/latch/decoder/driver for Nixie tubes | | open-collector 60 V | 16 | SN74142 |
| 74x143 | 1 | decade counter/latch/decoder/7-segment driver | | constant current 15 mA | 24 | SN74143 |
| 74x144 | 1 | decade counter/latch/decoder/7-segment driver | | open-collector 15 V / 25 mA | 24 | SN74144 |
| 74x145 | 1 | BCD to decimal decoder/driver | | open-collector 15 V / 80 mA | 16 | SN74LS145 |
| 74x146 | 1 | 3-to-8 line decoder | | | | MCE74H146 |
| 74x147 | 1 | 10-line to 4-line priority encoder | | | 16 | SN74LS147 |
| 74x148 | 1 | 8-line to 3-line priority encoder | | | 16 | SN74LS148 |
| 74x149 | 1 | 8-line to 8-line priority encoder | | | 20 | MM74HCT149 |
| 74x150 | 1 | 16-line to 1-line data selector/multiplexer | | | 24 | SN74150 |
| 74x151 | 1 | 8-line to 1-line data selector/multiplexer | | | 16 | SN74LS151 |
| 74x152 | 1 | 8-line to 1-line data selector/multiplexer, inverting output | | | 14 | SN54152A |
| 74x153 | 2 | dual 4-line to 1-line data selector/multiplexer, non-inverting outputs | | | 16 | SN74LS153 |
| 74x154 | 1 | 4-to-16 line decoder/demultiplexer, inverting outputs | | | 24 | SN74154 |
| 74x155 | 2 | dual 2-to-4 line decoder/demultiplexer, inverting outputs | | | 16 | SN74LS155A |
| 74x156 | 2 | dual 2-to-4 line decoder/demultiplexer, inverting outputs | | open-collector | 16 | SN74LS156 |
| 74x157 | 4 | quad 2-line to 1-line data selector/multiplexer, non-inverting outputs | | | 16 | SN74LS157 |
| 74x158 | 4 | quad 2-line to 1-line data selector/multiplexer, inverting outputs | | | 16 | SN74LS158 |
| 74x159 | 1 | 4-to-16 line decoder/demultiplexer | | open-collector | 24 | SN74159 |
| 74x160 | 1 | synchronous presettable 4-bit decade counter, asynchronous clear | | | 16 | SN74LS160A |
| 74x161 | 1 | synchronous presettable 4-bit binary counter, asynchronous clear | | | 16 | SN74LS161A |
| 74x162 | 1 | synchronous presettable 4-bit decade counter, synchronous clear | | | 16 | SN74LS162A |
| 74x163 | 1 | synchronous presettable 4-bit binary counter, synchronous clear | | | 16 | SN74LS163A |
| 74x164 | 1 | 8-bit serial-in parallel-out (SIPO) shift register, asynchronous clear, not output latch | | | 14 | SN74164 |
| 74x165 | 1 | 8-bit parallel-in serial-out (PISO) shift register, parallel load, complementary outputs | | | 16 | SN74LS165A |
| 74x166 | 1 | parallel-load 8-bit shift register | | | 16 | SN74LS166A |
| 74x167 | 1 | synchronous decade rate multiplier | | | 16 | SN74167 |
| 74x168 | 1 | synchronous presettable 4-bit up/down decade counter | | | 16 | DM74LS168 |
| 74x169 | 1 | synchronous presettable 4-bit up/down binary counter | | | 16 | SN74LS169B |
| 74x170 | 1 | 16-bit register file (4x4) | | open-collector | 16 | SN74170 |
| 74x171 | 4 | quad D flip-flops, clear | | | 16 | SN74LS171 |
| 74x172 | 1 | 16-bit multiple port register file (8x2) | | three-state | 24 | SN74172 |
| 74x173 | 4 | quad D flip-flop, asynchronous clear | | three-state | 16 | SN74LS173A |
| 74x174 | 6 | hex D flip-flop, common asynchronous clear | | | 16 | SN74LS174 |
| 74x175 | 4 | quad D edge-triggered flip-flop, complementary outputs and asynchronous clear | | | 16 | SN74LS175 |
| 74x176 | 1 | presettable decade (bi-quinary) counter/latch | | | 14 | SN74176 |
| 74x177 | 1 | presettable binary counter/latch | | | 14 | SN74177 |
| 74x178 | 1 | 4-bit parallel-access shift register | | | 14 | SN74178 |
| 74x179 | 1 | 4-bit parallel-access shift register, asynchronous clear input, complementary Q$_d$ output | | | 16 | SN74179 |
| 74x180 | 1 | 9-bit odd/even parity bit generator and checker | | | 14 | SN74180 |
| 74x181 | 1 | 4-bit arithmetic logic unit and function generator | | | 24 | SN74LS181 |
| 74x182 | 1 | lookahead carry generator | | | 16 | SN74S182 |
| 74x183 | 2 | dual carry-save full adder | | | 14 | SN74LS183 |
| 74x184 | 1 | BCD to binary converter | | open-collector | 16 | SN74184 |
| 74x185 | 1 | 6-bit binary to BCD converter | | open-collector | 16 | SN74185A |
| 74x186 | 1 | 512-bit ROM (64x8) | | open-collector | 24 | SN74186 |
| 74x187 | 1 | 1024-bit ROM (256x4) | | open-collector | 16 | SN74187 |
| 74x188 | 1 | 256-bit PROM (32x8) | | open-collector | 16 | SN74S188 |
| 74x189 | 1 | 64-bit RAM (16x4), 4 data inputs, 4 inverted data outputs | | three-state | 16 | SN74S189 |
| 74x190 | 1 | synchronous presettable up/down 4-bit decade counter | | | 16 | SN74LS190 |
| 74x191 | 1 | synchronous presettable up/down 4-bit binary counter | | | 16 | SN74LS191 |
| 74x192 | 1 | synchronous presettable up/down 4-bit decade counter, clear | | | 16 | SN74LS192 |
| 74x193 | 1 | synchronous presettable up/down 4-bit binary counter, clear | | | 16 | SN74LS193 |
| 74x194 | 1 | 4-bit bidirectional universal shift register | | | 16 | SN74194 |
| 74x195 | 1 | 4-bit parallel-access shift register | | | 16 | SN74195 |
| 74x196 | 1 | presettable 4-bit decade counter/latch | | | 14 | SN74196 |
| 74x197 | 1 | presettable 4-bit binary counter/latch | | | 14 | SN74197 |
| 74x198 | 1 | 8-bit bidirectional universal shift register | | | 24 | SN74198 |
| 74x199 | 1 | 8-bit universal shift register, J-NotK serial inputs | | | 24 | SN74199 |
| 74x200 – 74x299 Part number | Units | Description | Input | Output | Pins | Datasheet |
| 74x200 | 1 | 256-bit RAM (256x1) | | three-state | 16 | DM74S200 |
| 74x201 | 1 | 256-bit RAM (256x1) | | three-state | 16 | SN74S201 |
| 74x202 | 1 | 256-bit RAM (256x1) with power down | | three-state | 16 | SN74LS202 |
| 74x206 | 1 | 256-bit RAM (256x1) | | open-collector | 16 | DM74S206 |
| 74x207 | 1 | 1024-bit RAM (256x4) | | three-state | 16 | SN74LS207 |
| 74x208 | 1 | 1024-bit RAM (256x4), separate data in- and outputs | | three-state | 20 | SN74LS208 |
| 74x209 | 1 | 1024-bit RAM (1024x1) | | three-state | 16 | SN74S209 |
| 74x210 | 8 | octal buffer, inverting | | three-state | 20 | SN74LS210 |
| 74x211 | 1 | 144-bit RAM (16x9) with output latch | | three-state | 20 | 74F211 |
| 74x212 | 1 | 144-bit RAM (16x9) | | three-state | 20 | 74F212 |
| 74x213 | 1 | 192-bit RAM (16x12) | | three-state | 20 | 74F213 |
| 74x214 | 1 | 1024-bit RAM (1024x1) | | three-state | 16 | SN74LS214 |
| 74x215 | 1 | 1024-bit RAM (1024x1) with power-down mode | | three-state | 16 | SN74LS215 |
| 74x216 | 1 | 256-bit RAM (64x4), common I/O | | three-state | 16 | SN74LS216 |
| 74x217 | 1 | 256-bit RAM (64x4) | | three-state | 20 | SN74ALS217 |
| 74x218 | 1 | 256-bit RAM (32x8) | | three-state | 20 | SN74ALS218 |
| 74x219 | 1 | 64-bit RAM (16x4), non-inverting outputs | | three-state | 16 | SN74LS219 |
| 74x221 | 2 | dual monostable multivibrator | Schmitt trigger | | 16 | SN74LS221 |
| 74x222 | 1 | 64-bit FIFO memory (16x4), synchronous, input/output ready enable | | three-state | 20 | SN74LS222 |
| 74x224 | 1 | 64-bit FIFO memory (16x4), synchronous | | three-state | 16 | SN74LS224 |
| 74x225 | 1 | 80-bit FIFO memory (16x5), asynchronous | | three-state | 20 | SN74S225 |
| 74x226 | 1 | 4-bit parallel latched bus transceiver | | three-state | 16 | SN74S226 |
| 74x227 | 1 | 64-bit FIFO memory (16x4), synchronous, input/output ready enable | | open-collector | 20 | SN74LS727 |
| 74x228 | 1 | 64-bit FIFO memory (16x4), synchronous | | open-collector | 20 | SN74LS728 |
| 74x229 | 1 | 80-bit FIFO memory (16x5), asynchronous | | three-state | 20 | SN74ALS229B |
| 74x230 | 2 | dual 4-bit buffer/driver, one inverted, one non-inverted; negative enable | | three-state | 20 | SN74AS230 |
| 74x231 | 2 | dual 4-bit buffer/driver, both inverted; one positive and one negative enable | | three-state | 20 | SN74AS231 |
| 74x232 | 1 | 64-bit FIFO memory (16x4), asynchronous | | three-state | 16 | SN74ALS232B |
| 74x233 | 1 | 80-bit FIFO memory (16x5), asynchronous | | three-state | 20 | SN74ALS233B |
| 74x234 | 1 | 256-bit FIFO memory (64x4), asynchronous | | three-state | 16 | SN74ALS234 |
| 74x235 | 1 | 320-bit FIFO memory (64x5), asynchronous | | three-state | 20 | SN74ALS235 |
| 74x236 | 1 | 256-bit FIFO memory (64x4), asynchronous | | three-state | 16 | SN74ALS236 |
| 74x237 | 1 | 3-to-8 line decoder/demultiplexer, address latch, active high outputs | | | 16 | CD74HC237 |
| 74x238 | 1 | 3-to-8 line decoder/demultiplexer, active high outputs | | | 16 | CD74HC238 |
| 74x239 | 2 | dual 2-to-4 line decoder/demultiplexer, active high outputs | | | 16 | SN74HC239 |
| 74x240 | 8 | octal buffer, inverting outputs | Schmitt trigger | three-state | 20 | SN74LS240 |
| 74x241 | 8 | octal buffer, non-inverting outputs | Schmitt trigger | three-state | 20 | SN74LS241 |
| 74x242 | 4 | quad bus transceiver, inverting outputs | Schmitt trigger | three-state | 14 | SN74LS242 |
| 74x243 | 4 | quad bus transceiver, non-inverting outputs | Schmitt trigger | three-state | 14 | SN74LS243 |
| 74x244 | 8 | octal buffer, non-inverting outputs | Schmitt trigger | three-state | 20 | SN74LS244 |
| 74x245 | 8 | octal bus transceiver, non-inverting outputs | Schmitt trigger | three-state | 20 | SN74LS245 |
| 74x246 | 1 | BCD to 7-segment decoder/driver | | open-collector 30 V | 16 | SN74246 |
| 74x247 | 1 | BCD to 7-segment decoder/driver | | open-collector 15 V | 16 | SN74LS247 |
| 74x248 | 1 | BCD to 7-segment decoder/driver | | open-collector, 2 kΩ pull-up | 16 | SN74LS248 |
| 74x249 | 1 | BCD to 7-segment decoder/driver | | open-collector | 16 | SN74249 |
| 74x250 | 1 | 1 of 16 data selector/multiplexer | | three-state | 24 | SN74AS250 |
| 74x251 | 1 | 8-line to 1-line data selector/multiplexer, complementary outputs | | three-state | 16 | SN74LS251 |
| 74x253 | 2 | dual 4-line to 1-line data selector/multiplexer | | three-state | 16 | SN74LS253 |
| 74x255 | 2 | dual 2-to-4 line decoder/demultiplexer, inverting outputs | | three-state | 16 | 74LS255 |
| 74x256 | 2 | dual 4-bit addressable latch | | | 16 | MC74F256 |
| 74x257 | 4 | quad 2-line to 1-line data selector/multiplexer, non-inverting outputs | | three-state | 16 | SN74LS257B |
| 74x258 | 4 | quad 2-line to 1-line data selector/multiplexer, inverting outputs | | three-state | 16 | SN74LS258B |
| 74x259 | 1 | 8-bit bit addressable input latch with clr | | | 16 | SN74LS259B |
| 74x260 | 2 | dual 5-input NOR gate | | | 14 | SN74LS260 |
| 74x261 | 1 | 2-bit by 4-bit parallel binary multiplier | | | 16 | SN74LS261 |
| 74x262 | 1 | 5760-bit ROM (Teletext character set, 128 characters 5x9) | | three-state | 20 | SN74S262N |
| 74x264 | 1 | look ahead carry generator | | | 16 | SN74AS264 |
| 74x265 | 4 | quad complementary output elements | | | 16 | SN74265 |
| 74x266 | 4 | quad 2-input XNOR gate | | open-collector | 14 | SN74LS266 |
| 74x268 | 6 | hex D-type latches, common output control, common enable | | three-state | 16 | SN74S268 |
| 74x269 | 1 | 8-bit bidirectional binary counter | | | 24 | MC74F269 |
| 74x270 | 1 | 2048-bit ROM (512x4) | | open-collector | 16 | SN74S270 |
| 74x271 | 1 | 2048-bit ROM (256x8) | | open-collector | 20 | SN74S271 |
| 74x273 | 1 | 8-bit register, asynchronous clear | | | 20 | SN74LS273 |
| 74x274 | 1 | 4-bit by 4-bit binary multiplier | | three-state | 20 | SN74S274 |
| 74x275 | 1 | 7-bit slice Wallace tree | | three-state | 16 | SN74S275 |
| 74x276 | 4 | quad J-NotK edge-triggered flip-flops, separate clocks, common preset and clear | | | 20 | SN74276 |
| 74x278 | 1 | 4-bit cascadeable priority registers, latched data inputs | | | 14 | SN74278 |
| 74x279 | 4 | quad set-reset latch | | | 16 | SN74LS279A |
| 74x280 | 1 | 9-bit odd/even parity bit generator/checker | | | 14 | SN74LS280 |
| 74x281 | 1 | 4-bit parallel binary accumulator | | | 24 | SN74S281 |
| 74x282 | 1 | look-ahead carry generator, selectable carry inputs | | | 20 | SN74AS282 |
| 74x283 | 1 | 4-bit binary full adder (has carry in function) | | | 16 | SN74LS283 |
| 74x284 | 1 | 4-bit by 4-bit parallel binary multiplier (high order 4 bits of product) | | | 16 | SN74284 |
| 74x285 | 1 | 4-bit by 4-bit parallel binary multiplier (low order 4 bits of product) | | | 16 | SN74285 |
| 74x286 | 1 | 9-bit parity generator/checker, bus driver parity I/O port | | | 14 | SN74AS286 |
| 74x287 | 1 | 1024-bit PROM (256x4) | | three-state | 16 | SN74S287 |
| 74x288 | 1 | 256-bit PROM (32x8) | | three-state | 16 | SN74S288 |
| 74x289 | 1 | 64-bit RAM (16x4), 4 data inputs, 4 inverted data outputs | | open-collector | 16 | SN74S289 |
| 74x290 | 1 | decade counter (separate divide-by-2 and divide-by-5 sections) | | | 14 | SN74LS290 |
| 74x292 | 1 | programmable frequency divider/digital timer | | | 16 | SN74LS292 |
| 74x293 | 1 | 4-bit binary counter (separate divide-by-2 and divide-by-8 sections) | | | 14 | SN74LS293 |
| 74x294 | 1 | programmable frequency divider/digital timer | | | 16 | SN74LS294 |
| 74x295 | 1 | 4-bit bidirectional shift register | | three-state | 14 | SN74LS295B |
| 74x297 | 1 | digital phase-locked loop filter | | | 16 | SN74LS297 |
| 74x298 | 4 | quad 2-input multiplexer, storage | | | 16 | SN74298 |
| 74x299 | 1 | 8-bit bidirectional universal shift/storage register | | three-state | 20 | SN74LS299 |
| 74x300 – 74x399 Part number | Units | Description | Input | Output | Pins | Datasheet |
| 74x300 | 1 | 256-bit RAM (256x1) | | open-collector | 16 | SN74LS300A |
| 74x301 | 1 | 256-bit RAM (256x1) | | open-collector | 16 | SN74S301 |
| 74x302 | 1 | 256-bit RAM (256x1) | | open-collector | 16 | SN74LS302 |
| 74x303 | 1 | octal divide-by-2 clock driver, 2 outputs inverted | | | 16 | SN74AS303 |
| 74x304 | 1 | octal divide-by-2 clock driver | | | 16 | SN74AS304 |
| 74x305 | 1 | octal divide-by-2 clock driver, 4 outputs inverted | | | 16 | SN74AS305 |
| 74x306 | 1 | 8-bit LV-TTL to GTL+ bus transceiver | | three-state and open-collector | (24) | SN74GTLPH306 |
| 74x309 | 1 | 1024-bit RAM (1024x1) | | open-collector | 16 | SN74S309 |
| 74x310 | 8 | octal buffer, inverting | Schmitt trigger | three-state | 20 | SN74LS310 |
| 74x311 | 1 | 144-bit RAM (16x9) with output latch | | open-collector | 20 | 74F311 |
| 74x312 | 1 | 144-bit RAM (16x9) | | open-collector | 20 | 74F312 |
| 74x313 | 1 | 192-bit RAM (16x12) | | open-collector | 20 | 74F313 |
| 74x314 | 1 | 1024-bit RAM (1024x1) | | open-collector | 16 | SN74LS314 |
| 74x315 | 1 | 1024-bit RAM (1024x1) with power-down mode | | open-collector | 16 | SN74LS315 |
| 74x316 | 1 | 256-bit RAM (64x4), common I/O | | open-collector | 16 | SN74LS316 |
| 74x317 | 1 | 256-bit RAM (64x4) | | open-collector | 20 | SN74ALS317 |
| 74x318 | 1 | 256-bit RAM (32x8) | | open-collector | 20 | SN74ALS318 |
| 74x319 | 1 | 64-bit RAM (16x4) | | open-collector | 16 | SN74LS319 |
| 74x320 | 1 | crystal-controlled oscillator | | | 16 | SN74LS320 |
| 74x321 | 1 | crystal-controlled oscillators, F/2 and F/4 count-down outputs | | | 16 | SN74LS320 |
| 74x322 | 1 | 8-bit shift register, sign extend | | three-state | 20 | SN74LS322A |
| 74x323 | 1 | 8-bit bidirectional universal shift/storage register, synchronous clear | | three-state | 20 | SN74LS323 |
| 74x324 | 1 | voltage-controlled oscillator (or crystal controlled), enable input, complementary outputs | analog | | 14 | SN74LS324 |
| 74x325 | 2 | dual voltage-controlled oscillator (or crystal controlled), complementary outputs | analog | | 16 | SN74LS325 |
| 74x326 | 2 | dual voltage-controlled oscillator (or crystal controlled), enable input, complementary outputs | analog | | 16 | SN74LS326 |
| 74x327 | 2 | dual voltage-controlled oscillator (or crystal controlled) | analog | | 14 | SN74LS327 |
| 74x330 | 1 | PLA (12 inputs, 50 terms, 6 outputs) | | three-state | 20 | SN74S330 |
| 74x331 | 1 | PLA (12 inputs, 50 terms, 6 outputs) | | open-collector, 2.5 kΩ pull-up | 20 | SN74S331 |
| 74x333 | 1 | PLA (12 inputs, 32 terms, 6 outputs, 4 state registers) | | three-state | 24 | SN74LS333 |
| 74x334 | 1 | PLA (12 inputs, 32 terms, 6 outputs) | | three-state | 24 | SN74LS334 |
| 74x335 | 1 | PLA (12 inputs, 32 terms, 6 outputs, 4 state registers) | | open-collector | 24 | SN74LS335 |
| 74x336 | 1 | PLA (12 inputs, 32 terms, 6 outputs) | | open-collector | 24 | SN74LS336 |
| 74x337 | 1 | clock driver | | three-state | 20 | SN74ABT337 |
| 74x340 | 8 | octal buffer, inverting outputs | Schmitt trigger | three-state | 20 | SN74S340 |
| 74x341 | 8 | octal buffer, non-inverting outputs | Schmitt trigger | three-state | 20 | SN74S341 |
| 74x344 | 8 | octal buffer, non-inverting outputs | Schmitt trigger | three-state | 20 | SN74S344 |
| 74x347 | 1 | BCD to 7-segment decoders/drivers, low voltage version of 7447 | | open-collector | 16 | SN74LS347 |
| 74x348 | 1 | 8 to 3-line priority encoder | | three-state | 16 | SN74LS348 |
| 74x350 | 1 | 4-bit shifter | | three-state | 16 | SN74S350 |
| 74x351 | 2 | dual 8-line to 1-line data selectors/multiplexers, 4 common data inputs | | three-state | 20 | SN74351 |
| 74x352 | 2 | dual 4-line to 1-line data selectors/multiplexers, inverting outputs | | | 16 | SN74LS352 |
| 74x353 | 2 | dual 4-line to 1-line data selectors/multiplexers, inverting outputs | | three-state | 16 | SN74LS353 |
| 74x354 | 1 | 8-line to 1-line data selector/multiplexer, transparent registers | | three-state | 20 | CD74HC354 |
| 74x355 | 1 | 8-line to 1-line data selector/multiplexer, transparent registers | | open-collector | 20 | SN74LS355 |
| 74x356 | 1 | 8-line to 1-line data selector/multiplexer, edge-triggered registers | | three-state | 20 | CD74HCT356 |
| 74x357 | 1 | 8-line to 1-line data selector/multiplexer, edge-triggered registers | | open-collector | 20 | SN74LS357 |
| 74x361 | 1 | bubble memory function timing generator | | | 22 | SN74LS361 |
| 74x362 | 1 | four-phase clock generator/driver for Texas Instruments TMS9900 | | | 20 | SN74LS362 |
| 74x363 | 1 | octal transparent latch | | three-state | 20 | SN74LS363 |
| 74x364 | 1 | octal edge-triggered D-type register | | three-state | 20 | SN74LS364 |
| 74x365 | 6 | hex buffer, non-inverting outputs | | three-state | 16 | SN74LS365A |
| 74x366 | 6 | hex buffer, inverting outputs | | three-state | 16 | SN74LS366A |
| 74x367 | 6 | hex buffer, non-inverting outputs | | three-state | 16 | SN74LS367A |
| 74x368 | 6 | hex buffer, inverting outputs | | three-state | 16 | SN74LS368A |
| 74x370 | 1 | 2048-bit ROM (512x4) | | three-state | 16 | SN74S370 |
| 74x371 | 1 | 2048-bit ROM (256x8) | | three-state | 20 | SN74S371 |
| 74x373 | 8 | octal transparent latch | | three-state | 20 | SN74LS373 |
| 74x374 | 8 | octal register | | three-state | 20 | SN74LS374 |
| 74x375 | 4 | quad bistable latch | | | 16 | SN74LS375 |
| 74x376 | 4 | quad J-NotK flip-flop, common clock and common clear | | | 16 | SN74376 |
| 74x377 | 1 | 8-bit register, clock enable | | | 20 | SN74LS377 |
| 74x378 | 1 | 6-bit register, clock enable | | | 16 | SN74LS378 |
| 74x379 | 1 | 4-bit register, clock enable and complementary outputs | | | 16 | SN74LS379 |
| 74x380 | 1 | 8-bit multifunction register (combines features of x374, x377, x273, x534 ICs) | | three-state | 24 | SN74LS380 |
| 74x381 | 1 | 4-bit arithmetic logic unit/function generator, generate and propagate outputs | | | 20 | SN74LS381A |
| 74x382 | 1 | 4-bit arithmetic logic unit/function generator, ripple carry and overflow outputs | | | 20 | SN74LS382 |
| 74x383 | 1 | 8-bit register | | open-collector | 20 | SN74S383 |
| 74x384 | 1 | 8-bit by 1-bit two's complement multipliers | | | 16 | SN74LS384 |
| 74x385 | 4 | quad serial adder/subtractor | | | 20 | SN74LS385 |
| 74x386 | 4 | quad 2-input XOR gate | | | 14 | SN74LS386 |
| 74x387 | 1 | 1024-bit PROM (256x4) | | open-collector | 16 | SN74S387 |
| 74x388 | 1 | 4-bit D-type register | | three-state and standard | 16 | Am74S388 |
| 74x390 | 2 | dual 4-bit decade counter, asynchronous clear | | | 16 | SN74LS390 |
| 74x393 | 2 | dual 4-bit binary counter, asynchronous clear | | | 14 | SN74LS393 |
| 74x395 | 1 | 4-bit cascadable shift register | | three-state | 16 | SN74LS395A |
| 74x396 | 8 | octal storage registers, parallel access | | | 16 | SN74LS396 |
| 74x398 | 4 | quad 2-input multiplexers, storage and complementary outputs | | | 20 | SN74LS398 |
| 74x399 | 4 | quad 2-input multiplexer, storage | | | 16 | SN74LS399 |
| 74x400 – 74x499 Part number | Units | Description | Input | Output | Pins | Datasheet |
| 74x401 | 1 | CRC generator/checker | | | 14 | 74F401 |
| 74x402 | 1 | serial data polynomial generator/checker | | | 16 | 74F402 |
| 74x403 | 1 | 64-bit FIFO memory (16x4) | | three-state | 24 | 74F403 |
| 74x405 | 1 | 3-to-8 line decoder (equivalent to Intel 8205) | | | 16 | UCY74S405 |
| 74406 | 1 | 3-to-8 line decoder | ? | ? | 14 | MC74406P |
| 74AVCA406 | 1 | ESD-protected voltage-translation transceiver | | | (48) | SN74AVCA406 |
| 74x407 | 1 | data access register | | three-state | 24 | 74F407 |
| 74408 | 1 | 8-bit parity tree | | | 14 | MC74408 |
| 74S408 | 1 | controller/driver for 16k/64k/256k dRAM | | | 48 | SN74S408 |
| 74x409 | 1 | controller/driver for 16k/64k/256k dRAM | | | 48 | SN74S409 |
| 74x410 | 1 | 64-bit RAM (16x4) with output register | | three-state | 18 | 74F410 |
| 74x411 | 1 | FIFO RAM controller | | | 40 | 74F411 |
| 74x412 | 1 | multi-mode buffered 8-bit latches (equivalent to Intel 3212/8212) | | three-state | 24 | SN74S412 |
| 74x413 | 1 | 256-bit FIFO memory (64x4) | | | 16 | 74F413 |
| 74x414 | 1 | interrupt priority controller for Intel 8080 (equivalent to Intel 8214) | | | 24 | UCY74S414 |
| 74416 | 1 | modulo 10 counter, preload and clear inputs | | | 16 | MC74416$^{:50}$ |
| 74S416 | 1 | 4-bit bidirectional bus transceiver, non-inverting (equivalent to Intel 8216) | | three-state | 16 | UCY74S416 |
| 74x417 | 2 | modulo 2 and modulo 5 counters, common preload and clear inputs | | | 16 | MC74417 |
| 74418 | 1 | modulo 16 counter, preload and clear inputs | | | 16 | MC74418$^{:51}$ |
| 74F418 | 1 | 32-bit error detection and correction circuit | | three-state | 48 | 74F418 |
| 74419 | 2 | dual modulo 4 counters, common preload and clear inputs | | | 16 | MC74419 |
| 74S419 | 1 | FIFO RAM controller | | | 40 | 74S419 |
| 74x420 | 1 | 32-bit check bit / syndrome bit generator | | three-state | 48 | 74F420 |
| 74x422 | 1 | retriggerable monostable multivibrators, two inputs | | | 14 | SN74LS422 |
| 74x423 | 2 | dual retriggerable monostable multivibrator | | | 16 | SN74LS423 |
| 74424 | 2 | dual voltage-controlled oscillator | | | 14 | MC74424$^{:52}$ |
| 74LS424 | 1 | two-phase clock generator/driver for Intel 8080 (equivalent to Intel 8224) | | | 16 | SN74LS424 |
| 74x425 | 4 | quad bus buffers, active low enables | | three-state | 14 | SN74425 |
| 74x426 | 4 | quad bus buffers, active high enables | | three-state | 14 | SN74426 |
| 74x428 | 1 | system controller for Intel 8080A (equivalent to Intel 8228) | | | 28 | SN74S428 |
| 74x429 | 1 | FIFO RAM controller | | three-state | 28 | 74LS429 |
| 74x430 | 1 | cyclic redundancy checker/corrector | | | 28 | 74F430 |
| 74x432 | 1 | 8-bit multi-mode buffered latch | | three-state | 24 | 74F432 |
| 74x433 | 1 | 256-bit FIFO memory (64x4) | | three-state | 24 | 74F433 |
| 74x436 | 1 | line driver/memory driver circuits - MOS memory interface, damping output resistor | | | 16 | SN74S436 |
| 74x437 | 1 | line driver/memory driver circuits - MOS memory interface | | | 16 | SN74S437 |
| 74x438 | 1 | system controller for Intel 8080A (equivalent to Intel 8238) | | | 28 | SN74S438 |
| 74x440 | 4 | quad tridirectional bus transceiver, non-inverting outputs | | open-collector | 20 | SN74LS440 |
| 74x441 | 4 | quad tridirectional bus transceiver, inverting outputs | | open-collector | 20 | SN74LS441 |
| 74x442 | 4 | quad tridirectional bus transceiver, non-inverting outputs | | three-state | 20 | SN74LS442 |
| 74x443 | 4 | quad tridirectional bus transceiver, inverting outputs | | three-state | 20 | SN74LS443 |
| 74x444 | 4 | quad tridirectional bus transceiver, inverting and non-inverting outputs | | three-state | 20 | SN74LS444 |
| 74x445 | 1 | BCD to decimal decoders/drivers | | driver 80 mA | 16 | SN74LS445 |
| 74x446 | 4 | quad bus transceivers, direction controls, inverting outputs | | three-state | 16 | SN74LS446 |
| 74x447 | 1 | BCD to 7-segment decoders/drivers, low voltage version of 74247 | | open-collector | 16 | SN74LS447 |
| 74x448 | 4 | quad tridirectional bus transceiver, inverting and non-inverting outputs | | open-collector | 20 | SN74LS448 |
| 74x449 | 4 | quad bus transceivers, direction controls, non-inverting outputs | | three-state | 16 | SN74LS449 |
| 74450 | 1 | counter, latch, 7-segment decoder | ? | open-collector | 16 | MC74450 |
| 74S450 | 1 | 8192-bit PROM (1024x8) with power-down | | three-state | 24 | SN74S450 |
| 74LS450 | 1 | 16-to-1 multiplexer, complementary outputs | | | 24 | SN74LS450 |
| 74S451 | 1 | 8192-bit PROM (1024x8) with power-down | | open-collector | 24 | SN74S451 |
| 74LS451 | 2 | dual 8-to-1 multiplexer | | | 24 | SN74LS451 |
| 74x452 | 2 | dual decade counter, synchronous | ? | ? | 16 | MC74452 |
| 74453 | 2 | dual binary counter, synchronous | ? | ? | 16 | MC74453 |
| 74LS453 | 4 | quad 4-to-1 multiplexer | | | 24 | SN74LS453 |
| 74x454 | 2 | dual decade up/down counter, synchronous, preset input | ? | ? | 24 | MC74454 |
| 74455 | 2 | dual binary up/down counter, synchronous, preset input | ? | ? | 24 | MC74455 |
| 74F455 | 1 | octal buffer / line driver with parity, inverting | | three-state | 24 | 74F455 |
| 74456 | 1 | 4-bit NBCD full adder | ? | ? | 16 | MC74456 |
| 74F456 | 1 | octal buffer / line driver with parity, non-inverting | | three-state | 24 | 74F456 |
| 74x458 | 1 | nines complement / zero element | ? | ? | 14 | MC74458 |
| 74460 | 1 | 4-bit bus transfer switch | ? | three-state | 16 | MC74460 |
| 74LS460 | 1 | 10-bit comparator | | | 24 | SN74LS460 |
| 74x461 | 1 | 8-bit presettable binary counter | | three-state | 24 | SN74LS461 |
| 74x462 | 1 | fiber-optic data-link transmitter | | open-collector 100 mA and standard | 20 | SN74LS462 |
| 74x463 | 1 | fiber-optic data-link receiver | analog | | 20 | SN74LS463 |
| 74x465 | 8 | octal buffer, non-inverting outputs | | three-state | 20 | SN74LS465 |
| 74x466 | 8 | octal buffers, inverting outputs | | three-state | 20 | SN74LS466 |
| 74x467 | 8 | octal buffers, non-inverting outputs | | three-state | 20 | SN74LS467 |
| 74x468 | 8 | octal buffers, inverting outputs | | three-state | 20 | SN74LS468 |
| 74x469 | 1 | 8-bit synchronous up/down counter, parallel load and hold capability | | three-state | 24 | SN74LS469 |
| 74x470 | 1 | 2048-bit PROM (256x8) | | open-collector | 20 | SN74S470 |
| 74x471 | 1 | 2048-bit PROM (256x8) | | three-state | 20 | SN74S471 |
| 74x472 | 1 | 4096-bit PROM (512x8) | | three-state | 20 | SN74S472 |
| 74x473 | 1 | 4096-bit PROM (512x8) | | open-collector | 20 | SN74S473 |
| 74x474 | 1 | 4096-bit PROM (512x8) | | three-state | 24 | SN74S474 |
| 74x475 | 1 | 4096-bit PROM (512x8) | | open-collector | 24 | SN74S475 |
| 74x476 | 1 | 4096-bit PROM (1024x4) | | three-state | 18 | SN74S476 |
| 74x477 | 1 | 4096-bit PROM (1024x4) | | open-collector | 18 | SN74S477 |
| 74x478 | 1 | 8192-bit PROM (1024x8) | | three-state | 24 | SN74S478 |
| 74x479 | 1 | 8192-bit PROM (1024x8) | | open-collector | 24 | SN74S479 |
| 74x480 | 1 | single burst error recovery circuit | | | 24 | SN74S480 |
| 74x481 | 1 | 4-bit slice cascadable processor elements | | | (48) | SN74S481 |
| 74x482 | 1 | 4-bit slice expandable control elements | | | 20 | SN74S482 |
| 74x484 | 1 | BCD-to-binary converter | | three-state | 20 | SN74S484A |
| 74x485 | 1 | binary-to-BCD converter | | three-state | 20 | SN74S485A |
| 74x488 | 1 | IEEE-488 bus interface | | | 48 | 74ACT488 |
| 74x490 | 2 | dual decade counter | | | 16 | SN74490 |
| 74x491 | 1 | 10-bit binary up/down counter, limited preset | | three-state | 24 | SN74LS491 |
| 74x498 | 1 | 8-bit bidirectional shift register, parallel inputs | | three-state | 24 | SN74LS498 |
| 74x500 – 74x599 Part number | Units | Description | Input | Output | Pins | Datasheet |
| 74x500 | 1 | 6-bit flash analog-to-digital converter (ADC) | analog | | 24 | 74F500 |
| 74x502 | 1 | 8-bit successive approximation register | | | 16 | 74LS502 |
| 74x503 | 1 | 8-bit successive approximation register with expansion control | | | 16 | 74LS503 |
| 74x504 | 1 | 12-bit successive approximation register with expansion control | | | 24 | 74LS504 |
| 74x505 | 1 | 8-bit successive approximation ADC | analog | three-state | 24 | 74F505 |
| 74x508 | 1 | 8-bit multiplier/divider | | | 24 | SN74S508 |
| 74x515 | 1 | programmable mapping decoder (2-to-4 line decoder with 9 programmable enable inputs) | | | 20 | 74HCT515$^{:310}$ |
| 74x516 | 1 | 16-bit multiplier/divider | | | 24 | SN74S516 |
| 74x518 | 1 | 8-bit comparator | 20 kΩ pull-up | open-collector | 20 | SN74ALS518 |
| 74x519 | 1 | 8-bit comparator | | open-collector | 20 | SN74ALS519 |
| 74x520 | 1 | 8-bit comparator, inverting output | 20 kΩ pull-up | | 20 | SN74ALS520 |
| 74x521 | 1 | 8-bit comparator, inverting output | | | 20 | SN74ALS521 |
| 74x522 | 1 | 8-bit comparator, inverting output | 20 kΩ pull-up | open-collector | 20 | SN74ALS522 |
| 74x524 | 1 | 8-bit registered comparator | | open-collector | 20 | 74F524 |
| 74x525 | 1 | 16-bit programmable counter | | | 28 | 74F525 |
| 74x526 | 1 | fuse programmable identity comparator, 16-bit | | | 20 | SN74ALS526 |
| 74x527 | 1 | fuse programmable identity comparator, 8-bit + 4-bit conventional Identity comparator | | | 20 | SN74ALS527 |
| 74x528 | 1 | fuse programmable Identity comparator, 12-bit | | | 16 | SN74ALS528 |
| 74x531 | 8 | octal transparent latch | | three-state | 20 | SN74S531 |
| 74x532 | 8 | octal register | | three-state | 20 | SN74S532 |
| 74x533 | 1 | octal D-type transparent latch, inverting outputs | | three-state | 20 | SN74ALS533A |
| 74x534 | 1 | octal D-type edge-triggered flip-flop, inverting outputs | | three-state | 20 | SN74ALS534A |
| 74x535 | 1 | octal transparent latch, inverting outputs | | three-state | 20 | SN74S535 |
| 74x536 | 1 | octal register, inverting outputs | | three-state | 20 | SN74S536 |
| 74x537 | 1 | BCD to decimal decoder | | three-state | 20 | MC74F537 |
| 74x538 | 1 | 3-to-8 line decoder/demultiplexer | | three-state | 20 | SN74ALS538 |
| 74x539 | 2 | dual 2-to-4 line decoder/demultiplexer | | three-state | 20 | SN74ALS539 |
| 74x540 | 1 | octal buffer, inverting outputs | Schmitt trigger | three-state | 20 | SN74LS540 |
| 74x541 | 1 | octal buffer, non-inverting outputs | Schmitt trigger | three-state | 20 | SN74LS541 |
| 74x543 | 1 | octal registered transceiver, non-inverting | | three-state | 24 | SN74F543 |
| 74x544 | 1 | octal registered transceiver, inverting | | three-state | 24 | MC74F544 |
| 74x545 | 1 | octal bidirectional transceiver, non-inverting | | three-state | 20 | 74F545 |
| 74x546 | 1 | 8-bit bidirectional registered transceiver, non-inverting | | three-state | 24 | SN74LS546 |
| 74LS547 | 1 | 8-bit bidirectional latched transceiver, non-inverting | | three-state | 24 | SN74LS547 |
| 74F547 | 1 | 3-to-8 line decoder/demultiplexer with address latches and acknowledge output | | | 20 | 74F547 |
| 74LS548 | 1 | 8-bit two-stage pipelined register | | three-state | 24 | SN74LS548 |
| 74F548 | 1 | 3-to-8 line decoder/demultiplexer with acknowledge output | | | 20 | 74F548 |
| 74x549 | 1 | 8-bit two-stage pipelined latch | | three-state | 24 | SN74LS549 |
| 74x550 | 1 | octal registered transceiver with status flags, non-inverting | | three-state | 28 | 74F550 |
| 74x551 | 1 | octal registered transceiver with status flags, inverting | | three-state | 28 | 74F551 |
| 74x552 | 1 | octal registered transceiver with parity and flags | | three-state | 28 | 74F552 |
| 74x556 | 1 | 16x16-bit multiplier slice | | three-state | (84) | 74S556 |
| 74x557 | 1 | 8-bit by 8-bit multiplier | | three-state | 40 | SN74S557 |
| 74x558 | 1 | 8-bit by 8-bit multiplier | | three-state | 40 | SN74S558 |
| 74x559 | 1 | 8-bit expandable two's complement multiplier/divider | | three-state | 24 | 74F559 |
| 74x560 | 1 | 4-bit decade counter | | three-state | 20 | SN74ALS560A |
| 74x561 | 1 | synchronous 4-bit binary counter | | three-state | 20 | SN74ALS561A |
| 74x563 | 1 | octal D-type transparent latch, inverting outputs | | three-state | 20 | SN74ALS563B |
| 74x564 | 1 | octal D-type edge-triggered flip-flop, inverting outputs | | three-state | 20 | SN74ALS564B |
| 74x566 | 1 | 8-bit bidirectional registered transceiver, inverting | | three-state | 24 | SN74LS566 |
| 74x567 | 1 | 8-bit bidirectional latched transceiver, inverting | | three-state | 24 | SN74LS567 |
| 74x568 | 1 | decade up/down counter | | three-state | 20 | SN74ALS568A |
| 74x569 | 1 | binary up/down counter | | three-state | 20 | SN74ALS569A |
| 74x570 | 1 | 2048-bit PROM (512x4) | | open-collector | 16 | DM74S570 |
| 74x571 | 1 | 2048-bit PROM (512x4) | | three-state | 16 | DM74S571 |
| 74x572 | 1 | 4096-bit PROM (1024x4) | | open-collector | 18 | DM74S572 |
| 74x573 | 1 | octal D-type transparent latch | | three-state | 20 | SN74ALS573C |
| 74x574 | 1 | octal D-type edge-triggered flip-flop | | three-state | 20 | SN74ALS574B |
| 74x575 | 1 | octal D-type edge-triggered flip-flop, synchronous clear | | three-state | 24 | SN74ALS575A |
| 74x576 | 1 | octal D-type edge-triggered flip-flop, inverting outputs | | three-state | 20 | SN74ALS576B |
| 74x577 | 1 | octal D-type edge-triggered flip-flop, synchronous clear, inverting outputs | | three-state | 24 | SN74ALS577A |
| 74x579 | 1 | 8-bit bidirectional binary counter | | three-state | 20 | MC74F579 |
| 74x580 | 1 | octal D-type transparent latch, inverting outputs | | three-state | 20 | SN74ALS580B |
| 74x582 | 1 | 4-bit BCD arithmetic logic unit | | | 24 | 74F582 |
| 74x583 | 1 | 4-bit BCD adder | | | 16 | 74F583 |
| 74x588 | 1 | octal bidirectional transceiver with IEEE-488 termination resistors | | three-state | 20 | 74F588 |
| 74x589 | 1 | 8-bit shift register, input latch | | three-state | 16 | SN74LS589 |
| 74x590 | 1 | 8-bit binary counter, output registers | | three-state | 16 | SN74LS590 |
| 74x591 | 1 | 8-bit binary counter, output registers | | open-collector | 16 | SN74LS591 |
| 74x592 | 1 | 8-bit binary counter, input registers | | | 16 | SN74LS592 |
| 74x593 | 1 | 8-bit binary counter, input registers | | three-state | 20 | SN74LS593 |
| 74x594 | 1 | 8-bit shift registers, serial-in, parallel-out, output latches | | buffered | 16 | SN74LS594 |
| 74x595 | 1 | 8-bit shift registers, serial-in, parallel-out, output latches, output enable | | three-state | 16 | SN74LS595 |
| 74x596 | 1 | 8-bit shift registers, serial-in, parallel-out, output latches, output enable | | open-collector | 16 | SN74LS596 |
| 74x597 | 1 | 8-bit shift registers, parallel-in, serial-out, input latches | | | 16 | SN74LS597 |
| 74x598 | 1 | 8-bit shift register, selectable parallel-in/out input latches | | three-state | 20 | SN74LS598 |
| 74x599 | 1 | 8-bit shift registers, serial-in, parallel-out, output latches | | open-collector | 16 | SN74LS599 |
| 74x600 – 74x699 Part number | Units | Description | Input | Output | Pins | Datasheet |
| 74x600 | 1 | dynamic memory refresh controller, transparent and burst modes, for 4K or 16K dRAM | | three-state | 20 | SN74LS600A |
| 74x601 | 1 | dynamic memory refresh controller, transparent and burst modes, for 64K dRAM | | three-state | 20 | SN74LS601A |
| 74x602 | 1 | dynamic memory refresh controller, cycle steal and burst modes, for 4K or 16K dRAM | | three-state | 20 | SN74LS602A |
| 74x603 | 1 | dynamic memory refresh controller, cycle steal and burst modes, for 64K dRAM | | three-state | 20 | SN74LS603A |
| 74x604 | 1 | octal 2-input multiplexer, latch, high-speed | | three-state | 28 | SN74LS604 |
| 74x605 | 1 | octal 2-input multiplexer, latch, high-speed | | open-collector | 28 | SN74LS605 |
| 74x606 | 1 | octal 2-input multiplexer, latch, glitch-free | | three-state | 28 | SN74LS606 |
| 74x607 | 1 | octal 2-input multiplexer, latch, glitch-free | | open-collector | 28 | SN74LS607 |
| 74x608 | 1 | memory cycle controller | | | 16 | SN74LS608 |
| 74x610 | 1 | memory mapper, latched | | three-state | 40 | SN74LS610 |
| 74x611 | 1 | memory mapper, latched | | open-collector | 40 | SN74LS611 |
| 74x612 | 1 | memory mapper | | three-state | 40 | SN74LS612 |
| 74x613 | 1 | memory mapper | | open-collector | 40 | SN74LS613 |
| 74x614 | 1 | octal bus transceiver and register, inverting | | open-collector | 24 | SN74ALS614 |
| 74x615 | 1 | octal bus transceiver and register, non-inverting | | open-collector | 24 | SN74ALS615 |
| 74x616 | 1 | 16-bit parallel error detection and correction | | three-state | 40 | SN74ALS616 |
| 74x617 | 1 | 16-bit parallel error detection and correction | | open-collector | 40 | SN74ALS617 |
| 74x620 | 1 | octal bus transceiver, inverting | | three-state | 20 | SN74LS620 |
| 74x621 | 1 | octal bus transceiver, non-inverting | | open-collector | 20 | SN74LS621 |
| 74x622 | 1 | octal bus transceiver, inverting | | open-collector | 20 | SN74LS622 |
| 74x623 | 1 | octal bus transceiver, non-inverting | | three-state | 20 | SN74LS623 |
| 74x624 | 1 | voltage-controlled oscillator, enable control, range control, two-phase outputs | analog | | 14 | SN74LS624 |
| 74x625 | 2 | dual voltage-controlled oscillator, two-phase outputs | analog | | 16 | SN74LS625 |
| 74x626 | 2 | dual voltage-controlled oscillator, enable control, two-phase outputs | analog | | 16 | SN74LS626 |
| 74x627 | 2 | dual voltage-controlled oscillator | analog | | 14 | SN74LS627 |
| 74x628 | 1 | voltage-controlled oscillator, enable control, range control, external temperature compensation, two-phase outputs | analog | | 14 | SN74LS628 |
| 74x629 | 2 | dual voltage-controlled oscillator, enable control, range control | analog | | 16 | SN74LS629 |
| 74x630 | 1 | 16-bit error detection and correction (EDAC) | | three-state | 28 | SN74LS630 |
| 74x631 | 1 | 16-bit error detection and correction | | open-collector | 28 | SN74LS631 |
| 74x632 | 1 | 32-bit parallel error detection and correction, byte-write | | three-state | 52 | SN74ALS632 |
| 74x633 | 1 | 32-bit parallel error detection and correction, byte-write | | open-collector | 52 | SN74ALS633 |
| 74x634 | 1 | 32-bit parallel error detection and correction | | three-state | 48 | SN74ALS634 |
| 74x635 | 1 | 32-bit parallel error detection and correction | | open-collector | 48 | SN74ALS635 |
| 74x636 | 1 | 8-bit parallel error detection and correction | | three-state | 20 | SN74LS636 |
| 74x637 | 1 | 8-bit parallel error detection and correction | | open-collector | 20 | SN74LS637 |
| 74x638 | 1 | octal bus transceiver, inverting outputs | | three-state and open-collector | 20 | SN74LS638 |
| 74x639 | 1 | octal bus transceiver, non-inverting outputs | | three-state and open-collector | 20 | SN74LS639 |
| 74x640 | 1 | octal bus transceiver, inverting outputs | | three-state | 20 | SN74LS640 |
| 74x641 | 1 | octal bus transceiver, non-inverting outputs | | open-collector | 20 | SN74LS641 |
| 74x642 | 1 | octal bus transceiver, inverting outputs | | open-collector | 20 | SN74LS642 |
| 74x643 | 1 | octal bus transceiver, mix of inverting and non-inverting outputs | | three-state | 20 | SN74LS643 |
| 74x644 | 1 | octal bus transceiver, mix of inverting and non-inverting outputs | | open-collector | 20 | SN74LS644 |
| 74x645 | 1 | octal bus transceiver, non-inverting outputs | | three-state | 20 | SN74LS645 |
| 74x646 | 1 | octal bus transceiver/latch/multiplexer, non-inverting outputs | | three-state | 24 | SN74ALS646A |
| 74x647 | 1 | octal bus transceiver/latch/multiplexer, non-inverting outputs | | open-collector | 24 | SN74LS647 |
| 74x648 | 1 | octal bus transceiver/latch/multiplexer, inverting outputs | | three-state | 24 | SN74ALS648A |
| 74x649 | 1 | octal bus transceiver/latch/multiplexer, inverting outputs | | open-collector | 24 | SN74LS649 |
| 74x651 | 1 | octal bus transceiver/register, inverting outputs | | three-state | 24 | SN74ALS651A |
| 74x652 | 1 | octal bus transceiver/register, non-inverting outputs | | three-state | 24 | SN74ALS652A |
| 74x653 | 1 | octal bus transceiver/register, inverting outputs | | three-state and open-collector | 24 | SN74ALS653 |
| 74x654 | 1 | octal bus transceiver/register, non-inverting outputs | | three-state and open-collector | 24 | SN74ALS654 |
| 74x655 | 1 | octal buffer / line driver with parity, inverting | | three-state | 24 | 74F655 |
| 74x656 | 1 | octal buffer / line driver with parity, non-inverting | | three-state | 24 | 74F656 |
| 74x657 | 1 | octal bidirectional transceiver with 8-bit parity generator/checker | | three-state | 24 | SN74F657 |
| 74x658 | 1 | octal bus transceiver, parity, inverting | | three-state | 24 | SN74HC658 |
| 74x659 | 1 | octal bus transceiver, parity, non-inverting | | three-state | 24 | SN74HC659 |
| 74x664 | 1 | octal bus transceiver, parity, inverting | | three-state | 24 | SN74HC664 |
| 74x665 | 1 | octal bus transceiver, parity, non-inverting | | three-state | 24 | SN74HC665 |
| 74x666 | 1 | 8-bit D-type transparent read-back latch, non-inverting | | three-state | 24 | SN74ALS666 |
| 74x667 | 1 | 8-bit D-type transparent read-back latch, inverting | | three-state | 24 | SN74ALS667 |
| 74x668 | 1 | synchronous 4-bit decade up/down counter | | | 16 | SN74LS668 |
| 74x669 | 1 | synchronous 4-bit binary up/down counter | | | 16 | SN74LS669 |
| 74x670 | 1 | 16-bit register file (4x4) | | three-state | 16 | SN74LS670 |
| 74x671 | 1 | 4-bit bidirectional shift register/latch/multiplexer, direct clear | | three-state | 20 | SN74LS671 |
| 74x672 | 1 | 4-bit bidirectional shift register/latch/multiplexer, synchronous clear | | three-state | 20 | SN74LS672 |
| 74x673 | 1 | 16-bit serial-in, serial/parallel-out shift register, output storage registers | | three-state | 24 | SN74LS673 |
| 74x674 | 1 | 16-bit parallel-in, serial-out shift register | | three-state | 24 | SN74LS674 |
| 74x675 | 1 | 16-bit serial-in, serial/parallel-out shift register | | | 24 | 74F675A |
| 74x676 | 1 | 16-bit serial/parallel-in, serial-out shift register | | | 24 | 74F676 |
| 74x677 | 1 | 16-bit address comparator, enable | | | 24 | SN74ALS677 |
| 74x678 | 1 | 16-bit address comparator, latch | | | 24 | SN74ALS678 |
| 74x679 | 1 | 12-bit address comparator, latch | | | 20 | SN74ALS679 |
| 74x680 | 1 | 12-bit address comparator, enable | | | 20 | SN74ALS680 |
| 74x681 | 1 | 4-bit parallel binary accumulator | | three-state | 20 | SN74LS681 |
| 74x682 | 1 | 8-bit magnitude comparator, P>Q output | 20 kΩ pull-up | | 20 | SN74LS682 |
| 74x683 | 1 | 8-bit magnitude comparator, P>Q output | 20 kΩ pull-up | open-collector | 20 | SN74LS683 |
| 74x684 | 1 | 8-bit magnitude comparator, P>Q output | | | 20 | SN74LS684 |
| 74x685 | 1 | 8-bit magnitude comparator, P>Q output | | open-collector | 20 | SN74LS685 |
| 74x686 | 1 | 8-bit magnitude comparator, P>Q output, enable | | | 24 | SN74LS686 |
| 74x687 | 1 | 8-bit magnitude comparator, P>Q output, enable | | open-collector | 24 | SN74LS687 |
| 74x688 | 1 | 8-bit magnitude comparator, enable | | | 20 | SN74LS688 |
| 74x689 | 1 | 8-bit magnitude comparator, enable | | open-collector | 20 | SN74LS689 |
| 74x690 | 1 | 4-bit decimal counter/latch/multiplexer, asynchronous clear | | three-state | 20 | SN74LS690 |
| 74x691 | 1 | 4-bit binary counter/latch/multiplexer, asynchronous clear | | three-state | 20 | SN74LS691 |
| 74x692 | 1 | 4-bit decimal counter/latch/multiplexer, synchronous clear | | three-state | 20 | SN74LS692 |
| 74x693 | 1 | 4-bit binary counter/latch/multiplexer, synchronous clear | | three-state | 20 | SN74LS693 |
| 74x694 | 1 | 4-bit decimal counter/latch/multiplexer, synchronous and asynchronous clears | | three-state | 20 | SN74ALS694 |
| 74x695 | 1 | 4-bit binary counter/latch/multiplexer, synchronous and asynchronous clears | | three-state | 20 | SN74ALS695 |
| 74x696 | 1 | 4-bit decimal counter/register/multiplexer, asynchronous clear | | three-state | 20 | SN74LS696 |
| 74x697 | 1 | 4-bit binary counter/register/multiplexer, asynchronous clear | | three-state | 20 | SN74LS697 |
| 74x698 | 1 | 4-bit decimal counter/register/multiplexer, synchronous clear | | three-state | 20 | SN74LS698 |
| 74x699 | 1 | 4-bit binary counter/register/multiplexer, synchronous clear | | three-state | 20 | SN74LS699 |
| 74x700 – 74x799 Part number | Units | Description | Input | Output | Pins | Datasheet |
| 74x700 | 1 | octal dRAM driver, inverting | | three-state | 20 | SN74S700 |
| 74x701 | 1 | 8-bit register/counter/comparator | | three-state | 24 | 74F701 |
| 74x702 | 1 | 8-bit registered read-back transceiver | | three-state | 24 | 74F702 |
| 74x705 | 1 | arithmetic logic unit for digital signal processing applications | | three-state | (84) | 74ACT705 |
| 74x707 | 1 | 8-bit TTL-ECL shift register | | | 20 | 74F707 |
| 74x708 | 1 | 576-bit FIFO memory (64x9) | | three-state | 28 | 74ACT708 |
| 74x710 | 1 | 8-bit single-supply TTL-ECL shift register | | | 20 | 74F710 |
| 74x711 | 5 | quint 2-to-1 multiplexers | | three-state | 20 | 74F711 |
| 74x712 | 5 | quint 3-to-1 multiplexers | | | 24 | 74F712 |
| 74x715 | 1 | programmable video sync generator | | | 20 | 74ACT715 |
| 74x716 | 1 | programmable decade counter | | | 16 | SN74LS716 |
| 74x718 | 1 | programmable binary counter | | | 16 | SN74LS718 |
| 74x723 | 1 | 576-bit FIFO memory (64x9) | | three-state | 28 | 74ACT723 |
| 74x724 | 1 | voltage-controlled multivibrator | analog | | 8 | SN74LS724 |
| 74x725 | 1 | 4608-bit FIFO memory (512x9) | | three-state | 28 | 74ACT725 |
| 74x730 | 1 | octal dRAM driver, inverting | | three-state | 20 | SN74S730 |
| 74x731 | 1 | octal dRAM driver, non-inverting | | three-state | 20 | SN74S731 |
| 74x732 | 1 | 4-bit 3-bus multiplexer, inverting | | three-state | 20 | 74F732 |
| 74x733 | 1 | 4-bit 3-bus multiplexer, non-inverting | | three-state | 20 | 74F733 |
| 74x734 | 1 | octal dRAM driver, non-inverting | | three-state | 20 | SN74S734 |
| 74x740 | 2 | dual 4-bit line driver, inverting | | three-state | 20 | SN74S740 |
| 74x741 | 2 | dual 4-bit line driver, non-inverting, complementary enable inputs | | three-state | 20 | SN74S741 |
| 74x742 | 1 | octal line driver, inverting | | open-collector | 20 | SN74ALS742$^{:3-122}$$^{:25}$ |
| 74x743 | 1 | octal line driver, non-inverting | | open-collector | 20 | SN74ALS743$^{:3-124}$$^{:25}$ |
| 74x744 | 2 | dual 4-bit line driver, non-inverting | | three-state | 20 | SN74S744 |
| 74x746 | 1 | octal buffer / line driver, inverting | 20 kΩ pull-up | three-state | 20 | SN74ALS746 |
| 74x747 | 1 | octal buffer / line driver, non-inverting | 20 kΩ pull-up | three-state | 20 | SN74ALS747 |
| 74x748 | 1 | 8 to 3-line priority encoder (glitch-less) | | | 16 | SN74LS748 |
| 74x756 | 1 | octal buffer/line driver, inverting outputs | | open-collector | 20 | SN74AS756 |
| 74x757 | 1 | octal buffer/line driver, non-inverting outputs, complementary enable inputs | | open-collector | 20 | SN74AS757 |
| 74x758 | 1 | quadruple bus transceivers, inverting outputs | | open-collector | 14 | SN74AS758 |
| 74x759 | 1 | quadruple bus transceivers, non-inverting outputs | | open-collector | 14 | SN74AS759 |
| 74x760 | 1 | octal buffer/line driver, non-inverting outputs | | open-collector | 20 | SN74ALS760 |
| 74x762 | 1 | octal buffer/line driver, inverting and non-inverting outputs | | open-collector | 20 | SN74ALS762 |
| 74x763 | 1 | octal buffer/line driver, inverting outputs, complementary enable inputs | | open-collector | 20 | SN74ALS763 |
| 74x764 | 1 | dual-port dRAM controller | | | 40 | 74F764 |
| 74x765 | 1 | dual-port dRAM controller with address latch | | | 40 | 74F765 |
| 74x776 | 1 | 8-bit latched transceiver for FutureBus | | three-state and open-collector | 28 | SN74F776 |
| 74x777 | 3 | triple latched transceiver | | three-state and open-collector | 20 | 74F777 |
| 74x779 | 1 | 8-bit bidirectional binary counter | | three-state | 16 | MC74F779 |
| 74x783 | 1 | synchronous address multiplexer for display systems | | | 40 | SN74LS783 |
| 74x784 | 1 | 8-bit serial/parallel multiplier with adder/subtractor | | | 20 | 74F784 |
| 74x785 | 1 | synchronous address multiplexer for display systems with 256-column refresh | | | 40 | SN74LS785 |
| 74x786 | 1 | 4-input asynchronous bus arbiter | | | 16 | 74F786 |
| 74x790 | 1 | error detection and correction (EDAC) | | three-state | 48 | SN74ALS790 |
| 74x793 | 1 | 8-bit latch, readback | | | 20 | SN74LS793 |
| 74x794 | 1 | 8-bit register, readback | | | 20 | SN74LS794 |
| 74x795 | 1 | octal buffer, non-inverting, common enable | | three-state | 20 | SN74LS795 |
| 74x796 | 1 | octal buffer, inverting, common enable | | three-state | 20 | SN74LS796 |
| 74x797 | 1 | octal buffer, non-inverting, enable for 4 buffers each | | three-state | 20 | SN74LS797 |
| 74x798 | 1 | octal buffer, inverting, enable for 4 buffers each | | three-state | 20 | SN74LS798 |
| 74x800 – 74x899 Part number | Units | Description | Input | Output | Pins | Datasheet |
| 74x800 | 3 | triple 4-input AND/NAND drivers | | driver | 20 | SN74AS800 |
| 74x802 | 3 | triple 4-input OR/NOR drivers | | driver | 20 | SN74AS802 |
| 74x803 | 4 | quad D flip flops with matched propagation delays | | | 14 | MC74F803 |
| 74x804 | 6 | hex 2-input NAND drivers | | driver | 20 | SN74ALS804A |
| 74x805 | 6 | hex 2-input NOR drivers | | driver | 20 | SN74ALS805A |
| 74x807 | 1 | 1-to-10 clock driver | | driver | 20 | IDT74FCT807 |
| 74x808 | 6 | hex 2-input AND drivers | | driver | 20 | SN74AS808B |
| 74x810 | 4 | quad 2-input XNOR gates | | | 14 | SN74ALS810 |
| 74x811 | 4 | quad 2-input XNOR gates | | open-collector | 14 | DM74ALS811 |
| 74x817 | 1 | GTL+ to LV-TTL 1-to-6 fanout / LV-TTL to GTL+ 1-to-2 fanout driver | | three-state and open-collector | (24) | SN74GTLP817 |
| 74x818 | 1 | 8-bit diagnostic register | | three-state | 24 | 74ACT818 |
| 74x819 | 1 | 8-bit diagnostic / pipeline register | | three-state | 24 | SN74ALS819 |
| 74x821 | 1 | 10-bit bus interface flip-flop | | three-state | 24 | SN74AS821A |
| 74x822 | 1 | 10-bit bus interface flip-flop, inverting inputs | | three-state | 24 | SN74AS822 |
| 74x823 | 1 | 9-bit D-type flip-flops, clear and clock enable inputs | | three-state | 24 | SN74AS823A |
| 74x824 | 1 | 9-bit D-type flip-flops, clear and clock enable inputs, inverting inputs | | three-state | 24 | SN74AS824 |
| 74x825 | 1 | 8-bit D-type flip-flop, clear and clock enable inputs | | three-state | 24 | SN74AS825A |
| 74x826 | 1 | 8-bit D-type flip-flop, clear and clock enable inputs, inverting inputs | | three-state | 24 | SN74AS826 |
| 74x827 | 1 | 10-bit buffer, non-inverting | | three-state | 24 | MC74F827 |
| 74x828 | 1 | 10-bit buffer, inverting | | three-state | 24 | MC74F828 |
| 74x832 | 6 | hex 2-input OR drivers | | driver | 20 | SN74ALS832A |
| 74x833 | 1 | 8-bit to 9-bit bus transceiver with parity register, non-inverting | | three-state | 24 | SN74ABT833 |
| 74x834 | 1 | 8-bit to 9-bit bus transceiver with parity register, inverting | | three-state | 24 | IDT74FCT834 |
| 74x835 | 1 | 8-bit shift register with 2:1 input multiplexers, one input latched, serial output | | | 24 | 74F835 |
| 74x839 | 1 | field-programmable logic array 14x32x6 | | three-state | 24 | SN74PL839 |
| 74x840 | 1 | field-programmable logic array 14x32x6 | | open-collector | 24 | SN74PL840 |
| 74x841 | 1 | 10-bit D-type flip-flop | | three-state | 24 | SN74ALS841 |
| 74x842 | 1 | 10-bit D-type flip-flop, inverting inputs | | three-state | 24 | SN74ALS842 |
| 74x843 | 1 | 9-bit D flip-flops, clear and set inputs | | three-state | 24 | SN74ALS843 |
| 74x844 | 1 | 9-bit D flip-flops, clear and set inputs, inverting inputs | | three-state | 24 | SN74ALS844 |
| 74x845 | 1 | 8-bit D flip-flops, clear and set inputs | | three-state | 24 | SN74ALS845 |
| 74x846 | 1 | 8-bit D flip-flops, clear and set inputs, inverting inputs | | three-state | 24 | SN74ALS846 |
| 74x848 | 1 | 8 to 3-line priority encoder (glitch-less) | | three-state | 16 | SN74LS848 |
| 74x850 | 1 | 1 of 16 data selector/multiplexer, clocked select | | three-state | 28 | SN74AS850 |
| 74x851 | 1 | 1 of 16 data selector/multiplexer | | three-state | 28 | SN74AS851 |
| 74x852 | 1 | 8-bit universal transceiver port controller | | three-state | 24 | SN74AS852 |
| 74x853 | 1 | 8-bit to 9-bit bus transceiver with parity latch, non-inverting | | three-state | 24 | SN74ABT853 |
| 74x854 | 1 | 8-bit to 9-bit bus transceiver with parity latch, inverting | | three-state | 24 | IDT74FCT854 |
| 74x856 | 1 | 8-bit universal transceiver port controller | | three-state | 24 | SN74AS856 |
| 74x857 | 6 | hex 2-line to 1-line multiplexer | | three-state | 24 | SN74ALS857 |
| 74x861 | 1 | 10-bit bus transceiver, non-inverting | | three-state | 24 | SN74ABT861 |
| 74x862 | 1 | 10-bit bus transceiver, inverting | | three-state | 24 | SN74ABT862 |
| 74x863 | 1 | 9-bit bus transceiver, non-inverting | | three-state | 24 | SN74ABT863 |
| 74x864 | 1 | 9-bit bus transceiver, inverting | | three-state | 24 | 74F864 |
| 74x866 | 1 | 8-bit magnitude comparator with latches | | | 24 | SN74AS866 |
| 74x867 | 1 | synchronous 8-bit up/down counter, asynchronous clear | | | 24 | SN74ALS867A |
| 74x869 | 1 | synchronous 8-bit up/down counter, synchronous clear | | | 24 | SN74ALS869 |
| 74x870 | 1 | dual 16x4 register files | | | 24 | SN74AS870 |
| 74x871 | 1 | dual 16x4 register files | | | 28 | SN74AS871 |
| 74x873 | 2 | dual 4-bit transparent latch with clear | | three-state | 24 | SN74ALS873B |
| 74x874 | 2 | dual 4-bit edge-triggered D flip-flops with clear | | three-state | 24 | SN74ALS874B |
| 74x876 | 2 | dual 4-bit edge-triggered D flip-flops with set, inverting outputs | | three-state | 24 | SN74ALS876A |
| 74x877 | 1 | 8-bit universal transceiver port controller | | three-state | 24 | SN74AS877 |
| 74x878 | 2 | dual 4-bit D-type flip-flop, synchronous clear, non-inverting outputs | | three-state | 24 | SN74ALS878 |
| 74x879 | 2 | dual 4-bit D-type flip-flop, synchronous clear, inverting outputs | | three-state | 24 | SN74ALS879 |
| 74x880 | 2 | dual 4-bit transparent latch with clear, inverting outputs | | three-state | 24 | SN74ALS880 |
| 74x881 | 1 | 4-bit arithmetic logic unit | | | 24 | SN74AS881A |
| 74x882 | 1 | 32-bit lookahead carry generator | | | 24 | SN74AS882 |
| 74x885 | 1 | 8-bit magnitude comparator | | | 24 | SN74AS885 |
| 74x887 | 1 | 8-bit processor element (non-cascadable version of 74x888) | | | (68) | SN74AS887 |
| 74x888 | 1 | 8-bit processor slice | | | 64 | SN74AS888 |
| 74x889 | 1 | 8-bit processor slice | | | (68) | SN74AS889 |
| 74x890 | 1 | microoperation sequencer | | | 64 | SN74AS890 |
| 74x891 | 1 | microoperation sequencer | | | (68) | SN74AS891 |
| 74x895 | 1 | 8-bit memory address generator | | | (68) | SN74AS895 |
| 74x897 | 1 | 16-bit parallel/serial barrel shifter | | | (68) | SN74AS897A |
| 74x899 | 1 | 9-bit latchable transceiver with parity generator / checker | | three-state | (28) | 74AC899 |
| 74x900 – 74x999 Part number | Units | Description | Input | Output | Pins | Datasheet |
| 74x900 | 4 | quad 2-input NAND gate | | driver | 14 | SN74ALS900 |
| 74x901 | 6 | hex inverting TTL buffer | | | 14 | MM74C901 |
| 74C902 | 6 | hex non-inverting TTL buffer | | | 14 | MM74C902 |
| 74ALS902 | 4 | quad 2-input NOR gate | | driver | 14 | SN74ALS902 |
| 74C903 | 6 | hex inverting PMOS buffer | | | 14 | MM74C903 |
| 74ALS903 | 4 | quad 2-input NAND gate | | open-collector driver | 14 | SN74ALS903 |
| 74x904 | 6 | hex non-inverting PMOS buffer | | | 14 | MM74C904 |
| 74x905 | 1 | 12-bit successive approximation register | | | 24 | MM74C905 |
| 74x906 | 6 | hex open drain n-channel buffers | | open-collector | 14 | MM74C906 |
| 74x907 | 6 | hex open drain p-channel buffers | | | 14 | MM74C907 |
| 74x908 | 2 | dual 2-input NAND 30 V / 250 mA relay driver | | | 8 | MM74C908 |
| 74x909 | 4 | quad voltage comparator | analog | open-collector | 14 | MM74C909 |
| 74x910 | 1 | 256-bit RAM (64x4) | | three-state | 18 | MM74C910 |
| 74x911 | 1 | 4-digit expandable display controller | | three-state | 28 | MM74C911 |
| 74x912 | 1 | 6-digit BCD display controller and driver | | three-state | 28 | MM74C912 |
| 74x913 | 1 | 6-digit BCD display controller and driver, no decimal point | | | 24 | MM74C913 |
| 74x914 | 6 | hex inverter gate, extended input voltage | Schmitt trigger | | 14 | MM74C914 |
| 74x915 | 1 | 7-segment to BCD converter | | three-state | 18 | MM74C915 |
| 74x917 | 1 | 6-digit hex display controller and driver | | three-state | 28 | MM74C917 |
| 74x918 | 2 | dual 2-input NAND 30 V / 250 mA relay driver | | | 14 | MM74C918 |
| 74x920 | 1 | 1024-bit RAM (256x4), separate data inputs and outputs | | three-state | 22 | MM74C920 |
| 74x921 | 1 | 1024-bit RAM (256x4) | | three-state | 18 | MM74C921 |
| 74x922 | 1 | 16-key encoder | | three-state | 18 | MM74C922 |
| 74x923 | 1 | 20-key encoder | | three-state | 20 | MM74C923 |
| 74x925 | 1 | 4-digit counter/display driver | | | 16 | MM74C925 |
| 74x926 | 1 | 4-digit decade counter/display driver, carry out and latch (up to 9999) | | | 16 | MM74C926 |
| 74x927 | 1 | 4-digit timer counter/display driver (up to 9599, intended as time elapsed, i.e. 9:59.9 min) | | | 16 | MM74C927 |
| 74x928 | 1 | 4-digit counter/display driver (up to 1999) | | | 16 | MM74C928 |
| 74x929 | 1 | 1024-bit RAM (1024x1), single chip select | | three-state | 16 | MM74C929 |
| 74x930 | 1 | 1024-bit RAM (1024x1), three chip selects | | three-state | 18 | MM74C930 |
| 74x932 | 1 | phase comparator | | | 8 | MM74C932 |
| 74x933 | 1 | 7-bit address bus comparator | | | 20 | MM74C933 |
| 74934 | 1 | ADC similar to ADC0829, see corresponding NSC datasheet | | | | |
| 74x935 | 1 | ADC for 3.5-digit digital voltmeters, multiplexed 7-segment display outputs | analog | | 28 | MM74C935 |
| 74x936 | 1 | ADC for 3.75-digit digital voltmeters, multiplexed 7-segment display outputs | analog | | ? | MM74C936 |
| 74x937 | 1 | ADC for 3.5-digit digital voltmeters, multiplexed BCD outputs | analog | | 24 | MM74C937 |
| 74x938 | 1 | ADC for 3.75-digit digital voltmeters, multiplexed BCD outputs | analog | | 24 | MM74C938 |
| 74x940 | 1 | octal bus/line drivers/line receivers | Schmitt trigger | three-state | 20 | DM74S940 |
| 74x941 | 1 | octal bus/line drivers/line receivers | Schmitt trigger | three-state | 20 | DM74S941 |
| 74x942 | 1 | 300 baud Bell 103 modem (+/- 5 V supply) | | | 20 | MM74HC942 |
| 74x943 | 1 | 300 baud Bell 103 modem (single 5 V supply) | | | 20 | MM74HC943 |
| 74x945 | 1 | 4-digit up/down counter, decoder and LCD driver, output latch | | | 40 | MM74C945 |
| 74x946 | 1 | 4.5-digit counter, decoder and LCD driver, leading zero blanking | | | 40 | MM74C946 |
| 74x947 | 1 | 4-digit up/down counter, decoder and LCD driver, leading zero blanking | | | 40 | MM74C947 |
| 74x948 | 1 | 8-bit ADC with 16-channel analog multiplexer | analog | three-state | 40 | MM74C948 |
| 74x949 | 1 | 8-bit ADC with 8-channel analog multiplexer | analog | three-state | 28 | MM74C949 |
| 74x950 | 1 | 8-bit ADC with 8-channel analog multiplexer and sample and hold | analog | three-state | 28 | MM74C950 |
| 74x952 | 1 | dual rank 8-bit shift register, synchronous clear | | three-state | 18 | DM74LS952 |
| 74C956 | 1 | 4-digit, 17-segment alpha-numeric LED display driver with memory and decoder | | | 40 | MM74C956 |
| 74BCT956 | 1 | octal bus transceiver and latch | | three-state | 24 | SN74BCT956 |
| 74x962 | 1 | dual rank 8-bit shift register, register exchange mode | | three-state | 18 | DM74LS962 |
| 74x963 | 1 | dual rank 8-bit shift register, synchronous clear | | three-state | 20 | SN74ALS963 |
| 74x964 | 1 | dual rank 8-bit shift register, synchronous and asynchronous clear | | three-state | 20 | SN74ALS964 |
| 74x968 | 1 | controller/driver for 16k/64k/256k/1M dRAM | | | 52 | 74F968 |
| 74x978 | 1 | octal flip-flop with serial scanner | | | 24 | 74F978 |
| 74x979 | 1 | 9-bit registered transceiver with parity generator/checker for FutureBus | | three-state and open-collector | (48) | SN74BCT979 |
| 74x989 | 1 | 64-bit RAM (64x4), inverting output | | three-state | 16 | MM74C989 |
| 74x990 | 1 | 8-bit D-type transparent read-back latch, non-inverting | | three-state | 20 | SN74ALS990 |
| 74x991 | 1 | 8-bit D-type transparent read-back latch, inverting | | three-state | 20 | SN74ALS991 |
| 74x992 | 1 | 9-bit D-type transparent read-back latch, non-inverting | | three-state | 24 | SN74ALS992 |
| 74x993 | 1 | 9-bit D-type transparent read-back latch, inverting | | three-state | 24 | SN74ALS993 |
| 74x994 | 1 | 10-bit D-type transparent read-back latch, non-inverting | | three-state | 24 | SN74ALS994 |
| 74x995 | 1 | 10-bit D-type transparent read-back latch, inverting | | three-state | 24 | SN74ALS995 |
| 74x996 | 1 | 8-bit D-type edge-triggered read-back latch | | three-state | 24 | SN74ALS996 |
| 74x1000 – 74x1999 Part number | Units | Description | Input | Output | Pins | Datasheet |
| 74x1000 | 4 | quad 2-input NAND gate | | driver | 14 | SN74AS1000A |
| 74x1002 | 4 | quad 2-input NOR gate | | driver | 14 | SN74ALS1002A |
| 74x1003 | 4 | quad 2-input NAND gate | | open-collector driver | 14 | SN74ALS1003A |
| 74x1004 | 6 | hex inverting buffer | | driver | 14 | SN74ALS1004 |
| 74x1005 | 6 | hex inverting buffer | | open-collector driver | 14 | SN74ALS1005 |
| 74x1008 | 4 | quad 2-input AND gate | | driver | 14 | SN74AS1008A |
| 74ALS1010 | 3 | triple 3-input NAND gate | | driver | 14 | SN74ALS1010A |
| 74AC1010, 74ACT1010 | 1 | 16x16-bit multiplier/accumulator | | three-state | 64 | 74AC1010 |
| 74x1011 | 3 | triple 3-input AND gate | | driver | 14 | SN74ALS1011A |
| 74F1016 | 16 | 16-bit Schottky diode R-C bus termination array | | | (20) | SN74F1016 |
| 74AC1016, 74ACT1016 | 1 | 16x16-bit multiplier | | three-state | 64 | 74AC1016 |
| 74x1017 | 1 | 16x16-bit parallel multiplier | | three-state | 64 | 74AC1017 |
| 74x1018 | 18 | 18-bit Schottky diode R-C bus termination array | | | (24) | SN74F1018 |
| 74x1020 | 2 | dual 4-input NAND gate | | driver | 14 | SN74ALS1020A |
| 74x1032 | 4 | quad 2-input OR gate | | driver | 14 | SN74AS1032A |
| 74x1034 | 6 | hex non-inverting buffer | | driver | 14 | SN74ALS1034 |
| 74x1035 | 6 | hex non-inverting buffer | | open-collector driver | 14 | SN74ALS1035 |
| 74x1036 | 4 | quad 2-input NOR gate | | driver | 14 | SN74ALS1036 |
| 74x1050 | 12 | 12-bit Schottky diode bus termination array, clamp to GND | | | 16 | SN74S1050 |
| 74x1051 | 12 | 12-bit Schottky diode bus termination array, clamp to GND/V$_{CC}$ | | | 16 | SN74S1051 |
| 74x1052 | 16 | 16-bit Schottky diode bus termination array, clamp to GND | | | 20 | SN74S1052 |
| 74x1053 | 16 | 16-bit Schottky diode bus termination array, clamp to GND/V$_{CC}$ | | | 20 | SN74S1053 |
| 74x1056 | 8 | 8-bit Schottky diode bus termination array, clamp to GND | | | (16) | SN74F1056 |
| 74x1071 | 10 | 10-bit bus termination array with bus-hold function | | | (14) | SN74ACT1071 |
| 74x1073 | 16 | 16-bit bus termination array with bus-hold function | | | (20) | SN74ACT1073 |
| 74x1074 | 2 | dual D negative edge triggered flip-flop, asynchronous preset and clear | | | 14 | 74FR1074 |
| 74x1181 | 1 | 4-bit arithmetic logic unit | | | 24 | SN74AS1181 |
| 74x1240 | 1 | octal buffer / line driver, inverting (lower-power version of 74x240) | | three-state | 20 | SN74ALS1240 |
| 74x1241 | 1 | octal buffer / line driver, non-inverting (lower-power version of 74x241) | | three-state | 20 | SN74ALS1241 |
| 74x1242 | 1 | quad bus transceiver, inverting (lower-power version of 74x242) | | three-state | 14 | SN74ALS1242 |
| 74x1243 | 1 | quad bus transceiver, non-inverting (lower-power version of 74x243) | | three-state | 14 | SN74ALS1243 |
| 74x1244 | 1 | octal buffer / driver, non-inverting (lower-power version of 74x244) | | three-state | 20 | SN74ALS1244 |
| 74x1245 | 1 | octal bus transceiver (lower-power version of 74x245) | | three-state | 20 | SN74ALS1245A |
| 74x1280 | 1 | 9-bit parity generator/checker with registered outputs | | three-state | 20 | QS74FCT1280 |
| 74x1284 | 1 | parallel printer interface transceiver / buffer (IEEE 1284) | | | 20 | 74HCT1284 |
| 74x1394 | 1 | 2-bit GTLP transceiver with split LV-TTL port | | three-state and open-collector | (16) | SN74GTLP1394 |
| 74x1395 | 2 | Dual 1-bit GTLP transceiver with split LV-TTL port | | three-state and open-collector | (20) | SN74GTLP1395 |
| 74x1403 | 1 | 8-bit bus receiver plus 4-bit bus driver | Schmitt trigger | three-state | (32) | 74LVT1403 |
| 74x1404 | 1 | oscillator driver | Schmitt trigger | | (8) | SN74LVC1404 |
| 74x1604 | 1 | dual 8-bit transparent latch with output multiplexer | | | 28 | 74F1604 |
| 74x1612 | 1 | 18-bit LV-TTL-to-GTLP adjustable-edge-rate universal bus transceiver | | three-state and open-collector | (64) | SN74GTLPH1612 |
| 74ALS1616 | 1 | 16x16-bit multimode multiplier | | three-state | 64 | SN74ALS1616 |
| 74GTLPH1616 | 1 | 17-bit LV-TTL-to-GTLP adjustable-edge-rate universal bus transceiver with buffered clock outputs | | three-state and open-collector | (64) | SN74GTLPH1616 |
| 74x1620 | 1 | octal bus transceiver, inverting | | three-state | 20 | SN74ALS1620 |
| 74x1621 | 1 | octal bus transceiver, non-inverting | | open-collector | 20 | SN74ALS1621 |
| 74x1622 | 1 | octal bus transceiver, inverting | | open-collector | 20 | SN74ALS1622 |
| 74x1623 | 1 | octal bus transceiver, non-inverting | | three-state | 20 | SN74ALS1623 |
| 74x1627 | 1 | 18-bit LV-TTL-to-GTLP adjustable-edge-rate bus transceiver with source synchronous clock outputs | | three-state and open-collector | (64) | SN74GTLPH1627 |
| 74x1631 | 1 | quad bus driver with complementary outputs | | three-state | 16 | SN74ALS1631$^{:3-336}$ |
| 74x1638 | 1 | octal bus transceiver, inverting (lower-power version of 74x638) | | three-state and open-collector | 20 | SN74ALS1638 |
| 74x1639 | 1 | octal bus transceiver, non-inverting (lower-power version of 74x639) | | three-state and open-collector | 20 | SN74ALS1639 |
| 74x1640 | 1 | octal bus transceiver, inverting (lower-power version of 74x640) | | three-state | 20 | SN74ALS1640A |
| 74x1641 | 1 | octal bus transceiver, non-inverting (lower-power version of 74x641) | | open-collector | 20 | SN74ALS641 |
| 74x1642 | 1 | octal bus transceiver, inverting (lower-power version of 74x642) | | open-collector | 20 | SN74ALS642 |
| 74x1643 | 1 | octal bus transceiver, inverting and non-inverting (lower-power version of 74x643) | | three-state | 20 | SN74ALS643 |
| 74x1644 | 1 | octal bus transceiver, inverting and non-inverting (lower-power version of 74x644) | | open-collector | 20 | SN74ALS644 |
| 74ALS1645 | 1 | octal bus transceiver, non-inverting (lower-power version of 74x645) | | three-state | 20 | SN74ALS1645A |
| 74GTLPH1645 | 1 | 16-bit LV-TTL-to-GTLP adjustable-edge-rate bus transceiver | | three-state and open-collector | (56) | SN74GTLPH1645 |
| 74x1650 | 2 | dual 9-bit Futurebus universal storage transceiver with split TTL I/O | | three-state and open-collector | (100) | SN74FB1650 |
| 74x1651 | 2 | 9-bit and 8-bit Futurebus universal storage transceivers with delayed buffered clock with split TTL I/O | | three-state and open-collector | (100) | SN74FB1651 |
| 74x1653 | 2 | 9-bit and 8-bit Futurebus universal storage transceivers with delayed buffered clock with split 3.3V TTL I/O | | three-state and open-collector | (100) | SN74FB1653 |
| 74x1655 | 2 | dual 8-bit GTL universal storage transceivers with live insertion | | three-state and open-collector | (64) | SN74GTL1655 |
| 74x1760 | 1 | 10-bit 4-way latched address multiplexer | | three-state | 64 | 74F1760 |
| 74x1761 | 1 | dRAM and interrupt vector controller | | | 48 | 74F1761 |
| 74x1762 | 1 | dRAM address controller | | | 40 | 74F1762 |
| 74x1763 | 1 | single-port dRAM controller | | | 48 | 74F1763 |
| 74x1764 | 1 | dual-port dRAM controller | | | 48 | 74F1764 |
| 74x1765 | 1 | dual-port dRAM controller with address latch | | | 48 | 74F1765 |
| 74x1766 | 1 | burst mode dRAM controller | | | 48 | 74F1766 |
| 74x1779 | 1 | 8-bit bidirectional binary counter | | three-state | 16 | 74F1779 |
| 74x1801 | 1 | FM, MFM, and DM encoder / decoder, data rates up to 10 MHz | | | 24 | 74LS1801 |
| 74x1802 | 1 | SerDes with ECC and CRC, data rates up to 10 MHz | | three-state | 48 | 74LS1802 |
| 74x1803 | 1 | quad clock driver | | | 14 | MC74F1803 |
| 74x1804 | 6 | hex 2-input NAND | | driver | 20 | DM74AS1804 |
| 74x1805 | 6 | hex 2-input NOR | | driver | 20 | DM74AS1805 |
| 74x1808 | 6 | hex 2-input AND | | driver | 20 | DM74AS1808 |
| 74x1811 | 1 | FM, MFM, and DM encoder / decoder, data rates up to 20 MHz | | | 24 | 74LS1811 |
| 74x1812 | 1 | SerDes with ECC and CRC, data rates up to 30 MHz | | three-state | 48 | 74LS1812 |
| 74x1821 | 1 | 10-bit bus interface flip-flops | | three-state | 24 | SN74AS1821 |
| 74x1823 | 1 | 9-bit bus interface flip-flops with clear | | three-state | 24 | SN74AS1823 |
| 74x1832 | 6 | hex 2-input OR | | driver | 20 | DM74ALS1832 |
| 74x1841 | 1 | 10-bit bus interface transparent latches | | three-state | 24 | SN74AS1841 |
| 74x1843 | 1 | 9-bit bus interface transparent latches with clear | | three-state | 24 | SN74AS1843 |
| 74x2000 – 74x2999 Part number | Units | Description | Input | Output | Pins | Datasheet |
| 74x2000 | 1 | direction discriminator with microprocessor interface | | three-state | 28 | SN74LS2000 |
| 74x2003 | 1 | 8-bit level translator | | | (20) | SN74GTL2003 |
| 74x2006 | 1 | 13-bit GTL to 3.3V TTL level translator | | open-collector | (28) | SN74GTL2006 |
| 74x2007 | 1 | 12-bit GTL to 3.3V TTL level translator | | open-collector | (28) | SN74GTL2007 |
| 74x2010 | 1 | 10-bit level translator | | | (24) | SN74GTL2010 |
| 74x2014 | 1 | 4-bit GTL to TTL transceiver | | three-state and open-collector | (14) | SN74GTL2014 |
| 74x2031 | 1 | 9-bit Futurebus address/data transceiver | | three-state and open-collector | (48) | SN74FB2031 |
| 74x2032 | 1 | 9-bit Futurebus competition transceiver | | three-state and open-collector | (48) | SN74FB2032 |
| 74FB2033 | 1 | 8-bit Futurebus registered transceiver with split TTL I/O | | three-state and open-collector | (52) | SN74FB2033 |
| 74GTLP2033 | 1 | 8-bit GTLP registered transceiver with split LV-TTL I/O | | three-state and open-collector | (48) | SN74GTLP2033 |
| 74x2034 | 1 | 8-bit GTLP adjustable-edge-rate registered transceiver with split LV-TTL I/O | | three-state and open-collector | (48) | SN74GTLP2034 |
| 74x2040 | 1 | 8-bit Futurebus transceiver with split TTL I/O | | three-state and open-collector | (48) | SN74FB2040 |
| 74x2041 | 1 | 7-bit Futurebus transceiver with split TTL I/O | | three-state and open-collector | (52) | SN74FB2041 |
| 74x2107 | 1 | 12-bit GTL to 3.3V TTL level translator | | open-collector | (28) | SN74GTL2107 |
| 74x2125 | 4 | quad bus buffer | | three-state, 25 Ω series resistor | (14) | TC74VCX2125 |
| 74x2140 | 1 | 8k x 18 cache data RAM | | three-state | (52) | SN74ACT2140A |
| 74x2150 | 1 | 512 x 8 cache address comparator | | | 24 | SN74ACT2150A |
| 74ACT2151 | 1 | 1k x 11 cache address comparator | | | 28 | SN74ACT2151 |
| 74FCT2151 | 1 | 8-line to 1-line multiplexer | | 25 Ω series resistor | (16) | CD74FCT2151 |
| 74x2152 | 1 | 2k x 8 cache address comparator | | | 28 | SN74ACT2152A |
| 74ACT2153 | 1 | 1k x 11 cache address comparator | | open-collector | 28 | SN74ACT2153 |
| 74FCT2153 | 2 | dual 4-line to 1-line multiplexer | | 25 Ω series resistor | (16) | CD74FCT2153 |
| 74x2154 | 1 | 2k x 8 cache address comparator | | open-collector | 28 | SN74ACT2154A |
| 74x2155 | 1 | 2k x 8 burst cache address comparator | | three-state | (44) | SN74ACT2155 |
| 74x2156 | 1 | 16k x 4 burst cache address comparator | | three-state | (44) | SN74ACT2156 |
| 74ACT2157 | 1 | 2k x 16 cache address comparator | | three-state | (44) | SN74ACT2157 |
| 74FCT2157 | 4 | quad 2-line to 1-line multiplexer | | 25 Ω series resistor | (16) | CD74FCT2157 |
| 74x2158 | 1 | 8k x 9 cache address comparator | | three-state | (44) | SN74ACT2158 |
| 74x2159 | 1 | 8k x 9 cache address comparator | | three-state | (44) | SN74ACT2159 |
| 74x2160 | 1 | 8k x 4 2-way cache address comparator | | three-state | (32) | SN74ACT2160 |
| 74x2161 | 1 | synchronous presettable 4-bit binary counter, asynchronous clear | | 25 Ω series resistor | 16 | QS74FCT2161T |
| 74ACT2163, 74BCT2163 | 1 | 16k x 5 cache address comparator | | three-state | (32) | SN74ACT2163 |
| 74FCT2163 | 1 | synchronous presettable 4-bit binary counter, synchronous clear | | 25 Ω series resistor | 16 | QS74FCT2163T |
| 74x2164 | 1 | 16k x 5 cache address comparator | | three-state | (32) | SN74ACT2164 |
| 74x2166 | 1 | 16k x 5 cache address comparator with input latches | | three-state | (32) | SN74BCT2166 |
| 74x2191 | 1 | synchronous presettable 4-bit binary up/down counter, common clock | | 25 Ω series resistor | 16 | QS74FCT2191T |
| 74x2193 | 1 | synchronous presettable 4-bit binary counter, separate up/down clocks | | 25 Ω series resistor | 16 | QS74FCT2193T |
| 74x2226 | 2 | dual 64-bit FIFO memories (64x1) | | | (24) | SN74ACT2226 |
| 74x2227 | 2 | dual 64-bit FIFO memories (64x1) | | three-state | (28) | SN74ACT2227 |
| 74x2228 | 2 | dual 256-bit FIFO memories (256x1) | | | (24) | SN74ACT2228 |
| 74x2229 | 2 | dual 256-bit FIFO memories (256x1) | | three-state | (28) | SN74ACT2229 |
| 74x2232 | 1 | 512-bit FIFO memory (64x8) | | three-state | 24 | SN74ALS2232A |
| 74x2233 | 1 | 576-bit FIFO memory (64x9) | | three-state | 28 | SN74ALS2233A |
| 74x2235 | 1 | 18432-bit bidirectional FIFO memory (2x1024x9) | | three-state | (44) | SN74ACT2235 |
| 74x2236 | 1 | 18432-bit bidirectional FIFO memory (2x1024x9) | | three-state | (44) | SN74ACT2236 |
| 74x2238 | 1 | 576-bit bidirectional FIFO memory (2x32x9) | | three-state | 40 | SN74ALS2238 |
| 74x2240 | 2 | dual 4-bit bidirectional buffer / line driver, inverting | | three-state, 25 Ω series resistor | 20 | SN74BCT2240 |
| 74x2241 | 2 | dual 4-bit bidirectional buffer / line driver, non-inverting | | three-state, 25 Ω series resistor | 20 | SN74BCT2241 |
| 74x2242 | 1 | 4-bit bus transceiver, inverting | | three-state, 25 Ω series resistor | 14 | SN74ALS2242 |
| 74x2243 | 1 | 4-bit bus transceiver, non-inverting | | three-state, 25 Ω series resistor | (14) | 74F2243 |
| 74x2244 | 2 | dual 4-bit buffer / line driver, non-inverting | | three-state, 25 Ω series resistor | 20 | SN74BCT2244 |
| 74x2245 | 1 | octal bus transceiver | | three-state, 25 Ω series resistor | 20 | SN74ABT2245 |
| 74x2253 | 2 | dual 4-line to 1-line multiplexer | | three-state, 25 Ω series resistor | (16) | CD74FCT2253 |
| 74x2257 | 4 | quad 2-line to 1-line multiplexer | | three-state, 25 Ω series resistor | (16) | CD74FCT2257 |
| 74x2273 | 8 | octal D-type flip-flop with common clock and reset | | 25 Ω series resistor | (20) | CD74FCT2273 |
| 74x2299 | 1 | 8-bit universal shift register | | three-state, 25 Ω series resistor | 20 | QS74FCT2299T |
| 74x2323 | 2 | dual line receiver | analog | | (8) | SN74LS2323 |
| 74x2373 | 1 | 8-bit transparent latch | | three-state, 25 Ω series resistor | (20) | CD74FCT2373 |
| 74x2374 | 8 | octal D-type flip-flop with common clock | | three-state, 25 Ω series resistor | (20) | CD74FCT2374 |
| 74x2377 | 1 | 8-bit register with clock enable | | 25 Ω series resistor | 20 | QS74FCT2377T |
| 74x2400 | 2 | dual 4-bit buffer, inverting | Schmitt trigger | three-state | 20 | 74THC2400 |
| 74x2410 | 1 | 11-bit MOS memory driver, non-inverting | | three-state, 25 Ω series resistor | 28 | SN74BCT2410 |
| 74x2411 | 1 | 11-bit MOS memory driver, inverting | | three-state, 25 Ω series resistor | 28 | SN74BCT2411 |
| 74x2414 | 2 | dual 2-to-4 line decoder with supply voltage monitor | | | 20 | SN74BCT2414 |
| 74x2420 | 1 | 16-bit NuBus address/data transceiver and register | | three-state | (68) | SN74BCT2420 |
| 74x2423 | 1 | 16-bit latched multiplexer/demultiplexer NuBus transceiver, inverting | | three-state | (68) | SN74BCT2423 |
| 74x2424 | 1 | 16-bit latched multiplexer/demultiplexer NuBus transceiver, non-inverting | | three-state | (68) | SN74BCT2424 |
| 74x2425 | 1 | Macintosh Coprocessor Platform NuBus address/data registered transceiver | | three-state | (100) | SN74BCT2425 |
| 74x2440 | 1 | NuBus interface controller | | | (68) | SN74ACT2440 |
| 74x2441 | 1 | NuBus interface controller | | | (100) | SN74ACT2441 |
| 74x2442 | 1 | NuBus block slave address generator | | three-state | (20) | SN74ALS2442 |
| 74x2509 | 1 | 9-output clock driver with PLL | | three-state | (24) | HD74CDC2509 |
| 74x2510 | 1 | 10-output clock driver with PLL | | three-state | (24) | HD74CDC2510 |
| 74x2525 | 1 | 8-output clock driver | | | 14 | 74AC2525 |
| 74x2526 | 1 | 8-output clock driver with input multiplexer | | | 16 | 74AC2526 |
| 74x2533 | 1 | 8-bit bus interface latch, inverting | | three-state, 25 Ω series resistor | 20 | QS74FCT2533T |
| 74x2534 | 1 | 8-bit bus interface register, inverting | | three-state, 25 Ω series resistor | 20 | QS74FCT2534T |
| 74x2540 | 1 | 8-bit buffer / line driver, inverting | | three-state, 25 Ω series resistor | 20 | SN74ALS2540 |
| 74x2541 | 1 | 8-bit buffer / line driver, non-inverting | | three-state, 25 Ω series resistor | 20 | SN74ALS2541 |
| 74x2543 | 1 | 8-bit latched transceiver, non-inverting | | three-state, 25 Ω series resistor | 24 | QS74FCT2543T |
| 74x2544 | 1 | 8-bit latched transceiver, inverting | | three-state, 25 Ω series resistor | 24 | QS74FCT2544T |
| 74x2573 | 1 | 8-bit transparent latch | | three-state, 25 Ω series resistor | 20 | QS74FCT2573T |
| 74x2574 | 8 | octal D-type flip-flop with common clock | | three-state, 25 Ω series resistor | 20 | QS74FCT2574T |
| 74x2620 | 1 | octal bus transceiver / MOS driver, inverting | | three-state, 25 Ω series resistor | 20 | SN74AS2620 |
| 74x2623 | 1 | octal bus transceiver / MOS driver, non-inverting | | three-state, 25 Ω series resistor | 20 | SN74AS2623 |
| 74x2640 | 1 | octal bus transceiver / MOS driver, inverting | | three-state, 25 Ω series resistor | 20 | SN74AS2640 |
| 74x2643 | 1 | octal bus transceiver, mix of inverting and non-inverting outputs | | three-state, 25 Ω series resistor | 20 | 74F2643 |
| 74x2645 | 1 | octal bus transceiver / MOS driver, non-inverting | | three-state, 25 Ω series resistor | 20 | SN74AS2645 |
| 74x2646 | 1 | octal registered transceiver, non-inverting | | three-state, 25 Ω series resistor | 24 | QS74FCT2646T |
| 74x2648 | 1 | octal registered transceiver, inverting | | three-state, 25 Ω series resistor | 24 | QS74FCT2648T |
| 74x2651 | 1 | octal registered transceiver, inverting | | three-state, 25 Ω series resistor | 24 | QS74FCT2651T |
| 74x2652 | 1 | octal registered transceiver, non-inverting | | three-state, 25 Ω series resistor | 24 | QS74FCT2652T |
| 74S2708 | 1 | 8192-bit PROM (1024x8) | | three-state | 24 | SN74S2708 |
| 74AC2708 | 1 | 576-bit FIFO memory (64x9) | | three-state | 28 | 74AC2708 |
| 74x2725 | 1 | 4608-bit FIFO memory (512x9) | | | 28 | 74ACT2725 |
| 74x2726 | 1 | 4608-bit bidirectional FIFO memory (512x9) | | | 28 | 74ACT2726 |
| 74x2821 | 1 | 10-bit D-type flip-flop | | three-state, 25 Ω series resistor | 24 | QS74FCT2821T |
| 74x2823 | 1 | 9-bit D-type flip-flop with clear | | three-state, 25 Ω series resistor | 24 | QS74FCT2823T |
| 74x2825 | 1 | 8-bit D-type flip-flop with clear and clock enable | | three-state, 25 Ω series resistor | 24 | QS74FCT2825T |
| 74x2827 | 1 | 10-bit buffer, non-inverting | | three-state, 25 Ω series resistor | 24 | SN74BCT2827A |
| 74x2828 | 1 | 10-bit buffer, inverting | | three-state, 25 Ω series resistor | 24 | SN74BCT2828A |
| 74x2833 | 1 | 8-bit bus transceiver with parity error flip-flop | | three-state, 25 Ω series resistor | 24 | QS74FCT2833T |
| 74x2841 | 1 | 10-bit transparent latch | | three-state, 25 Ω series resistor | 24 | QS74FCT2841T |
| 74x2843 | 1 | 9-bit transparent latch with asynchronous reset | | three-state, 25 Ω series resistor | 24 | QS74FCT2843T |
| 74x2845 | 1 | 8-bit transparent latch with asynchronous reset and multiple output enable | | three-state, 25 Ω series resistor | 24 | QS74FCT2845T |
| 74x2853 | 1 | 8-bit bus transceiver with parity error latch | | three-state, 25 Ω series resistor | 24 | QS74FCT2853T |
| 74x2861 | 1 | 10-bit non-inverting bus transceiver | | three-state, 25 Ω series resistor | 24 | QS74FCT2861T |
| 74x2862 | 1 | 10-bit inverting bus transceiver | | three-state, 25 Ω series resistor | 24 | QS74FCT2862T |
| 74x2863 | 1 | 9-bit non-inverting bus transceiver with dual output enable | | three-state, 25 Ω series resistor | 24 | QS74FCT2863T |
| 74x2864 | 1 | 9-bit inverting bus transceiver with dual output enable | | three-state, 25 Ω series resistor | 24 | QS74FCT2864T |
| 74x2952 | 1 | octal bus transceiver and register, non-inverting | | three-state | 24 | SN74LVC2952A |
| 74x2953 | 1 | octal bus transceiver and register, inverting | | three-state | 24 | 74F2953 |
| 74x2960 | 1 | error detection and correction (EDAC), equivalent to Am2960 | | three-state | 48 | MC74F2960 |
| 74x2961 | 1 | 4-bit EDAC bus buffer, inverting, equivalent to Am2961 | | three-state | 24 | MC74F2961A |
| 74x2962 | 1 | 4-bit EDAC bus buffer, non-inverting, equivalent to Am2962 | | three-state | 24 | MC74F2962A |
| 74x2967 | 1 | controller/driver for 16k/64k/256k dRAM | | | 48 | SN74ALS2967 |
| 74x2968 | 1 | controller/driver for 16k/64k/256k dRAM | | | 48 | SN74ALS2968 |
| 74x2969 | 1 | memory timing controller for use with EDAC | | | 48 | MC74F2969 |
| 74x2970 | 1 | memory timing controller for use without EDAC | | | 24 | MC74F2970 |
| 74x3000 – 74x3999 Part number | Units | Description | Input | Output | Pins | Datasheet |
| 74x3004 | 1 | selectable GTL voltage reference | | analog | (6) | SN74GTL3004 |
| 74x3037 | 4 | quad 2-input NAND gate | | driver 30 Ω | 16 | 74F3037 |
| 74x3038 | 4 | quad 2-input NAND gate | | open-collector driver 30 Ω | 16 | 74F3038 |
| 74x3040 | 2 | dual 4-input NAND gate | | driver 30 Ω | 16 | 74F3040 |
| 74x3125 | 4 | quad FET bus switch, output enable active low | | | (14) | SN74CBT3125 |
| 74x3126 | 4 | quad FET bus switch, output enable active high | | | (14) | SN74CBT3126 |
| 74FCT3244 | 2 | dual 4-bit buffer / line driver | | three-state | 20 | IDT74FCT3244 |
| 74CBT3244, 74FST3244 | 2 | dual 4-bit FET bus switch | | | 20 | SN74CBT3244 IDT74FST3244 |
| 74FCT3245 | 1 | octal bidirectional transceiver | | three-state | 20 | IDT74FCT3245 |
| 74CBT3245, 74FST3245 | 1 | octal FET bus switch | | | 20 | SN74CBT3245A IDT74FST3245 |
| 74LVX3245 | 1 | octal bidirectional voltage-translating transceiver | | three-state | (24) | 74LVX3245 |
| 74GTLPH3245 | 1 | 32-bit LV-TTL-to-GTLP adjustable-edge-rate bus transceiver | | three-state and open-collector | (114) | SN74GTLPH3245 |
| 74x3251 | 1 | 8-line to 1-line FET multiplexer / demultiplexer | | | (16) | SN74CBT3251 |
| 74x3253 | 2 | dual 4-line to 1-line FET multiplexer / demultiplexer | | | (16) | SN74CBT3253 |
| 74x3257 | 4 | quad 2-line to 1-line FET multiplexer / demultiplexer | | | (16) | IDT74FST3257 |
| 74x3283 | 1 | 32-bit latchable transceiver with parity checker / generator | | three-state | (120) | 74ACTQ3283 |
| 74x3284 | 1 | 18-bit synchronous datapath multiplexer | | three-state | (100) | 74ABT3284 |
| 74x3305 | 2 | dual FET bus switch with extended voltage range | | | (8) | SN74CBT3305C |
| 74x3306 | 2 | dual FET bus switch | | | (8) | SN74CBT3306 |
| 74x3345 | 1 | octal FET bus switch, dual output enable | | | (20) | SN74CBT3345 |
| 74x3374 | 1 | 8-bit metastable-resistant D-type flip-flop | | three-state | 20 | SN74AS3374 |
| 74x3383 | 1 | 5-bit 4-port FET bus exchange switch | | | 24 | IDT74FST3383 |
| 74x3384 | 2 | dual 5-bit FET bus switch | | | 24 | IDT74FST3384 |
| 74x3386 | 1 | 5-bit 4-port FET bus exchange switch with extended voltage range | | | (24) | SN74CBT3386 |
| 74x3390 | 1 | octal 2-line to 1-line FET multiplexer / bus switch | | | (28) | IDT74FST3390 |
| 74x3573 | 1 | octal transparent latch | | three-state | 20 | IDT74FCT3573 |
| 74x3574 | 1 | octal D-type flip flop | | three-state | 20 | IDT74FCT3574 |
| 74x3584 | 2 | dual 5-bit FET bus switch | | 25 Ω series resistor | 24 | QS74QST3584 |
| 74x3611 | 1 | 2304-bit FIFO memory (64x36) | | three-state | (120) | SN74ABT3611 |
| 74x3612 | 1 | 4608-bit bidirectional FIFO memory (2x64x36) | | three-state | (120) | SN74ABT3612 |
| 74x3613 | 1 | 2304-bit FIFO memory (64x36) | | three-state | (120) | SN74ABT3613 |
| 74x3614 | 1 | 4608-bit bidirectional FIFO memory (2x64x36) | | three-state | (120) | SN74ABT3614 |
| 74x3622 | 1 | 18432-bit bidirectional FIFO memory (2x256x36) | | three-state | (120) | SN74ACT3622 |
| 74x3631 | 1 | 18432-bit FIFO memory (512x36) | | three-state | (120) | SN74ACT3631 |
| 74x3632 | 1 | 36864-bit bidirectional FIFO memory (2x512x36) | | three-state | (120) | SN74ACT3632 |
| 74x3638 | 1 | 32768-bit bidirectional FIFO memory (2x512x32) | | three-state | (120) | SN74ACT3638 |
| 74x3641 | 1 | 36864-bit FIFO memory (1024x36) | | three-state | (120) | SN74ACT3641 |
| 74x3642 | 1 | 73728-bit bidirectional FIFO memory (2x1024x36) | | three-state | (120) | SN74ACT3642 |
| 74x3651 | 1 | 73728-bit FIFO memory (2048x36) | | three-state | (120) | SN74ACT3651 |
| 74x3708 | 1 | 8192-bit PROM (1024x8) | | open-collector | 24 | SN74S3708 |
| 74x3807 | 1 | 1-to-10 clock driver | | driver | 20 | IDT74FCT3807 |
| 74x3827 | 1 | 10-bit buffer | | three-state | 24 | IDT74FCT3827 |
| 74x3861 | 1 | 10-bit FET bus switch | | | (24) | SN74CBT3861 |
| 74x3862 | 1 | 10-bit FET bus switch with dual output enable | | | (24) | IDT74CBTLV3862 |
| 74x3893 | 1 | quad Futurebus backplane transceiver | | three-state and open-collector | (20) | MC74F3893A |
| 74x3907 | 1 | Pentium clock synthesizer | | three-state | (28) | IDT74FCT3907 |
| 74x3932 | 1 | PLL-based clock driver | | three-state | (48) | IDT74FCT3932 |
| 74x4000 – 74x5999 Part number | Units | Description | Input | Output | Pins | Datasheet |
| 74x4002 | 2 | dual 4-input NOR gate | | | 14 | CD74HC4002 |
| 74x4015 | 2 | dual 4-bit shift registers | | | 16 | CD74HC4015 |
| 74x4016 | 4 | quad bilateral switch | | analog | 14 | CD74HC4016 |
| 74x4017 | 1 | 5-stage ÷10 Johnson counter | | | 16 | CD74HC4017 |
| 74x4020 | 1 | 14-stage binary counter | | | 16 | SN74HC4020 |
| 74x4022 | 1 | 4-stage ÷8 Johnson counter | | | 14 | SN74HC4022 |
| 74x4024 | 1 | 7-stage ripple carry binary counter | | | 14 | CD74HC4024 |
| 74x4028 | 1 | BCD to decimal decoder | | | 16 | TC74HC4028P |
| 74x4040 | 1 | 12-stage binary ripple counter | | | 16 | SN74HC4040 |
| 74x4046 | 1 | phase-locked loop and voltage-controlled oscillator | | | 16 | CD74HC4046A |
| 74x4049 | 6 | hex inverting buffer | | | 16 | CD74HC4049 |
| 74x4050 | 6 | hex buffer/converter (non-inverting) | | | 16 | CD74HC4050 |
| 74x4051 | 1 | high-speed 8-channel analog multiplexer/demultiplexer | | analog | 16 | CD74HC4051 |
| 74x4052 | 2 | dual 4-channel analog multiplexer/demultiplexers | | analog | 16 | CD74HC4052 |
| 74x4053 | 3 | triple 2-channel analog multiplexer/demultiplexers | | analog | 16 | CD74HC4053 |
| 74x4059 | 1 | programmable divide-by-N counter | | | 24 | CD74HC4059 |
| 74x4060 | 1 | 14-stage binary ripple counter with oscillator | | | 16 | SN74HC4060 |
| 74x4061 | 1 | 14-stage asynchronous binary counter with oscillator | | | 16 | SN74HC4061 |
| 74x4066 | 4 | quad single-pole single-throw analog switch | | | 14 | SN74HC4066 |
| 74x4067 | 1 | 16-channel analog multiplexer/demultiplexer | | analog | 24 | CD74HC4067 |
| 74x4072 | 2 | dual 4-input OR gate | | | 14 | TC74HC4072 |
| 74x4075 | 3 | triple 3-input OR gate | | | 14 | CD74HC4075 |
| 74x4078 | 1 | single 8-input OR/NOR gate | | | 14 | MM74HC4078 |
| 74x4094 | 1 | 8-bit three-state shift register/latch | | three-state | 16 | CD74HC4094 |
| 74x4102 | 1 | 2-digit BCD presettable synchronous down counter | | | 16 | 74HC4102 |
| 74x4103 | 1 | 8-bit binary presettable synchronous down counter | | | 16 | 74HC4103 |
| 74x4245 | 1 | 8-bit 3V/5V translating transceiver | | three-state | (24) | 74LVX4245 |
| 74x4301 | 1 | 8-bit latch, inverting | | three-state | 20 | MN74HC4301 |
| 74x4302 | 1 | 8-bit latch, non-inverting | | three-state | 20 | MN74HC4302 |
| 74x4303 | 1 | 8-bit D-type flip-flop, inverting outputs | | three-state | 20 | MN74HC4303 |
| 74x4304 | 1 | 8-bit D-type flip-flop, non-inverting outputs | | three-state | 20 | MN74HC4304 |
| 74x4305 | 2 | dual 4-bit buffer, inverting | | three-state | 20 | MN74HC4305 |
| 74x4306 | 2 | dual 4-bit buffer, non-inverting | | three-state | 20 | MN74HC4306 |
| 74x4316 | 4 | quad analog switch | | analog | 14 | MM74HC4316 |
| 74x4351 | 1 | 8-channel analog multiplexer/demultiplexer with latch | | analog | 20 | CD74HC4351 |
| 74x4352 | 2 | dual 4-channel analog multiplexer/demultiplexer with latch | | analog | 20 | CD74HC4352 |
| 74x4353 | 3 | triple 2-channel analog multiplexer/demultiplexer with latch | | analog | 20 | MC74HC4353 |
| 74x4374 | 1 | 8-bit dual-rank synchronizer | | three-state | 20 | SN74AS4374 |
| 74x4503 | 1 | controller for 64k/256k/1M dynamic RAM | | three-state | 52 | SN74ACT4503 |
| 74x4510 | 1 | BCD decade up/down counter | | | 16 | CD74HC4510 |
| 74x4511 | 1 | BCD to 7-segment decoder | | | 16 | CD74HC4511 |
| 74x4514 | 1 | 4-to-16 line decoder/demultiplexer, input latches | | | 24 | CD74HC4514 |
| 74x4515 | 1 | 4-to-16 line decoder/demultiplexer with input latches; inverting | | | 24 | CD74HC4515 |
| 74x4516 | 1 | 4-bit binary up/down counter | | | 16 | CD74HC4516 |
| 74x4518 | 2 | dual 4-bit synchronous decade counter | | | 16 | CD74HC4518 |
| 74x4520 | 2 | dual 4-bit synchronous binary counter | | | 16 | CD74HC4520 |
| 74x4538 | 2 | dual retriggerable precision monostable multivibrator | | | 16 | CD74HC4538 |
| 74x4543 | 1 | BCD to 7-segment latch/decoder/driver for LCDs | | | 16 | CD74HC4543 |
| 74x4560 | 1 | 4-bit BCD adder | | | 16 | MM74HC4560 |
| 74x4724 | 1 | 8-bit addressable latch | | | 16 | SN74HC4724 |
| 74x4764 | 1 | programmable dRAM controller | | | (100) | 74ABT4764 |
| 74x4799 | 1 | Timer for NiCd and NiMH chargers | Schmitt trigger | open-collector and three-state | 16 | 74LV4799 |
| 74x4851 | 1 | 8-channel analog multiplexer/demultiplexer | | analog | 16 | SN74HC4851 |
| 74x4852 | 2 | dual 4-channel analog multiplexer/demultiplexer | | analog | 16 | SN74HC4852 |
| 74x5074 | 2 | dual positive edge-triggered D-type flip-flop (metastable immune) | | | 14 | 74ABT5074 |
| 74x5245 | 1 | octal bidirectional transceiver | Schmitt trigger | three-state | 20 | DM74ALS5245 |
| 74x5300 | 1 | fiber optic LED driver | | driver 120 mA | 8 | 74F5300 |
| 74x5302 | 2 | dual fiber optic LED / clock driver | | driver 160 mA | 14 | 74F5302 |
| 74x5400 | 1 | 11-bit line/memory driver, non-inverting | | three-state, 25 Ω series resistor | 28 | SN74ABT5400 |
| 74x5401 | 1 | 11-bit line/memory driver, inverting | | three-state, 25 Ω series resistor | 28 | SN74ABT5401 |
| 74x5402 | 1 | 12-bit line/memory driver, non-inverting | | three-state, 25 Ω series resistor | 28 | SN74ABT5402 |
| 74x5403 | 1 | 12-bit line/memory driver, inverting | | three-state, 25 Ω series resistor | 28 | SN74ABT5403 |
| 74x5555 | 1 | programmable delay timer with oscillator | | | 16 | 74HC5555 |
| 74x5620 | 1 | octal bidirectional transceiver | Schmitt trigger | three-state | 20 | DM74ALS5620 |
| 74x6000 and above Part number | Units | Description | Input | Output | Pins | Datasheet |
| 74x6000 | 1 | logic-to-logic optocoupler, non-inverting | | | 6 | 74OL6000 |
| 74x6001 | 1 | logic-to-logic optocoupler, inverting | | | 6 | 74OL6001 |
| 74x6010 | 1 | logic-to-logic optocoupler, non-inverting | | open-collector 15 V | 6 | 74OL6010 |
| 74x6011 | 1 | logic-to-logic optocoupler, inverting | | open-collector 15 V | 6 | 74OL6011 |
| 74x6300 | 1 | programmable dynamic memory refresh timer | | | 16 | SN74ALS6300 |
| 74x6301 | 1 | dynamic memory refresh controller, transparent and burst modes, for 16K, 64K, 256K, and 1M dRAM | | | 52 | SN74ALS6301 |
| 74x6302 | 1 | dynamic memory refresh controller, transparent and burst modes, for 16K, 64K, 256K, and 1M dRAM | | | 52 | SN74ALS6302 |
| 74x6310 | 1 | static column and page mode access detector for dRAM | | | 20 | SN74ALS6310A |
| 74x6311 | 1 | static column and page mode access detector for dRAM | | | 20 | SN74ALS6311A |
| 74x6323 | 1 | programmable ripple counter with oscillator | | three-state | (8) | 74HC6323A |
| 74x6364 | 1 | 64-bit flow-through error detection and correction circuit | | three-state | (207) | SN74AS6364 |
| 74x6800 | 1 | 10-bit FET bus switch with precharge | | | 24 | IDT74FST6800 |
| 74x6845 | 1 | 8-bit FET bus switch with precharge and extended voltage range | | | (20) | SN74CBT6845C |
| 74x7001 | 4 | quad 2-input AND gate | Schmitt trigger | | 14 | SN74HC7001 |
| 74x7002 | 4 | quad 2-input NOR gate | Schmitt trigger | | 14 | SN74HC7002 |
| 74x7003 | 4 | quad 2-input NAND gate | Schmitt trigger | open-collector | 14 | SN74HC7003 |
| 74x7006 | 6 | two inverters, one 3-input NAND, one 4-input NAND, one 3-input NOR, one 4-input NOR | | | 24 | SN74HC7006 |
| 74x7007 | 6 | hex buffer gate | | | 14 | TC74HCT7007AP |
| 74x7008 | 6 | two inverters, three 2-input NAND, three 2-input NOR | | | 24 | SN74HC7008 |
| 74x7014 | 6 | hex buffer gate | Schmitt trigger | | 14 | 74HC7014 |
| 74x7022 | 1 | 4-stage ÷8 Johnson counter with power-up clear | | | 14 | SN74HC7022 |
| 74x7030 | 1 | 576-bit FIFO memory (64x9) | | three-state | 28 | 74HC7030 |
| 74x7032 | 4 | quad 2-input OR gates | Schmitt trigger | | 14 | SN74HC7032 |
| 74x7038 | 1 | 9-bit bus transceiver with latch | | three-state | 24 | CD74HC7038 |
| 74x7046 | 1 | phase-locked loop with voltage-controlled oscillator and lock detector | | | 16 | CD74HC7046A |
| 74x7060 | 1 | 14-stage binary counter with oscillator | Schmitt trigger | | 20 | CD74AC7060 |
| 74x7074 | 6 | two inverters, one 2-input NAND, one 2-input NOR, two D-type flip-flops | | | 24 | SN74HC7074 |
| 74x7075 | 6 | two inverters, two 2-input NAND, two D-type flip-flops | | | 24 | SN74HC7075 |
| 74x7076 | 6 | two inverters, two 2-input NOR, two D-type flip-flops | | | 24 | SN74HC7076 |
| 74x7080 | 1 | 16-bit parity generator / checker | | | 20 | 74HCT7080 |
| 74x7132 | 4 | quad adjustable comparator with output latches | Schmitt trigger | three-state | 14 | 74HCT7132 |
| 74x7200 | 1 | 2304-bit FIFO memory (256x9) | | | 28 | SN74ACT7200L |
| 74x7201 | 1 | 4608-bit FIFO memory (512x9) | | | 28 | SN74ACT7201LA |
| 74x7202 | 1 | 9216-bit FIFO memory (1024x9) | | | 28 | SN74ACT7202LA |
| 74x7203 | 1 | 18432-bit FIFO memory (2048x9) | | | 28 | SN74ACT7203L |
| 74ACT7204 | 1 | 36864-bit FIFO memory (4096x9) | | | 28 | SN74ACT7204L |
| 74HCU7204 | 2 | dual unbuffered inverters | | | (8) | SN74HCU7204 |
| 74x7205 | 1 | 73728-bit FIFO memory (8192x9) | | | 28 | SN74ACT7205L |
| 74x7206 | 1 | 147456-bit FIFO memory (16384x9) | | | 28 | SN74ACT7206L |
| 74x7240 | 1 | octal bus buffer, inverting | Schmitt trigger | three-state | 20 | TC74HC7240AP |
| 74x7241 | 1 | octal bus buffer, non-inverting | Schmitt trigger | three-state | 20 | TC74HC7241AP |
| 74x7244 | 1 | octal bus buffer, non-inverting | Schmitt trigger | three-state | 20 | TC74HC7244AP |
| 74x7245 | 1 | octal bus transceiver, non-inverting | Schmitt trigger | three-state | 20 | M74HC7245 |
| 74x7266 | 4 | quad 2-input XNOR gate | | | 14 | SN74HC7266 |
| 74x7273 | 8 | octal positive edge-triggered D-type flip-flop with reset | | open-collector | 20 | 74HCT7273 |
| 74x7292 | 1 | programmable divider/timer | | | 16 | TC74HC7292AP |
| 74x7294 | 1 | programmable divider/timer | | | 16 | M74HC7294 |
| 74x7340 | 1 | 8-bit bus driver with bidirectional registers | | three-state | 24 | SN74HC7340 |
| 74x7403 | 1 | 256-bit FIFO memory (64x4) | | three-state | 16 | 74HC7403 |
| 74x7404 | 1 | 320-bit FIFO memory (64x5) | | three-state | 18 | 74HC7404 |
| 74x7540 | 8 | octal buffer/line driver, inverting | Schmitt trigger | three-state | 20 | 74HC7540 |
| 74x7541 | 8 | octal buffer/line driver, non-inverting | Schmitt trigger | three-state | 20 | 74HC7541 |
| 74x7597 | 1 | 8-bit shift register with input latches | | | 16 | 74HC7597 |
| 74x7623 | 1 | octal bus transceiver, non-inverting | | three-state and open-drain | 20 | CD74AC7623 |
| 74x7640 | 1 | octal bus transceiver, inverting | Schmitt trigger | three-state | 20 | M74HC7640 |
| 74x7643 | 1 | octal bus transceiver, non-inverting/inverting | Schmitt trigger | three-state | 20 | M74HC7643 |
| 74x7645 | 1 | octal bus transceiver, non-inverting | Schmitt trigger | three-state | 20 | M74HC7645 |
| 74x7731 | 4 | quad 64-bit static shift register | | | 16 | 74HC7731 |
| 74x7793 | 1 | 8-bit noninverting transparent latch with readback | | three-state | 20 | MC74HC7793 |
| 74x7801 | 1 | 18432-bit FIFO memory (1024x18), clocked | | three-state | (68) | SN74ACT7801 |
| 74x7802 | 1 | 18432-bit FIFO memory (1024x18) | | three-state | (68) | SN74ACT7802 |
| 74x7803 | 1 | 9216-bit FIFO memory (512x18), clocked | | three-state | (56) | SN74ACT7803 |
| 74x7804 | 1 | 9216-bit FIFO memory (512x18) | | three-state | (56) | SN74ACT7804 |
| 74x7805 | 1 | 4608-bit FIFO memory (256x18), clocked | | three-state | (56) | SN74ACT7805 |
| 74x7806 | 1 | 4608-bit FIFO memory (256x18) | | three-state | (56) | SN74ACT7806 |
| 74x7807 | 1 | 18432-bit FIFO memory (2048x9), clocked | | three-state | (44) | SN74ACT7807 |
| 74x7808 | 1 | 18432-bit FIFO memory (2048x9) | | three-state | (44) | SN74ACT7808 |
| 74x7811 | 1 | 18432-bit FIFO memory (1024x18), clocked | | three-state | (68) | SN74ACT7811 |
| 74x7813 | 1 | 1152-bit FIFO memory (64x18), clocked | | three-state | (56) | SN74ACT7813 |
| 74x7814 | 1 | 1152-bit FIFO memory (64x18) | | three-state | (56) | SN74ACT7814 |
| 74x7815 | 1 | 4608-bit bidirectional FIFO memory(2x64x36) | | three-state | (120) | SN74ABT7815 |
| 74x7816 | 1 | 4608-bit bidirectional FIFO memory(2x64x36) | | three-state | (120) | SN74ABT7816 |
| 74x7817 | 1 | 2304-bit FIFO memory(64x36) | | three-state | (120) | SN74ABT7817 |
| 74x7818 | 1 | 2304-bit FIFO memory(64x36) | | three-state | (120) | SN74ABT7818 |
| 74x7819 | 1 | 18432-bit bidirectional FIFO memory (2x512x18), clocked | | three-state | (80) | SN74ABT7819 |
| 74x7820 | 1 | 18432-bit bidirectional FIFO memory (2x512x18) | | three-state | (80) | SN74ABT7820 |
| 74x7821 | 1 | 32768-bit bidirectional FIFO memory (2x512x32) | | three-state | (120) | SN74ACT7821 |
| 74x7822 | 1 | 32768-bit bidirectional FIFO memory (2x512x32), clocked | | three-state | (120) | SN74ACT7822 |
| 74x7823 | 1 | 36864-bit FIFO memory (1024x36), clocked | | three-state | (120) | SN74ACT7823 |
| 74x7881 | 1 | 18432-bit FIFO memory (1024x18), clocked | | three-state | (68) | SN74ACT7881 |
| 74x7882 | 1 | 36864-bit FIFO memory (2048x18), clocked | | three-state | (68) | SN74ACT7882 |
| 74x7884 | 1 | 73728-bit FIFO memory (4096x18), clocked | | three-state | (68) | SN74ACT7884 |
| 74x8003 | 2 | dual 2-input NAND gate | | | 8 | SN74ALS8003 |
| 74x8151 | 1 | 10-bit inverting/non-inverting buffer | Schmitt trigger | three-state | 24 | SN74LV8151 |
| 74x8153 | 1 | 8-bit serial-to-parallel interface | | three-state or open-collector | 20 | SN74LV8153 |
| 74x8154 | 2 | dual 16-bit counters with output registers | | three-state | 20 | SN74LV8154 |
| 74x8161 | 1 | 8-bit synchronous binary counter | | | 24 | SN74ALS8161 |
| 74x8240 | 1 | octal inverting buffer with JTAG port | | three-state | 24 | SN74BCT8240A |
| 74x8244 | 1 | octal non-inverting buffer with JTAG port | | three-state | 24 | SN74BCT8244A |
| 74x8245 | 1 | octal bus transceiver with JTAG port | | three-state | 24 | SN74ABT8245 |
| 74x8373 | 1 | octal D-type latch with JTAG port | | three-state | 24 | SN74BCT8373A |
| 74x8374 | 1 | octal D-type edge-triggered flip-flop with JTAG port | | three-state | 24 | SN74BCT8374A |
| 74x8400 | 1 | expandable error checker / corrector | | three-state | 48 | SN74ALS8400 |
| 74x8541 | 1 | 8-bit buffer, selectable inverting/non-inverting | Schmitt trigger | three-state | 20 | SN74AHC8541 |
| 74x8543 | 1 | octal registered bus transceiver with JTAG port | | three-state | 28 | SN74ABT8543 |
| 74x8646 | 1 | octal bus transceiver and register with JTAG port | | three-state | 28 | SN74ABT8646 |
| 74x8652 | 1 | octal bus transceiver and register with JTAG port | | three-state | 28 | SN74ABT8652 |
| 74x8818 | 1 | 16-bit microprogram sequencer, cascadable | | three-state | (84) | SN74ACT8818 |
| 74x8832 | 1 | 32-bit registered ALU | | three-state | (208) | SN74ACT8832 |
| 74x8834 | 1 | 40-bit register file | | three-state | (156) | SN74AS8834 |
| 74x8835 | 1 | 16-bit microprogram sequencer, cascadable | | three-state | (156) | SN74AS8835 |
| 74x8836 | 1 | 32x32-bit multiplier/accumulator | | three-state | (156) | SN74ACT8836 |
| 74x8837 | 1 | 64-bit floating point unit | | three-state | (208) | SN74ACT8837 |
| 74x8838 | 1 | 64-bit barrel shifter | | three-state | (84) | SN74AS8838 |
| 74x8839 | 1 | 32-bit shuffle/exchange network | | three-state | (85) | SN74AS8839 |
| 74x8840 | 1 | digital crossbar switch | | three-state | (156) | SN74AS8840 |
| 74x8841 | 1 | digital crossbar switch | | three-state | (156) | SN74ACT8841 |
| 74x8847 | 1 | 64-bit floating point and integer unit | | three-state | (208) | SN74ACT8847 |
| 74x8867 | 1 | 32-bit vector processor unit | | three-state | (208) | SN74ACT8867 |
| 74x8952 | 1 | octal registered bus transceiver with JTAG port | | three-state | 28 | SN74ABT8952 |
| 74x8960 | 1 | 8-bit bidirectional latched FutureBus transceiver, inverting | | three-state and open-collector | 28 | 74F8960 |
| 74x8961 | 1 | 8-bit bidirectional latched FutureBus transceiver, non-inverting | | three-state and open-collector | 28 | 74F8961 |
| 74x8962 | 1 | 9-bit bidirectional latched FutureBus transceiver, inverting | | three-state and open-collector | (44) | 74F8962 |
| 74x8963 | 1 | 9-bit bidirectional latched FutureBus transceiver, non-inverting | | three-state and open-collector | (44) | 74F8963 |
| 74x8965 | 1 | 9-bit bidirectional latched FutureBus transceiver, latch select | | three-state and open-collector | (44) | 74F8965 |
| 74x8966 | 1 | 9-bit bidirectional latched FutureBus transceiver, idle arbitration request / output | | three-state and open-collector | (44) | 74F8966 |
| 74x8980 | 1 | JTAG test access port master with 8-bit host interface | | three-state | 24 | SN74LVT8980 |
| 74x8986 | 1 | linkable, multidrop-addressable JTAG transceiver | | three-state | (64) | SN74LVT8986 |
| 74x8990 | 1 | JTAG test access port master with 16-bit host interface | | three-state | (44) | SN74ACT8990 |
| 74x8994 | 1 | JTAG scan-controlled logic/signature analyzer | | | (28) | SN74ACT8994 |
| 74x8996 | 1 | multidrop-addressable JTAG transceiver | | | 24 | SN74ABT8996 |
| 74x8997 | 1 | scan-controlled JTAG concatenator | | three-state | 28 | SN74ACT8997 |
| 74x8999 | 1 | scan-controlled JTAG multiplexer | | three-state | 28 | SN74ACT8999 |
| 74x9000 | 1 | programmable timer with oscillator | | | 20 | MC74HC9000 |
| 74x9014 | 9 | nine-wide buffer/line driver, inverting | Schmitt trigger | | 20 | 74HC9014 |
| 74x9015 | 9 | nine-wide buffer/line driver, non-inverting | Schmitt trigger | | 20 | 74HC9015 |
| 74x9034 | 9 | nine-wide buffer, inverting | | | 20 | MC74HC9034 |
| 74x9035 | 9 | nine-wide buffer, noninverting | | | 20 | MC74HC9035 |
| 74x9046 | 1 | PLL with band gap controlled VCO | | | 16 | 74HCT9046 |
| 74x9114 | 9 | nine-wide inverter | Schmitt trigger | open-collector | 20 | 74HC9114 |
| 74x9115 | 9 | nine-wide buffer | Schmitt trigger | open-collector | 20 | 74HC9115 |
| 74x9134 | 9 | nine-wide buffer, inverting | | open-collector | 20 | MC74HC9134 |
| 74x9135 | 9 | nine-wide buffer, noninverting | | open-collector | 20 | MC74HC9135 |
| 74x9164 | 1 | 8-bit shift register (serial in/out, parallel in/out) | Schmitt trigger | three-state | (16) | TC74VHC9164 |
| 74x9240 | 1 | 9-bit buffer / line driver, inverting | | three-state | 24 | 74FR9240 |
| 74x9244 | 1 | 9-bit buffer / line driver, non-inverting | | three-state | 24 | 74FR9244 |
| 74x9245 | 1 | 9-bit bidirectional transceiver, non-inverting | | three-state | 24 | 74FR9245 |
| 74x9323 | 1 | programmable ripple counter with oscillator | | three-state | (8) | 74HC9323A |
| 74x9510 | 1 | 16×16-bit multiplier/accumulator (compatible to Am29510 and TDC1010) | | three-state | (68) | 74HC9510$^{:534}$ |
| 74x9541 | 1 | 8-bit buffer / line driver, inverting / non-inverting | Schmitt trigger | three-state | (20) | 74AHC9541A |
| 74x9595 | 1 | 8-bit shift register with latch (serial in, parallel out) | Schmitt trigger | | (16) | TC74VHC9595 |
| 74x40102 | 1 | presettable synchronous 2-decade BCD down counter | | | 16 | CD74HC40102 |
| 74x40103 | 1 | presettable 8-bit synchronous down counter | | | 16 | CD74HC40103 |
| 74x40104 | 4 | 4-bit bidirectional universal shift register | | three-state | 16 | CD74HC40104 |
| 74x40105 | 1 | 64-bit FIFO memory (16x4) | | three-state | 16 | CD74HC40105 |
| Part number | Units | Description | Input | Output | Pins | Datasheet |

## Widebus Devices

The widebus range in the 74xxx series includes higher-numbered parts like the 7416xxx and others, designed for extended functionality beyond standard chips. These components often feature 16-bit or wider data handling, serving as direct expansions of existing 8-bit designs (e.g., 74373 to 7416373) or introducing entirely new capabilities. They utilize higher pin counts to support larger data buses, advanced operations, and scalable digital logic solutions for more complex circuit requirements.
| Part number | Description | Input | Output | Pins | Datasheet |
| 74x1612 | 18-bit LVTTL-to-GTLP universal bus transceiver | | three-state, open-collector | 64 | GTLPH |
| 74x1616 | 17-bit LVTTL-to-GTLP adjustable edge rate universal bus transceiver | | three-state, open-collector | 64 | GTLPH |
| 74x1627 | 18-bit LVTTL-to-GTLP bus transceiver | | three-state, open-collector | 64 | GTLPH |
| 74x1645 | 16-bit LVTTL-to-GTLP adjustable edge rate bus transceiver | | three-state, open-collector | 56 | GTLPH |
| 74x1650 | 18-bit TTL/BTL universal storage transceiver | | three-state, open-collector | (100) | FB |
| 74x1651 | 17-bit TTL/BTL universal storage transceiver | | three-state, open-collector | (100) | FB |
| 74x1653 | 17-bit LVTTL/BTL universal storage transceiver | | three-state, open-collector | (100) | FB |
| 74x1655 | 16-bit LVTTL-to-GTLP adjustable edge rate universal bus transceiver | | three-state, open-collector | 64 | GTL |
| 74x16209 | 18-bit FET bus exchange switches | | | 48 | CBT |
| 74x16210 | 20-bit FET bus switch | | | 48 | CBT |
| 74x16211 | 24-bit FET bus switch | | | 56 | CBT |
| 74x16212 | 24-bit FET bus exchange switches | | | 56 | CBT |
| 74x16213 | 24-bit FET bus exchange switches | | | 56 | CBT |
| 74x16214 | 12-bit 1-of-3 FET multiplexer/demultiplexer | | | 56 | CBT |
| 74x16222 | 22-bit voltage clamp | | | 48 | TVC |
| 74x16232 | synchronous 16-bit 1-of-2 FET multiplexer/demultiplexer | | | 56 | CBT |
| 74x16233 | 16-bit 1-of-2 FET multiplexer/demultiplexer | | | 56 | CBT |
| 74x16240 | 16-bit inverting buffer/driver with grouped 4-bit output enables (all active-low) | | three-state | 48 | ABT |
| 74x16241 | 16-bit non-inverting buffer/driver with grouped 4-bit output enables (1 and 4 active-low) | | three-state | 48 | ABT |
| 74x16244 | 16-bit non-inverting buffer/driver with grouped 4-bit output enables (all active-low) | | three-state | 48 | ABT |
| 74x16245 | 16-bit bus transceiver | | three-state | 48 | ABT |
| 74x16246 | 11-bit incident wave switching bus transceiver | | three-state, open-collector | 48 | ABTE |
| 74x16260 | 12-bit to 24-bit multiplexed D-type latches | | three-state | 56 | ABT |
| 74x16269 | 12-bit to 24-bit registered bus exchanger | | three-state | 56 | ALVCH |
| 74x16270 | 12-bit to 24-bit registered bus exchanger | | three-state | 56 | ALVCH |
| 74x16271 | 12-bit to 24-bit multiplexed bus exchanger | | three-state | 56 | ALVCH |
| 74x16282 | 18-bit to 36-bit registered bus exchanger | | three-state | 80 | ALVCH |
| 74x16292 | 12-bit 1-of-2 FET multiplexer/demultiplexer | | | 56 | CBT |
| 74x16334 | 16-bit universal bus driver | | three-state | 48 | ALVC |
| 74x16344 | 1-bit to 4-bit address driver | | three-state | 56 | ALVCH |
| 74x16373 | 16-bit transparent D-type latches | | three-state | 48 | ABT |
| 74x16374 | 16-bit edge-triggered D-type flip-flops | | three-state | 48 | ABT |
| 74x16377 | 16-bit edge-triggered D-type flip-flops | | | 48 | ABT |
| 74x16390 | 16-bit to 32-bit FET multiplexer/demultiplexer bus switch | | | 56 | CBT |
| 74x16409 | 9-bit 4-port universal bus exchanger | | three-state | 56 | ALVCH |
| 74x16460 | 4-to-1 multiplexed/demultiplexed registered transceiver | | three-state | 56 | ABT |
| 74x16470 | 16-bit registered transceiver | | three-state | 56 | ABT |
| 74x16500 | 18-bit universal bus transceiver (registered, active low clock) | | three-state | 56 | ABT |
| 74x16501 | 18-bit universal bus transceiver (registered, active high clock) | | three-state | 56 | ABT |
| 74x16524 | 18-bit registered bus transceiver | | three-state | 56 | ALVCH |
| 74x16525 | 18-bit registered bus transceiver | | three-state | 56 | ALVCH |
| 74x16540 | 16-bit inverting buffer/driver with grouped 8-bit output enables (active-low) | | three-state | 48 | ABT |
| 74x16541 | 16-bit non-inverting buffer/driver with grouped 8-bit output enables (active-low) | | three-state | 48 | ABT |
| 74x16543 | 16-bit registered tranceiver | | three-state | 56 | ABT |
| 74x16600 | 18-bit universal bus transceiver (registered, active low clock) | | three-state | 56 | ABT |
| 74x16601 | 18-bit universal bus transceiver (registered, active high clock) | | three-state | 56 | ABT |
| 74x16612 | 18-bit LVTTL-to-GTL+ universal bus transceiver | | three-state, open-collector | 56 | GTL |
| 74x16616 | 17-bit LVTTL-to-GTL+ universal bus transceiver | | three-state, open-collector | 56 | GTL |
| 74x16620 | 16-bit bus transceiver | | three-state | 48 | AC |
| 74x16622 | 18-bit LVTTL-to-GTL+ bus transceiver | | three-state, open-collector | 64 | GTL |
| 74x16623 | 16-bit bus transceiver | | three-state | 48 | ABT |
| 74x16640 | 16-bit bus transceiver | | three-state | 48 | ABT |
| 74x16646 | 16-bit bus transceiver and registers | | three-state | 56 | ABT |
| 74x16648 | 16-bit bus transceiver and registers | | three-state | 56 | ABT |
| 74x16651 | 16-bit bus transceiver and registers | | three-state | 56 | ABT |
| 74x16652 | 16-bit bus transceiver and registers | | three-state | 56 | ABT |
| 74x16657 | 16-bit bus transceiver with parity generators/checkers | | three-state | 56 | ABT |
| 74x16721 | 3.3-V 20-bit flip-flop | | three-state | 56 | ALVCH |
| 74x16722 | 22-bit flip-flop | | three-state | 64 | AVC |
| 74x16800 | 20-bit FET bus switch | | | 48 | CBT |
| 74x16811 | 24-bit FET bus switch | | | 56 | CBT |
| 74x16820 | 3.3-V 10-bit flip-flop with dual outputs | | three-state | 56 | ALVCH |
| 74x16821 | 20-bit bus interface flip-flops | | three-state | 56 | ABT |
| 74x16823 | 18-bit bus interface flip-flops | | three-state | 56 | ABT |
| 74x16825 | 18-bit non-inverting bus buffer/driver | | three-state | 56 | ABT |
| 74x16826 | 18-bit inverting bus buffer/driver | | three-state | 56 | ABT |
| 74x16827 | 20-bit non-inverting bus buffer/driver | | three-state | 56 | ABT |
| 74x16828 | 20-bit inverting bus buffer/driver | | three-state | 56 | ABT |
| 74x16831 | 1-to-4 address register/driver | | three-state | 80 | ALVCH |
| 74x16832 | 1-to-4 address register/driver | | three-state | 64 | ALVCH |
| 74x16833 | dual 8-bit to 9-bit parity bus transceivers | | three-state, open-collector | 56 | ABT |
| 74x16834 | 18-bit universal bus driver | | three-state | 56 | AVC |
| 74x16835 | 18-bit universal bus driver | | three-state | 56 | ALVC |
| 74x16841 | 20-bit bus interface D-type latches | | three-state | 56 | ABT |
| 74x16843 | 18-bit bus interface D-type latches | | three-state | 56 | ABT |
| 74x16853 | dual 8-bit to 9-bit parity bus transceiver | | three-state | 56 | ABT |
| 74x16857 | 14-bit registered buffer | | | 48 | SSTVF |
| 74x16859 | 13-bit to 26-bit registered buffer | | | 64 | SSTVF |
| 74x16861 | 20-bit FET bus switch | | | 56 | CBT |
| 74x16863 | 18-bit bus transceiver | | three-state | 56 | ABT |
| 74x16901 | 18-bit universal bus transceiver with parity generators/checkers | | | 64 | ALVCH |
| 74x16903 | 3.3-V 12-bit universal bus driver with parity checker | | three-state | 56 | ALVCH |
| 74x16912 | 18-bit LVTTL-to-GTLP universal bus transceiver | | three-state, open-collector | 56 | GTLPH |
| 74x16916 | 17-bit LVTTL-to-GTLP universal bus transceiver | | three-state, open-collector | 56 | GTLPH |
| 74x16923 | 18-bit LVTTL-to-GTLP universal bus transceiver | | three-state, open-collector | 64 | GTL |
| 74x16945 | 16-bit LVTTL-to-GTLP bus transceiver | | three-state, open-collector | 48 | GTLPH |
| 74x16952 | 16-bit registered transceiver | | three-state | 56 | ABT |
| 74x16973 | 8-bit bus transceiver and transparent D-type latch | | | 48 | ALVCH |
| 74x161284 | 19-bit bus interface | | open-drain with internal 1.4-kΩ pull up resistors | 48 | LVC |
| 74x162240 | 3.3-V ABT 16-bit buffer/driver | | three-state | 48 | LVTH |
| 74x162241 | 3.3-V ABT 16-bit buffer/driver | | three-state | 48 | LVTH |
| 74x162244 | 16-bit buffer/driver | | three-state | 48 | ALVCH |
| 74x162245 | 16-bit bus transceiver | | three-state | 48 | LVCR |
| 74x162260 | 12-bit to 24-bit multiplexed D-type latch | | three-state | 56 | ALVCH |
| 74x162268 | 12-bit to 24-bit registered bus exchanger | | three-state | 56 | ALVCH |
| 74x162280 | 16-bit to 32-bit registered bus exchanger with byte masks | | three-state | 80 | ALVCHG |
| 74x162282 | 18-bit to 36-bit registered bus exchanger | | three-state | 80 | ALVCHG |
| 74x162292 | 12-bit 1-of-2 FET multiplexer/demultiplexer | | internal 500-Ω pull down resistors | 56 | CBT |
| 74x162334 | 16-bit universal bus driver | | three-state | 48 | ALVC |
| 74x162344 | 1-bit to 4-bit address driver | | three-state | 56 | ALVCH |
| 74x162373 | 3.3-V ABT 16-bit transparent D-type latch | | three-state | 48 | LVTH |
| 74x162374 | 3.3-V ABT 16-bit edge triggered D-type flip-flop | | three-state | 48 | LVTH |
| 74x162460 | 4-to-1 multiplexed/demultiplexed registered transceiver | | three-state | 56 | ABTH |
| 74x162500 | 18-bit universal bus transceiver | | three-state | 56 | ABT |
| 74x162501 | 18-bit registered transceiver | | three-state | 56 | FCT |
| 74x162525 | 18-bit registered bus transceiver | | three-state | 56 | ALVCH |
| 74x162541 | 3.3-V ABT 16-bit buffers/drivers | | three-state | 48 | LVTH |
| 74x162543 | 16-bit latched transceiver | | three-state | 56 | FCT |
| 74x162601 | 18-bit universal bus tranceiver | | three-state | 56 | ALVCH |
| 74x162646 | 16-bit registered transceiver | | three-state | 56 | FCT |
| 74x162652 | 16-bit registered transceiver | | three-state | 56 | FCT |
| 74x162721 | 3.3-V 20-bit flip-flop | | three-state | 56 | ALVCH |
| 74x162820 | 3.3-V 10-bit flip-flop | | three-state | 56 | ALVCH |
| 74x162821 | 20-bit bus interface flip-flops | | three-state | 56 | ALVT |
| 74x162823 | 18-bit bus interface flip-flops | | three-state | 56 | ABT |
| 74x162825 | 18-bit buffer/driver | | three-state | 56 | ABT |
| 74x162827 | 20-bit buffer/driver | | three-state | 56 | ABT |
| 74x162830 | 1-bit to 2-bit address driver | | three-state | 80 | ALVCH |
| 74x162831 | 1-bit to 4-bit address register/driver | | three-state | 80 | ALVCH |
| 74x162832 | 1-bit to 4-bit address register/driver | | three-state | 64 | ALVCH |
| 74x162834 | 3.3-V CMOS 18-bit universal bus driver | | three-state | 56 | ALVCF |
| 74x162835 | 18-bit universal bus driver | | three-state | 56 | ALVC |
| 74x162836 | 20-bit universal bus driver | | three-state | 56 | ALVCH |
| 74x162841 | 20-bit bus interface D-type latch | | three-state | 56 | ALVCH |
| 74x164245 | 16-bit dual supply bus transceiver | | three-state | 48 | AVCA |
| Part number | Description | Input | Output | Pins | Datasheet |
| 74x18245 | scan test devices with 18-bit bus transceivers | | three-state | 56 | ABT |
| 74x18502 | scan test devices with 18-bit universal bus transceivers | | three-state | (64) | ABTH |
| 74x18504 | scan test devices with 20-bit universal bus transceivers | | three-state | (64) | LVTH |
| 74x18512 | scan test devices with 18-bit universal bus transceivers | | three-state | 64 | LVTH |
| 74x18640 | scan test devices with 18-bit inverting bus transceivers | | three-state | 56 | ABT |
| 74x18646 | scan test devices with 18-bit transceivers and registers | | three-state | (64) | LVTH |
| 74x18652 | scan test devices with 18-bit transceivers and registers | | three-state | (64) | LVTH |
| 74x182502 | scan test devices with 18-bit universal bus transceivers | | three-state | (64) | ABTH |
| 74x182504 | scan test devices with 20-bit universal bus transceivers | | three-state | (64) | LVTH |
| 74x182512 | scan test devices with 18-bit universal bus transceivers | | three-state | 64 | LVTH |
| 74x182646 | scan test devices with 18-bit transceivers and registers | | three-state | (64) | LVTH |
| 74x182652 | scan test devices with 18-bit transceivers and registers | | three-state | (64) | LVTH |
| Part number | Description | Input | Output | Pins | Datasheet |
| 74x20245 | 20-bit dual supply bus transceiver | | three-state | 56 | AVC |
| Part number | Description | Input | Output | Pins | Datasheet |
| 74x22033 | 8-bit LVTTL-to-GTLP adjustable edge rate registered transceiver | | three-state, open-collector | 48 | GTLP |
| 74x22501 | 8-bit universal bus transceiver and two 1-bit bus transceivers | | three-state | 48 | VMEH |
| Part number | Description | Input | Output | Pins | Datasheet |
| 74x25244 | 25-Ω octal bus transceiver | | three-state | 24 | BCT |
| 74x25245 | 25-Ω octal bus transceiver | | three-state | 24 | BCT |
| 74x25642 | 25-Ω octal bus transceiver | | | 24 | ABT |
| Part number | Description | Input | Output | Pins | Datasheet |
| 74x29821 | 10-bit bus interface flip-flops | | three-state | 24 | ALS |
| 74x29825 | 8-bit bus interface flip-flops | | three-state | 24 | BCT |
| 74x29827 | 10-bit bus buffer/driver | | three-state | 24 | ALS |
| 74x29828 | 10-bit bus buffer/driver | | three-state | 24 | BCT |
| 74x29841 | 10-bit bus interface D-type latches | | three-state | 24 | BCT |
| 74x29843 | 9-bit bus interface D-type latches | | three-state | 24 | BCT |
| 74x29854 | 8-bit to 9-bit parity bus transceiver | | | 24 | BCT |
| 74x29863 | 9-bit bus transceiver | | three-state | 24 | BCT |
| 74x29864 | 9-bit bus transceiver | | three-state | 24 | BCT |
| Part number | Description | Input | Output | Pins | Datasheet |
| 74x32240 | 32-bit bus buffer/driver | | three-state | (96) | LVT |
| 74x32244 | 32-bit bus buffer/driver | | three-state | (96) | LVT |
| 74x32245 | 36-bit bus tranceiver | | three-state | (100) | ABTH |
| 74x32316 | 16-bit tri-port universal bus exchangers | | | (80) | ABTH |
| 74x32318 | 18-bit tri-port universal bus exchangers | | | (80) | ABTH |
| 74x32373 | 32-bit D-type latches | | three-state | (96) | LVCH |
| 74x32374 | 32-bit D-type flip-flops | | three-state | (96) | LVCH |
| 74x32501 | 36-bit universal bus transceiver | | three-state | (100) | ABTH |
| 74x32543 | 36-bit registered bus transceiver | | three-state | (100) | ABTH |
| 74x32973 | 16-bit bus transceiver and transparent D-type latch | | | (96) | LVCH |
| 74x322244 | 32-bit buffer/driver | | three-state | (96) | LVCH |
| 74x322374 | 32-bit D-type flip-flops | | three-state | (96) | LVTH |
| 74x324245 | 32-bit dual supply bus transceiver | | three-state | (120) | AVCB |

## Smaller footprints

As board designs have migrated away from large amounts of logic chips, so has the need for many of the same gate in one package. Since about 1996, there has been an ongoing trend towards one / two / three logic gates per chip. Now logic can be placed where it is physically needed on a board, instead of running long signal traces to a full-size logic chip that has many of the same gate.
All chips in the following sections are available 5- to 10-pin surface-mount packages. The right digits, after the 1G/2G/3G, typically has the same functional features as older legacy chips, except for the multifunctional chips and 4-digit chip numbers, which are unique to these newer families. The "x" in the part number is a place holder for the logic family name. For example, 74x1G14 in "LVC" logic family would be "74LVC1G14". The previously stated prefixes of "SN-" and "MC-" are used to denote manufacturers, Texas Instruments and ON Semiconductor respectively.
Some of the manufacturers that make these smaller IC chips are: Diodes Incorporated, Nexperia (NXP Semiconductors), ON Semiconductor (Fairchild Semiconductor), Texas Instruments (National Semiconductor), Toshiba.
The logic families available in small footprints are: AHC, AHCT, AUC, AUP, AXP, HC, HCT, LVC, VHC, NC7S, NC7ST, NC7SU, NC7SV. The LVC family is very popular in small footprints because it supports the most common logic voltages of 1.8 V, 3.3 V, 5 V, its inputs are 5 V tolerant when the device is powered at a lower voltage, and an output drive of 24 mA. Gates that are commonly available across most small footprint families are 00, 02, 04, 08, 14, 32, 86, 125, 126.
Chips in this section typically contain the number of units noted by the number immediately before the 'G' in their prefix (e.g. 2G = 2 gates).
| Part number | Units | Description | Input | Output | Pins | Datasheet |
| 74x1G00 | 1 | single 2-input NAND gate | | | 5 | LVC |
| 74x1G02 | 1 | single 2-input NOR gate | | | 5 | LVC |
| 74x1G04 | 1 | single inverter gate | | | 5 | LVC |
| 74x1GU04 | 1 | single inverter gate | | unbuffered | 5 | LVC |
| 74x1GX04 | 1 | single crystal oscillator driver | | | 6 | LVC |
| 74x1G06 | 1 | single inverter gate | | open-drain | 5 | LVC |
| 74x1G07 | 1 | single buffer gate | | open-drain | 5 | LVC |
| 74x1G08 | 1 | single 2-input AND gate | | | 5 | LVC |
| 74x1G09 | 1 | single 2-input AND gate | | open-drain | 5 | AUP |
| 74x1G10 | 1 | single 3-input NAND gate | | | 6 | LVC |
| 74x1G11 | 1 | single 3-input AND gate | | | 6 | LVC |
| 74x1G14 | 1 | single inverter gate | schmitt-trigger | | 5 | LVC |
| 74x1G16 | 1 | single inverter gate | schmitt-trigger | open-drain | 5 | LVC |
| 74x1G17 | 1 | single buffer gate | schmitt-trigger | | 5 | LVC |
| 74x1G18 | 1 | single 1-of-2 demultiplexer | | three-state | 6 | LVC |
| 74x1G19 | 1 | single 1-to-2 line decoder, active-low outputs | | | 6 | LVC |
| 74x1G27 | 1 | single 3-input NOR gate | | | 6 | LVC |
| 74x1G29 | 1 | single 2-to-3 line decoder, active-low outputs | | | 8 | LVC |
| 74x1G32 | 1 | single 2-input OR gate | | | 5 | LVC |
| 74x1G34 | 1 | single buffer gate | | | 5 | LVC |
| 74x1G38 | 1 | single 2-input NAND gate | | open-drain | 5 | LVC |
| 74x1G57 | 1 | single configurable 7-function gate | schmitt-trigger | | 6 | LVC |
| 74x1G58 | 1 | single configurable 7-function gate | schmitt-trigger | | 6 | LVC |
| 74x1G66 | 1 | single SPST analog switch | analog | analog | 5 | LVC |
| 74x1G74 | 1 | single positive edge D flip-flop, asynchronous preset/clear | | | 8 | LVC |
| 74x1G79 | 1 | single positive edge D flip-flop, single non-inverted output | | | 5 | LVC |
| 74x1G80 | 1 | single positive edge D flip-flop, single inverted output | | | 5 | LVC |
| 74x1G86 | 1 | single 2-input XOR gate (a.k.a. 2-bit even-parity generator) | | | 5 | LVC |
| 74x1G97 | 1 | single configurable 7-function gate | schmitt-trigger | | 6 | LVC |
| 74x1G98 | 1 | single configurable 7-function gate | schmitt-trigger | | 6 | LVC |
| 74x1G99 | 1 | single configurable 15-function gate, active-low enable | schmitt-trigger | three-state | 8 | LVC |
| 74x1G123 | 1 | single retriggerable monostable multivibrator | schmitt-trigger | | 8 | LVC |
| 74x1G125 | 1 | single bus buffer gate, active-low enable | | three-state | 5 | LVC |
| 74x1G126 | 1 | single bus buffer gate, active-high enable | | three-state | 5 | LVC |
| 74x1G132 | 1 | single 2-input NAND gate | schmitt-trigger | | 5 | LVC |
| 74x1G139 | 1 | single 2-to-4 line decoder, active-low outputs | | | 8 | LVC |
| 74x1G157 | 1 | single 2-to-1 data selector/multiplexer | schmitt-trigger | | 6 | LVC |
| 74x1G158 | 1 | single 2-input multiplexer, active-low outputs | schmitt-trigger | | 6 | AUP |
| 74x1G175 | 1 | single positive edge D flip-flop, asynchronous clear, single non-inverted output | | | 6 | LVC |
| 74x1G240 | 1 | single bus buffer gate, active-low enable | | three-state | 5 | LVC |
| 74x1G332 | 1 | single 3-input OR gate | | | 6 | LVC |
| 74x1G373 | 1 | single D-type transparent latch, single non-inverted output, active-low output enable | | three-state | 6 | LVC |
| 74x1G374 | 1 | single positive edge D flip-flop, single non-inverted output, active-low output enable | | three-state | 6 | LVC |
| 74x1G384 | 1 | single FET bus switch | | three-state | 5 | CBT |
| 74x1G386 | 1 | single 3-input XOR gate (a.k.a. 3-bit even-parity generator) | | | 6 | LVC |
| 74x1G0832 | 1 | single 3-input AND-OR combo gate (2-input AND into 2-input OR) | schmitt-trigger | | 6 | LVC |
| 74x1G3157 | 1 | single SPDT analog switch | analog | analog | 6 | LVC |
| 74x1G3208 | 1 | single 3-input OR-AND combo gate (2-input OR into 2-input AND) | schmitt-trigger | | 6 | LVC |
| Part number | | Description | Input | Output | Pins | Datasheet |
| 74x2G00 | 2 | dual 2-input NAND gate | | | 8 | LVC |
| 74x2G02 | 2 | dual 2-input NOR gate | | | 8 | LVC |
| 74x2G04 | 2 | dual inverter gate | | | 6 | LVC |
| 74x2GU04 | 2 | dual inverter gate | | unbuffered | 6 | LVC |
| 74x2G06 | 2 | dual inverter gate | | open-drain | 6 | LVC |
| 74x2G07 | 2 | dual buffer gate | | open-drain | 6 | LVC |
| 74x2G08 | 2 | dual 2-input AND gate | | | 8 | LVC |
| 74x2G14 | 2 | dual inverter gate | schmitt-trigger | | 6 | LVC |
| 74x2G17 | 2 | dual buffer gate | schmitt-trigger | | 6 | LVC |
| 74x2G32 | 2 | dual 2-input OR gate | | | 8 | LVC |
| 74x2G34 | 2 | dual buffer gate | | | 6 | LVC |
| 74x2G38 | 2 | dual 2-input NAND gate | | open-drain | 8 | LVC |
| 74x2G53 | 1 | single SPDT analog switch, 2:1 analog multiplexer/demultiplexer | analog | analog | 8 | LVC |
| 74x2G57 | 2 | dual configurable 7-function gate | schmitt-trigger | | 10 | AUP |
| 74x2G58 | 2 | dual configurable 7-function gate | schmitt-trigger | | 10 | AUP |
| 74x2G66 | 2 | dual SPST analog switch | analog | analog | 8 | LVC |
| 74x2G74 | 2 | dual positive edge D flip-flop, asynchronous preset/clear | | | 8 | LVC |
| 74x2G79 | 2 | dual positive edge D flip-flop, single non-inverted output | | | 8 | LVC |
| 74x2G80 | 2 | dual positive edge D flip-flop, single inverted output | | | 8 | LVC |
| 74x2G86 | 2 | dual 2-input XOR gate (a.k.a. 2-bit even-parity generator) | | | 8 | LVC |
| 74x2G97 | 2 | dual configurable 7-function gate | schmitt-trigger | | 10 | AUP |
| 74x2G98 | 2 | dual configurable 7-function gate | schmitt-trigger | | 10 | AUP |
| 74x2G125 | 2 | dual bus buffer, active-low enable | | three-state | 8 | LVC |
| 74x2G126 | 2 | dual bus buffer, active-high enable | | three-state | 8 | LVC |
| 74x2G132 | 2 | dual 2-input NAND gate | schmitt-trigger | | 8 | LVC |
| 74x2G157 | 2 | dual 2-to-1 data selector/multiplexer | | | 8 | LVC |
| 74x2G240 | 2 | dual inverting bus buffer gate, active-low enable | | three-state | 8 | LVC |
| 74x2G241 | 2 | dual bus buffer gate, active-low and active-high enables | | three-state | 8 | LVC |
| 74x2G0604 | 2 | dual inverter gate (one open-drain) | | open-drain | 6 | AUP |
| 74x2G3404 | 2 | singe buffer and single inverter | | | 6 | AUP |
| 74x2G3407 | 2 | dual buffer gate (one open-drain) | | open-drain | 6 | AUP |
| Part number | Units | Description | Input | Output | Pins | Datasheet |
| 74x3G04 | 3 | triple inverter gate | | | 8 | LVC |
| 74x3GU04 | 3 | triple inverter gate | | unbuffered | 8 | LVC |
| 74x3G06 | 3 | triple inverter gate | | open-drain | 8 | LVC |
| 74x3G07 | 3 | triple buffer gate | | open-drain | 8 | LVC |
| 74x3G14 | 3 | triple inverter gate | schmitt-trigger | | 8 | LVC |
| 74x3G16 | 3 | triple buffer gate | | | 8 | LVC |
| 74x3G17 | 3 | triple buffer gate | schmitt-trigger | | 8 | LVC |
| 74x3G34 | 3 | triple buffer gate | | | 8 | LVC |
| 74x3G57 | 3 | triple configurable 7-function gate | schmitt-trigger | | 14 | LVC |
| 74x3G58 | 3 | triple configurable 7-function gate | schmitt-trigger | | 14 | LVC |
| 74x3G97 | 3 | triple configurable 7-function gate | schmitt-trigger | | 14 | LVC |
| 74x3G98 | 3 | triple configurable 7-function gate | schmitt-trigger | | 14 | LVC |
| 74x3G0434 | 3 | dual buffer and single inverter | | | 8 | AUP |
| 74x3G3404 | 3 | dual buffer and single inverter | | | 8 | AUP |

### Voltage translation

All chips in this section have two power-supply pins to translate unidirectional logic signals between two different logic voltages. The logic families that support dual-supply voltage translation are AVC, AVCH, AXC, AXCH, AXP, LVC, where the "H" in AVCH and AXCH means "bus hold" feature.
| Part number | Units | Description | Pins | Datasheet |
| 74x1T00 | 1 | single-supply 2-input NAND gate | 5 | AUPLV |
| 74x1T02 | 1 | single-supply 2-input NOR gate | 5 | AUPLV |
| 74x1T04 | 1 | single-supply inverter | 5 | AUPLV |
| 74x1T08 | 1 | single-supply 2-input AND gate | 5 | AUPLV |
| 74x1T14 | 1 | single-supply schmitt-trigger inverter | 5 | AUP |
| 74x1T17 | 1 | single-supply schmitt-trigger buffer | 5 | AUP |
| 74x1T32 | 1 | single-supply 2-input OR gate | 5 | AUPLV |
| 74x1T34 | 1 | dual-supply unidirectional buffer/driver | 5 | AUPLV |
| 74x1T45 | 1 | dual-supply 1-bit bus transceiver | 6 | AXCAXPLVC |
| 74x1T50 | 1 | single-supply schmitt-trigger buffer | 5 | AUP |
| 74x1T57 | 1 | single-supply configurable 9-function gate | 6 | AUP |
| 74x1T58 | 1 | single-supply configurable 9-function gate | 6 | AUP |
| 74x1T86 | 1 | single-supply 2-input XOR gate | 5 | AUPLV |
| 74x1T87 | 1 | single-supply 2-input XNOR gate | 5 | AUP |
| 74x1T97 | 1 | single-supply configurable 9-function gate | 6 | AUP |
| 74x1T98 | 1 | single-supply configurable 9-function gate | 6 | AUP |
| 74x1T125 | 1 | single-supply single buffer/driver with 3-state output | 5 | LV |
| 74x1T126 | 1 | single-supply single buffer/driver with 3-state output | 5 | LV |
| 74x1T157 | 1 | single-supply 2-input schmitt-trigger multiplexer (non-inverted) | 6 | AUP |
| 74x1T158 | 1 | single-supply 2-input schmitt-trigger multiplexer (inverted) | 6 | AUP |
| 74x2T45 | 2 | dual-supply 2-bit bus transceiver | 8 | AXCAXPLVC |
| 74x4T234 | 4 | dual-supply 4-bit bus transceiver | 16 | AVC |
| 74x4T245 | 4 | dual-supply 4-bit bus transceiver | 16 | AXCAXP |
| 74x4T774 | 4 | dual-supply 4-bit bus transceiver | 16 | AXC |
| 74x8T245 | 8 | dual-supply 8-bit bus transceiver | 24 | AXCAXPLVC |
| 74x16T245 | 16 | dual-supply 16-bit bus transceiver | 48 | LVC |
| 74x20T245 | 20 | dual-supply 20-bit bus transceiver | 56 | AVC |
| 74x24T245 | 24 | dual-supply 24-bit bus transceiver | (83) | AVC |
| 74x32T245 | 32 | dual-supply 32-bit bus transceiver | (120) | AVC |
Chips in the above table support the following voltage ranges on either power supply pin:
* AXC = 0.65 to 3.6 V. Only available from Texas Instruments.
* AXP = 0.9 to 5.5 V. Only available from Nexperia.
* LVC = 1.65 to 5.5 V. Available from Diodes Inc, Nexperia, Texas Instruments.