# USB4

Universal Serial Bus 4 (USB4), sometimes erroneously referred to as USB 4.0, is the most recent technical specification of the USB (Universal Serial Bus) data communication standard. The USB Implementers Forum originally announced USB4 in 2019.
USB4 enables multiple devices to dynamically share a single high-speed data link. USB4 defines bit rates of 20 Gbit/s, 40 Gbit/s and 80 Gbit/s. USB4 is only defined for USB-C connectors and its Type-C specification regulates the connector, cables and also power delivery features across all uses of USB-C cables, in part with the USB Power Delivery specification.
The USB4 standard mandates backwards compatibility to USB 3.x and dedicated backward compatibility with USB 2.0. The dynamic sharing of bandwidth of a USB4 connection is achieved by encapsulating multiple virtual connections ("tunnels") of other protocols, such as USB 3.x, DisplayPort and PCI Express.
USB4 is based on the Thunderbolt 3 protocol. However, it is different enough that backwards compatibility to Thunderbolt 3 is optional for many device types.

## History

Prior to USB4, Thunderbolt provided a way to dynamically share bandwidth between multiple DP and PCIe connections over a single cable. Thunderbolt originally used the mDP connector and was only backward compatible to DP connections and did not support power transfer.
The introduction of the Type-C connector in 2014 provided a connector that could support USB data connectivity and power transfer as well as DP connections. It also allowed the static sharing of bandwidth between DP and USB connections over the same cable.
Thunderbolt 3 switched over to using the new Type-C connector and also added backwards compatibility for USB connections and power transfer features.

### USB4 Version 1.0

USB4 was announced in March 2019 by the USB Promoter Group. The version 1.0 of the USB4 specification, released 29 August 2019, is titled "Universal Serial Bus 4 (USB4™)". Several news reports before the release of that version sometime use the wrong terminology "USB 4.0" and "USB 4".
In the announcement press release, the USB Promoter Group mentions that USB4 is "based on the Thunderbolt™ protocol specification recently contributed by Intel Corporation". Goals stated in the USB4 specification are increasing bandwidth, helping to converge the USB-C connector ecosystem, and "minimize end-user confusion". Some of the key areas to achieve this are using a single USB-C connector type, to offer display and data transfer features, while retaining "compatibility with existing and Thunderbolt products".
Version 1.0 defined 20 Gbit/s and 40 Gbit/s connections, the required support of USB 2.0 and USB 3.x connections at up to 10 Gbit/s with support for tunneling connections according to the PCIe 4.0, USB 3.2 and DP 1.4a specifications. Optional backwards compatibility to Thunderbolt 3 as well as Host-to-Host networking were also defined. Compared to Thunderbolt 3, USB4 changed the raw bit rates slightly to bring them in line with other USB specifications, where the nominal bit rate matches the raw bit rate. USB4 also added support for USB3 tunnels and use of the USB2 wires for improved backwards compatibility with previous USB standards and to allow for simpler USB4 devices without support for PCIe. USB4 also added support for hub topologies compared to Thunderbolts previous restriction to daisy-chaining topology.
In July 2020 Intel announced Thunderbolt 4 as an implementation of USB4 40 Gbit/s with additional requirements, such as mandatory backwards compatibility to Thunderbolt 3 and requirement for smaller notebooks to support being charged over Thunderbolt 4 ports. Publications such as Anandtech described Thunderbolt 4 as "superset of TB3 and USB4" and "able to accept TB4, TB3, USB4, and USB 3/2/1 connections". Intel itself describes Thunderbolt 4 as "delivering increased minimum performance requirements, expanded capabilities and USB4 specification compliance" and as building "on the innovation of Thunderbolt 3".

### USB4 Version 2.0

On 18 October 2022 the USB Promoter Group released the USB4 Version 2.0 specification.
It added a new transmission speed that allows 80 Gbit/s symmetric connections or asymmetric connections supporting 120 Gbit/s in one direction and 40 Gbit/s in the other. The new PAM3 encoding scheme enables this over existing, passive "USB 40Gbps" cables. Active cables are not forwards compatible in the same way, instead a new speed grade of active cables was added. It also upgraded the support of DP tunnels to DP 2.1, allowing the tunneling of DP connections with up to 80 Gbit/s (UHBR20). It also added a replacement of the previous tunneling of classic USB 3.2 connection speeds with "USB3 Gen T tunneling", which can exceed 20 Gbit/s and also removed PCIe overhead limitations.
Around the release of the new USB4 2.0 specification, USB-IF also mandated new logos and marketing names to simplify representing the maximum supported bit rates and wattages to consumers.
In September 2023, Intel announced the launch of Thunderbolt 5 as an implementation of USB4, using the new abilities of 80 Gbit/s connections and updated DP support Intel's own press release describes it as "built on industry standards – including USB4 V2".

## Functionality of USB4 ports

Similarly to how USB 3.x specifications defined the new SuperSpeed(Plus) protocols for faster signaling rates, they also mandated that USB 3.x physically and architecturally implement USB 2.0 specification with dedicated wires, where the USB4 specification describes 2 different aspects. The first one is what type of existing connections and compatibility a USB4 port guarantees. The USB4 specification speaks of downstream facing ports (DFP) and upstream facing ports (UFP) rather than host and peripheral ports. Downstream facing ports includes host ports as well as any "outputs" of a USB4 hub, while upstream facing ports include anything that is connectable to a downstream facing port, like the ports of peripherals or the "input" port of a USB4 hub.
Any USB4 DFP port is required to also implement USB 2.0, USB 3.2 and DP Alternative Mode support, each according to their own specifications. As such, a USB4 DFP is backwards compatible to all previous USB standards and DP output.

### USB 2.0 DFP features

USB 2.0 defines 3 different bit rates (Low-, Full-, High-Speed), all are required to be supported. USB 2.0 abilities uses separate wires on the Type-C connector that are not used by USB 3.2 or USB4.

### USB 3.x DFP features

USB 3.2, the current version, defines 3 different bit rates ("5 Gbps" a.k.a. SuperSpeed, "10 Gbps" a.k.a. SuperSpeed+, "20 Gbps" a.k.a. SuperSpeed+ 20 Gbps). While USB 3.2 specification has been referenced USB4 from the start, only the 2 lower speeds (5 Gbit/s, 10 Gbit/s) are mandatory for USB4 DFPs to support.

### DP Alt Mode DFP features

The USB4 specifications make no reference to a minimum feature set for its DP Alternative Mode functionality, but Thunderbolt 3 does. In practice, Intel's family of TB 3 controllers requires at least DisplayPort 1.2 at HBR2 speeds to support 4K60 output, but is also available with up to HBR3 speeds according to the DisplayPort 1.4a specification.

### Power transfer features for DFP

The USB4 specification makes no explicit demands on power output. It outsources all requirements in terms of power to the Type-C specification that underpins all USB, DP and other standards that use the USB-C connector. This requires a USB4 DFP to supply at least 7.5W Type-C current. No power consumption features (e.g., charging of a notebook) are required, but can be supported following the USB PD specification, as well as supplying considerably more power. The USB PD protocol must always have support for exchanging data according to the protocol. This is separate from any functionality of PD to negotiate actual power delivery other than 5V or >15W.

### USB4 hubs & docks

USB4 hubs and docks are defined as their own category of USB4 devices that include further requirements. For example, a USB4 hub must also serve as a classic USB 3.2 hub with DP Alternative Mode passthrough with hosts that do not support USB4 connections. See USB4 capabilities by device type for more details.

## USB4 protocol/connections

Every USB4 port must support the USB4 protocol/connections, which is a distinct standard to establish USB4 links/connections between USB4 devices that exists in parallel to previous USB protocols. Unlike USB 2.0 and USB 3.x, it does not provide a way to transfer data directly, it is rather a mere container that can contain multiple virtual connections ("tunnels").
Other specifications are referenced to define the contents and internal functionality of a tunnel. USB4 defines the following tunnel types:
* USB3 connections
* DisplayPort connections
* PCIe connections
* Ethernet/network connections according to the included USB4Net and Cross-Domain specifications

### General principles of USB4

USB4 forms a tree-like topology of USB4 routers, where each USB4 device includes a USB4 router to participate in this network. A tunnel can be end-to-end, where the route through the entire network of routers is preconfigured. But tunnels can also be single-hop, where it exists only for a single USB4 link (i.e., between 2 routers). In this case, the tunnel will be "unpacked" by the recipient and will use some other means specific to the tunnel type to identify where data needs to be sent next. If the next hop is another USB4 router, data will be ingested again into the next single-hop tunnel until it exits the USB4 network.
Accordingly, single-hop tunnels require specific support in each USB4 router, just to support passing them through to further USB4 routers. However, end-to-end tunnels require support of a USB4 router only when the data is ingested into the tunnel and at the target, to the point where the tunnel ends.

#### Protocol input/output adapters

A Protocol Input Adapter will ingest a connection according to whatever protocol it is based on and convert the contents into a USB4 tunnel. Protocol Output Adapters do the reverse. They extract a tunnel from the USB4 network and if needed recreate a regular connection from the tunnel contents.
The conversion into a tunnel typically entails removing any Phy/Electrical layer and encoding of the underlying connection standard and potentially losslessly compresses the contents; for example, by leaving out empty filler data. A USB4 tunnel itself is virtual and doesn't need to conform to any fixed bandwidth or other limitations that stem from the Phy/Electrical layer of the underlying connection standard. But since most tunnel types will eventually be converted back to a regular, physical connection again, most of those physical limitations, like max. bandwidth, are still likely to apply in the end.

### USB3 Gen X tunneling

This is a single-hop tunnel that essentially can transport any Enhanced SuperSpeed connection according to the USB 3.2 specification. USB3 Gen X follows the Enhanced SuperSpeed Hub topology, where every USB4 router with more than one USB3 endpoint must include a USB3 hub as well. It is the default way USB3 connections through USB4 are made. Supporting it at 10 Gbit/s (SuperSpeed USB 10 Gbps, Gen 2x1) is mandatory on every USB4 DFP. The minimum supported speed for the USB3 connection being tunneled is 10 Gbit/s as every USB4 device already has to support this speed and USB3 hubs handle converting this to 5 Gbit/s devices that may be connected.
This means, that a USB4 hub will share a single upstream USB3 connection and distribute its bandwidth across all its downstream facing ports that make use of USB3 connections.

### USB3 Gen T tunneling

This is an optional alternative to USB3 Gen X tunneling that was introduced in USB4 Version 2.0. It is an end-to-end variant of USB3 Gen X tunnel.
Through this, it eschews the need for USB3 hubs in every USB4 router that can and will limit the throughput. It allows multiple separate USB3 Gen T tunnels even over shared links. Since it is an end-to-end tunnel, every USB4 hub will support passing it through. USB3 Gen T is intended as exclusively virtual, there exists no physical equivalent for it. Thus, it can only be used inside of a USB4 controller. This allows it to leave the limitations to 10 or 20 Gbit/s connections of USB 3.2 behind, while reusing most of the other parts of the Enhanced SuperSpeed protocol.
No known USB4 controller implements support for Gen T tunneling to date (August 2024).

### DP tunneling

DisplayPort is also tunneled as end-to-end connection. There can be multiple independent DP tunnels, but each will be delivered to a single protocol output adapter (at which point DisplayPort MST might be used to further split each connection up).
USB4 Version 1.0 only defines how to tunnel DP connections according to the DisplayPort 1.4a specification (up to HBR3 speeds). USB4 Version 2.0 updates this support to the full DisplayPort 2.1 specification (up to UHBR20 speeds). Notably, the USB4 specification explicitly carves out needing to support the UHBR13.5 DP speed, even if UHBR20 is supported. The DP specification is not public. It is unknown if it makes similar carve-outs.
DP tunneling has great understanding of the contents of DP connections, and will efficiently skip/transmit any filler data, reducing the actually utilized bandwidth of a DP tunnel. But since DP connections have real-time requirements, bandwidth must be reserved for them. USB4 mandates that in absence of any other information, the maximum possible bandwidth for the particular DP connection (DP lanes and speed) must be reserved. This reservation only applies to other real-time tunnels though. Reserved, but unused bandwidth can be used by non-real-time tunnels such as PCIe or USB3, but the reservation may still block other DP tunnels from being established.

### PCIe tunneling

Similar to USB3 Gen X tunneling, PCIe tunneling uses single-hop tunnels, requiring PCIe switches in every USB4 router that supports PCIe tunneling. USB4 has, from the start, referenced the PCI Express Specification Revision 4 and with USB4 Version 2.0 added references to PCI Express Specification Revision 5.0.
PCIe tunneling has had a significant limitation in USB4 Version 1.0 and also Thunderbolt 3: PCIe Express has a variable maximum payload size, which applies end-to-end to a transmission. If any one component or PCIe Switch has a limited MPS, all packets passing through must be limited accordingly. Because USB4 uses a payload of up to 256 Byte per USB4 packet and a PCIe tunnel packet contains further PCIe headers and meta data, the MPS for PCIe tunnels was limited to 128 Byte. This limitation can reduce the efficiency of the PCIe connection greatly for all devices and systems that would otherwise support 256 Byte or even larger MPS.
USB4 Version 2.0 removes this bottleneck (mandatory for all implementers), by defining how a larger PCIe packet can be split across multiple USB4 packets. Support for this new feature requires every USB4 component / controller involved in the PCIe tunnel to implement USB4 Version 2.0.

## USB4 signaling modes

Signaling refers to the lowest layer of the OSI Model, also called physical layer or phy. USB4 connections can be expressed with consumer facing names that are also the basis for the official logos used on packaging and products. These are the "20 Gbps", "40 Gbps", "80 Gbps" labels and they do not explicitly indicate how the connection is achieved on the physical layer. There are also more technical names based on the implementation and use of the USB-C cables. These usually consist of a speed per wire-pair expressed as Gen 1/2/3/4 (5 Gbit/s, 10 Gbit/s, 20 Gbit/s, 40 Gbit/s respectively) and some further information on how many wire-pairs are used in which combination.
USB commonly defines a "Lane" as a (bidirectional) connection, which for all recent transmission modes consists of one sending and one receiving wire-pair. The "Gen AxB" notation refers to B Lanes of operation mode A. Since Gen 4 modes also introduced asymmetric connections with uneven numbers of wire-pairs dedicated to sending and receiving, the Lane-notation is no longer applicable.
The USB 3.x family has had the same technical notation retroactively added in the USB 3.1 and USB 3.2 specification versions. Though this shows common principles and the same generations refer to the same nominal speeds, "Gen A" does not have the same exact meaning in both USB 3.x and USB4 specifications. The overlap in naming mainly becomes relevant for cables as shown in Cable Compatibility, which is regulated by the Type-C specification shared across all users of Type-C connector.
Comparison of signaling modes :
| USB family | Signaling mode name | Introduced in | Encoding | Wire-pairs sending/receiving | Raw bit rate (Gbit/s) | Raw bit rate (Gbit/s) | Net data rate (Gbit/s) | USB-IF current marketing name | Logo |
| USB family | Signaling mode name | Introduced in | Encoding | Wire-pairs sending/receiving | per wire-pair | total (per direction) | Net data rate (Gbit/s) | USB-IF current marketing name | Logo |
| USB 2.x | High-Speed | USB 2.0 | NRZI with bit stuffing | 1 (shared) | 0.480 (half-duplex) | 0.480 (half-duplex) | ? | Hi-Speed USB | |
| USB 3.x | Gen 1x1 | USB 3.0 | 8b/10b | 1/1 | 5 | 5 | 4 | USB 5Gbps | |
| USB 3.x | Gen 2x1 | USB 3.1 | 128b/132b | 1/1 | 10 | 10 | ~9.7 | USB 10Gbps | |
| USB 3.x | Gen 1x2 | USB 3.2 | 8b/10b | 2/2 | 5 | 10 | 8 | (fallback) | (fallback) |
| USB 3.x | Gen 2x2 | USB 3.2 | 128b/132b | 2/2 | 10 | 20 | ~19.39 | USB 20Gbps | |
| USB4 | Gen 2x1 | USB4 v1.0 | 64b/66b | 1/1 | 10 | 10 | ~9.697 | (transient/fallback) | (transient/fallback) |
| USB4 | Gen 2x2 | USB4 v1.0 | 64b/66b | 2/2 | 10 | 20 | ~19.39 | USB 20Gbps | |
| USB4 | Gen 3x1 | USB4 v1.0 | 128b/132b | 1/1 | 20 | 20 | ~19.39 | (transient/fallback) | (transient/fallback) |
| USB4 | Gen 3x2 | USB4 v1.0 | 128b/132b | 2/2 | 20 | 40 | ~38.79 | USB 40Gbps | |
| USB4 | Gen 4 symmetric | USB4 v2.0 | PAM-3 11b/7t | 2/2 | ~40.58 | ~81.15 | ~80.46 | USB 80Gbps | |
| USB4 | Gen 4 asymmetric 3:1 | USB4 v2.0 | PAM-3 11b/7t | 3/1 | ~40.58 | 3x: ~121.725 1x: ~40.58 | 3x: ~120.69 1x: ~40.23 | — | — |
| USB4 | Gen 4 asymmetric 1:3 | USB4 v2.0 | PAM-3 11b/7t | 1/3 | ~40.58 | 3x: ~121.725 1x: ~40.58 | 3x: ~120.69 1x: ~40.23 | — | — |
| — | TB3 Gen 2x2 | — | 64b/66b | 2/2 | 10.3125 | 20.625 | 20 | — | — |
| — | TB3 Gen 3x2 | — | 128b/132b | 2/2 | 20.625 | 41.25 | 40 | — | — |
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Thunderbolt 3 Gen 2 and Gen 3 and the USB4 Gen 2 and Gen 3 modes use very similar signaling. However, Thunderbolt 3 runs at slightly higher speeds, called legacy speeds, compared to rounded speeds of USB4. It is driven slightly faster at 10.3125 Gbit/s (for Gen 2) and 20.625 Gbit/s (for Gen 3), as required by Thunderbolt specifications.
USB4 Gen 4 is normally referred to as a speed of "40 Gbps" or 40 Gbit/s, with the full connections based on it being referred to as 80, 120/40, 40/120 Gbit/s. But since the actual signaling is no longer binary, the actual raw bit rates no longer match those numbers exactly.

## USB4 capabilities by device type
### USB4 hub

A USB4 hub is defined by having 1 USB4 UFP and one or more USB4 DFP.

### USB4-based dock

A USB4-based dock is defined as a USB4 hub that also has more specialized outputs like HDMI or DP, but still keeping some USB4 DFP.

### USB4 peripheral device

A USB4 peripheral device is defined by not having any USB4 DFP. This means devices that are colloquially called "USB-C hubs" may use USB4 to support the dynamic bandwidth sharing or higher bandwidths of USB4. But they are not USB4 hubs if they do not have any USB4 DFP. Not having any USB4 DFP allows the peripheral to only support exactly those USB4 features that it has uses for, potentially simplifying its implementation considerably.
USB4 feature support :
| Feature | Feature | Host | Hub (dock) | Peripheral device |
| Type | | Host | Hub (dock) | Peripheral device |
| USB4 connection | "20 Gbps" (Gen 2x2) | Yes | Yes | Yes |
| USB4 connection | "40 Gbps" (Gen 3x2) | Optional | Yes | Optional |
| USB4 connection | "80 Gbps" (Gen 4 symm.) | Optional | Optional | Optional |
| USB4 connection | "120/40 Gbps" (Gen 4 3:1) | Optional | Optional | Optional |
| USB4 connection | "40/120 Gbps" (Gen 4 1:3) | Optional | Optional | Optional |
| Tunneled | USB3 "10 Gbps" (Gen 2x1) | Yes | Yes | Optional |
| Tunneled | USB3 "20 Gbps" (Gen 2x2) | Optional | Optional | Optional |
| Tunneled | USB3 Gen T (variable bandwidth) | Optional | Optional | Optional |
| Tunneled | DisplayPort | Yes | Yes | Optional |
| Tunneled | PCI Express | Optional | Yes | Optional |
| Tunneled | Host-to-host communications/ USB4 networking | Yes | Yes | — |
| Native | USB3 "5 Gbps" (Gen 1x1) | Yes | Yes | Optional |
| Native | USB3 "10 Gbps" (Gen 2x1) | Yes | Yes | Optional |
| Native | USB3 "20 Gbps" (Gen 2x2) | Optional | Optional | Optional |
| Native | USB 2.0 (Low-, Full-, High-Speed) | Yes | Yes | Optional |
| Native | DisplayPort Alternate Mode | Yes | Yes | Optional |
| Native | Thunderbolt Alternate Mode | Optional | Yes | Optional |
| Native | Other alternate modes | Optional | Optional | Optional |
* 1 2
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## Cable compatibility

The Type-C standard supports cable backward/downward compatibility in many situations. The compatibility typically only breaks between the different families of standards (USB 2.0, USB 3.2, USB4). The USB4 standard mandates that classic active or hybrid active cables still have vast backward compatibility support, so as to behave as if they were regular, passive cables in the eyes of the consumer. But forward compatibility is limited for active cables. Only Optically Isolated Active Cables (OIAC), that should be clearly distinguishable by price, design, cable thickness, and advertising, is allowed to strip most of the backwards compatibility away.
The Gen 4 transmission mode with PAM-3 uses very different signaling to previous modes. Every active component needs to explicitly support this new signaling, but it stays within all signal quality requirements of existing, passive Gen 3 cables (USB4 and TB3).

### Cable naming and relation to specification versions

USB-IF intends only for the new bandwidth-based logos and names to be used with consumers. For cables, the type (passive, active) and the highest supported bandwidth are usually enough to uniquely identify a cable and its supported features. Although some active types make clear distinctions where further details on the type are required. Formally, a cable type and properties are defined by a distinct specification version, which was used during the development/design of said cable model, so each cable would be a valid and possibly certified cable according to a specific set of USB specification versions, like "Type-C 2.3, USB 3.2, USB4 Version 2.0". But the standard is also designed to be interoperable, in that a newer specification version typically adds new modes of operation, new cable types, but does not restrict previously existing things. Because that would make existing things incompatible with new products. For this purpose, even the older USB logos and labels did not include a specification version, but only stated "Certified USB SuperSpeed+ 10 Gbps". This logo identified cables that could support the 10 Gbit/s connection speeds of USB3 across both the USB 3.1 and USB 3.2 version, because the requirements for the cables have not changed. Thus, a precise specification version is usually not relevant and would not make a difference.
Transmission modes such as Gen2x2 are also irrelevant to cables, as valid cables are either full-featured, having all the high speed wire-pairs for up to dual-lane connections at the stated speed or they are USB2-only or some other specific and restrictive type, as listed below.

### USB4 cable compatibility

Overview of passive and active Type-C cables and their USB4 support :
| Cable type | Cable type | Speed | Marketing names | Max. USB4 bit rate | Expected max. cable length | Other support | Other support | Other support | Other support | Power |
| | Remarks | Speed | Marketing names | Max. USB4 bit rate | Expected max. cable length | USB2 | USB3 | TB3 | DP | Power |
| USB2 | — | | Hi-Speed USB | | ≤ 4m | Yes | No | No | No | USB PD: 60W or 100W or 240W |
| Full-Featured passive | — | Gen 1 | USB 5Gbps | 20 Gbit/s | ≤ 2m | Yes | 5 Gbit/s | No | Yes | USB PD: 60W or 100W or 240W |
| Full-Featured passive | — | Gen 2 | USB 20Gbps (USB 10Gbps deprecated) | 20 Gbit/s | ≤ 1m | Yes | Yes | 20 Gbit/s | Yes | USB PD: 60W or 100W or 240W |
| Full-Featured passive | (incl. passive TB4 & TB5) | Gen 3 & Gen 4 | USB 40Gbps USB 80Gbps | 80 Gbit/s (or asymm.) | ≤ 0.8m | Yes | Yes | Yes | Yes | USB PD: 60W or 100W or 240W |
| Full-Featured active (also optical hybrid) | — | Gen 2 | USB 20Gbps (USB 10Gbps deprecated) | 20 Gbit/s | < 5m | Yes | Yes | Yes | Optional | USB PD: 60W or 100W or 240W |
| Full-Featured active (also optical hybrid) | (incl. active TB4) | Gen 3 | USB 40Gbps | 40 Gbit/s | < 5m | Yes | Yes | Yes | Optional TB up to 2m | USB PD: 60W or 100W or 240W |
| Full-Featured active (also optical hybrid) | (incl. active TB5) | Gen 4 | USB 80Gbps | 80 Gbit/s (or asymm.) | < 5m | Yes | Yes | Yes | Optional TB up to 2m | USB PD: 60W or 100W or 240W |
| Full-Featured active (also optical hybrid) | USB3 active | Gen 2 | ? | | < 5m | Yes | Yes | No | Optional | USB PD: 60W or 100W or 240W |
| OIAC | USB3 | Gen 2 | ? | | ≤ 50m | only if optical | Gen 2 only (10 / 20 Gbit/s) | No | Optional | — |
| OIAC | USB4 | Gen 3 | ? | 40 Gbit/s | ≤ 50m | only if optical | Gen 2 only (10 / 20 Gbit/s) | Optional | Optional | — |
| OIAC | USB4 | Gen 4 | ? | 80 Gbit/s (asymm. optional) | ≤ 50m | only if optical | Gen 2 only (10 / 20 Gbit/s) | Optional | Optional | — |
| Thunderbolt 3 | passive | Gen 2 | TB Logo without "3" | 20 Gbit/s | ≤ 2m | Yes | only 5 Gbit/s when > 1m | 20 Gbit/s | Yes | USB PD: 60W or 100W |
| Thunderbolt 3 | passive | Gen 3 | TB Logo + "3" | 80 Gbit/s (or asymm.) | ≤ 0.8m | Yes | Yes | Yes | Yes | USB PD: 60W or 100W |
| Thunderbolt 3 | active | Gen 3 | TB Logo + "3" | | (longest available: 3m) | Yes | (mostly no) | Yes | (mostly no) | USB PD: 60W or 100W |
| Thunderbolt 3 | optical | Gen 3 | TB Logo + "3" | | ? | No | No | Yes | No | — |
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### DP Alt Mode support for USB4 cables

The Type-C specification does not name specific DP speeds that it considers supported for passive cables where support is optional for active cables. The USB-C presentation on DP Alt mode calls out passive full-featured USB-C cables for their DisplayPort support and headroom for future DP speed increases. HBR3 was the highest available DP speed at the time.
Active cables may have additional complications, because the active electronics does not need to operate all high speed wire-pairs in the same direction for normal USB operations (but "80 Gbps" cables are mandated to support asymmetric connections, which includes at least some of the wire-pairs operating in either direction). Active cables can have further limitations, since the active electronics may only support specific signaling modes. There are 2 variants of active electronics. Linear ReDrivers only amplify the signal without any particular signaling mode or encoding in mind. ReTimers explicitly reconstruct the incoming signal for a higher quality result.
TB4 cables, even active ones, at least up to 2m in length, are guaranteed to support DP Alt mode. A specific maximum speed is also not mentioned, but the other requirements for TB4 all refer to DP 1.4 and its maximum speed of HBR3. TB5 renews the same guarantee for "80 Gbps" cables while referencing the DP 2.1 specification (up to UHBR20 speeds).
DP 2.1 aligned itself to the USB4 PHY layer, according to VESA, the creator of DisplayPort. It is unclear how complete this alignment is. However, the UHBR10 DP speed matches USB4 Gen 2 in bit rate and encoding, whereas the UHBR20 DP speed matches USB4 Gen 3 in bit rate and encoding. A USB and DP certification service lists USB Gen 1 cables ("5 Gbps") as supporting UHBR10 speeds, which would fit for having the same requirements as USB4 "20 Gbps" connections.
Anandtech reports that "this also means that DP Alt Mode 2.0 should largely work with USB4-compliant cables, although VESA is being careful to avoid promising compatibility with all cables".
There are linear redrivers and retimers available that are advertised for USB4 Gen 3 speeds and all current DP speeds up to UHBR20 and including UHBR13.5.

## Thunderbolt compatibility
### Thunderbolt 3

The USB4 specification states that a design goal is to "Retain compatibility with existing ecosystem of USB and Thunderbolt products." Compatibility with Thunderbolt 3 is required for USB4 hubs, where this is optional for USB4 hosts and USB4 peripheral devices. Compatible products need to implement 40 Gbit/s mode, at least 15W of supplied power and a different clock. Implementers need to sign the license agreement and register a Vendor ID with Intel.
The USB4 protocol is based on and related to the operating principles of Thunderbolt 3. The USB4 specification simply defines which features to disable, downgrade and which parameters to change to get to an implementation compatible with Thunderbolt 3. This includes, for example: limitation to daisy-chain topology (a hub must expose at most one USB4 DFP), downgrade of DP capabilities to DP 1.2, disabling/replacing the USB3 tunnel with an integrated PCIe-USB3 Host controller attached via PCIe tunnel, switching back to the previous, slightly higher signaling rate of TB3 and its separate way of initiating a connection as an Alt Mode.

### Thunderbolt 4

During CES 2020, USB-IF and Intel stated their intention to allow USB4 products that optionally support any or all of the same functionality as Thunderbolt 4 products. The first products compatible with USB4 were Intel's Tiger Lake processors, with more devices appearing around the end of 2020.
Thunderbolt 4 is an implementation of USB4 "40 Gbps". Thunderbolt 4 mandates some features that are optional in USB4, including backwards compatibility to Thunderbolt 3, minimum PCIe ("32 Gbps") and DP capabilities (2 DP tunnels, "4K60 each", HBR3+DSC).

### Thunderbolt 5

Thunderbolt 5 is an implementation of USB4 "80 Gbps". It mandates even higher minimum PCIe ("64 Gbps") and DP capabilities (2 DP tunnels, "6K60 each", unclear min. DP speed). It also mandates support for asymmetric 120/40 Gbit/s connections from hosts to docks, but does not mention the reverse.

## Pinout

USB4 has 24 pins in a symmetrical USB Type-C shell. USB4 has 12 A pins on the top and 12 B pins on the bottom.
USB4 has two lanes of differential SuperSpeed pairs. Lane one uses TX1+, TX1−, RX1+, RX1− and lane two uses TX2+, TX2−, RX2+, RX2−. USB4 transfers signals at 20 Gbit/s per lane. USB4 also keeps the differential D+ and D− for USB 2.0 transfer.
The CC configuration channels have roles of creating a relationship between attached ports, detecting plug orientation due to the reversible USB Type-C shell, discovering the VBUS power supply pins, determining the lane ordering of the SuperSpeed lanes and, finally, the USB protocol makes the CC configuration channel responsible for entering USB4 operation.
Type-C receptacle A pin layout :
| Pin | Name | Description |
| A1 | GND | Ground return |
| A2 | SSTXp1 ("TX1+") | SuperSpeed differential pair #1, TX, positive |
| A3 | SSTXn1 ("TX1-") | SuperSpeed differential pair #1, TX, negative |
| A4 | V$_{BUS}$ | Bus power |
| A5 | CC1 | Configuration channel |
| A6 | Dp1 | USB 2.0 differential pair, position 1, positive |
| A7 | Dn1 | USB 2.0 differential pair, position 1, negative |
| A8 | SBU1 | Sideband use (SBU) |
| A9 | V$_{BUS}$ | Bus power |
| A10 | SSRXn2 ("RX2-") | SuperSpeed differential pair #4, RX, negative |
| A11 | SSRXp2 ("RX2+") | SuperSpeed differential pair #4, RX, positive |
| A12 | GND | Ground return |
Type-C receptacle B pin layout :
| Pin | Name | Description |
| B12 | GND | Ground return |
| B11 | SSRXp1 | SuperSpeed differential pair #2, RX, positive |
| B10 | SSRXn1 | SuperSpeed differential pair #2, RX, negative |
| B9 | V$_{BUS}$ | Bus power |
| B8 | SBU2 | Sideband use (SBU) |
| B7 | Dn2 | USB 2.0 differential pair, position 2, negative |
| B6 | Dp2 | USB 2.0 differential pair, position 2, positive |
| B5 | CC2 | Configuration channel |
| B4 | V$_{BUS}$ | Bus power |
| B3 | SSTXn2 | SuperSpeed differential pair #3, TX, negative |
| B2 | SSTXp2 | SuperSpeed differential pair #3, TX, positive |
| B1 | GND | Ground return |
* 1 2 There is only a single non-SuperSpeed differential pair in the cable. This pin is not connected in the plug/cable.

## Software support

USB4 is supported by:
* Linux kernel 5.6, released on 29 March 2020
* macOS Big Sur (11.0), released on 12 November 2020
* Windows 11, released with support for USB4 Version 1.0 on 5 October 2021
** upgraded to USB4 Version 2.0 support including 80 Gbit/s around March 2024

### Connection manager

Connection manager is the part of a USB4 host that manages connections across the entire USB4 topology, establishing of tunnels, handling any bandwidth reservations and data prioritization, like which DP tunnels can be established and at what speed. The USB4 driver in Windows 11 implements native OS support of USB4, where the connection manager is part of a driver that only works with matching controllers. Older controllers had the connection manager implemented inside their firmware and thus required far less support from the OS.
On Linux, the USB4 and Thunderbolt driver (named "thunderbolt") supports both firmware-managed and also OS-managed controllers via the same tools.

## Hardware support

Brad Saunders, CEO of the USB Promoter Group, anticipates that most PCs with USB4 will support Thunderbolt 3, but for phones the manufacturers are less likely to implement Thunderbolt 3 support.
On 3 March 2020, Cypress Semiconductor announced new Type-C power (PD) controllers supporting USB4, CCG6DF as dual port and CCG6SF as single port.
In November 2020, Apple unveiled MacBook Air (M1, 2020), MacBook Pro (13-inch, M1, 2020) and Mac mini (M1, 2020), featuring two USB4 ports.
AMD also stated that Zen 3+ (Rembrandt) processors will support USB4 and released products do have this feature after a chipset driver update. However, AMD has only announced support for USB 3.2 Gen 2x2 in Zen 4 processors that were released in September 2022. Intel supported Thunderbolt 3 and USB-C with their 8th generation mobile processors in 2018. For example, the Lenovo P52 has dual TB3 ports on the rear. TB/USB has evolved as Intel is able to refine logic design.
Known USB4 Controllers :
| Manufacturer | Controller | Family | Type | native managed | USB4 ver. | Speed Gbit/s | USB4 Ports (up / down) | DP In / out protocol adapters | USB3 Gbit/s | PCIe | TB3 compat. | Other ports | Certified |
| Intel | JHL8540 | Maple Ridge | Host | No | 01 | 040 | 2 dn | 2 in DP 1.4 (up to HBR3) | 10 (integ. ctrl.) | x4 Gen 3 ("32 Gbit/s") | Yes | — | TB4 |
| Intel | JHL8440 | Goshen Ridge | Hub / Peri. | — | 01 | 040 | 1 up, 3 dn | 2 out DP 1.4 (up to HBR3) | 10 (hub, integ. ctrl.) | (32 Gbit/s) | Yes | PCIe x1 Gen 3 dn, 1 USB3 dn | TB4 |
| Intel | JHL8140 | Hoover Ridge | Peri. | — | 01 | 040 | 1 up | 2 out DP 1.4 (up to HBR3) | 10 (hub, integ ctrl.) | — | Yes | 3 USB3/DP down, 1 USB3 dn | TB4 |
| Intel | JHL9450 | Barlow Ridge | Host | Yes | 02 | 040 | 2 dn | 3 in DP 2.1 (up to UHBR10, +UHBR20) | 20 (integ. ctrl.) | x4 Gen 4 ("64 Gbit/s") | Yes | 1 DP out | TB4 |
| Intel | JHL9440 | Barlow Ridge | Hub / Peri. | — | 02 | 040 | 1 up, 3 dn | 3 out 2 in DP 2.1 (up to UHBR10, +UHBR20) | 20 (hub, integ. ctrl.) | x4 Gen 4 ("64 Gbit/s") | Yes | 2 DP in, 1 USB3 dn | TB4 |
| Intel | JHL9580 | Barlow Ridge | Host | Yes | 02 | 080 | 2 dn | 3 in DP 2.1 (up to UHBR10, +UHBR20) | 20 (integ. ctrl.) | x4 Gen 4 ("64 Gbit/s") | Yes | 1 DP out | TB5 |
| Intel | JHL9480 | Barlow Ridge | Hub / Per. | — | 02 | 080 | 1 up, 3 dn | 3 out 2 in DP 2.1 (up to UHBR10, +UHBR20) | 20 (hub, integ. ctrl.) | x4 Gen 4 ("64 Gbit/s") | Yes | 2 DP in, 1 USB3 dn | TB5 |
| Intel | Tiger Lake | CPU-integrated | Host | No | 01 | 040 | up to 2 + 2 dn | 2 in/group: up to HBR3 | 10 | (32 Gbit/s) | Yes | — | TB4 |
| Intel | Alder Lake | CPU-integrated | Host | Yes | 01 | 040 | up to 2 + 2 dn | 2 in/group: up to HBR3 | 10 | — | Yes | — | TB4 |
| Intel | Raptor Lake | CPU-integrated | Host | Yes | 01 | 040 | up to 2 + 2 dn | 2 in/group: up to HBR3 | 10 (20 internal) | — | Yes | native output: DP UHBR10, +UHBR20, USB3 20G | TB4 |
| Intel | Meteor Lake | CPU-integrated | Host | Yes | ? | 040 | up to 2 + 2 dn | 2 in/group: up to HBR3 | 20 | — | Yes | native output: DP UHBR10, +UHBR20 | TB4 |
| Intel | Lunar Lake | CPU-integrated | Host | Yes | ? | 040 | up to 2 +1 dn | 2 in/group: up to HBR3 | 20 | — | Yes | native output: DP UHBR10, +UHBR20 | TB4 |
| Intel | Arrow Lake | CPU-integrated | Host | Yes | ? | 040 | 2 dn | 2 in/group: up to HBR3 | 20 | — | Yes | native output: DP UHBR10, +UHBR20 | TB4 |
| AMD | AMD CPU-integrated | — | Host | Yes | 01 | 040 | up to 1+1 dn | 2 in/port up to HBR3 | 10 | — | Yes | native output: DP UHBR10 | ? |
| Apple | M1/2 | Apple USB4/TB3 | Host | ? | 01 | 040 | ? | 1 in/port up to HBR3 | 10 | — | Yes | — | TB3 |
| Apple | M1-3 Pro, Max, M4 | Apple TB4 | Host | ? | 01 | 040 | ? | 2 in/port up to HBR3 | 10 | — | Yes | — | TB4 |
| Apple | M4 Pro/Max | Apple TB5 | Host | ? | 02 | 080 | ? | 2 in/port up to UHBR10, +UHBR20 | 10 | — | Yes | — | TB5 |
| Via | VL830 | — | Peri. | — | 01 | 040 | 1 up | 1 out: DP 1.4 (up to HBR3) | 10 (hub) | No | No | 5 USB3 dn, 1 USB2 dn | — |
| Via | VL832 | — | Peri. | — | 01 | 040 | 1 up | 1 out: DP 1.4 (up to HBR3) | 10 (hub) | No | No | 5 USB3 dn, 1 USB2 dn | USB4 |
| Asmedia | ASM2464PD | — | Peri. / NVMe | — | 01 | 040 | 1 up | — | 20 (peripheral) | x4 Gen 4 ("64 Gbit/s") | Yes | (USB3 NVMe ctrl., only integ. PD) | USB4, TB4 |
| Asmedia | ASM2464PDX | — | Peri. / NVMe | — | 01 | 040 | 1 up | — | 20 (peripheral) | x4 Gen 4, (bifurcat. x1) | Yes | (USB3 NVMe ctrl.) | ? |
| Asmedia | ASM4242 | — | Host | Yes | 01 | 040 | 2 dn | 2 in: DP 1.4 (up to HBR3) | 20 (integ. ctrl.) | x4 Gen 4 ("64 Gbit/s") | Yes | — | USB4, TB4 |
| Realtek | RTX5490 | — | Peri. / Hub | — | 2? | 040 | 2 dn | USB4 up/dn: UHBR20, ? | 20 (hub, integ. ctrl.) | ? | Yes | 2 USB3 20G, 1 DP UHBR20 | — |
* 1 2 3 4 5 6 7
* 1 2
* 1 2 3
* 1 2 3
* 1 2 3