# Loongson

Loongson (simplified Chinese: 龙芯; traditional Chinese: 龍芯; pinyin: Lóngxīn; lit. 'Dragon Core') is the name of a family of general-purpose, MIPS architecture-compatible, later in-house LoongArch architecture microprocessors, as well as the name of the Chinese fabless company (Loongson Technology) that develops them. The processors are alternately called Godson processors, which is described as its academic name.

## History

The Godson processors, based on MIPS architecture, were initially developed at the Institute of Computing Technology (ICT), Chinese Academy of Sciences (CAS). The chief architect was Hu Weiwu [zh]. The development of the first Loongson chip was started in 2001. The aim of the Godson project was to develop "high performance general-purpose microprocessors in China", and to become technologically self-sufficient as part of the Made in China 2025 plan. The development was supported by funding via the Chinese Communist Party's 10th and 11th Five-Year Plans.
In 2010 the company was commercialized as a separate entity, and in April 2010 Loongson Technology Corporation Limited was formally established and settled in Zhongguancun, Beijing, China. The company is a public–private partnership between ICT and Beijing-based chip designer BLX IC Design Corporation. BLX itself was a spin-off from ICT, and was founded in 2002 with Jiangsu Zhongyi Group. As Loongson is a fabless designer, at least some processors were fabricated and marketed by STMicroelectronics.
The South China Morning Post reported that since 2020 Loongson has been partnering with UnionTech and Sunway to develop and promote the Debian-Linux-based Deepin operating system in order to reduce China's dependency on Microsoft Windows.
In 2021, Loongson filed for an initial public offering on the Shanghai Stock Exchange STAR Market. The company was seeking to raise US$500 million. Details from this IPO suggested Loongson had needed RMB 400 million annual funding in its first 10 years of existence and that the company had only broken even in 2015.
In April 2024 Loongson processors got a large boost when a school district in the city of Hebi commenced a trial of 10,000 PCs powered by computers featuring the Loongson 3A5000 processor and the Deepin-based Unity Operating System. According to The Register, this trial project is to be used to promote the use of Loongson-and-Linux computers within the Chinese school system, which could potentially result in 50 million Loongson-based computers being sold to Chinese schools every year until 2030.

### U.S. sanctions

In March 2023, the United States Department of Commerce added Loongson to the Bureau of Industry and Security's Entity List for acquisition of American technology to support the People's Liberation Army (PLA).

## Instruction set architectures
### MIPS

Loongson began by using the MIPS64 instruction set architecture (ISA). The internal microarchitecture was independently developed by ICT. Early implementations of the family lacked four instructions patented by MIPS Technologies (US4814976A, unaligned load-store) to avoid legal issues.
In 2007, a deal was reached by MIPS Technologies and ICT. STMicroelectronics bought a MIPS license for Loongson, and thus the processor can be promoted as MIPS-based or MIPS-compatible instead of MIPS-like.
In June 2009, ICT licensed the MIPS32 and MIPS64 architectures directly from MIPS Technologies.
In August 2011, Loongson Technology Corp. Ltd. licensed the MIPS32 and MIPS64 architectures from MIPS Technologies, Inc. for continued development of MIPS-based Loongson CPU cores.
In January 2024, Loongson won a case over rights to use MIPS architecture.

### LoongISA

The Loongson 3A2000 in 2015 saw the adoption of LoongISA 1.0, an expanded instruction set that is a superset of MIPS64 release 2. It can be broken down into:
* LoongEXT, general-purpose extensions, 148 instructions
* LoongVZ, virtualisation extensions to the "VZ" system introduced in MIPS64 release 5, 5 instructions
* LoongBT, faster x86 and ARM binary translation, 213 instructions
* LoongSIMD, formerly LoongMMI (in Loongson 2E/F), for 128-bit SIMD, 1014 instructions
* MIPS SIMD Architecture (MSA), DSP, and VZ modules from MIPS Release 5
The LoongISA instructions were introduced as part of the GS464E cores. The binary translation instructions have the specific benefit of speeding up Intel x86 CPU emulation at a cost of 5% of the total die area. The new instructions help a QEMU hypervisor translate instructions from x86 to MIPS with only a reported 30% performance penalty.

### LoongArch

Loongson moved to their own processor instruction set architecture (ISA) in 2021 with the release of the Loongson 3 5000 series. A Loongson developer described it as "...a new RISC ISA, which is a bit like MIPS or RISC-V. LoongArch includes a reduced 32-bit version (LA32R), a standard 32-bit version (LA32S) and a 64-bit version (LA64)". The stated rationale was to make Loongson and China not dependent on foreign technology or authorisation to develop their processor capability, whilst not infringing on any technology patents.
The ISA has been referred to as "a fork of MIPS64r6" due to a perceived lack of changes judging from instruction listings. The Register reported in November 2021 that LoongArch might combine the best parts of MIPS and RISC-V, along with custom instructions.

## Cores

Loongson has three main families of processor cores, some of which are available as IP cores:
* GS464 series: MIPS64 core with four-way superscalar out-of-order issue. The design originated from the Loongson 2F processor. It was first widely used in the Loongson 3A processor, before also being used in the Loongson 2 series.
** GS464V was first introduced in 2010 with the Godson 3B, and is a GS464 with vector capabilities.
** GS464E is an improved version of the GS464. Development had started in 2012 after shortcomings were found in the GS464 processor. The core has multiple improvements, including larger caches and better branch prediction amongst others, and was better optimised. The core was extended to support LoongISA (extending the MIPS64 R2 architecture).
** GS464EV is a development of the GS464 series, first used by the 3A4000 processor
** LA464 is the development of the GS464 to support LoongArch. Whilst the initial core of the 3A5000 was noted to be GS464, due to incompatible instruction sets Loongson renamed the 3A5000 core to LA464 in their documentation in August 2021.
** LA664 is the architecture for the 3A6000 series processors.
It has been noted by the community that the naming of the Loongson microarchitectures is not consistent, with different products being noted to have the same processor core, even though the instructions sets might not be exactly compatible.

## Processor families

Loongson has built 3 processor families from their architectural cores. These are the:
* Godson-1, for consumer electronics and embedded applications
* Godson-2, single core processors for embedded applications and low performance personal computers
* Godson-3, multi-core processors for higher performance computers, high-performance computing and servers

### Godson-1

The first Loongson processor, the Godson-1, was designed in 2001, released in 2002, and is a 32-bit CPU running at a clock speed of 266 MHz. It is fabricated with 0.18 micron CMOS process, has 8 KB of data cache, 8 KB of instruction cache and a 64-bit floating-point unit, capable of 200 double-precision MFLOPS. Godson-1 series chips either use the GS132 or GS232 cores.
Loongson X is a radiation hardened version of the GS232 core used in the Godson-1.

### Godson-2 / Loongson 2

The Loongson 2 is a family of MIPS III compatible processors. It adds 64-bit ability to the Loongson architecture. Later Loongson 2 processors migrated to being MIPS64 compatible, due to sharing the GS464 core with the Loongson 3 series.
The development plan for the Godson-2 was to develop it from a CPU to a SOC. The 2E (2006) was a CPU, the 2F (2007) integrated the north bridge, the 2G (2008) had a hyper transport link between the CPU/north bridge and an integrated GPU/south bridge, and the 2H (2009) integrated all these functions into a SOC. The design of the 2F was the basis of the GS464 core. The 2G uses a single GS464 core; the 2H uses the GS464V core, as a single-core version of the initial Godson 3B.

### Godson 3 / Loongson 3 MIPS processors

The Loongson 3 family of processors are "...multi-core CPU[s] designed for high performance desktops, servers and clusters". They were designed as the first Loongson processors that had multiple cores. The processors were initially designed to use LoongISA - i.e. the MIPS64 release 2 ISA with additional extensions. The designers also attempted to optimise x86 translation on the chip.

#### 1000 series

The first production processor was the Loongson 3A, which used 4 GS464 cores.
The designers noted that they would produce a 3B chip with enhanced processing and vector capabilities, with 8 cores, and a 3C for server applications with up to 16 cores. The 8-core Loongson 3B was noted to use the upgraded GS464V core, with extended vector capabilities. This was followed by the Loonson 3C which used 16 GS464V cores.
The 3B1000, and related 2I, both failed as processors due to design errors. In May 2013 development of the 3C was suspended, in favour of developing the 3A2000 processor.

#### 1500 and 2000 series

In 2015, the 3A1500 and 3B2000 were released using the enhanced GS464E cores. The improved microarchitecture core allowed better performance, reportedly 3 times as fast as the 3A1000, as well as introducing the LoongISA enhanced instruction set. The 3A1500 was for embedded applications, whilst the 3B2000 was for servers and PCs.

#### 3000 series

In 2017, Loongson released the 3A3000. The performance of the 3A3000 is reported to be equivalent to the Intel J1900 processor (released in 2013).

#### 4000 series

In late-2019 the 3A and 3B 4000 series were released. They used the upgraded GS464EV microarchitecture.

### Loongson 3 LoongArch processors
#### 5000 series, transition to LoongArch

In July 2021 the Loongson 3 5000 series was released. The processor series was Loongson's first with their own developed instruction set architecture (ISA), called "LoongArch". The processors announced included the 3A5000, a four-core desktop CPU, and the 3C5000L, a sixteen-core server CPU based on four 3A5000 in a single package. Both CPUs were reported to be fabricated on a 12 nm process. Whilst the processor was noted to be using the GS464V cores initially, due to incompatibility with previous versions, the cores were renamed to LA464 in August 2021.
The Register reported that "the 3A5000 is said to be 50% faster and 30% more power efficient" than the preceding 3A4000. Phoronix reported that the 3A5000 CPU was "roughly on a par with the likes of the Intel Core i3 8109U / Core 2 Quad Q9500 / Core i5 750 (roughly the state of the art in 2008), or Armv8-based Phytium FT-2000".
In April 2023, Loongson launched the 3D5000 processor for data centers and cloud computing, based on the LoongArch instruction set architecture.

#### 6000 series

In 2022 Loongson announced their 6000 series processors. The company said that the updated processor architecture would use new "LA664" cores and that the single-core performance would rival that of AMD's Zen 3 and Intel's Tiger Lake (11th-generation Core) architecture (launched in 2020).
In November 2023 Loongson debuted the 3A6000 processor. The processor is fabricated using a 14nm or 12nm process and supports the fairly old DDR4 standard for memory. The Register reported that Loongson had demonstrated benchmarks suggesting that the 3A6000 processor was competitive with an Intel 10th-generation Core processor (launched in 2019).
According to reports, Loongson's 3C6000 was to become available in the fourth quarter of 2024. The CPU is a monolithic chip with 16 cores; it features the LA664 proprietary MIPS-derived microarchitecture supporting simultaneous multithreading technology (SMT). The 3C6000 processor features four DDR4-3200 memory interfaces. According to reports, the CPU's performance supposedly compares to that of Intel's 16-core Xeon Silver 4314 processor, which was released in the second quarter of 2021.

#### 7000 series

In 2024, Loongson reportedly began its transition to the 7nm process, which was said to potentially provide a 20% to 30% increase in performance to the 3A7000 CPU. The 7nm chips, which could go on sale in 2025, will probably be produced entirely in China, due to US sanctions.

## Supported software
### Operating systems

The Loongson processors are mainly designed around using the Linux operating system. Any operating system supporting the MIPS architecture should theoretically work. Windows CE was ported to a Loongson-based system with minimal effort. In 2010, Lemote ported an Android distribution to the Loongson platform.
Loongson machines are used in the package-building and CI infrastructure of Debian and Golang, respectively. This is partially because of Loongson's status as the only vendor producing application-grade MIPS CPUs for retail.
As of February 2022, there are at least four Chinese Linux distributions that support LoongArch: Kylin, Loongnix, Deepin and Unity Operating System. There are efforts to build LoongArch support into community versions of Linux.
Since 2022, OpenHarmony, a Chinese operating system similar to Android, supports LoongArch.

### Compiler support

The GNU Compiler Collection (GCC) is the main compiler for software development on the Loongson platform.
Before 2021 LLVM support was still inadequate due to missing workarounds for Loongson's CPU errata on MIPS.
ICT also ported Open64 to the Loongson II platform.
LoongArch is supported by the GCC, LLVM, Golang compilers, and supports the Java, JavaScript and .NET virtual machines.

## Loongson microprocessor specifications

| Series | Model | Frequency (MHz) | Architecture | MicroArchitecture | Year | Cores | Process (nm) | Transistor (million) | Die Size (mm²) | Power (W) | Voltage (V) | Cache (KiB) | Cache (KiB) | Cache (KiB) | Cache (KiB) | Peak Floating Point Performance (GFLOPS) | Performance int/fp [SPEC2000] (SPEC2006) | Remarks |
| Series | Model | Frequency (MHz) | Architecture | MicroArchitecture | Year | Cores | Process (nm) | Transistor (million) | Die Size (mm²) | Power (W) | Voltage (V) | L1(Single Core) | L1(Single Core) | L2 | L3 | Peak Floating Point Performance (GFLOPS) | Performance int/fp [SPEC2000] (SPEC2006) | Remarks |
| Series | Model | Frequency (MHz) | Architecture | MicroArchitecture | Year | Cores | Process (nm) | Transistor (million) | Die Size (mm²) | Power (W) | Voltage (V) | Data | instruction | L2 | L3 | Peak Floating Point Performance (GFLOPS) | Performance int/fp [SPEC2000] (SPEC2006) | Remarks |
| Godson | 1 | 266 | MIPS-II 32-bit | — | 2001 | 1 | 180 | 22 | 71.4 | 1.0 | Un­known | 8 | 8 | — | — | 0.6 | [19/25] | |
| Godson | FCR_SOC | 266 | MIPS-II 32-bit | — | 2007 | 1 | 180 | Un­known | Un­known | Un­known | Un­known | 8 | 8 | — | — | 0.6 | Un­known | |
| Godson | 2B | 250 | MIPS-III 64-bit | — | 2003 | 1 | 180 | Un­known | Un­known | Un­known | Un­known | 32 | 32 | — | — | Un­known | [52/58] | |
| Godson | 2C | 450 | MIPS-III 64-bit | — | 2004 | 1 | 180 | 13.5 | 41.5 | Un­known | Un­known | 64 | 64 | — | — | Un­known | [159/114] | |
| Godson | 2E | 1000 | MIPS-III 64-bit | GS464 (r1)(Prototype) | 2006 | 1 | 90 | 47 | 36 | 7 | 1.2 | 64 | 64 | 512 | — | Un­known | [503/503] | |
| Loongson 1 | 1A | 300 | MIPS32 | GS232 | 2010 | 1 | 130 | 22 | 71.4 | 1.0 | Un­known | 16 | 16 | — | — | 0.6 | Un­known | |
| Loongson 1 | 1B | 266 | MIPS32 | GS232 | 2010 | 1 | 130 | 13.3 | 28 | 0.6 | Un­known | 8 | 8 | — | — | Un­known | Un­known | |
| Loongson 1 | 1C | 300 | MIPS32 | GS232 | 2013 | 1 | 130 | 11.1 | 28.3 | 0.5 | Un­known | 16 | 16 | — | — | Un­known | Un­known | |
| Loongson 1 | 1C101 | 8 | MIPS32 | GS132R | 2018 | 1 | 130 | Un­known | Un­known | Un­known | Un­known | — | — | — | — | Un­known | Un­known | |
| Loongson 1 | 1D | 8 | MIPS32 | GS132 | 2014 | 1 | 130 | 1 | 6 | 3 × 10$^{−5}$ | Un­known | — | — | — | — | Un­known | Un­known | |
| Loongson 2 | 2F | 1200 | MIPS-III 64-bit | GS464 (r1) | 2007 | 1 | 90 | 51 | 43 | 5 | 1.2 | 64 | 64 | 512 | — | 3.2 | Un­known | |
| Loongson 2 | 2G | 1000 | MIPS64 | GS464 (r2) | 2012 | 1 | 65 | Un­known | Un­known | Un­known | 1.15 | 64 | 64 | 4096 | — | Un­known | Un­known | |
| Loongson 2 | 2GP | 800 | MIPS64 | GS464 (r2) | 2013 | 1 | 65 | 82 | 65.7 | 8 | 1.15 | 64 | 64 | 1024 | — | 3.2 | Un­known | |
| Loongson 2 | 2I | 800 | MIPS64 | GS464 (r2) | 2013 | 1 | 65 | 82 | 65.7 | 8 | 1.15 | 64 | 64 | 1024 | — | 3.2 | Un­known | |
| Loongson 2 | 2H | 1000 | MIPS64 | GS464 (r2) | 2012 | 1 | 65 | 152 | 117 | 5 | 1.15 | 64 | 64 | 512 | — | 4 | Un­known | |
| Loongson 2 | 2K1000 | 1000 | MIPS64 Release 2 LoongISA 1.0 | GS264E | 2017 | 2 | 40 | 1900 | 79 | 5 | 1.1 | 32 | 32 | 256 × 2 | 1024 | 8 | Un­known | |
| Loongson３ | 3A1000 | 1000 | MIPS64 Release 2 LoongISA 1.0 | GS464 (r2) | 2009 | 4 | 65 | 425 | 174.5 | 10 | 1.15 | 64 | 64 | 256 × 4 | — | 16 | [568/788], (2.4/2.3) | |
| Loongson３ | 3B1000 | 1000 | MIPS64 Release2 LoongISA 1.0 | GS464 (r2) | 2010 | 4+4 | 65 | ＞ 600 | Un­known | 20 | 1.15 | 64 | 64 | 128 × 8 | — | Un­known | Un­known | |
| Loongson３ | 3B1500 | 1200–1500 | MIPS64 Release 2 LoongISA 1.0 | GS464V | 2012 | 4+4 | 32 | 1140 | 142.5 | 30(typical) 60(vector) | 1.15–1.35 | 64 | 64 | 128 × 8 | 8192 | 150 | Un­known | |
| Loongson３ | 3A1500-I | 800–1000 | MIPS64 Release2 LoongISA 1.0 | GS464E | 2015 | 4 | 40 | 621 | 202.3 | 15 | 1.15–1.25 | 64 | 64 | 256 × 4 | 4096 | 16 | (6/??) | |
| Loongson３ | 3A2000 | 800–1000 | MIPS64 Release2 LoongISA 1.0 | GS464E | 2015 | 4 | 40 | 621 | 202.3 | 15 | 1.15–1.25 | 64 | 64 | 256 × 4 | 4096 | 16 | (6/??) | |
| Loongson３ | 3B2000 | 800–1000 | MIPS64 Release2 LoongISA 1.0 | GS464E | 2015 | 4 | 40 | 621 | 202.3 | 15 | 1.15–1.25 | 64 | 64 | 256 × 4 | 4096 | 16 | (6/??) | |
| Loongson３ | 3A3000 | 1500 | MIPS64 Release 2 LoongISA 1.0 | GS464E | 2016 | 4 | 28 | ＞ 1200 | 155.78 | 30 | 1.15–1.25 | 64 | 64 | 256 × 4 | 8192 | 24 | [1100/1700], (11/10)@Single (36/33)@Rate | |
| Loongson３ | 3B3000 | 1500 | MIPS64 Release 2 LoongISA 1.0 | GS464E | 2016 | 4 | 28 | ＞ 1200 | 155.78 | 30 | 1.15–1.25 | 64 | 64 | 256 × 4 | 8192 | 24 | [1100/1700], (11/10)@Single (36/33)@Rate | |
| Loongson３ | 3A4000 | 1800-2000 | MIPS64 Release 5 LoongISA 2.0 | GS464EV(GS464v) | 2019 | 4 | 28 | ? | ? | <30 W@1.5 GHz <40 W@1.8 GHz <50 W@2.0 GHz | 0.95-1.25 | 64 | 64 | 256 x 4 | 8192 | 128 | (21.1/21.2)@Single (61.7/58.1)@Rate | |
| Loongson３ | 3B4000 | 1800-2000 | MIPS64 Release 5 LoongISA 2.0 | GS464EV(GS464v) | 2019 | 4 | 28 | ? | ? | <30 W@1.5 GHz <40 W@1.8 GHz <50 W@2.0 GHz | 0.95-1.25 | 64 | 64 | 256 x 4 | 8192 | 128 | (21.1/21.2)@Single (61.7/58.1)@Rate | |
| Loongson３ | 3A5000 3B5000 | 2300-2500 | LoongArch | GS464V | 2021 | 4 | 12 / 14 | | | 35w @ 2.5 GHz | | 64 | 64 | 256x4 | 16384 | 160 | (26.6*/??)@Single, (80*/??)@Rate *SpecInt Base point | |
| Loongson３ | 3C5000L | 2200 | LoongArch | GS464V | 2021 | 16 | 12 / 14 | | | 150w @ 2.2 GHz | | 64 | 64 | 256x16 | 16384x4 | 560 | Unknown | |
| Loongson３ | 3C5000L-LL | 2000 | LoongArch | GS464V | 2021 | 16 | 12 / 14 | | | 125w @ 2.0 GHz | | 64 | 64 | 256x16 | 16384x4 | 512 | Unknown | |
| Loongson３ | 3A6000 | 2000-2500 | LoongArch | LA664 | 2023 | 4 | 12 | | | 38w @ 2.5 GHz | | 64 | 64 | 256x4 | 16384 | | | |
| Loongson３ | 3C6000 | 1800-2300 | LoongArch | LA664 | 2024 | 16 | 12 | | | | | | | | 32768 | | | |
| Loongson３ | 3D6000 | 1600-2100 | LoongArch | LA664 | 2024 | 32 | 12 | | | | | | | | 65536 | | | |
| Loongson３ | 3E6000 | | LoongArch | LA664 | 2024 | 64 | 12 | | | | | | | | 131072 | | | |
| Loongson３ | 3B6600 | 3000 | LoongArch | LA864 + LG200 | 2025 | 8 | 7 | | | | | | | | 16384 | | | |
| Loongson３ | 3A7000 | | LoongArch | LA864 | 2025 | 8 | 7 | | | | | | | | 16384 | | | |
| Loongson３ | 3B7000 | 3500 | LoongArch | LA864 | 2025 | 16 | 7 | | | | | | | | 32768 | | | |
| Loongson３ | 3C7000 | | LoongArch | LA864 | 2025 | 16 | 7 | | | | | | | | 32768 | | | |
| Loongson３ | 3D7000 | | LoongArch | LA864 | 2025 | 32 | 7 | | | | | | | | 65536 | | | |
| Loongson３ | 3E7000 | | LoongArch | LA864 | 2025 | 64 | 7 | | | | | | | | 131072 | | | |

## Loongson-based systems

In 2012 it was reported that Loongson processors had found itself into very few computing systems. The processors are mainly used in Chinese computers; in 2021 it was reported that Loongson supplies CPUs for most desktop computers procured by the Chinese government, and 80% of the Chinese government's servers. The release of the 3A3000 processor in 2015 was noted as turning point for the company's fortunes. In 2017 it was noted that the company's processors were being used in the Beidou satellite.

### Personal computers

In March 2006, a €100 Loongson II computer design called Longmeng (Dragon Dream) was announced by Lemote.
In June 2006 at Computex'2006, YellowSheepRiver announced the Municator YSR-639, a small form factor computer based on the 400 MHz Loongson 2.
As of November 2008 the new 8.9" netbook from the Chinese manufacturer Lemote that replaced mengloong, Yeeloong (Portable Dragon), running Debian, is available in Europe from the Dutch company Tekmote Electronics.
In January 2010, Jiangsu province planned to buy 1.5 million Loongson PCs.
In September 2011, Lemote announced the Yeeloong-8133 13.3" laptop featuring 900 MHz, quad-core Loongson-3A/2GQ CPU.

### Supercomputers

On 26 December 2007, China revealed its first Loongson based supercomputer in Hefei. The KD-50-I has a reported peak performance of 1 TFLOPS, and about 350 GFLOPS measured by LINPACK. This supercomputer was designed by a joint team led by Chen Guoliang at the computer science technology department of the University of Science and Technology of China (USTC) and ICT (the secondary contractor). KD-50-I is the first Chinese built supercomputer to utilize domestic Chinese CPUs, with a total of more than 336 Loongson-2F CPUs, and nodes interconnected by ethernet. The size of the computer was roughly equivalent to a household refrigerator and the cost was less than RMB800,000 (approximately US$120,000, €80,000).
In 2012 it was reported that Loongson processors were to be found in the Sunway BlueLight MPP and Dawning 6000 supercomputers.