# IBM Z

IBM Z is a family name used by IBM for all of its z/Architecture mainframe computers. In July 2017, with another generation of products, the official family was changed to IBM Z from IBM z Systems; the IBM Z family will soon include the newest model, the IBM z17, as well as the z16, z15, z14, and z13 (released under the IBM z Systems/IBM System z names), the IBM zEnterprise models (in common use the zEC12 and z196), the IBM System z10 models (in common use the z10 EC), the IBM System z9 models (in common use the z9EC) and IBM eServer zSeries models (in common use refers only to the z900 and z990 generations of mainframe).

## Architecture

The zSeries, zEnterprise, System z and IBM Z families were named for their availability – z stands for zero downtime. The systems are built with spare components capable of hot failovers to ensure continuous operations.
The IBM Z family maintains full backward compatibility. In effect, current systems are the direct, lineal descendants of the System/360, announced in 1964, and the System/370 from the 1970s. Many applications written for these systems can still run unmodified on the newest IBM Z system.

### Virtualization

Virtualization is required by default on IBM Z systems. First layer virtualization is provided by the Processor Resource and System Manager (PR/SM) to deploy one or more Logical Partitions (LPARs). Each LPAR supports a variety of operating systems. A hypervisor called z/VM can also be run as the second layer virtualization in LPARs to create as many virtual machines (VMs) as there are resources assigned to the LPARs to support them. The first layer of IBM Z virtualization (PR/SM) allows a z machine to run a limited number of LPARs (up to 80 on the IBM z13). These can be considered virtual "bare metal" servers because PR/SM allows CPUs to be dedicated to individual LPARs. z/VM LPARs allocated within PR/SM LPARs can run a very large number of virtual machines as long as there are adequate CPU, memory, and I/O resources configured with the system for the desired performance, capacity, and throughput.
IBM Z's PR/SM and hardware attributes allow compute resources to be dynamically changed to meet workload demands. CPU and memory resources can be non-disruptively added to the system and dynamically assigned, recognized, and used by LPARs. I/O resources such as IP and SAN ports can also be added dynamically. They are virtualized and shared across all LPARs. The hardware component that provides this capability is called the Channel Subsystem. Each LPAR can be configured to either "see" or "not see" the virtualized I/O ports to establish desired "shareness" or isolation. This virtualization capability allows significant reduction in I/O resources because of its ability to share them and drive up utilization.
PR/SM on IBM Z has earned Common Criteria Evaluation Assurance Level (EAL) 5+ security certification, and z/VM has earned Common Criteria EAL4+ certification.
The KVM hypervisor from Linux has also been ported.

## List of models (reverse chronological order)

Since the move away from the System/390 name, a number of IBM Z models have been released. These can be grouped into families with similar architectural characteristics.

### IBM z17

The IBM z17 mainframe's Telum II processor was unveiled at Hot Chips 2024. The new architecture is expected to focus on AI acceleration and optimization. The Telum II's 43B transistor die features an on-chip DPU, and offers marginal improvements over the z16's Telum processor, with a similar architecture, including support for OpenCAPI.

### IBM z16

The IBM z16 mainframe, based on the Telum processor, was introduced on April 5, 2022. The instructions for AI and neural nets are described in a new edition of the z/Architecture Principles of Operation.

### IBM z15

* IBM z15 (8561) mainframe based on the z15 chip was introduced on September 12, 2019.
* IBM z15 Technical Introduction
* IBM z15 Technical Guide

### IBM z14

The dual frame z14, launched in July 2017, and the single frame launched in April 2018, are based on the z14 chip, a 5.2 GHz 10-core processor. A z14 system can have a maximum of 240 Processing Unit (PU) cores, 170 of which can be configured to the customer's specification to run applications and operating systems, and up to 32 TB usable redundant array of independent memory (RAIM), some of which can be configured as Virtual Flash Memory (VFM). Each PU can be characterized as a Central Processor (CP), Integrated Firmware Processor (IFP), Integrated Facility for Linux (IFL) processor, Integrated Information Processor (zIIP), Internal Coupling Facility (ICF) processor, additional System Assist Processor (SAP) or as a spare. The focus of the IBM Z systems are pervasive encryption as the z14 processor has plenty of hardware assisted cryptography features (AES, DES, TDES, SHA, Random number generator).

### IBM z13

Launched on January 13, 2015, the z13 is based on the z13 chip, a 5 GHz 8-core processor. A z13 system can have a maximum of 168 Processing Unit (PU) cores, 141 of which can be configured to the customer's specification to run applications and operating systems, and up to 10.144 TiB (usable) of redundant array of independent memory (RAIM). Each PU can be characterized as a Central Processor (CP), Integrated Firmware Processor (IFP), Integrated Facility for Linux (IFL) processor, z Integrated Information Processor (zIIP), Internal Coupling Facility (ICF) processor, additional System Assist Processor (SAP) or as a spare. The z Application Assist Processor (zAAP) feature of previous z/Architecture processors is now an integrated part of the z13's zIIP.
The z Systems z13s (2965 series) was introduced on February 17, 2016
The z13 and z13s introduce a new vector architecture and are the last z Systems servers to support running an operating system in ESA/390 architecture mode.

### IBM zEnterprise System

This line has two generations: first generation, released in 2010/2011 with 114 single-rack ("business class") and 196 ("Enterprise class") models; and released in 2012/2013 second generation, branded as generation 12 of main line, and released with two model lines: single-rack zBC12 and dual-rack zEC12.

#### zEnterprise gen2 (zBC12 and zEC12)

On April 8, 2014, in honor of the 50th anniversary of the System/360 mainframe, IBM announced the release of its first converged infrastructure solution based on mainframe technology. Dubbed the IBM Enterprise Cloud System, this new offering combines IBM mainframe hardware, software, and storage into a single system and is designed to compete with competitive offerings from VCE, HP, and Oracle. According to IBM, it is the most scalable Linux server available with support for up to 6,000 virtual machines in a single-footprint.
In June 2014, IBM announced it had shipped its first Enterprise Cloud System to Vissensa, a UK-based managed service provider.
   zEnterprise Business Class 12 – The zBC12 is an entry-level single-rack solution, was introduced in July 2013 and is available in two hardware models, the H06 and the H13. It's designed to serve the mid-range business segment and can be configured to be a Linux virtualization server, in a version called the Enterprise Linux Server. The H13 has 18 processor cores, with up to 13 configurable. The H06 has nine, with up to six configurable.
zBC12 models :
| Model | CPs | IFLs | zAAPs / zIIPs | ICFs | SAPs | IFPs | Spares | zBX | Memory (GB) |
| H06 | 0–6 | 0–6 | 0–4 / 0–4 | 0–6 | 2 | 1 | 0 | 0–1 | 8–240 |
| H13 | 0–6 | 0–13 | 0–8 / 0–8 | 0–13 | 2 | 1 | 2 | 0–1 | 16–496 |
Introduced in July 2013, the zEnterprise BC12 is based on an upscaled z114, running 18 zEC12 processors at 4.2 GHz and up to 489 GB RAM. It is available in two models, the H06 and the H13 with one and two processing drawers respectively. The zBC12 can connect to the zBX expansion system. IBM is offering a special version of the zBC12 called the Enterprise Linux Server, running only Linux hosts on top of its z/VM hypervisor, targeting large migrations from x86-based Linux installations.
   zEnterprise Enterprise Class 12 – The zEC12 is a high-end dual-rack solution, and available in five hardware models: H20, H43, H66, H89 and HA1. The model number is based on the number of cores available for customer workloads. Additional cores are reserved as spares, SAPs and IFPs.
zEC12 models :
| Model | CPs | IFLs | zAAPs / zIIPs | ICFs | SAPs | IFPs | Spares | Memory (GB) |
| H20 | 1–20 | 0–20 | 0–10 / 0–10 | 0–20 | 4–8 | 1 | 2–20 | 32–704 |
| H43 | 1–43 | 0–43 | 0–21 / 0–21 | 0–43 | 8–16 | 1 | 2–43 | 32–1392 |
| H66 | 1–66 | 0–66 | 0–33 / 0–33 | 0–66 | 12–24 | 1 | 2–66 | 32–2272 |
| H89 | 1–89 | 0–89 | 0–44 / 0–44 | 0–89 | 16–32 | 1 | 2–89 | 32–3040 |
| HA1 | 1–101 | 0–101 | 0–50 / 0–50 | 0–101 | 16–32 | 1 | 2–101 | 32–3040 |
Introduced in August 2012, the zEnterprise EC12 is based on the zEC12 chip, a 5.5 GHz 8-core out-of-order CISC-based z/Architecture processor. The zEC12 can have a maximum of 120 cores, 101 of which are customer configurable to run operating systems and applications. The maximum number of cores available in a particular model of the zEC12 is denoted by the model name. For example, the H20 has up to 20 cores orderable for direct customer use, plus spare and a special I/O processor core type, the System Assist Processor. Each core can be characterized as a Central Processor (CP), Integrated Facility for Linux (IFL) processor, z Application Assist Processor (zAAP), z10 Integrated Information Processor (zIIP), Internal Coupling Facility (ICF) processor, or additional System Assist Processor (SAP). The zEnterprise EC12 allows up to 3 TB (usable) of redundant array of independent memory (RAIM).
The EC12 has 50% higher total capacity than the z196 (up to 78,000 MIPS), and supports Transactional Execution and Flash Express – integrated SSDs which improve paging and certain other I/O performance.

#### zEnterprise gen1 (114 and 196)

zEnterprise, announced in July 2010, with the z196 model, was designed to offer both mainframe and distributed server technologies in an integrated system. The zEnterprise System consists of three components:
* First is a System z server.
* Second is the IBM zEnterprise BladeCenter Extension (zBX).
* Last is the management layer, IBM zEnterprise Unified Resource Manager (zManager), which provides a single management view of zEnterprise resources.
The zEnterprise is designed to extend mainframe capabilities – management efficiency, dynamic resource allocation, serviceability – to other systems and workloads running on AIX on POWER7, and Microsoft Windows or Linux on x86.
The zEnterprise BladeCenter Extension (zBX) is an infrastructure component that hosts both general purpose IBM BladeCenter servers and appliance-like workload optimizers which can all be managed as if they were a single mainframe. The zBX supports a private high speed internal network that connects it to the central processing complex, which reduces the need for networking hardware and provides inherently high security.
The IBM zEnterprise Unified Resource Manager integrates the System z and zBX resources as a single virtualized system and provides unified and integrated management across the zEnterprise System. It can identify system bottlenecks or failures among disparate systems and if a failure occurs it can dynamically reallocate system resources to prevent or reduce application problems. The Unified Resource Manager provides energy monitoring and management, resource management, increased security, virtual networking, and information management from a single user interface.
   zEnterprise 114 – The z114 is a entry-level single-rack solution, available in two hardware models: M05 and M10. Introduced in July, 2011, this system is designed to extend the benefits of the zEnterprise System to the mid-range business segment. Like the z196, the z114 is fully compatible with the zBX and the URM and also features the mission-critical server design elements. The z114 features up to 14 cores (up to 10 configurable) with a clock speed of 3.8 GHz. The z114 is physically approximately half the size of the z196.
z114 models :
| Model | CPs | IFLs | zAAPs / zIIPs | ICFs | SAPs | Spares | zBX | Memory (GB) |
| M05 | 0–5 | 0–5 | 0–2 / 0–2 | 0–5 | 2–4 | 0 | 0–1 | 8–120 |
| M10 | 0–5 | 0–10 | 0–5 / 0–5 | 0–10 | 2–4 | 2 | 0–1 | 16–248 |
This model can contains up to 14 z196 out-of-order CISC-based z/Architecture processors running at 3.8 GHz. The z114 offers 130 capacity settings across two models and is designed to offer the hybrid capabilities of the zEnterprise System with a lower capacity, a lower energy usage, and lower price. Each core can be characterized as a Central Processor (CP), Integrated Facility for Linux (IFL) processor, z Application Assist Processor (zAAP), z10 Integrated Information Processor (zIIP), Internal Coupling Facility (ICF) processor, or additional System Assist Processor (SAP). The z114 supports up to 248 GB (usable) of redundant array of independent memory (RAIM).
   zEnterprise 196 – The z196 is a high-end dual-rack solution, and available in five hardware models: M15, M32, M49, M66 and M80. The model number is based on the number of cores available for customer workloads. Additional cores are reserved as spares and as SAPs.
z196 models :
| Model | CPs | IFLs | zAAPs / zIIPs | ICFs | SAPs | Spares | zBX | Memory (GB) |
| M15 | 0–15 | 0–15 | 0–7 / 0–7 | 0–15 | 3 | 2–15 | 0–1 | 32–752 |
| M32 | 0–32 | 0–32 | 0–16 / 0–16 | 0–16 | 6 | 2–32 | 0–1 | 32–1520 |
| M49 | 0–49 | 0–49 | 0–24 / 0–24 | 0–16 | 9 | 2–49 | 0–1 | 32–2288 |
| M66 | 0–66 | 0–66 | 0–33 / 0–33 | 0–16 | 12 | 2–66 | 0–1 | 32–3056 |
| M80 | 0–80 | 0–80 | 0–40 / 0–40 | 0–16 | 14 | 2–80 | 0–1 | 32–3056 |
The 196's microprocessor is the z196 chip, a 5.2 GHz quad-core out-of-order CISC-based z/Architecture processor. The z196 can have a maximum of 24 processors giving a total of 96 cores, 80 of which are directly available to run operating systems and applications. The number of cores available in a particular model of the z196 is denoted by the model name. For example, the M15 has 15 cores available for direct customer use, plus spare and service processor cores. Each core can be characterized as a Central Processor (CP), Integrated Facility for Linux (IFL) processor, z Application Assist Processor (zAAP), z10 Integrated Information Processor (zIIP), Internal Coupling Facility (ICF) processor, or additional System Assist Processor (SAP). The zEnterprise also supports x86 or Power ISA blades attached via the zEnterprise BladeCenter Extension (zBX). The zEnterprise 196 allows up to 3 TB (usable) of redundant array of independent memory (RAIM).
The zEnterprise z196 has twice the memory capacity of the z10, and 60% higher total capacity than the z10 (up to 52 GIPS). It supports the BladeCenter Extension (zBX) and Unified Resource Manager.

### IBM System z10

This generation of Z servers supported more memory than previous generation systems and can have up to 64 central processors (CPs) per frame. The full speed z10 processor's uniprocessor performance was up to 62% faster than that of the z9 server, according to IBM's z10 announcement, and included these other features:
* 50% more performance and 70% more usable capacity. The new 4.4 GHz processor was designed to address CPU intensive workloads and support large scale server consolidation on the mainframe.
* Just-in-time capacity and management – monitoring of multiple systems based on Capacity Provisioning and Workload Manager (WLM) definitions. When the defined conditions are met, z/OS can suggest capacity changes for manual activation from a z/OS console, or the system can add or remove temporary capacity automatically and without operator intervention.
Specific models from this family include:
* z10 Business Class (2098 series), introduced on October 21, 2008
* z10 Enterprise Class (2097 series), introduced on February 26, 2008

### IBM System z9

In July 2005, IBM announced a new family of servers – the System z9 family – with the IBM System z9 Enterprise Class (z9 EC) and the IBM System z9 Business Class (z9 BC) servers. The System z9 servers offered:
* More flexibility on the enterprise class servers in customizing and sizing the capacity of the general purpose processors (CPs) that reside in the server. The z9 EC servers offered four different sub-capacity settings when run with eight or fewer general purpose processors.
* zIIP engines. The zIIP is designed so that a program can work with z/OS to have all or a portion of its Service Request Block (SRB) dispatched work directed to the zIIP to help free up capacity on the general purpose processor which may make it available for use by other workloads running on the server.
* MIDAW. The Modified Indirect Data Address Word (MIDAW) facility offers an alternative facility for a channel program to be constructed. It is designed to improve performance for native FICON applications that use extended format datasets (including DB2 and VSAM) by helping to improve channel utilization, reduce channel overhead, and improve I/O response times.
* CP Assist for Cryptographic Functions (CPACF) is shipped on every CP and IFL processor in support of clear key encryption. CPACF was enhanced for System z9 processors to include support of the Advanced Encryption Standard (AES) for 128-bit keys, Secure Hash Algorithm-256 (SHA-256), CPACF offers DES, Triple DES and SHA-1.
Specific models from this family include:
* z9 Business Class (2096 series), successor to the z890 and smallest z990 models (2006)
* z9 Enterprise Class (2094 series), introduced in 2005, initially as z9-109, beginning the new System z9 line

### IBM zSeries family

Announced on October 3, 2000, and available on December 18, the eServer zSeries 900 (z900 for short) was the first to feature the 64-bit z/Architecture extension of the S/360 architecture, still retaining the support for the 31-bit and 24-bit addressing programs back to 1964.
The system's 12 or 20 Blue Flame processors, of which up to 16 could be used as Central Processors, are contained in a multi-chip module with 101 glass-ceramic layers and 4226 I/O pins. Each processor has 47 million transistors across 177 mm$^2$. Compared to the preceding S/390 G6, the Blue Flame's L1 cache is doubled by splitting it 256+256 KB I+D and the L2 cache is doubled to 32 MB. The peripheral I/O bandwidth has been tripled to 24 GB/s, while the main memory has the bandwidth of 70 GB/s, a 150 ns latency and up to 64 GB capacity. Featuring a 7-stage pipeline, the Blue Flame initially attained 769 MHz with a bulk 180 nm process, and upon the change to silicon on insulator in May 2002 reached 917 MHz, at which it consumes 38 Watts.
In 2002, IBM launched the z800, a lower-end mainframe featuring five Blue Flames clocked at 625 MHz, of which up to four can be Central Processors, all sharing an 8 MB L2 cache. The I/O bandwidth is 6 GB/s and the memory capacity is up to 32 GB.
The fully redesigned z990 mainframes for the mid-range and high-end became available in June and October 2003, respectively. Featuring IBM's first superscalar CMOS mainframe processors, a dual-core chip contained 121 million transistors across 266 mm$^2$, and was manufactured in a 130 nm process, drawing 55 Watts at 1.2 GHz in the z990. Each core contained a cryptographic coprocessor supporting the Data Encryption Standard and SHA-1.
The z990 contained up to 48 cores, of which up to 32 were enabled as Central Processors. To support this increase, the z990 was the first IBM mainframe with a non-uniform memory access, as its processors and memory were grouped into up to four "book"-modules, each book also containing a 32 MB L2 cache. It was also the first to be capable of speculative memory disambiguation. The maximum I/O bandwidth and memory capacity were both quadrupled, to 96 GB/s and 256 GB respectively, as was the number of I/O channels through the introduction of the quad-Logical Channel SubSystems (LCSS). Each instance of an OS can access no more than one LCSS, thus preserving the limit of 256 channels per an OS. The number of logical partitions was doubled to 30, and the maximum distance of Parallel Sysplex rose to 100 km. It took some time for a single OS to fully utilize the z990, as the z/OS and z/VM only gained support for 24 processors in September 2004, and for 32 processors in June 2005 for the z/OS and June 2007 for the z/VM.
In May 2004, the z800 was succeeded by the z890. The memory capacity and the core count were left unchanged from the z800, but the processors were the same as in the z990 except clocked at 1.0 GHz. The L2 cache's size was 32 MB, and the I/O subsystem supported two LCSSs and 16 GB/s of bandwidth.
In 2004, IBM extended the idea of lower-cost restricted processors (first introduced in 2000 in the form of IFL, for use by Linux on IBM Z only) that are not permitted to run the traditional mainframe OSes (z/OS, z/VM, z/VSE, and z/TPF), by the addition of z Application Assist Processor dedicated to Java and XML processing. The IFL and zAAP are physically the same as the Central Processors, but IBM charges lower fees for their use. In 2006 another restricted processor type, the z Integrated Information Processor, was added in the System z9.

## Features
### Processors and memory

The IBM zSeries systems were based on the z/Architecture chips – the out-of-order CISC-based z/Architecture multi-core processors. The maximum number of cores available in a particular model of the zEC12 is denoted by the model name. For example, the H20 has up to 20 cores orderable for direct customer use, plus spare and a special I/O processor core type, the System Assist Processor. Each core can be characterized as a Central Processor (CP), Integrated Facility for Linux (IFL) processor, z Application Assist Processor (zAAP), z10 Integrated Information Processor (zIIP), Internal Coupling Facility (ICF) processor, or additional System Assist Processor (SAP).

#### Processor book

A processor book is a modular card in IBM mainframes that contains processors, memory, and I/O connections. A multi-chip module is welded onto each processor book for the z196 model.

#### The computing power ordering

The typical ordering process of modern IBM Z mainframe looks like a buying of service or looks like a leasing; the mainframe is a program/hardware complex with rent for a system workload, and (in the most cases) additional system capabilities can be unlocked after additional payment.

### Operating systems

The z15, z14, z13, zEC12, zBC12, z114 and z196 support the IBM operating systems: z/OS, z/VM, z/VSE, and z/TPF. Other operating systems available include Linux on IBM Z, such as Red Hat Enterprise Linux 6 and SUSE Linux Enterprise Server 11. In November, 2011, IBM introduced Microsoft Windows Server 2008 support via x86 processor-based blades that plug into IBM's zEnterprise BladeCenter Extension (zBX). The zBX also supports the IBM WebSphere DataPower Integrated Appliance XI50 for zEnterprise (DataPower XI50z).

### BladeCenter Extension (zBX)

The zEnterprise System supports an optional zEnterprise BladeCenter Extension (zBX). This add-on infrastructure supports redundant top-of-Rack switches, redundant power supplies, extra blowers, and IBM BladeCenter chassis. This add-on chassis allows POWER7 and x86 blade servers to be integrated with and managed from the mainframe. A gameframe installation at Hoplon Infotainment is an example of a hybrid mainframe.
The zBX supports up to 112 blade modules. The zBX and the System Z server are connected by a redundant, secure 10 Gigabit Ethernet connection, providing a private data network. There is also a 1 Gigabit Ethernet connection for management.

### Unified Resource Manager

The zEnterprise Unified Resource Manager (zManager) allows the supported zBX platforms to be virtualized into a single system for management. It also allows for the prioritization of certain workloads in the system. The Resource Manager can monitor the various platforms for signs of bottlenecks or faults and modify the overall system to recover, maintaining a specified quality of service level.

### Liquid cooling

The zEC12 and z196 support external liquid cooling. Customers have the option of purchasing their mainframe with a water-cooled heat exchanger.

### PU characterization

Each purchased PU (processor unit) is characterized as one of a variety of types:
* CP: Central processor; The standard processors. For use with any supported operating system and user applications.
* IFL: Integrated Facility for Linux; Exploited by Linux and for z/VM processing in support of Linux. It is not possible to IPL operating systems other than z/VM or Linux on an IFL.
* zAAP: Application Assist Processor; Exploited under z/OS for designated workloads, which include the IBM JVM and XML System Services functions.
* zIIP: Integrated Information Processor; Exploited under z/OS for designated workloads, which include various XML System Services, IPSec offload, certain parts of IBM DB2 DRDA, star schema, IBM HiperSockets for large messages, and the IBM GBS Scalable Architecture for Financial Reporting.
* ICF: Internal Coupling Facility; Used for z/OS clustering, running exclusively the Coupling Facility Control Code (CFCC).
* SAP: System Assist Processor; Offloads and manages I/O operations.
* IFP: Integrated Firmware Processor; reserved for managing new generation of PCIe adapters in zEC12 and zBC12.
* Spares: exclusively reserved to provide failover in the event of a processor (CP, IFL, zAAP, zIIP, ICF, SAP or IFP) failure.
Also it's possible to run a zAAP-eligible workload on zIIPs if no zAAPs are enabled. IBM does not impose any software charges on work that is dispatched on zAAP and zIIP processors.
The addition of IFLs, zAAPs, zIIPs, ICFs, SAPs or IFPs does not change the system capacity setting or its MSU rating, only CPs do.