# History of supercomputing

The history of supercomputing goes back to the 1960s when a series of computers at Control Data Corporation (CDC) were designed by Seymour Cray to use innovative designs and parallelism to achieve superior computational peak performance. The CDC 6600, released in 1964, is generally considered the first supercomputer. However, some earlier computers were considered supercomputers for their day such as the 1954 IBM NORC in the 1950s, and in the early 1960s, the UNIVAC LARC (1960), the IBM 7030 Stretch (1962), and the Manchester Atlas (1962), all of which were of comparable power.
While the supercomputers of the 1980s used only a few processors, in the 1990s, machines with thousands of processors began to appear both in the United States and in Japan, setting new computational performance records.
By the end of the 20th century, massively parallel supercomputers with thousands of "off-the-shelf" processors similar to those found in personal computers were constructed and broke through the teraFLOPS computational barrier.
Progress in the first decade of the 21st century was dramatic and supercomputers with over 60,000 processors appeared, reaching petaFLOPS performance levels.

## Beginnings: 1950s and 1960s

The term "Super Computing" was first used in the New York World in 1929 to refer to large custom-built tabulators that IBM had made for Columbia University.
There were several lines of second generation computers that were substantially faster than most contemporary mainframes. These included
* Atlas
* UNIVAC LARC
* IBM 7030
* IBM 360/91
* IBM 360/95
* CDC 6600
The second generation saw the introduction of features intended to support multiprogramming and multiprocessor configurations, including master/slave (supervisor/problem) mode, storage protection keys, limit registers, protection associated with address translation, and atomic instructions.
In 1957, a group of engineers left Sperry Corporation to form Control Data Corporation (CDC) in Minneapolis, Minnesota. Seymour Cray left Sperry a year later to join his colleagues at CDC. In 1960, Cray completed the CDC 1604, one of the first generation of commercially successful transistorized computers and at the time of its release, the fastest computer in the world. However, the sole fully transistorized Harwell CADET was operational in 1951, and IBM delivered its commercially successful transistorized IBM 7090 in 1959.
Around 1960, Cray decided to design a computer that would be the fastest in the world by a large margin. After four years of experimentation along with Jim Thornton, and Dean Roush and about 30 other engineers, Cray completed the CDC 6600 in 1964. Cray switched from germanium to silicon transistors, built by Fairchild Semiconductor, that used the planar process. These did not have the drawbacks of the mesa silicon transistors. He ran them very fast, and the speed of light restriction forced a very compact design with severe overheating problems, which were solved by introducing refrigeration, designed by Dean Roush. The 6600 outperformed the industry's prior recordholder, the IBM 7030 Stretch, by a factor of three. With performance of up to three megaFLOPS, it was dubbed a supercomputer and defined the supercomputing market when two hundred computers were sold at $9 million each.
The 6600 gained speed by "farming out" work to peripheral computing elements, freeing the CPU (Central Processing Unit) to process actual data. The Minnesota FORTRAN compiler for the machine was developed by Liddiard and Mundstock at the University of Minnesota and with it the 6600 could sustain 500 kiloflops on standard mathematical operations. In 1968, Cray completed the CDC 7600, again the fastest computer in the world. At 36 MHz, the 7600 had 3.6 times the clock speed of the 6600, but ran significantly faster due to other technical innovations. They sold only about 50 of the 7600s, not quite a failure. Cray left CDC in 1972 to form his own company. Two years after his departure CDC delivered the STAR-100, which at 100 megaflops was three times the speed of the 7600. Along with the Texas Instruments ASC, the STAR-100 was one of the first machines to use vector processing⁠‍—‍the idea having been inspired around 1964 by the APL programming language.
In 1956, a team at Manchester University in the United Kingdom began development of MUSE⁠‍—‍a name derived from microsecond engine‍—‍with the aim of eventually building a computer that could operate at processing speeds approaching one microsecond per instruction, about one million instructions per second. Mu (the name of the Greek letter μ) is a prefix in the SI and other systems of units denoting a factor of 10$^{−6}$ (one millionth).
At the end of 1958, Ferranti agreed to collaborate with Manchester University on the project, and the computer was shortly afterwards renamed Atlas, with the joint venture under the control of Tom Kilburn. The first Atlas was officially commissioned on 7 December 1962‍—‍nearly three years before the Cray CDC 6600 supercomputer was introduced‍—‍as one of the world's first supercomputers. It was considered at the time of its commissioning to be the most powerful computer in the world, equivalent to four IBM 7094s. It was said that whenever Atlas went offline half of the United Kingdom's computer capacity was lost. The Atlas pioneered virtual memory and paging as a way to extend its working memory by combining its 16,384 words of primary core memory with an additional 96K words of secondary drum memory. Atlas also pioneered the Atlas Supervisor, "considered by many to be the first recognizable modern operating system".

## The Cray era: mid-1970s and 1980s

Four years after leaving CDC, Cray delivered the 80 MHz Cray-1 in 1976, and it became the most successful supercomputer in history. The Cray-1, which used integrated circuits with two gates per chip, was a vector processor. It introduced a number of innovations, such as chaining, in which scalar and vector registers generate interim results that can be used immediately, without additional memory references which would otherwise reduce computational speed. The Cray X-MP (designed by Steve Chen) was released in 1982 as a 105 MHz shared-memory parallel vector processor with better chaining support and multiple memory pipelines. All three floating point pipelines on the X-MP could operate simultaneously. By 1983 Cray and Control Data were supercomputer leaders; despite its lead in the overall computer market, IBM was unable to produce a profitable competitor.
The Cray-2, released in 1985, was a four-processor liquid cooled computer totally immersed in a tank of Fluorinert, which bubbled as it operated. It reached 1.9 gigaflops and was the world's fastest supercomputer, and the first to break the gigaflop barrier. The Cray-2 was a totally new design. It did not use chaining and had a high memory latency, but used much pipelining and was ideal for problems that required large amounts of memory. The software costs in developing a supercomputer should not be underestimated, as evidenced by the fact that in the 1980s the cost for software development at Cray came to equal what was spent on hardware. That trend was partly responsible for a move away from the in-house, Cray Operating System to UNICOS based on Unix.
The Cray Y-MP, also designed by Steve Chen, was released in 1988 as an improvement of the X-MP and could have eight vector processors at 167 MHz with a peak performance of 333 megaflops per processor. In the late 1980s, Cray's experiment on the use of gallium arsenide semiconductors in the Cray-3 did not succeed. Seymour Cray began to work on a massively parallel computer in the early 1990s, but died in a car accident in 1996 before it could be completed. Cray Research did, however, produce such computers.

## Massive processing: the 1990s

The Cray-2 which set the frontiers of supercomputing in the mid to late 1980s had only 8 processors. In the 1990s, supercomputers with thousands of processors began to appear. Another development at the end of the 1980s was the arrival of Japanese supercomputers, some of which were modeled after the Cray-1.
During the first half of the Strategic Computing Initiative, some massively parallel architectures were proven to work, such as the WARP systolic array, message-passing MIMD like the Cosmic Cube hypercube, SIMD like the Connection Machine, etc. In 1987, a TeraOPS Computing Technology Program was proposed, with a goal of achieving 1 teraOPS (a trillion operations per second) by 1992, which was considered achievable by scaling up any of the previously proven architectures.
The SX-3/44R was announced by NEC Corporation in 1989 and a year later earned the fastest-in-the-world title with a four-processor model. However, Fujitsu's Numerical Wind Tunnel supercomputer used 166 vector processors to gain the top spot in 1994. It had a peak speed of 1.7 gigaflops per processor. The Hitachi SR2201 obtained a peak performance of 600 gigaflops in 1996 by using 2,048 processors connected via a fast three-dimensional crossbar network.
In the same timeframe the Intel Paragon could have 1,000 to 4,000 Intel i860 processors in various configurations, and was ranked the fastest in the world in 1993. The Paragon was a MIMD machine which connected processors via a high speed two-dimensional mesh, allowing processes to execute on separate nodes; communicating via the Message Passing Interface. By 1995, Cray was also shipping massively parallel systems, e.g. the Cray T3E with over 2,000 processors, using a three-dimensional torus interconnect.
The Paragon architecture soon led to the Intel ASCI Red supercomputer in the United States, which held the top supercomputing spot to the end of the 20th century as part of the Advanced Simulation and Computing Initiative. This was also a mesh-based MIMD massively-parallel system with over 9,000 compute nodes and well over 12 terabytes of disk storage, but used off-the-shelf Pentium Pro processors that could be found in everyday personal computers. ASCI Red was the first system ever to break through the 1 teraflop barrier on the MP-Linpack benchmark in 1996; eventually reaching 2 teraflops.

## Petascale computing in the 21st century

Significant progress was made in the first decade of the 21st century. The efficiency of supercomputers continued to increase, but not dramatically so. The Cray C90 used 500 kilowatts of power in 1991, while by 2003 the ASCI Q used 3,000 kW while being 2,000 times faster, increasing the performance per watt 300 fold.
In 2004, the Earth Simulator supercomputer built by NEC at the Japan Agency for Marine-Earth Science and Technology (JAMSTEC) reached 35.9 teraflops, using 640 nodes, each with eight proprietary vector processors.
The IBM Blue Gene supercomputer architecture found widespread use in the early part of the 21st century, and 27 of the computers on the TOP500 list used that architecture. The Blue Gene approach is somewhat different in that it trades processor speed for low power consumption so that a larger number of processors can be used at air cooled temperatures. It can use over 60,000 processors, with 2048 processors "per rack", and connects them via a three-dimensional torus interconnect.
Progress in China has been rapid, in that China placed 51st on the TOP500 list in June 2003; this was followed by 14th in November 2003, 10th in June 2004, then 5th during 2005, before gaining the top spot in 2010 with the 2.5 petaflop Tianhe-I supercomputer.
In July 2011, the 8.1 petaflop Japanese K computer became the fastest in the world, using over 60,000 SPARC64 VIIIfx processors housed in over 600 cabinets. The fact that the K computer is over 60 times faster than the Earth Simulator, and that the Earth Simulator ranks as the 68th system in the world seven years after holding the top spot, demonstrates both the rapid increase in top performance and the widespread growth of supercomputing technology worldwide. By 2014, the Earth Simulator had dropped off the list and by 2018 the K computer had dropped out of the top 10. By 2018, Summit had become the world's most powerful supercomputer, at 200 petaFLOPS. In 2020, the Japanese once again took the top spot with the Fugaku supercomputer, capable of 442 PFLOPS. Finally, starting in 2022 and until the present (as of December 2023), the world's fastest supercomputer had become the Hewlett Packard Enterprise Frontier, also known as the OLCF-5 and hosted at the Oak Ridge Leadership Computing Facility (OLCF) in Tennessee, United States. The Frontier is based on the Cray EX, is the world's first exascale supercomputer, and uses only AMD CPUs and GPUs; it achieved an Rmax of 1.102 exaFLOPS, which is 1.102 quintillion operations per second.

## Historical TOP500 table

This is a list of the computers which appeared at the top of the TOP500 list since 1993. The "Peak speed" is given as the "Rmax" rating.
| Year | Supercomputer | Peak speed (Rmax) | Power efficiency (GFLOPS per Watt) | Location |
| 1993 | Fujitsu Numerical Wind Tunnel | 124.50 GFLOPS | | National Aerospace Laboratory, Tokyo, Japan |
| 1993 | Intel Paragon XP/S 140 | 143.40 GFLOPS | | DoE-Sandia National Laboratories, New Mexico, USA |
| 1994 | Fujitsu Numerical Wind Tunnel | 170.40 GFLOPS | | National Aerospace Laboratory, Tokyo, Japan |
| 1996 | Hitachi SR2201/1024 | 220.40 GFLOPS | | University of Tokyo, Japan |
| 1996 | Hitachi CP-PACS/2048 | 368.20 GFLOPS | | University of Tsukuba, Tsukuba, Japan |
| 1997 | Intel ASCI Red/9152 | 1.338 TFLOPS | | DoE-Sandia National Laboratories, New Mexico, USA |
| 1999 | Intel ASCI Red/9632 | 2.3796 TFLOPS | | DoE-Sandia National Laboratories, New Mexico, USA |
| 2000 | IBM ASCI White | 7.226 TFLOPS | | DoE-Lawrence Livermore National Laboratory, California, USA |
| 2002 | NEC Earth Simulator | 35.860 TFLOPS | | Earth Simulator Center, Yokohama, Japan |
| 2004 | IBM Blue Gene/L | 70.720 TFLOPS | | DoE/IBM Rochester, Minnesota, USA |
| 2005 | IBM Blue Gene/L | 136.800 TFLOPS | | DoE/U.S. National Nuclear Security Administration, Lawrence Livermore National Laboratory, California, USA |
| 2005 | IBM Blue Gene/L | 280.600 TFLOPS | | DoE/U.S. National Nuclear Security Administration, Lawrence Livermore National Laboratory, California, USA |
| 2007 | IBM Blue Gene/L | 478.200 TFLOPS | | DoE/U.S. National Nuclear Security Administration, Lawrence Livermore National Laboratory, California, USA |
| 2008 | IBM Roadrunner | 1.026 PFLOPS | | DoE-Los Alamos National Laboratory, New Mexico, USA |
| 2008 | IBM Roadrunner | 1.105 PFLOPS | 0.445 | DoE-Los Alamos National Laboratory, New Mexico, USA |
| 2009 | Cray Jaguar | 1.759 PFLOPS | | DoE-Oak Ridge National Laboratory, Tennessee, USA |
| 2010 | Tianhe-IA | 2.566 PFLOPS | 0.635 | National Supercomputing Center, Tianjin, China |
| 2011 | Fujitsu K computer | 10.510 PFLOPS | 0.825 | Riken, Kobe, Japan |
| 2012 | IBM Sequoia | 16.320 PFLOPS | | Lawrence Livermore National Laboratory, California, USA |
| 2012 | Cray Titan | 17.590 PFLOPS | | Oak Ridge National Laboratory, Tennessee, USA |
| 2013 | NUDT Tianhe-2 | 33.860 PFLOPS | 2.215 | Guangzhou, China |
| 2016 | Sunway TaihuLight | 93.010 PFLOPS | 6.051 | Wuxi, China |
| 2018 | IBM Summit | 122.300 PFLOPS | 14.668 | DoE-Oak Ridge National Laboratory, Tennessee, USA |
| 2020 | Fugaku | 415.530 PFLOPS | 15.418 | Riken, Kobe, Japan |
| 2021 | Frontier | >1.1 EFLOPS | | Oak Ridge Leadership Computing Facility, Tennessee, USA |

## Export controls

The CoCom and its later replacement, the Wassenaar Arrangement, legally regulated, i.e. required licensing and approval and record-keeping; or banned entirely, the export of high-performance computers (HPCs) to certain countries. Such controls have become harder to justify, leading to loosening of these regulations. Some have argued these regulations were never justified.