# Honeywell 200

The Honeywell 200 was a character-oriented$^{:70C-4S0-01n}$ two-address commercial computer introduced by Honeywell in December 1963, the basis of later models in Honeywell 200 Series, including 1200, 1250, 2200, 3200, 4200 and others, and the character processor of the Honeywell 8200 (1968).
Introduced to compete with IBM's 1401, the H200 is two or three times faster and, with software support, most of the time can execute IBM 1401 programs without need for their recompilation or reassembly. The Liberator marketing campaign exploited this compatibility, and was credited in later Honeywell publicity statements with stalling the sales of IBM 1401 machines. Honeywell claimed an initial rush of hundreds of orders for the H200 that itself stalled when IBM countered with a marketing emphasis on their System 360 product range that was then under development.

## Architecture

As designed by Director of Engineering William L. Gordon, the H200 memory consists of individually addressed characters, each composed of six data bits, two punctuation bits and a parity bit.$^{:70C-4S0-01a}$ The two punctuation bits record a word mark and an item mark, while both being set constituted a record mark. The item bit permittes item moves and record moves in addition to word moves (move successive characters one-by-one starting at the addresses given in the instruction, stopping when the relevant punctuation mark is found set in either field).
An instruction consists of a one-character op-code, up to two operand addresses and an optional single character variant. Usually the op-code character would be word-marked, confirming the end of the previous instruction. An item-marked op-code would be handled differently from normal, and this was used in the emulation of IBM 1401 instructions that were not directly compatible. In two-character address mode, the full address defined one character in the 4K block currently addressed by the relevant register. In three-character address mode, the first three bits of an operand address can designate one of six index registers that occupied the first 24 addressable memory locations. The other two possible bit patterns indicated no indexing (000), or indirect addressing (111). In four-character address mode, the whole installed memory (up to 512K on a Model 4200) was directly addressable, and in addition, the top five bits of each address can specify direct addressing, indirect addressing, or indexed addressing via two sets of 15 four-character registers; in a program running in protected mode both sets were the same, located in the first 60 locations of the memory area to which the program was relocated.
A Change Address Mode (CAM) instruction switched between 2-, 3- and 4-character address modes. The address mode specified the number of characters needed for each operand address in instructions.
A Change Sequence Mode (CSM) instruction exchanged the contents of the instruction counter and of a Change Sequence Register (two register of Control memory, slightly faster but much smaller than Main memory). This provided a simple switch between threads within a program, similar to the sequence/cosequence behaviour of the Honeywell 800 series.
While the H200 supported operation with just a console, card reader and punch like the IBM 1401, the generic Input-Output instructions also supported line printers, magnetic tape drives and disk drives.
I/O instructions left punctuation bits unchanged, reading or writing only data (and parity) bits into memory, and terminating on any record mark encountered. A record mark could be placed at the end of an input buffer to prevent any buffer overflow, a problem that was to persist in many other systems into the 21st century.
The 200-series I/O instructions were a Peripheral Data Transfer (PDT) and a Peripheral Control and Branch (PCB) that explicitly implemented asynchronous I/O. The PDT specified a device address, a buffer address and the transfer operation to be started, while the PCB specified a device address, a branch address and set the operating mode or tested the status of the device (branching to the specified address if the specified condition was met, for instance if the device was busy doing I/O). Both used the format Op-code Address I/O unit address Variant.

## Software

The native assembly language was named "Easycoder".
The Easycoder assembler generated an object file as a binary card deck that can be punched to cards or written to magnetic tape instead. The object file began with a bootstrapping routine so that each program can be loaded into memory, from card reader or magnetic tape, using a boot command from the console.
In the Mod 2 operating system, the Easycoder assembler and every compiler generated object modules on a "go file" on tape; these objects were then linked by means of the LINKLOAD program into one or more executable programs on a "job file", still on tape, which can either be run directly from the tape or loaded in 8-bit mode (i.e. including word marks and item marks) onto disk for faster execution.

### Compilers

Although Honeywell placed strong emphasis on the use of COBOL,$^{:p.70C-480-01m}$ it also supported FORTRAN and RPG.$^{:70C-480-01i}$

### Systems software

The H200 was commonly used as a spooling computer associated with a larger Honeywell 800 series machine. The H1800-II consisted of an H1800 mainframe equipped only with magnetic tape drives and an online adaptor (OLA) connection to a satellite H200 to simulate a card reader for reading low volumes of job control cards. The LINK program running on the H200 handled the OLA,$^{:70C-480-01hh}$ copied punched cards or punched paper tape to magnetic tape, and copied records from magnetic tape to card punch and/or to line printer.
Higher Series-200 computers (H1200, H1250, H2200 and H4200) were mainframes in their own right, capable of handling (with the Mod 2 operating system) up to two simultaneous job streams in addition to the "resident monitor" (i.e. the kernel). The top-end computer in the series (the H4200) had a 1.33 MHz CPU which can address up to 512K (524288 characters) of memory.