# Advanced Numerical Research and Analysis Group

Advanced Numerical Research and Analysis Group (ANURAG) is a laboratory of the Defence Research and Development Organisation (DRDO). Located in Kanchanbagh, Hyderabad, it is involved in the development of computing solutions for numerical analysis and their use in other DRDO projects.

## History

ANURAG was established on 2 May 1988, to development of indigenous supercomputer. Later in 1991, ANURAG became a part of defense R&D Organization.support aeronautical design work, with the mandate of executing specific, time-bound projects leading to the development of custom designed computing systems and software packages for numerical analysis and other applications. As of 2020, it is not longer functional or act as an independent laboratory. All the staff members are transferred to others DRDO labs in Hyderabad, Bangalore and Delhi.

## Areas of work

ANURAG helps design and develop advanced computing systems. Much of this research is conducted in state-of-the-art concepts like parallel architectures, etc., in order to build up a technology base in these areas. Its areas of work are:
* Parallel processing technology.
* Scientific Data Visualisation
* System engineering, integration.
* General purpose microprocessors.
* 1 micrometre CMOS fabrication technology.
* Design and development of VLSI chips & SOC development.
* Processor related technology.
* System software development for custom made processors.
* Analog, RF and Mixed-signal ASIC design

## Products
### PACE

PACE (Processor for Aerodynamic Computations and Evaluation), developed by ANURAG, is a loosely coupled, message-passing parallel processing supercomputer. PACE was originally designed to cater to the Computational Fluid Dynamics (CFD) needs in aircraft design. It can also be used for other fields such as weather forecasting, automobile & civil engineering design, and Molecular Biology. These systems have been built using VME-bus based Pentium processor boards, ATM switches, and Reflective Memory communication hardware.
In 1987, India decided to launch a national initiative in supercomputing to design, develop and deliver a supercomputer in the gigaflops range. Complementary projects were initiated in various labs, ANURAG being one of them. PACE was unveiled by then Prime Minister P.V. Narasimha Rao in April 1995.
In late 1998, ANURAG developed the 15 times more powerful "Pace Plus 32", which can be used to support missile development, as well as other fields. A 128-node PACE++ system, built using Pentium processor-based VME boards was unveiled by Dr. A.P.J. Abdul Kalam in January 2004. The performance of this system is 50 Gigaflops (sustained performance). It has been installed at the Indian Institute of Science, Bangalore. At present work is in progress on a parallel processing system based on Linux clusters targeted to deliver 1 teraflop performance.

### ANAMICA

ANAMICA (ANURAG's Medical Imaging and Characterization Aid) is a DICOM compliant three-dimensional medical visualization software for data obtained from any medical imaging system like MRI, CT and Ultrasound. The software has two-dimensional and three-dimensional visualization techniques to visualize the images in various ways. The sequence of images obtained from any imaging system by scanning of a single patient is packed to form a three-dimensional grid. The software has also been modified for accepting data from Industrial CT systems.

### General purpose microprocessors

ANURAG has designed and developed general-purpose microprocessors- ANUPAMA and ABACUS. ANUPAMA is a 32-bit RISC processor, and works at 33 MHz clock speed. The complete software development tool kit is available for application development. A single-board computer based on ANUPAMA is available for evaluation and software development. ANUPAMA is also available as an IP core.
ABACUS is a 32-bit processor for multi-tasking applications with virtual memory support. It is designed around ANUPAMA core with additions like MMU, two levels of cache, double-precision FPU, SDRAM controller. The IP core of ABACUS is available in Verilog RTL code. This processor is suited for desktop applications. A complete software platform is available for the ABACUS processor and a single board computer with ABACUS is implemented. Linux Kernel is ported.

### Other technologies

ANURAG has designed a 16-bit DSP processor, which is available as an IP core and the design is packaged in 120-pin CPGA. It has also designed other processors and arithmetic cores. ANURAG has also been able to fabricate CMOS designs up to 1-micrometer size and with up to 100,000 gates. Die sizes of 14 x 14 mm have been achieved.