SimSched: A tool for Simulating Autosar Implementaion in Simulink 英語(81)

arXivに投稿するか、自動車技術会に投稿するか
https://qiita.com/kaizen_nagoya/items/e6ac8489a7a05de9a791

で参照した論文を、arXiveか自動車技術会に投稿できるような準備のために解読していく。

SimSched: A tool for Simulating Autosar Implementaion in Simulink
https://arxiv.org/abs/2308.14974

<この項は書きかけです。順次追記します。>
This article is not completed. I will add some words in order.

# ABSTRACT
> AUTOSAR (AUTomotive Open System ARchitecture) is an open industry standard for the automotive sector. It defines the three-layered automotive software architecture. One of these layers is the application layer, where functional behaviors are encapsulated in Software Components (SW-Cs). Inside SW-Cs, a set of runnable entities represents the internal behavior and is realized as a set of tasks. To address AUTOSAR’s lack of support for modeling behaviors of runnables, languages such as Simulink are employed. Simulink simulations assume Simulink block behaviors are completed in zero execution time, while real execution requires a finite execution time. This timing mismatch can result in failures to detect unexpected runtime behaviors during the simulation phase. This paper extends the Simulink environment to model the timing properties of tasks. We present a Simulink block that can schedule tasks with non-zero simulation times. It enables a more realistic analysis during model development.

仮訳
AUTOSAR (AUTomotive Open System ARchitecture) は、自動車分野の公開業界標準です。三層の自動車ソフトウェア構造を定義しています。 一つは応用層です。機能的な振る舞いをソフトウェア要素 (SW-C) に包み込みます。 SW-C の内部では、Runnable実体集合内部動作を表し、task集合として実現します。 AUTOSAR ではRunnableの振る舞い模型に対応していないために、Simulink などの言語を採用しています。 Simulink模擬試験では、Simulink blockの動作は実行時間ゼロで完了することを前提としています。実際の実行には有限の実行時間が必要です。 この時間の不一致により、模擬試験段階で予期しない実行時の振る舞いを検出できない可能性があります。 この論文では、taskの時間特性模型を作成し Simulink 環境を拡張します。 ゼロ以外の模擬試験時間でtaskを計画できる Simulink blockを紹介します。 模型開発中により現実的な分析が可能になります。

1 http://spectrum.ieee.org/transportation/systems/this-car-runs-on-code 
2 https://www.mathworks.com/products/embedded-coder.html

# References
[1] AUTOSAR. Autosar development partnership. http://www.autosar.org, 2021.
[2] The AUTOSAR Consortium. AUTOSAR Methodology, r4.3., 2018.
[3] Sha L., Rajkumar R., and Lehoczky J. Priority inheritance protocols: An approach to real-time synchronization. IEEE Transactions on Computers, 30(9):1175–1185, Septebmer 1990.
https://www.math.unipd.it/~tullio/RTS/2009/SRL-1990.pdf

[4] Dan Henriksson, Anton Cervin, and Karl-Erik Årzén. TrueTime : Real-time Control System Simulation with MATLAB / Simulink. Proceedings of the Nordic MATLAB Conference, 2003.
https://lucris.lub.lu.se/ws/portalfiles/portal/6285574/625643.pdf

[5] Fabio Cremona, Matteo Morelli, and Marco Di Natale. TRES: A Modular Representation of Schedulers, Tasks, and Messages to Control Simulations in Simulink. Proceedings of the 30th Annual ACM Symposium on Applied Computing, pages 1940–1947, 2015.
https://www.researchgate.net/publication/286625378_TRES_A_Modular_Representation_of_Schedulers_Tasks_and_Messages_to_Control_Simulations_in_Simulink

[6] Jian Chen, Manar H Alalfi, Thomas R Dean, and S Ramesh. Modeling AUTOSAR implementations in simulink. In European Conference on Modelling Foundations and Applications, pages 279–292. Springer, 2018.
https://www.semanticscholar.org/paper/Modeling-AUTOSAR-Implementations-in-Simulink-Chen-Alalfi/83710cebc6785b3eb4e45d52b4a473a5294e8253

[7] The AUTOSAR Consortium. The AUTOSAR Standard, r4.3., 2018.
[8] The AUTOSAR Consortium. Specification of Timing extensions, r4.4., 2018.
[9] INCHRON GmbH. chronSIM, version 2.9. https://www.inchron.com/tool-suite/chronsim/, 2019.
[10] ETAS GmbH. RTA-TRACE User Guide, version 2.1.1. https://www.etas.de, 2006.
[11] The AUTOSAR Consortium. Applying simulink to autosar, r3.1., 2006.
[12] MathWorks. Simulink User’s Guide, r2017b. http://www.mathworks.com, 2017.
[13] J. Lehoczky, L. Sha, and Y. Ding. The rate monotonic scheduling algorithm: exact characterization and average case behavior. [1989] Proceedings. Real-Time Systems Symposium, pages 0–5, 1989.
[14] MathWorks. Stateflow User’s Guide, r2017b. http://www.mathworks.com, 2017.
[15] Thomas A Henzinger, Benjamin Horowitz, and Christoph Meyer Kirsch. Giotto: A time-triggered lan- guage for embedded programming. Emsoft, 91(1):166–184, 2001.
[16] Patricia Derler, Andreas Naderlinger, Wolfgang Pree, Stefan Resmerita, and Josef Templ. Simulation of LET models in Simulink and Ptolemy. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), volume 6028 LNCS, pages 83–92. Springer, Berlin, Heidelberg, 2010.
[17] Andreas Naderlinger, Josef Templ, and Wolfgang Pree. Simulating real-time software components based on logical execution time. In Proceedings of the 2009 Summer Computer Simulation Conference, SCSC ’09, pages 148–155, Vista, CA, 2009. Society for Modeling &#38; Simulation International.
[18] A. Ferrari, M. Di Natale, G. Gentile, G. Reggiani, and P. Gai. Time and memory tradeoffs in the implementation of AUTOSAR components. In 2009 Design, Automation & Test in Europe Conference & Exhibition, pages 864–869. IEEE, apr 2009.
[19] Haibo Zeng and Marco Di Natale. Mechanisms for guaranteeing data consistency and flow preservation in AUTOSAR software on multi-core platforms. In SIES 2011 - 6th IEEE International Symposium on Industrial Embedded Systems, Conference Proceedings, pages 140–149. IEEE, jun 2011.
[20] Sakthivel Manikandan Sundharam, Lionel Havet, Sebastian Altmeyer, and Nicolas Navet. A model-based development environment for rapid-prototyping of latency-sensitive automotive control software. In Proceedings - 2016 6th International Symposium on Embedded Computing and System Design, ISED 2016, pages 228–233, 2017.
[21] Nicolas Navet, Lionel Havet, Sebastian Altmeyer, and Loïc Fejoz. Lean Model-Driven Development through Model-Interpretation: the CPAL design flow. University of Luxembourg, pages 1–10, jan 2015.
[22] Caroline Brandberg and Marco Di Natale. A SimEvents Model for the Analysis of Scheduling and Memory Access Delays in Multicores. In 2018 IEEE 13th International Symposium on Industrial Embedded Systems (SIES), pages 1–10. IEEE, jun 2018.
[23] Andreas Naderlinger. Simulating preemptive scheduling with timing-aware blocks in Simulink. In Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017, pages 758–763. IEEE, mar 2017.
[24] C.L.LiuandJamesW.Layland.SchedulingAlgorithmsforMultiprogramminginaHard-Real-TimeEnvironment Scheduling Algorithms for Multiprogramming. Journal of the Association for Computing Machinery, 20(1):46–61, jan 1973.
[25] Ignacio Sanudo, Paolo Burgio, and Marko Bertogna. Schedulability and timing analysis of mixed preemptive- cooperative tasks on a partitioned multi-core system. In Proceedings of the 7th International Workshop on Analysis Tools and Methodologies for Embedded and Real-Time Systems (WATERS’16), in conjuction with the 28th Euromicro Conference on Real-Time Systems (ECRTS 2016), Toulouse, France, 2016.
[26] AlessandroBiondi, PaoloPazzaglia, AlessioBalsini, and MarcoDiNatale. Logicalexecutiontimeimplementation and memory optimization issues in autosar applications for multicores. In International Workshop on Analysis Tools and Methodologies for Embedded and Real-time Systems (WATERS), 2017.
[27] The AUTOSAR Consortium. Specification of RTE Software, r4.4., 2018.
[28] MathWorks. Developing S-Functions, r2017b. http://www.mathworks.com, 2017.

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＜この記事は個人の過去の経験に基づく個人の感想です。現在所属する組織、業務とは関係がありません。＞
This article is an individual impression based on the individual's experience. It has nothing to do with the organization or business to which I currently belong.
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