2021-12-09 AXI DMA MM2S simulation using the AXI VIP core > Vivado 2020.1動作


### 記事の目的

Vivado 2020.1用のTutorialをVivado 2019.1で実行する。
自分でBlock Designを作ってみたが動作に失敗したため、Vivado 2020.1の動作内容を記載しておく。

### 動作環境

- Windows 10 Pro (v21H1)
- Vivado 2020.1
    - SW Build: 2902540 on Wed May 27 19:54:49 MDT 2020
    - IP Build: 2902112 on Wed May 27 22:43:36 MDT 2020

### 情報

- AXI DMA MM2S simulation using the AXI VIP core
    - https://support.xilinx.com/s/article/1148529?language=ja

### 実行内容

1. axi_dma_mm2s_simulation.tclをsourceコマンドで実行してブロックデザインなどを生成
1. tb_dma.svをSimulation Sourceに追加
1. Run Simulationを実行

### Project Summary

<img width="1661" alt="image.png (78.7 kB)" src="https://img.esa.io/uploads/production/attachments/6206/2021/12/09/21741/40bbf952-b1a3-490c-a1b7-39ff48fe9424.png">


### Block Design

<img width="2124" alt="image.png (85.8 kB)" src="https://img.esa.io/uploads/production/attachments/6206/2021/12/09/21741/be0c24f1-d106-456b-b645-5bd0b34c6a01.png">


### clk_wiz設定

<img width="1009" alt="image.png (24.2 kB)" src="https://img.esa.io/uploads/production/attachments/6206/2021/12/09/21741/6ae27b5a-f366-4334-a073-8c36b30a4b0a.png">

### rst_clk_wiz_100M設定

<img width="998" alt="image.png (23.5 kB)" src="https://img.esa.io/uploads/production/attachments/6206/2021/12/09/21741/15f8309e-2dd5-46cb-8796-fb900ae3bbf0.png">

<img width="1000" alt="image.png (30.0 kB)" src="https://img.esa.io/uploads/production/attachments/6206/2021/12/09/21741/f42c1275-c12e-41ae-8b6b-32ab95566d05.png">

### axi_vip_0設定

<img width="1242" alt="image.png (48.8 kB)" src="https://img.esa.io/uploads/production/attachments/6206/2021/12/09/21741/3a8a8c1c-b09d-468c-9196-10f37856ab26.png">

<img width="1243" alt="image.png (34.0 kB)" src="https://img.esa.io/uploads/production/attachments/6206/2021/12/09/21741/90dcba71-fdfe-4c82-a0da-d900a7549afe.png">

### axi_vip_0_axi_periph

<img width="998" alt="image.png (30.1 kB)" src="https://img.esa.io/uploads/production/attachments/6206/2021/12/09/21741/a59afe27-433f-4e78-98cb-72d49a36e8fb.png">

<img width="1002" alt="image.png (18.2 kB)" src="https://img.esa.io/uploads/production/attachments/6206/2021/12/09/21741/e1df3fd4-5077-4a66-ba60-b4868ac460d5.png">

### axi_dma_0設定

<img width="1240" alt="image.png (42.5 kB)" src="https://img.esa.io/uploads/production/attachments/6206/2021/12/09/21741/83b5af61-0c66-4fe7-bedf-d7839763c477.png">

### axi_interconnect_0設定

<img width="999" alt="image.png (30.4 kB)" src="https://img.esa.io/uploads/production/attachments/6206/2021/12/09/21741/300ed440-5853-47ba-b765-0ad57bf53639.png">

<img width="996" alt="image.png (18.7 kB)" src="https://img.esa.io/uploads/production/attachments/6206/2021/12/09/21741/4490fb63-b490-4cf0-8f6d-a2c64dff1e1d.png">

<img width="1002" alt="image.png (18.4 kB)" src="https://img.esa.io/uploads/production/attachments/6206/2021/12/09/21741/3fc44797-7dbb-4c02-a742-90a28b7eb347.png">

### axi4stream_vip_0設定

<img width="1485" alt="image.png (56.2 kB)" src="https://img.esa.io/uploads/production/attachments/6206/2021/12/09/21741/720e876d-7d18-4f7b-87bf-8987f202af93.png">

### axi_vip_1設定

<img width="1244" alt="image.png (52.3 kB)" src="https://img.esa.io/uploads/production/attachments/6206/2021/12/09/21741/e3103458-72bf-4a35-aed2-402cc2ceff5b.png">

<img width="1248" alt="image.png (39.3 kB)" src="https://img.esa.io/uploads/production/attachments/6206/2021/12/09/21741/fd132227-207e-4381-9df5-2f27873abe0d.png">

### Address Editor

<img width="946" alt="image.png (20.7 kB)" src="https://img.esa.io/uploads/production/attachments/6206/2021/12/09/21741/29097fdd-fe02-4659-83b7-265f1bf881b4.png">