openrisc アセンブラ　命令セット

#概要

openriscの命令セット、調べてみた。

#命令セット

```
instruction                     syntax                    semantics

l-add - l.add reg/reg/reg       l.add $rD,$rA,$rB         (set rD (add rA rB))
l-addi - l.add reg/reg/lo16     l.addi $rD,$rA,$lo16      (set rD (add rA lo16))
l-and - l.and reg/reg/reg       l.and $rD,$rA,$rB         (set rD (and rA rB))
l-andi - l.and reg/reg/lo16     l.andi $rD,$rA,$lo16      (set rD (and rA (and lo16 65535)))
l-bal - branch and link (pc relative iaddr)   l.bal ${disp-26}  (sequence()  (set (reg h-gr 11) (add (reg h-delay-insn) 4))  (delay 1 (set pc disp-26))) 
l-bf - branch if condition bit is set (pc relative iaddr)   l.bf ${disp-26}  (if(eq cbit 1)    (sequence() (delay 1 (set pc disp-26))))
l-bnf - branch if condition bit not set (pc relative iaddr)   l.bnf ${disp-26}  (if(eq cbit 0)    (sequence() (delay 1 (set pc disp-26))))
l-brk - break (exception)       l.brk ${uimm-16}          (c-call VOID "@cpu@_cpu_brk" uimm-16)
l-div - divide (signed)         l.div $rD,$rA,$rB         (if VOID  (eq rB 0) (c-call VOID  "@arch@_cpu_trap" pc (enum SI E_ILLEGAL)) (set rD (div rA rB)))
l-divu - divide (unsigned)      l.divu $rD,$rA,$rB        (if VOID  (eq rB 0) (c-call VOID  "@arch@_cpu_trap" pc (enum SI E_ILLEGAL)) (set rD (udiv rA rB)))
l-j - jump (absolute iaddr)     l.j ${abs-26}             (delay 1 (set pc abs-26))
l-jal - jump and link (absolute iaddr)   l.jal ${abs-26}  (sequence()  (set (reg h-gr 11) (add (reg h-delay-insn) 4))  (delay 1 (set pc abs-26)))
l-jalr - jump register and link (absolute iaddr)   l.jalr $rA  (sequence((WI tmp-slot))  (set tmp-slot rA)  (set (reg h-gr 11) (add (reg h-delay-insn) 4))  (delay 1 (set pc tmp-slot)))
l-jr - jump register (absolute iaddr)   l.jr $rA          (delay 1 (set pc rA))
l-lbs - load byte (sign extend)   l.lbs $rD,${simm-16}($rA)  (set rD (ext SI (mem QI (add rA simm-16))))
l-lbz - load byte (zero extend)   l.lbz $rD,${simm-16}($rA)  (set rD (zext SI (mem QI (add rA simm-16))))
l-lhs - load halfword (sign extend)   l.lhs $rD,${simm-16}($rA)  (set rD (ext SI (mem HI (add rA simm-16))))
l-lhz - load halfword (zero extend)   l.lhz $rD,${simm-16}($rA)  (set rD (zext SI (mem HI (add rA simm-16))))
l-lw - load word                l.lw $rD,${simm-16}($rA)  (set rD (mem SI (add rA simm-16)))
l-mfsr - mfsr                   l.mfsr $rD,$rA            (set rD (c-call SI "@cpu@_cpu_mfsr" rA))
l-movhi - movhi                 l.movhi $rD,$hi16         (set rD (sll WI hi16 16))
l-mtsr - mtsr                   l.mtsr $rA,$rB            (c-call VOID "@cpu@_cpu_mtsr" rA rB)
l-mul - l.mul reg/reg/reg       l.mul $rD,$rA,$rB         (set rD (mul rA rB))
l-muli - l.mul reg/reg/lo16     l.muli $rD,$rA,$lo16      (set rD (mul rA (and lo16 65535)))
l-nop - nop                     l.nop                     (nop)
l-or - l.or reg/reg/reg         l.or $rD,$rA,$rB          (set rD (or rA rB))
l-ori - l.or reg/reg/lo16       l.ori $rD,$rA,$lo16       (set rD (or rA (and lo16 65535)))
l-rfe - return from exception   l.rfe $rA                 (sequence()  (delay 1 (set pc (c-call SI cpu@_cpu_rfe" rA))))
l-ror - l.ror reg/reg/reg       l.ror $rD,$rA,$rB         (set rD (ror rA rB))
l-rori - l.ror reg/reg/imm      l.rori $rD,$rA,${uimm-5}  (set rD (ror rA uimm-5))
l-sb - l.sb imm(reg)/reg        l.sb ${ui16nc}($rA),$rB   (set (mem QI (add rA ui16nc)) rB)
l-sfeq - l.mnemonic reg/reg     l.sfeq $rA,$rB            (set cbit (eq rA rB))
l-sfeqi - l.mnemonici reg/imm   l.sfeqi $rA,${simm-16}    (set cbit (eq rA simm-16))
l-sfges - l.mnemonic reg/reg    l.sfges $rA,$rB           (set cbit (ge rA rB))
l-sfgesi - l.mnemonicsi reg/imm l.sfgesi $rA,${simm-16}   (set cbit (ge rA simm-16))
l-sfgeu - l.mnemonic reg/reg    l.sfgeu $rA,$rB           (set cbit (ge rA rB))
l-sfgeui - l.mnemonicui reg/imm l.sfgeui $rA,${uimm-16}   (set cbit (ge rA uimm-16))
l-sfgts - l.mnemonic reg/reg    l.sfgts $rA,$rB           (set cbit (gt rA rB))
l-sfgtsi - l.mnemonicsi reg/imm l.sfgtsi $rA,${simm-16}   (set cbit (gt rA simm-16))
l-sfgtu - l.mnemonic reg/reg    l.sfgtu $rA,$rB           (set cbit (gt rA rB))
l-sfgtui - l.mnemonicui reg/imm l.sfgtui $rA,${uimm-16}   (set cbit (gt rA uimm-16))
l-sfles - l.mnemonic reg/reg    l.sfles $rA,$rB           (set cbit (le rA rB))
l-sflesi - l.mnemonicsi reg/imm l.sflesi $rA,${simm-16}   (set cbit (le rA simm-16))
l-sfleu - l.mnemonic reg/reg    l.sfleu $rA,$rB           (set cbit (le rA rB))
l-sfleui - l.mnemonicui reg/imm l.sfleui $rA,${uimm-16}   (set cbit (le rA uimm-16))
l-sflts - l.mnemonic reg/reg    l.sflts $rA,$rB           (set cbit (lt rA rB))
l-sfltsi - l.mnemonicsi reg/imm l.sfltsi $rA,${simm-16}   (set cbit (lt rA simm-16))
l-sfltu - l.mnemonic reg/reg    l.sfltu $rA,$rB           (set cbit (lt rA rB))
l-sfltui - l.mnemonicui reg/imm l.sfltui $rA,${uimm-16}   (set cbit (lt rA uimm-16))
l-sfne - l.mnemonic reg/reg     l.sfne $rA,$rB            (set cbit (ne rA rB))
l-sfnei - l.mnemonici reg/imm   l.sfnei $rA,${simm-16}    (set cbit (ne rA simm-16))
l-sh - l.sh imm(reg)/reg        l.sh ${ui16nc}($rA),$rB   (set (mem HI (add rA ui16nc)) rB)
l-sll - l.sll reg/reg/reg       l.sll $rD,$rA,$rB         (set rD (sll rA rB))
l-slli - l.sll reg/reg/imm      l.slli $rD,$rA,${uimm-5}  (set rD (sll rA uimm-5))
l-sra - l.sra reg/reg/reg       l.sra $rD,$rA,$rB         (set rD (sra rA rB))
l-srai - l.sra reg/reg/imm      l.srai $rD,$rA,${uimm-5}  (set rD (sra rA uimm-5))
l-srl - l.srl reg/reg/reg       l.srl $rD,$rA,$rB         (set rD (srl rA rB))
l-srli - l.srl reg/reg/imm      l.srli $rD,$rA,${uimm-5}  (set rD (srl rA uimm-5))
l-sub - l.sub reg/reg/reg       l.sub $rD,$rA,$rB         (set rD (sub rA rB))
l-subi - l.sub reg/reg/lo16     l.subi $rD,$rA,$lo16      (set rD (sub rA lo16))
l-sw - l.sw imm(reg)/reg        l.sw ${ui16nc}($rA),$rB   (set (mem SI (add rA ui16nc)) rB)
l-sys - syscall (exception)     l.sys ${uimm-16}          (sequence() (delay 1 (set pc (c-call SI "@cpu@_except" pc 3072 uimm-16))))
l-xor - l.xor reg/reg/reg       l.xor $rD,$rA,$rB         (set rD (xor rA rB))
l-xori - l.xor reg/reg/lo16     l.xori $rD,$rA,$lo16      (set rD (xor rA (and lo16 65535)))
```


以上。