Schematic: Hardware/ADXL362WakeOnShake.sch
Organization: SparkFun
Source repository: https://github.com/sparkfun/Wake_on_shake
Format: eagle_sch
Sheets: 1

Components:
reference: Q1
reference: U1
value: ADXL362
reference: FRAME1
reference: U$1
reference: J1
value: PROG_HDR
reference: JP2
reference: GND1
reference: U2
reference: R1
value: 1M
reference: C1
value: .1uF
reference: D1
value: RB751
reference: JP3
reference: JP1
reference: D2
value: RB751
reference: U3
value: ADP160-3.3
reference: R2
value: 1M
reference: C2
value: 1uF
reference: C3
value: 1uF
reference: U$2
reference: P+1
reference: GND2
reference: P+2
reference: GND3
reference: GND4
reference: P+3
reference: C4
value: .1uF
reference: GND5
reference: P+4
reference: GND6
reference: P+5
reference: R3
value: 10k
reference: P+6
reference: GND7
reference: JP4
reference: JP5
reference: JP6
reference: JP7
reference: R4
value: 10k
reference: P+7
reference: FID1
reference: FID2

Nets:
3.3V
ACTIVE
GND
INT1
MISO
MOSI
N$1
N$2
N$3
N$4
N$5
N$6
N$7
N$8
OVERRIDE
RESET
RXI
SCK
TXO
VOUT
V_BATT

Pin connections:
net: V_BATT
pin: 1
reference: JP2
net: V_BATT
pin: V_BATT
reference: U$1
net: V_BATT
pin: S
reference: Q1
net: V_BATT
pin: 1
reference: R1
net: V_BATT
pin: 1
reference: JP5
net: V_BATT
pin: EN
reference: U3
net: V_BATT
pin: VIN
reference: U3
net: V_BATT
pin: 1
reference: C2
net: V_BATT
pin: V_BATT
reference: U$2
net: N$1
pin: G
reference: Q1
net: N$1
pin: D
reference: Q1
net: N$1
pin: 2
reference: R1
net: N$2
pin: C
reference: D1
net: N$2
pin: G
reference: Q1
net: N$2
pin: 2
reference: R2
net: N$2
pin: C
reference: D2
net: VOUT
pin: D
reference: Q1
net: VOUT
pin: 2
reference: JP3
net: GND
pin: S
reference: Q1
net: GND
pin: 2
reference: JP2
net: GND
pin: 1
reference: R2
net: GND
pin: 3
reference: JP3
net: GND
pin: GND
reference: GND1
net: GND
pin: 2
reference: JP5
net: GND
pin: 2
reference: C2
net: GND
pin: GND
reference: GND2
net: GND
pin: 2
reference: C3
net: GND
pin: GND
reference: U3
net: GND
pin: GND
reference: GND3
net: GND
pin: 2
reference: C1
net: GND
pin: 2
reference: C4
net: GND
pin: GND
reference: GND4
net: GND
pin: GND
reference: U2
net: GND
pin: GND
reference: U1
net: GND
pin: GND
reference: GND5
net: GND
pin: 6
reference: J1
net: GND
pin: GND
reference: GND6
net: GND
pin: GND
reference: JP1
net: GND
pin: GND
reference: GND7
net: OVERRIDE
pin: A
reference: D1
net: OVERRIDE
pin: 1
reference: JP3
net: INT1
pin: INT1
reference: U1
net: INT1
pin: PD3/INT1
reference: U2
net: 3.3V
pin: VOUT
reference: U3
net: 3.3V
pin: 3.3V
reference: P+1
net: 3.3V
pin: 1
reference: C3
net: 3.3V
pin: 1
reference: C1
net: 3.3V
pin: 3.3V
reference: P+2
net: 3.3V
pin: 1
reference: C4
net: 3.3V
pin: VCC
reference: U2
net: 3.3V
pin: 3.3V
reference: P+3
net: 3.3V
pin: VS
reference: U1
net: 3.3V
pin: VDDIO
reference: U1
net: 3.3V
pin: 3.3V
reference: P+4
net: 3.3V
pin: 2
reference: J1
net: 3.3V
pin: 3.3V
reference: P+5
net: 3.3V
pin: 3.3V
reference: P+6
net: 3.3V
pin: 1
reference: R3
net: 3.3V
pin: 3.3V
reference: P+7
net: 3.3V
pin: 1
reference: R4
net: SCK
pin: PB7/SCK/SCL
reference: U2
net: SCK
pin: SCLK
reference: U1
net: SCK
pin: 3
reference: J1
net: MOSI
pin: PB5/MOSI/SDA/DI
reference: U2
net: MOSI
pin: MISO
reference: U1
net: MOSI
pin: 4
reference: J1
net: MISO
pin: PB6/MISO/DO
reference: U2
net: MISO
pin: MOSI
reference: U1
net: MISO
pin: 1
reference: J1
net: N$7
pin: PB4
reference: U2
net: N$7
pin: !CS
reference: U1
net: RESET
pin: 5
reference: J1
net: RESET
pin: 2
reference: R3
net: RESET
pin: PA2/!RESET
reference: U2
net: RXI
pin: PD0/RXD
reference: U2
net: RXI
pin: PD2/INT0
reference: U2
net: RXI
pin: RXI
reference: JP1
net: RXI
pin: 2
reference: R4
net: TXO
pin: PD1/TXD
reference: U2
net: TXO
pin: TXO
reference: JP1
net: N$3
pin: PB3
reference: U2
net: N$3
pin: 1
reference: JP7
net: N$4
pin: PB2
reference: U2
net: N$4
pin: 2
reference: JP7
net: N$5
pin: PB1
reference: U2
net: N$5
pin: 3
reference: JP7
net: N$6
pin: PB0
reference: U2
net: N$6
pin: 4
reference: JP7
net: N$8
pin: PD6
reference: U2
net: N$8
pin: 5
reference: JP7
net: ACTIVE
pin: A
reference: D2
net: ACTIVE
pin: PD4
reference: U2

Functional groups:
group_type: structural
name: hierarchy
group_type: semantic
name: power
group_type: semantic
name: spi