Schematic: Hardware/SparkFun_Si4703_Eval.sch
Organization: SparkFun Electronics
Source repository: https://github.com/sparkfun/Si4703_FM_Tuner_Evaluation_Board
Format: eagle_sch
Sheets: 1

Components:
reference: U1
value: SI4703
reference: Y1
value: 32.768kHz
reference: C1
value: 0.1uF
reference: C2
value: 22nF
reference: GND1
reference: C3
value: 22pF
reference: C4
value: 22pF
reference: GND2
reference: C5
value: 1nF
reference: L1
value: 270nH
reference: GND3
reference: R1
value: 10k
reference: R2
value: 10k
reference: R3
value: 4.7k
reference: GND5
reference: GND6
reference: U3
value: TPA6111
reference: R4
value: 20k
reference: GND7
reference: C6
value: 0.1uF
reference: C9
value: 0.1uF
reference: GND8
reference: C7
value: 47uF
reference: C8
value: 47uF
reference: R5
value: 20k
reference: R6
value: 20k
reference: R7
value: 20k
reference: C10
value: 1uF
reference: C11
value: 1uF
reference: GND9
reference: R8
value: 4.7k
reference: R9
value: 330
reference: R10
value: 330
reference: R11
value: 330
reference: R12
value: 330
reference: GND4
reference: JP1
reference: GND10
reference: L2
value: Ferrite 2.5k
reference: L3
value: Ferrite 2.5k
reference: JP3
reference: JP4
reference: JP5
reference: P+3
reference: P+4
reference: P+5
reference: P+6
reference: P+7
reference: P+8
reference: P+9
reference: P+17
reference: P+18
reference: U4
reference: FRAME2
reference: LOGO1
reference: LOGO2
reference: U$1

Nets:
!RST
!RST-L
!SEN
!SEN-L
3.3V
ANT
GND
GPIO1
GPIO2
LA
LOUT
N$1
N$11
N$12
N$13
N$14
N$2
N$3
N$4
N$5
N$6
N$7
N$8
RA
ROUT
SCLK
SCLK-L
SDIO
SDIO-L

Pin connections:
net: GND
pin: RFGND
reference: U1
net: GND
pin: GND@PAD
reference: U1
net: GND
pin: GND
reference: GND1
net: GND
pin: GND@12
reference: U1
net: GND
pin: DOUT
reference: U1
net: GND
pin: LPI
reference: U1
net: GND
pin: 2
reference: L1
net: GND
pin: GND
reference: GND3
net: GND
pin: 2
reference: C1
net: GND
pin: GND
reference: GND5
net: GND
pin: 2
reference: C2
net: GND
pin: GND
reference: GND6
net: GND
pin: 1
reference: C3
net: GND
pin: 1
reference: C4
net: GND
pin: GND
reference: GND2
net: GND
pin: 2
reference: C9
net: GND
pin: GND
reference: GND8
net: GND
pin: GND
reference: U3
net: GND
pin: GND
reference: GND7
net: GND
pin: SHT
reference: U3
net: GND
pin: 1
reference: C6
net: GND
pin: GND
reference: GND9
net: GND
pin: 2
reference: R1
net: GND
pin: GND
reference: GND4
net: GND
pin: GND
reference: GND10
net: GND
pin: 8
reference: JP1
net: N$1
pin: 2
reference: Y1
net: N$1
pin: 2
reference: C4
net: N$1
pin: RCLK
reference: U1
net: N$2
pin: GPIO3
reference: U1
net: N$2
pin: 1
reference: Y1
net: N$2
pin: 2
reference: C3
net: N$3
pin: 2
reference: C5
net: N$3
pin: 1
reference: L1
net: N$3
pin: SLEEVE
reference: U4
net: LA
pin: 2
reference: L2
net: LA
pin: LEFT
reference: U4
net: RA
pin: RIGHT
reference: U4
net: RA
pin: 2
reference: L3
net: ANT
pin: 1
reference: C5
net: ANT
pin: FMIP
reference: U1
net: !RST-L
pin: !RST
reference: U1
net: !RST-L
pin: 1
reference: R1
net: !RST-L
pin: 1
reference: R12
net: !SEN-L
pin: !SEN
reference: U1
net: !SEN-L
pin: 1
reference: R2
net: !SEN-L
pin: 1
reference: R11
net: SCLK-L
pin: SCLK
reference: U1
net: SCLK-L
pin: 1
reference: R3
net: SCLK-L
pin: 1
reference: R10
net: SDIO-L
pin: SDIO
reference: U1
net: SDIO-L
pin: 1
reference: R8
net: SDIO-L
pin: 1
reference: R9
net: N$5
pin: VO1
reference: U3
net: N$5
pin: +
reference: C7
net: N$5
pin: 1
reference: R6
net: N$6
pin: VO2
reference: U3
net: N$6
pin: +
reference: C8
net: N$6
pin: 1
reference: R7
net: N$8
pin: BYP
reference: U3
net: N$8
pin: 1
reference: C9
net: N$11
pin: IN1
reference: U3
net: N$11
pin: 1
reference: R4
net: N$11
pin: 2
reference: R6
net: N$12
pin: IN2
reference: U3
net: N$12
pin: 1
reference: R5
net: N$12
pin: 2
reference: R7
net: N$13
pin: 2
reference: R4
net: N$13
pin: 2
reference: C10
net: N$14
pin: 2
reference: R5
net: N$14
pin: 2
reference: C11
net: LOUT
pin: LOUT
reference: U1
net: LOUT
pin: 1
reference: C10
net: ROUT
pin: ROUT
reference: U1
net: ROUT
pin: 1
reference: C11
net: !RST
pin: 2
reference: R12
net: !RST
pin: 3
reference: JP1
net: !SEN
pin: 2
reference: R11
net: !SEN
pin: 4
reference: JP1
net: SCLK
pin: 2
reference: R10
net: SCLK
pin: 5
reference: JP1
net: SDIO
pin: 2
reference: R9
net: SDIO
pin: 6
reference: JP1
net: GPIO1
pin: GPIO1
reference: U1
net: GPIO1
pin: 2
reference: JP1
net: GPIO2
pin: GPIO2
reference: U1
net: GPIO2
pin: 1
reference: JP1
net: 3.3V
pin: VIO
reference: U1
net: 3.3V
pin: VD
reference: U1
net: 3.3V
pin: VA
reference: U1
net: 3.3V
pin: 3.3V
reference: P+6
net: 3.3V
pin: 2
reference: R8
net: 3.3V
pin: 3.3V
reference: P+3
net: 3.3V
pin: 2
reference: R3
net: 3.3V
pin: 3.3V
reference: P+4
net: 3.3V
pin: 2
reference: R2
net: 3.3V
pin: 3.3V
reference: P+5
net: 3.3V
pin: 1
reference: C2
net: 3.3V
pin: 3.3V
reference: P+8
net: 3.3V
pin: 1
reference: C1
net: 3.3V
pin: 3.3V
reference: P+7
net: 3.3V
pin: 2
reference: C6
net: 3.3V
pin: 3.3V
reference: P+17
net: 3.3V
pin: 3.3V
reference: P+18
net: 3.3V
pin: 7
reference: JP1
net: 3.3V
pin: VDD
reference: U3
net: 3.3V
pin: 3.3V
reference: P+9
net: N$4
pin: -
reference: C7
net: N$4
pin: 1
reference: L2
net: N$7
pin: -
reference: C8
net: N$7
pin: 1
reference: L3

Functional groups:
group_type: structural
name: hierarchy
group_type: semantic
name: power