Soft Error Mechanisms, Modeling and Mitigation  [electronic resource] /
Sayil, Selahattin.author.
This book introduces readers to various radiation soft-error mechanisms such as soft delays, radiation induced clock jitter and pulses, and single event (SE) coupling induced effects. In addition to discussing various radiation hardening techniques for combinational logic, the author also describes new mitigation strategies targeting commercial designs. Coverage includes novel soft error mitigation techniques such as the Dynamic Threshold Technique and Soft Error Filtering based on Transmission gate with varied gate and body bias. The discussion also includes modeling of SE crosstalk noise, delay and speed-up effects. Various mitigation strategies to eliminate SE coupling effects are also introduced. Coverage also includes the reliability of low power energy-efficient designs and the impact of leakage power consumption optimizations on soft error robustness. The author presents an analysis of various power optimization techniques, enabling readers to make design choices that reduce static power consumption and improve soft error reliability at the same time. .
Includes index.
Introduction -- Mitigation of Single Event Effects -- Transmission Gate (TG) Based Soft Error Mitigation Methods -- Single Event Soft Error Mechanisms -- Modeling Single Event Crosstalk Noise in Nanometer Technologies -- Modeling of Single Event Coupling Delay and Speedup Effects -- Single Event Upset Hardening of Interconnects -- Soft-Error Aware Power Optimization -- Dynamic Threshold Technique for Soft Error and Soft Delay Mitigation.
This book introduces readers to various radiation soft-error mechanisms such as soft delays, radiation induced clock jitter and pulses, and single event (SE) coupling induced effects. In addition to discussing various radiation hardening techniques for combinational logic, the author also describes new mitigation strategies targeting commercial designs. Coverage includes novel soft error mitigation techniques such as the Dynamic Threshold Technique and Soft Error Filtering based on Transmission gate with varied gate and body bias. The discussion also includes modeling of SE crosstalk noise, delay and speed-up effects. Various mitigation strategies to eliminate SE coupling effects are also introduced. Coverage also includes the reliability of low power energy-efficient designs and the impact of leakage power consumption optimizations on soft error robustness. The author presents an analysis of various power optimization techniques, enabling readers to make design choices that reduce static power consumption and improve soft error reliability at the same time. .
Electronic circuits.
Microprocessors.
Circuits and Systems.
Electronic Circuits and Devices.
Processor Architectures.