Symbolic Parallelization of Nested Loop Programs [electronic resource] /
Tanase, Alexandru-Petru.author.
Hannig, Frank.author.
Teich, Jürgen.author.
This book introduces new compilation techniques, using the polyhedron model for the resource-adaptive parallel execution of loop programs on massively parallel processor arrays. The authors show how to compute optimal symbolic assignments and parallel schedules of loop iterations at compile time, for cases where the number of available cores becomes known only at runtime. The compile/runtime symbolic parallelization approach the authors describe reduces significantly the runtime overhead, compared to dynamic or just‐in-time compilation. The new, on‐demand fault‐tolerant loop processing approach described in this book protects loop nests for parallel execution against soft errors. .
Includes bibliographical references and index.
Introduction -- Fundamentals and Compiler Framework -- Symbolic Parallelization -- Symbolic Multi‐level Parallelization -- On‐demand Fault‐tolerant Loop Processing -- Conclusions.
This book introduces new compilation techniques, using the polyhedron model for the resource-adaptive parallel execution of loop programs on massively parallel processor arrays. The authors show how to compute optimal symbolic assignments and parallel schedules of loop iterations at compile time, for cases where the number of available cores becomes known only at runtime. The compile/runtime symbolic parallelization approach the authors describe reduces significantly the runtime overhead, compared to dynamic or just‐in-time compilation. The new, on‐demand fault‐tolerant loop processing approach described in this book protects loop nests for parallel execution against soft errors. .
Electronic circuits.
Microprocessors.
Electronics.
Microelectronics.
Circuits and Systems.
Processor Architectures.
Electronics and Microelectronics, Instrumentation.