The Simple Art of SoC Design [electronic resource] : Closing the Gap between RTL and ESL /
Keating, Synopsys Fellow, Michael.author.
This book tackles head-on the challenges of digital design in the era of billion-transistor SoCs. It discusses fundamental design concepts in design and coding required to produce robust, functionally correct designs. It also provides specific techniques for measuring and minimizing complexity in RTL code. Finally, it discusses the tradeoff between RTL and high-level (C-based) design and how tools and languages must progress to address the needs of tomorrow’s SoC designs. * Provides an easily accessible guide that enables readers to write better, more verifiable code for complex SoCs; * Describes techniques for successful SoC design, including simplifying RTL design, reducing complexity in control-dominated designs, reducing complexity in data path dominated designs, and simplifying interfaces; * Discusses the tradeoff between RTL and high-level (C-based) design and how tools and languages should develop to fill future needs.   Early praise for The Simple Art of SoC Design… I have enjoyed reading and reviewing the draft material for this book as Mike has developed and refined the content. His clarity and insight, gained from working with a range of mutual customers and SOC designers, shines through. Working in an industry where successful IP deployment is fundamental to product success, I found that this book addresses practically what the designer must focus on, from specification, partitioning and clean interfacing through implementation to verification. Highly recommended whether you are newly starting out in SoC design, or you are an industry veteran weighed down with ever more complex system integration challenges. David Flynn Fellow, Research & Development, ARM Ltd Part-Time Visiting Professor in Electronics and Computer Science, University of Southampton, UK.
Description based upon print version of record.
The SimpleArt of SoC Design; Disclaimer; Foreword; Preface; Contents; Chapter 1: The Third Revolution; The Problem; Divide and Conquer; The General Model; Rule of Seven; Tightly Coupled vs. Loosely Coupled Systems; The Challenge of Verification; The Pursuit of Simplicity; The Changing Landscape of Design; Structure of This Book; Chapter 2: Simplifying RTL Design; Challenges; Syntactic Fluff; Concurrency and State Space; Techniques; Encapsulating Combinational Code; Structuring Sequential Code; Using High Level Data Types; Thinking High-level
Chapter 3: Reducing Complexity in Control-Dominated DesignsOriginal Code; State Space in the Original Design; Partitioning; Comments; Syntactic fluff; Preprocessing Sequential Code; Preprocessing Combinational Code; Refactoring Sequential Code; Recoding the State Machine; Relocating Other Sequential Code; Rewriting Combinational Code; Analyzing the New Code; Restructuring for a Hierarchical State Machine; System Verilog; Simplified Block Diagram; Summary; Chapter 4: Hierarchical State Machines; Restructuring for a Hierarchical State Machine; General Model for HFSMs
Converting the BCU to a HFSMChapter 5: Measuring and Minimizing State Space; Input, Output, and Internal State Space; Preliminary Calculations of State Space; Shallow vs. Deep State Space; The Cross Product of State Spaces; Sequential Processes and Internal State; Encapsulating Sequential Code; State Machines as Sequential Processes; Hierarchical State Machines; Examples; Summary- Counting State; Input State Space; Output State Space; Internal State Space; State Space for Hierarchical State Machines; Chapter 6: Verification; Some Simple Examples of Verifiable Designs; Verification Overview
Goals of Complete VerificationVerifying State Machines; Example: The BCU; A Canonical Design; Structure of the Canonical Design; Separating Data from Control; Verifying the Control Path: The State Machine; Line Coverage; Condition Coverage; Conditional Range Coverage; Cycle Coverage; Input State Coverage; Verifying the Data Path; Data Path Uniqueness; Data Range Coverage; Verifying the Data Path Algorithm; Summary; Chapter 7: Reducing Complexity in Data Path Dominated Designs; Problems and Limitations in the Original Code; Minimizing Lines of Code; Other Versions of the Code; Task Version
More Code Size ReductionUntimed Version; Experimental Versions; Simulation Results for the Different Versions of the DCT; Reference Versions; Synthesis Results; Gates per Line of Code; Formal Verification; Canonical Design; Summary; Chapter 8: Simplifying Interfaces; Command-based Interface; Example: CPU Pipeline; Example: BCU; Example: USB; Impact on Verification; Separating Data and Control; General Connectivity; Concurrency and Analysis; Total State Space; Summary; Chapter 9: Complexity at the Chip Level; From Command to Transaction Interfaces; JPEG Example; USB Example; Software Driver
Virtual Platforms and Software Development
Includes bibliographical references and index.
This book tackles head-on the challenges of digital design in the era of billion-transistor SoCs. It discusses fundamental design concepts in design and coding required to produce robust, functionally correct designs. It also provides specific techniques for measuring and minimizing complexity in RTL code. Finally, it discusses the tradeoff between RTL and high-level (C-based) design and how tools and languages must progress to address the needs of tomorrow’s SoC designs. * Provides an easily accessible guide that enables readers to write better, more verifiable code for complex SoCs; * Describes techniques for successful SoC design, including simplifying RTL design, reducing complexity in control-dominated designs, reducing complexity in data path dominated designs, and simplifying interfaces; * Discusses the tradeoff between RTL and high-level (C-based) design and how tools and languages should develop to fill future needs.   Early praise for The Simple Art of SoC Design… I have enjoyed reading and reviewing the draft material for this book as Mike has developed and refined the content. His clarity and insight, gained from working with a range of mutual customers and SOC designers, shines through. Working in an industry where successful IP deployment is fundamental to product success, I found that this book addresses practically what the designer must focus on, from specification, partitioning and clean interfacing through implementation to verification. Highly recommended whether you are newly starting out in SoC design, or you are an industry veteran weighed down with ever more complex system integration challenges. David Flynn Fellow, Research & Development, ARM Ltd Part-Time Visiting Professor in Electronics and Computer Science, University of Southampton, UK.
Electronic circuits.
Computer-aided engineering.
Circuits and Systems.
Computer-Aided Engineering (CAD, CAE) and Design.