Fine- and Coarse-Grain Reconfigurable Computing [electronic resource] /
Vassiliadis, Stamatis.editor.
Soudris, Dimitrios.editor.
Fine- and Coarse-Grain Reconfigurable Computing gives the basic concepts and building blocks for the design of Fine- (or FPGA) and Coarse-Grain Reconfigurable Architectures. Recently-developed integrated architecture design and software-supported design flow of FPGA and coarse-grain reconfigurable architecture are also described.  Part I consists of two extensive surveys of FPGA and Coarse-Grain Reconfigurable Architectures: The FPGA technology is defined, which includes architecture, logic block structure, interconnect, and configuration methods and existing fine-grain reconfigurable architectures emerged from both academia and industry. Additionally, the implementation techniques and CAD tools developed to facilitate the implementation of a system in reconfigurable hardware by the industry and academia are provided. In addition the features, the advantages and limitations of the coarse-grain reconfigurable systems, the specific issues that should be addressed during the design phase, as well as representative existing coarse-grain reconfigurable systems are explained. In Part II, case studies, innovative research results about reconfigurable architectures and design frameworks from three projects AMDREL, MOLEN and ADRES&DRESC, and, a new classification according to microcoded architectural criteria are described. Fine- and Coarse-Grain Reconfigurable Computing is an essential reference for researchers and professionals and can be used as a textbook by undergraduate, graduate students and professors. Foreword by Yale Patt, Jim Smith and Mateo Valero.
Description based upon print version of record.
Includes bibliographical references and index.
I -- A Survey of Existing Fine-Grain Reconfigurable Architectures and CAD tools -- A Survey of Coarse-Grain Reconfigurable Architectures and Cad Tools -- Case Studies -- Amdrel -- A Coarse-Grain Dynamically Reconfigurable System and Compilation Framework -- Polymorphic Instruction Set Computers -- ADRES & DRESC: Architecture and Compiler for Coarse-Grain Reconfigurable Processors -- A Taxonomy of Field-Programmable Custom Computing Machines.
Fine- and Coarse-Grain Reconfigurable Computing gives the basic concepts and building blocks for the design of Fine- (or FPGA) and Coarse-Grain Reconfigurable Architectures. Recently-developed integrated architecture design and software-supported design flow of FPGA and coarse-grain reconfigurable architecture are also described.  Part I consists of two extensive surveys of FPGA and Coarse-Grain Reconfigurable Architectures: The FPGA technology is defined, which includes architecture, logic block structure, interconnect, and configuration methods and existing fine-grain reconfigurable architectures emerged from both academia and industry. Additionally, the implementation techniques and CAD tools developed to facilitate the implementation of a system in reconfigurable hardware by the industry and academia are provided. In addition the features, the advantages and limitations of the coarse-grain reconfigurable systems, the specific issues that should be addressed during the design phase, as well as representative existing coarse-grain reconfigurable systems are explained. In Part II, case studies, innovative research results about reconfigurable architectures and design frameworks from three projects AMDREL, MOLEN and ADRES&DRESC, and, a new classification according to microcoded architectural criteria are described. Fine- and Coarse-Grain Reconfigurable Computing is an essential reference for researchers and professionals and can be used as a textbook by undergraduate, graduate students and professors. Foreword by Yale Patt, Jim Smith and Mateo Valero.
Electronic circuits.
Software engineering.
Electronics.
Microelectronics.
Computer organization.
Computer hardware.
Circuits and Systems.
Software Engineering/Programming and Operating Systems.
Electronics and Microelectronics, Instrumentation.
Computer Systems Organization and Communication Networks.
Computer Hardware.