Position: Senior Digital Designer
Company: Deveritec
Category: C++
Experience required: 2y
English level: upper

**Tasks:**
- Participation in the definition of the architecture of digital blocks according to customer specifications for ASIC and FPGA designs
- Responsibility for RTL design (VHDL, Verilog) of digital blocks and their integration on system level
- Development and validation of FPGAs/SoCs (ModelSim, Altera-Quartus/Xilinx® - ISE)
- Support and execution of functional verification on chip and block level
- Experience in synthesis for various target technologies
- Support for product qualification, testing and ramp-up
- Development-accompanying documentation

**Requirements:**
- Completed studies in electrical engineering or a comparable qualification
- Several years of experience in SoC design, digital design and verification
- Knowledge of hardware description languages (VHDL or Verilog and SystemVerilog)
- Experience in the development of verification methodologies and infrastructures for testbenches
- Experience in writing test cases in Verilog and C
- Experience with high speed protocols (e.g. DDRx-RAM, PCI Express) and code coverage analysis
- Business fluent in German or English

The next 6 months - work remotely, in the future, a hybrid format - remote / visiting the office.
We are considering candidates who live in Kiev or who are ready to move to live in Kiev in the near future.

You have the ability to quickly familiarize yourself with new topics and approach complex tasks in a goal-oriented manner? You like to work independently in smaller project teams and maintain an open and direct communication style? Then become a part of us. We are looking forward to your application!