Position: ASIC back-end (physical) engineer trainee position
Company: Avnet ASIC
Category: C++
Experience required: no_exp
English level: intermediate

We design integrated circuits for consumer, medical and automotive markets. The majority of these designs are complex SoC/ASIC architectures that integrate IPs, such as ARM and MIPS CPUs and peripherals, DSP cores, analog cells and other IPs with progressive technology nodes: 14, 10, 8, 7 nanometers.
In our daily work we constantly face challenges that requires out of box thinking. This makes our lives an interesting and challenging adventure. Such attitude permits creation of products full of features that often outperform market. We are constant learners, the same we expect from our new employees. Hence, we’d be happy to meet passionate and keen on learning, bright young individuals.
Below is a brief list of skills/knowledge that ideally suit our job profile. Still it’s not an issue if you don’t possess some of those. To our opinion the fundamental engineer’s skills are problem solving and ability to learn.

Desired knowledge you may possess: 
Good understanding of digital/analog electronics and semiconductors physics 
FPGA placement and routing using EDA tools
Experience with PCB design using such tools such as OrCAD, Altium Designer or similar
Basic knowledge of scripting languages such as Tcl, Python, Make
Beginner’s level of English

Optional skills you may have:
FPGA design using HDLs or schematics editor
Embedded systems design using IDEs such as Keil, AtmelStudio, IAR

We offer: 
Part- or full-time employment, flexible schedule
On-job training in our Kyiv office with high skilled professionals
Potential growth in the direction of ASIC design
Paid sick leave and vacation