Position: Senior FPGA Engineer (Networking)
Company: PLVision
Category: C++
Experience required: 3y
English level: intermediate

PLVision is looking for a Senior FPGA Engineer with hands-on development experience and a strong understanding of networking to join our expert community. In this role, you will help us design, build and test advanced digital systems (FPGA/ASIC).

The Senior FPGA Engineer will become a vital part of an experienced tech team that directly collaborates with our client to extend an innovative product's functionality and develop new features.  

Our clients, mostly switching silicon, switch, router, or SmartNiC vendors, are prominent innovators in the networking industry. It means you will work with the latest technologies alongside a team that is constantly contributing to open source (Linux Kernel, SONiC, SAI, etc.). PLVision fosters a solution-oriented approach, thus we welcome candidates who can brainstorm new ideas and transform them into great software products.  
 
We offer a dynamic environment with open and transparent communication, well-established processes, numerous growth opportunities and exciting challenges in a thriving Ukrainian company working with the global market leaders. 

Client Profile  
The customer is a European company, one of the world's leading manufacturers of SmartNICs (Network Interface Cards). They also provide testing, monitoring, network performance analysis services for data centers. The key technologies of this project are Open Virtual Switch (OVS) and DPDK (Data Plane Development Kit). 

About PLVision  
We are a software product development company specializing in computer networking and embedded systems. PLVision has offices in Krakow, Poland, and in Ukraine: Lviv, Odesa, Kyiv, and Kharkiv (currently relocated). Founded in 2007, the company helps networking industry leaders and ambitious startups in the U.S., Israel, and the EU countries to launch innovative products.  

PLVision has taken an active stand on Ukraine, investing all net income in 2022 to support the Armed Forces and the country, as well as implementing many volunteer initiatives. 

Vacancy responsibilities:
- Develop new RTL modules at all hierarchy levels covering design, implementation, and verification;
- Document the designed and implemented modules;
- Work as an RTL designer and participate in architectural discussions;
- Participate in discussions of the RTL design flow.

Vacancy requirements:
- Design and verification of complex digital systems (FPGA/ASIC) at all hierarchy levels ranging from module to system level;
- High-speed digital hardware design, multiple clock domains, deeply pipelined architectures;
- HDL/RTL – preferably Verilog/System Verilog.
- Experience with FPGAs, synthesis, implementation and bring-up;
- Understanding of the networking industry and trends (5G, NFV, Datacenters);
- Experience with Ethernet at all link speeds;
- Experience with integrating IP components from major vendors.

Vacancy plus options:
- Experience with Vivado, Quartus, VCS;
- Experience with Linux and Git.