Simulation and Analysis of Controllers of DSTATCOM for Power Quality Improvement

Power quality is an issue that is becoming increasingly important to electricity consumers at all levels of usage. Sensitive power electronic equipment and non-linear loads are widely used in industrial, commercial and domestic applications leading to distortion in voltage and current waveforms. The widespread use of electronic equipment, such as information technology equipment, power electronics based drives such as adjustable speed drives (ASD), programmable logic controllers (PLC), energy-efficient lighting, led to a complete change of electric loads nature. These loads are simultaneously the major causes and major victims of Power Quality (PQ) problems. Voltage Sag/ Swell, Interruptions, Flickers, Harmonic distortion and Poor power factor are the main problems those are associated with power quality. For mitigating the PQ problems various measures have been developed, in this paper a comparative study has been done for controllers of the SATCOM with linear as well as nonlinear loads. SRF (Synchronous Reference Frame Theory), IRPT (Instantaneous Reactive Power Theory) and PI controller based Theory have been used for generating the reference source currents. This paper presents power quality improvement in the form of Power Factor Correction, Harmonic reduction and reactive power compensation using DSTATCOM and simultaneously Simulink models which are based on the Voltage Source Converter (VSC) principle have been developed. The DSTATCOM injects a current into the system to mitigate the problems associated with power quality specially in the case of load unbalancing. Results are shown in the form of waveforms using MATLAB. The simulation is performed in MATLAB in SIMULINK environment and PSB toolboxes have been used. Gunjan Varshney Conference on Advances in Communication and Control Systems 2013 (CAC2S 2013) © 2013. The authors Published by Atlantis Press 271 compensation, harmonic reduction and load balancing under the unbalanced conditions. II. SYSTEM CONFIGURATION Fig. 1 shows the basic circuit diagram of a DSTATCOM system with balanced/unbalanced, linear or non-linear loads connected to a three-phase three-wire distribution system. The VSC used in a DSTATCOM is a type 1 converter with PWM control over the magnitude of injected AC voltage while maintaining a constant DC voltage across the DC capacitor. Fast switching power semiconductor devices such as IGBT are used instead of Thyristor or GTO Thyristor. The rapid switching capability provided by IGBT enables the use of more sophisticated control scheme to provide functions of balancing of current and voltage regulation. A DSTATCOM can be viewed as a variable current source determined by the control algorithm. Lagging power factor load is realized by star connected resistive-inductive load. An unbalancing is realized by disconnecting load from phase c using circuit breaker model of power system. At ac side, the interfacing inductors are used to filter highfrequency components of compensating currents. DSTATCOM has no energy storage component except an electrolytic capacitor (Cdc) at its dc link. The system parameters viz. system voltage, series impedance, DC link voltage and load impedance are indicated in Appendix. III. CONTROL ALGORITHMS 1. SRF( Synchronous Reference Frame) Theory: The SRF control theory [2] is based on the transformation of currents in synchronously rotating d-q frame Fig.2 shows the basic block diagram[2],[3] of this theory. The desired source currents in d-q frame are obtained as: isd* = i Lddc + icd (1) isq* = i Lqdc + icq (2) where isd* and isq* are estimated dc components of active and reactive current component of reference Source currents in d-q frame. i Lddc and i Lqdc are the DC components corresponding to the load active and reactive powers and icd and icq are PI controller outputs corresponding to required current for self supporting DC bus and voltage regulation at PCC as: icd = KpdVdce + Kid∫Vdcedt (3) (4.14) icq = KpaVe + Kia∫Vedt (4) (4.15) where Vdce = Vdc* Vdc = error in DC bus voltage. Vdc* and Vdc are the reference voltage and actual voltage of DC bus of DSTATCOM respectively. Kpd and Kid are the proportional and integral gains of the PI controller over the DC bus voltage of DSTATCOM and Ve = Vt*-Vt = error in amplitude of the PCC voltage. Vt* and Vt are the reference voltage at PCC and amplitude of PCC voltage respectively. Kpa and Kia are the proportional and integral gains of the PI controller over the PCC voltage. The d-q component of the load currents are computed from the following equations: