Miracle-dz/UniFAR-FTUs huggingface dataset:
High Gain Non-isolated Interleaved Current-fed 3-Phase Partial Series Resonance Pulse Based ZCS Voltage Quadrupler

A three-inductor current sharing three-phase current-fed converter leveraging short pulse series resonance to facilitate zero-current switching (ZCS) and voltage clamping of the semiconductor devices is proposed and investigated while achieving high voltage gain. The converter exploits series resonance behavior during overlap between any two switching signals, which naturally reduces the switch current to zero in the outgoing switch assisting its zero current turn-off and voltage clamping eliminating the additional snubber requirement. Current-sharing three-inductor interleaved topology also results in reduced current stresses on the primary side and simpler gate driving requirements as the devices have common sources with the ground. Moreover, owing to the short resonance period, peak and circulating current in the converter are reduced resulting in lower conduction losses and lower current curating components. The proposed configuration facilitates output voltage regulation and ZCS by means of variable frequency modulation. Detailed analysis and design are reported. Simulation results are shown to validate the projected claims and confirm the feasibility and efficacy of the proposed converter operation.
Passive acoustic detection of distant ship crossing signal in deep waters using wavelet denoising technique

Time series measurements of ocean ambient noise were carried out in deep water of the Arabian Sea, using an autonomous passive acoustic monitoring system incorporated with OMNI (Ocean Moored buoy network in Northern Indian ocean) buoy operated by National Institute of Ocean Technology, during November 2018 to November 2019. Based on the time-frequency spectrogram analysis, it is observed that the distant ship crossing signal is contaminated by impulsive shackle noise. The sound generated by distant ship crossing is a broadband contribution with spectral peak in the frequency range of 0.5-2 kHz, and the acoustic energy is extending to a wide range of frequencies due to propeller bubble cavitation. However, the quality of radiated noise of distant shipping is indistinguishable due to the mixing of unwanted impulsive shackle noise in a wide range of frequency bands. Since the impulsive shackle noise reduces the quality of distant shipping signal, the wavelet denoisingthresholding technique is implemented to improve the quality of signal.The denoising techniques, particularly the median filtering, mean filtering, Fourier transform and Wiener filtering are linear approaches and is suitable for stationary signals [1], [2]. However, ocean ambient noise is non-stationary, and it is important to implement the non-linear wavelet approach. Wavelets are designed for non-stationary signals which split the data into different frequency components and noise spikes are studie in each frequency components at different resolution. In this study, the discrete wavelet thresholding denoising technique is implemented which provides three steps; signal decomposition, thresholding and signal reconstruction [3]. The original in-situ data is decomposed in 'approximations' and 'details' coefficients ateach level. The 'approximations' are high-scale and low frequency components, and the 'details' are low-scale and high frequency components of the signal. The rigrsure threshold estimation (Stein's Unbiased Risk Estimate) is adopted in this study. The soft thresholding method is considered though the wavelet coefficients becomes more stable and smooth as compared to the hard thresholding. Subsequently, the signal is denoised and reconstructed using modified level coefficients. Though, the acoustic energy of impulsive shackle noise is predominant as compared to the distant ship crossing signal, a subtraction method has been implemented. The shackle noise is isolated by subtracting the residual noise from denoised signal, and the only distant ship crossing signal is obtained by subtracting the isolated shackle noise from the original in-situ signal. Thus, the waveletdenoising technique has been implemented successfully for isolating source signal which is corrupted by the mechanical unwanted noise produced by mooring components.
Quantization-Aware In-situ Training for Reliable and Accurate Edge AI

In-memory analog computation based on memristor crossbars has become the most promising approach for DNN inference. Because compute and memory requirements are larger during training, memristive crossbars are also an alternative to train DNN models within a feasible energy budget for edge devices, especially in the light of trends towards security, privacy, latency, and energy reduction, by avoiding data transfer over the Internet. To enable online training and inference on the same device, however, there are still challenges related to different minimum bitwidth needed in each phase, and memristor non-idealities to be addressed. We provide an in-situ training framework that allows the network to adapt to hardware imperfections, while practically eliminating errors from weight quantization. We validate our methodology with image classifiers, namely MNIST and CIFAR10, by training NN models with 8-bit weights and quantizing to 2 bits. The training algorithm recovers up to 12 % of the accuracy lost to quantization errors even under high variability, reduces training energy by up to 6 ×, and allows for energy-efficient inferences using a single cell per synapse, hence enhancing robustness and accuracy for a smooth training-to-inference transition.
Voltage Balancing Control for Input-Series-Output-Parallel Three-Port Series Resonant Converter Modules

An Input-Series-Output-Parallel (ISOP) arrangement of converter modules is a common solution for realizing power converters with relatively high input voltages. ISOP systems allow for high voltage (HV) power processing using low voltage (LV) Wide Band Gap (WBG) devices, leading to a low cost, reliable, and modular solution. The main challenge with ISOP systems is ensuring equal voltage sharing across the series connected modules for safe and stable converter operation. This is even more challenging for three-port based ISOP modular systems due to additional coupling between input ports. In this paper, the authors propose a hybrid feedforward-feedback control approach for voltage balancing in ISOP Triple Active Bridge Series Resonant converter (TABSRC) modules. The proposed ISOP modules serve as a rectified AC to DC, |AC|-DC, stage in a single-stage unfolding based Solid-State Transformer (SST). Analysis and simulations are provided to illustrate the control approach, followed by hardware results demonstrating stable operation of two TABSRC modules in ISOP configuration.
AnaCoNGA: Analytical HW-CNN Co-Design Using Nested Genetic Algorithms

We present AnaCoNGA, an analytical co-design methodology, which enables two genetic algorithms to evaluate the fitness of design decisions on layer-wise quantization of a neural network and hardware (HW) resource allocation. We embed a hardware architecture search (HAS) algorithm into a quantization strategy search (QSS) algorithm to evaluate the hardware design Pareto-front of each considered quantization strategy. We harness the speed and flexibility of analytical HW-modeling to enable parallel HW-CNN co-design. With this approach, the QSS is focused on seeking high-accuracy quantization strategies which are guaranteed to have efficient hardware designs at the end of the search. Through AnaCoNGA, we improve the accuracy by 2.88 p.p. with respect to a uniform 2-bit ResNet20 on CIFAR-10, and achieve a 35% and 37% improvement in latency and DRAM accesses, while reducing LUT and BRAM resources by 9% and 59% respectively, when compared to a standard edge variant of the accelerator. The nested genetic algorithm formulation also reduces the search time by 51% compared to an equivalent, sequential co-design formulation.
Stacking Approach for Multiple Hybrid Binary Cascaded Multilevel Converter Modules with Reduced Scalability Complexity

The hybrid binary cascaded multilevel converter (HBCMLC) is a topology that employs asymmetric dc-side voltages sources in conjunction with a flying capacitor to increase the number of output voltage levels. Thus, the flying capacitor voltage (FCV) must be properly regulated to ensure safe operation and high waveform quality. To further improve the waveform quality, several HBCMLC modules could be cascaded, making the overall converter structure suitable for inductor-less dc-to-ac or ac-to-dc applications. However, stacking HBCMLC modules could increase the complexity of the system by requiring rigorous redesign of new FCV control loops and voltage states for the modulator. This paper proposes a straightforward scalability solution for the HBCMLC by introducing a slight phase shift between stacked modules. As a result, a single FCV controller and modulator structure operates the cascaded system regardless of the number of HBCMLC modules, resulting in dramatically reduced scalability complexity. Experimental verification of the proposed technique is presented for a three-module HBCLMC achieving 43 voltage levels at 1.2 kV and 720 W.
Australian approach to sustainable design professional development education

Through a parallel process of regulatory change and growing consumer demand, the Australian building industry is rapidly accepting its responsibility to reduce its environmental impact. However, there is a large gap between excellence in sustainable design and the average industry participant's ability to implement it. In 2005, the Australian Government and the University of Technology Sydney partnered with the local building industry to create the Building Industry Training in Sustainability, a world-class professional development programme for builders, designers and architects on sustainable residential buildings. This paper identifies the policy drivers that lead to the creation of the training programme, the partnership approach between government, academia and industry, the intellectual basis underpinning the development of training courses, and the unique delivery arrangement that provides high quality training opportunities to practitioners to all regions of Australia. In particular, the paper explores the role of education design in shifting practice.
TXSLAM: A Monocular Semantic SLAM Tightly Coupled with Planar Text Features

We propose a new monocular semantic simultaneous localization and mapping (SLAM) system that tightly couples planar text features. The system treats text features as a plane with rich texture information and semantic information, and more accurate camera pose estimation can be obtained by tightly coupling the semantic plane. Unlike previous work, it pioneers the use of words contained in the text to represent the semantic information of the plane, which enables the use of simpler and more efficient data association algorithms to match geometric planes. We evaluate our method in public datasets, and the final experimental results prove that our proposed system improves the accuracy of camera pose estimation. Additionally, the system augments the sparse map with semantic plane information, enhancing the applicability of the system in robotics, unmanned driving, augmented reality (AR), and virtual reality (VR).
AWARENESS OF DENTISTS TOWARD THE BIOLOGICAL EFFECTS OF IONIZING RADIATION AND ITSPROTECTION MEASURES IN KARAJ

Aim : This study aimed to investigate theawareness of the dentists about the biological effects of ionizing radiation and its protection measures in the city of Karaj, Iran. Materials and Methods : In this descriptive-analytical study,the study data were collected using a self-administered questionnaire including items on demographic and awareness of dentists. the analysis of collected data was done throughusing ANOVA test in SPSS version 20. Then, the data were entered into the SPSS statistical software (v. 20) and analyzed using Student t test and One-way ANOVA. Results : 90 of the dentists (69.2%) were male and 40 (30.8%) were female. 46.2% have more than 10-year work experience. 13.1% were employed in the public sector treatment centers. 80.8% did not participate in training courses of oral radiology. The overall mean score of dentists was14.60 ± 3.81. There was no significant difference among dentists’ awareness in terms of gender, working in publicor private treatment centers, working experience and participation in training courses (p>0.05). Conclusion : According to results of the present study, the dentists did not have sufficient information about the biological effects of ionizing radiation and its protection. This may cause some problems in the society. Therefore, improving dentists ‘awareness about radiation protection seems to be of great importance.
A Novel Integrated Bidirectional AC to DC Resonant Converter

Conventionally, an AC to DC isolated converter follows a two-stage design approach, wherein the first stage is an AC to DC power factor correction (PFC) stage followed by a resonant converter stage for DC voltage regulation. In existing topologies, the PFC stage and the primary side resonant switch network are merged into a single switch network giving rise to 25% fewer devices. Moreover, the switches in these topologies are soft switched that facilitates high switching frequency. Hence, low volume magnetic components and capacitors can be used to achieve higher power density. However, it is an unipolar voltage-fed resonant topology and also, the power transfer is unidirectional, restricting the power flow only from AC to DC side. This paper proposes a novel isolated bidirectional bipolar voltage-fed AC to DC converter which has all the aforementioned advantages. In addition, it addresses their shortcomings by generating a bipolar voltage across the resonant tanks and realizing bidirectional power flow. A modulation and control technique is proposed for generating switching pulses for DC link voltage control and bidirectional power transfer. These are demonstrated through simulations and experiments, where 1.35 kW power is transferred at 130 kHz switching frequency, 150V (L-L) AC input voltage and 200V output DC voltage.
High-Precision Parameter Identification Method for High Speed PMSM based on Impedance Model and Current Injection

Accurate parameter identification can improve the performance of sensorless field-oriented control (FOC) in high speed permanent magnet synchronous motors (HSPMSMs). High frequency (HF) voltage injection is a commonly used method, which resolves the rank deficiency and can estimate all electrical parameters simultaneously. However, it needs low pass filter to remove the HF current in current controller, which greatly reduces the control bandwidth. Therefore, this paper proposes a parameter identification method based on HF current injection, which does not require low pass filter in current controller and can maintain high control bandwidth. Furthermore, the proposed method fully considers the significant delay effect in HSPMSM, thus highly improves the estimation accuracy. The proposed method is validated on a 14krpm HSPMSM and its estimated parameters improve the performance of sensorless FOC at both low speed and high speed, verifying the good identification accuracy.
OPACT: Optimization of Approximate Compressor Tree for Approximate Multiplier

Approximate multipliers have attracted significant attention of researchers for designing low-power systems. The most area-consuming part of a multiplier is its compressor tree (CT). Hence, the prior works proposed various approximate compressors to reduce the area of the CT. However, the compression strategy for the approximate compressors has not been systematically studied: Most of the prior works apply their ad hoc strategies to arrange approximate compressors. In this work, we propose OPACT, a method for optimizing approximate compressor tree for approximate multiplier. An integer linear programming problem is first formulated to co-optimize CT's area and error. Moreover, since different connection orders of the approximate compressors can affect the error of an approximate multiplier, we formulate another mixed-integer programming problem for optimizing the connection order. The experimental results showed that OPACT can produce approximate multipliers with an average reduction of 24.4% and 8.4% in power-delay product and mean error distance, respectively, compared to the best existing designs with the same types of approximate compressors used.
Design Guideline and Practical Solution of PCB-type Rogowski Current Sensor for SiC MOSFET Short-Circuit Protection Based on Frequency Analysis

In this paper, design guideline of a PCB-type Rogowski current sensor (RCS) is proposed for SiC MOSFET short-circuit (SC) protection. The proposed design of RCS is explained step by step based on the frequency analysis of the Rogowski coil. Also, the input and output filters are proposed and designed considering practical situations which have sensing error, noise, and delay time. In conclusion, the sensing performance of the designed RCS is verified through double pulse test (DPT). Based on the high-performance RCS, SC tests are performed to verify the performance of SC protection. Through the experimental results, the achievement of protection is confirmed, and SC response time is measured to evaluate protection performance.
De-RISC: A Complete RISC-V Based Space-Grade Platform

The H2020 EIC-FTI De-RISC project develops a RISC-V space-grade platform to jointly respond to several emerging, as well as longstanding needs in the space domain such as: (1) higher performance than that of monocore and basic multicore space-grade processors in the market; (2) access to an increasingly rich software ecosystem rather than sticking to the slowly fading SPARC and PowerPC-based ones; (3) freedom (or drastic reduction) of export and license restrictions imposed by commercial ISAs such as Arm; and (4) improved support for the design and validation of safety-related real-time applications, (5) being the platform with software qualified and hardware designed per established space industry standards. De-RISC partners have set up the different layers of the platform during the first phases of the project. However, they have recently boosted integration and assessment activities. This paper introduces the De-RISC space platform, presents recent progress such as enabling virtualization and software qualification, new MPSoC features, and use case deployment and evaluation, including a comparison against other commercial platforms. Finally, this paper introduces the ongoing activities that will lead to the hardware and fully qualified software platform at TRL8 on FPGA by September 2022.
MCMQ: Simulation Framework for Scalable Multi-Core Flash Firmware of Multi-Queue SSDs

Solid-state drives (SSDs) have been used in a wide range of emerging data processing systems. To fully utilize the massive internal parallelism delivered by SSDs, manufacturers begin to utilize high-performance multi-core microprocessors in scalable flash firmware to process I/O requests concurrently. Designing scalable multi-core flash firmwares requires simulation tools that can model the features of a multi-core environment. However, existing SSD simulators assume a single-threading execution model and are not capable of modelling overheads incurred by multi-threading firmware execution such as lock contentions. In this paper, we propose MCMQ, a novel framework for simulating scalable multi-core flash firmware. The framework is based on an emulated multi-core RISC processor and supports executing multiple I/O traces in parallel through a multi-queue interface. Experiment results show the effectiveness of the proposed framework. We have released the open-source code of MCMQ for public access.
A Modular and Performance-Tunable Silicon Carbide Half-Bridge Building Block with Digital Gate Driver

This work presents the system-level design of a low stray-inductance printed circuit board based half-bridge power electronic building block (PEBB) using a high performance 1.7-kV silicon carbide power module to demonstrate the modularity and scalability for fast hardware prototyping. Also, a digital gate driver with two-level (2-L) turn-off is developed to address the tradeoff between voltage overshoot and switching losses, leading to a building block with tunable performance that can be tailored for different applications. Various clamped inductive load (CIL) tests were performed to validate the low inductance PEBB design and voltage overshoot mitigation with digital gate driver. In addition, the feasibility of using the designed PEBB for fast prototyping has been validated using dc/ac and dc/dc conversion scenarios.
Best Current Practices for Securing Internet of Things (IoT) Devices

In recent years, embedded computing devices have increasingly been provided with Internet interfaces, and the typically-weak network security of such devices has become a challenge for the Internet infrastructure. This document lists a number of minimum requirements that vendors of Internet of Things (IoT) devices need to take into account during development and when producing firmware updates, in order to reduce the frequency and severity of security incidents in which such devices are implicated.
Fast Transient State Feedback Digital Current Mode Control Design in Series Capacitor Buck Converters

Series capacitor buck (SCB) converters offer high efficiency and high power density even at a higher step-down ratio by combining a switch capacitor network in a conventional buck converter. However, the challenges remain in identifying suitable modeling, control and design methods in achieving fast transient performance while maintaining the desired voltage levels of the flying capacitors. In particular, structural changes in the system dimension due to the dynamic reconfiguration of the flying capacitors, make it difficult for modeling and analysis of digitally controlled SCB converters. By considering the full order state space model of the SCB, this digest proposes a unified discrete-time (DT) framework to analytically derive DT large-signal and small-signal models, which takes into account structural changes. The accuracy of the model is verified using SIMPLIS simulation. A digital current mode control (DCMC) technique is considered for a 12 V to 1 V operation, a novel state feedback based design approach is developed. For a 30 A load step, the proposed method results in $25\ \mu\mathrm{s}$ settling time and nearly 75 mV under/ overshoot with a 25% improvement in the transient performance compared to that using a conventional output feedback design approach. The proposed method is scalable with the increasing phase count, which is further verified considering two modules of the SCB converter. Improved performance using the proposed design method is demonstrated using SIMPLIS simulation.