Application Specific Instruction Set Processors : Redefining Hardware-Software Boundary (Invited Paper)

Logic functions have many different architectural alternatives for their implementations. These range from ded- icated combinational and sequential architectures to different types of programmable CPU architectures. Each architectural alternative presents a unique set of advantages and limitations. The choice of an architecture is decided based on how well the speed-power-cost and design time trade-offs that the architec- tures offers matches the design's requirement. While both the dedicated hardware architectures and the software architectures (programmable CPU based) have a long history of research and exploration, it is comparatively more recently that one has started seeing the trend of leveraging the best features of both these kinds of architectures via designing new programmable architectures, namely the Application Specific Instruction Set Processor (ASIP) architectures. The idea of present paper is to discuss the comparative benefits and limitations of both the dedicated hardware architectures and the software based general purpose architectures and identify how the benefit of these architectures can be realized through a single architecture — the ASIP architecture. I. INTRODUCTION Dedicated hardware architectures are the architectural cre- ations for performing the logic of a specific application. They are very closely tied to the logic specification (functionality) of the specific application and are thus inflexible in terms of their functionality. A change in functional specification necessarily implies a change in the architecture. Dedicated architectures can be combinational, sequential, pipelined, parallel, or can be configured to have any suitable mix of these broad architecture types. Different dedicated architectures for the same functional specification can offer a wide spectrum of speed-power-cost trade-offs. However, a defining characteristics of dedicated architectures is their non-resilience vis-a-vis a change in the logic specification. If the logic specification changes, some change is necessarily required to be made in the hardware. Dedicated architectures can be designed to utilize the full degree of parallelism available in the logical specification to achieve high performance, or they can be tailored towards low-cost but low performance sequential architectural variants. Pipelining can be incorporated in them for increasing the throughput — if the same logical functionality is required repeatedly. The other extreme in the architectural space belongs to the general-purpose computer architectures — which are universal architectures in that they can implement any logical func- tion without requiring any change in the hardware. General- purpose computer architectures achieve this flexibility through the definition and use of an instruction set. The CPU hardware architecture is designed only to execute any instruction from the instruction set loaded into its instruction register and then proceed to load the next instruction from the memory into the instruction register of the CPU and then start execut- ing this instruction — thus achieving a chained execution of instructions that achieves the desired logic function. No change in hardware is required if the logic function to be performed is changed. Neither the CPU, nor the memory nor their interconnection need any change; only the sequence of instructions stored in the memory (which is the content of the memory) changes — which gives such content the name software. The instruction set serves the purpose of decoupling the hardware architecture and the logical function of a specific application. A dedicated architecture implements the logical functions of instructions in the instruction set; whereas the logical function of a specific application is constructed by storing a sequence of instructions in the memory. A change in the logical specification of the application or a completely new logical specification corresponding to a different application does not impact either the definition of the instruction set or the dedicated hardware architecture of the CPU created to implement the logical functions of the instructions in the instruction set. It only impacts the sequence of instructions stored in the memory for the application. The instruction set thus serves to define a library of soft gates and the sequence of instructions stored in the memory for a specific application defines the corresponding netlist of 'soft gates' to realize the logical specification of the application. However, software logic has to pay the price of its flexibility and universality in terms of reduction in its speed of operation and increase in its energy consumption per function, this can be understood by viewing a machine language instruction set as a library of 'soft gates', and the sequence of instructions