III-N High-Power Electronic Devices

The III-N materials system offers a greatly increas ed power-switching performance and a dramatic theoreti cal advantage in the standard Figures of Merit for powe r electronic devices compared to Siand other III-Vbased power devices. III-N devices are also more suitabl e for operation in harsh environments because of their wi der bandgap properties. These attractive properties of III-N materials have led to increased interest in their commercial application for “low-frequency” power switching applications. In addition, the III-Ns po tentially offer a heterojunction bipolar transistor (HBT) tec hnology with excellent high-power and high-speed performanc e for highly linear power amplifiers. Recent improve m nts in MOCVD epitaxial material growth and fabrication technologies have enabled a number of advances in t he growth and fabrication of high-voltage heterojuncti on field-effect transistors (HFETs) on Si substrates, as well as the growth of GaN/InGaN npn HBT demonstrations that used a single-step epitaxial growth scheme. I n this paper, we will present data on recent advances in b oth HFET-based high-voltage devices and on high-power I IIN HBTs. The limits of Si-based devices for solid-state pow er switches potentially can be greatly exceeded by GaN based HFETs that feature high-current-drive, high switching-frequencies, and high-temperature-operati on capabilities have sparked great interests for highpower switching applications in recent years [1-2]. Usin g GaNbased power transistors, it has been shown that hig hperformance power electronics can be realized to ac hieve low-energy-loss, compact, high-temperature, highswitching-speed, and hence high-efficiency systems. These features are important in the power electroni c industries to overcome these challenges for nextgeneration solid state electronic switches that cur rent Sibased power electronics are lacking [3-5]. The commonly used substrate for the implementation of GaN HFETs are SiC, GaN, or sapphire substrates [ 6-8]. In recent years, silicon substrates also have been extensively studied to exploit potential low-cost commercialization opportunities for power electroni cs due to good thermal conductivity and the availabili ty for large-wafer sizes. Tremendous efforts have led to quite a few successful demonstrations of high-performance G aN HFETs on Si substrates. For examples, Hikita e al. developed a high power-power AlGaN/GaN HFET with a breakdown voltage of 350 V and a specific on-resist ance of 1.9 mΩ-cm by using a source-via grounding (SVG) design through 4 inch conductive Si substrate [9]. In this paper, we report depletion-mode 2.5-A AlGaN/GaN HFETs that have the specific on-resistanc e of ~6.2 mΩ-cm and the blocking voltage of greater than 1.25 kV with the drain leakage current < 2.2 μA/mm. A study of the blocking voltage and the on-state resi stance suggests that these switching figures of merit scal e linearly with the gate-to-drain distance up to at l east 2-kV for fabricated GaN-on-Si transistors. We also report continued improvement of GaN-based npn double-heterojunction bipolar transistors (DHBTs) grown by metalorganic chemical vapor deposition (MOCVD) with state-of-the-art high collector curren t density (JC) and low knee voltage ( Vknee). For HBTs grown on sapphire, the common-emitter I-V characteristics show a high JC ~19.8 kA/cm 2 and JC = 28.6 kA/cm from the Gummel plot with a offset voltage (Voffset) of < 0.22V and a Vknee < 2.1 V. The measured BVCEO is 110 V. These values are among the best values reported to date for III-nitride (III-N) HBTs, sugg esting that these DHBTs would be viable for high-power rad iofrequency (RF) applications. These results for GaN HBTs/sapphire show that highperformance III-N HBTs can be achieved without the need for complex re-growth schemes as reported earl ier. To further develop III-N HBTs for RF power amplifications, high JC, low Voffset, and low Vknee are required. In this talk, we will demonstrate that a large performance improvement can be obtained by the use of high-quality GaN substrates. Previously, the repor ted highest JC for III-N HBTs was limited to ~10 kA/cm 2 [4], and Vknee were typically in the range of 5~15 V due to certain fabrication processing issues. In this stu dy, the GaN/InGaN HBT fabrication process is further optimi zed through the low-resistive metallization and low-dam age etching processing. As a result, dramatically enha nced JC and lower Voffset and Vknee were achieved