Miracle-dz/UniFAR-FTUs huggingface dataset:
Jumping Shift: A Logarithmic Quantization Method for Low-Power CNN Acceleration

Logarithmic quantization for Convolutional Neural Networks (CNN): a) fits well typical weights and activation distributions, and b) allows the replacement of the multiplication operation by a shift operation that can be implemented with fewer hardware resources. We propose a new quantization method named Jumping Log Quantization (JLQ). The key idea of JLQ is to extend the quantization range, by adding a coefficient parameter “s” in the power of two exponents $(2^{sx+i})$. This quantization strategy skips some values from the standard logarithmic quantization. In addition, we also develop a small hardware-friendly optimization called weight de-zero. Zero-valued weights that cannot be performed by a single shift operation are all replaced with logarithmic weights to reduce hardware resources with almost no accuracy loss. To implement the Multiply-And-Accumulate (MAC) operation (needed to compute convolutions) when the weights are JLQ-ed and de-zeroed, a new Processing Element (PE) have been developed. This new PE uses a modified barrel shifter that can efficiently avoid the skipped values. Resource utilization, area, and power consumption of the new PE standing alone are reported. We have found that JLQ performs better than other state-of-the-art logarithmic quantization methods when the bit width of the operands becomes very small.
Engineering Design Exploration Using Locally Optimized Covariance Kriging

Surrogate models are used in many engineering applications where actual function evaluations are computationally expensive. Kriging is a flexible surrogate model best suited for interpolating nonlinear system responses with a limited number of training points. It is commonly used to alleviate the high computational cost associated with design exploration techniques: for example, uncertainty quantification and multidisciplinary design optimization. However, when the underlying function shows varying degrees of nonlinear behavior within a design domain of interest, kriging, with a stationary covariance structure, can result in low-quality predictions and an overly conservative expected mean squared error. This effect is often amplified by data collected adaptively and unevenly during iterative design explorations. In this paper, the locally optimized covariance kriging method is proposed to capture the nonstationarity of the underlying function behavior. In locally optimized covariance kriging, the nonstati.
Affective computing for emotion identification using dual-stage filtered multi-channel EEG signals

The dual-stage correlation and instantaneous frequency (CIF) thresholding approach for retrieval of noise-free desired frequency band of EEG signal is proposed for affective emotion identification task. Initially, the raw electroencephalogram (EEG) signals are breakdown applying the empirical mode decomposition technique to produce intrinsic mode functions (IMFs). The noisy IMFs are eliminated by applying correlation thresholding. Secondly, these noise-free EEG signals are divided into several modes using a non-linear chirp variational mode decomposition approach to retrieve desired frequency bands (4-30Hz) by applying the IF-based filtering method on the modes. The power spectral densities extracted from filtered modes are fed to ML-based classifiers to classify emotions into arousal, valence, and dominance groups. This study also shows the efficacy of ensemble ML (EML): random forest (RF) and bagging over conventional ML (CML): support vector machine and logistic regression classifiers. The RF reported the highest average F1-scores using 10-fold cross-validation for arousal, valence, and dominance are 83.99%,75.94%, and 88.86% respectively. Similarly, the respective average accuracies of two-EML are~1.47%, ~1.27%, and~0.3% higher compared to two-CML classifiers. To summarize, the proposed CIF-based filtering approach is useful for affective emotion identification under the framework of EML classifiers.
Deep Learning-based Analysis and Classification of COVID Patients Through CT Images

COVID 19 disease also known as SARS-CoV-2 has spread rapidly all over the world, crippling industries all around the world, caused many death and affected life in all aspects. SARS-CoV-2 has become a global pandemic within three months. Even though some test facilities has been available, but they are not useful because of varying symptoms. In severe cases most patients have been diagnosed by lung infection, most of the patients with lungs infection go unnoticed or have been confused with pneumonia which caused the rise in mortality rate. Modern facilities, such as artificial intelligence and machine learning, and neural network-based technologies can be used to resolve these issues. In this research, we present a technique for lung CT-scan images analysis to classify the infected patients, for this we have used the lightweight neural network-based EfficientNet using a publicly available dataset and achieved an accuracy of 98.00 %. Other datasets have also been tested on trained weights of EfficientNet classification architecture and accuracy of 86.62 % and 88.98% is achieved. We also used specialized pre-processing techniques on the dataset, which gives the accuracy of 99.90%, and fine-tuned the trained weights on two other datasets and achieved an accuracy of 99.89% and 99.18% respectively. Also, it has been proved that training weights of the neural network on one dataset, could detect infected patients and give good accuracy on any other CT scan datasets.
Special Session: CAD for Hardware Security - Promising Directions for Automation of Security Assurance

Hardware security creates a hardware-based security foundation for secure and reliable operation of systems and applications used in our modern life. The presence of design for security, security assurance, and general security design life cycle practices in product life cycle of many large semiconductor design and manufacturing companies these days indicates that the importance of hardware security has been very well observed in industry. However, the high cost, time, and effort for building security into designs and assuring their security - due to using many manual processes - is still an important obstacle for economy of secure product development. This paper presents several promising directions for automation of design for security and security assurance practices to reduce the overall time and cost of secure product development. First, we present security verification challenges of SoCs, possible vulnerabilities that could be introduced inadvertently by tools mapping a design model in one level of abstraction to its lower level, and our solution to the problem by automatically mapping security properties from one level to its lower level incorporating techniques for extension and expansion of the properties. Then, we discuss the foundation necessary for further automation of formal security analysis of a design by incorporating threat model and common security vulnerabilities into an intermediate representation of a hardware model to be used to automatically determine if there is a chance for direct or indirect flow of information to compromise confidentiality or integrity of security assets. Finally, we discuss a pre-silicon-based framework for practical and time-and-cost effective power-side channel leakage analysis, root-causing the side-channel leakage by using the automatically generated leakage profile of circuit nodes, providing insight to mitigate the side-channel leakage by addressing the high leakage nodes, and assuring the effectiveness of the mitigation by reprofiling the leakage to prove its acceptable level of elimination. We hope that sharing these efforts and ideas with the security research community can accelerate the evolution of security-aware CAD tools targeted to design for security and security assurance to enrich the ecosystem to have tools from multiple vendors with more capabilities and higher performance.
SMI-LSTM: A vehicle trajectory prediction network based on spatial motion interaction modeling

Vehicle trajectory prediction is a critical task in intelligent vehicle behavior decision-making and motion planning. It involves estimating the future position change of a vehicle using its historical trajectory and motion states. However, accurately predicting trajectories is still a challenging task due to the diversity of traffic scenes and the limitations of autonomous vehicle perception. Most existing models use a occupancy grid-based method to represent the surrounding environment and select surrounding vehicles, then relying solely on the absolute motion state in static space to represent the interaction relationship between vehicles. This method fails to consider vehicles as nodes in the graph structure to capture hidden interactions between vehicles, and ignores the relative motion characteristics of vehicles in dynamic space. Moreover, the influence of vehicles beyond visual range on object vehicle movement has not been fully considered since data acquisition mainly relies on on-board equipment. This paper proposes a LSTM network model based on spatial motion interaction (SMI-LSTM) that leverages the relative motion characteristics and the graph neural network to address these issues. Our model creates a global dynamic spatial representation based on data sampled by roadside equipment from an overhead perspective, allowing the relative motion characteristics of important vehicles to be input into the network. We also use the graph attention mechanism to capture hidden interaction relationship of vehicle interactions.
Test Generation for Defect-Based Faults of Scan Flip-Flops

When testing scan flip-flops (SFFs), chain test is first applied to ensure the functionality of scan chains and to detect the majority of stuck-at (SA) and transition delay (TD) faults along scan paths. However, there still exist some defects inside scan cells that cannot be effectively detected by chain test or conventional SA and TD patterns. This paper presents five cell-aware (CA) fault models to explicitly target the defects inside scan flip-flops. The proposed static shift (SS) and dynamic shift (DS) faults identify the defects detectable by chain test. For the defects escaping chain test, static single-capture (SSC) faults target the defects detectable when SFFs are in one-cycle capture mode, while static double-capture (SDC) and dynamic double-capture (DDC) faults target those detectable when SFFs are in two-cycle capture mode. The identified CA faults of SFFs are output in a format compatible with a commercial ATPG tool for pattern generation. Experimental results on large IWLS05 benchmarks demonstrate that our proposed faults cannot be fully covered by conventional SA and TD patterns and hence require dedicated test patterns to detect.
The Construction and Identification Approaches of Adjectival Predicate in Modern Tibetan

The adjectival predicate in modern Tibetan is distinctive in syntactic construction. According to the forms of adjectives, the adjectival predicate may mainly be classified into two types: adjectives plus predicate suffixes (aspect-evidential markers and mood words) converted from existential verbs constitute one type; the other type is formed by adjective root suffixed with typical verbal aspect-evidential suffixes. On the basis of describing in detail adjective predicate structure and formal markers, this paper discusses experiments on the identification of adjectival predicate chunks, essentially accomplishes the recognition of adjective predicate by mating text words with adjective wordlist, adverb wordlist, predicate suffix list as well as order operations, and at last analyzes cases of misidentification.
Analysis and Implementation of Approximate 4-2 Compressors for Approximate Multipliers

An emerging trend in digital design is approximate computing, which trades off the need for precise computation for increased speed and efficiency. These circuits have been the promising solution for energy-efficient designs in error-tolerant applications. In this paper we analyze the previously proposed 4-2 compressors and compare the results for 8x8 multipliers. The designs are implemented in Vivado, and layouts are made using the magic VLSI tool with osu018 library. The experimental results indicate 33.65% area decrease for the compressor compared to exact compressor and 25.15% decrease in the area delay product of 8x8 multiplier compared to exact multiplier.
Identifying Fake News in Real Time

Today's society faces a significant challenge in the form of fake news. It is essential to be able to spot instances of false news as they occur in real time in order to stop their spread and lessen the damage they do. This research study describes a thorough method for spotting false news in real time using machine learning techniques. The method is presented in the context of this research article. This study offers a system that differentiates between authentic and false news by combining a variety of characteristics and classifiers in a unified fashion. The linguistic and contextual elements, as well as data on user activity, are utilized by proposed technique in the identification of bogus news. Proposed system is tested on a real-time dataset and find that it has a high rate of accuracy as well as precision when recognizing false news.
Narrowing the Synthesis Gap: Academic FPGA Synthesis is Catching Up With the Industry

Historically, open-source FPGA synthesis and technology mapping tools have been considered far inferior to industry-standard tools. We show that this is no longer true. Improvements in recent years to Yosys (Verilog elaborator) and ABC (technology mapper) have resulted in substantially better performance, evident in both the reduction of area utilization and the increase in the maximum achievable clock frequency. More specifically, we describe how ABC9 — a set of feature additions to ABC — was integrated into Yosys upstream and available in the latest version. Technology mapping now has a complete view of the circuit, including support for hard blocks (e.g., carry chains) and multiple clock domains for timing-aware mapping. We demonstrate how these improvements accumulate in dramatically better synthesis results, with Yosys-ABC9 reducing the delay gap from 30% to 0% on a commercial FPGA target for the commonly used VTR benchmark, thus matching Vivado's performance in terms of maximum clock frequency. We also measured the performance on a selection of circuits from OpenCores as well as literature, comparing the results produced by Vivado, Yosys-ABC1 (existing work), and the proposed Yosys-ABC9 integration.
Automated and Agile Design of Layout Hotspot Detector via Neural Architecture Search

This paper presents a neural architecture search scheme for chip layout hotspot detection. In this work, hotspot detectors, in the form of neural networks, are modeled as weighted directed acyclic graphs. A variational autoencoder maps the discrete graph topological space into a continuous embedding space. Bayesian Optimization performs neural architecture search in this embedding space, where an architecture performance predictor is employed to accelerate the search process. Experimental studies on ICCAD 2012 and ICCAD 2019 Contest benchmarks demonstrate that, the proposed scheme significantly improves the agility of previous neural architecture search schemes, and generates hotspot detectors with competitive detection accuracy, false alarm rate, and inference time.
Automatic detection of green litchi based on YOLOV3, YOLOV4, YOLOV5-S and YOLOV5-X deep learning algorithm

The accurate detection of green litchi is one of the important means of litchi plantation, and plays an important role in disease and insect protection and yield estimation. Selecting models that already exist on the market is not only convenient and fast, but also saves costs. In this experiment, YOLOV3, YOLOV 4, YOLOV5-S and YOLOV5-X of YOLO series were used to detect green litchi in the natural environment, and the most suitable model for detection was obtained through comparison and analysis. The experimental results show that the model detection effect of YOLOV5 is the best, and the detection speed of YOLOV5-S model is the fastest. The average accuracy of YOLOV5-X is 0.998, the average accuracy of FPS is 11.13, the average accuracy of YOLOV5-S is 0.993, and the average accuracy of FPS is 47.16. To sum up, YOLOV5-S model is more suitable for detecting green litchi in natural environment because of its fast speed and relatively high accuracy.
Memristor-Spikelearn: A Spiking Neural Network Simulator for Studying Synaptic Plasticity under Realistic Device and Circuit Behaviors

We present the Memristor-Spikelearn simulator (open-sourced), which is capable of incorporating detailed mem-ristor and circuit models in simulation to enable thorough study of synaptic plasticity in spiking neural networks under realistic device and circuit behaviors. Using this simulator, we demonstrate that: (1) a detailed device model is essential for simulating synaptic plasticity workloads, because results obtained using a simplified model can be misleading (e.g., it can overestimate test accuracy by up to 21.9%); (2) detailed simulation helps to determine the proper range of conductance values to represent weights, which is critical in order to achieve the desired accuracy -energy tradeoff (e.g., increasing the conductance values by $10\times$ can increase accuracy from 70% to 83% at the price of $20\times$ higher energy); and (3) detailed simulation also helps to determine an optimized circuit structure, which is another important design parameter that can yield different accuracy -energy tradeoffs.
RGB-D SLAM Method Based on Feature Association in Dynamic Environment

Simultaneous localization and mapping (SLAM) is one of the current research hotspots. However, in visual SLAM for dynamic environments, inaccurate detection of object motion states and incomplete dynamic region culling will lead to large localization errors. To address these issues, this paper proposes an RGB-D SLAM method based on feature association. The method has strongly correlated features in time and space according to the input image sequence. Using the moving probability of the feature points in the previous frame, the movement of the feature points in the current frame is calculated in combination with the dynamic corner points screened in the current frame. Then, the motion state of the object is determined according to the proportion of different feature points. Then combined with semantic information and object depth information, the fast search method is used to obtain accurate dynamic regions. Finally, the selected effective feature points are used to estimate the camera pose and establish a static map of the environment. This paper evaluates the robustness and accuracy of our method on the TUM dataset and real environment, and the results show that our method can significantly improve the system tracking effect and reduce the system tracking error compared with other SLAM methods in dynamic environments.
Designing a Biped Robot's Gait using Reinforcement Learning's -Actor Critic Method

The development of humanoid robots and the improvements in robot-assisted mobility have created a huge need for robots that can learn to walk in challenging environments. Hand engineered approaches might work in constrained environments, but learning-based approaches may prove to be superior owing to their greater generalization. In this work, a simple reinforcement learning technique has been designed for the biped robot's real-time gait planning. The bipedal walking is a process in which the robot constantly engages with its surroundings, evaluates the effectiveness of its control actions based on how it is moving, and then modifies its control approach accordingly. The continuous state space and action space are obtained using the Actor-Critic Model (ACM) reinforcement learning method, which also directly determines the robot's final gait without using the reference gait. In order to decrease the amount of actual robot training, speed up training, and guarantee the acquisition of the final gait, the trained model is transferred to the walking control of the actual robot. Finally, a biped robot is created and constructed to test the viability of the suggested approach. Several experiments demonstrate that the suggested approach can produce the continuous and stable gait planning needed for the biped robot.
Efficient Software-Implemented HW Fault Tolerance for TinyML Inference in Safety-critical Applications

TinyML research has mainly focused on optimizing neural network inference in terms of latency, code-size and energy-use for efficient execution on low-power micro-controller units (MCUs). However, distinctive design challenges emerge in safety-critical applications, for example in small unmanned autonomous vehicles such as drones, due to the susceptibility of off-the-shelf MCU devices to soft-errors. We propose three new techniques to protect TinyML inference against random soft errors with the target to reduce run-time overhead: one for protecting fully-connected layers; one adaptation of existing algorithmic fault tolerance techniques to depth-wise convolutions; and an efficient technique to protect the so-called epilogues within TinyML layers. Integrating these layer-wise methods, we derive a full-inference hardening solution for TinyML that achieves run-time efficient soft-error resilience. We evaluate our proposed solution on MLPerf-Tiny benchmarks. Our experimental results show that competitive resilience can be achieved compared with currently available methods, while reducing run-time overheads by ~120% for one fully-connected neural network (NN); ~20% for the two CNNs with depth-wise convolutions; and ~2% for standard CNN. Additionally, we propose selective hardening which reduces the incurred run-time overhead further by ~2x for the studied CNNs by focusing exclusively on avoiding mispredictions.
Infrared and visible image fusion based on dense connectivity and Transformer self-encoding

Most of the existing deep learning-based infrared and visible image fusion methods use convolutional neural networks for feature extraction, but the perceptual field of convolutional neural networks becomes smaller as the depth of the convolutional layers increases, and it is difficult to focus on the global features of the source image. To address the above problems, this paper proposes a self-encodering based on the combination of dense connection module and Transformer module, and the Transformer module can extract the non-local interaction relationship of the source image from the entire image, focus more on the global features, and the dense connection module better understands the local features of the original image. In addition, the existing loss function lacks the deep semantic information of the image, and this paper introduces perceptual loss in the loss function to better retain the texture and detail information in the image of the image. After the source image is featured extracted by the self-encoder designed herein, the fused image is obtained by the reconstruction of the decoder. Experimental results show that compared with nine traditional and deep learning-based image fusion methods, the methods in this article have better performance in subjective comparison and objective image quality evaluation.