Miracle-dz/UniFAR-FTUs huggingface dataset:
Test set generation and optimisation using evolutionary algorithms and cubical calculus

As the complexity of modern day integrated circuits rises, many of the challenges associated with digital testing rise exponentially. VLSI technology continues to advance at a rapid pace, in accordance with Moore's Law, posing evermore complex, NP-complete problems for the test community. The testing of ICs currently accounts for approximately a third of the overall design costs and according to the Semiconductor Industry Association, the per-transistor test cost will soon exceed the per-transistor production cost. Given the need to test ICs of ever-increasing complexity and to contain the cost of test, the problems of test pattern generation, testability analysis and test set minimisation continue to provide formidable challenges for the research community. This thesis presents original work in these three areas. Firstly, a new method is presented for generating test patterns for multiple output combinational circuits based on the Boolean difference method and cubical calculus. The Boolean difference method has been largely overlooked in automatic test pattern generation algorithms due to its cumbersome, algebraic nature. It is shown that cubical calculus provides an elegant and economical technique for solving Boolean difference equations. Formal mathematical techniques are presented involving the Boolean difference and cubical calculus providing, a test pattern generation method that dispenses with the need for costly circuit simulations. The methods provide the basis for test generation algorithms which are suitable for computer implementation. Secondly, some of the core test pattern generation computations outlined above also provide the basis of a new method for computing testability measures such as controllability and observability. This method is effectively a very economical spin-off of the test pattern generation process using Boolean differences and cubical calculus.The third and largest part of this thesis introduces a new test set minimization algorithm, GA-MITS, based on an evolutionary optimization algorithm. This novel approach applies a genetic algorithm to find minimal or near minimal test sets while maintaining a given fault coverage. The algorithm is designed as a postprocessor to minimise test sets that have been previously generated by an ATPG system and is thus considered a static approach to the test set minimisation problem. It is shown empirically that GA-MITS is remarkably successful in minimizing test sets generated for the ISCAS-85 benchmark circuits and hence potentially capable of reducing the production costs of realistic digital circuits.
Sampled‐data consensus of nonlinear multiagent systems subject to cyber attacks

This paper is concerned with the sampled‐data consensus problem for a class of nonlinear multiagent systems subject to cyber attacks. The considered attacks are assumed to be recoverable, which destroy the connectivity of the network topology with directed spanning tree. In light of the designed sampled‐data control protocol, a more general switched system is proposed to model both the cyber attacks and the sampled‐data mechanism within a unified framework. Then, by using the contradiction methods, the solution of a class of differential equations is provided to deal with the technical challenge resulting from the switching and sampling issues. Furthermore, in terms of such a solution combined with the constructed piecewise Lyapunov function, sufficient conditions are derived under which the nonlinear multiagent systems subject to attacks achieve the consensus exponentially. The relationship between the attack frequency and the sampling period is also revealed through the obtained conditions. Finally, simulations are given to show the effectiveness of the proposed results.
Processor architecture driven algorithm optimization for fast 2D-DCT

This paper presents a fast two-dimensional (inverse) discrete cosine transform optimized for software implementation on a RISC microprocessor with an integer multiplier-accumulator (MAC) unit. The number of processor cycles as well as computational error is less than that of the row-column approaches based on fast 1D DCTs. The algorithm is implemented on a 100 MIPS 32-bit scalar RISC microprocessor V830 which has a MAC unit. The 8/spl times/8 DCT/IDCT for MPEG1 size (352/spl times/240) video with 30 frames/sec can be processed with 38.5 MIPS on V830.
A Column Generation Based Heuristic for the Dial-A-Ride Problem

The Dial-a-Ride Problem is a variant of the pickup and delivery problem with time windows, where the user inconvenience must be taken into account. In this paper, ride time and customer waiting time are modeled through both constraints and an associated penalty in the objective function. We develop a column generation approach, dynamically generating feasible vehicle routes. Handling ride time constraints explicitly in the pricing problem solver requires specific developments. Our dynamic programming approach for pricing problem makes use of a heuristic dominance rule and a heuristic enumeration procedure, which in turns implies that our overall branch-and-price procedure is a heuris-tic. However, in practice our heuristic solutions are experimentally very close to exact solutions and our approach is numerically competitive in terms of computation times.
RELEVANCE FEEDBACK: A NOVEL METHOD TO ASSOCIATE USER SUBJECTIVITY TO IMAGE DATABASES IN CBIR

Image retrieval is an important topic in the field of pattern recognition and artificial intelligence. There are three categories of image retrieval methods: text-based, content-based and semantic-based. In Content-Based Image Retrieval (CBIR), images are indexed by their visual content, such as color, texture, shapes. CBIR has become one of the most active research areas in the past few years. Many visual feature representations have been explored and many systems are built. While these research efforts are established the basis of CBIR, the usefulness of the proposed approaches is limited. Specially, these efforts have relatively ignored two distinct problems of CBIR systems: The semantic gap between high level concepts and low level features; Human perception of visual content. In addition to this, we have the problem of which image analysis models to use in image database to achieve a better CBIR system. This paper proposes a novel method for combining the user subjectivity in image database and interactive content-based image retrieval (CBIR). It shows a two-step process: Performs image analysis before retrieving an image from the database, which automatically infers which combination of models best are to represents the data of interest to the user and learns continuously during interaction with each user. Effectively takes the above two problems into account in CBIR. In the retrieval process, the user's high level query and perception subjectivity are captured by dynamically updated weights based on the user's feedback. The proposed approach greatly reduces the user's effort of composing a query and captures the user's information.
Efficient hierarchical chaotic image encryption algorithm and its VLSI realisation

An efficient hierarchical chaotic image encryption algorithm and its VLSI architecture are proposed. Based on a chaotic system and a permutation scheme, all the partitions of the original image are rearranged and the pixels in each partition are scrambled. Its properties of high security, parallel and pipeline processing, and no distortion are analysed. To implement the algorithm, its VLSI architecture with pipeline processing, real-time processing capability, and low hardware cost is designed and the FPGA realisation of its key modules is given. Finally, the encrypted image is simulated and its fractal dimension is computed to demonstrate the effectiveness of the proposed scheme.
Theories and Applications of Massive Online Open Courses (MOOCs): The Case for Hybrid Design

Initial research on learning in massive open online courses (MOOCs) primarily focused participation patterns and participant experiences. More recently, research has addressed learning theories and offered case studies of different pedagogical designs for MOOCs. Based on a meta-analysis and synthesis of the research literature, this study develops a conceptual model of prominent theories and applications of MOOCs. It proposes a continuum of MOOC learning design that consolidates previous theories into a tripartite scheme corresponding to primary types of MOOCs including content-based, community/tasked-based, and network-based applications. A series of MOOC hybrids are analyzed to demonstrate the value of this model while also clarifying appropriate applications and significant design challenges for MOOCs.
Implementation a Secure Electronic Medical Records Exchange System Based on S/MIME

The exchange of electronic medical records can reduce the preservation and the use of papers of medical records for management issues. The sharing of electronic medical records has been effective in Taiwan. Now days, enterprises are sharing their electronic medical records through the Exchange Center of EMR under the Virtual Private Network but slightly less secure. This study aims to propose a security mechanism for the sharing of electronic medical records. The combination of security mechanism of S/MIME message level and RESTFul Service were adopted to build a secure mechanism for the sharing of electronic medical records. Two scenarios were simulated and implemented to verify the feasibility of this mechanism. From the results of the simulation presented, it has been conclude that the use of RESTful and S/MIME can enhance the security exchange of the electronic medical records.
GAA: a VLSI genetic algorithm accelerator with on-the-fly adaptation of crossover operators

This paper describes a VLSI implementation of a genetic algorithm, called the Genetic Algorithm Accelerator (GAA) chip. Genetic algorithms (GAs) are widely used to solve complex optimization problems, and many variations of GAs have been proposed including several kinds of crossover operations. However, there have been few works, in which more than one crossover operators were used in a GA implementation to draw out the maximum capability of GAs. The authors have proposed an adaptive strategy, which selects a crossover operator to be used not in advance but dynamically during the algorithm execution. The GAA chip is a VLSI implementation of a GA with this adaptive strategy for selecting crossover operators. Hardware implementation of GA makes it possible to reduce the computation time drastically. The GAA chip has been designed with the Verilog HDL and simulated with some benchmark functions. According to the simulation, the GAA chip will finish the computation of one generation in less than 0.12 ms when the population size is 64. The chip has been fabricated with the CMOS 0.5 /spl mu/m standard cell technology.
Stiffness analysis for 6-DOF mouth training parallel robot WY-5

In this paper a mouth opening and closing training robot, named WY-5 (Waseda Yamanashi version 5), is analyzed in terms of stiffness characteristics. The basic models and formulation are proposed in order to deduce the stiffness matrix as a function of the most important stiffness parameters of the WY-5 architecture. A numerical simulation is also presented to discuss main features of the system.
Adaptive multi-code CDMA systems for variable data rates

To increase the spectrum efficiency in mobile communications and to support variable data rates, multi-code code division multiple access (MC-CDMA) systems have been proposed which allow to support variable source data rates by variation of the set of code sequences assigned to every user. In this paper, different types of sequences sets are discussed and their performance is analyzed for a scenario with different data rates.
ERS-1 SAR observations of internal waves during the Joint US/Russia Internal Wave Remote Sensing Experiment

Images from the C-band ERS-1 SAR were acquired on two days during the Joint US/Russia Internal Wave Remote Sensing Experiment in July 1992. Images from 18 July 1992 show well-defined internal wave signatures associated with numerous internal wave packets propagating shoreward on the continental shelf. Surface winds were about 6 m/s and stable atmospheric conditions prevailed, that is, the air-water temperature difference was positive. On 25 July, under similar wind conditions but unstable atmospheric conditions, the ERS-1 SAR images are devoid of internal wave signatures. Similar results were observed in vertically-polarized, airborne radar images. Selected radar data are presented to illustrate these effects. These results demonstrate that, under some atmospheric conditions, vertically-polarised radars have significantly less capability for detecting internal wave features than horizontally-polarised radars, independent of the incidence angle of the illuminating radiation. Enhanced atmospheric clutter appears to be contributing to these differences in internal wave observability. <<ETX>>
Design and evaluation of a formula cache for SMT-based bounded model checking tools

Design and Evaluation of a Formula Cache for SMT-based Bounded Model Checking Tools Jean A. Breytenbach Division of Computer Science, Department of Mathematical Sciences, University of Stellenbosch, Private Bag X1, 7602 Matieland, South Africa. Thesis: MSc Computer Science March 2018 Program verification is a computationally expensive and time-consuming process. Bounded model checking is a branch of program verification that produces FOL formulas to be checked for satisfiability by an SMT solver. These formulas encode state transitions to states where property violations will occur and the SMT solver attempts to find a list of variable assignments that would create a path to one of these states. Bounded model checking tools create these formulas by iteratively increasing an unwind bound k that dictates the number of transitions that can be present in a path, for each unwind bound k all possible paths of length k are generated. Any state containing a property violation that is generated during the unwind bound k − 1 should also be present during the unwind bound k with perhaps a longer path to reach it. This creates many of the same paths being checked during each subsequent iteration causing the SMT solver to potentially perform duplicate work. This thesis seeks to build and evaluate a formula cache in which to store parts of the formula for which the satisfiability is already known. During subsequent iterations the formula can be sliced by removing the parts that are found in the cache, providing smaller formulas for the SMT solver which should take less time to solve. Similar formula caches have already proven successful in the field of symbolic execution. Multiple techniques are described to modify the formulas to increase the likelihood of finding a match in the cache and these techniques are combined in a multitude of ways to generate a collection of caching strategies. These strategies are then evaluated against multiple data sets to find the best performing strategies and to identify the types of problems that benefit the most from caching. The results are then compared to the results of caching formulas during symbolic execution to gain insight as to how these different approaches effectively implement caching. iii Stellenbosch University https://scholar.sun.ac.za
An Architecture for Miniaturised Low Power

other applications requiring optimum estimation of a digital Abstract- Convolutional decoders have long been important in sequence. For example, the VA is employed in the applications where very noisy channels are encountered. The realisation of detectors for partial response signalling in technique has recently become more significant with the digital magnetic recording systems and trellis-coded advent of new application areas such as mobile radio systems modulation systems (4), (5). of various types and digital magnetic recording systems. The most commonly employed decoding technique is the Viterbi algorithm (VA). This provides an optimum method for realising a convolutional decoder, but requires a large amount of digital memory, typically up to 50% of the total chip area. In this paper we describe an alternative method which we call the modified feedback decoding algorithm (MFDA). This requires no digital path memory and so can be realised entirely using analogue components. Although strictly sub-optimal, the loss of coding gain compared to the VA is only about 0.4dB for a K=5 code.
A Novel Technique for Tone Mapping of HDR Images

Table of Content. List of Figures. List of Tables. Introduction. Digital Image Processing. Computerized processes involving Digital Image Processing. Low Level Processes. Mid Level Processes. High Level Processes. Color Space. RGB Color Model. YCbCr Color Model. High Dynamic Range Imaging. Dynamic Range. High Dynamic Range Acquisition. High Dynamic Range Display. Tone Mapping. Global Tone Mapping Operators. Local Tone Mapping Operators. Different Comparison Metrics. Mean Peak Signal-to-Noise Ratio. Mean Squared Error. Signal-to-Noise Ratio. Mean Absolute Error. Literature Review. Global Tone Mapping Techniques. I ii iii iv vi vii 1 1 2 2 2 3 3 4 4 5 6 7 7 8 8 8 9 9 10 10 10 11 11
Comparing Student Achievement in Online and Face-to-Face Class Formats

A research project was conducted to analyze student achievement using submitted assignments for two sections of a graduate course in human development and learning, taught both online and face-to-face, as well as three sections of undergraduate educational psychology, two of which were taught face-to-face, and one taught online. Results suggest there were no significant differences between the work submitted by students from the online sections and from the face-to-face students, and that the methods of instruction are more important than the delivery platform.
Physical layer one-time-pad data encryption through synchronized semiconductor laser networks

Semiconductor lasers (SL) have been proven to be a key device in the generation of ultrafast true random bit streams. Their potential to emit chaotic signals under conditions with desirable statistics, establish them as a low cost solution to cover various needs, from large volume key generation to real-time encrypted communications. Usually, only undemanding post-processing is needed to convert the acquired analog timeseries to digital sequences that pass all established tests of randomness. A novel architecture that can generate and exploit these true random sequences is through a fiber network in which the nodes are semiconductor lasers that are coupled and synchronized to central hub laser. In this work we show experimentally that laser nodes in such a star network topology can synchronize with each other through complex broadband signals that are the seed to true random bit sequences (TRBS) generated at several Gb/s. The potential for each node to access real-time generated and synchronized with the rest of the nodes random bit streams, through the fiber optic network, allows to implement an one-time-pad encryption protocol that mixes the synchronized true random bit sequence with real data at Gb/s rates. Forward-error correction methods are used to reduce the errors in the TRBS and the final error rate at the data decoding level. An appropriate selection in the sampling methodology and properties, as well as in the physical properties of the chaotic seed signal through which network locks in synchronization, allows an error free performance.
and Combine to Conquer Big Data

57 I’ve recently been reading more and hearing more talks about an approach called “Divide and Combine” (sometimes “Divide and Recombine”), which pops up in various guises and contexts. “Divide and conquer” algorithms in computer science are one aspect of this, but there is more to it than mere parallelization of computing. The starting point is that it may be hard, or impossible, to analyze a full data set because of its size. In some extreme cases, it may not even be feasible to store the entire data set on disk, let alone manipulate it for statistical analysis. With clever application of a parallel approach, though (on the statistical side, rather than solely the computing), it is sometimes possible to break the data into manageable chunks (the “Divide” part), perform the analysis on each piece separately, and then put the results back together in a way that retrieves (either exactly or approximately) the result that would have been obtained had the whole data set been analyzed (the “Combine” part). In this column, I describe a few interesting applications of the general Divide and Combine approach. I’m sure there are many more out there—let me know what your favorites are. Divide and Combine to Conquer Big Data [The Big Picture] Nicole Lazar
Single/Cross-Camera Multiple-Person Traffic Tracking by Graph Matching

Multiple person tracking is a very useful task in intelligent video surveillance, which is hindered by many challenges such as the variations of illumination, the irregular changes of human shapes and the particle occlusions. To tackle these challenges, in this paper, we propose a new online learning tracking system to generate the complete trajectory for each tracking object. In detection stage, we build a classifier for each tracking object by online learning in order to provide more accurate detection results. Online learning could real-time update the classifier for an accurately tracking results in the future. In the tracklet generation stage, we apply the spatiotemporal constrain to generate a set of reliable tracklets. Finally, we propose a new Part-based matching method to get the correlation between different tracklets and apply linear programming and greedy algorithm to handle the data association problem to generate the complete trajectory for each tracking object. In particular, our approach is able to cast the multiple cameras tracking problem as a data association problem. The experiments on our proposed method demonstrate state-of-the-art performance in multiple person tracking.
Implementation and Evaluation of Zero-Knowledge Proofs of Knowledge

Zero-Knowledge Proofs of Knowledge are protocols that allow one to prove possession or knowing of a secret without actually revealing it. Goals of current ZeroKnowledge Proofs of Knowledge compiler frameworks are to make the implementation of these protocols easy for those outside the field of cryptography while at the same time making it easy for those inside the field to prototype such protocols. We acknowledge that such frameworks have made it easy to develop the protocols but we note that they have not made it easy or general to those implementing the protocols on the end devices. Such frameworks either target C/C++ code generation or an interpreted language. They also use high-level multi-precision arithmetic libraries which are too resource demanding for small embedded devices. These limitations as well as hidden pitfalls of C/C++ have motivated us to extend one of those frameworks and build our own framework from it. This framework is targeted specifically at HW-SW co-design exploration while not losing any generality of the framework it extends. We hope that this will ease the work for those outside the field and allow for a more widespread usage of these protocols.