Resistive TCAM Systems for Data-intensive Computing

Power dissipation and memory bandwidth are significant performance bottlenecks in virtually all computer systems. Associative computing with ternary content addressable memories (TCAM) holds the potential to address both problems in a wide range of data intensive workloads. Power dissipation is reduced by eliminating instruction processing and data movement overheads present in a purely RAM based system. Bandwidth demand is lowered by processing data directly on the TCAM chip, thereby decreasing off-chip traffic. Unfortunately, existing SRAM-based TCAM cells are over 90× larger than a DRAM cell at the same technology node, which limits the capacity of commercially available TCAMs to a few megabytes. This article examines the integration of gigascale TCAM systems based on resistive memories within a general purpose computing platform. TCAM density is improved by novel, resistive memory cells that exploit phase change and spintoque transfer magnetoresistive RAM technologies. TCAM chips are organized into a DDR3-compatible DIMM, and are accessed through a software library with zero modifications to the processor or the motherboard. The proposed TCAM systems achieve average speedups of 3-4.5× and average energy reductions of 5-8× as compared to a conventional RAM based system. 1. Power and Bandwidth Limitations to Scaling Multicore processors have been widely hailed as the future of microprocessor performance scaling. The popular conception is appealing: while power is proportional to clock rate, and thermal budgets are limited to less than 200 watts with air cooling, one can continue to ride Moore’s Law by embracing parallelism and placing twice as many cores on a chip every few years, keeping the clock rate constant. This conception regrettably presents a false hope. To maintain constant dynamic power at a given clock rate, supply and threshold voltages must scale in proportion to feature size, but this approach induces an exponential rise in leakage power, which is fast approaching dynamic power in magnitude. As a consequence, the semiconductor industry roadmap projects a supply voltage reduction of only 1.2× by 2022, despite a 16× increase in transistor count. These projections suggest that a 2022 microprocessor will exhaust its power budget with less than 10% of the chip in active use [1]. Multicore processors—or any other circuits based on a large number of active transistors—appear to be doomed. Power dissipation, however, is only part of the problem. Scaling system performance also requires increasing available off-chip memory bandwidth commensurately with growing transistor budgets. Unfortunately, the benefits of Moore’s Law are unavailable to conventional packaging technologies; consequently, both the speed and the number of signaling pins grow at a much slower rate. Important data-intensive applications such as information retrieval, data mining, and multimedia processing demand significant computational power and generate substantial memory traffic, which places a heavy strain on both overall system power and off-chip bandwidth. Device, circuit, and architecture innovations are needed to surmount this problem. 2. Ternary Content Addressable Memories A promising approach to address power and bandwidth limitations on many data-intensive workloads is to process the data directly within a memory chip. This requires augmenting a memory chip with useful but simple logic circuits such that data manipulation can be accomplished directly on the memory chip, while the hardware cost is kept acceptable. A content addressable memory (CAM) is one type of memory with processing capability that can benefit a wide range of data-intensive applications. A CAM compares a given search key to a set of stored keys in parallel. If a match is found, the index (address) of the matching entry is reported. A ternary CAM (TCAM) is a special type of CAM that allows for both storing and searching with a wildcard in addition to a logic zero or one. A wildcard, when part of either the search key or the stored data word, matches against both binary states (as well as another wildcard). This flexibility can be exploited by a surprisingly large number of applications.