Reducing the impact of software prefetching on register pressure

Software-controlled prefetching of data is an effective way to tolerate large memory latencies. Software prefetching is a technique in which the compiler attempts to determine whether or not a data item will be present in the cache when the item is referenced. If the compiler determines that the data item will not be present in the cache, a prefetch instruction is generated and placed before the actual reference in an attempt to hide some of the latency of fetching the item from memory. Several researchers have suggested that software prefetching increases the demand for registers, however this issue has not been fully studied. An experimental study performed as part of this research shows that software prefetching can increase register pressure, often dramatically. A method based upon live variable analysis is provided to estimate register pressure during software prefetching. This estimate is used to detemine the loop transformations which will enable prefetching and prevent large increases in register pressure. The experimental evaluation indicates this technique generally results in less inserted spill code than performing standard software prefetching. 1. I N T R O D U C T I O N The performance gap between the processor and memory continues to widen every year as processor speeds increase at a dramatic rate and memory speeds do not increase as rapidly. One approach to bridge this gap is to place a smaller, faster memory called a cache close to the processor. Accessing a data item in cache memory requires a smaller latency than accessing the data item in main memory. The cache holds the most recently accessed data items *This work was partially supported by NSF under grant CCR-9625219. Permission to make digital or hard copies o f all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the ~ l l citation on the first page. To copy otherwise, to republish, to post on servers or to redistribute to lists, requires prior specific permission and or fee. SAC'00 March 19o21 Como, Italy (c) 2000 ACM 1-58113-239-5/00/003>. >$5.00 of a process. A cache hit occurs when the CPU finds the requested data item in the cache. However, due to the limited size of the cache, not all requests for data can be satisfied through the cache. A cache miss results when the CPU does not find a requested data item in the cache and the data item must then be retrieved from main memory at a higher latency. Software prefetching [2; 7; 8; 10; 11] reduces the number of cache misses by inserting a machine instruction to bring a data item into the cache before it is actually referenced. While software prefetching cannot eliminate the memory latency, it can hide the latency by overlapping the memory access with the execution of other instructions. Studies indicate software prefetching is effective at hiding memory latency and improving the performance of programs [2; 10; 11]. Register allocation is the phase of the compiler that assigns variables to registers. If not enough registers are available to hold all of the variables currently in use, the compiler must generate spill code. Spill code is inserted within a program in order to save and load variables to/from main memory and can decrease the performance of a program. The transformations done to a program in order to perform software prefetching can create programs with high register pressure, ie. progra.m~ with a high demand for registers. Software prefetching is an effective technique to improve program performance [2; 7; 8; 9; 10; 11] and does impact register pressure, but the degree of impact on register pressure has not been studied. The purpose of this research is to determine how software prefetching affects register pressure and to provide solutions for preventing a significant increase in the register pressure while not reducing the amount of prefetching performed. Specifically, Mowry's prefetching algorithm [10] is used to study software prefetching's effect on register pressure. Modifications are then made to attempt to relieve some of the register pressure. The results of this research show that by fine-tuning the loop transformations performed by the software prefetching phase of the compiler, the impact upon register pressure can be reduced resulting in the insertion of less spill code by the subsequent register allocation phase. The remainder of this paper is organized as follows. Section 2 discusses the background material in software prefetching and register allocation needed to understand the research. Section 3 explains why software