Logic synthesis techniques for embedded control code optimization

We propose software synthesis and optimization based on the composition of three techniques that have recently been developed or experienced evolutionary changes. They all have a basis in logic synthesis, but each contains quite different analyses and transformations. They are applied to software for embedded systems. They are generally much more expensive than optimizations normally used in general-purpose compilers, but are based on a much more precise understanding of the meaning of the program or procedure that is being optimized. Standard compilers are limited in the type and amount of optimizations they can perform by: execution time limits; since they must be applicable to large programs within a short compile-and-debug cycle, they cannot afford to use optimizations whose complexity is more than quadratic (or even linear) in the size of the source code, the richness of the language; since the determining the function computed by a program is impossible in general, compilers must limit themselves to a small set of transformations that can be shown to preserve the original semantics. Embedded systems are quite particular with respect to both of these aspects. The (often) small code size and the (hopefully) long lifetime and tight cost constraints make even very complex optimizations feasible, profitable, and necessary. Moreover, a finite state programming paradigm is often required (e.g., due to the lack of virtual memory), thus making it possible to “understand” the function that must be computed and apply truly global optimization techniques. In this paper, we survey and compare three steps that have been used in order to implement programs specified using a family of languages called Synchronous Languages [10]. These languages have been specifically designed for embedded code, and have a semantics based on Extended Finite State Machines. These EFSMs are similar to FSMs, with explicit connections to a data-path (through signals and variables) that is for the data-intensive computations. In EFSM synthesis, the emphasis is on control. The first section summarizes a technique to analyze for correctness and derive a fully abstract EFSM model from a synchronous program. It is based essentially on a circuit representation of the program itself. The second section describes an efficient software implementation of an EFSM, based on Binary Decision Diagram minimization. The third section shows how Petri Net synthesis algorithms, originally developed for asynchronous circuit synthesis, can be used to derive a single-appearance schedule for a reactive control program. Finally, we discuss the complexity aspects of each algorithm, and describe how they can be put together into a single, efficient optimizing compiler for EFSMs. 1 From Synchronous Program to EFSM There are a number of synchronous languages and compilers interpreting them; only a few of these have a very precise and well-defined semantics. One such language is ESTEREL[4]. ESTEREL is used to specify complex control algorithms, and the ESTEREL language and compiler utilize the synchronous hypothesis: the reaction of the program takes zero time, or negligible time with respect to the environment in which it runs. This hypothesis must be checked on the final This work has been funded by CICYT TIC95-0419 and MURST project “VLSI Architectures” 1Before, such schedules were only known for programs synthesized from data flow networks [6].