ANALYSIS OF A REDUCED COMPLEXITY FFT-SPA BASED NON BINARY LDPC DECODER WITH DIFFERENT CODE CONSTRUCTIONS

Low density parity check (LDPC) codes are the linear block codes with excellent error correcting performance, near to Shannon’s limit. Non-binary LDPC codes are more suitable for applications of short and moderate block length than binary LDPC codes. The criticality in achieving a better decoding capacity with reduced hardware complexity has been addressed in several research ventures of LDPC decoder design. The computation complexity of the decoder increases linearly with the order of Galois field, in par with the compromise on the decoding performance. In this paper, a variable threshold based message reduction technique and three different matrix construction methods are proposed, attaining a better tradeoff between the decoding performance and computation complexity. The implications of these proposed methods on IEEE 802.11n based application, are analysed and validated. In this work, the proposed modifications on the construction of the codes and message handling are inculcated in Non-binary Quasi-cyclic Irregular LDPC codes on the base of Fast Fourier Transform (FFT) – Sum Product (SP) decoding algorithm. With the inclusion of the two variations, the computation strength of the decoder reduces by 55% on average and the decoding performance improves by 3dB. KEYWORDS— Non-binary LDPC codes, FFT-SPA, Matrix construction, Message reduction, Decoder design. INTRODUCTION Gallager introduced a class of linear block codes namely Low density parity check (LDPC) codes [1]. LDPC codes defined by a sparse parity check matrix having lesser number of 1’s are called as binary LDPC. Compared to other codes, LDPC codes have better decoding performance for larger block lengths [2]. This makes the LDPC codes, applicable in different communication standards namely DVB-S2 and IEEE 802.11(WLAN). However these kind of binary LPDC codes are not found to be suitable for other applications such as space communication, involving short or moderate block length. To meet out such kind of applications, Non binary LDPC codes are constructed over the higher order finite field [3]. The decoding performance of the Nonbinary LDPC codes increases with the increase in the field order [4]. Accordingly, the computation and hardware complexity increases with the Non-binary LDPC codes. The different complexity reduction techniques are reviewed in the literature, focusing on the decoding algorithms. Non-binary LDPC codes based Min-sum algorithm [5] and Min-max algorithm [6] were proposed with reduced computations. A significant approach on the complexity reduction is the message reduction method, addressed in the literature [7]. These works also focus on optimization of FFT-SPA based Non-binary LDPC decoder, with reduced computation complexity and nominal decoding performance. The Another research direction in the design of Nonbinary LDPC decoder is code construction. The key element behind the performance of this code is the parity check matrix (PCM). The formation of the PCM decides the decoding ability and computation strength of the code. Conventional LDPC codes work on the random PCM representing the framework for generating possible set of codewords. Sparsity, the number of non-zero elements in the PCM, effects on the computation strength of the decoder. Different methods of code construction are addressed in the literature [8-10] satisfying the properties of PCM, row-column constraint [11] and girth [12] of good codes. These methods of framing the PCM are quite complex and results on the decoding performance. The authors contribute in framing a variable threshold based message reduction method, which effectively reduces the memory requirement and thereby the hardware complexity of the decoder architecture. However this method affects the decoding ability of the codes, increasing the Bit Error Rate (BER). This negative effect has been compensated with the various code construction methodologies. This paper also presents a varied structure of the three different PCM namely, Lower Diagonal PCM (LDM), Doubly Diagonal PCM (DDM) and Hierarchically Diagonal PCM (HDM). The effectiveness of these two methods has been evaluated in terms of the decoding capability and hardware complexity of the code. NON-BINARY LDPC DECODING ALGORITHM Belief propagation algorithm The traditional LDPC decoder works on the belief propagation algorithm, transacting the probability values between the two computation nodes namely check node and variable node.