A Reconfigurable Digital-to-Analog Converter with Supply Invariant Linearity

A novel reconfigurable digital-to-analog converter (DAC) with supply independent linearity is presented. The process agnostic converter achieves wide supply range operation and re-configurability by being charge based. This converter consists of a 7-bit parallel digital input control core and an analog “summing” core utilizing charging capacitors with an operational transconductance amplifier in a voltage-follower configuration. This topology is highly configurable to allow for optimization across process voltages, step sizes and low power operation. The specification of the DAC is (1) supply independence (2) low power operation (3) operation up to 200 kHz and (4) conversion control through a DAC enable signal. Supply independence is achieved through the use of a charge-based approach in the analog core utilizing a finite stepping voltage derived from another, much smaller, voltage reference. This voltage reference in turn determines the resolution of the DAC. The DAC will thus create a “stairstepping” analog output until digital input is met or the voltage supply is reached. Feedback is utilized when either of these events occurs notifying the DAC to wait until another sample is requested. Low power is achieved by using static CMOS logic and the inclusion of a “sleep mode” in the analog core which can be used after the desired output is achieved. This design was implemented across two different processes with different power supplies to confirm the architecture. ©2013 by Nicholas J. Chiolino All Rights Reserved ACKNOWLEDGEMENTS Countless thanks are due to Dr. H. Alan Mantooth and Dr. A. Matt Francis for all of their support and guidance in the author’s pursuit of a master’s degree. Added thanks are to be given to Dr. Randy Brown and Dr. Jia Di for their expertise and advice. Great thanks are given to all of the author’s colleagues and classmates for all of their added advice and instructions, the experience that was shared is priceless. Lastly, overall thanks are given to everyone participating in the MSCAD group for all of their support with lab equipment and resources needed. Also, thank you to all administrative assistance in electrical engineering for without you the author would have no warm welcomes, no vital resources, and no peppermints! DEDICATION This thesis is dedicated to my family whose support in my educational pursuits has motivated me to work harder every day, also, to my wife, Erin, who has been my rock throughout this journey. TABLE OF CONTENTS Chapter 1 – Introduction . 1 1.1 Project Motivation . 1 1.2 System Overview . 2 Chapter 2 – Survey of Digital-to-Analog Converters . 3 2.1 Converter Overview . 3 2.2 Application. 5 2.3 Digital-to-Analog Converters . 6 Chapter 3 – Reconfigurable Digital-to-Analog Converter Design . 8 3.1 Top Down Design . 8 3.2 System/functional . 9 3.3 Operation . 13 3.3.1 Dead Time . 19 3.4 Architectural/Design . 20 3.4.1 Architecture/Design of DAC Core. 21 3.5 Implementation . 25 3.5.1 Digital Building Blocks . 25 3.5.2 Analog Building Blocks . 33 3.5.3 Transmission Gates . 33 3.5. 4 Operational Amplifiers . 36 Chapter 4 – Simulation . 52 4.1 Tool Flow . 52 4.2 Digital Simulations . 53 4.2.1 Digital Gates . 53 4.2.2 Counter . 56 4.2.3 Two Phase Clock Generator . 58 4.3 Analog Simulations. 59 4.3.1 Operational Amplifier . 60 4.4 DAC Integrated Circuit . 65 4.5 XFAB Simulation Results . 66 4.6 XFAB Temperature Simulation Results . 68 4.7 TSMC Simulation Results . 68 4.8 Error Checking . 71 4.8.1 DNL . 71 4.8.2 INL . 72 Chapter 5 – Physical Design . 74 5.1 Digital Layout . 74 5.1.1 Counter Layout . 77 5.1.2 Two Phase Clock Generator Layout . 78 5.1. 3 Digital Core . 80 5.2 Analog Layout . 80 5.2.1 Operational Amplifier . 81 5.2.2 Mixed-Signal Core . 82 5.3 Full Chip Layout . 83 5.3.1 Digital Core . 83 5.3.2 Analog Core . 84 5.3.3 DAC with no Voltage Reference . 85 5.3.4 DAC with Voltage Reference . 87 Chapter 6 – Verification and Testing . 89 6.1 XFAB Testing . 91 6.1.1 Simulation Results . 94 6.2 TSMC Die Packaging . 97 6.3 TSMC Testing. 100 6.3.1 TSMC Simulation Results . 103 6.4 Temperature Testing . 105 6.4.1 TSMC Results . 105 Chapter 7 – Applications . 110 7.1 Full System Application . 110 Chapter 8 – Summary and Conclusions . 112 8.1 The Top Down Approach . 112 8.2 Same Design; Two Processes . 112 8.3 Packaging . 113 8.4 Future Work . 113 Bibliography . 114 Appendix A . 116 LIST OF FIGURES Fig. 2.1. Data conversion system.