An examination of post-CMOS computing techniques using steep slope device-based architectures

ion model is essential to analyze how these device characteristics translate to the syste m and architecture-level. This would enable us to simultaneously analyze innov ations in both the device and architecture by means of common metrics such as performance an d energy. In addition, it is also essential to carry out a comprehensive study of the various applications that are slated to run on the proposed system and explore various application mapping tech iques that fully exploit the advantages provided by adoption of the new technology. S uch a study requires 3 detailed analyses at multiple levels of abstraction, ranging from the device up to the system and application level, in order to yield tangible benefits for the end user. In effe ct, the aim of this dissertation is to attempt to answer the question: ’Does a better device make a better computer? ’ This dissertation thus addresses the following topics: • An exploration of the various device technologies that could be possible co mplements, or replacements for CMOS technology. In particular, we show how the Het rojunction Tunnel Field Effect Transistor (HTFET or TFET) is a promising candididate for this purpose. • A device-to-architecture abstraction model that enables us to extrapolate v arious processor architectures, given the characteristics of a single constituent device. • An examination of multicore systems designed using both CMOS and TFET proce ssors. We examine the feasibility of performance constrained power optimization, as w ell as maximizing the performance under fixed power budgets. • A study of the interactions between device and micro-architectural heterog neity, in terms of issue width, pipeline depth and other factors, as well as different static and dynamic schemes to optimally map applications onto the best possible core configuration. • Design of domain-specific customized accelerators for computer-vision-b ased applications, using TFET technology with superior energy-efficient character isticss in comparison to CMOS accelerators. • Exploring the possibility of using device-heterogeneous multicores to design 3D stacked CMPs by mitigating thermal and yield constraints faced by conventional device -bas d architectures. 4 • Examining the various aspects involved in the design of on-chip caches, bo th from a technology as well as a policy standpoint. The chapters are organized as follows. Chapter 2 provides a brief ove rview of the various emerging technologies and their potential applications in processor arc hitecture. Chapter 3 explains in detail the device-to-processor abstraction model used in this wo rk. It also looks at incorporating device-level factors such as noise and variability that hav e an impact on the entire system in the form of process variation, for example. Chapter 4 propose s a d vice-heterogeneous multicore and studies the techniques used to best utilize this multicore under perf o mance and power constraints for a variety of workloads comprising of single and multithr eaded applications, as well as single and multi-programmed workloads. Chapter 5 looks at c ombining device and architecture heterogeneity. It proposes static and dynamic schemes, where runtime application characteristics can be used to determine not only the optimal device tech nology, but also the optimal architecture configuration that yields the most energy-efficient performance. It also examines the use of emerging technologies in the design of customized acceler tors for highly energy efficient realization of hardware for computer vision and image pr ocessing applications. In Chapter 6, the adoption of state-of-the-art architecture techniques s uch as 3D stacking technologies is studied, in conjunction with CMOS-TFET device heterogeneity. Ch apter 7, extends the study of emerging technologies in architectures to the memory hierarchy. I n particular, it comprises of a design-space evaluation of last-level caches for differ ent application domains, jointly considering the adoption of new technologies as well as architectural techniques. Chapter 8 examines the prior work in various areas touched upon in this dissertatio n, ranging from 5 emerging technologies to application scheduling on heterogeneous architec tures. It also highlights the distinguishing aspects of the prior work from the work in this disserta tion. Finally, chapter 9 concludes with a summary of all the work described in this dissertatio n.