Miracle-dz/UniFAR-FTUs huggingface dataset:
An improvement and application of a model conducive to productivity optimization

The metal defect detection and identification technology have been successfully applied in actual industrial production. But there are still some problems in the steel strip defect detection task, such as the difficulty in data collection and the poor identification effect caused by the small defect target. Aiming at these problems, this paper presents an algorithm based on convolutional neural network for the detection of steel strip small target defects. First, the original image is clipped by the way that moving the slider. At the same time, the feature pyramid structure is increased to conduct feature fusion for the output of the feature extraction part and Group Normalization is used to accelerate the convergence of the model, so that the model can better adapt to the target task, effectively solve the problem of small defect object information loss on the surface of the target steel strip, and enhance the generalization of the model. In order to evaluate and test the validity of the model, a steel strip defect dataset (BS5-DET) is constructed. The experimental results show that the mAP of the model reaches 54.50% on the defect data set of the BS5-DET steel belt, which has a certain application value.
Design and Analysis of controllers for paper machine subsystem

The economy of the paper industry largely depends on the quality of the paper manufactured and the quality depends on the precise operation of Headbox, which is the key element of the paper machine and is highly responsible for the quality of the paper manufactured. Being a nonlinear multivariable system, a headbox needs to be controlled efficiently to have the desired response which in turn reflects in the quality of the paper. The headbox is subjected to various disturbances and thus it is required not only to suppress the effect of disturbances but also to ensure the smooth start of the headbox and fast response to the set-point changes. A control technique is proposed in this paper for a paper machine headbox based on the determination of ultimate gain and frequency using the fractional-order integrator (FOI). The PID tuning technique proposed has been applied on paper machine headbox and the responses are compared with the existing techniques.
Preparation and characterization of ultrasensitive and specific polyclonal antiserum against ciprofloxacin based on cationized bovine serum albumin

An ultrasensitive polyclonal antiserum against ciprofloxacin (CPFX) was developed by introducing cationized bovine serum albumin (BSA) as the carrier. Conjugates used as immunogens were synthesized using CPFX coupled to BSA cationized with ethylenediamine and hexamethylenediamine, namely CPFX-eBSA and CPFX-hBSA. The results showed that the antisera immunized with CPFX-hBSA exhibit an improved sensitivity and specificity compared with those immunized with CPFX-eBSA. Under the conditions of optimal heterologous enzyme-linked immunosorbent assay, the optimal antiserum yielded an IC50 of 0.097 ng mL−1, which proves it to be more sensitive than any CPFX antibody. Cross-reactivities with norfloxacin, enrofloxacin, and ofloxacin were < 3.0 %. No cross-reactivities with penicillin and gentamicin were found. The limit of detection was 0.01 ng mL−1, which is far below the maximum residue level established by the EU regulation, suggesting the great potential of the presented antiserum for quantitative assays of CPFX in samples.
Vision-Based Traffic Conflict Detection Using Trajectory Learning and Prediction

Although traffic conflict techniques have proven to be effective means for road safety analysis, they still suffer from incomplete conceptualization, observer subjectivity, and high data collection cost. To address these problems, video analysis has been increasingly applied to gain a better understanding of the behaviors of road users based on detailed motion data. However, the motion patterns underlying these data are rarely extracted to study the safety of their interactions. This article presents a vision-based method of traffic conflict detection through learning motion patterns from trajectories, for which an original algorithm was established through clustering and subsequent modeling. Using the extracted path and velocity information, we clustered trajectories hierarchically by applying an improved fuzzy $K$ -means algorithm with a modified Hausdorff distance. Each obtained cluster was taken as a labeled set to determine the structure and train the parameters of a hidden Markov model (HMM) that encoded the spatiotemporal characteristics of the trajectories as motion patterns. Based on the targeted trajectory predictions by the learned HMMs following the conflict development, a probabilistic model was developed to estimate the collision likelihood between vehicles to identify traffic conflicts. The experimental results obtained using actual traffic videos demonstrated the applicability of the algorithms for learning motion patterns and the feasibility of the approach for traffic conflict detection. The predicted trajectories were sufficiently accurate to calculate the collision probability, which was qualified as an indicator for measuring the conflict severity. These findings will have important implications for effective improvements in active road safety.
12.1 A 148nW General-Purpose Event-Driven Intelligent Wake-Up Chip for AIoT Devices Using Asynchronous Spike-Based Feature Extractor and Convolutional Neural Network

Power is a major bottleneck in AIoT devices, which usually operate in random-sparseevent (RSE) scenarios [1] (Fig. 12.1.1, bottom). To process RSEs energy-efficiently, one can integrate an always-on wake-up chip [1] –[5] that only turns on the power-hungry high-performance system (HPS) once valid events are detected. Previous dedicated voice-activity-detection (VAD) wake-up chips using analog front-ends (AFE) followed by neural-network (NN) circuits consume $1 \mu \mathrm{W}$ [2] and 142nW [3]. Keyword spotting (KWS) wake-up, which is more complicated than VAD, can be achieved by an NN engine at 510nW [4], but it needs an off-chip power-hungry 16b ADC to drive its digital input. For general purpose, an event-driven wake-up chip [1] consumes 57nW. But without an intelligent inference engine (IIE), false detection due to invalid events will consume excessive power. The IIE can be realized by a finite-state-machine (FSM) pattern recognition circuit but with massive $2.2 \mu \mathrm{W}$ [5]. This work, to our best knowledge, presents a first reported event-driven intelligent wake-up chip that achieves ultra-low power and intelligent event detection for various AIoT RSEs.
A Bidirectional DC–DC Converter With High Voltage Conversion Ratio and Zero Ripple Current for Battery Energy Storage System

In this article, a novel bidirectional dc–dc converter (BDC) consisting of an active switched-inductor (A-SL) cell, a zero current ripple cell and an auxiliary capacitor cell is proposed for the battery energy storage system. The proposed BDC integrates with the advantages of high voltage conversion ratio, low power switch voltage stresses, zero ripple current on the low voltage side (LVS), and constant potential difference between the grounds of LVS and high voltage side. Thanks to the use of synchronous rectification technology, the efficiency of the proposed BDC is increased. The operating principles, the characteristics analysis and the parameter design of the proposed BDC are given. In addition, to show the merits of the proposed BDC, a comparison study involves the proposed converter and other BDCs is demonstrated. Finally, some experimental results obtained using a 1000 W prototype are presented to valid the effectiveness of the proposed BDC. 96.43% and 96.67% maximum conversion efficiencies can be achieved in the step-up and step-down modes, respectively.
Keypoint-Based Local Descriptors for Target Recognition in SAR Images: A Comparative Analysis

Though widely studied over the years, radar target recognition is still far from being solved. Most earlier works rely on holistic features or raw intensity values, which are sensitive to the real-world sources of variability such as changes of pose, configuration, and imaging parameters; articulation; and occlusion. To solve these problems, this article resorts to the local descriptors around keypoints.
A routing protocol based on priority based adaptive for MPSoC for data transmission

Multiprocessor system-on-chip is widely used integrated circuit that contains multiple general-purpose processors to provide high efficiency. The data transmission over the multiprocessor system-on-chip is affected due to various faults occurred in the router. In this paper, the multiprocessor system-on-chip is designed in the proposed hybrid network topology which is the combination of mesh topology and torus topology. The lightweight XY-YX routing is developed in multiprocessor system-on-chip for transmitting the data from the source router to the desired router. The arbitration of the ports in the multiprocessor system-on-chip is handled by using the time division multiplexing method. Additionally, the Viterbi algorithm and March-C algorithm are proposed in the lightweight XY-YX routing to develop fault aware routing method.
Route Request Flooding based Denial of Service Attack in Wireless Ad Hoc Networks and Selected Defending Measures: A Review

Wireless Ad Hoc Networks are gaining popularity nowadays due to easiness in deployment and management of the network. They are self organizing wireless networks formed by mobile nodes on-the-fly without using any fixed infrastructure. They are widely useful in military based applications, emergency search and rescue operation during disaster management or even communication in big superstores. However, due to their decentralized and distributed operation, security is a major concern in these type of networks. Limited computational capability of the nodes and lower battery backup created added constraints which further reduces the possibility of using cryptographic techniques in securing these networks. Availability is one of the security requirements needed for any wireless networks. Threat to availability is Denial of Service (DoS) attack. Flooding attack is one of various DoS attacks that can be launched from various layer of protocol stack. This paper is intended to provide a review of Route Request (RREQ) flooding attack and their state-of-the-art remedial measures in Wireless Ad Hoc Networks.
A Review on Generative Adversarial Networks

GenerativeAdversarial Networks (GAN) is currently one of the hottest subjects in the field of Artificial Intelligence; it has a significant impact on the development of generative models. The excellence of GAN is that it is based on zero-sum game theory and has a generator as well as a discriminator that optimize each other and finally receive the optimal result. In recent years, many different types of GAN optimization models have emerged, which can be classified by the different structure of their generators and discriminators. Since most of the experiments of the models are conducted on the datasets of MNIST, SVHN, CIFAR10, etc., the performance of each model on those datasets is evaluated. Then some of the applications and the methods of optimizing the models of GAN are explained. Finally, we propose challenges that GAN faces and the prospect of GAN.
Y-Net: A Dual Path Model for High Accuracy Blind Source Separation

Industrial IoT (IIoT) in conjunction with Ultra-Reliable Low-Latency Communications (URLLC) often struggles with data-rich, information-poor contexts. Blind Source Separation (BSS) is one of the key technologies which can obtain the desired high-value information from all of the observed raw sensory data. As shown by recent studies, BSS can be both fast enough for low-latency requirements and sufficiently accurate to be a reliable method in large IoT deployments. Nonetheless, the trade-off between signal context usage and data recovery accuracy often affects the separation quality of BSS. In this paper, we propose for the first time a novel dual path convolutional neural network model, called Y-Net, for high accuracy BSS. Specifically, the separation quality is improved by the parallel perception and joint combination of both high-and low-level features of input signals, which we demonstrated through extensive numerical evaluations. In particular, Y-Net improves the Source-to-Distortion Ratio by 2.70% to 35.32% for different target signals, while the model size is only slightly increased, compared to other current solutions.
A 0.2-to-3.6TOPS/W Programmable Convolutional Imager SoC with In-Sensor Current-Domain Ternary-Weighted MAC Operations for Feature Extraction and Region-of-Interest Detection

Mixed-signal vision chips are becoming increasingly popular for low-power embedded computer vision applications on smartphones, wearables and IoT nodes, as they meet stringent power and area constraints while maintaining a sufficient level of accuracy for low- to medium-level image processing tasks. On the one hand, in-sensor processing [1, 2] enables massively parallel operation but relies on pixel-level processing elements that degrade the pixel pitch and restrict the convolutional receptive field to neighboring pixels [1], precluding multi-scale operation. On the other hand, near-sensor processing [3–5] can operate at multiple scales by pixel downsampling [3] or binning [4] but entails significant power and area overhead as an analog memory is required to store pixel values awaiting processing. In addition, previous near-sensor processing SoCs are generally application-specific and thus suffer from limited versatility. In this paper, we present a 65nm QQVGA convolutional imager SoC codenamed SleepSpotter capable of versatile feature extraction and region-of-interest (RoI) detection based on in-sensor current-domain MAC operations. It operates at 6 different scales, features programmable filter size (F), stride (S), and ternary filter weights (1.5b). It reaches a minimum energy of 2.5pJ/pixel•frame•filter and a peak efficiency of 3.6TOPS/W, with 29% pixel area overhead for enabling the convolution and without the need for an analog memory.
Black Rot Disease Detection in Grape Plant (Vitis vinifera) Using Colour Based Segmentation & Machine Learning

Black Rot is a fungal disease which affects the yield as well as the wine quality and can also cause complete crop loss. It can be identified as brown/tan coloured circular spots/lesions distributed unevenly on the leaf of the plant. A proper detection of the disease is required which can be further helpful in taking active measures like Spraying of Fungicides, Pruning, etc. can be done on time. The PlantVillage Dataset is used, which contains images of grape plant leaves affected from Block Rot Disease as well as the pictures of healthy leaves. HSV and L*a*b* colour models are used for the segmentation purposes. The healthy part and the diseased part of the leaves are separated using colour-based techniques and the features are stored for each leaf. The color of diseased part is very much different from the healthy part of the leaves which makes it easier to detect the disease on the basis of color. The machine learning is done using the Support Vector Machine Classifier and the results are analysed on different Kernels of SVM. The highest accuracy achieved is 94.1%.
An Innovative, Adaptive Faulty Signal Rectifier Along with a Switching Controller for Reliable Primary Control of GC-VSIs in CPS-Based Modernized Microgrids

Nowadays, networked controls using cyber-physical systems (CPSs) necessitate engineers considering “faulty signals” into the control from the beginning of the design process. Therefore, synthesizing control methods, which are able to deal with faulty signals and tolerate them, must be thoroughly investigated and integrated into the design process from the commencement. This article proposes an innovative, reliable control based on a sliding mode faulty signal rectifier for active-/reactive-power-controlled, grid-connected voltage-source inverters (named GC-VSIs hereinafter). It is called “faulty-signal-tolerant” control in this article. Those faulty signals can reach the GC-VSI's controls from any sources; for example, they may arise provided that the CPSs malfunction or fail to prevent data-integrity-related issues, cyber threats, and more. The sliding mode algorithm provides the proposed controller with resilient performance via rectifying faulty signals. Besides, the proposed structure is enhanced by an adaptive mechanism, which makes it more robust against the “unknown” nature of faulty signals. The adaptation rule is able to find the unknown bounds of faulty signals (which externally impact control feedback) and incorporate them into the control by the sliding-mode-based faulty signal rectifier to form a faulty-signal-tolerant methodology. Thorough theoretical analyses, including stability assessment using the Lyapunov criterion, are provided in order to design the proposed controller. Comprehensive simulations and experimental results (associated with a GC-VSI) show the effectiveness and reliability of the faulty-signal-tolerant controller, which is proposed in this research.
Performance Analysis of Mother Wavelet Functions and Thresholding Methods for Denoising EEG Signals during Cognitive Tasks

Artifact reduction is a major challenging task in the analysis of Electroencephalography signals. Wavelet denoising is one of the efficient techniques for rejecting artifacts and it has been employed in the detection of various brain diseases. The selection of the most suitable wavelet function and the thresholding method, which varies with the nature of the task performed, are important steps in the process of wavelet denoising. In this study, the effects of wavelet denoising on Electroencephalograph (EEG) signals during reading and mental arithmetic tasks were investigated. The effectiveness of each of the 46 wavelet functions including Daubechies- db, Symlet- sym, Coiflet- coif and Discrete Meyer- dmey, was examined for denoising the EEG signals recorded during reading and mental arithmetic tasks. EEGs of ten healthy subjects were recorded during reading and mental arithmetic tasks. The performance evaluation of wavelet function and thresholding method were done on the basis of peak signal to noise ratio (PSNR), root mean square error (RMSE), percentage root square difference (PRD), and cross correlation coefficient (CC). Subsequently, the EEG signals were decomposed into different frequency bands, and variations in EEG band power were computed before and after denoising. The wavelet function "dmey" was found to be the most efficient wavelet function for denoising EEG signals during cognitive tasks. Rigrsure thresholding method was found to be the best thresholding method in this study. A significant difference in EEG rhythmic activity (P < 0.05) was observed after denoising the EEG signal.
Walsh-Hadamard-Based Orthogonal Sampling Technique for Parallel Neural Recording Systems

Walsh-Hadamard based orthogonal sampling of signals is studied in this paper, and an application of this technique is presented. Using orthogonal sampling, a single analog-to-digital converter (ADC) only is sufficient to perform parallel (simultaneous) recording from the sensors. Furthermore, employing Walsh functions as modulation signals, the required bandwidth of the ADC in the proposed system is equal to the bandwidth of a time-multiplexed ADC in a system with identical number of recording channels. Therefore, the bandwidth of the ADC in the proposed system is effectively employed and shared among all the channels. The efficient usage of the ADC bandwidth leads to saving power at the ADC stage and reducing the data-rate of the output signal compared to state-of-the-art recording systems based on frequency-division multiplexing. This paper presents the orthogonal sampling technique for neural recording in multi-channel recording systems which is implemented with four recording channels using a <inline-formula> <tex-math notation="LaTeX">$0.18~\mu \text{m}$ </tex-math></inline-formula> technology which results in a power consumption of <inline-formula> <tex-math notation="LaTeX">$1.26~\mu \text{W}$ </tex-math></inline-formula>/channel at a 0.8 V supply.
Fast Mapping and Updating Algorithms for a Binary CAM on FPGA

Content-addressable memories (CAMs) are used in a variety of applications, such as IP filtering, data compression, and artificial neural networks due to its high-speed lookup. Fast field-programmable gate arrays (FPGAs) are nowadays used to emulate CAMs. These CAM emulations either make use of logical resources or use memory blocks on FPGAs to emulate CAMs. However, such CAM emulation suffers from slower mapping and updating mechanisms, which results in an unacceptable response in real-time applications. The slower response in update mechanism is proportionate to the CAM depth in the schemes. In this article, fast mapping and updating algorithms for a binary CAM (FMU-BiCAM) are presented, which efficiently utilizes lookup tables, slice registers, and block random access memories (RAMs) on Xilinx FPGA to emulate faster mapping and updating CAMs. The advantage of the proposed work lies in directly applying the CAM key as an address, which helps in updating contents in memory units. CAMs in the literature exhaust the entire CAM depth in remapping the CAM words along with the updating word, which leads to higher update latency. The proposed algorithms are implemented on Xilinx Virtex–6 FPGA, and the results show that the proposed method brings latency to only two clock cycles during update.
Analysis, Design, and Implementation of a Spatially Nested Magnetic Integration Method for Inductive Power Transfer Systems

Inductive power transfer (IPT) technology uses large resonant inductors as compensation components. In this article, a spatially nested magnetic integration method is proposed to integrate discrete inductors into an IPT transformer structure. Unipolar transformer coils are employed and are decoupled orthogonally from a nested solenoidal inductance coil for various misalignment cases. The variations of the coupling coefficients and the magnetic flux density distribution are presented with the three-dimensional finite-element modeling tool. An LCC series compensation circuit is selected to implement the proposed method with an optimal efficiency design. A 4-kW prototype with a 160 mm airgap is implemented to demonstrate the validity of the proposed method. The experimental results show that the compact structure retains the outstanding performance and avoids significant cross coupling for lateral, vertical, and axial misalignment. The maximum conversion efficiency of the proposed system is 96.7% at full output power and stays above 91.6% throughout the misalignment range.
Maginot Lines and Tourniquets: On the Defendability of National Cyberspace

National governments know the Internet as both a blessing and a headache. On the one hand, it unlocks great economic and strategic opportunity. On the other hand, government, military, or emergency-services become vulnerable to scans (Shodan), attacks (DDoS from botnets like Mirai), etc., when made accessible on the Internet.How hard is it for a national government to effectively secure its entire cyberspace? We approach this problem from the view that a coordinated defense involves monitors and access control (firewalls etc.) to inspect traffic entering or leaving the country, as well as internal traffic. In several case studies, we consistently find a natural Line of Defense — a small number of Autonomous Systems (ASes) that intercept most (> 95%) network paths in the country. We conclude that in many countries, the structure of the Internet actually makes it practical to build a nation-scale cordon, to detect and filter cyber attacks.