Miracle-dz/UniFAR-FTUs huggingface dataset:
Differential effects of wildfire on salt marsh and coastal forest plant community abundance and diversity in the urbanized Long Island Sound

Abstract. Coastal marshes are dynamic ecosystems that provide essential ecosystem services and are impacted by a variety of natural and anthropogenic disturbances including flooding, fire, climate change, and urbanization. Coastal saltmarshes are sometimes managed through prescribed burning to enhance habitat value for wildlife and increase plant diversity, but this practice is uncommon in urbanized environments and the effects are unclear. In this study, we observed the effects of a 2017 wildfire on a Spartina saltmarsh and oak-hickory coastal forest over three years on Long Island Sound, New York. The objectives were to determine the impact of the fire on plant abundance, diversity, and invasive species. We studied the marshland and nearby coastal forest. It was concluded that the marsh habitat was more resilient than the forested habitat as its plant composition, abundance and diversity returned to that of the unburned marsh two years post fire. The wildfire caused large shifts in community composition, increasing abundance and diversity in the burned forest relative to the unburned forest, but it also facilitated an increase in non-native species. Because these systems provide countless ecosystem services, further research on the effect of wildfire and interactions with other disturbances is needed.
Notes on Sorting and Counting Networks

Abstrac t . Implementing counting networks on shared-memory multiprocessor machines often incurs a performance penalty proportional to the depth of the networks and the extent to which concurrent processors access the same memory location at the same time. In this work, we examine the dependence of performance on the width of the balancers used in constructing such networks. Our main result is a construction of counting networks (and, hence, sorting networks) with perfect power width pk, for any integers p ~ 2 and k >_ 1. This construction is built on balancers of width p, and'generalizes in a novel way the periodic counting network of Aspnes, Herlihy and Shavit [3], built on balancers of width 2. This result provides a partial answer to a question of Aharonson and Attiya [1]. The depth of these networks is k 2, thus implying decrease in depth of counting networks through an increase in balancer width. Furthermore, we provide a formal analysis of the performance of our construction as measured by contention [8]. Through a novel use of recurrence relations, we show that our counting networks incur a contention of O(nk 2/pk-1) in the presence of n concurrent processors. This bound implies a trade-off between depth and contention.
Improving compute in-memory ECC reliability with successive correction

Compute in-memory (CIM) is an exciting technique that minimizes data transport, maximizes memory throughput, and performs computation on the bitline of memory sub-arrays. This is especially interesting for machine learning applications, where increased memory bandwidth and analog domain computation offer improved area and energy efficiency. Unfortunately, CIM faces new challenges traditional CMOS architectures have avoided. In this work, we explore the impact of device variation (calibrated with measured data on foundry RRAM arrays) and propose a new class of error correcting codes (ECC) for hard and soft errors in CIM. We demonstrate single, double, and triple error correction offering over 16,000× reduction in bit error rate over a design without ECC and over 427× over prior work, while consuming only 29.1% area and 26.3% power overhead.
HWST128: complete memory safety accelerator on RISC-V with metadata compression

Memory safety is paramount for secure systems. Pointer-based memory safety relies on additional information (metadata) to check validity when a pointer is dereferenced. Such operations on the metadata introduce significant performance overhead to the system. This paper presents HWST128, a system to reduce performance overhead by using hardware/software co-design. As a result, the system described achieves spatial and temporal safety by utilizing microarchitecture support, pointer analysis from the compiler, and metadata compression. HWST128 is the first complete solution for memory safety (spatial and temporal) on RISC-V. The system is implemented and tested on a Xilinx ZCU102 FPGA board with 1536 LUTs (+4.11%) and 112 FFs (+0.66%) on top of a Rocket Chip processor. HWST128 is 3.74× faster than the equivalent software-based safety system in the SPEC2006 benchmark suite while providing similar or better security coverage for the Juliet test suite.
Human emotion based real-time memory and computation management on resource-limited edge devices

Emotional AI or Affective Computing has been projected to grow rapidly in the upcoming years. Despite many existing developments in the application space, there has been a lack of hardware-level exploitation of the user's emotions. In this paper, we propose a deep collaboration between user's affects and the hardware system management on resource-limited edge devices. Based on classification results from efficient affect classifiers on smartphone devices, novel real-time management schemes for memory, and video processing are proposed to improve the energy efficiency of mobile devices. Case studies on H.264 / AVC video playback and Android smartphone usages are provided showing significant power saving of up to 23% and reduction of memory loading of up to 17% using the proposed affect adaptive architecture and system management schemes.
Automating hardware security property generation: invited

Security verification is an important part of the hardware design process. Security verification teams can uncover weaknesses, vulnerabilities, and flaws. Unfortunately, the verification process involves substantial manual analysis to create the threat model, identify important security assets, articulate weaknesses, define security requirements, and specify security properties that formally describe security requirements upon the hardware. This work describes current hardware security verification practices. Many of these rely on manual analysis. We argue that the property generation process is a first step towards scalable and reproducible hardware security verification.
GEML: GNN-based efficient mapping method for large loop applications on CGRA

Coarse-grained reconfigurable architecture (CGRA) is an emerging hardware architecture, with reconfigurable Processing Elements (PEs) for executing operations efficiently and flexibly. One major challenge for current CGRA compilers is the scalability issue for large loop applications, where valid loop mapping results cannot be obtained in an acceptable time. This paper proposes an enhanced loop mapping method based on Graph Neural Network (GNN), which effectively addresses the scalability issue and generates valid loop mapping results for large applications. Experimental results show that the proposed method enhances the compilation time by 10.8x on average over existing methods, with even better loop mapping solutions.
Unwritten Magic: Participatory Design of AI Dialogue to Empower Marginalized Voices

Language is an act of identity, but AI has no identity other than that which its creators assign it. Technology creators who do not fully consider how identity information is encoded in AI dialogue risk creating representational harms that negatively impact users’ interactions with the technology, particularly young users from groups marginalized in STEM education. One solution is to engage young users in Participatory Design of dialogue, pushing power away from the researcher and toward the young users. This positions users as technology creators who understand AI language as a technosocial phenomenon and who have their own perspective about how identity is best portrayed in AI language. In this work in progress paper, we provide initial impressions from a Youth Advisory Group (YAG) with 12 middle-school-aged learners of color who are all female or non-binary.
CloudRecoMan: Cloud adoption made easy: A platform for assisting small and medium enterprises to adopt cloud solutions

Although the adoption and use of cloud computing in large, medium and small enterprises is increasing every year, statistics show that medium and especially small enterprises have a much slower adoption than large enterprises. This suggests that various types of issues may affect Small to Medium Enterprises (SMEs) in making the choice to transit towards the public cloud. Based on experts and literature, SMEs’ adoption of cloud is impacted by lack of resources, concerns on security and data control and uncontrolled increasing cloud costs due to the lack of cloud experience. A platform is not yet available that would assist non-technical SME managers in specifying non-technical business requirements in order to receive assistance in the form of recommendations of cloud resources, cloud applications and deployment plans. The CloudRecoMan platform aims to enable this through the development of a web-based cloud recommender and deployment platform.
Efficient ensembles of graph neural networks

Ensembles improve the accuracy and robustness of Graph Neural Networks (GNNs), but suffer from high latency and storage requirements. To address this challenge, we propose GNN Ensembles through Error Node Isolation (GEENI). The key concept in GEENI is to identify nodes that are likely to be incorrectly classified (error nodes) and suppress their outgoing messages, leading to simultaneous accuracy and efficiency improvements. GEENI also enables aggressive approximations of the constituent models in the ensemble while maintaining accuracy. To improve the efficacy of GEENI, we propose techniques for diverse ensemble creation and accurate error node identification. Our experiments establish that GEENI models are simultaneously up to 4.6% (3.8%) more accurate and up to 2.8X (5.7X) faster compared to non-ensemble (conventional ensemble) GNN models.
Performance Comparison of Motion-Related Sensor Technology and Acoustic Sensor Technology in the Field of Human Health Monitoring

Smartwatches are reaching more people every year and have long since found their way into research. When monitoring the health of people with neurological conditions, it is crucial to detect disease progression as early as possible. These can be detected by monitoring everyday activities, such as eating or drinking, using smartwatches. We propose an approach that uses smartwatches in combination with supervised learning algorithms. The similar arm movements during the activities and the thus hardly distinguishable movement patterns are problematic. In this work, we collect data from daily activities using sensor data from smartwatches to classify the similar activities using acoustic recognition. We sample acoustic sensor data at 20 Hz and send it to a web server. A web application enables systematic comparison of logistic regression, fast forest, and support vector machine algorithms to classify four similar motion activities (eating, drinking, talking on the phone, and blowing one’s nose). Sensor data from ten subjects while performing the similar arm movements are classified. We build on a previous successful attempt to recognize these activities using motion-based sensors. Now we scrutinize the capabilities of the acoustic sensor and compare its properties and machine learning capabilities with those of the motion-related sensors.
ReSMA: accelerating approximate string matching using ReRAM-based content addressable memory

Approximate string matching (ASM) functions as the basic operation kernel for a large number of string processing applications. Existing Von-Neumann-based ASM accelerators suffer from huge intermediate data with the ever-increasing string data, leading to massive off-chip data transmissions. This paper presents a novel ASM processing-in-memory (PIM) accelerator, namely ReSMA, based on ReCAM- and ReRAM-arrays to eliminate the off-chip data transmissions in ASM. We develop a novel ReCAM-friendly filter-and-filtering algorithm to process the q-grams filtering in ReCAM memory. We also design a new data mapping strategy and a new verification algorithm, which enables computing the edit distances totally in ReRAM crossbars for energy saving. Experimental results show that ReSMA outperforms the CPU-, GPU-, FPGA-, ASIC-, and PIM-based solutions by 268.7×, 38.6×, 20.9×, 707.8×, and 14.7× in terms of performance, and 153.8×, 42.2×, 31.6×, 18.3×, and 5.3× in terms of energy-saving, respectively.
AxoNN: energy-aware execution of neural network inference on multi-accelerator heterogeneous SoCs

The energy and latency demands of critical workload execution, such as object detection, in embedded systems vary based on the physical system state and other external factors. Many recent mobile and autonomous System-on-Chips (SoC) embed a diverse range of accelerators with unique power and performance characteristics. The execution flow of the critical workloads can be adjusted to span into multiple accelerators so that the trade-off between performance and energy fits to the dynamically changing physical factors. In this study, we propose running neural network (NN) inference on multiple accelerators of an SoC. Our goal is to enable an energy-performance trade-off with an by distributing layers in a NN between a performance- and a power-efficient accelerator. We first provide an empirical modeling methodology to characterize execution and inter-layer transition times. We then find an optimal layers-to-accelerator mapping by representing the trade-off as a linear programming optimization constraint. We evaluate our approach on the NVIDIA Xavier AGX SoC with commonly used NN models. We use the Z3 SMT solver to find schedules for different energy consumption targets, with up to 98% prediction accuracy.
FHDnn: communication efficient and robust federated learning for AIoT networks

The advent of IoT and advances in edge computing inspired federated learning, a distributed algorithm to enable on device learning. Transmission costs, unreliable networks and limited compute power all of which are typical characteristics of IoT networks pose a severe bottleneck for federated learning. In this work we propose FHDnn, a synergetic federated learning framework that combines the salient aspects of CNNs and Hyperdimensional Computing. FHDnn performs hyperdimensional learning on features extracted from a self-supervised contrastive learning framework to accelerate training, lower communication costs, and increase robustness to network errors by avoiding the transmission of the CNN and training only the hyperdimensional component. Compared to CNNs, we show through experiments that FHDnn reduces communication costs by 66X, local client compute and energy consumption by 1.5 - 6X, while being highly robust to network errors with minimal loss in accuracy.
Improving LUT-based optimization for ASICs

LUT-based optimization techniques are finding new applications in synthesis of ASIC designs. Intuitively, packing logic into LUTs provides a better balance between functionality and structure in logic optimization. On this basis, the LUT-engine framework [1] was introduced to enhance the ASIC synthesis. In this paper, we present key improvements, at both algorithmic and flow levels, making a much stronger LUT-engine. We restructure the flow of LUT-engine, to benefit from a heterogeneous mixture of LUT sizes, and revisit its requirements for maximum scalability. We propose a dedicated LUT mapper for the new flow, based on FlowMap, natively balancing LUT-count and NAND2-count for a wide range LUT sizes. We describe a specialized Boolean factoring technique, exploiting the fanin bounds in LUT networks, resulting in a very fast LUT-based AIG minimization. By using the proposed methodology, we improve 9 of the best area results in the ongoing EPFL synthesis competition. Integrated in a complete EDA flow for ASICs, the new LUT-engine performs well on a set of 87 benchmarks: -4.60% area and -3.41% switching power at +5% runtime, compared to the baseline flow without LUT-based optimizations, and -3.02% area and -2.54% switching power with -1% runtime, compared to the original LUT-engine.
A scalable symbolic simulation tool for low power embedded systems

Recent work has demonstrated the effectiveness of using symbolic simulation to perform hardware software co-analysis on an application-processor pair and developed a variety of hardware and software design techniques and optimizations, ranging from providing system security guarantees to automated generation of application-specific bespoke processors. Despite their potential benefits, current state-of-the-art symbolic simulation tools for hardware-software co-analysis are restricted in their applicability, since prior work relies on a costly process of building a custom simulation tool for each processor design to be simulated. Furthermore, prior work does not describe how to extend the symbolic analysis technique to other processor designs. In an effort to generalize the technique for any processor design, we propose a custom symbolic simulator that uses iverilog to perform symbolic behavioral simulation. With iverilog - an open source synthesis and simulation tool - we implement a design-agnostic symbolic simulation tool for hardware-software co-analysis. To demonstrate the generality of our tool, we apply symbolic analysis to three embedded processors with different ISAs: bm32 (a MIPS-based processor), darkRiscV (a RISC-V-based processor), and openMSP430 (based on MSP430). We use analysis results to generate bespoke processors for each design and observe gate count reductions of 27%, 16%, and 56% on these processors, respectively. Our results demonstrate the versatility of our simulation tool and the uniqueness of each design with respect to symbolic analysis and the bespoke methodology.
Explaining food security warning signals with YouTube transcriptions and local news articles

Food security is a major concern in many countries all over the world. After a relatively long period characterized by a positive trend, the number and severity of food insecurity situations has been growing again in recent years, with alarming projections for the near future. While several Early Warning Systems (EWS) exist to monitor this phenomenon and guide the interventions of governments and ONGs, such systems rely on a narrow set of data types, i.e., mainly satellite imagery and survey data. These data can explain just a limited number of the multiple factors that impact on food security, thus producing an incomplete picture of the real scenario. In this work, we propose a spatio-temporal analysis of unconventional textual data (i.e., YouTube transcriptions and articles from local news papers) to support the explanatory process of food insecurity situations. This data, being completely exogenous to the one used in currently active EWS, can offer a different and complementary perspective on the causes of such crises. We focus on the area of West Africa, which has been at the center of many humanitarian crisis since the beginning of this century. By exploiting state of the art text mining techniques on a corpus of textual documents in French (including video transcriptions extracted from the YouTube channels of four West African news broadcasters and news articles obtained from the online versions of two local newspapers of Burkina Faso) we will analyze food security situations in different regions of the study area in recent years, by also proposing a food security indicator based on textual data, namely TXT-FS.
Compressive sensing based asymmetric semantic image compression for resource-constrained IoT system

The widespread application of Internet-of-Things (IoT) and deep learning have made machine-to-machine semantic communication possible. However, it remains challenging to deploy DNN model on IoT devices, due to their limited computing and storage capacity. In this paper, we propose Compressed Sensing based Asymmetric Semantic Image Compression (CS-ASIC) for resource-constrained IoT systems, which consists of a lightweight front encoder and a deep iterative decoder offloaded at the server. We further consider a task-oriented scenario and optimize CS-ASIC for the semantic recognition tasks. The experiment results demonstrate that CS-ASIC achieves considerable data-semantic rate-distortion trade-off, and low encoding complexity over prevailing codecs.
Classifying mosquito wingbeat sound using TinyML

Every year more than one billion people are infected and more than one million people die from vector-borne diseases including malaria, dengue, zika and chikungunya. Mosquitoes are the best known disease vector and are geographically spread worldwide. It is important to raise awareness of mosquito proliferation by monitoring their incidence, especially in poor regions. Acoustic detection of mosquitoes has been studied for long and ML can be used to automatically identify mosquito species by their wingbeat. We present a prototype solution based on an openly available dataset, on the Edge Impulse platform and on three commercially-available TinyML devices. The proposed solution is low-power, low-cost and can run without human intervention in resource-constrained areas. By adding LoRaWAN communications capabilities the system can send classification inference results over long distances. This insect monitoring solution can reach a global scale.
Strengthening Invisible Ties: Decreasing Loneliness Indices of University Students Through a Gamified Mobile App

During the periods of social isolation to contain the advance of COVID-19 in 2020 and 2021, educational institutions have had the challenge to adopt technological strategies not only to ensure continuity in students’ classes, but also to support their mental health in a period of uncertainty and health risks. Loneliness is an emotional distress caused by the lack of meaningful social connections; it has increasingly affected young adults worldwide during the pandemic's social isolation and still bears psychological effects in the current post-pandemic period. In the light of this challenge, the Nonenliness App was developed as a way to bring together university communities to address issues related to loneliness and mental health disorders through a gamified and social online environment. In this paper, we present the app and its main functionalities (Beta version) and discuss the preliminary results of a pilot clinical study conducted with university students in Germany (N = 12) to verify the app's efficacy and usability, alongside the challenges faced and the next steps to be taken regarding the platform's improvement.
AL-PA: cross-device profiled side-channel attack using adversarial learning

In this paper, we focus on the portability issue in profiled side-channel attacks (SCAs) that arises due to significant device-to-device variations. Device discrepancy is inevitable in realistic attacks, but it is often neglected in research works. In this paper, we identify such device variations and take a further step towards leveraging the transferability of neural networks. We propose a novel adversarial learning-based profiled attack (AL-PA), which enables our neural network to learn device-invariant features. We evaluated our strategy on eight XMEGA microcontrollers. Without the need for target-specific preprocessing and multiple profiling devices, our approach has outperformed the state-of-the-art methods.