Gallium Nitride and Silicon Transistors on 300 mm Silicon Wafers Enabled by 3-D Monolithic Heterogeneous Integration

We demonstrate industry’s first 300 mm GaN transistor technology and 3-D monolithic heterogeneous integration with Si transistors, enabled by 300 mm GaN metal–organic chemical vapor deposition (MOCVD) epitaxy and 300 mm 3-D layer transfer. The 300 mm GaN technology is a high-<inline-formula> <tex-math notation="LaTeX">${k}$ </tex-math></inline-formula> dielectric enhancement-mode GaN nMOS transistor technology on Si(111) substrate. It is capable of excellent characteristics and figure-of-merits (FOM) for realizing energy-efficient, compact power-delivery and RF front-end components such as power-amplifiers, low-noise amplifiers, and RF-switches. Our GaN nMOS transistors show e-mode operation with: 1) high <inline-formula> <tex-math notation="LaTeX">${I}_{\text {D,max}} =1.5$ </tex-math></inline-formula> mA/<inline-formula> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula>; 2) low <inline-formula> <tex-math notation="LaTeX">${R}_{ \mathrm{\scriptscriptstyle ON}}$ </tex-math></inline-formula> of <inline-formula> <tex-math notation="LaTeX">$610\,\,\Omega -\mu \text{m}$ </tex-math></inline-formula> (<inline-formula> <tex-math notation="LaTeX">${L}_{\text {G}} =50$ </tex-math></inline-formula> nm); 3) low <inline-formula> <tex-math notation="LaTeX">${I}_{ \mathrm{\scriptscriptstyle OFF}}$ </tex-math></inline-formula> of 100 pA/<inline-formula> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> (<inline-formula> <tex-math notation="LaTeX">${L}_{\text {G}} \,\,=180$ </tex-math></inline-formula> nm), which are significant improvements over GaN HEMT; 4) excellent RF performance: <inline-formula> <tex-math notation="LaTeX">${f}_{\text {T}} =190$ </tex-math></inline-formula> GHz, <inline-formula> <tex-math notation="LaTeX">${f}_{\text {MAX}} =300$ </tex-math></inline-formula> GHz, power-added efficiency (PAE) = 56% (<inline-formula> <tex-math notation="LaTeX">${L}_{\text {G}} \,\,=50$ </tex-math></inline-formula> nm) at mmwave frequency 28 GHz, and PAE = 77% at 5 GHz (<inline-formula> <tex-math notation="LaTeX">${L}_{\text {G}} =180$ </tex-math></inline-formula> nm), significantly better than industry-standard GaAs and Si RF transistors; 5) good RF-switch FOM, <inline-formula> <tex-math notation="LaTeX">${R}_{ \mathrm{\scriptscriptstyle ON}}{C}_{ \mathrm{\scriptscriptstyle OFF}} =110$ </tex-math></inline-formula> fs; and 6) low noise figure, NF<inline-formula> <tex-math notation="LaTeX">$_{\text {min}} \,\,=1.36$ </tex-math></inline-formula> dB (<inline-formula> <tex-math notation="LaTeX">${f} =28$ </tex-math></inline-formula> GHz) and 0.4 dB (<inline-formula> <tex-math notation="LaTeX">${f} =5$ </tex-math></inline-formula> GHz), all at SoC-compatible voltages. We further demonstrate GaN transistor innovations all integrated on 300 mm Si(111) wafer, including depletion-mode GaN nMOS transistor with high <inline-formula> <tex-math notation="LaTeX">${I}_{\text {D}} =1.8$ </tex-math></inline-formula> mA/<inline-formula> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula>; GaN Schottky gate transistor producing high saturated power of 20 dBm (<inline-formula> <tex-math notation="LaTeX">$80\mu \text{m}$ </tex-math></inline-formula> width) with peak PAE = 57% at 28 GHz; low leakage compact cascode and multigate GaN transistors; and GaN Schottky diodes with ultralow <inline-formula> <tex-math notation="LaTeX">${C}_{ \mathrm{\scriptscriptstyle OFF}}$ </tex-math></inline-formula> for electrostatic discharge (ESD) protection. The layer-transferred Si transistors, monolithically stacked on top of the GaN transistors by 300 mm 3-D layer transfer, show high drive current performance: 1.0 mA/<inline-formula> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> (Si nMOS) and 0.5 mA/<inline-formula> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> (Si pMOS). Such a monolithic 3-D Monolithic integration of GaN and Si transistors enables full integration of energy-efficient, truly compact power delivery and RF solutions with CMOS digital signal processing, logic computation and control, memory, and analog circuitries.