Topology, control and implementation of switched-capacitor DC-DC power converters for portable applications

Portable applications often need step-up power converters in generating from a low battery voltage to higher voltages for functional blocks such as E 2 PROM and LCD drivers. Switched capacitor DC-DC power converters, often known as charge pumps, are attractive candidates as they do not need bulky inductors and cause less EMI problems. High efficiency is needed to extend the battery cycle, and compactness is crucial for portable applications. Very often, the conversion ratio (or voltage gain) should be adjusted according to the slowly discharging battery voltage to maintain a high efficiency. For driving noise sensitive circuits, regulated outputs are needed. In this research, a systematic study of switched-capacitor DC-DC power converters is presented. First, gate control strategies in turning on and off all charge transfer MOS transistors completely for a higher efficiency are investigated. Second, the number and configurations of charge pumps with a 2-phase clock are addressed. The straightforward criterion is to consider those configurations with the negative terminals of the flying capacitors connected to ground during the charging phase, and a topological tree, the ANTZ (All Negative Terminal connected to Zero) tree, is constructed. All prior published charge pumps are elements of this tree, and the rest are new configurations previously unknown. An integrated charge pump is designed as an example, with a variable gain of 6x and 7x in a standard 0.35m CMOS process using only 4 flying capacitors. The ANTZ tree excludes many non-ANTZ topologies that could be useful in realizing charge pumps with variable conversion ratios, and a more relaxed criterion is to consider all efficient configurations, and the CCA (Capacitor Charging Arrangement) tree, is constructed. An integrated charge pump with variable conversion ratios of 4x/5x/6x/7x/8x for xx LCD driver applications is designed and tested. Third, to further reduce the number of flying capacitors as well as related package pins, charge pumps operating with multiphase are proposed. A 3/4-phase charge pump with variable conversion ratios of 4x/5x/6x/7x is demonstrated for LCD driver applications. It requires only 3 off-chip flying capacitors and 5 package pins, which is the most component-efficient design among published literatures. Fourth, to minimize the effects on voltage gain and efficiency due to the parasitic capacitors of on-chip flying capacitors, a 3-phase charge recycling scheme (CRS) is proposed. Charge redistribution loss of parasitic capacitors is reduced, which help to enhance efficiency with bottom-plate CRS, or both efficiency and voltage gain with top-plate CRS. An interleaving multi-branch topology is also suggested to increase the effective switching frequency and thus greatly suppress output voltage ripples. Fifth, to suppress switching noise and reversion leakage in dual-branch voltage doublers delivering hundreds of mA, phase delay control is proposed. Power switches are individually controlled by their lossless phase signals, and are turned on and off in proper sequence to eliminate both short-circuit and reverse leakage during phase transitions. Power transistors are partitioned into smaller groups with scheduled delay to further reduce switching noise in light load conditions. A 4-phase driving scheme is proposed that allow interleaving the dual-branch charge pump to work with continuous input and output charging currents, further reducing switching noise. Sixth, the interleaving driving scheme is employed to a regulated voltage doubler with area-efficient continuous output regulation (COR). Dual-loop feedback capacitor multiplier is adopted for loop compensation and a super buffer with excellent current sinking capability is inserted into the loop to drive the switching capacitive load and push the pole locating at the gate of the output power transistor to high frequency for better stability. To conclude, this research addresses the important issues of topology generation, control methodology and circuit implementation of switched-capacitor DC-DC power converters. Chapter