DEVELOPMENT OF FLEXIBLE AND LOGIC-RECONFIGURABLE VME BOARDS

We developed logic-reconfigurable VME boards with high flexibility. The board has two parts, a base board and two I/O daughter boards. The base board has a fieldprogrammable gate array (FPGA) chip for the execution of user logic, such as a digital low-pass filter or the calculation of the center of a spot image. Users can install their logic into the FPGA via the VME bus. The I/O daughter boards are simple I/O modules such as analog inputs and outputs (AI/AOs) or digital inputs/outputs (DIOs). The data from the I/O board is sent to the base board and processed there. As the I/O module is separated physically, the user can customize the VME board by choosing I/O modules and does not need to develop the whole device. We have developed DIO, AI/AO and camera link interface modules [1] as I/O daughter boards. INTRODUCTION Software on a CPU and simple AI/AOs and DIOs enables us to build control systems with complex sequences, such as feedback routines. However, a fast sequence that requires sub-100-microsecond-order timing is currently impossible to achieve by software on a CPU. Hardware in the form of a hard-wired circuit, on the other hand, provides control of fast sequences. However, the hardware sometimes has limited flexibility and requires considerable time and cost to adjust the sequence. We developed an I/O flexible and logic-reconfigurable board that enables both the control and adjustment of fast sequences. The design concepts are discussed in section 2, and the specifications are given in section 3. We present examples of potential applications of the new board in section 4. Finally, we conclude our study in section 5. DESIGN CONCEPTS We adopted three main design concepts. These are (1) flexible I/O selection, (2) real-time and fast control, and (3) sequence reconfigurability. Flexible I/O Selection We separated I/O parts physically from the base board. The I/O parts are simple I/O modules such as an AI/AO or DIO module. Two I/O parts can be installed on the base board as daughter boards (see Fig. 1). They are connected to the base board by three 64-pin connectors. The data from the I/O board is sent to the base board through the connectors. All the data processing for the sequence is performed on the base board. The users can choose appropriate I/O daughter boards for their own system and develop the logic of the sequences to be carried out. If the specifications of the existing I/O daughter board do not fit the user’s system, the user only needs to develop a simple I/O module. The same base board can be used with different I/Os with a small modification of the logic and without any modification of the hardware, such as a printed circuit board design. This design concept provides high flexibility for I/Os and shortens the hardware development time. Figure 1: A photograph of the flexible and logicreconfigurable VME board mounted with DIO (left side) and camera link grabber (right side) daughter boards. The user FPGA (lower) and bus-control FPGA (upper) are mounted in the middle of the base board. Real-time and Fast Control The base board is mounted with FPGA chips. The user sequences are on one FPGA chip with 1.5M gates. The FPGA execute user logic at a base clock frequency of 32 MHz. The FPGA enables real-time and fast control with microsecond-order response, which software on a CPU at present cannot achieve. Sequence Reconfigurability We adopted the FPGA because it is reprogrammable. The development of a system with complex sequences often needs adjustments. The FPGA enables both reprogramming the sequence and testing the sequence with the actual equipment being controlled in the same place, because changing the logic in the FPGA only requires the modification of configuration data. The feature of reconfigurability also enables us to carry out R&D for the sequence because of the easiness of logic modification. The users can test several sequences to find ___________________________________________ # hirono@spring8.or. jp Proceedings of ICALEPCS07, Knoxville, Tennessee, USA WPPB13