Heteroepitaxial Ge on Si via High-Bandgap III-V Buffers for Low-Power Electronic Applications

Over the past four decades, aggressive scaling of silicon (Si) based complementary metal-oxide-semiconductor (CMOS) transistors has resulted in an exponential increase in device density, and thus an exponential increase in computing power. Increasing transistor density also results in increasing total power consumption and thus, necessitates supply voltage scaling in order to maintain low-power device operation. However, with increased supply voltage scaling, transistor drive current is significantly degraded due to the low carrier mobility of Si. To overcome the key challenges of device and voltage scaling required for low-power electronic operation without the degradation of transistor drive current requires the adoption of narrow bandgap channel materials with superior transport properties. However, the use of such materials as bulk substrates remains cost-prohibitive. Thus, another key challenge lies in the heterogeneous integration of high-mobility channel materials on affordable, established Si platform. Germanium (Ge) is an attractive candidate for next-generation low-power devices owing to its high electron and high hole mobility. Recently, AlAs/GaAs epilayers were demonstrated as a potential buffer platform for nextgeneration Ge-based electronics integrated on Si substrate. This research systematically investigates the structural characteristics of the Ge epitaxial layer heterogeneously integrated on Si using a composite III-V AlAs/GaAs buffer and the electrical characteristics of MOS capacitors (MOS-C’s) fabricated on the aforementioned stack. Further passivation techniques and interface engineering is then pursued on MOS-C’s fabricated from (100) and (110) crystallographically oriented epitaxial Ge integrated on AlAs/GaAs material stacks, balancing out effective oxide thickness (EOT) and reduction of oxide and interfacial traps in order to ensure a pristine interfacial quality for highperformance electronic applications. Further, work function tuning is demonstrated for the first time on the different crystallographically oriented epitaxial Ge integrated on AlAs/GaAs material stacks using two different gate metals, demonstrating the tunability of threshold voltage, VTH, required for transistor applications. The research demonstrates the feasibility of future high-mobility channel material integration on Si via large bandgap buffer architectures for high-speed, low-power, high-performance CMOS logic applications. Heteroepitaxial Ge on Si via High-Bandgap III-V Buffers for Low-Power Electronic Applications Peter D. Nguyen GENERAL AUDIENCE ABSTRACT Over the past four decades, the shrinking of silicon (Si) based complementary metaloxide-semiconductor (CMOS) transistors has allowed for a boost in electronic device performance, but also aggravates power consumption. To mitigate these power concerns, the industry is looking to switch over from silicon-based transistors to those that are alternative material based. A possible alternative material solution is Germanium (Ge), which has inherent material characteristics that are attractive for low-power, high-speed electronic applications. However, the use of Ge as a bulk material for transistor fabrication is cost-prohibitive. Thus, to address cost concerns, the integration of Ge on to Si via a buffer layer “bridge” is necessary. Recently, AlAs/GaAs buffer layers were demonstrated as a potential buffer solution for next-generation Ge-based electronic devices integrated on to Si. This research systematically investigates the material characteristics of Ge layers integrated on Si using the AlAs/GaAs buffer layer approach, as well as MOS capacitors (MOS-C’s) fabricated on the aforementioned material stack. Furthermore, interface engineering is pursued on different crystallographically oriented Ge integrated on Si via the AlAs/GaAs buffer approach in order to refine the MOS capacitor devices in order to demonstrate the feasibility of the use of such material stacks for state-of-the-art FinFETs (Fin Field-Effect Transistors). Finally, the tunability of a key device characteristic known as threshold voltage, VTH, is demonstrated via the use of two different gate metals for the Ge-based MOS capacitor devices integrated on Si using AlAs/GaAs buffer layers. Thus, this research demonstrates the feasibility of the use of Ge integrated on Si via AlAs/GaAs buffer layers for high-speed, low-power electronic devices.