The power of parallel pointer manipulation

An HMM is a very simple parallel machine consisting of finite s tate devices that can manipulate pointers to each other. The more commonly studied P R A M is a much richer parallel machine with a shared global memory and ar i thmetic capabilities. We define a natural restriction of the P R A M that is shown to be equivalent to the HMM to within a constant factor in bo th t ime and hardware simultaneously. Basically, the restricted PRAM is a Concurrent Read, Owner Write (CROW) PRAM, stripped of ar i thmetic capabilities, except for successor (+1) a doubling (x2) operations. 1 I n t r o d u c t i o n and S u m m a r y of R e s u l t s Many sequential Mgorithms spend the bulk of their t ime doing pointer manipula t ion, as opposed to, say, ar i thmetic operations. The Storage Modification Machine (SMM) or Pointer Machine is a formal model that captures the notion of computat ion by pointer manipulat ion. Considerable in*Part of this research performed while the second author visited the EECS Department, UC San Diego, whose hospitality is gratefully acknowledged, as is the financiM support provided to the first author by an IBM Graduate Fellowship, and to both authors by NSF grants ECS-8306622, and CCR-8703196. Permission to copy without fee all or part of this material is granted provided that the copies are not made or distributed for direct commercial advantage, the ACM copyright notice and the title of the publication and its date appear, and notice is given that copying is by permission of ~he Association for Computing Machinery. To copy otherwise, or to republish, requires a fee and/or specific permission. © 1989 ACM 0-89791-323-X/89 /0006 /0092 $1.50 tui t ion for the power of such machines is provided by Schhnhage's demonst ra t ion of the equivalence of SMM's and unit-cost successor RAM's, i.e. ordinary unit cost RAM's str ipped of all arithmetic capabilities except for the successor, or +1 operation [16]. (See also [17, 9, 8, 12, 1].) Various kinds of parallel random access machines or PRAM's are popular and convenient as models of parallel computers. PRAM's consist of a col lection of ordinary sequential RAM's with shared access to a common global memory. Like their sequential counterparts , many PRAM algorithms spend a considerable proport ion of their t ime manipulat ing pointers in global memory, indeed~ since interprocessor communicat ion is so fundamental to most parallel algorithms, pointer manipulation in PRAM's may be even more pervasive than in RAM's. The notion of parMlel computat ion by pointer manipula t ion is formally captured by the Hardware Modification Machine (HMM), introduced by Cook and studied by Dymond and Cook [2, 3, 6]. In this paper we prove tile equivalence of HMM's and a restricted version of the PRAM, which is s tr ipped of ar i thmetic capabilities except for the successor (+1) and doubling (x2) operations, and which observes a certMn very naturM restriction on writes to global memory, the turnerwrite restriction, deta~iled below. Our simulations show that both t ime and hardware resources of the two models, simultaneously, are the same to within a constant factor. This is an unusually tight correspondence between two parallel models. Indeed, we are aware of no other similarly t ight correspondence between parallel models that are more than