Design for Manufacturability : From Ad Hoc Solution To Extreme Regular Design

In very large scale integrated (VLSI) circuit design, shrinking transistor feature size using advanced lithography techniques has been a holy grail for the whole semiconductor industry. However, the gap between the manufacturing capability and the design expectation becomes more and more critical for sub-28nm technology nodes Under the constraint of 193nm wavelength lithography, advanced circuit designs are vulnerable to many reliability issues, such as open/shorts, performance degradation, or parametric yield loss. There are several lithography techniques to overcome these issues [1]. In emerging technology node and the near future, multiple patterning lithography (MPL) has become the most viable lithography technique. Generally speaking, MPL consists of two different manufacturing processes: litho-etch type and self-aligned patterning type. In the longer future (for the logic node beyond 14nm), there are several next generation lithography options, such as extreme ultra violet (EUV), electron beam lithography (EBL), directed self-assembly (DSA), and nanoimprint lithography (NIL). Design for manufacturability (DFM), in conjunction with process integration challenges, are being actively research, to provide friendliness to these lithography techniques. For MPL, there are intensive investigations to solve layout decomposition, where the input layout is divided into several masks (e.g. [2–6]). Besides, some research work considers particular MPL constraints in early design stage, such as placement [7,8] and routing [9–11]. For EUV, to migrate the mask blank defect, layout patterns are relocated to avoid the defect impact [12]. Also, related design constraints to avoid blank defect can be integrated into early physical design stage (e.g. [13]). For EBL, since its key limitation is the low throughput, many approaches have been developed to improve the system throughput [14–16]. For DSA, how to design and verify the guiding template patterns, which form DSA holes insides, have been investigated in [17] and [18], respectively. However, so far most of the DFM research are merely providing ad hoc solutions. That is, one specific work is targeting at one particular lithography constraint, and one work is hard to be re-used by another one where a new lithography constraint is involved. Therefore, CAD vendors may have to prepare a bunch of technical supports to these emerging design challenges. Recently there is a trend that different lithography techniques may combined to provide better printability (e.g., MPL+EBL [19] and MPL+DSA [20]). Due to such trend, in the near future, the situation may be even worse that more and more CAD tools and design supports are required. Extreme regular design is a promising solution for DFM community to resolve the diverse design challenges [21, 22]. Fig. 1 gives an example of such extreme regular layout [23], where we can see that the layout can be decomposed into line patterns and cut patterns. The benefit of such regularity is twofold. On the one hand, although various resolution enhancement techniques (RET) are utilized, random geometrical configurations are still hard to implement due to lithography limitation. Extreme regular style is able to