Low-Density Parity-Check Codes for Data Storage and Memory Systems

For high density magnetic recording channels and memory sys tems, low-density parity-check (LDPC) codes with probabilistic decoding are replacing Reed-Solomon (RS) codes or Bose-Chaudhuri-Hocquenghem (BCH) codes with conventional algebraic decoding. The main benefit of LDPC codes over the RS and B CH codes is that LDPC codes can provide lower error probabilities than equiv alent conventional codes if the conditions of magnetic recording channels or memory s ystems are the same. In other words, in order to achieve the same error probabilitie s, LDPC codes can tolerate lower signal-to-noise-ratio conditions than the conventi o al codes, which can imply higher densities and lower media costs. These advantages of LDPC codes are possible at the cost of the increased decoder complexity over the conv entional decoding. The main themes of this thesis are (1) to determine probabili stic input to the LDPC decoders from the channel detectors in magnetic recording c hannels or memory systems with low complexity and (2) to demonstrate the benefits o f LDPC codes in the proposed schemes. The probabilistic inputs dealt with in th is thesis can be either correlated or uncorrelated. The probabilistic inputs from mag netic recording channels (and also from Viterbi detector outputs) or from multiple-b it-per-cell memory model are correlated and the probabilistic inputs from single-bi t-per-cell memory model are uncorrelated. Binary and nonbinary LDPC codes are discusse d for both magnetic recording channels and memory systems. The contributions of this thesis to the field of signal proces sing and error correcting methods can be summarized as follows. (1) For intersymbo l-interference channels with data-dependent and correlated noise, an analytic meth od is developed to identify the most probable error patterns of Viterbi detector output and to estimate the probability of each error pattern. These are very important informat ion to design, for example, post processors or sync marks for timing recovery. (2) For ma gnetic recording channels, it is demonstrated that LDPC codes without outer conca te ated RS codes provide lower sector error rates than the concatenation of LDPC and R S codes when the user bit density is fixed, which suggests that LDPC codes should co mpletely replace RS codes. Neither serial or parallel concatenation improves t h performance. (3) For magnetic recording channels, performance and complexity o f 4kB LDPC codes for recent 4kB sector format are investigated. (4) A reduced-co mplexity turbo equalization method is proposed and it is shown that coding gains, abo ut 0.5 dB to 1 dB, can be obtained over the case without turbo equalization. The me thod uses binary soft output Viterbi detectors (SOVA) for nonbinary LDPC decoder s and avoids costly exact marginalization of joint probabilities of bits in nonbi ary symbols. (5) A general model for nonvolatile memory cells without probabilistic o utputs, either multiple-bitper-cell or single-bit-per-cell, is derived for any time-i nvariant error sources such as a constant radiation environment. It is shown that probabil istic input to LDPC decoders can be generated based on the derived model and it is al so hown that binary and nonbinary LDPC codes can outperform conventional RS or B CH codes using the proposed methods.