Measurement of DRAM Prices: Technology and Market Structure

of the United States). For this reason, I examine the methodology underlying the Dataquest price estimates in some detail in this paper. Rather than rely on the Dataquest figures, this paper develops new time-series data on DRAM prices from data on individual transactions and presents an econometric analysis of pricing practices within the market that enables us to control for relevant characteristics of the product and the transaction. Approximate Fisher Ideal DRAM price indexes using this new data are also constructed; these research price indexes may be of use in future work on this important industry. I begin with a discussion of the nature of the product, its technology, and the industrial organization of the DRAM market. Then follows an examination of existing data on DRAM pricing and the strengths and weaknesses of different statistical sources. This is followed by an econometric analysis of a sample of actual DRAM contracts, from which both a price index and some suggestive analysis are then extracted. 5.1 The Product and Its Technology Memory chips are the largest single segment in the U.S. semiconductor market, accounting for 28 percent of sales in 1989; they accounted for 34 percent of integrated circuit (IC) consumption.2 The dominant product (with almost two-thirds of memory sales) was the DRAM, which by itself accounted for 20 percent of American IC consumption in 1989. The first widely used commercial DRAM was the 1K memory (K means 1,024 bits of information), introduced in 1970 by American semiconductor companies. A new generation chip (with four times the capacity of the last generation) has been introduced approximately every three years since the mid1970s. At center stage in the continuing saga of technological improvement in DRAMs sits continuing advance in semiconductor manufacturing processes. Improvements in fabrication technology have steadily reduced the size of electronic circuit elements and stimulated development of fabrication processes for novel types of physical microstructures implementing standard electronic functions. The principal and overwhelmingly important characteristic of a DRAM from the point of view of its consumers is its bit capacity, the amount of infor2. These figures are based on U.S. market estimates from Electronics, January 1990, 83. Note that only a small fraction of DRAMs consumed are manufactured within the United States; DRAMs account for a much smaller share of the value of U.S. production. 159 Measurement of DRAM Prices: Technology and Market Structure mation it can hold. The effect of technical improvement is typically measured in cost per bit. Greater density would be more desirable even in the absence of reduction in bit cost, however, because fewer chips must be interconnected within a system, lowering system manufacturing costs. Faster access speed is also of importance to users but, like manufacturing cost per bit, is highly correlated with circuit density over the long run. Higher density parts are generally considerably faster than older parts; the shorter lengths of connections between circuit elements improve speed. DRAMs are generally designed with some “standard,” average speed specification in mind. Typically, the result of the fabrication process is a bellshaped distribution around the specified speed, at which the chips perform adequately. The chips residing in the left tail of the distribution are identified through testing; those not meeting the design specifications have their speed ratings reduced and are sold at a discount. As fabrication technology continuously improves, chip size is shrunk. Three or more such “die shrinks” may typically occur over the life cycle of a given capacity DRAM within a single company. A desirable side effect of incrementally smaller chips is gradually improved speed. Thus, the speed of the “standard” 256K DRAM produced by most manufacturers went from 150 to 120 nanosecond (ns) access time over the period 1987-88, the result of die shrinks. Even improvements in manufacturing processes for an existing design have often been associated with changes in product specifications large enough to lead to reclassification as new product types. Chips also use power, and lower power consumption is desirable. It means less costly power supplies, and costs for heat dissipation, within systems that use chips. Beginning with the 64K generation, a lower-power chip technology known as CMOS (complementary metal-oxide semiconductor) gradually began to displace an older technology (known as NMOS [n-channel metal-oxide semiconductor]) in DRAM manufacture. The introduction of the 1M (for megabit, 1,024K) DRAM marked the almost complete displacement of NMOS by CMOS technology in DRAM manufacture, so power consumption is rarely an important factor in selection among current generation chips. Because improvements in virtually all the desirable characteristics of DRAMs have been positively correlated with lower bit cost, cost per bit can probably be regarded as an upper bound on a suitably defined index of qualityadjusted chip cost. Data presented later in this paper show that, over at least some time periods, changes in simple cost per bit, for chips of given memory capacity, have not diverged greatly from a superlative DRAM price index accounting for technical improvements in speed and organization as well. A crucial point to make is that virtually all technological improvement in DRAMs has been embodied in the introduction of distinct and identifiable new products, as opposed to more subtle qualitative improvement in existing chips. Because of this, construction of a price index that properly identifies and accounts for the introduction of new, improved products will also cor-