A processing unit for parallel computer organizations

In this paper we present the organization and evaluation of a proposed hybrid processing unit (PU). The PU is used as the building block for a number of multiprocessor organizations that are generically called the Loosely Coupled Machine (LCM). The PU is developed to operate in a loosely coupled multiprocessor environment where a task is decomposed into a number of sequential threads that are executed concurrently except when preclude by data dependencies. Concurrent activities interact at sequential threads where multiple messages are consumed. To support this loosely coupled processing paradigm our PU incorporates: a multi-threaded processor for high performance execution of sequential threads, a matching unit that manages messages and prepares sequential threads for execution, and a router that provides for a flexible interconnection network between PUs for message transfers. These components all cooperatively and concurrently function within the PU in an asynchronous manner. Additionally, we present a performance analysis of an LCM configured as an 8 node hypercube of PUs. The performance analysis considers four distinct workloads, provides a characterization of relative component performance within the PU, and shows that the full processing power of the multi-treaded processors can be employed in task computation. 1 Electrical Engineering Dept., State University of New York, Binghamton, NY 13902-6000, USA 2 Faculty of Electrical Enginnering, Delft University of Technology, delft, The Netherlands 3 CAE-Link Corporation, P.O. Box 1237. Binghamton, NY 13902 4 School of Enginnering, The Johns Hopkins University, Bal-timore, MD 21218, USA 5 Electrical Enginnering Dept., Universidad Autónoma Metropolitana, México, D. F. , MEXICO Received: 11 May 1994. Accepted: 12 July 1994 A Processing Unit for Parallel Computer Organizations. J. G. Delgado, et al, pp. 20-32 Instrumentación y Desarrollo Vol. 3 No. 4/1994 Instrumentation and Development Vol. 3 No. 4/1994 multiprocessor organizations is a plausible approach to greatly reduce the cost of systems. • Interconnection and routing flexibility is required to be able to accommodate a wide range of interconnection networks and machine organizations. • Task synchronization in a multiprocessor environment tends to create an overhead, particularly in asynchronous computer systems. Messages are used to synchronize and trigger computational tasks; tasks often require multiple messages before being executed. To reduce task synchronization overhead, hardware support should be provided. • Applications of the processor should be considered in order to estimate its performance. Before a processor is built, which will be used as a building block for multiprocessor organizations, it is necessary to observe the performance of such processor executing under a number of applications. This allows an assessment of the processor’s usefulness. • Virtual connections allow richer communication capabilities as seen by the user of the parallel machine. The user sees a large number of connections that can be used. This feature should be included in a building block processor in order to accommodate a large number of applications and communication requirements. Due to the multiplicity of applications, we are interested in investigating a flexible processing unit that can be used as a building block in the design of multiprocessor systems. In particular, we are investigating a hybrid processing unit (PU) that is to be utilized as the basic building block in our Loosely Coupled Machine. The notion of using a hybrid architecture approach in the creation of an environment in which multiple processor units can cooperatively function in an asynchronous and parallel manner is presented in this paper. This paper has been organized as follows. Section 2 provides an introduction to the architecture and organizational requirements of our processor unit. An overview of the processing unit is presented in section 3 as is a detailed description of component. In order to show the potential of this approach a performance analysis is provided in section 4. The features of the PU are summarized in section 5. ARCHITECTURE/ORGANIZATIONAL REQUIREMENTS In our research into loosely coupled MIMD computers we have identified three basic components that are utilized to build a processing unit (PU) that can be interconnected through a flexible communications network to form a system. The three basic components and a discussion of their purpose is provided below: • A processing element. Our research has shown that many applications are composed of many independent sequential threads. The purpose of the processing element is to execute these threads in the fastest possible manner. • A matching unit. To manage messages and to prepare sequential threads (tasks) for execution a matching unit is required. In loosely coupled MIMD computers, concurrent activities interact at sequential threads where multiple messages are consumed. Coordination of these activities is accomplished by the administration of execution rules for threads requiring more than one input. To perform this task, the matching unit must be able to perform message matching, store large quantities of data for an indefinite amount of time, and it must be able to perform garbage collection so that its memory can be reused after a set of messages is extracted and sent to the processing element for sequential thread execution. • A router unit. To manage message transfers between PUs, a router unit is utilized. This component allows many processing units to interact asynchronously and provides for message routing independent of the processing element. An architecture utilizing these components is shown in Fig. 1. These three components form a processing ring which is utilized as a processing unit (PU) in our Loosely Coupled Machine (LCM). In Fig. 1, a message enters into the PU through the router and is passed on to the matching unit. The matching unit sorts and collects messages into complete sets of inputs for sequential threads. After all the messages required by a sequential thread are received, the matching unit forwards them to the processor. The processor executes this thread and produces new messages. These messages are passed to the PU’s router which sends them to the proper PU(s). If a new message is addressed to the local PU, it is forwarded to the local matching unit. This cycle makes up the basic processing ring. In the following section, PUs such as this one are used to build the LCM. A Processing Unit for Parallel Computer Organizations. J. G. Delgado, et al, pp. 20-32 Revista de la Sociedad Mexicana de Instrumentación, A. C. Journal of the Mexican Society of Instrumentation To/From Communications Network Matching Unit Router Processor Fig. 1. Basic Processing Unit Through our research we have defined a number of critical issues that should be addressed when implementing loosely coupled MIMD machines. These are: communications network, thread granularity, and message matching unit architecture. A brief description of each of these issues is provided below. • Communications Network. Any two PUs within a system are potentially interconnected. Therefore, the communications network must be flexible enough to provide any possible communication path, and must minimize communications distance between PUs to minimize communications latency. To reduce bottlenecks, the network must provide multiple paths to enable PUs to communicate with each other in a parallel and asynchronous manner. • Thread Granularity. MIMD architectures are utilized to exploit parallelism inherent within many processes. This is accomplished by decomposing processes into subprocesses that can execute concurrently. However, a point may be reached where the overhead (the cost of processing more messages through the processing ring) of further decomposition eliminates any gain obtained from the increased parallelism [7]. It is therefore necessary to tailor the granularity of decomposition such that processes are decomposed into sequential threads that are most efficiently executed by a von Neumann processor. • Matching Unit Architecture. One of the more difficult issues in MIMD computing is task synchronization. The lack of an efficient message matching unit may severely restrict the architectural approach used in the design of a machine. The architecture is affected in two ways: First, the speed of a match unit that is incorporated into a processing ring is quite often the critical component which limits the speed at which the processing ring can operate. Second, the number of messages permitted per sequential thread can limit the architectural freedom that a designer has in determining the granularity of parallelism within the machine. This second issue has significant impact in the overall throughput of a machine. Without the option of utilizing sequential threads with a large amount of inputs (greater than 2), sequential threads must be decomposed into processes that are individually executed and synchronized via messages as is done in most dataflow machines. The burden of this process will be evident in the cost and performance of the machine. LOOSELY COUPLED MACHINE ORGANIZATION The PU, as shown in Fig. 2, is the basic computational node in the Loosely Coupled Machine (LCM). Each of the PUs makes up a processing ring that is similar to the processing ring discussed above. The main components of this ring are: a high performance processor, a match processing unit (MPU), and a router [8].