human: Given a node-centered hypergraph: <hypergraph>, where nodes represent authors and hyperedges represent groups of authors who co-authored the same paper.

Details of the hypergraph:
Center node: "Towards verifying VHDL descriptions of processors"
  Abstract: We present a system for the formal verification of processors which combines a computer algebra simplification tool with an object-oriented approach. It has been successfully used for verifying the DP32 processor described in the VHDL Cookbook. A general VHDL description style for proving processors is derived from this case study.

Connected through hyperedge HE-1 (induced by source paper "An Object-Oriented Framework for the Formal Verification of Processors"):
  with members:
    (none)

Question: Please tell me which research area the center author belongs to. The 4 classes are: Computer science, Mathematics, Engineering, Economics, Psychology, Business. Directly output the class name.

gpt: Computer science