human: Given a node-centered hypergraph: <hypergraph>, where nodes represent papers and hyperedges represent sets of papers co-cited by a source paper.

Details of the hypergraph:
Center node: "co design of deep neural nets and neural net accelerators for embedded vision applications"
  Abstract: Deep Learning is arguably the most rapidly evolving research area in recent years. As a result it is not surprising that the design of state-of-the-art deep neural net models proceeds without much consideration of the latest hardware targets, and the design of neural net accelerators proceeds without much consideration of the characteristics of the latest deep neural net models. Nevertheless, in this paper we show that there are significant improvements available if deep neural net models and neural net accelerators are co-designed.

Connected through hyperedge HE-1 (induced by source paper "synetgy algorithm hardware co design for convnet accelerators on embedded fpgas"):
  with members:
    - "mobilenetv2 inverted residuals and linear bottlenecks"
    - "squeezesegv2 improved model structure and unsupervised domain adaptation for road object segmentation from a lidar point cloud"
    - "bridging the accuracy gap for 2 bit quantized neural networks qnn"
    - "shufflenet v2 practical guidelines for efficient cnn architecture design"
    - "shift based primitives for efficient convolutional neural networks"
    - "finn r an end to end deep learning framework for fast exploration of quantized neural networks"
    - "pact parameterized clipping activation for quantized neural networks"
    - "squeezenext hardware aware neural network design"

Connected through hyperedge HE-2 (induced by source paper "deep learning in the automotive industry recent advances and application examples"):
  with members:
    - "bdd100k a diverse driving video database with scalable annotation tooling"
    - "assessment of deep convolutional neural networks for road surface classification"
    - "an anti fraud system for car insurance claim based on visual evidence"
    - "scalable and accurate deep learning for electronic health records"
    - "deeproad gan based metamorphic autonomous driving system testing"
    - "squeezenext hardware aware neural network design"
    - "an analysis of deep neural network models for practical applications"
    - "deepxplore automated whitebox testing of deep learning systems"

Connected through hyperedge HE-3 (induced by source paper "gemmini an agile systolic array generator enabling systematic evaluations of deep learning architectures"):
  with members:
    - "integrating nvidia deep learning accelerator nvdla with risc v soc on firesim"
    - "fpsa a full system stack solution for reconfigurable reram based nn accelerator architecture"
    - "dnn dataflow choice is overrated"
    - "vta an open hardware software stack for deep learning"
    - "eyeriss v2 a flexible accelerator for emerging deep neural networks on mobile devices"
    - "deep learning inference in facebook data centers characterization performance optimizations and hardware implications"
    - "in datacenter performance analysis of a tensor processing unit"
    - "deep gradient compression reducing the communication bandwidth for distributed training"

Connected through hyperedge HE-4 (induced by source paper "nais neural architecture and implementation search and its applications in autonomous driving"):
  with members:
    - "skynet a champion model for dac sdc on low power object detection"
    - "frustrated with replicating claims of a shared model a solution"
    - "yolov3 an incremental improvement"
    - "proxylessnas direct neural architecture search on target task and hardware"
    - "hardware aware machine learning modeling and optimization"
    - "searching toward pareto optimal device aware neural architectures"
    - "learning transferable architectures for scalable image recognition"
    - "squeezenet alexnet level accuracy with 50x fewer parameters and 0 5mb model size"

Question: Please tell me which class the center node belongs to. The 40 classes are: cs.NA(Numerical Analysis), cs.MM(Multimedia), cs.LO(Logic in Computer Science), cs.CY(Computers and Society), cs.CR(Cryptography and Security), cs.DC(Distributed, Parallel, and Cluster Computing), cs.HC(Human-Computer Interaction), cs.CE(Computational Engineering, Finance, and Science), cs.NI(Networking and Internet Architecture), cs.CC(Computational Complexity), cs.AI(Artificial Intelligence), cs.MA(Multiagent Systems), cs.GL(General Literature), cs.NE(Neural and Evolutionary Computing), cs.SC(Symbolic Computation), cs.AR(Hardware Architecture), cs.CV(Computer Vision and Pattern Recognition), cs.GR(Graphics), cs.ET(Emerging Technologies), cs.SY(Systems and Control), cs.CG(Computational Geometry), cs.OH(Other Computer Science), cs.PL(Programming Languages), cs.SE(Software Engineering), cs.LG(Machine Learning), cs.SD(Sound), cs.SI(Social and Information Networks), cs.RO(Robotics), cs.IT(Information Theory), cs.PF(Performance), cs.CL(Computation and Language), cs.IR(Information Retrieval), cs.MS(Mathematical Software), cs.FL(Formal Languages and Automata Theory), cs.DS(Data Structures and Algorithms), cs.OS(Operating Systems), cs.GT(Computer Science and Game Theory), cs.DB(Databases), cs.DL(Digital Libraries), cs.DM(Discrete Mathematics). Directly output the class name.

gpt: cs.DC(Distributed, Parallel, and Cluster Computing)