human: Given a node-centered hypergraph: <hypergraph>, where nodes represent papers and hyperedges represent sets of papers co-cited by a source paper.

Details of the hypergraph:
Center node: "xnorbin a 95 top s w hardware accelerator for binary convolutional neural networks"
  Abstract: Deploying state-of-the-art CNNs requires power-hungry processors and off-chip memory. This precludes the implementation of CNNs in low-power embedded systems. Recent research shows CNNs sustain extreme quantization, binarizing their weights and intermediate feature maps, thereby saving 8-32\x memory and collapsing energy-intensive sum-of-products into XNOR-and-popcount operations. #R##N#We present XNORBIN, an accelerator for binary CNNs with computation tightly coupled to memory for aggressive data reuse. Implemented in UMC 65nm technology XNORBIN achieves an energy efficiency of 95 TOp/s/W and an area efficiency of 2.0 TOp/s/MGE at 0.8 V.

Connected through hyperedge HE-1 (induced by source paper "tentaclenet a pseudo ensemble template for accurate binary convolutional neural networks"):
  with members:
    - "pulp nn accelerating quantized neural networks on parallel ultra low power risc v processors"
    - "coopnet cooperative convolutional neural network for low power mcus"
    - "binary ensemble neural network more bits per network or more networks per bit"
    - "efficient processing of deep neural networks a tutorial and survey"
    - "finn a framework for fast scalable binarized neural network inference"
    - "binarized neural networks training deep neural networks with weights and activations constrained to 1 or 1"
    - "eie efficient inference engine on compressed deep neural network"
    - "xnor net imagenet classification using binary convolutional neural networks"

Connected through hyperedge HE-2 (induced by source paper "pbgen partial binarization of deconvolution based generators for edge intelligence"):
  with members:
    - "efficient hybrid network architectures for extremely quantized neural networks enabling intelligence at the edge"
    - "pca driven hybrid network design for enabling intelligence at the edge"
    - "xnor neural engine a hardware accelerator ip for 21 6 fj op binary neural network inference"
    - "design flow of accelerating hybrid extremely low bit width neural network in embedded fpga"
    - "lq nets learned quantization for highly accurate and compact deep neural networks"
    - "on the universal approximability and complexity bounds of quantized relu neural networks"
    - "hybrid binary networks optimizing for accuracy efficiency and memory"
    - "binary generative adversarial networks for image retrieval"

Connected through hyperedge HE-3 (induced by source paper "hyperdrive a multi chip systolically scalable binary weight cnn inference engine"):
  with members:
    - "mixed precision training of convolutional neural networks using integer operations"
    - "mobilenetv2 inverted residuals and linear bottlenecks"
    - "yolov3 an incremental improvement"
    - "extended bit plane compression for convolutional neural network accelerators"
    - "shufflenet an extremely efficient convolutional neural network for mobile devices"
    - "in datacenter performance analysis of a tensor processing unit"
    - "cas cnn a deep convolutional neural network for image compression artifact suppression"
    - "an iot endpoint system on chip for secure and energy efficient near sensor analytics"

Connected through hyperedge HE-4 (induced by source paper "xnor neural engine a hardware accelerator ip for 21 6 fj op binary neural network inference"):
  with members:
    - "cmsis nn efficient neural network kernels for arm cortex m cpus"
    - "minimum energy quantized neural networks"
    - "an iot endpoint system on chip for secure and energy efficient near sensor analytics"
    - "towards accurate binary convolutional neural network"
    - "incremental network quantization towards lossless cnns with low precision weights"
    - "squeezenet alexnet level accuracy with 50x fewer parameters and 0 5mb model size"
    - "nullhop a flexible convolutional neural network accelerator based on sparse representations of feature maps"
    - "design automation for binarized neural networks a quantum leap opportunity"

Connected through hyperedge HE-5 (induced by source paper "nullanet training deep neural networks for reduced memory access inference"):
  with members:
    - "model compression via distillation and quantization"
    - "loss aware weight quantization of deep networks"
    - "deploying customized data representation and approximate computing in machine learning applications"
    - "rebnet residual binarized neural network"
    - "finn a framework for fast scalable binarized neural network inference"
    - "flexpoint an adaptive numerical format for efficient training of deep neural networks"
    - "dorefa net training low bitwidth convolutional neural networks with low bitwidth gradients"
    - "ternary weight networks"

Connected through hyperedge HE-6 (induced by source paper "towards fast and energy efficient binarized neural network inference on fpga"):
  with members:
    - "binary ensemble neural network more bits per network or more networks per bit"
    - "xnor neural engine a hardware accelerator ip for 21 6 fj op binary neural network inference"
    - "ucnn exploiting computational reuse in deep neural networks via weight repetition"
    - "in datacenter performance analysis of a tensor processing unit"
    - "incremental network quantization towards lossless cnns with low precision weights"
    - "finn a framework for fast scalable binarized neural network inference"
    - "ese efficient speech recognition engine with sparse lstm on fpga"
    - "dorefa net training low bitwidth convolutional neural networks with low bitwidth gradients"

Question: Please tell me which class the center node belongs to. The 40 classes are: cs.NA(Numerical Analysis), cs.MM(Multimedia), cs.LO(Logic in Computer Science), cs.CY(Computers and Society), cs.CR(Cryptography and Security), cs.DC(Distributed, Parallel, and Cluster Computing), cs.HC(Human-Computer Interaction), cs.CE(Computational Engineering, Finance, and Science), cs.NI(Networking and Internet Architecture), cs.CC(Computational Complexity), cs.AI(Artificial Intelligence), cs.MA(Multiagent Systems), cs.GL(General Literature), cs.NE(Neural and Evolutionary Computing), cs.SC(Symbolic Computation), cs.AR(Hardware Architecture), cs.CV(Computer Vision and Pattern Recognition), cs.GR(Graphics), cs.ET(Emerging Technologies), cs.SY(Systems and Control), cs.CG(Computational Geometry), cs.OH(Other Computer Science), cs.PL(Programming Languages), cs.SE(Software Engineering), cs.LG(Machine Learning), cs.SD(Sound), cs.SI(Social and Information Networks), cs.RO(Robotics), cs.IT(Information Theory), cs.PF(Performance), cs.CL(Computation and Language), cs.IR(Information Retrieval), cs.MS(Mathematical Software), cs.FL(Formal Languages and Automata Theory), cs.DS(Data Structures and Algorithms), cs.OS(Operating Systems), cs.GT(Computer Science and Game Theory), cs.DB(Databases), cs.DL(Digital Libraries), cs.DM(Discrete Mathematics). Directly output the class name.

gpt: cs.CV(Computer Vision and Pattern Recognition)