human: Given a node-centered hypergraph: <hypergraph>, where nodes represent papers and hyperedges represent sets of papers co-cited by a source paper.

Details of the hypergraph:
Center node: "on the accuracy and usefulness of analytic energy models for contemporary multicore processors"
  Abstract: This paper presents refinements to the execution-cache-memory performance model and a previously published power model for multicore processors. The combination of both enables a very accurate prediction of performance and energy consumption of contemporary multicore processors as a function of relevant parameters such as number of active cores as well as core and Uncore frequencies. Model validation is performed on Intel Sandy Bridge-EP, Broadwell-EP, and AMD Epyc processors. Production-related variations in chip quality are demonstrated through a statistical analysis of the fit parameters obtained on one hundred Broadwell-EP CPUs of the same model. Insights from the models are used to explain the performance- and energy-related behavior of the processors for scalable as well as saturating (i.e., memory-bound) codes. In the process we demonstrate the models’ capability to identify optimal operating points with respect to highest performance, lowest energy-to-solution, and lowest energy-delay product and identify a set of best practices for energy-efficient execution.

Connected through hyperedge HE-1 (induced by source paper "collecting and presenting reproducible intranode stencil performance inspect"):
  with members:
    - "uops info characterizing latency throughput and port usage of instructions on intel microarchitectures"
    - "automated instruction stream throughput prediction for intel and amd microarchitectures"
    - "an analysis of core and chip level architectural features in four generations of intel server processors"
    - "kerncraft a tool for analytic performance modeling of loop kernels"
    - "quantifying performance bottlenecks of stencil computations using the execution cache memory model"
    - "multicore optimized wavefront diamond blocking for optimizing stencil updates"
    - "likwid a lightweight performance oriented tool suite for x86 multicore environments"
    - "likwid a lightweight performance oriented tool suite for x86 multicore environments"

Connected through hyperedge HE-2 (induced by source paper "analytic performance modeling and analysis of detailed neuron simulations"):
  with members:
    - "automated instruction stream throughput prediction for intel and amd microarchitectures"
    - "an analysis of core and chip level architectural features in four generations of intel server processors"
    - "kerncraft a tool for analytic performance modeling of loop kernels"
    - "quantifying performance bottlenecks of stencil computations using the execution cache memory model"
    - "likwid a lightweight performance oriented tool suite for x86 multicore environments"
    - "likwid a lightweight performance oriented tool suite for x86 multicore environments"
    - "introducing a performance model for bandwidth limited loop kernels"

Connected through hyperedge HE-3 (induced by source paper "bridging the architecture gap abstracting performance relevant properties of modern server processors"):
  with members:
    - "analytic performance modeling and analysis of detailed neuron simulations"
    - "kerncraft a tool for analytic performance modeling of loop kernels"
    - "an ecm based energy efficiency optimization approach for bandwidth limited streaming kernels on recent intel xeon processors"
    - "quantifying performance bottlenecks of stencil computations using the execution cache memory model"
    - "chip level and multi node analysis of energy optimized lattice boltzmann cfd simulations"

Connected through hyperedge HE-4 (induced by source paper "delay propagation and overlapping mechanisms on clusters a case study of idle periods based on workload communication and delay granularity"):
  with members:
    - "an analysis of core and chip level architectural features in four generations of intel server processors"
    - "idle period propagation in message passing applications"
    - "quantifying performance bottlenecks of stencil computations using the execution cache memory model"
    - "chip level and multi node analysis of energy optimized lattice boltzmann cfd simulations"

Connected through hyperedge HE-5 (induced by source paper "propagation and decay of injected one off delays on clusters a case study"):
  with members:
    - "an analysis of core and chip level architectural features in four generations of intel server processors"
    - "quantifying performance bottlenecks of stencil computations using the execution cache memory model"
    - "chip level and multi node analysis of energy optimized lattice boltzmann cfd simulations"

Question: Please tell me which class the center node belongs to. The 40 classes are: cs.NA(Numerical Analysis), cs.MM(Multimedia), cs.LO(Logic in Computer Science), cs.CY(Computers and Society), cs.CR(Cryptography and Security), cs.DC(Distributed, Parallel, and Cluster Computing), cs.HC(Human-Computer Interaction), cs.CE(Computational Engineering, Finance, and Science), cs.NI(Networking and Internet Architecture), cs.CC(Computational Complexity), cs.AI(Artificial Intelligence), cs.MA(Multiagent Systems), cs.GL(General Literature), cs.NE(Neural and Evolutionary Computing), cs.SC(Symbolic Computation), cs.AR(Hardware Architecture), cs.CV(Computer Vision and Pattern Recognition), cs.GR(Graphics), cs.ET(Emerging Technologies), cs.SY(Systems and Control), cs.CG(Computational Geometry), cs.OH(Other Computer Science), cs.PL(Programming Languages), cs.SE(Software Engineering), cs.LG(Machine Learning), cs.SD(Sound), cs.SI(Social and Information Networks), cs.RO(Robotics), cs.IT(Information Theory), cs.PF(Performance), cs.CL(Computation and Language), cs.IR(Information Retrieval), cs.MS(Mathematical Software), cs.FL(Formal Languages and Automata Theory), cs.DS(Data Structures and Algorithms), cs.OS(Operating Systems), cs.GT(Computer Science and Game Theory), cs.DB(Databases), cs.DL(Digital Libraries), cs.DM(Discrete Mathematics). Directly output the class name.

gpt: cs.PF(Performance)