human: Given a node-centered hypergraph: <hypergraph>, where nodes represent papers and hyperedges represent sets of papers co-cited by a source paper.

Details of the hypergraph:
Center node: "glow graph lowering compiler techniques for neural networks"
  Abstract: This paper presents the design of Glow, a machine learning compiler for heterogeneous hardware. It is a pragmatic approach to compilation that enables the generation of highly optimized code for multiple targets. Glow lowers the traditional neural network dataflow graph into a two-phase strongly-typed intermediate representation. The high-level intermediate representation allows the optimizer to perform domain-specific optimizations. The lower-level instruction-based address-only intermediate representation allows the compiler to perform memory-related optimizations, such as instruction scheduling, static memory allocation and copy elimination. At the lowest level, the optimizer performs machine-specific code generation to take advantage of specialized hardware features. Glow features a lowering phase which enables the compiler to support a high number of input operators as well as a large number of hardware targets by eliminating the need to implement all operators on all targets. The lowering phase is designed to reduce the input space and allow new hardware backends to focus on a small number of linear algebra primitives.

Connected through hyperedge HE-1 (induced by source paper "the deep learning compiler a comprehensive survey"):
  with members:
    - "shredder learning noise distributions to protect inference privacy"
    - "fusionstitching boosting execution efficiency of memory intensive computations for dl workloads"
    - "stripe tensor compilation via the nested polyhedral model"
    - "tensorflow eager a multi stage python embedded dsl for machine learning"
    - "privacy for rescue a new testimony why privacy is vulnerable in deep models"
    - "dissecting the graphcore ipu architecture via microbenchmarking"
    - "benchmarking tpu gpu and cpu platforms for deep learning"
    - "a comprehensive survey on graph neural networks"

Connected through hyperedge HE-2 (induced by source paper "ordering chaos memory aware scheduling of irregularly wired neural networks for edge devices"):
  with members:
    - "exploring randomly wired neural networks for image recognition"
    - "automatic model selection for neural networks"
    - "swiftnet using graph propagation as meta knowledge to search highly representative neural architectures"
    - "discovering neural wirings"
    - "pytorch an imperative style high performance deep learning library"
    - "learned step size quantization"
    - "dla compiler and fpga overlay for neural network inference acceleration"
    - "amc automl for model compression and acceleration on mobile devices"

Connected through hyperedge HE-3 (induced by source paper "compiling neural networks for a computational memory accelerator"):
  with members:
    - "puma a programmable ultra efficient memristor based accelerator for machine learning inference"
    - "stripe tensor compilation via the nested polyhedral model"
    - "a fast analytical model of fully associative caches"
    - "automated derivation of parametric data movement lower bounds for affine programs"
    - "quantizing deep convolutional networks for efficient inference a whitepaper"
    - "rxnn a framework for evaluating deep neural networks on resistive crossbars"
    - "a hardware software blueprint for flexible deep learning specialization"
    - "tiramisu a polyhedral compiler for expressing fast and portable code"

Connected through hyperedge HE-4 (induced by source paper "a c code generator for fast inference and simple deployment of convolutional neural networks on resource constrained systems"):
  with members:
    - "mobilenetv2 inverted residuals and linear bottlenecks"
    - "cmsis nn efficient neural network kernels for arm cortex m cpus"
    - "yolo9000 better faster stronger"
    - "imagenet large scale visual recognition challenge"
    - "caffe convolutional architecture for fast feature embedding"
    - "rich feature hierarchies for accurate object detection and semantic segmentation"

Connected through hyperedge HE-5 (induced by source paper "mlir a compiler infrastructure for the end of moore s law"):
  with members:
    - "stripe tensor compilation via the nested polyhedral model"
    - "tvm an automated end to end optimizing compiler for deep learning"
    - "tiramisu a polyhedral compiler for expressing fast and portable code"

Connected through hyperedge HE-6 (induced by source paper "high performance deep learning via a single building block"):
  with members:
    - "stripe tensor compilation via the nested polyhedral model"
    - "large batch training for lstm and beyond"
    - "nvidia tensor core programmability performance precision"
    - "high accuracy low precision training"
    - "anatomy of high performance deep learning convolutions on simd architectures"
    - "tvm an automated end to end optimizing compiler for deep learning"
    - "bert pre training of deep bidirectional transformers for language understanding"
    - "tensor comprehensions framework agnostic high performance machine learning abstractions"

Connected through hyperedge HE-7 (induced by source paper "relay a high level ir for deep learning"):
  with members:
    - "quantizing deep convolutional networks for efficient inference a whitepaper"
    - "don t unroll adjoint differentiating ssa form programs"
    - "darts differentiable architecture search"
    - "neural ordinary differential equations"
    - "demystifying differentiable programming shift reset the penultimate backpropagator"
    - "tangent automatic differentiation using source code transformation in python"
    - "in datacenter performance analysis of a tensor processing unit"
    - "deep learning with dynamic computation graphs"

Connected through hyperedge HE-8 (induced by source paper "miopen an open source library for deep learning primitives"):
  with members:
    - "reducing uncertainty in undersampled mri reconstruction with active acquisition"
    - "tvm end to end optimization stack for deep learning"
    - "intel ngraph an intermediate representation compiler and executor for deep learning"
    - "tensor comprehensions framework agnostic high performance machine learning abstractions"
    - "simple recurrent units for highly parallelizable recurrence"
    - "imagenet training in minutes"
    - "mobilenets efficient convolutional neural networks for mobile vision applications"
    - "xception deep learning with depthwise separable convolutions"

Question: Please tell me which class the center node belongs to. The 40 classes are: cs.NA(Numerical Analysis), cs.MM(Multimedia), cs.LO(Logic in Computer Science), cs.CY(Computers and Society), cs.CR(Cryptography and Security), cs.DC(Distributed, Parallel, and Cluster Computing), cs.HC(Human-Computer Interaction), cs.CE(Computational Engineering, Finance, and Science), cs.NI(Networking and Internet Architecture), cs.CC(Computational Complexity), cs.AI(Artificial Intelligence), cs.MA(Multiagent Systems), cs.GL(General Literature), cs.NE(Neural and Evolutionary Computing), cs.SC(Symbolic Computation), cs.AR(Hardware Architecture), cs.CV(Computer Vision and Pattern Recognition), cs.GR(Graphics), cs.ET(Emerging Technologies), cs.SY(Systems and Control), cs.CG(Computational Geometry), cs.OH(Other Computer Science), cs.PL(Programming Languages), cs.SE(Software Engineering), cs.LG(Machine Learning), cs.SD(Sound), cs.SI(Social and Information Networks), cs.RO(Robotics), cs.IT(Information Theory), cs.PF(Performance), cs.CL(Computation and Language), cs.IR(Information Retrieval), cs.MS(Mathematical Software), cs.FL(Formal Languages and Automata Theory), cs.DS(Data Structures and Algorithms), cs.OS(Operating Systems), cs.GT(Computer Science and Game Theory), cs.DB(Databases), cs.DL(Digital Libraries), cs.DM(Discrete Mathematics). Directly output the class name.

gpt: cs.PL(Programming Languages)