human: Given a node-centered hypergraph: <hypergraph>, where nodes represent papers and hyperedges represent sets of papers co-cited by a source paper.

Details of the hypergraph:
Center node: "lazyfp leaking fpu register state using microarchitectural side channels"
  Abstract: Modern processors utilize an increasingly large register set to facilitate efficient floating point and SIMD computation. This large register set is a burden for operating systems, as its content needs to be saved and restored when the operating system context switches between tasks. As an optimization, the operating system can defer the context switch of the FPU and SIMD register set until the first instruction is executed that needs access to these registers. Meanwhile, the old content is left in place with the hope that the current task might not use these registers at all. This optimization is commonly called lazy FPU context switching. To make it possible, a processor offers the ability to toggle the availability of instructions utilizing floating point and SIMD registers. If the instructions are turned off, any attempt of executing them will generate a fault. #R##N#In this paper, we present an attack that exploits lazy FPU context switching and allows an adversary to recover the FPU and SIMD register set of arbitrary processes or VMs. The attack works on processors that transiently execute FPU or SIMD instructions that follow an instruction generating the fault indicating the first use of FPU or SIMD instructions. On operating systems using lazy FPU context switching, the FPU and SIMD register content of other processes or virtual machines can then be reconstructed via cache side effects. #R##N#With SIMD registers not only being used for cryptographic computation, but also increasingly for simple operations, such as copying memory, we argue that lazy FPU context switching is a dangerous optimization that needs to be turned off in all operating systems, if there is a chance that they run on affected processors.

Connected through hyperedge HE-1 (induced by source paper "store to leak forwarding leaking data on meltdown resistant cpus"):
  with members:
    - "practical enclave malware with intel sgx"
    - "smotherspectre exploiting speculative execution through port contention"
    - "page cache attacks"
    - "spoiler speculative load hazards boost rowhammer and cache attacks"
    - "speculative buffer overflows attacks and defenses"
    - "netspectre read arbitrary memory over network"
    - "meltdownprime and spectreprime automatically synthesized attacks exploiting invalidation based coherence protocols"
    - "spectre attacks exploiting speculative execution"

Connected through hyperedge HE-2 (induced by source paper "zombieload cross privilege boundary data sampling"):
  with members:
    - "smotherspectre exploiting speculative execution through port contention"
    - "fallout reading kernel writes from user space"
    - "store to leak forwarding leaking data on meltdown resistant cpus"
    - "spoiler speculative load hazards boost rowhammer and cache attacks"
    - "speculative buffer overflows attacks and defenses"
    - "netspectre read arbitrary memory over network"
    - "spectector principled detection of speculative information flows"
    - "spectre attacks exploiting speculative execution"

Connected through hyperedge HE-3 (induced by source paper "speccfi mitigating spectre attacks using cfi informed speculation"):
  with members:
    - "context leakage free transient execution"
    - "smotherspectre exploiting speculative execution through port contention"
    - "store to leak forwarding leaking data on meltdown resistant cpus"
    - "zombieload cross privilege boundary data sampling"
    - "speculative buffer overflows attacks and defenses"
    - "netspectre read arbitrary memory over network"
    - "safespec banishing the spectre of a meltdown with leakage free speculation"
    - "spectre attacks exploiting speculative execution"

Connected through hyperedge HE-4 (induced by source paper "fallout reading kernel writes from user space"):
  with members:
    - "spectre is here to stay an analysis of side channels and speculative execution"
    - "spoiler speculative load hazards boost rowhammer and cache attacks"
    - "speculative buffer overflows attacks and defenses"
    - "netspectre read arbitrary memory over network"
    - "spectre attacks exploiting speculative execution"
    - "spectre returns speculation attacks using the return stack buffer"
    - "ret2spec speculative execution using return stack buffers"
    - "a systematic evaluation of transient execution attacks and defenses"

Connected through hyperedge HE-5 (induced by source paper "dr sgx automated and adjustable side channel protection for sgx using data location randomization"):
  with members:
    - "sgxpectre stealing intel secrets from sgx enclaves via speculative execution"
    - "hybcache hybrid side channel resilient caches for trusted execution environments"
    - "spectre attacks exploiting speculative execution"
    - "cachezoom how sgx amplifies the power of cache attacks"
    - "software grand exposure sgx cache attacks are practical"
    - "malware guard extension using sgx to conceal cache attacks"
    - "stacco differentially analyzing side channel traces for detecting ssl tls vulnerabilities in secure enclaves"
    - "hardidx practical and secure index with sgx"

Connected through hyperedge HE-6 (induced by source paper "spoiler speculative load hazards boost rowhammer and cache attacks"):
  with members:
    - "sgxpectre stealing intel secrets from sgx enclaves via speculative execution"
    - "ret2spec speculative execution using return stack buffers"
    - "a systematic evaluation of transient execution attacks and defenses"
    - "theory and practice of finding eviction sets"
    - "another flip in the wall of rowhammer defenses"
    - "cachezoom how sgx amplifies the power of cache attacks"
    - "armageddon cache attacks on mobile devices"
    - "rowhammer js a remote software induced fault attack in javascript"

Connected through hyperedge HE-7 (induced by source paper "speechminer a framework for investigating and measuring speculative execution vulnerabilities"):
  with members:
    - "fallout reading kernel writes from user space"
    - "zombieload cross privilege boundary data sampling"
    - "speculative buffer overflows attacks and defenses"
    - "netspectre read arbitrary memory over network"
    - "spectre attacks exploiting speculative execution"
    - "spectre returns speculation attacks using the return stack buffer"
    - "ret2spec speculative execution using return stack buffers"
    - "a systematic evaluation of transient execution attacks and defenses"

Connected through hyperedge HE-8 (induced by source paper "a systematic evaluation of transient execution attacks and defenses"):
  with members:
    - "smotherspectre exploiting speculative execution through port contention"
    - "spoiler speculative load hazards boost rowhammer and cache attacks"
    - "speculative buffer overflows attacks and defenses"
    - "netspectre read arbitrary memory over network"
    - "safespec banishing the spectre of a meltdown with leakage free speculation"
    - "spectector principled detection of speculative information flows"
    - "spectre attacks exploiting speculative execution"
    - "you shall not bypass employing data dependencies to prevent bounds check bypass"

Question: Please tell me which class the center node belongs to. The 40 classes are: cs.NA(Numerical Analysis), cs.MM(Multimedia), cs.LO(Logic in Computer Science), cs.CY(Computers and Society), cs.CR(Cryptography and Security), cs.DC(Distributed, Parallel, and Cluster Computing), cs.HC(Human-Computer Interaction), cs.CE(Computational Engineering, Finance, and Science), cs.NI(Networking and Internet Architecture), cs.CC(Computational Complexity), cs.AI(Artificial Intelligence), cs.MA(Multiagent Systems), cs.GL(General Literature), cs.NE(Neural and Evolutionary Computing), cs.SC(Symbolic Computation), cs.AR(Hardware Architecture), cs.CV(Computer Vision and Pattern Recognition), cs.GR(Graphics), cs.ET(Emerging Technologies), cs.SY(Systems and Control), cs.CG(Computational Geometry), cs.OH(Other Computer Science), cs.PL(Programming Languages), cs.SE(Software Engineering), cs.LG(Machine Learning), cs.SD(Sound), cs.SI(Social and Information Networks), cs.RO(Robotics), cs.IT(Information Theory), cs.PF(Performance), cs.CL(Computation and Language), cs.IR(Information Retrieval), cs.MS(Mathematical Software), cs.FL(Formal Languages and Automata Theory), cs.DS(Data Structures and Algorithms), cs.OS(Operating Systems), cs.GT(Computer Science and Game Theory), cs.DB(Databases), cs.DL(Digital Libraries), cs.DM(Discrete Mathematics). Directly output the class name.

gpt: cs.OS(Operating Systems)