human: Given a node-centered hypergraph: <hypergraph>, where nodes represent papers and hyperedges represent sets of papers co-cited by a source paper.

Details of the hypergraph:
Center node: "compiling deep learning models for custom hardware accelerators"
  Abstract: Convolutional neural networks (CNNs) are the core of most state-of-the-art deep learning algorithms specialized for object detection and classification. CNNs are both computationally complex and embarrassingly parallel. Two properties that leave room for potential software and hardware optimizations for embedded systems. Given a programmable hardware accelerator with a CNN oriented custom instructions set, the compiler's task is to exploit the hardware's full potential, while abiding with the hardware constraints and maintaining generality to run different CNN models with varying workload properties. Snowflake is an efficient and scalable hardware accelerator implemented on programmable logic devices. It implements a control pipeline for a custom instruction set. The goal of this paper is to present Snowflake's compiler that generates machine level instructions from Torch7 model description files. The main software design points explored in this work are: model structure parsing, CNN workload breakdown, loop rearrangement for memory bandwidth optimizations and memory access balancing. The performance achieved by compiler generated instructions matches against hand optimized code for convolution layers. Generated instructions also efficiently execute AlexNet and ResNet18 inference on Snowflake. Snowflake with $256$ processing units was synthesized on Xilinx's Zynq XC7Z045 FPGA. At $250$ MHz, AlexNet achieved in $93.6$ frames/s and $1.2$ GB/s of off-chip memory bandwidth, and $21.4$ frames/s and $2.2$ GB/s for ResNet18. Total on-chip power is $5$ W.

Connected through hyperedge HE-1 (induced by source paper "vargnet variable group convolutional neural network for efficient embedded computing"):
  with members:
    - "single path nas designing hardware efficient convnets in less than 4 hours"
    - "dnnvm end to end compiler leveraging heterogeneous optimizations on fpga based cnn accelerators"
    - "panoptic feature pyramid networks"
    - "dla compiler and fpga overlay for neural network inference acceleration"
    - "igcv3 interleaved low rank group convolutions for efficient deep neural networks"
    - "bisenet bilateral segmentation network for real time semantic segmentation"
    - "mobilenetv2 inverted residuals and linear bottlenecks"
    - "tvm end to end optimization stack for deep learning"

Connected through hyperedge HE-2 (induced by source paper "dnnvm end to end compiler leveraging heterogeneous optimizations on fpga based cnn accelerators"):
  with members:
    - "dla compiler and fpga overlay for neural network inference acceleration"
    - "tvm end to end optimization stack for deep learning"
    - "yolov3 an incremental improvement"
    - "vta an open hardware software stack for deep learning"
    - "toolflows for mapping convolutional neural networks on fpgas a survey and future directions"
    - "intel ngraph an intermediate representation compiler and executor for deep learning"
    - "towards efficient convolutional neural network for domain specific applications on fpga"
    - "tensor comprehensions framework agnostic high performance machine learning abstractions"

Connected through hyperedge HE-3 (induced by source paper "toolflows for mapping convolutional neural networks on fpgas a survey and future directions"):
  with members:
    - "approximate fpga based lstms under computation time constraints"
    - "in datacenter performance analysis of a tensor processing unit"
    - "toward low flying autonomous mav trail navigation using deep neural networks for environmental awareness"
    - "fpgaconvnet a toolflow for mapping diverse convolutional neural networks on embedded fpgas"
    - "show and tell lessons learned from the 2015 mscoco image captioning challenge"
    - "fpga based cnn inference accelerator synthesized from multi threaded c software"
    - "scnn an accelerator for compressed sparse convolutional neural networks"
    - "learning to fly by crashing"

Connected through hyperedge HE-4 (induced by source paper "sparsity in deep neural networks an empirical investigation with tensorquant"):
  with members:
    - "shufflenet an extremely efficient convolutional neural network for mobile devices"
    - "deep gradient compression reducing the communication bandwidth for distributed training"
    - "sparsenn an energy efficient neural network accelerator exploiting input and output sparsity"
    - "gradient sparsification for communication efficient distributed optimization"
    - "using gpi 2 for distributed memory paralleliziation of the caffe toolbox to speed up deep neural network training"
    - "mobilenets efficient convolutional neural networks for mobile vision applications"
    - "sparse communication for distributed gradient descent"
    - "meprop sparsified back propagation for accelerated deep learning with reduced overfitting"

Question: Please tell me which class the center node belongs to. The 40 classes are: cs.NA(Numerical Analysis), cs.MM(Multimedia), cs.LO(Logic in Computer Science), cs.CY(Computers and Society), cs.CR(Cryptography and Security), cs.DC(Distributed, Parallel, and Cluster Computing), cs.HC(Human-Computer Interaction), cs.CE(Computational Engineering, Finance, and Science), cs.NI(Networking and Internet Architecture), cs.CC(Computational Complexity), cs.AI(Artificial Intelligence), cs.MA(Multiagent Systems), cs.GL(General Literature), cs.NE(Neural and Evolutionary Computing), cs.SC(Symbolic Computation), cs.AR(Hardware Architecture), cs.CV(Computer Vision and Pattern Recognition), cs.GR(Graphics), cs.ET(Emerging Technologies), cs.SY(Systems and Control), cs.CG(Computational Geometry), cs.OH(Other Computer Science), cs.PL(Programming Languages), cs.SE(Software Engineering), cs.LG(Machine Learning), cs.SD(Sound), cs.SI(Social and Information Networks), cs.RO(Robotics), cs.IT(Information Theory), cs.PF(Performance), cs.CL(Computation and Language), cs.IR(Information Retrieval), cs.MS(Mathematical Software), cs.FL(Formal Languages and Automata Theory), cs.DS(Data Structures and Algorithms), cs.OS(Operating Systems), cs.GT(Computer Science and Game Theory), cs.DB(Databases), cs.DL(Digital Libraries), cs.DM(Discrete Mathematics). Directly output the class name.

gpt: cs.DC(Distributed, Parallel, and Cluster Computing)