human: Given a node-centered hypergraph: <hypergraph>, where nodes represent papers and hyperedges represent sets of papers co-cited by a source paper.

Details of the hypergraph:
Center node: "streamlined deployment for quantized neural networks"
  Abstract: Running Deep Neural Network (DNN) models on devices with limited computational capability is a challenge due to large compute and memory requirements. Quantized Neural Networks (QNNs) have emerged as a potential solution to this problem, promising to offer most of the DNN accuracy benefits with much lower computational cost. However, harvesting these benefits on existing mobile CPUs is a challenge since operations on highly quantized datatypes are not natively supported in most instruction set architectures (ISAs). In this work, we first describe a streamlining flow to convert all QNN inference operations to integer ones. Afterwards, we provide techniques based on processing one bit position at a time (bit-serial) to show how QNNs can be efficiently deployed using common bitwise operations. We demonstrate the potential of QNNs on mobile CPUs with microbenchmarks and on a quantized AlexNet, which is 3.5x faster than an optimized 8-bit baseline.

Connected through hyperedge HE-1 (induced by source paper "quantized neural network inference with precision batching"):
  with members:
    - "learning fast algorithms for linear transforms using butterfly factorizations"
    - "quantized reinforcement learning quarl"
    - "adaptivfloat a floating point based data type for resilient deep learning inference"
    - "improving neural network quantization without retraining using outlier channel splitting"
    - "alternating multi bit quantization for recurrent neural networks"
    - "word2bits quantized word vectors"
    - "pact parameterized clipping activation for quantized neural networks"
    - "on the state of the art of evaluation in neural language models"

Connected through hyperedge HE-2 (induced by source paper "qutibench benchmarking neural networks on heterogeneous hardware"):
  with members:
    - "analysis of dawnbench a time to accuracy machine learning performance benchmark"
    - "binareye an always on energy accuracy scalable binary cnn processor with all memory on chip in 28nm cmos"
    - "training and inference with integers in deep neural networks"
    - "tvm end to end optimization stack for deep learning"
    - "finn l library extensions and design trade off analysis for variable precision lstm networks on fpgas"
    - "bismo a scalable bit serial matrix multiplication overlay for reconfigurable computing"
    - "tbd benchmarking and analyzing deep neural network training"
    - "in datacenter performance analysis of a tensor processing unit"

Connected through hyperedge HE-3 (induced by source paper "memory driven mixed low precision quantization for enabling deep network inference on microcontrollers"):
  with members:
    - "trained quantization thresholds for accurate and efficient fixed point inference of deep neural networks"
    - "low bit quantization of neural networks for efficient inference"
    - "learning low precision neural networks without straight through estimator ste"
    - "hawq hessian aware quantization of neural networks with mixed precision"
    - "ifq net integrated fixed point quantization networks for embedded vision"
    - "learned step size quantization"
    - "quantizing deep convolutional networks for efficient inference a whitepaper"
    - "fbnet hardware aware efficient convnet design via differentiable neural architecture search"

Connected through hyperedge HE-4 (induced by source paper "optimizing bit serial matrix multiplication for reconfigurable computing"):
  with members:
    - "haq hardware aware automated quantization with mixed precision"
    - "bismo a scalable bit serial matrix multiplication overlay for reconfigurable computing"
    - "generic and universal parallel matrix summation with a flexible compression goal for xilinx fpgas"
    - "finn a framework for fast scalable binarized neural network inference"
    - "espresso efficient forward propagation for bcnns"
    - "quantized neural networks training neural networks with low precision weights and activations"

Connected through hyperedge HE-5 (induced by source paper "finn r an end to end deep learning framework for fast exploration of quantized neural networks"):
  with members:
    - "accuracy to throughput trade offs for reduced precision neural networks on reconfigurable logic"
    - "streaming architecture for large scale quantized neural networks on an fpga based dataflow platform"
    - "in datacenter performance analysis of a tensor processing unit"
    - "wrpn wide reduced precision networks"
    - "generic and universal parallel matrix summation with a flexible compression goal for xilinx fpgas"
    - "deep learning with low precision by half wave gaussian quantization"
    - "tactics to directly map cnn graphs on embedded fpgas"
    - "incremental network quantization towards lossless cnns with low precision weights"

Connected through hyperedge HE-6 (induced by source paper "bismo a scalable bit serial matrix multiplication overlay for reconfigurable computing"):
  with members:
    - "generic and universal parallel matrix summation with a flexible compression goal for xilinx fpgas"
    - "finn a framework for fast scalable binarized neural network inference"
    - "espresso efficient forward propagation for bcnns"
    - "quantized neural networks training neural networks with low precision weights and activations"

Question: Please tell me which class the center node belongs to. The 40 classes are: cs.NA(Numerical Analysis), cs.MM(Multimedia), cs.LO(Logic in Computer Science), cs.CY(Computers and Society), cs.CR(Cryptography and Security), cs.DC(Distributed, Parallel, and Cluster Computing), cs.HC(Human-Computer Interaction), cs.CE(Computational Engineering, Finance, and Science), cs.NI(Networking and Internet Architecture), cs.CC(Computational Complexity), cs.AI(Artificial Intelligence), cs.MA(Multiagent Systems), cs.GL(General Literature), cs.NE(Neural and Evolutionary Computing), cs.SC(Symbolic Computation), cs.AR(Hardware Architecture), cs.CV(Computer Vision and Pattern Recognition), cs.GR(Graphics), cs.ET(Emerging Technologies), cs.SY(Systems and Control), cs.CG(Computational Geometry), cs.OH(Other Computer Science), cs.PL(Programming Languages), cs.SE(Software Engineering), cs.LG(Machine Learning), cs.SD(Sound), cs.SI(Social and Information Networks), cs.RO(Robotics), cs.IT(Information Theory), cs.PF(Performance), cs.CL(Computation and Language), cs.IR(Information Retrieval), cs.MS(Mathematical Software), cs.FL(Formal Languages and Automata Theory), cs.DS(Data Structures and Algorithms), cs.OS(Operating Systems), cs.GT(Computer Science and Game Theory), cs.DB(Databases), cs.DL(Digital Libraries), cs.DM(Discrete Mathematics). Directly output the class name.

gpt: cs.CV(Computer Vision and Pattern Recognition)