human: Given a node-centered hypergraph: <hypergraph>, where nodes represent papers and hyperedges represent sets of papers co-cited by a source paper.

Details of the hypergraph:
Center node: "a software approach to defeating side channels in last level caches"
  Abstract: We present a software approach to mitigate access-driven side-channel attacks that leverage last-level caches (LLCs) shared across cores to leak information between security domains (e.g., tenants in a cloud). Our approach dynamically manages physical memory pages shared between security domains to disable sharing of LLC lines, thus preventing "Flush-Reload" side channels via LLCs. It also manages cacheability of memory pages to thwart cross-tenant "Prime-Probe" attacks in LLCs. We have implemented our approach as a memory management subsystem called CacheBar within the Linux kernel to intervene on such side channels across container boundaries, as containers are a common method for enforcing tenant isolation in Platform-as-a-Service (PaaS) clouds. Through formal verification, principled analysis, and empirical evaluation, we show that CacheBar achieves strong security with small performance overheads for PaaS workloads.

Connected through hyperedge HE-1 (induced by source paper "a compiler assisted scheduler for detecting and mitigating cache based side channel attacks"):
  with members:
    - "a fast analytical model of fully associative caches"
    - "identifying cache based side channels through secret augmented abstract interpretation"
    - "a survey of electromagnetic side channel attacks and discussion on their case progressing potential for digital forensics"
    - "eliminating timing side channel leaks using program repair"
    - "flush flush a fast and stealthy cache attack"
    - "flush flush a fast and stealthy cache attack"

Connected through hyperedge HE-2 (induced by source paper "jackhammer efficient rowhammer on heterogeneous fpga cpu platforms"):
  with members:
    - "packet chasing spying on network packets over a cache side channel"
    - "fortuneteller predicting microarchitectural attacks via unsupervised deep learning"
    - "theory and practice of finding eviction sets"
    - "another flip in the wall of rowhammer defenses"
    - "cachezoom how sgx amplifies the power of cache attacks"
    - "perfweb how to violate web privacy with hardware performance events"
    - "autolock why cache attacks on arm are harder than you think"
    - "flush flush a fast and stealthy cache attack"

Connected through hyperedge HE-3 (induced by source paper "hybcache hybrid side channel resilient caches for trusted execution environments"):
  with members:
    - "speculative buffer overflows attacks and defenses"
    - "spectre attacks exploiting speculative execution"
    - "spectre returns speculation attacks using the return stack buffer"
    - "ret2spec speculative execution using return stack buffers"
    - "cachezoom how sgx amplifies the power of cache attacks"
    - "software grand exposure sgx cache attacks are practical"
    - "malware guard extension using sgx to conceal cache attacks"
    - "inferring fine grained control flow inside sgx enclaves with branch shadowing"

Connected through hyperedge HE-4 (induced by source paper "memjam a false dependency attack against constant time crypto implementations"):
  with members:
    - "ozone efficient execution with zero timing leakage for modern microarchitectures"
    - "cachezoom how sgx amplifies the power of cache attacks"
    - "cacheshield protecting legacy processes against cache attacks"
    - "software grand exposure sgx cache attacks are practical"
    - "did we learn from llc side channel attacks a cache leakage detection tool for crypto libraries"
    - "inferring fine grained control flow inside sgx enclaves with branch shadowing"
    - "rigorous analysis of software countermeasures against cache attacks"
    - "flush flush a fast and stealthy cache attack"

Connected through hyperedge HE-5 (induced by source paper "sgxpectre stealing intel secrets from sgx enclaves via speculative execution"):
  with members:
    - "netspectre read arbitrary memory over network"
    - "spectre returns speculation attacks using the return stack buffer"
    - "ret2spec speculative execution using return stack buffers"
    - "the circle game scalable private membership test using trusted hardware"
    - "software grand exposure sgx cache attacks are practical"
    - "sgxio generic trusted i o path for intel sgx"
    - "malware guard extension using sgx to conceal cache attacks"
    - "inferring fine grained control flow inside sgx enclaves with branch shadowing"

Connected through hyperedge HE-6 (induced by source paper "binsec rel efficient relational symbolic execution for constant time at binary level"):
  with members:
    - "get rid of inline assembly through verification oriented lifting"
    - "symbolic verification of cache side channel freedom"
    - "eliminating timing side channel leaks using program repair"
    - "microwalk a framework for finding side channels in binaries"
    - "time protection the missing os abstraction"
    - "relational symbolic execution"
    - "rigorous analysis of software countermeasures against cache attacks"

Connected through hyperedge HE-7 (induced by source paper "ironhide a secure multicore architecture that leverages hardware isolation against microarchitecture state attacks"):
  with members:
    - "speculative buffer overflows attacks and defenses"
    - "sanctorum a lightweight security monitor for secure enclaves"
    - "spectre attacks exploiting speculative execution"
    - "mi6 secure enclaves in a speculative out of order processor"
    - "connecting the dots privacy leakage via write access patterns to the main memory"
    - "armageddon cache attacks on mobile devices"
    - "thermal covert channels on multi core platforms"

Connected through hyperedge HE-8 (induced by source paper "new attacks and defenses for randomized caches"):
  with members:
    - "dr sgx automated and adjustable side channel protection for sgx using data location randomization"
    - "safespec banishing the spectre of a meltdown with leakage free speculation"
    - "spectre attacks exploiting speculative execution"
    - "spectre returns speculation attacks using the return stack buffer"
    - "flush flush a fast and stealthy cache attack"
    - "flush flush a fast and stealthy cache attack"

Question: Please tell me which class the center node belongs to. The 40 classes are: cs.NA(Numerical Analysis), cs.MM(Multimedia), cs.LO(Logic in Computer Science), cs.CY(Computers and Society), cs.CR(Cryptography and Security), cs.DC(Distributed, Parallel, and Cluster Computing), cs.HC(Human-Computer Interaction), cs.CE(Computational Engineering, Finance, and Science), cs.NI(Networking and Internet Architecture), cs.CC(Computational Complexity), cs.AI(Artificial Intelligence), cs.MA(Multiagent Systems), cs.GL(General Literature), cs.NE(Neural and Evolutionary Computing), cs.SC(Symbolic Computation), cs.AR(Hardware Architecture), cs.CV(Computer Vision and Pattern Recognition), cs.GR(Graphics), cs.ET(Emerging Technologies), cs.SY(Systems and Control), cs.CG(Computational Geometry), cs.OH(Other Computer Science), cs.PL(Programming Languages), cs.SE(Software Engineering), cs.LG(Machine Learning), cs.SD(Sound), cs.SI(Social and Information Networks), cs.RO(Robotics), cs.IT(Information Theory), cs.PF(Performance), cs.CL(Computation and Language), cs.IR(Information Retrieval), cs.MS(Mathematical Software), cs.FL(Formal Languages and Automata Theory), cs.DS(Data Structures and Algorithms), cs.OS(Operating Systems), cs.GT(Computer Science and Game Theory), cs.DB(Databases), cs.DL(Digital Libraries), cs.DM(Discrete Mathematics). Directly output the class name.

gpt: cs.CR(Cryptography and Security)