human: Given a node-centered hypergraph: <hypergraph>, where nodes represent papers and hyperedges represent sets of papers co-cited by a source paper.

Details of the hypergraph:
Center node: "chip level and multi node analysis of energy optimized lattice boltzmann cfd simulations"
  Abstract: Memory-bound algorithms show complex performance and energy consumption behavior on multicore processors. We choose the lattice-Boltzmann method (LBM) on an Intel Sandy Bridge cluster as a prototype scenario to investigate if and how single-chip performance and power characteristics can be generalized to the highly parallel case. First we perform an analysis of a sparse-lattice LBM implementation for complex geometries. Using a single-core performance model, we predict the intra-chip saturation characteristics and the optimal operating point in terms of energy to solution as a function of implementation details, clock frequency, vectorization, and number of active cores per chip. We show that high single-core performance and a correct choice of the number of active cores per chip are the essential optimizations for lowest energy to solution at minimal performance degradation. Then we extrapolate to the MPI-parallel level and quantify the energy-saving potential of various optimizations and execution modes, where we find these guidelines to be even more important, especially when communication overhead is non-negligible. In our setup we could achieve energy savings of 35% in this case, compared to a naive approach. We also demonstrate that a simple non-reflective reduction of the clock speed leaves most of the energy saving potential unused.

Connected through hyperedge HE-1 (induced by source paper "bridging the architecture gap abstracting performance relevant properties of modern server processors"):
  with members:
    - "analytic performance modeling and analysis of detailed neuron simulations"
    - "on the accuracy and usefulness of analytic energy models for contemporary multicore processors"
    - "kerncraft a tool for analytic performance modeling of loop kernels"
    - "an ecm based energy efficiency optimization approach for bandwidth limited streaming kernels on recent intel xeon processors"
    - "quantifying performance bottlenecks of stencil computations using the execution cache memory model"

Connected through hyperedge HE-2 (induced by source paper "delay propagation and overlapping mechanisms on clusters a case study of idle periods based on workload communication and delay granularity"):
  with members:
    - "on the accuracy and usefulness of analytic energy models for contemporary multicore processors"
    - "an analysis of core and chip level architectural features in four generations of intel server processors"
    - "idle period propagation in message passing applications"
    - "quantifying performance bottlenecks of stencil computations using the execution cache memory model"

Connected through hyperedge HE-3 (induced by source paper "propagation and decay of injected one off delays on clusters a case study"):
  with members:
    - "on the accuracy and usefulness of analytic energy models for contemporary multicore processors"
    - "an analysis of core and chip level architectural features in four generations of intel server processors"
    - "quantifying performance bottlenecks of stencil computations using the execution cache memory model"

Connected through hyperedge HE-4 (induced by source paper "on the accuracy and usefulness of analytic energy models for contemporary multicore processors"):
  with members:
    - "an analysis of core and chip level architectural features in four generations of intel server processors"
    - "kerncraft a tool for analytic performance modeling of loop kernels"
    - "quantifying performance bottlenecks of stencil computations using the execution cache memory model"
    - "the energy frequency convexity rule modeling and experimental validation on mobile devices"
    - "exploring performance and power properties of modern multicore chips via simple machine models"

Connected through hyperedge HE-5 (induced by source paper "lattice boltzmann benchmark kernels as a testbed for performance analysis"):
  with members:
    - "modeling and analyzing performance for highly optimized propagation steps of the lattice boltzmann method on sparse lattices"
    - "comparison of different propagation steps for lattice boltzmann methods"
    - "likwid a lightweight performance oriented tool suite for x86 multicore environments"
    - "likwid a lightweight performance oriented tool suite for x86 multicore environments"

Connected through hyperedge HE-6 (induced by source paper "an analysis of core and chip level architectural features in four generations of intel server processors"):
  with members:
    - "an ecm based energy efficiency optimization approach for bandwidth limited streaming kernels on recent intel xeon processors"
    - "analysis of intel s haswell microarchitecture using the ecm model and microbenchmarks"
    - "quantifying performance bottlenecks of stencil computations using the execution cache memory model"
    - "comparing the performance of different x86 simd instruction sets for a medical imaging application on modern multi and manycore chips"
    - "pushing the limits for medical image reconstruction on recent standard multicore processors"
    - "exploring performance and power properties of modern multicore chips via simple machine models"

Connected through hyperedge HE-7 (induced by source paper "kerncraft a tool for analytic performance modeling of loop kernels"):
  with members:
    - "ghost building blocks for high performance sparse linear algebra on heterogeneous systems"
    - "quantifying performance bottlenecks of stencil computations using the execution cache memory model"
    - "automatic loop kernel analysis and performance modeling with kerncraft"
    - "likwid a lightweight performance oriented tool suite for x86 multicore environments"
    - "likwid a lightweight performance oriented tool suite for x86 multicore environments"

Connected through hyperedge HE-8 (induced by source paper "modeling and analyzing performance for highly optimized propagation steps of the lattice boltzmann method on sparse lattices"):
  with members:
    - "comparison of different propagation steps for lattice boltzmann methods"
    - "domain decomposition and locality optimization for large scale lattice boltzmann simulations"

Question: Please tell me which class the center node belongs to. The 40 classes are: cs.NA(Numerical Analysis), cs.MM(Multimedia), cs.LO(Logic in Computer Science), cs.CY(Computers and Society), cs.CR(Cryptography and Security), cs.DC(Distributed, Parallel, and Cluster Computing), cs.HC(Human-Computer Interaction), cs.CE(Computational Engineering, Finance, and Science), cs.NI(Networking and Internet Architecture), cs.CC(Computational Complexity), cs.AI(Artificial Intelligence), cs.MA(Multiagent Systems), cs.GL(General Literature), cs.NE(Neural and Evolutionary Computing), cs.SC(Symbolic Computation), cs.AR(Hardware Architecture), cs.CV(Computer Vision and Pattern Recognition), cs.GR(Graphics), cs.ET(Emerging Technologies), cs.SY(Systems and Control), cs.CG(Computational Geometry), cs.OH(Other Computer Science), cs.PL(Programming Languages), cs.SE(Software Engineering), cs.LG(Machine Learning), cs.SD(Sound), cs.SI(Social and Information Networks), cs.RO(Robotics), cs.IT(Information Theory), cs.PF(Performance), cs.CL(Computation and Language), cs.IR(Information Retrieval), cs.MS(Mathematical Software), cs.FL(Formal Languages and Automata Theory), cs.DS(Data Structures and Algorithms), cs.OS(Operating Systems), cs.GT(Computer Science and Game Theory), cs.DB(Databases), cs.DL(Digital Libraries), cs.DM(Discrete Mathematics). Directly output the class name.

gpt: cs.PF(Performance)