human: Given a node-centered hypergraph: <hypergraph>, where nodes represent papers and hyperedges represent sets of papers co-cited by a source paper.

Details of the hypergraph:
Center node: "early output hybrid input encoded asynchronous full adder and relative timed ripple carry adder"
  Abstract: This paper presents a new early output hybrid input encoded asynchronous full adder designed using dual-rail and 1-of-4 delay-insensitive data codes. The proposed full adder when cascaded to form a ripple carry adder (RCA) necessitates the use of a small relative-timing assumption with respect to the internal carries, which is independent of the RCA size. The forward latency of the proposed hybrid input encoded full adder based RCA is data-dependent while its reverse latency is the least equaling the propagation delay of just one full adder. Compared to the best of the existing hybrid input encoded full adders based 32-bit RCAs, the proposed early output hybrid input encoded full adder based 32-bit RCA enables respective reductions in forward latency and area by 7.9% and 5.6% whilst dissipating the same average power; in terms of the theoretically computed cycle time, the latter reports a 10.9% reduction compared to the former.

Connected through hyperedge HE-1 (induced by source paper "a critique on asynchronous logic implementation based on factorized dims"):
  with members:
    - "latency optimized asynchronous early output ripple carry adder based on delay insensitive dual rail data encoding"
    - "asynchronous early output section carry based carry lookahead adder with alias carry logic"
    - "asynchronous early output dual bit full adders based on homogeneous and heterogeneous delay insensitive data encoding"
    - "global versus local weak indication self timed function blocks a comparative analysis"
    - "comments on dual rail asynchronous logic multi level implementation"
    - "area latency optimized early output asynchronous full adders and relative timed ripple carry adders"
    - "an asynchronous early output full adder and a relative timed ripple carry adder"

Connected through hyperedge HE-2 (induced by source paper "latency optimized asynchronous early output ripple carry adder based on delay insensitive dual rail data encoding"):
  with members:
    - "asynchronous early output dual bit full adders based on homogeneous and heterogeneous delay insensitive data encoding"
    - "comments on dual rail asynchronous logic multi level implementation"
    - "area latency optimized early output asynchronous full adders and relative timed ripple carry adders"
    - "an asynchronous early output full adder and a relative timed ripple carry adder"

Connected through hyperedge HE-3 (induced by source paper "asynchronous early output dual bit full adders based on homogeneous and heterogeneous delay insensitive data encoding"):
  with members:
    - "global versus local weak indication self timed function blocks a comparative analysis"
    - "comments on dual rail asynchronous logic multi level implementation"

Question: Please tell me which class the center node belongs to. The 40 classes are: cs.NA(Numerical Analysis), cs.MM(Multimedia), cs.LO(Logic in Computer Science), cs.CY(Computers and Society), cs.CR(Cryptography and Security), cs.DC(Distributed, Parallel, and Cluster Computing), cs.HC(Human-Computer Interaction), cs.CE(Computational Engineering, Finance, and Science), cs.NI(Networking and Internet Architecture), cs.CC(Computational Complexity), cs.AI(Artificial Intelligence), cs.MA(Multiagent Systems), cs.GL(General Literature), cs.NE(Neural and Evolutionary Computing), cs.SC(Symbolic Computation), cs.AR(Hardware Architecture), cs.CV(Computer Vision and Pattern Recognition), cs.GR(Graphics), cs.ET(Emerging Technologies), cs.SY(Systems and Control), cs.CG(Computational Geometry), cs.OH(Other Computer Science), cs.PL(Programming Languages), cs.SE(Software Engineering), cs.LG(Machine Learning), cs.SD(Sound), cs.SI(Social and Information Networks), cs.RO(Robotics), cs.IT(Information Theory), cs.PF(Performance), cs.CL(Computation and Language), cs.IR(Information Retrieval), cs.MS(Mathematical Software), cs.FL(Formal Languages and Automata Theory), cs.DS(Data Structures and Algorithms), cs.OS(Operating Systems), cs.GT(Computer Science and Game Theory), cs.DB(Databases), cs.DL(Digital Libraries), cs.DM(Discrete Mathematics). Directly output the class name.

gpt: cs.AR(Hardware Architecture)