human: Given a node-centered hypergraph: <hypergraph>, where nodes represent papers and hyperedges represent sets of papers co-cited by a source paper.

Details of the hypergraph:
Center node: "energy consumption of vlsi decoders"
  Abstract: Thompson's model of VLSI computation relates the energy of a computation to the product of the circuit area and the number of clock cycles needed to carry out the computation. It is shown that for any family of circuits implemented according to this model, using any algorithm that performs decoding of a codeword passed through a binary erasure channel, as the block length approaches infinity either (a) the probability of block error is asymptotically lower bounded by 1/2 or (b) the energy of the computation scales at least as Omega(n(log n)^(1/2)), and so the energy of successful decoding, per decoded bit, must scale at least as Omega((log n)^(1/2)). This implies that the average energy per decoded bit must approach infinity for any sequence of codes that approaches capacity. The analysis techniques used are then extended to the case of serial computation, showing that if a circuit is restricted to serial computation, then as block length approaches infinity, either the block error probability is lower bounded by 1/2 or the energy scales at least as fast as Omega(n log(n)). In a very general case that allows for the number of output pins to vary with block length, it is shown that the average energy per decoded bit must scale as Omega(n(log n)^(1/5)). A simple example is provided of a class of circuits performing low-density parity-check decoding whose energy complexity scales as O(n^2 log log n).

Connected through hyperedge HE-1 (induced by source paper "compressive sensing based user clustering for downlink noma systems with decoding power"):
  with members:
    - "energy efficiency of downlink transmission strategies for cloud radio access networks"
    - "on the performance of non orthogonal multiple access in 5g systems with randomly deployed users"
    - "on tractability aspects of optimal resource allocation in ofdma systems"

Connected through hyperedge HE-2 (induced by source paper "joint uplink and downlink coverage analysis of cellular based rf powered iot network"):
  with members:
    - "modeling and analysis of cellular networks using stochastic geometry a tutorial"
    - "a primer on cellular network analysis using stochastic geometry"
    - "enriched k tier hetnet model to enable the analysis of user centric small cell deployments"
    - "user point processes in cellular networks"
    - "millimeter wave energy harvesting"
    - "optimal policies for wireless networks with energy harvesting transmitters and receivers effects of decoding costs"
    - "performance analysis of ambient rf energy harvesting with repulsive point process modeling"
    - "energy harvesting wireless communications a review of recent advances"

Connected through hyperedge HE-3 (induced by source paper "achievable rate region of non orthogonal multiple access systems with wireless powered decoder"):
  with members:
    - "wireless powered communication networks an overview"
    - "communications and signals design for wireless power transmission"
    - "cooperative non orthogonal multiple access with simultaneous wireless information and power transfer"
    - "practical non linear energy harvesting model and resource allocation for swipt systems"
    - "fairness for non orthogonal multiple access in 5g systems"
    - "collaborative wireless energy and information transfer in interference channel"
    - "wireless information and power transfer in relay systems with multiple antennas and interference"
    - "outage minimization for a fading wireless link with energy harvesting transmitter and receiver"

Connected through hyperedge HE-4 (induced by source paper "on scaling rules for energy of vlsi polar encoders and decoders"):
  with members:
    - "information friction and its implications on minimum energy required for communication"
    - "towards approaching total power capacity transmit and decoding power minimization for ldpc codes"
    - "finite length scaling for polar codes"
    - "a high throughput energy efficient implementation of successive cancellation decoder for polar codes using combinational logic"
    - "polar codes speed of polarization and polynomial gap to capacity"
    - "improved bounds on the finite length scaling of polar codes"
    - "hardware architectures for successive cancellation decoding of polar codes"
    - "channel polarization a method for constructing capacity achieving codes for symmetric binary input memoryless channels"

Connected through hyperedge HE-5 (induced by source paper "energy latency and reliability tradeoffs in coding circuits"):
  with members:
    - "on the total power capacity of regular ldpc codes with iterative message passing decoders"
    - "information theory of molecular communication directions and challenges"
    - "energy harvesting transmitters that heat up throughput maximization under temperature constraints"
    - "on scaling rules for energy of vlsi polar encoders and decoders"
    - "information friction and its implications on minimum energy required for communication"
    - "on the energy complexity of ldpc decoder circuits"
    - "energy efficient decoders for compressive sensing fundamental limits and implementations"
    - "modeling and energy optimization of ldpc decoder circuits with timing violations"

Connected through hyperedge HE-6 (induced by source paper "on the total power capacity of regular ldpc codes with iterative message passing decoders"):
  with members:
    - "on the energy complexity of ldpc decoder circuits"
    - "towards a communication theoretic understanding of system level power consumption"
    - "channel polarization a method for constructing capacity achieving codes for symmetric binary input memoryless channels"
    - "two bit message passing decoders for ldpc codes over the binary symmetric channel"
    - "graph cover decoding and finite length analysis of message passing iterative decoding of ldpc codes"

Connected through hyperedge HE-7 (induced by source paper "computing linear transformations with unreliable components"):
  with members:
    - "speeding up distributed machine learning using codes"
    - "short dot computing large linear transforms distributedly using coded short dot products"
    - "information friction and its implications on minimum energy required for communication"
    - "density evolution and functional threshold for the noisy min sum decoder"
    - "density evolution for min sum decoding of ldpc codes under unreliable message storage"
    - "coding with encoding uncertainty"
    - "spatially coupled ensembles universally achieve capacity under belief propagation"
    - "on the capacity of noisy computations"

Connected through hyperedge HE-8 (induced by source paper "modeling and energy optimization of ldpc decoder circuits with timing violations"):
  with members:
    - "on the total power capacity of regular ldpc codes with iterative message passing decoders"
    - "on the energy complexity of ldpc decoder circuits"
    - "analysis and design of finite alphabet iterative decoders robust to faulty hardware"
    - "density evolution for min sum decoding of ldpc codes under unreliable message storage"
    - "state dependent statistical timing model for voltage scaled circuits"
    - "performance of ldpc codes under faulty iterative decoding"

Question: Please tell me which class the center node belongs to. The 40 classes are: cs.NA(Numerical Analysis), cs.MM(Multimedia), cs.LO(Logic in Computer Science), cs.CY(Computers and Society), cs.CR(Cryptography and Security), cs.DC(Distributed, Parallel, and Cluster Computing), cs.HC(Human-Computer Interaction), cs.CE(Computational Engineering, Finance, and Science), cs.NI(Networking and Internet Architecture), cs.CC(Computational Complexity), cs.AI(Artificial Intelligence), cs.MA(Multiagent Systems), cs.GL(General Literature), cs.NE(Neural and Evolutionary Computing), cs.SC(Symbolic Computation), cs.AR(Hardware Architecture), cs.CV(Computer Vision and Pattern Recognition), cs.GR(Graphics), cs.ET(Emerging Technologies), cs.SY(Systems and Control), cs.CG(Computational Geometry), cs.OH(Other Computer Science), cs.PL(Programming Languages), cs.SE(Software Engineering), cs.LG(Machine Learning), cs.SD(Sound), cs.SI(Social and Information Networks), cs.RO(Robotics), cs.IT(Information Theory), cs.PF(Performance), cs.CL(Computation and Language), cs.IR(Information Retrieval), cs.MS(Mathematical Software), cs.FL(Formal Languages and Automata Theory), cs.DS(Data Structures and Algorithms), cs.OS(Operating Systems), cs.GT(Computer Science and Game Theory), cs.DB(Databases), cs.DL(Digital Libraries), cs.DM(Discrete Mathematics). Directly output the class name.

gpt: cs.IT(Information Theory)