human: Given a node-centered hypergraph: <hypergraph>, where nodes represent papers and hyperedges represent sets of papers co-cited by a source paper.

Details of the hypergraph:
Center node: "dissecting gpu memory hierarchy through microbenchmarking"
  Abstract: Memory access efficiency is a key factor in fully utilizing the computational power of graphics processing units (GPUs). However, many details of the GPU memory hierarchy are not released by GPU vendors. In this paper, we propose a novel fine-grained microbenchmarking approach and apply it to three generations of NVIDIA GPUs, namely Fermi, Kepler and Maxwell, to expose the previously unknown characteristics of their memory hierarchies. Specifically, we investigate the structures of different GPU cache systems, such as the data cache, the texture cache and the translation look-aside buffer (TLB). We also investigate the throughput and access latency of GPU global memory and shared memory. Our microbenchmark results offer a better understanding of the mysterious GPU memory hierarchy, which will facilitate the software optimization and modelling of GPU architectures. To the best of our knowledge, this is the first study to reveal the cache properties of Kepler and Maxwell GPUs, and the superiority of Maxwell in shared memory performance under bank conflict.

Connected through hyperedge HE-1 (induced by source paper "a study of the fundamental performance characteristics of gpus and cpus for database analytics extended version"):
  with members:
    - "a memory bandwidth efficient hybrid radix sort on gpus"
    - "revisiting co processing for hash joins on the coupled cpu gpu architecture"

Connected through hyperedge HE-2 (induced by source paper "the impact of gpu dvfs on the energy and performance of deep learning an empirical study"):
  with members:
    - "highly scalable deep learning training system with mixed precision training imagenet in four minutes"
    - "imagenet training in minutes"
    - "deep gradient compression reducing the communication bandwidth for distributed training"
    - "adacomp adaptive residual gradient compression for data parallel distributed training"
    - "gpgpu performance estimation with core and memory frequency scaling"
    - "efficient processing of deep neural networks a tutorial and survey"
    - "performance modeling and evaluation of distributed deep learning frameworks on gpus"
    - "neuralpower predict and deploy energy efficient convolutional neural networks"

Connected through hyperedge HE-3 (induced by source paper "delta gpu performance model for deep learning applications with in depth memory system traffic analysis"):
  with members:
    - "deep learning inference in facebook data centers characterization performance optimizations and hardware implications"
    - "gpgpu performance estimation with core and memory frequency scaling"
    - "a fast rcnn hard positive generation via adversary for object detection"
    - "optimizing memory efficiency for deep convolutional neural networks on gpus"
    - "on large batch training for deep learning generalization gap and sharp minima"
    - "deep compression compressing deep neural networks with pruning trained quantization and huffman coding"
    - "you only look once unified real time object detection"
    - "deep residual learning for image recognition"

Connected through hyperedge HE-4 (induced by source paper "nanobench a low overhead tool for running microbenchmarks on x86 systems"):
  with members:
    - "uops info characterizing latency throughput and port usage of instructions on intel microarchitectures"
    - "cachequery learning replacement policies from hardware caches"
    - "reload refresh abusing cache replacement policies to perform stealthy cache attacks"
    - "spectre attacks exploiting speculative execution"
    - "efficient characterization of hidden processor memory hierarchies"
    - "theory and practice of finding eviction sets"
    - "likwid a lightweight performance oriented tool suite for x86 multicore environments"
    - "likwid a lightweight performance oriented tool suite for x86 multicore environments"

Connected through hyperedge HE-5 (induced by source paper "engineering boolean matrix multiplication for multiple accelerator shared memory architectures"):
  with members:
    - "fast feasible and unfeasible matrix multiplication"
    - "generating families of practical fast matrix multiplication algorithms"
    - "an improved combinatorial algorithm for boolean matrix multiplication"
    - "a framework for practical parallel fast matrix multiplication"
    - "powers of tensors and fast matrix multiplication"
    - "communication optimal parallel algorithm for strassen s matrix multiplication"

Connected through hyperedge HE-6 (induced by source paper "instructions latencies characterization for nvidia gpgpus"):
  with members:
    - "holistic management of the gpgpu memory hierarchy to manage warp level latency tolerance"
    - "dissecting the nvidia volta gpu architecture via microbenchmarking"
    - "mixed precision training"

Connected through hyperedge HE-7 (induced by source paper "a technique for finding optimal program launch parameters targeting manycore accelerators"):
  with members:
    - "autotuning gpu kernels via static and predictive analysis"
    - "a many core machine model for designing algorithms with minimum parallelism overheads"

Connected through hyperedge HE-8 (induced by source paper "low overhead instruction latency characterization for nvidia gpgpus"):
  with members:
    - "dissecting the nvidia volta gpu architecture via microbenchmarking"
    - "mixed precision training"

Question: Please tell me which class the center node belongs to. The 40 classes are: cs.NA(Numerical Analysis), cs.MM(Multimedia), cs.LO(Logic in Computer Science), cs.CY(Computers and Society), cs.CR(Cryptography and Security), cs.DC(Distributed, Parallel, and Cluster Computing), cs.HC(Human-Computer Interaction), cs.CE(Computational Engineering, Finance, and Science), cs.NI(Networking and Internet Architecture), cs.CC(Computational Complexity), cs.AI(Artificial Intelligence), cs.MA(Multiagent Systems), cs.GL(General Literature), cs.NE(Neural and Evolutionary Computing), cs.SC(Symbolic Computation), cs.AR(Hardware Architecture), cs.CV(Computer Vision and Pattern Recognition), cs.GR(Graphics), cs.ET(Emerging Technologies), cs.SY(Systems and Control), cs.CG(Computational Geometry), cs.OH(Other Computer Science), cs.PL(Programming Languages), cs.SE(Software Engineering), cs.LG(Machine Learning), cs.SD(Sound), cs.SI(Social and Information Networks), cs.RO(Robotics), cs.IT(Information Theory), cs.PF(Performance), cs.CL(Computation and Language), cs.IR(Information Retrieval), cs.MS(Mathematical Software), cs.FL(Formal Languages and Automata Theory), cs.DS(Data Structures and Algorithms), cs.OS(Operating Systems), cs.GT(Computer Science and Game Theory), cs.DB(Databases), cs.DL(Digital Libraries), cs.DM(Discrete Mathematics). Directly output the class name.

gpt: cs.AR(Hardware Architecture)