human: Given a node-centered hypergraph: <hypergraph>, where nodes represent papers and hyperedges represent sets of papers co-cited by a source paper.

Details of the hypergraph:
Center node: "recurrent neural networks hardware implementation on fpga"
  Abstract: Recurrent Neural Networks (RNNs) have the ability to retain memory and learn data sequences. Due to the recurrent nature of RNNs, it is sometimes hard to parallelize all its computations on conventional hardware. CPUs do not currently offer large parallelism, while GPUs offer limited parallelism due to sequential components of RNN models. In this paper we present a hardware implementation of Long-Short Term Memory (LSTM) recurrent network on the programmable logic Zynq 7020 FPGA from Xilinx. We implemented a RNN with $2$ layers and $128$ hidden units in hardware and it has been tested using a character level language model. The implementation is more than $21\times$ faster than the ARM CPU embedded on the Zynq 7020 FPGA. This work can potentially evolve to a RNN co-processor for future mobile devices.

Connected through hyperedge HE-1 (induced by source paper "lstm sharp an adaptable energy efficient hardware accelerator for long short term memory"):
  with members:
    - "learning to ask unanswerable questions for machine reading comprehension"
    - "towards non saturating recurrent units for modelling long term dependencies"
    - "the emergence of number and syntax units in lstm language models"
    - "recent advances in recurrent neural networks"
    - "in datacenter performance analysis of a tensor processing unit"
    - "bidirectional attention flow for machine comprehension"
    - "optimizing performance of recurrent neural networks on gpus"
    - "eie efficient inference engine on compressed deep neural network"

Connected through hyperedge HE-2 (induced by source paper "serving recurrent neural networks efficiently with a spatial accelerator"):
  with members:
    - "amc automl for model compression and acceleration on mobile devices"
    - "nvidia tensor core programmability performance precision"
    - "in datacenter performance analysis of a tensor processing unit"
    - "exploring sparsity in recurrent neural networks"
    - "eie efficient inference engine on compressed deep neural network"
    - "dsd dense sparse dense training for deep neural networks"
    - "tensorflow a system for large scale machine learning"
    - "compression of neural machine translation models via pruning"

Connected through hyperedge HE-3 (induced by source paper "finn l library extensions and design trade off analysis for variable precision lstm networks on fpgas"):
  with members:
    - "alternating multi bit quantization for recurrent neural networks"
    - "lstm a search space odyssey"
    - "balanced quantization an effective and efficient approach to quantized neural networks"
    - "efficient processing of deep neural networks a tutorial and survey"
    - "the implementation of a deep recurrent neural network language model on a xilinx fpga"
    - "finn a framework for fast scalable binarized neural network inference"
    - "dorefa net training low bitwidth convolutional neural networks with low bitwidth gradients"
    - "learning structured sparsity in deep neural networks"

Connected through hyperedge HE-4 (induced by source paper "energy efficient inference accelerator for memory augmented neural networks on an fpga"):
  with members:
    - "federated learning strategies for improving communication efficiency"
    - "accelerated training for massive classification via dynamic class selection"
    - "hardware automated datafow deployment of cnns"
    - "deeprebirth accelerating deep neural network execution on mobile devices"
    - "efficient processing of deep neural networks a tutorial and survey"
    - "quantized memory augmented neural networks"
    - "finn a framework for fast scalable binarized neural network inference"
    - "an efficient approach to boosting performance of deep spiking network training"

Connected through hyperedge HE-5 (induced by source paper "e pur an energy efficient processing unit for recurrent neural networks"):
  with members:
    - "residual lstm design of a deep recurrent architecture for distant speech recognition"
    - "ese efficient speech recognition engine with sparse lstm on fpga"
    - "fpga based low power speech recognition with recurrent neural networks"
    - "optimizing performance of recurrent neural networks on gpus"
    - "theano a python framework for fast computation of mathematical expressions"
    - "google s neural machine translation system bridging the gap between human and machine translation"
    - "fixed point quantization of deep convolutional networks"
    - "learning both weights and connections for efficient neural networks"

Connected through hyperedge HE-6 (induced by source paper "ese efficient speech recognition engine with sparse lstm on fpga"):
  with members:
    - "fpga based low power speech recognition with recurrent neural networks"
    - "eie efficient inference engine on compressed deep neural network"
    - "deep compression compressing deep neural networks with pruning trained quantization and huffman coding"
    - "learning both weights and connections for efficient neural networks"
    - "deep speech 2 end to end speech recognition in english and mandarin"
    - "on the properties of neural machine translation encoder decoder approaches"
    - "deep speech scaling up end to end speech recognition"

Question: Please tell me which class the center node belongs to. The 40 classes are: cs.NA(Numerical Analysis), cs.MM(Multimedia), cs.LO(Logic in Computer Science), cs.CY(Computers and Society), cs.CR(Cryptography and Security), cs.DC(Distributed, Parallel, and Cluster Computing), cs.HC(Human-Computer Interaction), cs.CE(Computational Engineering, Finance, and Science), cs.NI(Networking and Internet Architecture), cs.CC(Computational Complexity), cs.AI(Artificial Intelligence), cs.MA(Multiagent Systems), cs.GL(General Literature), cs.NE(Neural and Evolutionary Computing), cs.SC(Symbolic Computation), cs.AR(Hardware Architecture), cs.CV(Computer Vision and Pattern Recognition), cs.GR(Graphics), cs.ET(Emerging Technologies), cs.SY(Systems and Control), cs.CG(Computational Geometry), cs.OH(Other Computer Science), cs.PL(Programming Languages), cs.SE(Software Engineering), cs.LG(Machine Learning), cs.SD(Sound), cs.SI(Social and Information Networks), cs.RO(Robotics), cs.IT(Information Theory), cs.PF(Performance), cs.CL(Computation and Language), cs.IR(Information Retrieval), cs.MS(Mathematical Software), cs.FL(Formal Languages and Automata Theory), cs.DS(Data Structures and Algorithms), cs.OS(Operating Systems), cs.GT(Computer Science and Game Theory), cs.DB(Databases), cs.DL(Digital Libraries), cs.DM(Discrete Mathematics). Directly output the class name.

gpt: cs.NE(Neural and Evolutionary Computing)