human: Given a node-centered hypergraph: <hypergraph>, where nodes represent papers and hyperedges represent sets of papers co-cited by a source paper.

Details of the hypergraph:
Center node: "cachezoom how sgx amplifies the power of cache attacks"
  Abstract: In modern computing environments, hardware resources are commonly shared, and parallel computation is widely used. Parallel tasks can cause privacy and security problems if proper isolation is not enforced. Intel proposed SGX to create a trusted execution environment within the processor. SGX relies on the hardware, and claims runtime protection even if the OS and other software components are malicious. However, SGX disregards side-channel attacks. We introduce a powerful cache side-channel attack that provides system adversaries a high resolution channel. Our attack tool named CacheZoom is able to virtually track all memory accesses of SGX enclaves with high spatial and temporal precision. As proof of concept, we demonstrate AES key recovery attacks on commonly used implementations including those that were believed to be resistant in previous scenarios. Our results show that SGX cannot protect critical data sensitive computations, and efficient AES key recovery is possible in a practical environment. In contrast to previous works which require hundreds of measurements, this is the first cache side-channel attack on a real system that can recover AES keys with a minimal number of measurements. We can successfully recover AES keys from T-Table based implementations with as few as ten measurements.

Connected through hyperedge HE-1 (induced by source paper "copycat controlled instruction level attacks on enclaves for maximal key extraction"):
  with members:
    - "tpm fail tpm meets timing and lattice attacks"
    - "dr sgx automated and adjustable side channel protection for sgx using data location randomization"
    - "sgxpectre stealing intel secrets from sgx enclaves via speculative execution"
    - "hybcache hybrid side channel resilient caches for trusted execution environments"
    - "mitigating branch shadowing attacks on intel sgx using control flow randomization"
    - "microwalk a framework for finding side channels in binaries"
    - "software grand exposure sgx cache attacks are practical"
    - "the heisenberg defense proactively defending sgx enclaves against page table based side channel attacks"

Connected through hyperedge HE-2 (induced by source paper "deconstructing blockchains a comprehensive survey on consensus membership and structure"):
  with members:
    - "dfinity technology overview series consensus system"
    - "analysis of the xrp ledger consensus protocol"
    - "hotstuff bft consensus in the lens of blockchain"
    - "evaluating the red belly blockchain"
    - "an empirical analysis of anonymity in zcash"
    - "a survey on security and privacy issues of bitcoin"
    - "blockchains consensus protocols in the wild"
    - "consensus in the age of blockchains"

Connected through hyperedge HE-3 (induced by source paper "zombieload cross privilege boundary data sampling"):
  with members:
    - "smotherspectre exploiting speculative execution through port contention"
    - "fallout reading kernel writes from user space"
    - "store to leak forwarding leaking data on meltdown resistant cpus"
    - "spoiler speculative load hazards boost rowhammer and cache attacks"
    - "speculative buffer overflows attacks and defenses"
    - "netspectre read arbitrary memory over network"
    - "spectector principled detection of speculative information flows"
    - "spectre attacks exploiting speculative execution"

Connected through hyperedge HE-4 (induced by source paper "jackhammer efficient rowhammer on heterogeneous fpga cpu platforms"):
  with members:
    - "packet chasing spying on network packets over a cache side channel"
    - "fortuneteller predicting microarchitectural attacks via unsupervised deep learning"
    - "theory and practice of finding eviction sets"
    - "another flip in the wall of rowhammer defenses"
    - "perfweb how to violate web privacy with hardware performance events"
    - "autolock why cache attacks on arm are harder than you think"
    - "a software approach to defeating side channels in last level caches"
    - "flush flush a fast and stealthy cache attack"

Connected through hyperedge HE-5 (induced by source paper "hybcache hybrid side channel resilient caches for trusted execution environments"):
  with members:
    - "speculative buffer overflows attacks and defenses"
    - "spectre attacks exploiting speculative execution"
    - "spectre returns speculation attacks using the return stack buffer"
    - "ret2spec speculative execution using return stack buffers"
    - "software grand exposure sgx cache attacks are practical"
    - "malware guard extension using sgx to conceal cache attacks"
    - "a software approach to defeating side channels in last level caches"
    - "inferring fine grained control flow inside sgx enclaves with branch shadowing"

Connected through hyperedge HE-6 (induced by source paper "dr sgx automated and adjustable side channel protection for sgx using data location randomization"):
  with members:
    - "sgxpectre stealing intel secrets from sgx enclaves via speculative execution"
    - "hybcache hybrid side channel resilient caches for trusted execution environments"
    - "spectre attacks exploiting speculative execution"
    - "lazyfp leaking fpu register state using microarchitectural side channels"
    - "software grand exposure sgx cache attacks are practical"
    - "malware guard extension using sgx to conceal cache attacks"
    - "stacco differentially analyzing side channel traces for detecting ssl tls vulnerabilities in secure enclaves"
    - "hardidx practical and secure index with sgx"

Connected through hyperedge HE-7 (induced by source paper "sgx lkl securing the host os interface for trusted execution"):
  with members:
    - "keystone an open framework for architecting tees"
    - "dr sgx automated and adjustable side channel protection for sgx using data location randomization"
    - "zombieload cross privilege boundary data sampling"
    - "interface based side channel attack against intel sgx"
    - "obladi oblivious serializable transactions in the cloud"
    - "oblidb oblivious query processing for secure databases"
    - "software grand exposure sgx cache attacks are practical"
    - "prochlo strong privacy for analytics in the crowd"

Connected through hyperedge HE-8 (induced by source paper "an off chip attack on hardware enclaves via the memory bus"):
  with members:
    - "keystone an open framework for architecting tees"
    - "zombieload cross privilege boundary data sampling"
    - "software grand exposure sgx cache attacks are practical"
    - "rollback and forking detection for trusted execution environments using lightweight collective memory"
    - "malware guard extension using sgx to conceal cache attacks"
    - "inferring fine grained control flow inside sgx enclaves with branch shadowing"
    - "proof of luck an efficient blockchain consensus protocol"
    - "flush flush a fast and stealthy cache attack"

Question: Please tell me which class the center node belongs to. The 40 classes are: cs.NA(Numerical Analysis), cs.MM(Multimedia), cs.LO(Logic in Computer Science), cs.CY(Computers and Society), cs.CR(Cryptography and Security), cs.DC(Distributed, Parallel, and Cluster Computing), cs.HC(Human-Computer Interaction), cs.CE(Computational Engineering, Finance, and Science), cs.NI(Networking and Internet Architecture), cs.CC(Computational Complexity), cs.AI(Artificial Intelligence), cs.MA(Multiagent Systems), cs.GL(General Literature), cs.NE(Neural and Evolutionary Computing), cs.SC(Symbolic Computation), cs.AR(Hardware Architecture), cs.CV(Computer Vision and Pattern Recognition), cs.GR(Graphics), cs.ET(Emerging Technologies), cs.SY(Systems and Control), cs.CG(Computational Geometry), cs.OH(Other Computer Science), cs.PL(Programming Languages), cs.SE(Software Engineering), cs.LG(Machine Learning), cs.SD(Sound), cs.SI(Social and Information Networks), cs.RO(Robotics), cs.IT(Information Theory), cs.PF(Performance), cs.CL(Computation and Language), cs.IR(Information Retrieval), cs.MS(Mathematical Software), cs.FL(Formal Languages and Automata Theory), cs.DS(Data Structures and Algorithms), cs.OS(Operating Systems), cs.GT(Computer Science and Game Theory), cs.DB(Databases), cs.DL(Digital Libraries), cs.DM(Discrete Mathematics). Directly output the class name.

gpt: cs.CR(Cryptography and Security)