human: Given a node-centered hypergraph: <hypergraph>, where nodes represent papers and hyperedges represent sets of papers co-cited by a source paper.

Details of the hypergraph:
Center node: "group scissor scaling neuromorphic computing design to large neural networks"
  Abstract: Synapse crossbar is an elementary structure in Neuromorphic Computing Systems (NCS). However, the limited size of crossbars and heavy routing congestion impedes the NCS implementations of big neural networks. In this paper, we propose a two-step framework (namely, group scissor) to scale NCS designs to big neural networks. The first step is rank clipping, which integrates low-rank approximation into the training to reduce total crossbar area. The second step is group connection deletion, which structurally prunes connections to reduce routing congestion between crossbars. Tested on convolutional neural networks of LeNet on MNIST database and ConvNet on CIFAR-10 database, our experiments show significant reduction of crossbar area and routing area in NCS designs. Without accuracy loss, rank clipping reduces total crossbar area to 13.62\% and 51.81\% in the NCS designs of LeNet and ConvNet, respectively. Following rank clipping, group connection deletion further reduces the routing area of LeNet and ConvNet to 8.1\% and 52.06\%, respectively.

Connected through hyperedge HE-1 (induced by source paper "hypar towards hybrid parallelism for deep learning accelerator array"):
  with members:
    - "supporting very large models using automatic dataflow graph partitioning"
    - "red a reram based deconvolution accelerator"
    - "mt spike a multilayer time based spiking neuromorphic architecture with temporal error backpropagation"
    - "pt spike a precise time dependent single spike neuromorphic architecture with efficient supervised learning"
    - "ucnn exploiting computational reuse in deep neural networks via weight repetition"
    - "vibnn hardware acceleration of bayesian neural networks"
    - "revisiting small batch training for deep neural networks"
    - "unifying data model and hybrid parallelism in deep learning via tensor tiling"

Connected through hyperedge HE-2 (induced by source paper "puma a programmable ultra efficient memristor based accelerator for machine learning inference"):
  with members:
    - "vibnn hardware acceleration of bayesian neural networks"
    - "in datacenter performance analysis of a tensor processing unit"
    - "bridging the gap between neural networks and neuromorphic hardware with a neural network compiler"
    - "efficient processing of deep neural networks a tutorial and survey"
    - "trannsformer n eural n etwork transform ation for memristive crossbar based neuromorphic system design"
    - "scnn an accelerator for compressed sparse convolutional neural networks"
    - "c ir cnn accelerating and compressing deep neural networks using block circulant weight matrices"
    - "resparc a reconfigurable and energy efficient architecture with memristive crossbars for deep spiking neural networks"

Connected through hyperedge HE-3 (induced by source paper "an ultra efficient memristor based dnn framework with structured weight pruning and quantization using admm"):
  with members:
    - "26ms inference time for resnet 50 towards real time execution of all dnns on smartphone"
    - "toward extremely low bit and lossless accuracy in dnns with progressive admm"
    - "progressive dnn compression a key to achieve ultra high weight pruning and quantization rates using admm"
    - "resnet can be pruned 60x introducing network purification and unused path removal p rm after weight pruning"
    - "an area and energy efficient design of domain wall memory based deep convolutional neural networks using stochastic computing"
    - "adam admm a unified systematic framework of structured weight pruning for dnns"
    - "scalable noc based neuromorphic hardware learning and inference"
    - "trannsformer n eural n etwork transform ation for memristive crossbar based neuromorphic system design"

Connected through hyperedge HE-4 (induced by source paper "x changr changing memristive crossbar mapping for mitigating line resistance induced accuracy degradation in deep neural networks"):
  with members:
    - "puma a programmable ultra efficient memristor based accelerator for machine learning inference"
    - "neuromorphic computing with multi memristive synapses"
    - "rxnn a framework for evaluating deep neural networks on resistive crossbars"
    - "8t sram cell as a multi bit dot product engine for beyond von neumann computing"
    - "technology aware training in memristive neuromorphic systems for nonideal synaptic crossbars"
    - "xcel ram accelerating binary neural networks in high throughput sram compute arrays"
    - "trannsformer n eural n etwork transform ation for memristive crossbar based neuromorphic system design"
    - "proposal for an all spin artificial neural network emulating neural and synaptic functionalities through domain wall motion in ferromagnets"

Connected through hyperedge HE-5 (induced by source paper "towards accurate and high speed spiking neuromorphic systems with data quantization aware deep networks"):
  with members:
    - "classification accuracy improvement for neuromorphic computing systems with one level precision synapses"
    - "resparc a reconfigurable and energy efficient architecture with memristive crossbars for deep spiking neural networks"
    - "hardware software codesign of accurate multiplier free deep neural networks"
    - "hardware oriented approximation of convolutional neural networks"
    - "eie efficient inference engine on compressed deep neural network"
    - "xnor net imagenet classification using binary convolutional neural networks"
    - "convolutional networks for fast energy efficient neuromorphic computing"
    - "deep compression compressing deep neural networks with pruning trained quantization and huffman coding"

Connected through hyperedge HE-6 (induced by source paper "rxnn a framework for evaluating deep neural networks on resistive crossbars"):
  with members:
    - "analog cmos based resistive processing unit for deep neural network training"
    - "a survey of neuromorphic computing and neural networks in hardware"
    - "training deep convolutional neural networks with resistive cross point devices"
    - "proposal for an all spin artificial neural network emulating neural and synaptic functionalities through domain wall motion in ferromagnets"
    - "acceleration of deep neural network training with resistive cross point devices design considerations"
    - "stt snn a spin transfer torque based soft limiting non linear neuron for low power artificial neural networks"
    - "deep learning with limited numerical precision"
    - "caffe convolutional architecture for fast feature embedding"

Connected through hyperedge HE-7 (induced by source paper "a memristor based optimization framework for ai applications"):
  with members:
    - "algorithm hardware co optimization of the memristor based framework for solving socp and homogeneous qcqp problems"
    - "a survey of neuromorphic computing and neural networks in hardware"
    - "training a probabilistic graphical model with resistive switching electronic synapses"
    - "optimization with sparsity inducing penalties"
    - "optimal spectrum sharing in mimo cognitive radio networks via semidefinite programming"
    - "subspace pursuit for compressive sensing signal reconstruction"

Question: Please tell me which class the center node belongs to. The 40 classes are: cs.NA(Numerical Analysis), cs.MM(Multimedia), cs.LO(Logic in Computer Science), cs.CY(Computers and Society), cs.CR(Cryptography and Security), cs.DC(Distributed, Parallel, and Cluster Computing), cs.HC(Human-Computer Interaction), cs.CE(Computational Engineering, Finance, and Science), cs.NI(Networking and Internet Architecture), cs.CC(Computational Complexity), cs.AI(Artificial Intelligence), cs.MA(Multiagent Systems), cs.GL(General Literature), cs.NE(Neural and Evolutionary Computing), cs.SC(Symbolic Computation), cs.AR(Hardware Architecture), cs.CV(Computer Vision and Pattern Recognition), cs.GR(Graphics), cs.ET(Emerging Technologies), cs.SY(Systems and Control), cs.CG(Computational Geometry), cs.OH(Other Computer Science), cs.PL(Programming Languages), cs.SE(Software Engineering), cs.LG(Machine Learning), cs.SD(Sound), cs.SI(Social and Information Networks), cs.RO(Robotics), cs.IT(Information Theory), cs.PF(Performance), cs.CL(Computation and Language), cs.IR(Information Retrieval), cs.MS(Mathematical Software), cs.FL(Formal Languages and Automata Theory), cs.DS(Data Structures and Algorithms), cs.OS(Operating Systems), cs.GT(Computer Science and Game Theory), cs.DB(Databases), cs.DL(Digital Libraries), cs.DM(Discrete Mathematics). Directly output the class name.

gpt: cs.NE(Neural and Evolutionary Computing)