human: Given a node-centered hypergraph: <hypergraph>, where nodes represent papers and hyperedges represent sets of papers co-cited by a source paper.

Details of the hypergraph:
Center node: "hardware driven nonlinear activation for stochastic computing based deep convolutional neural networks"
  Abstract: Recently, Deep Convolutional Neural Networks (DCNNs) have made unprecedented progress, achieving the accuracy close to, or even better than human-level perception in various tasks. There is a timely need to map the latest software DCNNs to application-specific hardware, in order to achieve orders of magnitude improvement in performance, energy efficiency and compactness. Stochastic Computing (SC), as a low-cost alternative to the conventional binary computing paradigm, has the potential to enable massively parallel and highly scalable hardware implementation of DCNNs. One major challenge in SC based DCNNs is designing accurate nonlinear activation functions, which have a significant impact on the network-level accuracy but cannot be implemented accurately by existing SC computing blocks. In this paper, we design and optimize SC based neurons, and we propose highly accurate activation designs for the three most frequently used activation functions in software DCNNs, i.e, hyperbolic tangent, logistic, and rectified linear units. Experimental results on LeNet-5 using MNIST dataset demonstrate that compared with a binary ASIC hardware DCNN, the DCNN with the proposed SC neurons can achieve up to 61X, 151X, and 2X improvement in terms of area, power, and energy, respectively, at the cost of small precision degradation.In addition, the SC approach achieves up to 21X and 41X of the area, 41X and 72X of the power, and 198200X and 96443X of the energy, compared with CPU and GPU approaches, respectively, while the error is increased by less than 3.07%. ReLU activation is suggested for future SC based DCNNs considering its superior performance under a small bit stream length.

Connected through hyperedge HE-1 (induced by source paper "energy efficient stochastic computing with superparamagnetic tunnel junctions"):
  with members:
    - "low barrier magnet design for efficient hardware binary stochastic neurons"
    - "p bits for probabilistic spin logic"
    - "voltage driven building block for hardware belief networks"
    - "implementing bayesian networks with embedded stochastic mram"
    - "efficient processing of deep neural networks a tutorial and survey"
    - "vlsi implementation of deep neural network using integral stochastic computing"
    - "reservoir computing using stochastic p bits"
    - "dorefa net training low bitwidth convolutional neural networks with low bitwidth gradients"

Connected through hyperedge HE-2 (induced by source paper "design space exploration of neural network activation function circuits"):
  with members:
    - "ese efficient speech recognition engine with sparse lstm on fpga"
    - "quantized neural networks training neural networks with low precision weights and activations"
    - "fast and accurate deep network learning by exponential linear units elus"

Connected through hyperedge HE-3 (induced by source paper "structured weight matrices based hardware accelerators in deep neural networks fpgas and asics"):
  with members:
    - "in datacenter performance analysis of a tensor processing unit"
    - "c ir cnn accelerating and compressing deep neural networks using block circulant weight matrices"
    - "ese efficient speech recognition engine with sparse lstm on fpga"
    - "eie efficient inference engine on compressed deep neural network"
    - "convolutional networks for fast energy efficient neuromorphic computing"
    - "an empirical evaluation of deep learning on highway driving"
    - "deep compression compressing deep neural networks with pruning trained quantization and huffman coding"
    - "deep learning in neural networks"

Connected through hyperedge HE-4 (induced by source paper "on the universal approximation property and equivalence of stochastic computing based neural networks and binary neural networks"):
  with members:
    - "deep reinforcement learning framework applications and embedded implementations"
    - "finn a framework for fast scalable binarized neural network inference"
    - "theoretical properties for neural networks with weight matrices of low displacement rank"
    - "benefits of depth in neural networks"
    - "why deep neural networks for function approximation"
    - "eie efficient inference engine on compressed deep neural network"
    - "quantized neural networks training neural networks with low precision weights and activations"

Connected through hyperedge HE-5 (induced by source paper "an area and energy efficient design of domain wall memory based deep convolutional neural networks using stochastic computing"):
  with members:
    - "fft based deep learning deployment in embedded systems"
    - "c ir cnn accelerating and compressing deep neural networks using block circulant weight matrices"
    - "yodann an architecture for ultra low power binary weight cnn acceleration"
    - "sc dcnn highly scalable deep convolutional neural network using stochastic computing"
    - "yodann an ultra low power convolutional neural network accelerator based on binary weights"
    - "deep learning in neural networks"

Connected through hyperedge HE-6 (induced by source paper "towards budget driven hardware optimization for deep convolutional neural networks using stochastic computing"):
  with members:
    - "fft based deep learning deployment in embedded systems"
    - "c ir cnn accelerating and compressing deep neural networks using block circulant weight matrices"
    - "very deep convolutional networks for large scale image recognition"

Connected through hyperedge HE-7 (induced by source paper "scalable noc based neuromorphic hardware learning and inference"):
  with members:
    - "towards ultra high performance and energy efficiency of deep learning systems an algorithm hardware co optimization framework"
    - "fft based deep learning deployment in embedded systems"
    - "c ir cnn accelerating and compressing deep neural networks using block circulant weight matrices"

Connected through hyperedge HE-8 (induced by source paper "stochastic synthesis for stochastic computing"):
  with members:
    - "energy efficient hybrid stochastic binary neural networks for near sensor computing"

Question: Please tell me which class the center node belongs to. The 40 classes are: cs.NA(Numerical Analysis), cs.MM(Multimedia), cs.LO(Logic in Computer Science), cs.CY(Computers and Society), cs.CR(Cryptography and Security), cs.DC(Distributed, Parallel, and Cluster Computing), cs.HC(Human-Computer Interaction), cs.CE(Computational Engineering, Finance, and Science), cs.NI(Networking and Internet Architecture), cs.CC(Computational Complexity), cs.AI(Artificial Intelligence), cs.MA(Multiagent Systems), cs.GL(General Literature), cs.NE(Neural and Evolutionary Computing), cs.SC(Symbolic Computation), cs.AR(Hardware Architecture), cs.CV(Computer Vision and Pattern Recognition), cs.GR(Graphics), cs.ET(Emerging Technologies), cs.SY(Systems and Control), cs.CG(Computational Geometry), cs.OH(Other Computer Science), cs.PL(Programming Languages), cs.SE(Software Engineering), cs.LG(Machine Learning), cs.SD(Sound), cs.SI(Social and Information Networks), cs.RO(Robotics), cs.IT(Information Theory), cs.PF(Performance), cs.CL(Computation and Language), cs.IR(Information Retrieval), cs.MS(Mathematical Software), cs.FL(Formal Languages and Automata Theory), cs.DS(Data Structures and Algorithms), cs.OS(Operating Systems), cs.GT(Computer Science and Game Theory), cs.DB(Databases), cs.DL(Digital Libraries), cs.DM(Discrete Mathematics). Directly output the class name.

gpt: cs.CV(Computer Vision and Pattern Recognition)