human: Given a node-centered hypergraph: <hypergraph>, where nodes represent papers and hyperedges represent sets of papers co-cited by a source paper.

Details of the hypergraph:
Center node: "zombieload cross privilege boundary data sampling"
  Abstract: In early 2018, Meltdown first showed how to read arbitrary kernel memory from user space by exploiting side-effects from transient instructions. While this attack has been mitigated through stronger isolation boundaries between user and kernel space, Meltdown inspired an entirely new class of fault-driven transient execution attacks. Particularly, over the past year, Meltdown-type attacks have been extended to not only leak data from the L1 cache but also from various other microarchitectural structures, including the FPU register file and store buffer. #R##N#In this paper, we present the ZombieLoad attack which uncovers a novel Meltdown-type effect in the processor's previously unexplored fill-buffer logic. Our analysis shows that faulting load instructions (i.e., loads that have to be re-issued for either architectural or microarchitectural reasons) may transiently dereference unauthorized destinations previously brought into the fill buffer by the current or a sibling logical CPU. Hence, we report data leakage of recently loaded stale values across logical cores. We demonstrate ZombieLoad's effectiveness in a multitude of practical attack scenarios across CPU privilege rings, OS processes, virtual machines, and SGX enclaves. We discuss both short and long-term mitigation approaches and arrive at the conclusion that disabling hyperthreading is the only possible workaround to prevent this extremely powerful attack on current processors.

Connected through hyperedge HE-1 (induced by source paper "hardware security for and beyond cmos technology an overview on fundamentals applications and challenges"):
  with members:
    - "towards secure composition of integrated circuits and electronic systems on the role of eda"
    - "exploiting spin orbit torque devices as reconfigurable logic for circuit obfuscation"
    - "smart secure magnetoelectric antiferromagnet based tamper proof non volatile memory"
    - "a modern approach to ip protection and trojan prevention split manufacturing for 3d ics and obfuscation of vertical interconnects"
    - "a new paradigm in split manufacturing lock the feol unlock at the beol"
    - "spin orbit torque devices for hardware security from deterministic to probabilistic regime"
    - "protect your chip design intellectual property an overview"
    - "3d integration another dimension toward hardware security"

Connected through hyperedge HE-2 (induced by source paper "context leakage free transient execution"):
  with members:
    - "fallout reading kernel writes from user space"
    - "spectre is here to stay an analysis of side channels and speculative execution"
    - "store to leak forwarding leaking data on meltdown resistant cpus"
    - "speculative buffer overflows attacks and defenses"
    - "netspectre read arbitrary memory over network"
    - "safespec banishing the spectre of a meltdown with leakage free speculation"
    - "meltdownprime and spectreprime automatically synthesized attacks exploiting invalidation based coherence protocols"
    - "spectre attacks exploiting speculative execution"

Connected through hyperedge HE-3 (induced by source paper "shredder learning noise to protect privacy with partial dnn inference on the edge"):
  with members:
    - "chiron privacy preserving machine learning as a service"
    - "spectre attacks exploiting speculative execution"
    - "gazelle a low latency framework for secure neural network inference"
    - "not just privacy improving performance of private deep learning in mobile cloud"
    - "efficient processing of deep neural networks a tutorial and survey"
    - "hypothesis testing under mutual information privacy constraints in the high privacy regime"
    - "opening the black box of deep neural networks via information"
    - "prochlo strong privacy for analytics in the crowd"

Connected through hyperedge HE-4 (induced by source paper "speccfi mitigating spectre attacks using cfi informed speculation"):
  with members:
    - "context leakage free transient execution"
    - "smotherspectre exploiting speculative execution through port contention"
    - "store to leak forwarding leaking data on meltdown resistant cpus"
    - "speculative buffer overflows attacks and defenses"
    - "netspectre read arbitrary memory over network"
    - "safespec banishing the spectre of a meltdown with leakage free speculation"
    - "spectre attacks exploiting speculative execution"
    - "you shall not bypass employing data dependencies to prevent bounds check bypass"

Connected through hyperedge HE-5 (induced by source paper "towards constant time foundations for the new spectre era"):
  with members:
    - "abstract interpretation under speculative execution"
    - "spectre is here to stay an analysis of side channels and speculative execution"
    - "store to leak forwarding leaking data on meltdown resistant cpus"
    - "spoiler speculative load hazards boost rowhammer and cache attacks"
    - "inspectre breaking and fixing microarchitectural vulnerabilities by formal analysis"
    - "eliminating timing side channel leaks using program repair"
    - "speculative buffer overflows attacks and defenses"
    - "spectector principled detection of speculative information flows"

Connected through hyperedge HE-6 (induced by source paper "fortuneteller predicting microarchitectural attacks via unsupervised deep learning"):
  with members:
    - "fallout reading kernel writes from user space"
    - "undermining user privacy on mobile devices using ai"
    - "tiresias predicting security events through deep learning"
    - "ret2spec speculative execution using return stack buffers"
    - "microwalk a framework for finding side channels in binaries"
    - "state of the art speech recognition with sequence to sequence models"
    - "generic black box end to end attack against state of the art api call based malware classifiers"
    - "flush flush a fast and stealthy cache attack"

Connected through hyperedge HE-7 (induced by source paper "inspectre breaking and fixing microarchitectural vulnerabilities by formal analysis"):
  with members:
    - "towards constant time foundations for the new spectre era"
    - "spectre is here to stay an analysis of side channels and speculative execution"
    - "sgxpectre stealing intel secrets from sgx enclaves via speculative execution"
    - "kleespectre detecting information leakage through speculative cache attacks via symbolic execution"
    - "speculative buffer overflows attacks and defenses"
    - "spectector principled detection of speculative information flows"
    - "spectre attacks exploiting speculative execution"
    - "spectre returns speculation attacks using the return stack buffer"

Connected through hyperedge HE-8 (induced by source paper "sgx lkl securing the host os interface for trusted execution"):
  with members:
    - "keystone an open framework for architecting tees"
    - "dr sgx automated and adjustable side channel protection for sgx using data location randomization"
    - "interface based side channel attack against intel sgx"
    - "obladi oblivious serializable transactions in the cloud"
    - "cachezoom how sgx amplifies the power of cache attacks"
    - "oblidb oblivious query processing for secure databases"
    - "software grand exposure sgx cache attacks are practical"
    - "prochlo strong privacy for analytics in the crowd"

Question: Please tell me which class the center node belongs to. The 40 classes are: cs.NA(Numerical Analysis), cs.MM(Multimedia), cs.LO(Logic in Computer Science), cs.CY(Computers and Society), cs.CR(Cryptography and Security), cs.DC(Distributed, Parallel, and Cluster Computing), cs.HC(Human-Computer Interaction), cs.CE(Computational Engineering, Finance, and Science), cs.NI(Networking and Internet Architecture), cs.CC(Computational Complexity), cs.AI(Artificial Intelligence), cs.MA(Multiagent Systems), cs.GL(General Literature), cs.NE(Neural and Evolutionary Computing), cs.SC(Symbolic Computation), cs.AR(Hardware Architecture), cs.CV(Computer Vision and Pattern Recognition), cs.GR(Graphics), cs.ET(Emerging Technologies), cs.SY(Systems and Control), cs.CG(Computational Geometry), cs.OH(Other Computer Science), cs.PL(Programming Languages), cs.SE(Software Engineering), cs.LG(Machine Learning), cs.SD(Sound), cs.SI(Social and Information Networks), cs.RO(Robotics), cs.IT(Information Theory), cs.PF(Performance), cs.CL(Computation and Language), cs.IR(Information Retrieval), cs.MS(Mathematical Software), cs.FL(Formal Languages and Automata Theory), cs.DS(Data Structures and Algorithms), cs.OS(Operating Systems), cs.GT(Computer Science and Game Theory), cs.DB(Databases), cs.DL(Digital Libraries), cs.DM(Discrete Mathematics). Directly output the class name.

gpt: cs.CR(Cryptography and Security)