human: Given a node-centered hypergraph: <hypergraph>, where nodes represent papers and hyperedges represent sets of papers co-cited by a source paper.

Details of the hypergraph:
Center node: "hybcache hybrid side channel resilient caches for trusted execution environments"
  Abstract: Modern multi-core processors share cache resources for maximum cache utilization and performance gains. However, this leaves the cache vulnerable to side-channel attacks, where timing differences in shared cache behavior are exploited to infer information on the victim's execution patterns, ultimately leaking private information. The root cause for these attacks is mutually distrusting processes sharing cache entries and accessing them in a deterministic manner. Various defenses against cache side-channel attacks have been proposed. However, they either degrade performance significantly, impose impractical restrictions, or can only defeat certain classes of these attacks. More importantly, they assume that side-channel-resilient caches are required for the entire execution workload and do not allow to selectively enable the mitigation only for the security-critical portion of the workload. We present a generic mechanism for a flexible and soft partitioning of set-associative caches and propose a hybrid cache architecture, called HybCache. HybCache can be configured to selectively apply side-channel-resilient cache behavior only for isolated execution domains, while providing the non-isolated execution with conventional cache behavior, capacity and performance. An isolation domain can include one or more processes, specific portions of code, or a Trusted Execution Environment. We show that, with minimal hardware modifications and kernel support, HybCache can provide side-channel-resilient cache only for isolated execution with a performance overhead of 3.5-5%, while incurring no performance overhead for the remaining execution workload. We provide a simulator-based and hardware implementation of HybCache to evaluate the performance and area overheads, and show how it mitigates typical access-based and contention-based cache attacks.

Connected through hyperedge HE-1 (induced by source paper "copycat controlled instruction level attacks on enclaves for maximal key extraction"):
  with members:
    - "tpm fail tpm meets timing and lattice attacks"
    - "dr sgx automated and adjustable side channel protection for sgx using data location randomization"
    - "sgxpectre stealing intel secrets from sgx enclaves via speculative execution"
    - "mitigating branch shadowing attacks on intel sgx using control flow randomization"
    - "microwalk a framework for finding side channels in binaries"
    - "cachezoom how sgx amplifies the power of cache attacks"
    - "software grand exposure sgx cache attacks are practical"
    - "the heisenberg defense proactively defending sgx enclaves against page table based side channel attacks"

Connected through hyperedge HE-2 (induced by source paper "dr sgx automated and adjustable side channel protection for sgx using data location randomization"):
  with members:
    - "sgxpectre stealing intel secrets from sgx enclaves via speculative execution"
    - "spectre attacks exploiting speculative execution"
    - "lazyfp leaking fpu register state using microarchitectural side channels"
    - "cachezoom how sgx amplifies the power of cache attacks"
    - "software grand exposure sgx cache attacks are practical"
    - "malware guard extension using sgx to conceal cache attacks"
    - "stacco differentially analyzing side channel traces for detecting ssl tls vulnerabilities in secure enclaves"
    - "hardidx practical and secure index with sgx"

Question: Please tell me which class the center node belongs to. The 40 classes are: cs.NA(Numerical Analysis), cs.MM(Multimedia), cs.LO(Logic in Computer Science), cs.CY(Computers and Society), cs.CR(Cryptography and Security), cs.DC(Distributed, Parallel, and Cluster Computing), cs.HC(Human-Computer Interaction), cs.CE(Computational Engineering, Finance, and Science), cs.NI(Networking and Internet Architecture), cs.CC(Computational Complexity), cs.AI(Artificial Intelligence), cs.MA(Multiagent Systems), cs.GL(General Literature), cs.NE(Neural and Evolutionary Computing), cs.SC(Symbolic Computation), cs.AR(Hardware Architecture), cs.CV(Computer Vision and Pattern Recognition), cs.GR(Graphics), cs.ET(Emerging Technologies), cs.SY(Systems and Control), cs.CG(Computational Geometry), cs.OH(Other Computer Science), cs.PL(Programming Languages), cs.SE(Software Engineering), cs.LG(Machine Learning), cs.SD(Sound), cs.SI(Social and Information Networks), cs.RO(Robotics), cs.IT(Information Theory), cs.PF(Performance), cs.CL(Computation and Language), cs.IR(Information Retrieval), cs.MS(Mathematical Software), cs.FL(Formal Languages and Automata Theory), cs.DS(Data Structures and Algorithms), cs.OS(Operating Systems), cs.GT(Computer Science and Game Theory), cs.DB(Databases), cs.DL(Digital Libraries), cs.DM(Discrete Mathematics). Directly output the class name.

gpt: cs.CR(Cryptography and Security)