human: Given a node-centered hypergraph: <hypergraph>, where nodes represent papers and hyperedges represent sets of papers co-cited by a source paper.

Details of the hypergraph:
Center node: "synetgy algorithm hardware co design for convnet accelerators on embedded fpgas"
  Abstract: Using FPGAs to accelerate ConvNets has attracted significant attention in recent years. However, FPGA accelerator design has not leveraged the latest progress of ConvNets. As a result, the key application characteristics such as frames-per-second (FPS) are ignored in favor of simply counting GOPs, and results on accuracy, which is critical to application success, are often not even reported. In this work, we adopt an algorithm-hardware co-design approach to develop a ConvNet accelerator called Synetgy and a novel ConvNet model called DiracDeltaNet. Both the accelerator and ConvNet are tailored to FPGA requirements. DiracDeltaNet, as the name suggests, is a ConvNet with only $1\times 1$ convolutions while spatial convolutions are replaced by more efficient shift operations. DiracDeltaNet achieves competitive accuracy on ImageNet (89.0% top-5), but with 48× fewer parameters and 65× fewer OPs than VGG16. We further quantize DiracDeltaNet's weights to 1-bit and activations to 4-bits, with less than 1% accuracy loss. These quantizations exploit well the nature of FPGA hardware. In short, DiracDeltaNet's small model size, low computational OP count, ultra-low precision and simplified operators allow us to co-design a highly customized computing unit for an FPGA. We implement the computing units for DiracDeltaNet on an Ultra96 SoC system through high-level synthesis. Our accelerator's final top-5 accuracy of 88.2% on ImageNet, is higher than all the previously reported embedded FPGA accelerators. In addition, the accelerator reaches an inference speed of 96.5 FPS on the ImageNet classification task, surpassing prior works with similar accuracy by at least 16.9×.

Connected through hyperedge HE-1 (induced by source paper "performance oriented neural architecture search"):
  with members:
    - "quenn quantization engine for low power neural networks"
    - "streaming end to end speech recognition for mobile devices"
    - "proxylessnas direct neural architecture search on target task and hardware"
    - "speech commands a dataset for limited vocabulary speech recognition"
    - "hello edge keyword spotting on microcontrollers"
    - "optimal dnn primitive selection with partitioned boolean quadratic programming"
    - "squeezenet alexnet level accuracy with 50x fewer parameters and 0 5mb model size"
    - "smash one shot model architecture search through hypernetworks"

Connected through hyperedge HE-2 (induced by source paper "squeezewave extremely lightweight vocoders for on device speech synthesis"):
  with members:
    - "waveglow a flow based generative network for speech synthesis"
    - "mobilenetv2 inverted residuals and linear bottlenecks"
    - "squeezesegv2 improved model structure and unsupervised domain adaptation for road object segmentation from a lidar point cloud"
    - "efficient neural audio synthesis"
    - "squeezenext hardware aware neural network design"
    - "shift a zero flop zero parameter alternative to spatial convolutions"
    - "mobilenets efficient convolutional neural networks for mobile vision applications"
    - "deep voice 3 2000 speaker neural text to speech"

Connected through hyperedge HE-3 (induced by source paper "non structured dnn weight pruning is it beneficial in any platform"):
  with members:
    - "adversarial robustness vs model compression or both"
    - "hypar towards hybrid parallelism for deep learning accelerator array"
    - "2pfpce two phase filter pruning based on conditional entropy"
    - "bag of tricks for image classification with convolutional neural networks"
    - "mobilenetv2 inverted residuals and linear bottlenecks"
    - "learning and generalization in overparameterized neural networks going beyond two layers"
    - "morph flexible acceleration for 3d cnn based video understanding"
    - "admm nn an algorithm hardware co design framework of dnns using alternating direction method of multipliers"

Connected through hyperedge HE-4 (induced by source paper "domain aware dynamic networks"):
  with members:
    - "test time training for out of distribution generalization"
    - "domain randomization and pyramid consistency simulation to real generalization without accessing target domain data"
    - "multi source domain adaptation for semantic segmentation"
    - "condconv conditionally parameterized convolutions for efficient inference"
    - "metapruning meta learning for automatic neural network channel pruning"
    - "searching for mobilenetv3"
    - "single path one shot neural architecture search with uniform sampling"
    - "tafe net task aware feature embeddings for low shot learning"

Connected through hyperedge HE-5 (induced by source paper "hawq hessian aware quantization of neural networks with mixed precision"):
  with members:
    - "quantizing deep convolutional networks for efficient inference a whitepaper"
    - "mobilenetv2 inverted residuals and linear bottlenecks"
    - "lq nets learned quantization for highly accurate and compact deep neural networks"
    - "shufflenet v2 practical guidelines for efficient cnn architecture design"
    - "mixed precision quantization of convnets via differentiable neural architecture search"
    - "hessian based analysis of large batch training and robustness to adversaries"
    - "large batch size training of neural networks with adversarial training and second order information"
    - "pact parameterized clipping activation for quantized neural networks"

Connected through hyperedge HE-6 (induced by source paper "attention based pruning for shift networks"):
  with members:
    - "learning to prune filters in convolutional neural networks"
    - "mobilenetv2 inverted residuals and linear bottlenecks"
    - "quantized guided pruning for efficient hardware implementations of convolutional neural networks"
    - "deep k means re training and parameter sharing with harder cluster assignments for compressing deep convolutions"
    - "constructing fast network through deconstruction of convolution"
    - "soft filter pruning for accelerating deep convolutional neural networks"
    - "nisp pruning networks using neuron importance score propagation"
    - "shift a zero flop zero parameter alternative to spatial convolutions"

Connected through hyperedge HE-7 (induced by source paper "4 connected shift residual networks"):
  with members:
    - "all you need is a few shifts designing efficient convolutional neural networks for image classification"
    - "approximating cnns with bag of local features models works surprisingly well on imagenet"
    - "residual networks of residual networks multilevel residual networks"
    - "mobilenetv2 inverted residuals and linear bottlenecks"
    - "benchmark analysis of representative deep neural network architectures"
    - "motion feature network fixed motion filter for action recognition"
    - "constructing fast network through deconstruction of convolution"
    - "learning transferable architectures for scalable image recognition"

Connected through hyperedge HE-8 (induced by source paper "tuning algorithms and generators for efficient edge inference"):
  with members:
    - "fully learnable group convolution for acceleration of deep neural networks"
    - "bridging the accuracy gap for 2 bit quantized neural networks qnn"
    - "learning grouped convolution for efficient domain adaptation"
    - "mpdcompress matrix permutation decomposition algorithm for deep neural network compression"
    - "chamnet towards efficient network design through platform aware model adaptation"
    - "block sparse recurrent neural networks"
    - "in datacenter performance analysis of a tensor processing unit"
    - "attention is all you need"

Question: Please tell me which class the center node belongs to. The 40 classes are: cs.NA(Numerical Analysis), cs.MM(Multimedia), cs.LO(Logic in Computer Science), cs.CY(Computers and Society), cs.CR(Cryptography and Security), cs.DC(Distributed, Parallel, and Cluster Computing), cs.HC(Human-Computer Interaction), cs.CE(Computational Engineering, Finance, and Science), cs.NI(Networking and Internet Architecture), cs.CC(Computational Complexity), cs.AI(Artificial Intelligence), cs.MA(Multiagent Systems), cs.GL(General Literature), cs.NE(Neural and Evolutionary Computing), cs.SC(Symbolic Computation), cs.AR(Hardware Architecture), cs.CV(Computer Vision and Pattern Recognition), cs.GR(Graphics), cs.ET(Emerging Technologies), cs.SY(Systems and Control), cs.CG(Computational Geometry), cs.OH(Other Computer Science), cs.PL(Programming Languages), cs.SE(Software Engineering), cs.LG(Machine Learning), cs.SD(Sound), cs.SI(Social and Information Networks), cs.RO(Robotics), cs.IT(Information Theory), cs.PF(Performance), cs.CL(Computation and Language), cs.IR(Information Retrieval), cs.MS(Mathematical Software), cs.FL(Formal Languages and Automata Theory), cs.DS(Data Structures and Algorithms), cs.OS(Operating Systems), cs.GT(Computer Science and Game Theory), cs.DB(Databases), cs.DL(Digital Libraries), cs.DM(Discrete Mathematics). Directly output the class name.

gpt: cs.CV(Computer Vision and Pattern Recognition)