human: Given a node-centered hypergraph: <hypergraph>, where nodes represent papers and hyperedges represent sets of papers co-cited by a source paper.

Details of the hypergraph:
Center node: "in dram bulk bitwise execution engine"
  Abstract: Many applications heavily use bitwise operations on large bitvectors as part of their computation. In existing systems, performing such bulk bitwise operations requires the processor to transfer a large amount of data on the memory channel, thereby consuming high latency, memory bandwidth, and energy. In this paper, we describe Ambit, a recently-proposed mechanism to perform bulk bitwise operations completely inside main memory. Ambit exploits the internal organization and analog operation of DRAM-based memory to achieve low cost, high performance, and low energy. Ambit exposes a new bulk bitwise execution model to the host processor. Evaluations show that Ambit significantly improves the performance of several applications that use bulk bitwise operations, including databases.

Connected through hyperedge HE-1 (induced by source paper "eden enabling energy efficient high performance deep neural network inference using approximate dram"):
  with members:
    - "generalized intersection over union a metric and a loss for bounding box regression"
    - "analyzing and mitigating the impact of permanent faults on a systolic array based neural network accelerator"
    - "amc automl for model compression and acceleration on mobile devices"
    - "high accuracy low precision training"
    - "nullanet training deep neural networks for reduced memory access inference"
    - "towards understanding the role of over parametrization in generalization of neural networks"
    - "tvm an automated end to end optimizing compiler for deep learning"
    - "development of real time adas object detector for deployment on cpu"

Connected through hyperedge HE-2 (induced by source paper "a workload and programming ease driven perspective of processing in memory"):
  with members:
    - "processing data where it makes sense enabling in memory computation"
    - "rowhammer a retrospective"
    - "accelerating bulk bit wise x n or operation in processing in dram platform"
    - "shouji a fast and efficient pre alignment filter for sequence alignment"
    - "enabling the adoption of processing in memory challenges mechanisms future research directions"
    - "memristive devices for computation in memory"
    - "what your dram power models are not telling you lessons from a detailed experimental study"
    - "the rowhammer problem and other issues we may face as memory becomes denser"

Connected through hyperedge HE-3 (induced by source paper "understanding the interactions of workloads and dram types a comprehensive experimental study"):
  with members:
    - "rowhammer a retrospective"
    - "memory centric characterization and analysis of spec cpu2017 suite"
    - "d range using commodity dram devices to generate true random numbers with low latency and high throughput"
    - "understanding and improving the latency of dram based memory systems"
    - "reducing dram latency at low cost by exploiting heterogeneity"
    - "improving dram performance by parallelizing refreshes with accesses"

Question: Please tell me which class the center node belongs to. The 40 classes are: cs.NA(Numerical Analysis), cs.MM(Multimedia), cs.LO(Logic in Computer Science), cs.CY(Computers and Society), cs.CR(Cryptography and Security), cs.DC(Distributed, Parallel, and Cluster Computing), cs.HC(Human-Computer Interaction), cs.CE(Computational Engineering, Finance, and Science), cs.NI(Networking and Internet Architecture), cs.CC(Computational Complexity), cs.AI(Artificial Intelligence), cs.MA(Multiagent Systems), cs.GL(General Literature), cs.NE(Neural and Evolutionary Computing), cs.SC(Symbolic Computation), cs.AR(Hardware Architecture), cs.CV(Computer Vision and Pattern Recognition), cs.GR(Graphics), cs.ET(Emerging Technologies), cs.SY(Systems and Control), cs.CG(Computational Geometry), cs.OH(Other Computer Science), cs.PL(Programming Languages), cs.SE(Software Engineering), cs.LG(Machine Learning), cs.SD(Sound), cs.SI(Social and Information Networks), cs.RO(Robotics), cs.IT(Information Theory), cs.PF(Performance), cs.CL(Computation and Language), cs.IR(Information Retrieval), cs.MS(Mathematical Software), cs.FL(Formal Languages and Automata Theory), cs.DS(Data Structures and Algorithms), cs.OS(Operating Systems), cs.GT(Computer Science and Game Theory), cs.DB(Databases), cs.DL(Digital Libraries), cs.DM(Discrete Mathematics). Directly output the class name.

gpt: cs.AR(Hardware Architecture)