human: Given a node-centered hypergraph: <hypergraph>, where nodes represent papers and hyperedges represent sets of papers co-cited by a source paper.

Details of the hypergraph:
Center node: "reverse engineering x86 processor microcode"
  Abstract: Microcode is an abstraction layer on top of the physical components of a CPU and present in most general-purpose CPUs today. In addition to facilitate complex and vast instruction sets, it also provides an update mechanism that allows CPUs to be patched in-place without requiring any special hardware. While it is well-known that CPUs are regularly updated with this mechanism, very little is known about its inner workings given that microcode and the update mechanism are proprietary and have not been throughly analyzed yet. #R##N#In this paper, we reverse engineer the microcode semantics and inner workings of its update mechanism of conventional COTS CPUs on the example of AMD's K8 and K10 microarchitectures. Furthermore, we demonstrate how to develop custom microcode updates. We describe the microcode semantics and additionally present a set of microprograms that demonstrate the possibilities offered by this technology. To this end, our microprograms range from CPU-assisted instrumentation to microcoded Trojans that can even be reached from within a web browser and enable remote code execution and cryptographic implementation attacks.

Connected through hyperedge HE-1 (induced by source paper "sok hardware security support for trustworthy execution"):
  with members:
    - "secloak arm trustzone based mobile peripheral control"
    - "extracting secrets from encrypted virtual machines"
    - "sgxpectre stealing intel secrets from sgx enclaves via speculative execution"
    - "spectre attacks exploiting speculative execution"
    - "pac it up towards pointer integrity using arm pointer authentication"
    - "lord of the x86 rings a portable user mode privilege separation architecture on x86"
    - "severed subverting amd s virtual machine encryption"
    - "a survey of hardware based control flow integrity cfi"

Connected through hyperedge HE-2 (induced by source paper "cachequery learning replacement policies from hardware caches"):
  with members:
    - "uops info characterizing latency throughput and port usage of instructions on intel microarchitectures"
    - "reload refresh abusing cache replacement policies to perform stealthy cache attacks"
    - "nanobench a low overhead tool for running microbenchmarks on x86 systems"
    - "on the incomparability of cache algorithms in terms of timing leakage"
    - "theory and practice of finding eviction sets"
    - "rowhammer js a remote software induced fault attack in javascript"
    - "drama exploiting dram addressing for cross cpu attacks"

Connected through hyperedge HE-3 (induced by source paper "v0ltpwn attacking x86 processor integrity from software"):
  with members:
    - "ekiden a platform for confidentiality preserving trustworthy and performant smart contracts"
    - "dr sgx automated and adjustable side channel protection for sgx using data location randomization"
    - "spectre attacks exploiting speculative execution"
    - "cachezoom how sgx amplifies the power of cache attacks"
    - "software grand exposure sgx cache attacks are practical"

Connected through hyperedge HE-4 (induced by source paper "one time programs made practical"):
  with members:
    - "spectre attacks exploiting speculative execution"
    - "software grand exposure sgx cache attacks are practical"
    - "malware guard extension using sgx to conceal cache attacks"
    - "inferring fine grained control flow inside sgx enclaves with branch shadowing"
    - "security through amnesia a software based solution to the cold boot attack on disk encryption"

Question: Please tell me which class the center node belongs to. The 40 classes are: cs.NA(Numerical Analysis), cs.MM(Multimedia), cs.LO(Logic in Computer Science), cs.CY(Computers and Society), cs.CR(Cryptography and Security), cs.DC(Distributed, Parallel, and Cluster Computing), cs.HC(Human-Computer Interaction), cs.CE(Computational Engineering, Finance, and Science), cs.NI(Networking and Internet Architecture), cs.CC(Computational Complexity), cs.AI(Artificial Intelligence), cs.MA(Multiagent Systems), cs.GL(General Literature), cs.NE(Neural and Evolutionary Computing), cs.SC(Symbolic Computation), cs.AR(Hardware Architecture), cs.CV(Computer Vision and Pattern Recognition), cs.GR(Graphics), cs.ET(Emerging Technologies), cs.SY(Systems and Control), cs.CG(Computational Geometry), cs.OH(Other Computer Science), cs.PL(Programming Languages), cs.SE(Software Engineering), cs.LG(Machine Learning), cs.SD(Sound), cs.SI(Social and Information Networks), cs.RO(Robotics), cs.IT(Information Theory), cs.PF(Performance), cs.CL(Computation and Language), cs.IR(Information Retrieval), cs.MS(Mathematical Software), cs.FL(Formal Languages and Automata Theory), cs.DS(Data Structures and Algorithms), cs.OS(Operating Systems), cs.GT(Computer Science and Game Theory), cs.DB(Databases), cs.DL(Digital Libraries), cs.DM(Discrete Mathematics). Directly output the class name.

gpt: cs.CR(Cryptography and Security)