human: Given a node-centered hypergraph: <hypergraph>, where nodes represent papers and hyperedges represent sets of papers co-cited by a source paper.

Details of the hypergraph:
Center node: "a new paradigm in split manufacturing lock the feol unlock at the beol"
  Abstract: Split manufacturing was introduced as an effective countermeasure against hardware-level threats such as IP piracy, overbuilding, and insertion of hardware Trojans. Nevertheless, the security promise of split manufacturing has been challenged by various attacks, which exploit the well-known working principles of physical design tools to infer the missing BEOL interconnects. In this work, we advocate a new paradigm to enhance the security for split manufacturing. Based on Kerckhoff's principle, we protect the FEOL layout in a formal and secure manner, by embedding keys. These keys are purposefully implemented and routed through the BEOL in such a way that they become indecipherable to the state-of-the-art FEOL-centric attacks. We provide our secure physical design flow to the community. We also define the security of split manufacturing formally and provide the associated proofs. At the same time, our technique is competitive with current schemes in terms of layout overhead, especially for practical, large-scale designs (ITC'99 benchmarks).

Connected through hyperedge HE-1 (induced by source paper "hardware security for and beyond cmos technology an overview on fundamentals applications and challenges"):
  with members:
    - "towards secure composition of integrated circuits and electronic systems on the role of eda"
    - "exploiting spin orbit torque devices as reconfigurable logic for circuit obfuscation"
    - "smart secure magnetoelectric antiferromagnet based tamper proof non volatile memory"
    - "a modern approach to ip protection and trojan prevention split manufacturing for 3d ics and obfuscation of vertical interconnects"
    - "spin orbit torque devices for hardware security from deterministic to probabilistic regime"
    - "protect your chip design intellectual property an overview"
    - "zombieload cross privilege boundary data sampling"
    - "3d integration another dimension toward hardware security"

Connected through hyperedge HE-2 (induced by source paper "protect your chip design intellectual property an overview"):
  with members:
    - "functional analysis attacks on logic locking"
    - "srclock sat resistant cyclic logic locking for protecting the hardware"
    - "best of both worlds integration of split manufacturing and camouflaging into a security driven cad flow for 3d ics"
    - "concerted wire lifting enabling secure and cost effective split manufacturing"
    - "opening the doors to dynamic camouflaging harnessing the power of polymorphic devices"
    - "sat based reverse engineering of gate level schematics using fault injection and probing"
    - "advancing hardware security using polymorphic and stochastic spin hall effect devices"
    - "rethinking split manufacturing an information theoretic approach with secure layout techniques"

Connected through hyperedge HE-3 (induced by source paper "3d integration another dimension toward hardware security"):
  with members:
    - "protect your chip design intellectual property an overview"
    - "best of both worlds integration of split manufacturing and camouflaging into a security driven cad flow for 3d ics"
    - "spectre attacks exploiting speculative execution"
    - "on mitigation of side channel attacks in 3d ics decorrelating thermal patterns from power and activity"

Question: Please tell me which class the center node belongs to. The 40 classes are: cs.NA(Numerical Analysis), cs.MM(Multimedia), cs.LO(Logic in Computer Science), cs.CY(Computers and Society), cs.CR(Cryptography and Security), cs.DC(Distributed, Parallel, and Cluster Computing), cs.HC(Human-Computer Interaction), cs.CE(Computational Engineering, Finance, and Science), cs.NI(Networking and Internet Architecture), cs.CC(Computational Complexity), cs.AI(Artificial Intelligence), cs.MA(Multiagent Systems), cs.GL(General Literature), cs.NE(Neural and Evolutionary Computing), cs.SC(Symbolic Computation), cs.AR(Hardware Architecture), cs.CV(Computer Vision and Pattern Recognition), cs.GR(Graphics), cs.ET(Emerging Technologies), cs.SY(Systems and Control), cs.CG(Computational Geometry), cs.OH(Other Computer Science), cs.PL(Programming Languages), cs.SE(Software Engineering), cs.LG(Machine Learning), cs.SD(Sound), cs.SI(Social and Information Networks), cs.RO(Robotics), cs.IT(Information Theory), cs.PF(Performance), cs.CL(Computation and Language), cs.IR(Information Retrieval), cs.MS(Mathematical Software), cs.FL(Formal Languages and Automata Theory), cs.DS(Data Structures and Algorithms), cs.OS(Operating Systems), cs.GT(Computer Science and Game Theory), cs.DB(Databases), cs.DL(Digital Libraries), cs.DM(Discrete Mathematics). Directly output the class name.

gpt: cs.CR(Cryptography and Security)