human: Given a node-centered hypergraph: <hypergraph>, where nodes represent papers and hyperedges represent sets of papers co-cited by a source paper.

Details of the hypergraph:
Center node: "mitigating power side channels during compilation"
  Abstract: The code generation modules inside modern compilers such as GCC and LLVM, which use a limited number of CPU registers to store a large number of program variables, may introduce side-channel leaks even in software equipped with state-of-the-art countermeasures. We propose a program analysis and transformation based method to eliminate this side channel. Our method has a type-based technique for detecting leaks, which leverages Datalog-based declarative analysis and domain-specific optimizations to achieve high efficiency and accuracy. It also has a mitigation technique for the compiler's backend, more specifically the register allocation modules, to ensure that potentially leaky intermediate computation results are always stored in different CPU registers or spilled to memory with isolation. We have implemented and evaluated our method in LLVM for the x86 instruction set architecture. Our experiments on cryptographic software show that the method is effective in removing the side channel while being efficient, i.e., our mitigated code is more compact and runs faster than code mitigated using state-of-the-art techniques.

Connected through hyperedge HE-1 (induced by source paper "specusym speculative symbolic execution for cache timing leak detection"):
  with members:
    - "specfuzz bringing spectre type vulnerabilities to the surface"
    - "identifying cache based side channels through secret augmented abstract interpretation"
    - "neural network model extraction attacks in edge devices by hearing architectural hints"
    - "abstract interpretation under speculative execution"
    - "ct fuzz fuzzing for timing leaks"
    - "savior towards bug driven hybrid testing"
    - "spoiler speculative load hazards boost rowhammer and cache attacks"
    - "kleespectre detecting information leakage through speculative cache attacks via symbolic execution"

Connected through hyperedge HE-2 (induced by source paper "efficient detection and quantification of timing leaks with neural networks"):
  with members:
    - "eliminating timing side channel leaks using program repair"
    - "adversarial symbolic execution for detecting concurrency related cache timing leaks"
    - "data driven debugging for functional side channels"
    - "vuldeepecker a deep learning based system for vulnerability detection"
    - "canal a cache timing analysis framework via llvm transformation"
    - "discriminating traces with time"
    - "differential performance debugging with discriminant regression trees"
    - "binarized neural networks training deep neural networks with weights and activations constrained to 1 or 1"

Connected through hyperedge HE-3 (induced by source paper "abstract interpretation under speculative execution"):
  with members:
    - "eliminating timing side channel leaks using program repair"
    - "adversarial symbolic execution for detecting concurrency related cache timing leaks"
    - "spectre attacks exploiting speculative execution"
    - "canal a cache timing analysis framework via llvm transformation"
    - "time protection the missing os abstraction"
    - "modular verification of interrupt driven software"
    - "thread modular static analysis for relaxed memory models"
    - "flow sensitive composition of thread modular abstract interpretation"

Connected through hyperedge HE-4 (induced by source paper "debreach mitigating compression side channels via static analysis and transformation"):
  with members:
    - "abstract interpretation under speculative execution"
    - "eliminating timing side channel leaks using program repair"
    - "adversarial symbolic execution for detecting concurrency related cache timing leaks"
    - "datalog based scalable semantic diffing of concurrent programs"
    - "canal a cache timing analysis framework via llvm transformation"

Connected through hyperedge HE-5 (induced by source paper "rosita towards automatic elimination of power analysis leakage in ciphers"):
  with members:
    - "eliminating timing side channel leaks using program repair"

Question: Please tell me which class the center node belongs to. The 40 classes are: cs.NA(Numerical Analysis), cs.MM(Multimedia), cs.LO(Logic in Computer Science), cs.CY(Computers and Society), cs.CR(Cryptography and Security), cs.DC(Distributed, Parallel, and Cluster Computing), cs.HC(Human-Computer Interaction), cs.CE(Computational Engineering, Finance, and Science), cs.NI(Networking and Internet Architecture), cs.CC(Computational Complexity), cs.AI(Artificial Intelligence), cs.MA(Multiagent Systems), cs.GL(General Literature), cs.NE(Neural and Evolutionary Computing), cs.SC(Symbolic Computation), cs.AR(Hardware Architecture), cs.CV(Computer Vision and Pattern Recognition), cs.GR(Graphics), cs.ET(Emerging Technologies), cs.SY(Systems and Control), cs.CG(Computational Geometry), cs.OH(Other Computer Science), cs.PL(Programming Languages), cs.SE(Software Engineering), cs.LG(Machine Learning), cs.SD(Sound), cs.SI(Social and Information Networks), cs.RO(Robotics), cs.IT(Information Theory), cs.PF(Performance), cs.CL(Computation and Language), cs.IR(Information Retrieval), cs.MS(Mathematical Software), cs.FL(Formal Languages and Automata Theory), cs.DS(Data Structures and Algorithms), cs.OS(Operating Systems), cs.GT(Computer Science and Game Theory), cs.DB(Databases), cs.DL(Digital Libraries), cs.DM(Discrete Mathematics). Directly output the class name.

gpt: cs.CR(Cryptography and Security)