human: Given a node-centered hypergraph: <hypergraph>, where nodes represent papers and hyperedges represent sets of papers co-cited by a source paper.

Details of the hypergraph:
Center node: "shouji a fast and efficient pre alignment filter for sequence alignment"
  Abstract: Motivation: The ability to generate massive amounts of sequencing data continues to overwhelm the processing capability of existing algorithms and compute infrastructures. In this work, we explore the use of hardware/software co-design and hardware acceleration to significantly reduce the execution time of short sequence alignment, a crucial step in analyzing sequenced genomes. We introduce Shouji, a highly-parallel and accurate pre-alignment filter that remarkably reduces the need for computationally-costly dynamic programming algorithms. The first key idea of our proposed pre-alignment filter is to provide high filtering accuracy by correctly detecting all common subsequences shared between two given sequences. The second key idea is to design a hardware accelerator that adopts modern FPGA (Field-Programmable Gate Array) architectures to further boost the performance of our algorithm.  Results: Shouji significantly improves the accuracy of pre-alignment filtering by up to two orders of magnitude compared to the state-of-the-art pre-alignment filters, GateKeeper and SHD. Our FPGA-based accelerator is up to three orders of magnitude faster than the equivalent CPU implementation of Shouji. Using a single FPGA chip, we benchmark the benefits of integrating Shouji with five state-of-the-art sequence aligners, designed for different computing platforms. The addition of Shouji as a pre-alignment step reduces the execution time of the five state-of-the-art sequence aligners by up to 18.8x. Shouji can be adapted for any bioinformatics pipeline that performs sequence alignment for verification. Unlike most existing methods that aim to accelerate sequence alignment, Shouji does not sacrifice any of the aligner capabilities, as it does not modify or replace the alignment step.  Availability: https://github.com/CMU-SAFARI/Shouji

Connected through hyperedge HE-1 (induced by source paper "a workload and programming ease driven perspective of processing in memory"):
  with members:
    - "processing data where it makes sense enabling in memory computation"
    - "in dram bulk bitwise execution engine"
    - "rowhammer a retrospective"
    - "accelerating bulk bit wise x n or operation in processing in dram platform"
    - "enabling the adoption of processing in memory challenges mechanisms future research directions"
    - "memristive devices for computation in memory"
    - "what your dram power models are not telling you lessons from a detailed experimental study"
    - "the rowhammer problem and other issues we may face as memory becomes denser"

Connected through hyperedge HE-2 (induced by source paper "in dram bulk bitwise execution engine"):
  with members:
    - "d range using commodity dram devices to generate true random numbers with low latency and high throughput"
    - "what your dram power models are not telling you lessons from a detailed experimental study"
    - "neural cache bit serial in cache acceleration of deep neural networks"
    - "understanding reduced voltage operation in modern dram chips characterization analysis and mechanisms"
    - "reducing dram latency at low cost by exploiting heterogeneity"
    - "xnor net imagenet classification using binary convolutional neural networks"
    - "simple dram and virtual memory abstractions to enable highly efficient memory systems"
    - "improving dram performance by parallelizing refreshes with accesses"

Connected through hyperedge HE-3 (induced by source paper "enabling practical processing in and near memory for data intensive computing"):
  with members:
    - "processing data where it makes sense enabling in memory computation"
    - "rowhammer a retrospective"
    - "enabling the adoption of processing in memory challenges mechanisms future research directions"
    - "the rowhammer problem and other issues we may face as memory becomes denser"
    - "using ecc dram to adaptively increase memory capacity"
    - "understanding and improving the latency of dram based memory systems"
    - "buddy ram improving the performance and efficiency of bulk bitwise operations using dram"

Question: Please tell me which class the center node belongs to. The 40 classes are: cs.NA(Numerical Analysis), cs.MM(Multimedia), cs.LO(Logic in Computer Science), cs.CY(Computers and Society), cs.CR(Cryptography and Security), cs.DC(Distributed, Parallel, and Cluster Computing), cs.HC(Human-Computer Interaction), cs.CE(Computational Engineering, Finance, and Science), cs.NI(Networking and Internet Architecture), cs.CC(Computational Complexity), cs.AI(Artificial Intelligence), cs.MA(Multiagent Systems), cs.GL(General Literature), cs.NE(Neural and Evolutionary Computing), cs.SC(Symbolic Computation), cs.AR(Hardware Architecture), cs.CV(Computer Vision and Pattern Recognition), cs.GR(Graphics), cs.ET(Emerging Technologies), cs.SY(Systems and Control), cs.CG(Computational Geometry), cs.OH(Other Computer Science), cs.PL(Programming Languages), cs.SE(Software Engineering), cs.LG(Machine Learning), cs.SD(Sound), cs.SI(Social and Information Networks), cs.RO(Robotics), cs.IT(Information Theory), cs.PF(Performance), cs.CL(Computation and Language), cs.IR(Information Retrieval), cs.MS(Mathematical Software), cs.FL(Formal Languages and Automata Theory), cs.DS(Data Structures and Algorithms), cs.OS(Operating Systems), cs.GT(Computer Science and Game Theory), cs.DB(Databases), cs.DL(Digital Libraries), cs.DM(Discrete Mathematics). Directly output the class name.

gpt: cs.CE(Computational Engineering, Finance, and Science)