human: Given a hyperedge-centered hypergraph: <hypergraph>, where the center hyperedge is induced by one source paper and its member nodes are the cited papers.

Details of the hypergraph:
Center hyperedge (induced by source paper "hardware aware machine learning modeling and optimization"):
  Abstract: Recent breakthroughs in Deep Learning (DL) applications have made DL models a key component in almost every modern computing system. The increased popularity of DL applications deployed on a wide-spectrum of platforms have resulted in a plethora of design challenges related to the constraints introduced by the hardware itself. What is the latency or energy cost for an inference made by a Deep Neural Network (DNN)? Is it possible to predict this latency or energy consumption before a model is trained? If yes, how can machine learners take advantage of these models to design the hardware-optimal DNN for deployment? From lengthening battery life of mobile devices to reducing the runtime requirements of DL models executing in the cloud, the answers to these questions have drawn significant attention. #R##N#One cannot optimize what isn't properly modeled. Therefore, it is important to understand the hardware efficiency of DL models during serving for making an inference, before even training the model. This key observation has motivated the use of predictive models to capture the hardware performance or energy efficiency of DL applications. Furthermore, DL practitioners are challenged with the task of designing the DNN model, i.e., of tuning the hyper-parameters of the DNN architecture, while optimizing for both accuracy of the DL model and its hardware efficiency. Therefore, state-of-the-art methodologies have proposed hardware-aware hyper-parameter optimization techniques. In this paper, we provide a comprehensive assessment of state-of-the-art work and selected results on the hardware-aware modeling and optimization for DL applications. We also highlight several open questions that are poised to give rise to novel hardware-aware designs in the next few years, as DL applications continue to significantly impact associated hardware systems and platforms.

Includes members:
  Member "dpp net device aware progressive search for pareto optimal neural architectures":
    also connected through other hyperedges:
      - Hyperedge HE-1 (induced by source paper "towards efficient model compression via learned global ranking")
  Member "designing adaptive neural networks for energy constrained image classification":
    also connected through other hyperedges:
      - Hyperedge HE-2 (induced by source paper "towards efficient model compression via learned global ranking")
  Member "deep learning models for wireless signal classification with distributed low cost spectrum sensors":
    also connected through other hyperedges:
      - Hyperedge HE-3 (induced by source paper "a survey on machine learning based performance improvement of wireless networks phy mac and network layer")
  Member "mnasnet platform aware neural architecture search for mobile":
    also connected through other hyperedges:
      - Hyperedge HE-4 (induced by source paper "automl zero evolving machine learning algorithms from scratch")
  Member "quantization and training of neural networks for efficient integer arithmetic only inference":
    also connected through other hyperedges:
      - Hyperedge HE-5 (induced by source paper "searching for winograd aware quantized networks")
  Member "mobilenets efficient convolutional neural networks for mobile vision applications":
    also connected through other hyperedges:
      - Hyperedge HE-6 (induced by source paper "discrimination aware network pruning for deep model compression")
  Member "neuralpower predict and deploy energy efficient convolutional neural networks":
    also connected through other hyperedges:
      - Hyperedge HE-7 (induced by source paper "flexibo cost aware multi objective optimization of deep neural networks")
  Member "morphnet fast simple resource constrained structure learning of deep networks":
    also connected through other hyperedges:
      - Hyperedge HE-8 (induced by source paper "neural architecture search over decentralized data")

Question: Please tell me which class the source paper belongs to. The 40 classes are: cs.NA(Numerical Analysis), cs.MM(Multimedia), cs.LO(Logic in Computer Science), cs.CY(Computers and Society), cs.CR(Cryptography and Security), cs.DC(Distributed, Parallel, and Cluster Computing), cs.HC(Human-Computer Interaction), cs.CE(Computational Engineering, Finance, and Science), cs.NI(Networking and Internet Architecture), cs.CC(Computational Complexity), cs.AI(Artificial Intelligence), cs.MA(Multiagent Systems), cs.GL(General Literature), cs.NE(Neural and Evolutionary Computing), cs.SC(Symbolic Computation), cs.AR(Hardware Architecture), cs.CV(Computer Vision and Pattern Recognition), cs.GR(Graphics), cs.ET(Emerging Technologies), cs.SY(Systems and Control), cs.CG(Computational Geometry), cs.OH(Other Computer Science), cs.PL(Programming Languages), cs.SE(Software Engineering), cs.LG(Machine Learning), cs.SD(Sound), cs.SI(Social and Information Networks), cs.RO(Robotics), cs.IT(Information Theory), cs.PF(Performance), cs.CL(Computation and Language), cs.IR(Information Retrieval), cs.MS(Mathematical Software), cs.FL(Formal Languages and Automata Theory), cs.DS(Data Structures and Algorithms), cs.OS(Operating Systems), cs.GT(Computer Science and Game Theory), cs.DB(Databases), cs.DL(Digital Libraries), cs.DM(Discrete Mathematics). Directly output the class name.

gpt: cs.LG(Machine Learning)