human: Given a hyperedge-centered hypergraph: <hypergraph>, where the center hyperedge is induced by one source paper and its member nodes are the cited papers.

Details of the hypergraph:
Center hyperedge (induced by source paper "deploying customized data representation and approximate computing in machine learning applications"):
  Abstract: Major advancements in building general-purpose and customized hardware have been one of the key enablers of versatility and pervasiveness of machine learning models such as deep neural networks. To sustain this ubiquitous deployment of machine learning models and cope with their computational and storage complexity, several solutions such as low-precision representation of model parameters using fixed-point representation and deploying approximate arithmetic operations have been employed. Studying the potency of such solutions in different applications requires integrating them into existing machine learning frameworks for high-level simulations as well as implementing them in hardware to analyze their effects on power/energy dissipation, throughput, and chip area. Lop is a library for design space exploration that bridges the gap between machine learning and efficient hardware realization. It comprises a Python module, which can be integrated with some of the existing machine learning frameworks and implements various customizable data representations including fixed-point and floating-point as well as approximate arithmetic operations.Furthermore, it includes a highly-parameterized Scala module, which allows synthesizing hardware based on the said data representations and arithmetic operations. Lop allows researchers and designers to quickly compare quality of their models using various data representations and arithmetic operations in Python and contrast the hardware cost of viable representations by synthesizing them on their target platforms (e.g., FPGA or ASIC). To the best of our knowledge, Lop is the first library that allows both software simulation and hardware realization using customized data representations and approximate computing techniques.

Includes members:
  Member "a hardware friendly algorithm for scalable training and deployment of dimensionality reduction models on fpga":
    also connected through other hyperedges:
      - Hyperedge HE-1 (induced by source paper "codex bit flexible encoding for streaming based fpga acceleration of dnns")
  Member "fft based deep learning deployment in embedded systems":
    also connected through other hyperedges:
      - Hyperedge HE-2 (induced by source paper "an area and energy efficient design of domain wall memory based deep convolutional neural networks using stochastic computing")
  Member "deep convolutional neural network inference with floating point weights and fixed point activations":
    also connected through other hyperedges:
      - Hyperedge HE-3 (induced by source paper "cloudifiernet deep vision models for artificial image processing")
  Member "mixed low precision deep learning inference using dynamic fixed point":
    also connected through other hyperedges:
      - Hyperedge HE-4 (induced by source paper "deepcabac a universal compression algorithm for deep neural networks")
  Member "high performance fpga implementation of equivariant adaptive separation via independence algorithm for independent component analysis":
    also connected through other hyperedges:
      - Hyperedge HE-5 (induced by source paper "a hardware friendly algorithm for scalable training and deployment of dimensionality reduction models on fpga")
  Member "dorefa net training low bitwidth convolutional neural networks with low bitwidth gradients":
    also connected through other hyperedges:
      - Hyperedge HE-6 (induced by source paper "discrimination aware network pruning for deep model compression")
  Member "binarized neural networks training deep neural networks with weights and activations constrained to 1 or 1":
    also connected through other hyperedges:
      - Hyperedge HE-7 (induced by source paper "lossless compression of deep neural networks")
  Member "hardware oriented approximation of convolutional neural networks":
    also connected through other hyperedges:
      - Hyperedge HE-8 (induced by source paper "light multi segment activation for model compression")

Question: Please tell me which class the source paper belongs to. The 40 classes are: cs.NA(Numerical Analysis), cs.MM(Multimedia), cs.LO(Logic in Computer Science), cs.CY(Computers and Society), cs.CR(Cryptography and Security), cs.DC(Distributed, Parallel, and Cluster Computing), cs.HC(Human-Computer Interaction), cs.CE(Computational Engineering, Finance, and Science), cs.NI(Networking and Internet Architecture), cs.CC(Computational Complexity), cs.AI(Artificial Intelligence), cs.MA(Multiagent Systems), cs.GL(General Literature), cs.NE(Neural and Evolutionary Computing), cs.SC(Symbolic Computation), cs.AR(Hardware Architecture), cs.CV(Computer Vision and Pattern Recognition), cs.GR(Graphics), cs.ET(Emerging Technologies), cs.SY(Systems and Control), cs.CG(Computational Geometry), cs.OH(Other Computer Science), cs.PL(Programming Languages), cs.SE(Software Engineering), cs.LG(Machine Learning), cs.SD(Sound), cs.SI(Social and Information Networks), cs.RO(Robotics), cs.IT(Information Theory), cs.PF(Performance), cs.CL(Computation and Language), cs.IR(Information Retrieval), cs.MS(Mathematical Software), cs.FL(Formal Languages and Automata Theory), cs.DS(Data Structures and Algorithms), cs.OS(Operating Systems), cs.GT(Computer Science and Game Theory), cs.DB(Databases), cs.DL(Digital Libraries), cs.DM(Discrete Mathematics). Directly output the class name.

gpt: cs.LG(Machine Learning)