human: Given a hyperedge-centered hypergraph: <hypergraph>, where the center hyperedge is induced by one source paper and its member nodes are the cited papers.

Details of the hypergraph:
Center hyperedge (induced by source paper "large scale neuromorphic spiking array processors a quest to mimic the brain"):
  Abstract: Neuromorphic engineering (NE) encompasses a diverse range of approaches to information processing that are inspired by neurobiological systems, and this feature distinguishes neuromorphic systems from conventional computing systems. The brain has evolved over billions of years to solve difficult engineering problems by using efficient, parallel, low-power computation. The goal of NE is to design systems capable of brain-like computation. Numerous large-scale neuromorphic projects have emerged recently. This interdisciplinary field was listed among the top 10 technology breakthroughs of 2014 by the MIT Technology Review and among the top 10 emerging technologies of 2015 by the World Economic Forum. NE has two-way goals: one, a scientific goal to understand the computational properties of biological neural systems by using models implemented in integrated circuits (ICs); second, an engineering goal to exploit the known properties of biological systems to design and implement efficient devices for engineering applications. Building hardware neural emulators can be extremely useful for simulating large-scale neural models to explain how intelligent behavior arises in the brain. The principle advantages of neuromorphic emulators are that they are highly energy efficient, parallel and distributed, and require a small silicon area. Thus, compared to conventional CPUs, these neuromorphic emulators are beneficial in many engineering applications such as for the porting of deep learning algorithms for various recognitions tasks. In this review article, we describe some of the most significant neuromorphic spiking emulators, compare the different architectures and approaches used by them, illustrate their advantages and drawbacks, and highlight the capabilities that each can deliver to neural modelers.

Includes members:
  Member "an fpga based massively parallel neuromorphic cortex simulator":
    also connected through other hyperedges:
      - Hyperedge HE-1 (induced by source paper "efficient reward based structural plasticity on a spinnaker 2 prototype")
  Member "a scalable multicore architecture with heterogeneous memory structures for dynamic neuromorphic asynchronous processors dynaps":
    also connected through other hyperedges:
      - Hyperedge HE-2 (induced by source paper "a supervised learning algorithm for multilayer spiking neural networks based on temporal coding toward energy efficient vlsi processor design")
  Member "training a probabilistic graphical model with resistive switching electronic synapses":
    also connected through other hyperedges:
      - Hyperedge HE-3 (induced by source paper "inherent weight normalization in stochastic neural networks")
  Member "stochastic synapses enable efficient brain inspired learning machines":
    also connected through other hyperedges:
      - Hyperedge HE-4 (induced by source paper "spiking neural networks for inference and learning a memristor based design perspective")
  Member "a neuromorphic hardware architecture using the neural engineering framework for pattern recognition":
    also connected through other hyperedges:
      - Hyperedge HE-5 (induced by source paper "unsupervised learning in synaptic sampling machines")
  Member "training and operation of an integrated neuromorphic network based on metal oxide memristors":
    also connected through other hyperedges:
      - Hyperedge HE-6 (induced by source paper "mixed precision deep learning based on computational memory")
  Member "event driven contrastive divergence for spiking neuromorphic systems":
    also connected through other hyperedges:
      - Hyperedge HE-7 (induced by source paper "sbsnn stochastic bits enabled binary spiking neural network with on chip learning for energy efficient neuromorphic computing at the edge")
  Member "neuromorphic electronic circuits for building autonomous cognitive systems":
    also connected through other hyperedges:
      - Hyperedge HE-8 (induced by source paper "synaptic integration of spatiotemporal features with a dynamic neuromorphic processor")

Question: Please tell me which class the source paper belongs to. The 40 classes are: cs.NA(Numerical Analysis), cs.MM(Multimedia), cs.LO(Logic in Computer Science), cs.CY(Computers and Society), cs.CR(Cryptography and Security), cs.DC(Distributed, Parallel, and Cluster Computing), cs.HC(Human-Computer Interaction), cs.CE(Computational Engineering, Finance, and Science), cs.NI(Networking and Internet Architecture), cs.CC(Computational Complexity), cs.AI(Artificial Intelligence), cs.MA(Multiagent Systems), cs.GL(General Literature), cs.NE(Neural and Evolutionary Computing), cs.SC(Symbolic Computation), cs.AR(Hardware Architecture), cs.CV(Computer Vision and Pattern Recognition), cs.GR(Graphics), cs.ET(Emerging Technologies), cs.SY(Systems and Control), cs.CG(Computational Geometry), cs.OH(Other Computer Science), cs.PL(Programming Languages), cs.SE(Software Engineering), cs.LG(Machine Learning), cs.SD(Sound), cs.SI(Social and Information Networks), cs.RO(Robotics), cs.IT(Information Theory), cs.PF(Performance), cs.CL(Computation and Language), cs.IR(Information Retrieval), cs.MS(Mathematical Software), cs.FL(Formal Languages and Automata Theory), cs.DS(Data Structures and Algorithms), cs.OS(Operating Systems), cs.GT(Computer Science and Game Theory), cs.DB(Databases), cs.DL(Digital Libraries), cs.DM(Discrete Mathematics). Directly output the class name.

gpt: cs.NE(Neural and Evolutionary Computing)