human: Given a hyperedge-centered hypergraph: <hypergraph>, where the center hyperedge is induced by one source paper and its member nodes are the cited papers.

Details of the hypergraph:
Center hyperedge (induced by source paper "hardware efficient on line learning through pipelined truncated error backpropagation in binary state networks"):
  Abstract: Artificial neural networks (ANNs) trained using backpropagation are powerful learning architectures that have achieved state-of-the-art performance in various benchmarks. Significant effort has been devoted to developing custom silicon devices to accelerate inference in ANNs. Accelerating the training phase, however, has attracted relatively little attention. In this paper, we describe a hardware-efficient on-line learning technique for feedforward multi-layer ANNs that is based on pipelined backpropagation. Learning is performed in parallel with inference in the forward pass, removing the need for an explicit backward pass and requiring no extra weight lookup. By using binary state variables in the feedforward network and ternary errors in truncated-error backpropagation, the need for any multiplications in the forward and backward passes is removed, and memory requirements for the pipelining are drastically reduced. Further reduction in addition operations owing to the sparsity in the forward neural and backpropagating error signal paths contributes to highly efficient hardware implementation. For proof-of-concept validation, we demonstrate on-line learning of MNIST handwritten digit classification on a Spartan 6 FPGA interfacing with an external 1Gb DDR2 DRAM, that shows small degradation in test error performance compared to an equivalently sized binary ANN trained off-line using standard back-propagation and exact errors. Our results highlight an attractive synergy between pipelined backpropagation and binary-state networks in substantially reducing computation and memory requirements, making pipelined on-line learning practical in deep networks.

Includes members:
  Member "vlsi implementation of deep neural network using integral stochastic computing":
    also connected through other hyperedges:
      - Hyperedge HE-1 (induced by source paper "progressive stochastic binarization of deep networks")
  Member "nullhop a flexible convolutional neural network accelerator based on sparse representations of feature maps":
    also connected through other hyperedges:
      - Hyperedge HE-2 (induced by source paper "ebpc extended bit plane compression for deep neural network inference and training accelerators")
  Member "event driven random back propagation enabling neuromorphic deep learning machines":
    also connected through other hyperedges:
      - Hyperedge HE-3 (induced by source paper "a deep unsupervised feature learning spiking neural network with binarized classification layers for emnist classification")
  Member "eie efficient inference engine on compressed deep neural network":
    also connected through other hyperedges:
      - Hyperedge HE-4 (induced by source paper "cluster pruning an efficient filter pruning method for edge ai vision applications")
  Member "supervised learning based on temporal coding in spiking neural networks":
    also connected through other hyperedges:
      - Hyperedge HE-5 (induced by source paper "a deep unsupervised feature learning spiking neural network with binarized classification layers for emnist classification")
  Member "training deep spiking neural networks using backpropagation":
    also connected through other hyperedges:
      - Hyperedge HE-6 (induced by source paper "matrix lstm a differentiable recurrent surface for asynchronous event based data")
  Member "trained ternary quantization":
    also connected through other hyperedges:
      - Hyperedge HE-7 (induced by source paper "gan compression efficient architectures for interactive conditional gans")
  Member "convolutional networks for fast energy efficient neuromorphic computing":
    also connected through other hyperedges:
      - Hyperedge HE-8 (induced by source paper "rmp snns residual membrane potential neuron for enabling deeper high accuracy and low latency spiking neural networks")

Question: Please tell me which class the source paper belongs to. The 40 classes are: cs.NA(Numerical Analysis), cs.MM(Multimedia), cs.LO(Logic in Computer Science), cs.CY(Computers and Society), cs.CR(Cryptography and Security), cs.DC(Distributed, Parallel, and Cluster Computing), cs.HC(Human-Computer Interaction), cs.CE(Computational Engineering, Finance, and Science), cs.NI(Networking and Internet Architecture), cs.CC(Computational Complexity), cs.AI(Artificial Intelligence), cs.MA(Multiagent Systems), cs.GL(General Literature), cs.NE(Neural and Evolutionary Computing), cs.SC(Symbolic Computation), cs.AR(Hardware Architecture), cs.CV(Computer Vision and Pattern Recognition), cs.GR(Graphics), cs.ET(Emerging Technologies), cs.SY(Systems and Control), cs.CG(Computational Geometry), cs.OH(Other Computer Science), cs.PL(Programming Languages), cs.SE(Software Engineering), cs.LG(Machine Learning), cs.SD(Sound), cs.SI(Social and Information Networks), cs.RO(Robotics), cs.IT(Information Theory), cs.PF(Performance), cs.CL(Computation and Language), cs.IR(Information Retrieval), cs.MS(Mathematical Software), cs.FL(Formal Languages and Automata Theory), cs.DS(Data Structures and Algorithms), cs.OS(Operating Systems), cs.GT(Computer Science and Game Theory), cs.DB(Databases), cs.DL(Digital Libraries), cs.DM(Discrete Mathematics). Directly output the class name.

gpt: cs.NE(Neural and Evolutionary Computing)