human: Given a hyperedge-centered hypergraph: <hypergraph>, where the center hyperedge is induced by one source paper and its member nodes are the cited papers.

Details of the hypergraph:
Center hyperedge (induced by source paper "fpga dnn co design an efficient design methodology for iot intelligence on the edge"):
  Abstract: While embedded FPGAs are attractive platforms for DNN acceleration on edge-devices due to their low latency and high energy efficiency, the scarcity of resources of edge-scale FPGA devices also makes it challenging for DNN deployment. In this paper, we propose a simultaneous FPGA/DNN co-design methodology with both bottom-up and top-down approaches: a bottom-up hardware-oriented DNN model search for high accuracy, and a top-down FPGA accelerator design considering DNN-specific characteristics. We also build an automatic co-design flow, including an Auto-DNN engine to perform hardware-oriented DNN model search, as well as an Auto-HLS engine to generate synthesizable C code of the FPGA accelerator for explored DNNs. We demonstrate our co-design approach on an object detection task using PYNQ-Z1 FPGA. Results show that our proposed DNN model and accelerator outperform the state-of-the-art FPGA designs in all aspects including Intersection-over-Union (IoU) (6.2% higher), frames per second (FPS) (2.48X higher), power consumption (40% lower), and energy efficiency (2.5X higher). Compared to GPU-based solutions, our designs deliver similar accuracy but consume far less energy.

Includes members:
  Member "design flow of accelerating hybrid extremely low bit width neural network in embedded fpga":
    also connected through other hyperedges:
      - Hyperedge HE-1 (induced by source paper "autodnnchip an automated dnn chip predictor and builder for both fpgas and asics")
  Member "mobilenetv2 inverted residuals and linear bottlenecks":
    also connected through other hyperedges:
      - Hyperedge HE-2 (induced by source paper "discrimination aware network pruning for deep model compression")
  Member "dac sdc low power object detection challenge for uav applications":
    also connected through other hyperedges:
      - Hyperedge HE-3 (induced by source paper "skynet a hardware efficient method for object detection and tracking on embedded systems")
  Member "regularized evolution for image classifier architecture search":
    also connected through other hyperedges:
      - Hyperedge HE-4 (induced by source paper "searching for winograd aware quantized networks")
  Member "proxylessnas direct neural architecture search on target task and hardware":
    also connected through other hyperedges:
      - Hyperedge HE-5 (induced by source paper "gan compression efficient architectures for interactive conditional gans")
  Member "mnasnet platform aware neural architecture search for mobile":
    also connected through other hyperedges:
      - Hyperedge HE-6 (induced by source paper "automl zero evolving machine learning algorithms from scratch")
  Member "learning transferable architectures for scalable image recognition":
    also connected through other hyperedges:
      - Hyperedge HE-7 (induced by source paper "meta learning curiosity algorithms")
  Member "ese efficient speech recognition engine with sparse lstm on fpga":
    also connected through other hyperedges:
      - Hyperedge HE-8 (induced by source paper "cluster pruning an efficient filter pruning method for edge ai vision applications")

Question: Please tell me which class the source paper belongs to. The 40 classes are: cs.NA(Numerical Analysis), cs.MM(Multimedia), cs.LO(Logic in Computer Science), cs.CY(Computers and Society), cs.CR(Cryptography and Security), cs.DC(Distributed, Parallel, and Cluster Computing), cs.HC(Human-Computer Interaction), cs.CE(Computational Engineering, Finance, and Science), cs.NI(Networking and Internet Architecture), cs.CC(Computational Complexity), cs.AI(Artificial Intelligence), cs.MA(Multiagent Systems), cs.GL(General Literature), cs.NE(Neural and Evolutionary Computing), cs.SC(Symbolic Computation), cs.AR(Hardware Architecture), cs.CV(Computer Vision and Pattern Recognition), cs.GR(Graphics), cs.ET(Emerging Technologies), cs.SY(Systems and Control), cs.CG(Computational Geometry), cs.OH(Other Computer Science), cs.PL(Programming Languages), cs.SE(Software Engineering), cs.LG(Machine Learning), cs.SD(Sound), cs.SI(Social and Information Networks), cs.RO(Robotics), cs.IT(Information Theory), cs.PF(Performance), cs.CL(Computation and Language), cs.IR(Information Retrieval), cs.MS(Mathematical Software), cs.FL(Formal Languages and Automata Theory), cs.DS(Data Structures and Algorithms), cs.OS(Operating Systems), cs.GT(Computer Science and Game Theory), cs.DB(Databases), cs.DL(Digital Libraries), cs.DM(Discrete Mathematics). Directly output the class name.

gpt: cs.CV(Computer Vision and Pattern Recognition)