human: Given a hyperedge-centered hypergraph: <hypergraph>, where the center hyperedge is induced by one source paper and its member nodes are the cited papers.

Details of the hypergraph:
Center hyperedge (induced by source paper "fusionaccel a general re configurable deep learning inference accelerator on fpga for convolutional neural networks"):
  Abstract: The deep learning accelerator is one of the methods to accelerate deep learning network computations, which is mainly based on convolutional neural network acceleration. To address the fact that concurrent convolutional neural network accelerators are not solely open-source and the exclusiveness of platforms, FusionAccel, a scalable convolutional neural network accelerator hardware architecture with supporting software is proposed. It can adapt to different network structures and can be reconstructed before compilation and reconfigured at runtime. This paper realizes this RTL convolutional neural network accelerator design and functional verifications on a Xilinx Spartan-6 FPGA. The result is identical to that of Caffe-CPU. Since the entire project is based on RTL, it can be migrated to ASIC after replacing some FPGA-specific IPs.

Includes members:
  Member "squeezenext hardware aware neural network design":
    also connected through other hyperedges:
      - Hyperedge HE-1 (induced by source paper "zeroq a novel zero shot quantization framework")
  Member "mec memory efficient convolution for deep neural network":
    also connected through other hyperedges:
      - Hyperedge HE-2 (induced by source paper "high performance depthwise and pointwise convolutions on mobile devices")
  Member "squeezenet alexnet level accuracy with 50x fewer parameters and 0 5mb model size":
    also connected through other hyperedges:
      - Hyperedge HE-3 (induced by source paper "lossless compression of deep neural networks")
  Member "origami a 803 gop s w convolutional network accelerator":
    also connected through other hyperedges:
      - Hyperedge HE-4 (induced by source paper "pulp nn accelerating quantized neural networks on parallel ultra low power risc v processors")
  Member "hardware oriented approximation of convolutional neural networks":
    also connected through other hyperedges:
      - Hyperedge HE-5 (induced by source paper "light multi segment activation for model compression")
  Member "eie efficient inference engine on compressed deep neural network":
    also connected through other hyperedges:
      - Hyperedge HE-6 (induced by source paper "cluster pruning an efficient filter pruning method for edge ai vision applications")

Question: Please tell me which class the source paper belongs to. The 40 classes are: cs.NA(Numerical Analysis), cs.MM(Multimedia), cs.LO(Logic in Computer Science), cs.CY(Computers and Society), cs.CR(Cryptography and Security), cs.DC(Distributed, Parallel, and Cluster Computing), cs.HC(Human-Computer Interaction), cs.CE(Computational Engineering, Finance, and Science), cs.NI(Networking and Internet Architecture), cs.CC(Computational Complexity), cs.AI(Artificial Intelligence), cs.MA(Multiagent Systems), cs.GL(General Literature), cs.NE(Neural and Evolutionary Computing), cs.SC(Symbolic Computation), cs.AR(Hardware Architecture), cs.CV(Computer Vision and Pattern Recognition), cs.GR(Graphics), cs.ET(Emerging Technologies), cs.SY(Systems and Control), cs.CG(Computational Geometry), cs.OH(Other Computer Science), cs.PL(Programming Languages), cs.SE(Software Engineering), cs.LG(Machine Learning), cs.SD(Sound), cs.SI(Social and Information Networks), cs.RO(Robotics), cs.IT(Information Theory), cs.PF(Performance), cs.CL(Computation and Language), cs.IR(Information Retrieval), cs.MS(Mathematical Software), cs.FL(Formal Languages and Automata Theory), cs.DS(Data Structures and Algorithms), cs.OS(Operating Systems), cs.GT(Computer Science and Game Theory), cs.DB(Databases), cs.DL(Digital Libraries), cs.DM(Discrete Mathematics). Directly output the class name.

gpt: cs.AR(Hardware Architecture)