human: Given a hyperedge-centered hypergraph: <hypergraph>, where the center hyperedge is induced by one source paper and its member nodes are the cited papers.

Details of the hypergraph:
Center hyperedge (induced by source paper "boosting the bounds of symbolic qed for effective pre silicon verification of processor cores"):
  Abstract: Existing techniques to ensure functional correctness and hardware trust during pre-silicon verification face severe limitations. In this work, we systematically leverage two key ideas: 1) Symbolic Quick Error Detection (Symbolic QED or SQED), a recent bug detection and localization technique using Bounded Model Checking (BMC); and 2) Symbolic starting states, to present a method that: i) Effectively detects both "difficult" logic bugs and Hardware Trojans, even with long activation sequences where traditional BMC techniques fail; and ii) Does not need skilled manual guidance for writing testbenches, writing design-specific assertions, or debugging spurious counter-examples. Using open-source RISC-V cores, we demonstrate the following: 1. Quick (<5 minutes for an in-order scalar core and <2.5 hours for an out-of-order superscalar core) detection of 100% of hundreds of logic bug and hardware Trojan scenarios from commercial chips and research literature, and 97.9% of "extremal" bugs (randomly-generated bugs requiring ~100,000 activation instructions taken from random test programs). 2. Quick (~1 minute) detection of several previously unknown bugs in open-source RISC-V designs.

Includes members:
  Member "symbolic qed pre silicon verification for automotive microcontroller cores industrial case study":
    also connected through other hyperedges:
      (none)
  Member "3d integration another dimension toward hardware security":
    also connected through other hyperedges:
      - Hyperedge HE-1 (induced by source paper "hardware security for and beyond cmos technology an overview on fundamentals applications and challenges")
  Member "trojanzero switching activity aware design of undetectable hardware trojans with zero power and area footprint":
    also connected through other hyperedges:
      (none)
  Member "interdiction in practice hardware trojan against a high security usb flash drive":
    also connected through other hyperedges:
      - Hyperedge HE-2 (induced by source paper "hardware security for and beyond cmos technology an overview on fundamentals applications and challenges")
  Member "logic bug detection and localization using symbolic quick error detection":
    also connected through other hyperedges:
      (none)
  Member "e qed electrical bug localization during post silicon validation enabled by quick error detection and formal methods":
    also connected through other hyperedges:
      (none)
  Member "advancing the state of the art in hardware trojans design":
    also connected through other hyperedges:
      - Hyperedge HE-3 (induced by source paper "comments on defeating hatch building malicious ip cores")
  Member "tpad hardware trojan prevention and detection for trusted integrated circuits":
    also connected through other hyperedges:
      - Hyperedge HE-4 (induced by source paper "hardware security for and beyond cmos technology an overview on fundamentals applications and challenges")

Question: Please tell me which class the source paper belongs to. The 40 classes are: cs.NA(Numerical Analysis), cs.MM(Multimedia), cs.LO(Logic in Computer Science), cs.CY(Computers and Society), cs.CR(Cryptography and Security), cs.DC(Distributed, Parallel, and Cluster Computing), cs.HC(Human-Computer Interaction), cs.CE(Computational Engineering, Finance, and Science), cs.NI(Networking and Internet Architecture), cs.CC(Computational Complexity), cs.AI(Artificial Intelligence), cs.MA(Multiagent Systems), cs.GL(General Literature), cs.NE(Neural and Evolutionary Computing), cs.SC(Symbolic Computation), cs.AR(Hardware Architecture), cs.CV(Computer Vision and Pattern Recognition), cs.GR(Graphics), cs.ET(Emerging Technologies), cs.SY(Systems and Control), cs.CG(Computational Geometry), cs.OH(Other Computer Science), cs.PL(Programming Languages), cs.SE(Software Engineering), cs.LG(Machine Learning), cs.SD(Sound), cs.SI(Social and Information Networks), cs.RO(Robotics), cs.IT(Information Theory), cs.PF(Performance), cs.CL(Computation and Language), cs.IR(Information Retrieval), cs.MS(Mathematical Software), cs.FL(Formal Languages and Automata Theory), cs.DS(Data Structures and Algorithms), cs.OS(Operating Systems), cs.GT(Computer Science and Game Theory), cs.DB(Databases), cs.DL(Digital Libraries), cs.DM(Discrete Mathematics). Directly output the class name.

gpt: cs.AR(Hardware Architecture)