human: Given a hyperedge-centered hypergraph: <hypergraph>, where the center hyperedge is induced by one source paper and its member nodes are the cited papers.

Details of the hypergraph:
Center hyperedge (induced by source paper "protect your chip design intellectual property an overview"):
  Abstract: The increasing cost of integrated circuit (IC) fabrication has driven most companies to "go fabless" over time. The corresponding outsourcing trend gave rise to various attack vectors, e.g., illegal overproduction of ICs, piracy of the design intellectual property (IP), or insertion of hardware Trojans (HTs). These attacks are possibly conducted by untrusted entities residing all over the supply chain, ranging from untrusted foundries, test facilities, even to end-users. To overcome this multitude of threats, various techniques have been proposed over the past decade. In this paper, we review the landscape of IP protection techniques, which can be classified into logic locking, layout camouflaging, and split manufacturing. We discuss the history of these techniques, followed by state-of-the-art advancements, relevant limitations, and scope for future work.

Includes members:
  Member "functional analysis attacks on logic locking":
    also connected through other hyperedges:
      - Hyperedge HE-1 (induced by source paper "dfssd deep faults and shallow state duality a provably strong obfuscation solution for circuits with restricted access to scan chain")
  Member "a new paradigm in split manufacturing lock the feol unlock at the beol":
    also connected through other hyperedges:
      - Hyperedge HE-2 (induced by source paper "hardware security for and beyond cmos technology an overview on fundamentals applications and challenges")
  Member "srclock sat resistant cyclic logic locking for protecting the hardware":
    also connected through other hyperedges:
      - Hyperedge HE-3 (induced by source paper "sat hard cyclic logic obfuscation for protecting the ip in the manufacturing supply chain")
  Member "best of both worlds integration of split manufacturing and camouflaging into a security driven cad flow for 3d ics":
    also connected through other hyperedges:
      - Hyperedge HE-4 (induced by source paper "hardware security for and beyond cmos technology an overview on fundamentals applications and challenges")
  Member "concerted wire lifting enabling secure and cost effective split manufacturing":
    also connected through other hyperedges:
      - Hyperedge HE-5 (induced by source paper "hardware security for and beyond cmos technology an overview on fundamentals applications and challenges")
  Member "opening the doors to dynamic camouflaging harnessing the power of polymorphic devices":
    also connected through other hyperedges:
      - Hyperedge HE-6 (induced by source paper "hardware security for and beyond cmos technology an overview on fundamentals applications and challenges")
  Member "sat based reverse engineering of gate level schematics using fault injection and probing":
    also connected through other hyperedges:
      (none)
  Member "advancing hardware security using polymorphic and stochastic spin hall effect devices":
    also connected through other hyperedges:
      - Hyperedge HE-7 (induced by source paper "hardware security for and beyond cmos technology an overview on fundamentals applications and challenges")

Question: Please tell me which class the source paper belongs to. The 40 classes are: cs.NA(Numerical Analysis), cs.MM(Multimedia), cs.LO(Logic in Computer Science), cs.CY(Computers and Society), cs.CR(Cryptography and Security), cs.DC(Distributed, Parallel, and Cluster Computing), cs.HC(Human-Computer Interaction), cs.CE(Computational Engineering, Finance, and Science), cs.NI(Networking and Internet Architecture), cs.CC(Computational Complexity), cs.AI(Artificial Intelligence), cs.MA(Multiagent Systems), cs.GL(General Literature), cs.NE(Neural and Evolutionary Computing), cs.SC(Symbolic Computation), cs.AR(Hardware Architecture), cs.CV(Computer Vision and Pattern Recognition), cs.GR(Graphics), cs.ET(Emerging Technologies), cs.SY(Systems and Control), cs.CG(Computational Geometry), cs.OH(Other Computer Science), cs.PL(Programming Languages), cs.SE(Software Engineering), cs.LG(Machine Learning), cs.SD(Sound), cs.SI(Social and Information Networks), cs.RO(Robotics), cs.IT(Information Theory), cs.PF(Performance), cs.CL(Computation and Language), cs.IR(Information Retrieval), cs.MS(Mathematical Software), cs.FL(Formal Languages and Automata Theory), cs.DS(Data Structures and Algorithms), cs.OS(Operating Systems), cs.GT(Computer Science and Game Theory), cs.DB(Databases), cs.DL(Digital Libraries), cs.DM(Discrete Mathematics). Directly output the class name.

gpt: cs.CR(Cryptography and Security)