human: Given a hyperedge-centered hypergraph: <hypergraph>, where the center hyperedge is induced by one source paper and its member nodes are the cited papers.

Details of the hypergraph:
Center hyperedge (induced by source paper "bridging the gap between programming languages and hardware weak memory models"):
  Abstract: We develop a new intermediate weak memory model, IMM, as a way of modularizing the proofs of correctness of compilation from concurrent programming languages with weak memory consistency semantics to mainstream multi-core architectures, such as POWER and ARM. We use IMM to prove the correctness of compilation from the promising semantics of Kang et al. to POWER (thereby correcting and improving their result) and ARMv7, as well as to the recently revised ARMv8 model. Our results are mechanized in Coq, and to the best of our knowledge, these are the first machine-verified compilation correctness results for models that are weaker than x86-TSO.

Includes members:
  Member "constructing a weak memory model":
    also connected through other hyperedges:
      - Hyperedge HE-1 (induced by source paper "realitycheck bringing modularity hierarchy and abstraction to automated microarchitectural memory consistency verification")
  Member "the semantics of transactions and weak memory in x86 power arm and c":
    also connected through other hyperedges:
      - Hyperedge HE-2 (induced by source paper "privatization safe transactional memories extended version")
  Member "on thin air reads towards an event structures model of relaxed memory":
    also connected through other hyperedges:
      - Hyperedge HE-3 (induced by source paper "pridemm a solver for relaxed memory models")
  Member "counterexamples and proof loophole for the c c to power and armv7 trailing sync compiler mappings":
    also connected through other hyperedges:
      - Hyperedge HE-4 (induced by source paper "tricheck memory model verification at the trisection of software hardware and isa")
  Member "herding cats modelling simulation testing and data mining for weak memory":
    also connected through other hyperedges:
      - Hyperedge HE-5 (induced by source paper "realitycheck bringing modularity hierarchy and abstraction to automated microarchitectural memory consistency verification")

Question: Please tell me which class the source paper belongs to. The 40 classes are: cs.NA(Numerical Analysis), cs.MM(Multimedia), cs.LO(Logic in Computer Science), cs.CY(Computers and Society), cs.CR(Cryptography and Security), cs.DC(Distributed, Parallel, and Cluster Computing), cs.HC(Human-Computer Interaction), cs.CE(Computational Engineering, Finance, and Science), cs.NI(Networking and Internet Architecture), cs.CC(Computational Complexity), cs.AI(Artificial Intelligence), cs.MA(Multiagent Systems), cs.GL(General Literature), cs.NE(Neural and Evolutionary Computing), cs.SC(Symbolic Computation), cs.AR(Hardware Architecture), cs.CV(Computer Vision and Pattern Recognition), cs.GR(Graphics), cs.ET(Emerging Technologies), cs.SY(Systems and Control), cs.CG(Computational Geometry), cs.OH(Other Computer Science), cs.PL(Programming Languages), cs.SE(Software Engineering), cs.LG(Machine Learning), cs.SD(Sound), cs.SI(Social and Information Networks), cs.RO(Robotics), cs.IT(Information Theory), cs.PF(Performance), cs.CL(Computation and Language), cs.IR(Information Retrieval), cs.MS(Mathematical Software), cs.FL(Formal Languages and Automata Theory), cs.DS(Data Structures and Algorithms), cs.OS(Operating Systems), cs.GT(Computer Science and Game Theory), cs.DB(Databases), cs.DL(Digital Libraries), cs.DM(Discrete Mathematics). Directly output the class name.

gpt: cs.PL(Programming Languages)